blob: 0cfa0c860bc3293f8161284e28033fe7751c8f82 [file] [log] [blame]
Thomas Petazzonifc8f5ad2012-11-12 17:03:47 +01001/*
2 * Driver for the MDIO interface of Marvell network interfaces.
3 *
4 * Since the MDIO interface of Marvell network interfaces is shared
5 * between all network interfaces, having a single driver allows to
6 * handle concurrent accesses properly (you may have four Ethernet
7 * ports, but they in fact share the same SMI interface to access the
8 * MDIO bus). Moreover, this MDIO interface code is similar between
9 * the mv643xx_eth driver and the mvneta driver. For now, it is only
10 * used by the mvneta driver, but it could later be used by the
11 * mv643xx_eth driver as well.
12 *
13 * Copyright (C) 2012 Marvell
14 *
15 * Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
16 *
17 * This file is licensed under the terms of the GNU General Public
18 * License version 2. This program is licensed "as is" without any
19 * warranty of any kind, whether express or implied.
20 */
21
22#include <linux/init.h>
23#include <linux/kernel.h>
24#include <linux/module.h>
25#include <linux/mutex.h>
26#include <linux/phy.h>
Florian Fainelli2ec98522013-03-22 03:39:27 +000027#include <linux/interrupt.h>
Thomas Petazzonifc8f5ad2012-11-12 17:03:47 +010028#include <linux/platform_device.h>
Thomas Petazzonid98a80f2012-11-19 11:39:42 +010029#include <linux/delay.h>
Florian Fainelli7111b712013-03-22 03:39:25 +000030#include <linux/io.h>
Sebastian Hesselbarth3d604da2013-04-07 01:09:47 +000031#include <linux/clk.h>
Florian Fainelli7111b712013-03-22 03:39:25 +000032#include <linux/of_mdio.h>
Florian Fainelli2ec98522013-03-22 03:39:27 +000033#include <linux/sched.h>
34#include <linux/wait.h>
Thomas Petazzonifc8f5ad2012-11-12 17:03:47 +010035
36#define MVMDIO_SMI_DATA_SHIFT 0
37#define MVMDIO_SMI_PHY_ADDR_SHIFT 16
38#define MVMDIO_SMI_PHY_REG_SHIFT 21
39#define MVMDIO_SMI_READ_OPERATION BIT(26)
40#define MVMDIO_SMI_WRITE_OPERATION 0
41#define MVMDIO_SMI_READ_VALID BIT(27)
42#define MVMDIO_SMI_BUSY BIT(28)
Florian Fainelli2ec98522013-03-22 03:39:27 +000043#define MVMDIO_ERR_INT_CAUSE 0x007C
44#define MVMDIO_ERR_INT_SMI_DONE 0x00000010
45#define MVMDIO_ERR_INT_MASK 0x0080
Thomas Petazzonifc8f5ad2012-11-12 17:03:47 +010046
Leigh Brownb70cd1c2013-10-29 09:33:31 +000047/*
48 * SMI Timeout measurements:
49 * - Kirkwood 88F6281 (Globalscale Dreamplug): 45us to 95us (Interrupt)
50 * - Armada 370 (Globalscale Mirabox): 41us to 43us (Polled)
51 */
52#define MVMDIO_SMI_TIMEOUT 1000 /* 1000us = 1ms */
53#define MVMDIO_SMI_POLL_INTERVAL_MIN 45
54#define MVMDIO_SMI_POLL_INTERVAL_MAX 55
55
Thomas Petazzonifc8f5ad2012-11-12 17:03:47 +010056struct orion_mdio_dev {
57 struct mutex lock;
Florian Fainelli3712b712013-03-22 03:39:26 +000058 void __iomem *regs;
Sebastian Hesselbarth3d604da2013-04-07 01:09:47 +000059 struct clk *clk;
Florian Fainelli2ec98522013-03-22 03:39:27 +000060 /*
61 * If we have access to the error interrupt pin (which is
62 * somewhat misnamed as it not only reflects internal errors
63 * but also reflects SMI completion), use that to wait for
64 * SMI access completion instead of polling the SMI busy bit.
65 */
66 int err_interrupt;
67 wait_queue_head_t smi_busy_wait;
Thomas Petazzonifc8f5ad2012-11-12 17:03:47 +010068};
69
Florian Fainelli2ec98522013-03-22 03:39:27 +000070static int orion_mdio_smi_is_done(struct orion_mdio_dev *dev)
71{
72 return !(readl(dev->regs) & MVMDIO_SMI_BUSY);
73}
74
Thomas Petazzonib07812f2012-11-19 11:40:15 +010075/* Wait for the SMI unit to be ready for another operation
Thomas Petazzonifc8f5ad2012-11-12 17:03:47 +010076 */
77static int orion_mdio_wait_ready(struct mii_bus *bus)
78{
79 struct orion_mdio_dev *dev = bus->priv;
Leigh Brownb70cd1c2013-10-29 09:33:31 +000080 unsigned long timeout = usecs_to_jiffies(MVMDIO_SMI_TIMEOUT);
81 unsigned long end = jiffies + timeout;
82 int timedout = 0;
Thomas Petazzonifc8f5ad2012-11-12 17:03:47 +010083
Leigh Brownb70cd1c2013-10-29 09:33:31 +000084 while (1) {
85 if (orion_mdio_smi_is_done(dev))
86 return 0;
87 else if (timedout)
88 break;
Thomas Petazzonifc8f5ad2012-11-12 17:03:47 +010089
Leigh Brownb70cd1c2013-10-29 09:33:31 +000090 if (dev->err_interrupt <= 0) {
91 usleep_range(MVMDIO_SMI_POLL_INTERVAL_MIN,
92 MVMDIO_SMI_POLL_INTERVAL_MAX);
Florian Fainelli2ec98522013-03-22 03:39:27 +000093
Leigh Brownb70cd1c2013-10-29 09:33:31 +000094 if (time_is_before_jiffies(end))
95 ++timedout;
96 } else {
Florian Fainelli2ec98522013-03-22 03:39:27 +000097 wait_event_timeout(dev->smi_busy_wait,
Leigh Brownb70cd1c2013-10-29 09:33:31 +000098 orion_mdio_smi_is_done(dev),
99 timeout);
100
101 ++timedout;
102 }
Thomas Petazzonifc8f5ad2012-11-12 17:03:47 +0100103 }
104
Leigh Brownb70cd1c2013-10-29 09:33:31 +0000105 dev_err(bus->parent, "Timeout: SMI busy for too long\n");
106 return -ETIMEDOUT;
Thomas Petazzonifc8f5ad2012-11-12 17:03:47 +0100107}
108
109static int orion_mdio_read(struct mii_bus *bus, int mii_id,
110 int regnum)
111{
112 struct orion_mdio_dev *dev = bus->priv;
Thomas Petazzonifc8f5ad2012-11-12 17:03:47 +0100113 u32 val;
114 int ret;
115
116 mutex_lock(&dev->lock);
117
118 ret = orion_mdio_wait_ready(bus);
Leigh Brown839f46b2013-10-29 09:33:32 +0000119 if (ret < 0)
120 goto out;
Thomas Petazzonifc8f5ad2012-11-12 17:03:47 +0100121
122 writel(((mii_id << MVMDIO_SMI_PHY_ADDR_SHIFT) |
123 (regnum << MVMDIO_SMI_PHY_REG_SHIFT) |
124 MVMDIO_SMI_READ_OPERATION),
Florian Fainelli3712b712013-03-22 03:39:26 +0000125 dev->regs);
Thomas Petazzonifc8f5ad2012-11-12 17:03:47 +0100126
Leigh Brown839f46b2013-10-29 09:33:32 +0000127 ret = orion_mdio_wait_ready(bus);
128 if (ret < 0)
129 goto out;
Thomas Petazzonifc8f5ad2012-11-12 17:03:47 +0100130
Leigh Brown839f46b2013-10-29 09:33:32 +0000131 val = readl(dev->regs);
132 if (!(val & MVMDIO_SMI_READ_VALID)) {
133 dev_err(bus->parent, "SMI bus read not valid\n");
134 ret = -ENODEV;
135 goto out;
Thomas Petazzonifc8f5ad2012-11-12 17:03:47 +0100136 }
137
Leigh Brown839f46b2013-10-29 09:33:32 +0000138 ret = val & 0xFFFF;
139out:
Thomas Petazzonifc8f5ad2012-11-12 17:03:47 +0100140 mutex_unlock(&dev->lock);
Leigh Brown839f46b2013-10-29 09:33:32 +0000141 return ret;
Thomas Petazzonifc8f5ad2012-11-12 17:03:47 +0100142}
143
144static int orion_mdio_write(struct mii_bus *bus, int mii_id,
145 int regnum, u16 value)
146{
147 struct orion_mdio_dev *dev = bus->priv;
148 int ret;
149
150 mutex_lock(&dev->lock);
151
152 ret = orion_mdio_wait_ready(bus);
Leigh Brown526edcf2013-10-29 09:33:33 +0000153 if (ret < 0)
154 goto out;
Thomas Petazzonifc8f5ad2012-11-12 17:03:47 +0100155
156 writel(((mii_id << MVMDIO_SMI_PHY_ADDR_SHIFT) |
157 (regnum << MVMDIO_SMI_PHY_REG_SHIFT) |
158 MVMDIO_SMI_WRITE_OPERATION |
159 (value << MVMDIO_SMI_DATA_SHIFT)),
Florian Fainelli3712b712013-03-22 03:39:26 +0000160 dev->regs);
Thomas Petazzonifc8f5ad2012-11-12 17:03:47 +0100161
Leigh Brown526edcf2013-10-29 09:33:33 +0000162out:
Thomas Petazzonifc8f5ad2012-11-12 17:03:47 +0100163 mutex_unlock(&dev->lock);
Leigh Brown526edcf2013-10-29 09:33:33 +0000164 return ret;
Thomas Petazzonifc8f5ad2012-11-12 17:03:47 +0100165}
166
167static int orion_mdio_reset(struct mii_bus *bus)
168{
169 return 0;
170}
171
Florian Fainelli2ec98522013-03-22 03:39:27 +0000172static irqreturn_t orion_mdio_err_irq(int irq, void *dev_id)
173{
174 struct orion_mdio_dev *dev = dev_id;
175
176 if (readl(dev->regs + MVMDIO_ERR_INT_CAUSE) &
177 MVMDIO_ERR_INT_SMI_DONE) {
178 writel(~MVMDIO_ERR_INT_SMI_DONE,
179 dev->regs + MVMDIO_ERR_INT_CAUSE);
180 wake_up(&dev->smi_busy_wait);
181 return IRQ_HANDLED;
182 }
183
184 return IRQ_NONE;
185}
186
Greg KH03ce7582012-12-21 13:42:15 +0000187static int orion_mdio_probe(struct platform_device *pdev)
Thomas Petazzonifc8f5ad2012-11-12 17:03:47 +0100188{
Florian Fainelli7111b712013-03-22 03:39:25 +0000189 struct resource *r;
Thomas Petazzonifc8f5ad2012-11-12 17:03:47 +0100190 struct mii_bus *bus;
191 struct orion_mdio_dev *dev;
192 int i, ret;
193
Florian Fainelli7111b712013-03-22 03:39:25 +0000194 r = platform_get_resource(pdev, IORESOURCE_MEM, 0);
195 if (!r) {
196 dev_err(&pdev->dev, "No SMI register address given\n");
197 return -ENODEV;
198 }
199
Thomas Petazzonifc8f5ad2012-11-12 17:03:47 +0100200 bus = mdiobus_alloc_size(sizeof(struct orion_mdio_dev));
201 if (!bus) {
202 dev_err(&pdev->dev, "Cannot allocate MDIO bus\n");
203 return -ENOMEM;
204 }
205
206 bus->name = "orion_mdio_bus";
207 bus->read = orion_mdio_read;
208 bus->write = orion_mdio_write;
209 bus->reset = orion_mdio_reset;
210 snprintf(bus->id, MII_BUS_ID_SIZE, "%s-mii",
211 dev_name(&pdev->dev));
212 bus->parent = &pdev->dev;
213
214 bus->irq = kmalloc(sizeof(int) * PHY_MAX_ADDR, GFP_KERNEL);
215 if (!bus->irq) {
Thomas Petazzonifc8f5ad2012-11-12 17:03:47 +0100216 mdiobus_free(bus);
217 return -ENOMEM;
218 }
219
220 for (i = 0; i < PHY_MAX_ADDR; i++)
221 bus->irq[i] = PHY_POLL;
222
223 dev = bus->priv;
Florian Fainelli3712b712013-03-22 03:39:26 +0000224 dev->regs = devm_ioremap(&pdev->dev, r->start, resource_size(r));
225 if (!dev->regs) {
Florian Fainelli7111b712013-03-22 03:39:25 +0000226 dev_err(&pdev->dev, "Unable to remap SMI register\n");
Florian Fainelli2ec98522013-03-22 03:39:27 +0000227 ret = -ENODEV;
228 goto out_mdio;
229 }
230
231 init_waitqueue_head(&dev->smi_busy_wait);
232
Sebastian Hesselbarth3d604da2013-04-07 01:09:47 +0000233 dev->clk = devm_clk_get(&pdev->dev, NULL);
234 if (!IS_ERR(dev->clk))
235 clk_prepare_enable(dev->clk);
236
Florian Fainelli2ec98522013-03-22 03:39:27 +0000237 dev->err_interrupt = platform_get_irq(pdev, 0);
238 if (dev->err_interrupt != -ENXIO) {
239 ret = devm_request_irq(&pdev->dev, dev->err_interrupt,
240 orion_mdio_err_irq,
241 IRQF_SHARED, pdev->name, dev);
242 if (ret)
243 goto out_mdio;
244
245 writel(MVMDIO_ERR_INT_SMI_DONE,
246 dev->regs + MVMDIO_ERR_INT_MASK);
Thomas Petazzonifc8f5ad2012-11-12 17:03:47 +0100247 }
248
249 mutex_init(&dev->lock);
250
Florian Fainelli7111b712013-03-22 03:39:25 +0000251 if (pdev->dev.of_node)
252 ret = of_mdiobus_register(bus, pdev->dev.of_node);
253 else
254 ret = mdiobus_register(bus);
Thomas Petazzonifc8f5ad2012-11-12 17:03:47 +0100255 if (ret < 0) {
256 dev_err(&pdev->dev, "Cannot register MDIO bus (%d)\n", ret);
Florian Fainelli2ec98522013-03-22 03:39:27 +0000257 goto out_mdio;
Thomas Petazzonifc8f5ad2012-11-12 17:03:47 +0100258 }
259
260 platform_set_drvdata(pdev, bus);
261
262 return 0;
Florian Fainelli2ec98522013-03-22 03:39:27 +0000263
264out_mdio:
Sebastian Hesselbarth3d604da2013-04-07 01:09:47 +0000265 if (!IS_ERR(dev->clk))
266 clk_disable_unprepare(dev->clk);
Florian Fainelli2ec98522013-03-22 03:39:27 +0000267 kfree(bus->irq);
268 mdiobus_free(bus);
269 return ret;
Thomas Petazzonifc8f5ad2012-11-12 17:03:47 +0100270}
271
Greg KH03ce7582012-12-21 13:42:15 +0000272static int orion_mdio_remove(struct platform_device *pdev)
Thomas Petazzonifc8f5ad2012-11-12 17:03:47 +0100273{
274 struct mii_bus *bus = platform_get_drvdata(pdev);
Florian Fainelli2ec98522013-03-22 03:39:27 +0000275 struct orion_mdio_dev *dev = bus->priv;
276
277 writel(0, dev->regs + MVMDIO_ERR_INT_MASK);
Thomas Petazzonifc8f5ad2012-11-12 17:03:47 +0100278 mdiobus_unregister(bus);
279 kfree(bus->irq);
280 mdiobus_free(bus);
Sebastian Hesselbarth3d604da2013-04-07 01:09:47 +0000281 if (!IS_ERR(dev->clk))
282 clk_disable_unprepare(dev->clk);
283
Thomas Petazzonifc8f5ad2012-11-12 17:03:47 +0100284 return 0;
285}
286
287static const struct of_device_id orion_mdio_match[] = {
288 { .compatible = "marvell,orion-mdio" },
289 { }
290};
291MODULE_DEVICE_TABLE(of, orion_mdio_match);
292
293static struct platform_driver orion_mdio_driver = {
294 .probe = orion_mdio_probe,
Greg KH03ce7582012-12-21 13:42:15 +0000295 .remove = orion_mdio_remove,
Thomas Petazzonifc8f5ad2012-11-12 17:03:47 +0100296 .driver = {
297 .name = "orion-mdio",
298 .of_match_table = orion_mdio_match,
299 },
300};
301
302module_platform_driver(orion_mdio_driver);
303
304MODULE_DESCRIPTION("Marvell MDIO interface driver");
305MODULE_AUTHOR("Thomas Petazzoni <thomas.petazzoni@free-electrons.com>");
306MODULE_LICENSE("GPL");
Simon Baatz404b8be2013-03-24 10:33:59 +0000307MODULE_ALIAS("platform:orion-mdio");