blob: dd39e4f7a5601e45eb9be1302ef514506a33a896 [file] [log] [blame]
Chris Wilson688e6c72016-07-01 17:23:15 +01001/*
2 * Copyright © 2015 Intel Corporation
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
21 * IN THE SOFTWARE.
22 *
23 */
24
Chris Wilsonc81d4612016-07-01 17:23:25 +010025#include <linux/kthread.h>
26
Chris Wilson688e6c72016-07-01 17:23:15 +010027#include "i915_drv.h"
28
Chris Wilson2246bea2017-02-17 15:13:00 +000029static unsigned long wait_timeout(void)
30{
31 return round_jiffies_up(jiffies + DRM_I915_HANGCHECK_JIFFIES);
32}
33
Chris Wilson83348ba2016-08-09 17:47:51 +010034static void intel_breadcrumbs_hangcheck(unsigned long data)
35{
36 struct intel_engine_cs *engine = (struct intel_engine_cs *)data;
37 struct intel_breadcrumbs *b = &engine->breadcrumbs;
38
39 if (!b->irq_enabled)
40 return;
41
Chris Wilson2246bea2017-02-17 15:13:00 +000042 if (b->hangcheck_interrupts != atomic_read(&engine->irq_count)) {
43 b->hangcheck_interrupts = atomic_read(&engine->irq_count);
44 mod_timer(&b->hangcheck, wait_timeout());
Chris Wilson83348ba2016-08-09 17:47:51 +010045 return;
46 }
47
Chris Wilson89985672017-02-17 15:13:02 +000048 /* If the waiter was currently running, assume it hasn't had a chance
49 * to process the pending interrupt (e.g, low priority task on a loaded
50 * system) and wait until it sleeps before declaring a missed interrupt.
51 */
52 if (!intel_engine_wakeup(engine)) {
53 mod_timer(&b->hangcheck, wait_timeout());
54 return;
55 }
56
Chris Wilson83348ba2016-08-09 17:47:51 +010057 DRM_DEBUG("Hangcheck timer elapsed... %s idle\n", engine->name);
58 set_bit(engine->id, &engine->i915->gpu_error.missed_irq_rings);
59 mod_timer(&engine->breadcrumbs.fake_irq, jiffies + 1);
60
61 /* Ensure that even if the GPU hangs, we get woken up.
62 *
63 * However, note that if no one is waiting, we never notice
64 * a gpu hang. Eventually, we will have to wait for a resource
65 * held by the GPU and so trigger a hangcheck. In the most
66 * pathological case, this will be upon memory starvation! To
67 * prevent this, we also queue the hangcheck from the retire
68 * worker.
69 */
70 i915_queue_hangcheck(engine->i915);
71}
72
Chris Wilson688e6c72016-07-01 17:23:15 +010073static void intel_breadcrumbs_fake_irq(unsigned long data)
74{
75 struct intel_engine_cs *engine = (struct intel_engine_cs *)data;
76
77 /*
78 * The timer persists in case we cannot enable interrupts,
79 * or if we have previously seen seqno/interrupt incoherency
80 * ("missed interrupt" syndrome). Here the worker will wake up
81 * every jiffie in order to kick the oldest waiter to do the
82 * coherent seqno check.
83 */
Chris Wilson688e6c72016-07-01 17:23:15 +010084 if (intel_engine_wakeup(engine))
85 mod_timer(&engine->breadcrumbs.fake_irq, jiffies + 1);
Chris Wilson688e6c72016-07-01 17:23:15 +010086}
87
88static void irq_enable(struct intel_engine_cs *engine)
89{
Chris Wilson3d5564e2016-07-01 17:23:23 +010090 /* Enabling the IRQ may miss the generation of the interrupt, but
91 * we still need to force the barrier before reading the seqno,
92 * just in case.
93 */
Chris Wilson538b2572017-01-24 15:18:05 +000094 set_bit(ENGINE_IRQ_BREADCRUMB, &engine->irq_posted);
Chris Wilson31bb59c2016-07-01 17:23:27 +010095
Chris Wilsonf6168e32016-10-28 13:58:55 +010096 /* Caller disables interrupts */
97 spin_lock(&engine->i915->irq_lock);
Chris Wilson31bb59c2016-07-01 17:23:27 +010098 engine->irq_enable(engine);
Chris Wilsonf6168e32016-10-28 13:58:55 +010099 spin_unlock(&engine->i915->irq_lock);
Chris Wilson688e6c72016-07-01 17:23:15 +0100100}
101
102static void irq_disable(struct intel_engine_cs *engine)
103{
Chris Wilsonf6168e32016-10-28 13:58:55 +0100104 /* Caller disables interrupts */
105 spin_lock(&engine->i915->irq_lock);
Chris Wilson31bb59c2016-07-01 17:23:27 +0100106 engine->irq_disable(engine);
Chris Wilsonf6168e32016-10-28 13:58:55 +0100107 spin_unlock(&engine->i915->irq_lock);
Chris Wilson688e6c72016-07-01 17:23:15 +0100108}
109
Chris Wilson6ef98ea2017-02-17 15:13:03 +0000110static bool use_fake_irq(const struct intel_breadcrumbs *b)
111{
112 const struct intel_engine_cs *engine =
113 container_of(b, struct intel_engine_cs, breadcrumbs);
114
115 if (!test_bit(engine->id, &engine->i915->gpu_error.missed_irq_rings))
116 return false;
117
118 /* Only start with the heavy weight fake irq timer if we have not
119 * seen any interrupts since enabling it the first time. If the
120 * interrupts are still arriving, it means we made a mistake in our
121 * engine->seqno_barrier(), a timing error that should be transient
122 * and unlikely to reoccur.
123 */
124 return atomic_read(&engine->irq_count) == b->hangcheck_interrupts;
125}
126
Chris Wilson04171312016-07-06 12:39:00 +0100127static void __intel_breadcrumbs_enable_irq(struct intel_breadcrumbs *b)
Chris Wilson688e6c72016-07-01 17:23:15 +0100128{
129 struct intel_engine_cs *engine =
130 container_of(b, struct intel_engine_cs, breadcrumbs);
131 struct drm_i915_private *i915 = engine->i915;
Chris Wilson688e6c72016-07-01 17:23:15 +0100132
133 assert_spin_locked(&b->lock);
134 if (b->rpm_wakelock)
Chris Wilson04171312016-07-06 12:39:00 +0100135 return;
Chris Wilson688e6c72016-07-01 17:23:15 +0100136
Chris Wilsonf97fbf92017-02-13 17:15:14 +0000137 if (I915_SELFTEST_ONLY(b->mock)) {
138 /* For our mock objects we want to avoid interaction
139 * with the real hardware (which is not set up). So
140 * we simply pretend we have enabled the powerwell
141 * and the irq, and leave it up to the mock
142 * implementation to call intel_engine_wakeup()
143 * itself when it wants to simulate a user interrupt,
144 */
145 b->rpm_wakelock = true;
146 return;
147 }
148
Chris Wilson688e6c72016-07-01 17:23:15 +0100149 /* Since we are waiting on a request, the GPU should be busy
150 * and should have its own rpm reference. For completeness,
151 * record an rpm reference for ourselves to cover the
152 * interrupt we unmask.
153 */
154 intel_runtime_pm_get_noresume(i915);
155 b->rpm_wakelock = true;
156
157 /* No interrupts? Kick the waiter every jiffie! */
158 if (intel_irqs_enabled(i915)) {
Chris Wilson3d5564e2016-07-01 17:23:23 +0100159 if (!test_bit(engine->id, &i915->gpu_error.test_irq_rings))
Chris Wilson688e6c72016-07-01 17:23:15 +0100160 irq_enable(engine);
Chris Wilson688e6c72016-07-01 17:23:15 +0100161 b->irq_enabled = true;
162 }
163
Chris Wilson6ef98ea2017-02-17 15:13:03 +0000164 if (!b->irq_enabled || use_fake_irq(b)) {
Chris Wilson688e6c72016-07-01 17:23:15 +0100165 mod_timer(&b->fake_irq, jiffies + 1);
Chris Wilson2f1ac9c2017-01-23 09:37:24 +0000166 i915_queue_hangcheck(i915);
Chris Wilson83348ba2016-08-09 17:47:51 +0100167 } else {
168 /* Ensure we never sleep indefinitely */
Chris Wilson2246bea2017-02-17 15:13:00 +0000169 mod_timer(&b->hangcheck, wait_timeout());
Chris Wilson83348ba2016-08-09 17:47:51 +0100170 }
Chris Wilson688e6c72016-07-01 17:23:15 +0100171}
172
173static void __intel_breadcrumbs_disable_irq(struct intel_breadcrumbs *b)
174{
175 struct intel_engine_cs *engine =
176 container_of(b, struct intel_engine_cs, breadcrumbs);
177
178 assert_spin_locked(&b->lock);
179 if (!b->rpm_wakelock)
180 return;
181
Chris Wilsonf97fbf92017-02-13 17:15:14 +0000182 if (I915_SELFTEST_ONLY(b->mock)) {
183 b->rpm_wakelock = false;
184 return;
185 }
186
Chris Wilson688e6c72016-07-01 17:23:15 +0100187 if (b->irq_enabled) {
188 irq_disable(engine);
189 b->irq_enabled = false;
190 }
191
192 intel_runtime_pm_put(engine->i915);
193 b->rpm_wakelock = false;
194}
195
196static inline struct intel_wait *to_wait(struct rb_node *node)
197{
Chris Wilsond8567862016-12-20 10:40:03 +0000198 return rb_entry(node, struct intel_wait, node);
Chris Wilson688e6c72016-07-01 17:23:15 +0100199}
200
201static inline void __intel_breadcrumbs_finish(struct intel_breadcrumbs *b,
202 struct intel_wait *wait)
203{
204 assert_spin_locked(&b->lock);
205
206 /* This request is completed, so remove it from the tree, mark it as
207 * complete, and *then* wake up the associated task.
208 */
209 rb_erase(&wait->node, &b->waiters);
210 RB_CLEAR_NODE(&wait->node);
211
212 wake_up_process(wait->tsk); /* implicit smp_wmb() */
213}
214
215static bool __intel_engine_add_wait(struct intel_engine_cs *engine,
216 struct intel_wait *wait)
217{
218 struct intel_breadcrumbs *b = &engine->breadcrumbs;
219 struct rb_node **p, *parent, *completed;
220 bool first;
221 u32 seqno;
222
223 /* Insert the request into the retirement ordered list
224 * of waiters by walking the rbtree. If we are the oldest
225 * seqno in the tree (the first to be retired), then
226 * set ourselves as the bottom-half.
227 *
228 * As we descend the tree, prune completed branches since we hold the
229 * spinlock we know that the first_waiter must be delayed and can
230 * reduce some of the sequential wake up latency if we take action
231 * ourselves and wake up the completed tasks in parallel. Also, by
232 * removing stale elements in the tree, we may be able to reduce the
233 * ping-pong between the old bottom-half and ourselves as first-waiter.
234 */
235 first = true;
236 parent = NULL;
237 completed = NULL;
Chris Wilson1b7744e2016-07-01 17:23:17 +0100238 seqno = intel_engine_get_seqno(engine);
Chris Wilson688e6c72016-07-01 17:23:15 +0100239
240 /* If the request completed before we managed to grab the spinlock,
241 * return now before adding ourselves to the rbtree. We let the
242 * current bottom-half handle any pending wakeups and instead
243 * try and get out of the way quickly.
244 */
245 if (i915_seqno_passed(seqno, wait->seqno)) {
246 RB_CLEAR_NODE(&wait->node);
247 return first;
248 }
249
250 p = &b->waiters.rb_node;
251 while (*p) {
252 parent = *p;
253 if (wait->seqno == to_wait(parent)->seqno) {
254 /* We have multiple waiters on the same seqno, select
255 * the highest priority task (that with the smallest
256 * task->prio) to serve as the bottom-half for this
257 * group.
258 */
259 if (wait->tsk->prio > to_wait(parent)->tsk->prio) {
260 p = &parent->rb_right;
261 first = false;
262 } else {
263 p = &parent->rb_left;
264 }
265 } else if (i915_seqno_passed(wait->seqno,
266 to_wait(parent)->seqno)) {
267 p = &parent->rb_right;
268 if (i915_seqno_passed(seqno, to_wait(parent)->seqno))
269 completed = parent;
270 else
271 first = false;
272 } else {
273 p = &parent->rb_left;
274 }
275 }
276 rb_link_node(&wait->node, parent, p);
277 rb_insert_color(&wait->node, &b->waiters);
Chris Wilsondbd6ef22016-08-09 17:47:52 +0100278 GEM_BUG_ON(!first && !rcu_access_pointer(b->irq_seqno_bh));
Chris Wilson688e6c72016-07-01 17:23:15 +0100279
280 if (completed) {
281 struct rb_node *next = rb_next(completed);
282
283 GEM_BUG_ON(!next && !first);
284 if (next && next != &wait->node) {
285 GEM_BUG_ON(first);
286 b->first_wait = to_wait(next);
Chris Wilsondbd6ef22016-08-09 17:47:52 +0100287 rcu_assign_pointer(b->irq_seqno_bh, b->first_wait->tsk);
Chris Wilson688e6c72016-07-01 17:23:15 +0100288 /* As there is a delay between reading the current
289 * seqno, processing the completed tasks and selecting
290 * the next waiter, we may have missed the interrupt
291 * and so need for the next bottom-half to wakeup.
292 *
293 * Also as we enable the IRQ, we may miss the
294 * interrupt for that seqno, so we have to wake up
295 * the next bottom-half in order to do a coherent check
296 * in case the seqno passed.
297 */
298 __intel_breadcrumbs_enable_irq(b);
Chris Wilson538b2572017-01-24 15:18:05 +0000299 if (test_bit(ENGINE_IRQ_BREADCRUMB,
300 &engine->irq_posted))
Chris Wilson3d5564e2016-07-01 17:23:23 +0100301 wake_up_process(to_wait(next)->tsk);
Chris Wilson688e6c72016-07-01 17:23:15 +0100302 }
303
304 do {
305 struct intel_wait *crumb = to_wait(completed);
306 completed = rb_prev(completed);
307 __intel_breadcrumbs_finish(b, crumb);
308 } while (completed);
309 }
310
311 if (first) {
312 GEM_BUG_ON(rb_first(&b->waiters) != &wait->node);
313 b->first_wait = wait;
Chris Wilsondbd6ef22016-08-09 17:47:52 +0100314 rcu_assign_pointer(b->irq_seqno_bh, wait->tsk);
Chris Wilson04171312016-07-06 12:39:00 +0100315 /* After assigning ourselves as the new bottom-half, we must
316 * perform a cursory check to prevent a missed interrupt.
317 * Either we miss the interrupt whilst programming the hardware,
318 * or if there was a previous waiter (for a later seqno) they
319 * may be woken instead of us (due to the inherent race
Chris Wilsonaca34b62016-07-06 12:39:02 +0100320 * in the unlocked read of b->irq_seqno_bh in the irq handler)
321 * and so we miss the wake up.
Chris Wilson04171312016-07-06 12:39:00 +0100322 */
323 __intel_breadcrumbs_enable_irq(b);
Chris Wilson688e6c72016-07-01 17:23:15 +0100324 }
Chris Wilsondbd6ef22016-08-09 17:47:52 +0100325 GEM_BUG_ON(!rcu_access_pointer(b->irq_seqno_bh));
Chris Wilson688e6c72016-07-01 17:23:15 +0100326 GEM_BUG_ON(!b->first_wait);
327 GEM_BUG_ON(rb_first(&b->waiters) != &b->first_wait->node);
328
329 return first;
330}
331
332bool intel_engine_add_wait(struct intel_engine_cs *engine,
333 struct intel_wait *wait)
334{
335 struct intel_breadcrumbs *b = &engine->breadcrumbs;
336 bool first;
337
Chris Wilsonf6168e32016-10-28 13:58:55 +0100338 spin_lock_irq(&b->lock);
Chris Wilson688e6c72016-07-01 17:23:15 +0100339 first = __intel_engine_add_wait(engine, wait);
Chris Wilsonf6168e32016-10-28 13:58:55 +0100340 spin_unlock_irq(&b->lock);
Chris Wilson688e6c72016-07-01 17:23:15 +0100341
342 return first;
343}
344
Chris Wilson688e6c72016-07-01 17:23:15 +0100345static inline bool chain_wakeup(struct rb_node *rb, int priority)
346{
347 return rb && to_wait(rb)->tsk->prio <= priority;
348}
349
Chris Wilsonc81d4612016-07-01 17:23:25 +0100350static inline int wakeup_priority(struct intel_breadcrumbs *b,
351 struct task_struct *tsk)
352{
353 if (tsk == b->signaler)
354 return INT_MIN;
355 else
356 return tsk->prio;
357}
358
Chris Wilson9eb143b2017-02-23 07:44:16 +0000359static void __intel_engine_remove_wait(struct intel_engine_cs *engine,
360 struct intel_wait *wait)
Chris Wilson688e6c72016-07-01 17:23:15 +0100361{
362 struct intel_breadcrumbs *b = &engine->breadcrumbs;
363
Chris Wilson9eb143b2017-02-23 07:44:16 +0000364 assert_spin_locked(&b->lock);
Chris Wilson688e6c72016-07-01 17:23:15 +0100365
366 if (RB_EMPTY_NODE(&wait->node))
Chris Wilson9eb143b2017-02-23 07:44:16 +0000367 goto out;
Chris Wilson688e6c72016-07-01 17:23:15 +0100368
369 if (b->first_wait == wait) {
Chris Wilsonc81d4612016-07-01 17:23:25 +0100370 const int priority = wakeup_priority(b, wait->tsk);
Chris Wilson688e6c72016-07-01 17:23:15 +0100371 struct rb_node *next;
Chris Wilson688e6c72016-07-01 17:23:15 +0100372
Chris Wilsondbd6ef22016-08-09 17:47:52 +0100373 GEM_BUG_ON(rcu_access_pointer(b->irq_seqno_bh) != wait->tsk);
Chris Wilson688e6c72016-07-01 17:23:15 +0100374
375 /* We are the current bottom-half. Find the next candidate,
376 * the first waiter in the queue on the remaining oldest
377 * request. As multiple seqnos may complete in the time it
378 * takes us to wake up and find the next waiter, we have to
379 * wake up that waiter for it to perform its own coherent
380 * completion check.
381 */
382 next = rb_next(&wait->node);
383 if (chain_wakeup(next, priority)) {
384 /* If the next waiter is already complete,
385 * wake it up and continue onto the next waiter. So
386 * if have a small herd, they will wake up in parallel
387 * rather than sequentially, which should reduce
388 * the overall latency in waking all the completed
389 * clients.
390 *
391 * However, waking up a chain adds extra latency to
392 * the first_waiter. This is undesirable if that
393 * waiter is a high priority task.
394 */
Chris Wilson1b7744e2016-07-01 17:23:17 +0100395 u32 seqno = intel_engine_get_seqno(engine);
Chris Wilson688e6c72016-07-01 17:23:15 +0100396
397 while (i915_seqno_passed(seqno, to_wait(next)->seqno)) {
398 struct rb_node *n = rb_next(next);
399
400 __intel_breadcrumbs_finish(b, to_wait(next));
401 next = n;
402 if (!chain_wakeup(next, priority))
403 break;
404 }
405 }
406
407 if (next) {
408 /* In our haste, we may have completed the first waiter
409 * before we enabled the interrupt. Do so now as we
410 * have a second waiter for a future seqno. Afterwards,
411 * we have to wake up that waiter in case we missed
412 * the interrupt, or if we have to handle an
413 * exception rather than a seqno completion.
414 */
415 b->first_wait = to_wait(next);
Chris Wilsondbd6ef22016-08-09 17:47:52 +0100416 rcu_assign_pointer(b->irq_seqno_bh, b->first_wait->tsk);
Chris Wilson688e6c72016-07-01 17:23:15 +0100417 if (b->first_wait->seqno != wait->seqno)
418 __intel_breadcrumbs_enable_irq(b);
Chris Wilsondbd6ef22016-08-09 17:47:52 +0100419 wake_up_process(b->first_wait->tsk);
Chris Wilson688e6c72016-07-01 17:23:15 +0100420 } else {
421 b->first_wait = NULL;
Chris Wilsondbd6ef22016-08-09 17:47:52 +0100422 rcu_assign_pointer(b->irq_seqno_bh, NULL);
Chris Wilson688e6c72016-07-01 17:23:15 +0100423 __intel_breadcrumbs_disable_irq(b);
424 }
425 } else {
426 GEM_BUG_ON(rb_first(&b->waiters) == &wait->node);
427 }
428
429 GEM_BUG_ON(RB_EMPTY_NODE(&wait->node));
430 rb_erase(&wait->node, &b->waiters);
431
Chris Wilson9eb143b2017-02-23 07:44:16 +0000432out:
Chris Wilson688e6c72016-07-01 17:23:15 +0100433 GEM_BUG_ON(b->first_wait == wait);
434 GEM_BUG_ON(rb_first(&b->waiters) !=
435 (b->first_wait ? &b->first_wait->node : NULL));
Chris Wilsondbd6ef22016-08-09 17:47:52 +0100436 GEM_BUG_ON(!rcu_access_pointer(b->irq_seqno_bh) ^ RB_EMPTY_ROOT(&b->waiters));
Chris Wilson9eb143b2017-02-23 07:44:16 +0000437}
438
439void intel_engine_remove_wait(struct intel_engine_cs *engine,
440 struct intel_wait *wait)
441{
442 struct intel_breadcrumbs *b = &engine->breadcrumbs;
443
444 /* Quick check to see if this waiter was already decoupled from
445 * the tree by the bottom-half to avoid contention on the spinlock
446 * by the herd.
447 */
448 if (RB_EMPTY_NODE(&wait->node))
449 return;
450
451 spin_lock_irq(&b->lock);
452 __intel_engine_remove_wait(engine, wait);
Chris Wilsonf6168e32016-10-28 13:58:55 +0100453 spin_unlock_irq(&b->lock);
Chris Wilson688e6c72016-07-01 17:23:15 +0100454}
455
Chris Wilsonb3850852016-07-01 17:23:26 +0100456static bool signal_complete(struct drm_i915_gem_request *request)
Chris Wilsonc81d4612016-07-01 17:23:25 +0100457{
Chris Wilsonb3850852016-07-01 17:23:26 +0100458 if (!request)
Chris Wilsonc81d4612016-07-01 17:23:25 +0100459 return false;
460
461 /* If another process served as the bottom-half it may have already
462 * signalled that this wait is already completed.
463 */
Chris Wilsonb3850852016-07-01 17:23:26 +0100464 if (intel_wait_complete(&request->signaling.wait))
Chris Wilsonc81d4612016-07-01 17:23:25 +0100465 return true;
466
467 /* Carefully check if the request is complete, giving time for the
468 * seqno to be visible or if the GPU hung.
469 */
Chris Wilsonb3850852016-07-01 17:23:26 +0100470 if (__i915_request_irq_complete(request))
Chris Wilsonc81d4612016-07-01 17:23:25 +0100471 return true;
472
473 return false;
474}
475
Chris Wilsonb3850852016-07-01 17:23:26 +0100476static struct drm_i915_gem_request *to_signaler(struct rb_node *rb)
Chris Wilsonc81d4612016-07-01 17:23:25 +0100477{
Chris Wilsond8567862016-12-20 10:40:03 +0000478 return rb_entry(rb, struct drm_i915_gem_request, signaling.node);
Chris Wilsonc81d4612016-07-01 17:23:25 +0100479}
480
481static void signaler_set_rtpriority(void)
482{
483 struct sched_param param = { .sched_priority = 1 };
484
485 sched_setscheduler_nocheck(current, SCHED_FIFO, &param);
486}
487
488static int intel_breadcrumbs_signaler(void *arg)
489{
490 struct intel_engine_cs *engine = arg;
491 struct intel_breadcrumbs *b = &engine->breadcrumbs;
Chris Wilsonb3850852016-07-01 17:23:26 +0100492 struct drm_i915_gem_request *request;
Chris Wilsonc81d4612016-07-01 17:23:25 +0100493
494 /* Install ourselves with high priority to reduce signalling latency */
495 signaler_set_rtpriority();
496
497 do {
498 set_current_state(TASK_INTERRUPTIBLE);
499
500 /* We are either woken up by the interrupt bottom-half,
501 * or by a client adding a new signaller. In both cases,
502 * the GPU seqno may have advanced beyond our oldest signal.
503 * If it has, propagate the signal, remove the waiter and
504 * check again with the next oldest signal. Otherwise we
505 * need to wait for a new interrupt from the GPU or for
506 * a new client.
507 */
Chris Wilsoncced5e22017-02-23 07:44:15 +0000508 rcu_read_lock();
509 request = rcu_dereference(b->first_signal);
510 if (request)
511 request = i915_gem_request_get_rcu(request);
512 rcu_read_unlock();
Chris Wilsonb3850852016-07-01 17:23:26 +0100513 if (signal_complete(request)) {
Chris Wilson7c9e9342017-01-24 11:00:09 +0000514 local_bh_disable();
515 dma_fence_signal(&request->fence);
516 local_bh_enable(); /* kick start the tasklets */
517
Chris Wilson9eb143b2017-02-23 07:44:16 +0000518 spin_lock_irq(&b->lock);
519
Chris Wilsonc81d4612016-07-01 17:23:25 +0100520 /* Wake up all other completed waiters and select the
521 * next bottom-half for the next user interrupt.
522 */
Chris Wilson9eb143b2017-02-23 07:44:16 +0000523 __intel_engine_remove_wait(engine,
524 &request->signaling.wait);
Chris Wilson5590af32016-09-09 14:11:54 +0100525
Chris Wilsonc81d4612016-07-01 17:23:25 +0100526 /* Find the next oldest signal. Note that as we have
527 * not been holding the lock, another client may
528 * have installed an even older signal than the one
529 * we just completed - so double check we are still
530 * the oldest before picking the next one.
531 */
Chris Wilsoncced5e22017-02-23 07:44:15 +0000532 if (request == rcu_access_pointer(b->first_signal)) {
Chris Wilsonb3850852016-07-01 17:23:26 +0100533 struct rb_node *rb =
534 rb_next(&request->signaling.node);
Chris Wilsoncced5e22017-02-23 07:44:15 +0000535 rcu_assign_pointer(b->first_signal,
536 rb ? to_signaler(rb) : NULL);
Chris Wilsonb3850852016-07-01 17:23:26 +0100537 }
538 rb_erase(&request->signaling.node, &b->signals);
Chris Wilson9eb143b2017-02-23 07:44:16 +0000539 RB_CLEAR_NODE(&request->signaling.node);
540
Chris Wilsonf6168e32016-10-28 13:58:55 +0100541 spin_unlock_irq(&b->lock);
Chris Wilsonc81d4612016-07-01 17:23:25 +0100542
Chris Wilsone8a261e2016-07-20 13:31:49 +0100543 i915_gem_request_put(request);
Chris Wilsonc81d4612016-07-01 17:23:25 +0100544 } else {
Chris Wilsoncced5e22017-02-23 07:44:15 +0000545 if (kthread_should_stop()) {
546 GEM_BUG_ON(request);
Chris Wilsonc81d4612016-07-01 17:23:25 +0100547 break;
Chris Wilsoncced5e22017-02-23 07:44:15 +0000548 }
Chris Wilsonc81d4612016-07-01 17:23:25 +0100549
550 schedule();
Chris Wilsonfe3288b2017-02-12 17:20:01 +0000551
552 if (kthread_should_park())
553 kthread_parkme();
Chris Wilsonc81d4612016-07-01 17:23:25 +0100554 }
Chris Wilsoncced5e22017-02-23 07:44:15 +0000555 i915_gem_request_put(request);
Chris Wilsonc81d4612016-07-01 17:23:25 +0100556 } while (1);
557 __set_current_state(TASK_RUNNING);
558
559 return 0;
560}
561
Chris Wilsonb3850852016-07-01 17:23:26 +0100562void intel_engine_enable_signaling(struct drm_i915_gem_request *request)
Chris Wilsonc81d4612016-07-01 17:23:25 +0100563{
564 struct intel_engine_cs *engine = request->engine;
565 struct intel_breadcrumbs *b = &engine->breadcrumbs;
566 struct rb_node *parent, **p;
Chris Wilsonc81d4612016-07-01 17:23:25 +0100567 bool first, wakeup;
Chris Wilson754c9fd2017-02-23 07:44:14 +0000568 u32 seqno;
Chris Wilsonc81d4612016-07-01 17:23:25 +0100569
Chris Wilsonf6168e32016-10-28 13:58:55 +0100570 /* Note that we may be called from an interrupt handler on another
571 * device (e.g. nouveau signaling a fence completion causing us
572 * to submit a request, and so enable signaling). As such,
573 * we need to make sure that all other users of b->lock protect
574 * against interrupts, i.e. use spin_lock_irqsave.
575 */
576
577 /* locked by dma_fence_enable_sw_signaling() (irqsafe fence->lock) */
Chris Wilson4a50d202016-07-26 12:01:50 +0100578 assert_spin_locked(&request->lock);
Chris Wilson754c9fd2017-02-23 07:44:14 +0000579
580 seqno = i915_gem_request_global_seqno(request);
581 if (!seqno)
Chris Wilson65e47602016-10-28 13:58:49 +0100582 return;
Chris Wilsonc81d4612016-07-01 17:23:25 +0100583
Chris Wilsonb3850852016-07-01 17:23:26 +0100584 request->signaling.wait.tsk = b->signaler;
Chris Wilson754c9fd2017-02-23 07:44:14 +0000585 request->signaling.wait.seqno = seqno;
Chris Wilsone8a261e2016-07-20 13:31:49 +0100586 i915_gem_request_get(request);
Chris Wilsonc81d4612016-07-01 17:23:25 +0100587
Chris Wilson4a50d202016-07-26 12:01:50 +0100588 spin_lock(&b->lock);
589
Chris Wilsonc81d4612016-07-01 17:23:25 +0100590 /* First add ourselves into the list of waiters, but register our
591 * bottom-half as the signaller thread. As per usual, only the oldest
592 * waiter (not just signaller) is tasked as the bottom-half waking
593 * up all completed waiters after the user interrupt.
594 *
595 * If we are the oldest waiter, enable the irq (after which we
596 * must double check that the seqno did not complete).
597 */
Chris Wilsonb3850852016-07-01 17:23:26 +0100598 wakeup = __intel_engine_add_wait(engine, &request->signaling.wait);
Chris Wilsonc81d4612016-07-01 17:23:25 +0100599
600 /* Now insert ourselves into the retirement ordered list of signals
601 * on this engine. We track the oldest seqno as that will be the
602 * first signal to complete.
603 */
Chris Wilsonc81d4612016-07-01 17:23:25 +0100604 parent = NULL;
605 first = true;
606 p = &b->signals.rb_node;
607 while (*p) {
608 parent = *p;
Chris Wilson754c9fd2017-02-23 07:44:14 +0000609 if (i915_seqno_passed(seqno,
610 to_signaler(parent)->signaling.wait.seqno)) {
Chris Wilsonc81d4612016-07-01 17:23:25 +0100611 p = &parent->rb_right;
612 first = false;
613 } else {
614 p = &parent->rb_left;
615 }
616 }
Chris Wilsonb3850852016-07-01 17:23:26 +0100617 rb_link_node(&request->signaling.node, parent, p);
618 rb_insert_color(&request->signaling.node, &b->signals);
Chris Wilsonc81d4612016-07-01 17:23:25 +0100619 if (first)
Chris Wilsoncced5e22017-02-23 07:44:15 +0000620 rcu_assign_pointer(b->first_signal, request);
Chris Wilsonb3850852016-07-01 17:23:26 +0100621
Chris Wilsonc81d4612016-07-01 17:23:25 +0100622 spin_unlock(&b->lock);
623
624 if (wakeup)
625 wake_up_process(b->signaler);
Chris Wilsonc81d4612016-07-01 17:23:25 +0100626}
627
Chris Wilson9eb143b2017-02-23 07:44:16 +0000628void intel_engine_cancel_signaling(struct drm_i915_gem_request *request)
629{
630 struct intel_engine_cs *engine = request->engine;
631 struct intel_breadcrumbs *b = &engine->breadcrumbs;
632
633 assert_spin_locked(&request->lock);
634 GEM_BUG_ON(!request->signaling.wait.seqno);
635
636 spin_lock(&b->lock);
637
638 if (!RB_EMPTY_NODE(&request->signaling.node)) {
639 if (request == rcu_access_pointer(b->first_signal)) {
640 struct rb_node *rb =
641 rb_next(&request->signaling.node);
642 rcu_assign_pointer(b->first_signal,
643 rb ? to_signaler(rb) : NULL);
644 }
645 rb_erase(&request->signaling.node, &b->signals);
646 RB_CLEAR_NODE(&request->signaling.node);
647 i915_gem_request_put(request);
648 }
649
650 __intel_engine_remove_wait(engine, &request->signaling.wait);
651
652 spin_unlock(&b->lock);
653
654 request->signaling.wait.seqno = 0;
655}
656
Chris Wilson688e6c72016-07-01 17:23:15 +0100657int intel_engine_init_breadcrumbs(struct intel_engine_cs *engine)
658{
659 struct intel_breadcrumbs *b = &engine->breadcrumbs;
Chris Wilsonc81d4612016-07-01 17:23:25 +0100660 struct task_struct *tsk;
Chris Wilson688e6c72016-07-01 17:23:15 +0100661
662 spin_lock_init(&b->lock);
663 setup_timer(&b->fake_irq,
664 intel_breadcrumbs_fake_irq,
665 (unsigned long)engine);
Chris Wilson83348ba2016-08-09 17:47:51 +0100666 setup_timer(&b->hangcheck,
667 intel_breadcrumbs_hangcheck,
668 (unsigned long)engine);
Chris Wilson688e6c72016-07-01 17:23:15 +0100669
Chris Wilsonc81d4612016-07-01 17:23:25 +0100670 /* Spawn a thread to provide a common bottom-half for all signals.
671 * As this is an asynchronous interface we cannot steal the current
672 * task for handling the bottom-half to the user interrupt, therefore
673 * we create a thread to do the coherent seqno dance after the
674 * interrupt and then signal the waitqueue (via the dma-buf/fence).
675 */
676 tsk = kthread_run(intel_breadcrumbs_signaler, engine,
677 "i915/signal:%d", engine->id);
678 if (IS_ERR(tsk))
679 return PTR_ERR(tsk);
680
681 b->signaler = tsk;
682
Chris Wilson688e6c72016-07-01 17:23:15 +0100683 return 0;
684}
685
Chris Wilsonad07dfc2016-10-07 07:53:26 +0100686static void cancel_fake_irq(struct intel_engine_cs *engine)
687{
688 struct intel_breadcrumbs *b = &engine->breadcrumbs;
689
690 del_timer_sync(&b->hangcheck);
691 del_timer_sync(&b->fake_irq);
692 clear_bit(engine->id, &engine->i915->gpu_error.missed_irq_rings);
693}
694
695void intel_engine_reset_breadcrumbs(struct intel_engine_cs *engine)
696{
697 struct intel_breadcrumbs *b = &engine->breadcrumbs;
698
699 cancel_fake_irq(engine);
Chris Wilsonf6168e32016-10-28 13:58:55 +0100700 spin_lock_irq(&b->lock);
Chris Wilsonad07dfc2016-10-07 07:53:26 +0100701
702 __intel_breadcrumbs_disable_irq(b);
703 if (intel_engine_has_waiter(engine)) {
Chris Wilsonad07dfc2016-10-07 07:53:26 +0100704 __intel_breadcrumbs_enable_irq(b);
Chris Wilson538b2572017-01-24 15:18:05 +0000705 if (test_bit(ENGINE_IRQ_BREADCRUMB, &engine->irq_posted))
Chris Wilsonad07dfc2016-10-07 07:53:26 +0100706 wake_up_process(b->first_wait->tsk);
707 } else {
708 /* sanitize the IMR and unmask any auxiliary interrupts */
709 irq_disable(engine);
710 }
711
Chris Wilsonf6168e32016-10-28 13:58:55 +0100712 spin_unlock_irq(&b->lock);
Chris Wilsonad07dfc2016-10-07 07:53:26 +0100713}
714
Chris Wilson688e6c72016-07-01 17:23:15 +0100715void intel_engine_fini_breadcrumbs(struct intel_engine_cs *engine)
716{
717 struct intel_breadcrumbs *b = &engine->breadcrumbs;
718
Chris Wilson381744f2016-11-21 11:07:59 +0000719 /* The engines should be idle and all requests accounted for! */
720 WARN_ON(READ_ONCE(b->first_wait));
721 WARN_ON(!RB_EMPTY_ROOT(&b->waiters));
Chris Wilsoncced5e22017-02-23 07:44:15 +0000722 WARN_ON(rcu_access_pointer(b->first_signal));
Chris Wilson381744f2016-11-21 11:07:59 +0000723 WARN_ON(!RB_EMPTY_ROOT(&b->signals));
724
Chris Wilsonc81d4612016-07-01 17:23:25 +0100725 if (!IS_ERR_OR_NULL(b->signaler))
726 kthread_stop(b->signaler);
727
Chris Wilsonad07dfc2016-10-07 07:53:26 +0100728 cancel_fake_irq(engine);
Chris Wilson688e6c72016-07-01 17:23:15 +0100729}
730
Chris Wilson9b6586a2017-02-23 07:44:08 +0000731bool intel_breadcrumbs_busy(struct intel_engine_cs *engine)
Chris Wilsonc81d4612016-07-01 17:23:25 +0100732{
Chris Wilson9b6586a2017-02-23 07:44:08 +0000733 struct intel_breadcrumbs *b = &engine->breadcrumbs;
734 bool busy = false;
Chris Wilsonc81d4612016-07-01 17:23:25 +0100735
Chris Wilson9b6586a2017-02-23 07:44:08 +0000736 spin_lock_irq(&b->lock);
Chris Wilson6a5d1db2016-11-08 14:37:19 +0000737
Chris Wilson9b6586a2017-02-23 07:44:08 +0000738 if (b->first_wait) {
739 wake_up_process(b->first_wait->tsk);
740 busy |= intel_engine_flag(engine);
Chris Wilsonc81d4612016-07-01 17:23:25 +0100741 }
742
Chris Wilsoncced5e22017-02-23 07:44:15 +0000743 if (rcu_access_pointer(b->first_signal)) {
Chris Wilson9b6586a2017-02-23 07:44:08 +0000744 wake_up_process(b->signaler);
745 busy |= intel_engine_flag(engine);
746 }
747
748 spin_unlock_irq(&b->lock);
749
750 return busy;
Chris Wilsonc81d4612016-07-01 17:23:25 +0100751}
Chris Wilsonf97fbf92017-02-13 17:15:14 +0000752
753#if IS_ENABLED(CONFIG_DRM_I915_SELFTEST)
754#include "selftests/intel_breadcrumbs.c"
755#endif