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Dimitris Papastamos9fabe242011-09-19 14:34:00 +01001/*
2 * Register cache access API
3 *
4 * Copyright 2011 Wolfson Microelectronics plc
5 *
6 * Author: Dimitris Papastamos <dp@opensource.wolfsonmicro.com>
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11 */
12
13#include <linux/slab.h>
Paul Gortmaker1b6bc322011-05-27 07:12:15 -040014#include <linux/export.h>
Paul Gortmaker51990e82012-01-22 11:23:42 -050015#include <linux/device.h>
Dimitris Papastamos9fabe242011-09-19 14:34:00 +010016#include <trace/events/regmap.h>
Mark Brownf094fea2011-10-04 22:05:47 +010017#include <linux/bsearch.h>
Dimitris Papastamosc08604b2011-10-03 10:50:14 +010018#include <linux/sort.h>
Dimitris Papastamos9fabe242011-09-19 14:34:00 +010019
20#include "internal.h"
21
22static const struct regcache_ops *cache_types[] = {
Dimitris Papastamos28644c802011-09-19 14:34:02 +010023 &regcache_rbtree_ops,
Dimitris Papastamos2cbbb572011-09-19 14:34:03 +010024 &regcache_lzo_ops,
Dimitris Papastamos9fabe242011-09-19 14:34:00 +010025};
26
27static int regcache_hw_init(struct regmap *map)
28{
29 int i, j;
30 int ret;
31 int count;
32 unsigned int val;
33 void *tmp_buf;
34
35 if (!map->num_reg_defaults_raw)
36 return -EINVAL;
37
38 if (!map->reg_defaults_raw) {
Laxman Dewangandf00c792012-02-17 18:57:26 +053039 u32 cache_bypass = map->cache_bypass;
Dimitris Papastamos9fabe242011-09-19 14:34:00 +010040 dev_warn(map->dev, "No cache defaults, reading back from HW\n");
Laxman Dewangandf00c792012-02-17 18:57:26 +053041
42 /* Bypass the cache access till data read from HW*/
43 map->cache_bypass = 1;
Dimitris Papastamos9fabe242011-09-19 14:34:00 +010044 tmp_buf = kmalloc(map->cache_size_raw, GFP_KERNEL);
45 if (!tmp_buf)
46 return -EINVAL;
47 ret = regmap_bulk_read(map, 0, tmp_buf,
48 map->num_reg_defaults_raw);
Laxman Dewangandf00c792012-02-17 18:57:26 +053049 map->cache_bypass = cache_bypass;
Dimitris Papastamos9fabe242011-09-19 14:34:00 +010050 if (ret < 0) {
51 kfree(tmp_buf);
52 return ret;
53 }
54 map->reg_defaults_raw = tmp_buf;
55 map->cache_free = 1;
56 }
57
58 /* calculate the size of reg_defaults */
59 for (count = 0, i = 0; i < map->num_reg_defaults_raw; i++) {
60 val = regcache_get_val(map->reg_defaults_raw,
61 i, map->cache_word_size);
Lars-Peter Clausen61cddc52012-02-15 10:23:25 +010062 if (regmap_volatile(map, i))
Dimitris Papastamos9fabe242011-09-19 14:34:00 +010063 continue;
64 count++;
65 }
66
67 map->reg_defaults = kmalloc(count * sizeof(struct reg_default),
68 GFP_KERNEL);
Lars-Peter Clausen021cd612011-11-14 10:40:16 +010069 if (!map->reg_defaults) {
70 ret = -ENOMEM;
71 goto err_free;
72 }
Dimitris Papastamos9fabe242011-09-19 14:34:00 +010073
74 /* fill the reg_defaults */
75 map->num_reg_defaults = count;
76 for (i = 0, j = 0; i < map->num_reg_defaults_raw; i++) {
77 val = regcache_get_val(map->reg_defaults_raw,
78 i, map->cache_word_size);
Lars-Peter Clausen61cddc52012-02-15 10:23:25 +010079 if (regmap_volatile(map, i))
Dimitris Papastamos9fabe242011-09-19 14:34:00 +010080 continue;
81 map->reg_defaults[j].reg = i;
82 map->reg_defaults[j].def = val;
83 j++;
84 }
85
86 return 0;
Lars-Peter Clausen021cd612011-11-14 10:40:16 +010087
88err_free:
89 if (map->cache_free)
90 kfree(map->reg_defaults_raw);
91
92 return ret;
Dimitris Papastamos9fabe242011-09-19 14:34:00 +010093}
94
Lars-Peter Clausene5e3b8a2011-11-16 16:28:16 +010095int regcache_init(struct regmap *map, const struct regmap_config *config)
Dimitris Papastamos9fabe242011-09-19 14:34:00 +010096{
97 int ret;
98 int i;
99 void *tmp_buf;
100
Mark Browne7a6db32011-09-19 16:08:03 +0100101 if (map->cache_type == REGCACHE_NONE) {
102 map->cache_bypass = true;
Dimitris Papastamos9fabe242011-09-19 14:34:00 +0100103 return 0;
Mark Browne7a6db32011-09-19 16:08:03 +0100104 }
Dimitris Papastamos9fabe242011-09-19 14:34:00 +0100105
106 for (i = 0; i < ARRAY_SIZE(cache_types); i++)
107 if (cache_types[i]->type == map->cache_type)
108 break;
109
110 if (i == ARRAY_SIZE(cache_types)) {
111 dev_err(map->dev, "Could not match compress type: %d\n",
112 map->cache_type);
113 return -EINVAL;
114 }
115
Lars-Peter Clausene5e3b8a2011-11-16 16:28:16 +0100116 map->num_reg_defaults = config->num_reg_defaults;
117 map->num_reg_defaults_raw = config->num_reg_defaults_raw;
118 map->reg_defaults_raw = config->reg_defaults_raw;
Lars-Peter Clausen064d4db2011-11-16 20:34:03 +0100119 map->cache_word_size = DIV_ROUND_UP(config->val_bits, 8);
120 map->cache_size_raw = map->cache_word_size * config->num_reg_defaults_raw;
Lars-Peter Clausene5e3b8a2011-11-16 16:28:16 +0100121
Dimitris Papastamos9fabe242011-09-19 14:34:00 +0100122 map->cache = NULL;
123 map->cache_ops = cache_types[i];
124
125 if (!map->cache_ops->read ||
126 !map->cache_ops->write ||
127 !map->cache_ops->name)
128 return -EINVAL;
129
130 /* We still need to ensure that the reg_defaults
131 * won't vanish from under us. We'll need to make
132 * a copy of it.
133 */
Lars-Peter Clausen720e4612011-11-16 16:28:17 +0100134 if (config->reg_defaults) {
Dimitris Papastamos9fabe242011-09-19 14:34:00 +0100135 if (!map->num_reg_defaults)
136 return -EINVAL;
Lars-Peter Clausen720e4612011-11-16 16:28:17 +0100137 tmp_buf = kmemdup(config->reg_defaults, map->num_reg_defaults *
Dimitris Papastamos9fabe242011-09-19 14:34:00 +0100138 sizeof(struct reg_default), GFP_KERNEL);
139 if (!tmp_buf)
140 return -ENOMEM;
141 map->reg_defaults = tmp_buf;
Mark Brown8528bdd2011-10-09 13:13:58 +0100142 } else if (map->num_reg_defaults_raw) {
Mark Brown5fcd2562011-09-29 15:24:54 +0100143 /* Some devices such as PMICs don't have cache defaults,
Dimitris Papastamos9fabe242011-09-19 14:34:00 +0100144 * we cope with this by reading back the HW registers and
145 * crafting the cache defaults by hand.
146 */
147 ret = regcache_hw_init(map);
148 if (ret < 0)
149 return ret;
150 }
151
152 if (!map->max_register)
153 map->max_register = map->num_reg_defaults_raw;
154
155 if (map->cache_ops->init) {
156 dev_dbg(map->dev, "Initializing %s cache\n",
157 map->cache_ops->name);
Lars-Peter Clausenbd061c72011-11-14 10:40:17 +0100158 ret = map->cache_ops->init(map);
159 if (ret)
160 goto err_free;
Dimitris Papastamos9fabe242011-09-19 14:34:00 +0100161 }
162 return 0;
Lars-Peter Clausenbd061c72011-11-14 10:40:17 +0100163
164err_free:
165 kfree(map->reg_defaults);
166 if (map->cache_free)
167 kfree(map->reg_defaults_raw);
168
169 return ret;
Dimitris Papastamos9fabe242011-09-19 14:34:00 +0100170}
171
172void regcache_exit(struct regmap *map)
173{
174 if (map->cache_type == REGCACHE_NONE)
175 return;
176
177 BUG_ON(!map->cache_ops);
178
179 kfree(map->reg_defaults);
180 if (map->cache_free)
181 kfree(map->reg_defaults_raw);
182
183 if (map->cache_ops->exit) {
184 dev_dbg(map->dev, "Destroying %s cache\n",
185 map->cache_ops->name);
186 map->cache_ops->exit(map);
187 }
188}
189
190/**
191 * regcache_read: Fetch the value of a given register from the cache.
192 *
193 * @map: map to configure.
194 * @reg: The register index.
195 * @value: The value to be returned.
196 *
197 * Return a negative value on failure, 0 on success.
198 */
199int regcache_read(struct regmap *map,
200 unsigned int reg, unsigned int *value)
201{
Mark Brownbc7ee552011-11-30 14:27:08 +0000202 int ret;
203
Dimitris Papastamos9fabe242011-09-19 14:34:00 +0100204 if (map->cache_type == REGCACHE_NONE)
205 return -ENOSYS;
206
207 BUG_ON(!map->cache_ops);
208
Mark Brownbc7ee552011-11-30 14:27:08 +0000209 if (!regmap_volatile(map, reg)) {
210 ret = map->cache_ops->read(map, reg, value);
211
212 if (ret == 0)
213 trace_regmap_reg_read_cache(map->dev, reg, *value);
214
215 return ret;
216 }
Dimitris Papastamos9fabe242011-09-19 14:34:00 +0100217
218 return -EINVAL;
219}
Dimitris Papastamos9fabe242011-09-19 14:34:00 +0100220
221/**
222 * regcache_write: Set the value of a given register in the cache.
223 *
224 * @map: map to configure.
225 * @reg: The register index.
226 * @value: The new register value.
227 *
228 * Return a negative value on failure, 0 on success.
229 */
230int regcache_write(struct regmap *map,
231 unsigned int reg, unsigned int value)
232{
233 if (map->cache_type == REGCACHE_NONE)
234 return 0;
235
236 BUG_ON(!map->cache_ops);
237
238 if (!regmap_writeable(map, reg))
239 return -EIO;
240
241 if (!regmap_volatile(map, reg))
242 return map->cache_ops->write(map, reg, value);
243
244 return 0;
245}
Dimitris Papastamos9fabe242011-09-19 14:34:00 +0100246
247/**
248 * regcache_sync: Sync the register cache with the hardware.
249 *
250 * @map: map to configure.
251 *
252 * Any registers that should not be synced should be marked as
253 * volatile. In general drivers can choose not to use the provided
254 * syncing functionality if they so require.
255 *
256 * Return a negative value on failure, 0 on success.
257 */
258int regcache_sync(struct regmap *map)
259{
Dimitris Papastamos954757d2011-09-27 11:25:06 +0100260 int ret = 0;
Dimitris Papastamos954757d2011-09-27 11:25:06 +0100261 unsigned int i;
Dimitris Papastamos59360082011-09-19 14:34:04 +0100262 const char *name;
Dimitris Papastamosbeb1a102011-09-29 14:36:26 +0100263 unsigned int bypass;
Dimitris Papastamos59360082011-09-19 14:34:04 +0100264
Mark Brownc3ec2322012-02-23 20:48:40 +0000265 BUG_ON(!map->cache_ops || !map->cache_ops->sync);
Dimitris Papastamos9fabe242011-09-19 14:34:00 +0100266
Dimitris Papastamos13753a92011-09-29 14:36:25 +0100267 mutex_lock(&map->lock);
Dimitris Papastamosbeb1a102011-09-29 14:36:26 +0100268 /* Remember the initial bypass state */
269 bypass = map->cache_bypass;
Dimitris Papastamos954757d2011-09-27 11:25:06 +0100270 dev_dbg(map->dev, "Syncing %s cache\n",
271 map->cache_ops->name);
272 name = map->cache_ops->name;
273 trace_regcache_sync(map->dev, name, "start");
Mark Brown22f0d902012-01-21 12:01:14 +0000274
Mark Brown8ae0d7e2011-10-26 10:34:22 +0200275 if (!map->cache_dirty)
276 goto out;
Mark Brownd9db7622012-01-25 21:06:33 +0000277
Mark Brown22f0d902012-01-21 12:01:14 +0000278 /* Apply any patch first */
Mark Brown8a892d62012-01-25 21:05:48 +0000279 map->cache_bypass = 1;
Mark Brown22f0d902012-01-21 12:01:14 +0000280 for (i = 0; i < map->patch_regs; i++) {
281 ret = _regmap_write(map, map->patch[i].reg, map->patch[i].def);
282 if (ret != 0) {
283 dev_err(map->dev, "Failed to write %x = %x: %d\n",
284 map->patch[i].reg, map->patch[i].def, ret);
285 goto out;
286 }
287 }
Mark Brown8a892d62012-01-25 21:05:48 +0000288 map->cache_bypass = 0;
Mark Brown22f0d902012-01-21 12:01:14 +0000289
Mark Brownac8d91c2012-02-23 19:31:04 +0000290 ret = map->cache_ops->sync(map, 0, map->max_register);
Dimitris Papastamos954757d2011-09-27 11:25:06 +0100291
Mark Brown6ff73732012-02-23 22:05:59 +0000292 if (ret == 0)
293 map->cache_dirty = false;
294
Dimitris Papastamos954757d2011-09-27 11:25:06 +0100295out:
296 trace_regcache_sync(map->dev, name, "stop");
Dimitris Papastamosbeb1a102011-09-29 14:36:26 +0100297 /* Restore the bypass state */
298 map->cache_bypass = bypass;
Dimitris Papastamos13753a92011-09-29 14:36:25 +0100299 mutex_unlock(&map->lock);
Dimitris Papastamos954757d2011-09-27 11:25:06 +0100300
301 return ret;
Dimitris Papastamos9fabe242011-09-19 14:34:00 +0100302}
303EXPORT_SYMBOL_GPL(regcache_sync);
304
Mark Brown92afb282011-09-19 18:22:14 +0100305/**
Mark Brown4d4cfd12012-02-23 20:53:37 +0000306 * regcache_sync_region: Sync part of the register cache with the hardware.
307 *
308 * @map: map to sync.
309 * @min: first register to sync
310 * @max: last register to sync
311 *
312 * Write all non-default register values in the specified region to
313 * the hardware.
314 *
315 * Return a negative value on failure, 0 on success.
316 */
317int regcache_sync_region(struct regmap *map, unsigned int min,
318 unsigned int max)
319{
320 int ret = 0;
321 const char *name;
322 unsigned int bypass;
323
324 BUG_ON(!map->cache_ops || !map->cache_ops->sync);
325
326 mutex_lock(&map->lock);
327
328 /* Remember the initial bypass state */
329 bypass = map->cache_bypass;
330
331 name = map->cache_ops->name;
332 dev_dbg(map->dev, "Syncing %s cache from %d-%d\n", name, min, max);
333
334 trace_regcache_sync(map->dev, name, "start region");
335
336 if (!map->cache_dirty)
337 goto out;
338
339 ret = map->cache_ops->sync(map, min, max);
340
341out:
342 trace_regcache_sync(map->dev, name, "stop region");
343 /* Restore the bypass state */
344 map->cache_bypass = bypass;
345 mutex_unlock(&map->lock);
346
347 return ret;
348}
349
350/**
Mark Brown92afb282011-09-19 18:22:14 +0100351 * regcache_cache_only: Put a register map into cache only mode
352 *
353 * @map: map to configure
354 * @cache_only: flag if changes should be written to the hardware
355 *
356 * When a register map is marked as cache only writes to the register
357 * map API will only update the register cache, they will not cause
358 * any hardware changes. This is useful for allowing portions of
359 * drivers to act as though the device were functioning as normal when
360 * it is disabled for power saving reasons.
361 */
362void regcache_cache_only(struct regmap *map, bool enable)
363{
Mark Brown2cd148f2011-09-29 10:40:55 +0100364 mutex_lock(&map->lock);
Dimitris Papastamosac77a762011-09-29 14:36:28 +0100365 WARN_ON(map->cache_bypass && enable);
Mark Brown92afb282011-09-19 18:22:14 +0100366 map->cache_only = enable;
Mark Brown5d5b7d42012-02-23 22:02:57 +0000367 trace_regmap_cache_only(map->dev, enable);
Mark Brown2cd148f2011-09-29 10:40:55 +0100368 mutex_unlock(&map->lock);
Mark Brown92afb282011-09-19 18:22:14 +0100369}
370EXPORT_SYMBOL_GPL(regcache_cache_only);
371
Dimitris Papastamos6eb0f5e2011-09-29 14:36:27 +0100372/**
Mark Brown8ae0d7e2011-10-26 10:34:22 +0200373 * regcache_mark_dirty: Mark the register cache as dirty
374 *
375 * @map: map to mark
376 *
377 * Mark the register cache as dirty, for example due to the device
378 * having been powered down for suspend. If the cache is not marked
379 * as dirty then the cache sync will be suppressed.
380 */
381void regcache_mark_dirty(struct regmap *map)
382{
383 mutex_lock(&map->lock);
384 map->cache_dirty = true;
385 mutex_unlock(&map->lock);
386}
387EXPORT_SYMBOL_GPL(regcache_mark_dirty);
388
389/**
Dimitris Papastamos6eb0f5e2011-09-29 14:36:27 +0100390 * regcache_cache_bypass: Put a register map into cache bypass mode
391 *
392 * @map: map to configure
Dimitris Papastamos0eef6b02011-10-03 06:54:16 +0100393 * @cache_bypass: flag if changes should not be written to the hardware
Dimitris Papastamos6eb0f5e2011-09-29 14:36:27 +0100394 *
395 * When a register map is marked with the cache bypass option, writes
396 * to the register map API will only update the hardware and not the
397 * the cache directly. This is useful when syncing the cache back to
398 * the hardware.
399 */
400void regcache_cache_bypass(struct regmap *map, bool enable)
401{
402 mutex_lock(&map->lock);
Dimitris Papastamosac77a762011-09-29 14:36:28 +0100403 WARN_ON(map->cache_only && enable);
Dimitris Papastamos6eb0f5e2011-09-29 14:36:27 +0100404 map->cache_bypass = enable;
Mark Brown5d5b7d42012-02-23 22:02:57 +0000405 trace_regmap_cache_bypass(map->dev, enable);
Dimitris Papastamos6eb0f5e2011-09-29 14:36:27 +0100406 mutex_unlock(&map->lock);
407}
408EXPORT_SYMBOL_GPL(regcache_cache_bypass);
409
Dimitris Papastamos9fabe242011-09-19 14:34:00 +0100410bool regcache_set_val(void *base, unsigned int idx,
411 unsigned int val, unsigned int word_size)
412{
413 switch (word_size) {
414 case 1: {
415 u8 *cache = base;
416 if (cache[idx] == val)
417 return true;
418 cache[idx] = val;
419 break;
420 }
421 case 2: {
422 u16 *cache = base;
423 if (cache[idx] == val)
424 return true;
425 cache[idx] = val;
426 break;
427 }
Mark Brown7d5e5252012-02-17 15:58:25 -0800428 case 4: {
429 u32 *cache = base;
430 if (cache[idx] == val)
431 return true;
432 cache[idx] = val;
433 break;
434 }
Dimitris Papastamos9fabe242011-09-19 14:34:00 +0100435 default:
436 BUG();
437 }
Dimitris Papastamos9fabe242011-09-19 14:34:00 +0100438 return false;
439}
440
441unsigned int regcache_get_val(const void *base, unsigned int idx,
442 unsigned int word_size)
443{
444 if (!base)
445 return -EINVAL;
446
447 switch (word_size) {
448 case 1: {
449 const u8 *cache = base;
450 return cache[idx];
451 }
452 case 2: {
453 const u16 *cache = base;
454 return cache[idx];
455 }
Mark Brown7d5e5252012-02-17 15:58:25 -0800456 case 4: {
457 const u32 *cache = base;
458 return cache[idx];
459 }
Dimitris Papastamos9fabe242011-09-19 14:34:00 +0100460 default:
461 BUG();
462 }
463 /* unreachable */
464 return -1;
465}
466
Mark Brownf094fea2011-10-04 22:05:47 +0100467static int regcache_default_cmp(const void *a, const void *b)
Dimitris Papastamosc08604b2011-10-03 10:50:14 +0100468{
469 const struct reg_default *_a = a;
470 const struct reg_default *_b = b;
471
472 return _a->reg - _b->reg;
473}
474
Mark Brownf094fea2011-10-04 22:05:47 +0100475int regcache_lookup_reg(struct regmap *map, unsigned int reg)
476{
477 struct reg_default key;
478 struct reg_default *r;
479
480 key.reg = reg;
481 key.def = 0;
482
483 r = bsearch(&key, map->reg_defaults, map->num_reg_defaults,
484 sizeof(struct reg_default), regcache_default_cmp);
485
486 if (r)
487 return r - map->reg_defaults;
488 else
Mark Brown6e6ace02011-10-09 13:23:31 +0100489 return -ENOENT;
Mark Brownf094fea2011-10-04 22:05:47 +0100490}