blob: d754ddc496d04ff1a7e095cc0227c6f0ad315b31 [file] [log] [blame]
Thiemo Seufere30ec452008-01-28 20:05:38 +00001/*
2 * This file is subject to the terms and conditions of the GNU General Public
3 * License. See the file "COPYING" in the main directory of this archive
4 * for more details.
5 *
Ralf Baechle70342282013-01-22 12:59:30 +01006 * Copyright (C) 2004, 2005, 2006, 2008 Thiemo Seufer
Thiemo Seufere30ec452008-01-28 20:05:38 +00007 * Copyright (C) 2005 Maciej W. Rozycki
8 * Copyright (C) 2006 Ralf Baechle (ralf@linux-mips.org)
Steven J. Hillabc597f2013-02-05 16:52:01 -06009 * Copyright (C) 2012, 2013 MIPS Technologies, Inc. All rights reserved.
Thiemo Seufere30ec452008-01-28 20:05:38 +000010 */
11
12#include <linux/types.h>
13
David Daney22b07632010-07-23 18:41:43 -070014#ifdef CONFIG_EXPORT_UASM
Paul Gortmakerbaab01b2012-02-28 19:24:48 -050015#include <linux/export.h>
David Daney22b07632010-07-23 18:41:43 -070016#define UASM_EXPORT_SYMBOL(sym) EXPORT_SYMBOL(sym)
17#else
David Daney22b07632010-07-23 18:41:43 -070018#define UASM_EXPORT_SYMBOL(sym)
19#endif
20
Steven J. Hillabc597f2013-02-05 16:52:01 -060021#define _UASM_ISA_CLASSIC 0
Steven J. Hilla6a48342013-02-05 16:52:02 -060022#define _UASM_ISA_MICROMIPS 1
Steven J. Hillabc597f2013-02-05 16:52:01 -060023
24#ifndef UASM_ISA
Steven J. Hillcf6d9052013-03-25 12:03:41 -050025#ifdef CONFIG_CPU_MICROMIPS
26#define UASM_ISA _UASM_ISA_MICROMIPS
27#else
Steven J. Hillabc597f2013-02-05 16:52:01 -060028#define UASM_ISA _UASM_ISA_CLASSIC
29#endif
Steven J. Hillcf6d9052013-03-25 12:03:41 -050030#endif
Steven J. Hillabc597f2013-02-05 16:52:01 -060031
32#if (UASM_ISA == _UASM_ISA_CLASSIC)
Steven J. Hillcf6d9052013-03-25 12:03:41 -050033#ifdef CONFIG_CPU_MICROMIPS
34#define ISAOPC(op) CL_uasm_i##op
35#define ISAFUNC(x) CL_##x
36#else
Steven J. Hillabc597f2013-02-05 16:52:01 -060037#define ISAOPC(op) uasm_i##op
38#define ISAFUNC(x) x
Steven J. Hillcf6d9052013-03-25 12:03:41 -050039#endif
Steven J. Hilla6a48342013-02-05 16:52:02 -060040#elif (UASM_ISA == _UASM_ISA_MICROMIPS)
Steven J. Hillcf6d9052013-03-25 12:03:41 -050041#ifdef CONFIG_CPU_MICROMIPS
42#define ISAOPC(op) uasm_i##op
43#define ISAFUNC(x) x
44#else
Steven J. Hilla6a48342013-02-05 16:52:02 -060045#define ISAOPC(op) MM_uasm_i##op
46#define ISAFUNC(x) MM_##x
Steven J. Hillcf6d9052013-03-25 12:03:41 -050047#endif
Steven J. Hillabc597f2013-02-05 16:52:01 -060048#else
49#error Unsupported micro-assembler ISA!!!
50#endif
51
Thiemo Seufere30ec452008-01-28 20:05:38 +000052#define Ip_u1u2u3(op) \
Paul Gortmaker078a55f2013-06-18 13:38:59 +000053void ISAOPC(op)(u32 **buf, unsigned int a, unsigned int b, unsigned int c)
Thiemo Seufere30ec452008-01-28 20:05:38 +000054
55#define Ip_u2u1u3(op) \
Paul Gortmaker078a55f2013-06-18 13:38:59 +000056void ISAOPC(op)(u32 **buf, unsigned int a, unsigned int b, unsigned int c)
Thiemo Seufere30ec452008-01-28 20:05:38 +000057
Markos Chandrasbeef8e02014-04-08 12:47:02 +010058#define Ip_u3u2u1(op) \
59void ISAOPC(op)(u32 **buf, unsigned int a, unsigned int b, unsigned int c)
60
Thiemo Seufere30ec452008-01-28 20:05:38 +000061#define Ip_u3u1u2(op) \
Paul Gortmaker078a55f2013-06-18 13:38:59 +000062void ISAOPC(op)(u32 **buf, unsigned int a, unsigned int b, unsigned int c)
Thiemo Seufere30ec452008-01-28 20:05:38 +000063
64#define Ip_u1u2s3(op) \
Paul Gortmaker078a55f2013-06-18 13:38:59 +000065void ISAOPC(op)(u32 **buf, unsigned int a, unsigned int b, signed int c)
Thiemo Seufere30ec452008-01-28 20:05:38 +000066
67#define Ip_u2s3u1(op) \
Paul Gortmaker078a55f2013-06-18 13:38:59 +000068void ISAOPC(op)(u32 **buf, unsigned int a, signed int b, unsigned int c)
Thiemo Seufere30ec452008-01-28 20:05:38 +000069
70#define Ip_u2u1s3(op) \
Paul Gortmaker078a55f2013-06-18 13:38:59 +000071void ISAOPC(op)(u32 **buf, unsigned int a, unsigned int b, signed int c)
Thiemo Seufere30ec452008-01-28 20:05:38 +000072
David Daney92078e02009-10-14 12:16:55 -070073#define Ip_u2u1msbu3(op) \
Paul Gortmaker078a55f2013-06-18 13:38:59 +000074void ISAOPC(op)(u32 **buf, unsigned int a, unsigned int b, unsigned int c, \
David Daney92078e02009-10-14 12:16:55 -070075 unsigned int d)
76
Thiemo Seufere30ec452008-01-28 20:05:38 +000077#define Ip_u1u2(op) \
Paul Gortmaker078a55f2013-06-18 13:38:59 +000078void ISAOPC(op)(u32 **buf, unsigned int a, unsigned int b)
Thiemo Seufere30ec452008-01-28 20:05:38 +000079
Paul Burton49e9529b2014-03-16 12:58:05 +000080#define Ip_u2u1(op) \
81void ISAOPC(op)(u32 **buf, unsigned int a, unsigned int b)
82
Thiemo Seufere30ec452008-01-28 20:05:38 +000083#define Ip_u1s2(op) \
Paul Gortmaker078a55f2013-06-18 13:38:59 +000084void ISAOPC(op)(u32 **buf, unsigned int a, signed int b)
Thiemo Seufere30ec452008-01-28 20:05:38 +000085
Paul Gortmaker078a55f2013-06-18 13:38:59 +000086#define Ip_u1(op) void ISAOPC(op)(u32 **buf, unsigned int a)
Thiemo Seufere30ec452008-01-28 20:05:38 +000087
Paul Gortmaker078a55f2013-06-18 13:38:59 +000088#define Ip_0(op) void ISAOPC(op)(u32 **buf)
Thiemo Seufere30ec452008-01-28 20:05:38 +000089
90Ip_u2u1s3(_addiu);
91Ip_u3u1u2(_addu);
Thiemo Seufere30ec452008-01-28 20:05:38 +000092Ip_u3u1u2(_and);
Steven J. Hill71a1c772012-06-19 19:59:29 +010093Ip_u2u1u3(_andi);
94Ip_u1u2s3(_bbit0);
95Ip_u1u2s3(_bbit1);
Thiemo Seufere30ec452008-01-28 20:05:38 +000096Ip_u1u2s3(_beq);
97Ip_u1u2s3(_beql);
98Ip_u1s2(_bgez);
99Ip_u1s2(_bgezl);
100Ip_u1s2(_bltz);
101Ip_u1s2(_bltzl);
102Ip_u1u2s3(_bne);
Thiemo Seuferfb2a27e72008-02-18 19:32:49 +0000103Ip_u2s3u1(_cache);
Thiemo Seufere30ec452008-01-28 20:05:38 +0000104Ip_u2u1s3(_daddiu);
105Ip_u3u1u2(_daddu);
Steven J. Hill71a1c772012-06-19 19:59:29 +0100106Ip_u2u1msbu3(_dins);
107Ip_u2u1msbu3(_dinsm);
Markos Chandras4c12a852014-04-08 12:47:06 +0100108Ip_u1u2(_divu);
Steven J. Hill71a1c772012-06-19 19:59:29 +0100109Ip_u1u2u3(_dmfc0);
110Ip_u1u2u3(_dmtc0);
111Ip_u2u1u3(_drotr);
112Ip_u2u1u3(_drotr32);
Thiemo Seufere30ec452008-01-28 20:05:38 +0000113Ip_u2u1u3(_dsll);
114Ip_u2u1u3(_dsll32);
115Ip_u2u1u3(_dsra);
116Ip_u2u1u3(_dsrl);
117Ip_u2u1u3(_dsrl32);
118Ip_u3u1u2(_dsubu);
119Ip_0(_eret);
Steven J. Hille6de1a02012-07-12 17:21:31 +0000120Ip_u2u1msbu3(_ext);
121Ip_u2u1msbu3(_ins);
Thiemo Seufere30ec452008-01-28 20:05:38 +0000122Ip_u1(_j);
123Ip_u1(_jal);
Paul Burton49e9529b2014-03-16 12:58:05 +0000124Ip_u2u1(_jalr);
Thiemo Seufere30ec452008-01-28 20:05:38 +0000125Ip_u1(_jr);
126Ip_u2s3u1(_ld);
Steven J. Hill71a1c772012-06-19 19:59:29 +0100127Ip_u3u1u2(_ldx);
Thiemo Seufere30ec452008-01-28 20:05:38 +0000128Ip_u2s3u1(_ll);
129Ip_u2s3u1(_lld);
130Ip_u1s2(_lui);
131Ip_u2s3u1(_lw);
Steven J. Hill71a1c772012-06-19 19:59:29 +0100132Ip_u3u1u2(_lwx);
Thiemo Seufere30ec452008-01-28 20:05:38 +0000133Ip_u1u2u3(_mfc0);
Markos Chandrasf3ec7a22014-04-08 12:47:07 +0100134Ip_u1(_mfhi);
Thiemo Seufere30ec452008-01-28 20:05:38 +0000135Ip_u1u2u3(_mtc0);
Ralf Baechle58081842010-03-23 15:54:50 +0100136Ip_u3u1u2(_or);
Steven J. Hill71a1c772012-06-19 19:59:29 +0100137Ip_u2u1u3(_ori);
Thiemo Seuferfb2a27e72008-02-18 19:32:49 +0000138Ip_u2s3u1(_pref);
Thiemo Seufere30ec452008-01-28 20:05:38 +0000139Ip_0(_rfe);
Steven J. Hill71a1c772012-06-19 19:59:29 +0100140Ip_u2u1u3(_rotr);
Thiemo Seufere30ec452008-01-28 20:05:38 +0000141Ip_u2s3u1(_sc);
142Ip_u2s3u1(_scd);
143Ip_u2s3u1(_sd);
144Ip_u2u1u3(_sll);
Markos Chandrasbef581b2014-04-08 12:47:04 +0100145Ip_u3u2u1(_sllv);
Markos Chandras390363e2014-04-08 12:47:09 +0100146Ip_u2u1s3(_sltiu);
Markos Chandrase8ef8682014-04-08 12:47:10 +0100147Ip_u3u1u2(_sltu);
Thiemo Seufere30ec452008-01-28 20:05:38 +0000148Ip_u2u1u3(_sra);
149Ip_u2u1u3(_srl);
Markos Chandrasf31318f2014-04-08 12:47:05 +0100150Ip_u3u2u1(_srlv);
Thiemo Seufere30ec452008-01-28 20:05:38 +0000151Ip_u3u1u2(_subu);
152Ip_u2s3u1(_sw);
Paul Burton729ff562013-12-24 03:49:45 +0000153Ip_u1(_sync);
Steven J. Hill71a1c772012-06-19 19:59:29 +0100154Ip_u1(_syscall);
Thiemo Seufere30ec452008-01-28 20:05:38 +0000155Ip_0(_tlbp);
David Daney32546f32010-02-10 15:12:46 -0800156Ip_0(_tlbr);
Thiemo Seufere30ec452008-01-28 20:05:38 +0000157Ip_0(_tlbwi);
158Ip_0(_tlbwr);
Paul Burton53ed1382013-12-24 03:50:35 +0000159Ip_u1(_wait);
Markos Chandrasab9e4fa2014-04-08 12:47:11 +0100160Ip_u2u1(_wsbh);
Thiemo Seufere30ec452008-01-28 20:05:38 +0000161Ip_u3u1u2(_xor);
162Ip_u2u1u3(_xori);
Paul Burtond674dd12014-03-04 15:12:36 +0000163Ip_u2u1(_yield);
Steven J. Hill71a1c772012-06-19 19:59:29 +0100164
Thiemo Seufere30ec452008-01-28 20:05:38 +0000165
166/* Handle labels. */
167struct uasm_label {
168 u32 *addr;
169 int lab;
170};
171
Paul Gortmaker078a55f2013-06-18 13:38:59 +0000172void ISAFUNC(uasm_build_label)(struct uasm_label **lab, u32 *addr,
Steven J. Hillabc597f2013-02-05 16:52:01 -0600173 int lid);
Thiemo Seufere30ec452008-01-28 20:05:38 +0000174#ifdef CONFIG_64BIT
Steven J. Hillabc597f2013-02-05 16:52:01 -0600175int ISAFUNC(uasm_in_compat_space_p)(long addr);
Thiemo Seufere30ec452008-01-28 20:05:38 +0000176#endif
Steven J. Hillabc597f2013-02-05 16:52:01 -0600177int ISAFUNC(uasm_rel_hi)(long val);
178int ISAFUNC(uasm_rel_lo)(long val);
179void ISAFUNC(UASM_i_LA_mostly)(u32 **buf, unsigned int rs, long addr);
180void ISAFUNC(UASM_i_LA)(u32 **buf, unsigned int rs, long addr);
Thiemo Seufere30ec452008-01-28 20:05:38 +0000181
182#define UASM_L_LA(lb) \
Paul Gortmaker078a55f2013-06-18 13:38:59 +0000183static inline void ISAFUNC(uasm_l##lb)(struct uasm_label **lab, u32 *addr) \
Thiemo Seufere30ec452008-01-28 20:05:38 +0000184{ \
Steven J. Hillcf6d9052013-03-25 12:03:41 -0500185 ISAFUNC(uasm_build_label)(lab, addr, label##lb); \
Thiemo Seufere30ec452008-01-28 20:05:38 +0000186}
187
188/* convenience macros for instructions */
189#ifdef CONFIG_64BIT
Steven J. Hill71a1c772012-06-19 19:59:29 +0100190# define UASM_i_ADDIU(buf, rs, rt, val) uasm_i_daddiu(buf, rs, rt, val)
191# define UASM_i_ADDU(buf, rs, rt, rd) uasm_i_daddu(buf, rs, rt, rd)
192# define UASM_i_LL(buf, rs, rt, off) uasm_i_lld(buf, rs, rt, off)
Thiemo Seufere30ec452008-01-28 20:05:38 +0000193# define UASM_i_LW(buf, rs, rt, off) uasm_i_ld(buf, rs, rt, off)
Steven J. Hill71a1c772012-06-19 19:59:29 +0100194# define UASM_i_LWX(buf, rs, rt, rd) uasm_i_ldx(buf, rs, rt, rd)
195# define UASM_i_MFC0(buf, rt, rd...) uasm_i_dmfc0(buf, rt, rd)
196# define UASM_i_MTC0(buf, rt, rd...) uasm_i_dmtc0(buf, rt, rd)
197# define UASM_i_ROTR(buf, rs, rt, sh) uasm_i_drotr(buf, rs, rt, sh)
198# define UASM_i_SC(buf, rs, rt, off) uasm_i_scd(buf, rs, rt, off)
Thiemo Seufere30ec452008-01-28 20:05:38 +0000199# define UASM_i_SLL(buf, rs, rt, sh) uasm_i_dsll(buf, rs, rt, sh)
200# define UASM_i_SRA(buf, rs, rt, sh) uasm_i_dsra(buf, rs, rt, sh)
201# define UASM_i_SRL(buf, rs, rt, sh) uasm_i_dsrl(buf, rs, rt, sh)
David Daneyf0daaaf2011-07-05 16:34:45 -0700202# define UASM_i_SRL_SAFE(buf, rs, rt, sh) uasm_i_dsrl_safe(buf, rs, rt, sh)
Thiemo Seufere30ec452008-01-28 20:05:38 +0000203# define UASM_i_SUBU(buf, rs, rt, rd) uasm_i_dsubu(buf, rs, rt, rd)
Steven J. Hill71a1c772012-06-19 19:59:29 +0100204# define UASM_i_SW(buf, rs, rt, off) uasm_i_sd(buf, rs, rt, off)
Thiemo Seufere30ec452008-01-28 20:05:38 +0000205#else
Steven J. Hill71a1c772012-06-19 19:59:29 +0100206# define UASM_i_ADDIU(buf, rs, rt, val) uasm_i_addiu(buf, rs, rt, val)
207# define UASM_i_ADDU(buf, rs, rt, rd) uasm_i_addu(buf, rs, rt, rd)
208# define UASM_i_LL(buf, rs, rt, off) uasm_i_ll(buf, rs, rt, off)
Thiemo Seufere30ec452008-01-28 20:05:38 +0000209# define UASM_i_LW(buf, rs, rt, off) uasm_i_lw(buf, rs, rt, off)
Steven J. Hill71a1c772012-06-19 19:59:29 +0100210# define UASM_i_LWX(buf, rs, rt, rd) uasm_i_lwx(buf, rs, rt, rd)
211# define UASM_i_MFC0(buf, rt, rd...) uasm_i_mfc0(buf, rt, rd)
212# define UASM_i_MTC0(buf, rt, rd...) uasm_i_mtc0(buf, rt, rd)
213# define UASM_i_ROTR(buf, rs, rt, sh) uasm_i_rotr(buf, rs, rt, sh)
214# define UASM_i_SC(buf, rs, rt, off) uasm_i_sc(buf, rs, rt, off)
Thiemo Seufere30ec452008-01-28 20:05:38 +0000215# define UASM_i_SLL(buf, rs, rt, sh) uasm_i_sll(buf, rs, rt, sh)
216# define UASM_i_SRA(buf, rs, rt, sh) uasm_i_sra(buf, rs, rt, sh)
217# define UASM_i_SRL(buf, rs, rt, sh) uasm_i_srl(buf, rs, rt, sh)
David Daneyf0daaaf2011-07-05 16:34:45 -0700218# define UASM_i_SRL_SAFE(buf, rs, rt, sh) uasm_i_srl(buf, rs, rt, sh)
Thiemo Seufere30ec452008-01-28 20:05:38 +0000219# define UASM_i_SUBU(buf, rs, rt, rd) uasm_i_subu(buf, rs, rt, rd)
Steven J. Hill71a1c772012-06-19 19:59:29 +0100220# define UASM_i_SW(buf, rs, rt, off) uasm_i_sw(buf, rs, rt, off)
Thiemo Seufere30ec452008-01-28 20:05:38 +0000221#endif
222
223#define uasm_i_b(buf, off) uasm_i_beq(buf, 0, 0, off)
224#define uasm_i_beqz(buf, rs, off) uasm_i_beq(buf, rs, 0, off)
225#define uasm_i_beqzl(buf, rs, off) uasm_i_beql(buf, rs, 0, off)
226#define uasm_i_bnez(buf, rs, off) uasm_i_bne(buf, rs, 0, off)
227#define uasm_i_bnezl(buf, rs, off) uasm_i_bnel(buf, rs, 0, off)
Steven J. Hill71a1c772012-06-19 19:59:29 +0100228#define uasm_i_ehb(buf) uasm_i_sll(buf, 0, 0, 3)
Thiemo Seufere30ec452008-01-28 20:05:38 +0000229#define uasm_i_move(buf, a, b) UASM_i_ADDU(buf, a, 0, b)
230#define uasm_i_nop(buf) uasm_i_sll(buf, 0, 0, 0)
231#define uasm_i_ssnop(buf) uasm_i_sll(buf, 0, 0, 1)
David Daney26b9e542010-04-28 12:16:16 -0700232
David Daneyde6d5b552010-07-23 18:41:41 -0700233static inline void uasm_i_drotr_safe(u32 **p, unsigned int a1,
234 unsigned int a2, unsigned int a3)
235{
236 if (a3 < 32)
Steven J. Hillabc597f2013-02-05 16:52:01 -0600237 ISAOPC(_drotr)(p, a1, a2, a3);
David Daneyde6d5b552010-07-23 18:41:41 -0700238 else
Steven J. Hillabc597f2013-02-05 16:52:01 -0600239 ISAOPC(_drotr32)(p, a1, a2, a3 - 32);
David Daneyde6d5b552010-07-23 18:41:41 -0700240}
241
David Daney26b9e542010-04-28 12:16:16 -0700242static inline void uasm_i_dsll_safe(u32 **p, unsigned int a1,
243 unsigned int a2, unsigned int a3)
244{
245 if (a3 < 32)
Steven J. Hillabc597f2013-02-05 16:52:01 -0600246 ISAOPC(_dsll)(p, a1, a2, a3);
David Daney26b9e542010-04-28 12:16:16 -0700247 else
Steven J. Hillabc597f2013-02-05 16:52:01 -0600248 ISAOPC(_dsll32)(p, a1, a2, a3 - 32);
David Daney26b9e542010-04-28 12:16:16 -0700249}
250
Steven J. Hill71a1c772012-06-19 19:59:29 +0100251static inline void uasm_i_dsrl_safe(u32 **p, unsigned int a1,
252 unsigned int a2, unsigned int a3)
253{
254 if (a3 < 32)
Steven J. Hillabc597f2013-02-05 16:52:01 -0600255 ISAOPC(_dsrl)(p, a1, a2, a3);
Steven J. Hill71a1c772012-06-19 19:59:29 +0100256 else
Steven J. Hillabc597f2013-02-05 16:52:01 -0600257 ISAOPC(_dsrl32)(p, a1, a2, a3 - 32);
Steven J. Hill71a1c772012-06-19 19:59:29 +0100258}
259
Thiemo Seufere30ec452008-01-28 20:05:38 +0000260/* Handle relocations. */
261struct uasm_reloc {
262 u32 *addr;
263 unsigned int type;
264 int lab;
265};
266
267/* This is zero so we can use zeroed label arrays. */
268#define UASM_LABEL_INVALID 0
269
Ralf Baechle234fcd12008-03-08 09:56:28 +0000270void uasm_r_mips_pc16(struct uasm_reloc **rel, u32 *addr, int lid);
271void uasm_resolve_relocs(struct uasm_reloc *rel, struct uasm_label *lab);
272void uasm_move_relocs(struct uasm_reloc *rel, u32 *first, u32 *end, long off);
273void uasm_move_labels(struct uasm_label *lab, u32 *first, u32 *end, long off);
274void uasm_copy_handler(struct uasm_reloc *rel, struct uasm_label *lab,
275 u32 *first, u32 *end, u32 *target);
276int uasm_insn_has_bdelay(struct uasm_reloc *rel, u32 *addr);
Thiemo Seufere30ec452008-01-28 20:05:38 +0000277
278/* Convenience functions for labeled branches. */
Ralf Baechle234fcd12008-03-08 09:56:28 +0000279void uasm_il_b(u32 **p, struct uasm_reloc **r, int lid);
David Daney5b97c3f2010-07-23 18:41:42 -0700280void uasm_il_bbit0(u32 **p, struct uasm_reloc **r, unsigned int reg,
281 unsigned int bit, int lid);
282void uasm_il_bbit1(u32 **p, struct uasm_reloc **r, unsigned int reg,
283 unsigned int bit, int lid);
Paul Burton8dee5902013-12-24 03:51:39 +0000284void uasm_il_beq(u32 **p, struct uasm_reloc **r, unsigned int r1,
285 unsigned int r2, int lid);
Steven J. Hill71a1c772012-06-19 19:59:29 +0100286void uasm_il_beqz(u32 **p, struct uasm_reloc **r, unsigned int reg, int lid);
287void uasm_il_beqzl(u32 **p, struct uasm_reloc **r, unsigned int reg, int lid);
288void uasm_il_bgezl(u32 **p, struct uasm_reloc **r, unsigned int reg, int lid);
289void uasm_il_bgez(u32 **p, struct uasm_reloc **r, unsigned int reg, int lid);
290void uasm_il_bltz(u32 **p, struct uasm_reloc **r, unsigned int reg, int lid);
291void uasm_il_bne(u32 **p, struct uasm_reloc **r, unsigned int reg1,
292 unsigned int reg2, int lid);
293void uasm_il_bnez(u32 **p, struct uasm_reloc **r, unsigned int reg, int lid);