David Brownell | e58b9e2 | 2008-02-04 22:28:25 -0800 | [diff] [blame] | 1 | /* |
| 2 | * mcp23s08.c - SPI gpio expander driver |
| 3 | */ |
| 4 | |
| 5 | #include <linux/kernel.h> |
| 6 | #include <linux/device.h> |
| 7 | #include <linux/workqueue.h> |
| 8 | #include <linux/mutex.h> |
| 9 | |
| 10 | #include <linux/spi/spi.h> |
| 11 | #include <linux/spi/mcp23s08.h> |
| 12 | |
| 13 | #include <asm/gpio.h> |
| 14 | |
| 15 | |
| 16 | /* Registers are all 8 bits wide. |
| 17 | * |
| 18 | * The mcp23s17 has twice as many bits, and can be configured to work |
| 19 | * with either 16 bit registers or with two adjacent 8 bit banks. |
| 20 | * |
| 21 | * Also, there are I2C versions of both chips. |
| 22 | */ |
| 23 | #define MCP_IODIR 0x00 /* init/reset: all ones */ |
| 24 | #define MCP_IPOL 0x01 |
| 25 | #define MCP_GPINTEN 0x02 |
| 26 | #define MCP_DEFVAL 0x03 |
| 27 | #define MCP_INTCON 0x04 |
| 28 | #define MCP_IOCON 0x05 |
| 29 | # define IOCON_SEQOP (1 << 5) |
| 30 | # define IOCON_HAEN (1 << 3) |
| 31 | # define IOCON_ODR (1 << 2) |
| 32 | # define IOCON_INTPOL (1 << 1) |
| 33 | #define MCP_GPPU 0x06 |
| 34 | #define MCP_INTF 0x07 |
| 35 | #define MCP_INTCAP 0x08 |
| 36 | #define MCP_GPIO 0x09 |
| 37 | #define MCP_OLAT 0x0a |
| 38 | |
| 39 | struct mcp23s08 { |
| 40 | struct spi_device *spi; |
| 41 | u8 addr; |
| 42 | |
| 43 | /* lock protects the cached values */ |
| 44 | struct mutex lock; |
| 45 | u8 cache[11]; |
| 46 | |
| 47 | struct gpio_chip chip; |
| 48 | |
| 49 | struct work_struct work; |
| 50 | }; |
| 51 | |
| 52 | static int mcp23s08_read(struct mcp23s08 *mcp, unsigned reg) |
| 53 | { |
| 54 | u8 tx[2], rx[1]; |
| 55 | int status; |
| 56 | |
| 57 | tx[0] = mcp->addr | 0x01; |
| 58 | tx[1] = reg; |
| 59 | status = spi_write_then_read(mcp->spi, tx, sizeof tx, rx, sizeof rx); |
| 60 | return (status < 0) ? status : rx[0]; |
| 61 | } |
| 62 | |
| 63 | static int mcp23s08_write(struct mcp23s08 *mcp, unsigned reg, u8 val) |
| 64 | { |
| 65 | u8 tx[3]; |
| 66 | |
| 67 | tx[0] = mcp->addr; |
| 68 | tx[1] = reg; |
| 69 | tx[2] = val; |
| 70 | return spi_write_then_read(mcp->spi, tx, sizeof tx, NULL, 0); |
| 71 | } |
| 72 | |
| 73 | static int |
| 74 | mcp23s08_read_regs(struct mcp23s08 *mcp, unsigned reg, u8 *vals, unsigned n) |
| 75 | { |
| 76 | u8 tx[2]; |
| 77 | |
| 78 | if ((n + reg) > sizeof mcp->cache) |
| 79 | return -EINVAL; |
| 80 | tx[0] = mcp->addr | 0x01; |
| 81 | tx[1] = reg; |
| 82 | return spi_write_then_read(mcp->spi, tx, sizeof tx, vals, n); |
| 83 | } |
| 84 | |
| 85 | /*----------------------------------------------------------------------*/ |
| 86 | |
| 87 | static int mcp23s08_direction_input(struct gpio_chip *chip, unsigned offset) |
| 88 | { |
| 89 | struct mcp23s08 *mcp = container_of(chip, struct mcp23s08, chip); |
| 90 | int status; |
| 91 | |
| 92 | mutex_lock(&mcp->lock); |
| 93 | mcp->cache[MCP_IODIR] |= (1 << offset); |
| 94 | status = mcp23s08_write(mcp, MCP_IODIR, mcp->cache[MCP_IODIR]); |
| 95 | mutex_unlock(&mcp->lock); |
| 96 | return status; |
| 97 | } |
| 98 | |
| 99 | static int mcp23s08_get(struct gpio_chip *chip, unsigned offset) |
| 100 | { |
| 101 | struct mcp23s08 *mcp = container_of(chip, struct mcp23s08, chip); |
| 102 | int status; |
| 103 | |
| 104 | mutex_lock(&mcp->lock); |
| 105 | |
| 106 | /* REVISIT reading this clears any IRQ ... */ |
| 107 | status = mcp23s08_read(mcp, MCP_GPIO); |
| 108 | if (status < 0) |
| 109 | status = 0; |
| 110 | else { |
| 111 | mcp->cache[MCP_GPIO] = status; |
| 112 | status = !!(status & (1 << offset)); |
| 113 | } |
| 114 | mutex_unlock(&mcp->lock); |
| 115 | return status; |
| 116 | } |
| 117 | |
| 118 | static int __mcp23s08_set(struct mcp23s08 *mcp, unsigned mask, int value) |
| 119 | { |
| 120 | u8 olat = mcp->cache[MCP_OLAT]; |
| 121 | |
| 122 | if (value) |
| 123 | olat |= mask; |
| 124 | else |
| 125 | olat &= ~mask; |
| 126 | mcp->cache[MCP_OLAT] = olat; |
| 127 | return mcp23s08_write(mcp, MCP_OLAT, olat); |
| 128 | } |
| 129 | |
| 130 | static void mcp23s08_set(struct gpio_chip *chip, unsigned offset, int value) |
| 131 | { |
| 132 | struct mcp23s08 *mcp = container_of(chip, struct mcp23s08, chip); |
| 133 | u8 mask = 1 << offset; |
| 134 | |
| 135 | mutex_lock(&mcp->lock); |
| 136 | __mcp23s08_set(mcp, mask, value); |
| 137 | mutex_unlock(&mcp->lock); |
| 138 | } |
| 139 | |
| 140 | static int |
| 141 | mcp23s08_direction_output(struct gpio_chip *chip, unsigned offset, int value) |
| 142 | { |
| 143 | struct mcp23s08 *mcp = container_of(chip, struct mcp23s08, chip); |
| 144 | u8 mask = 1 << offset; |
| 145 | int status; |
| 146 | |
| 147 | mutex_lock(&mcp->lock); |
| 148 | status = __mcp23s08_set(mcp, mask, value); |
| 149 | if (status == 0) { |
| 150 | mcp->cache[MCP_IODIR] &= ~mask; |
| 151 | status = mcp23s08_write(mcp, MCP_IODIR, mcp->cache[MCP_IODIR]); |
| 152 | } |
| 153 | mutex_unlock(&mcp->lock); |
| 154 | return status; |
| 155 | } |
| 156 | |
| 157 | /*----------------------------------------------------------------------*/ |
| 158 | |
| 159 | #ifdef CONFIG_DEBUG_FS |
| 160 | |
| 161 | #include <linux/seq_file.h> |
| 162 | |
| 163 | /* |
| 164 | * This shows more info than the generic gpio dump code: |
| 165 | * pullups, deglitching, open drain drive. |
| 166 | */ |
| 167 | static void mcp23s08_dbg_show(struct seq_file *s, struct gpio_chip *chip) |
| 168 | { |
| 169 | struct mcp23s08 *mcp; |
| 170 | char bank; |
Roel Kluin | 1d1c1d9 | 2008-05-23 13:04:43 -0700 | [diff] [blame] | 171 | int t; |
David Brownell | e58b9e2 | 2008-02-04 22:28:25 -0800 | [diff] [blame] | 172 | unsigned mask; |
| 173 | |
| 174 | mcp = container_of(chip, struct mcp23s08, chip); |
| 175 | |
| 176 | /* NOTE: we only handle one bank for now ... */ |
| 177 | bank = '0' + ((mcp->addr >> 1) & 0x3); |
| 178 | |
| 179 | mutex_lock(&mcp->lock); |
| 180 | t = mcp23s08_read_regs(mcp, 0, mcp->cache, sizeof mcp->cache); |
| 181 | if (t < 0) { |
| 182 | seq_printf(s, " I/O ERROR %d\n", t); |
| 183 | goto done; |
| 184 | } |
| 185 | |
| 186 | for (t = 0, mask = 1; t < 8; t++, mask <<= 1) { |
| 187 | const char *label; |
| 188 | |
| 189 | label = gpiochip_is_requested(chip, t); |
| 190 | if (!label) |
| 191 | continue; |
| 192 | |
| 193 | seq_printf(s, " gpio-%-3d P%c.%d (%-12s) %s %s %s", |
| 194 | chip->base + t, bank, t, label, |
| 195 | (mcp->cache[MCP_IODIR] & mask) ? "in " : "out", |
| 196 | (mcp->cache[MCP_GPIO] & mask) ? "hi" : "lo", |
| 197 | (mcp->cache[MCP_GPPU] & mask) ? " " : "up"); |
| 198 | /* NOTE: ignoring the irq-related registers */ |
| 199 | seq_printf(s, "\n"); |
| 200 | } |
| 201 | done: |
| 202 | mutex_unlock(&mcp->lock); |
| 203 | } |
| 204 | |
| 205 | #else |
| 206 | #define mcp23s08_dbg_show NULL |
| 207 | #endif |
| 208 | |
| 209 | /*----------------------------------------------------------------------*/ |
| 210 | |
| 211 | static int mcp23s08_probe(struct spi_device *spi) |
| 212 | { |
| 213 | struct mcp23s08 *mcp; |
| 214 | struct mcp23s08_platform_data *pdata; |
| 215 | int status; |
| 216 | int do_update = 0; |
| 217 | |
| 218 | pdata = spi->dev.platform_data; |
| 219 | if (!pdata || pdata->slave > 3 || !pdata->base) |
| 220 | return -ENODEV; |
| 221 | |
| 222 | mcp = kzalloc(sizeof *mcp, GFP_KERNEL); |
| 223 | if (!mcp) |
| 224 | return -ENOMEM; |
| 225 | |
| 226 | mutex_init(&mcp->lock); |
| 227 | |
| 228 | mcp->spi = spi; |
| 229 | mcp->addr = 0x40 | (pdata->slave << 1); |
| 230 | |
| 231 | mcp->chip.label = "mcp23s08", |
| 232 | |
| 233 | mcp->chip.direction_input = mcp23s08_direction_input; |
| 234 | mcp->chip.get = mcp23s08_get; |
| 235 | mcp->chip.direction_output = mcp23s08_direction_output; |
| 236 | mcp->chip.set = mcp23s08_set; |
| 237 | mcp->chip.dbg_show = mcp23s08_dbg_show; |
| 238 | |
| 239 | mcp->chip.base = pdata->base; |
| 240 | mcp->chip.ngpio = 8; |
| 241 | mcp->chip.can_sleep = 1; |
David Brownell | d8f388d8 | 2008-07-25 01:46:07 -0700 | [diff] [blame^] | 242 | mcp->chip.dev = &spi->dev; |
Guennadi Liakhovetski | d72cbed | 2008-04-28 02:14:45 -0700 | [diff] [blame] | 243 | mcp->chip.owner = THIS_MODULE; |
David Brownell | e58b9e2 | 2008-02-04 22:28:25 -0800 | [diff] [blame] | 244 | |
| 245 | spi_set_drvdata(spi, mcp); |
| 246 | |
| 247 | /* verify MCP_IOCON.SEQOP = 0, so sequential reads work */ |
| 248 | status = mcp23s08_read(mcp, MCP_IOCON); |
| 249 | if (status < 0) |
| 250 | goto fail; |
| 251 | if (status & IOCON_SEQOP) { |
| 252 | status &= ~IOCON_SEQOP; |
| 253 | status = mcp23s08_write(mcp, MCP_IOCON, (u8) status); |
| 254 | if (status < 0) |
| 255 | goto fail; |
| 256 | } |
| 257 | |
| 258 | /* configure ~100K pullups */ |
| 259 | status = mcp23s08_write(mcp, MCP_GPPU, pdata->pullups); |
| 260 | if (status < 0) |
| 261 | goto fail; |
| 262 | |
| 263 | status = mcp23s08_read_regs(mcp, 0, mcp->cache, sizeof mcp->cache); |
| 264 | if (status < 0) |
| 265 | goto fail; |
| 266 | |
| 267 | /* disable inverter on input */ |
| 268 | if (mcp->cache[MCP_IPOL] != 0) { |
| 269 | mcp->cache[MCP_IPOL] = 0; |
| 270 | do_update = 1; |
| 271 | } |
| 272 | |
| 273 | /* disable irqs */ |
| 274 | if (mcp->cache[MCP_GPINTEN] != 0) { |
| 275 | mcp->cache[MCP_GPINTEN] = 0; |
| 276 | do_update = 1; |
| 277 | } |
| 278 | |
| 279 | if (do_update) { |
| 280 | u8 tx[4]; |
| 281 | |
| 282 | tx[0] = mcp->addr; |
| 283 | tx[1] = MCP_IPOL; |
| 284 | memcpy(&tx[2], &mcp->cache[MCP_IPOL], sizeof(tx) - 2); |
| 285 | status = spi_write_then_read(mcp->spi, tx, sizeof tx, NULL, 0); |
| 286 | |
| 287 | /* FIXME check status... */ |
| 288 | } |
| 289 | |
| 290 | status = gpiochip_add(&mcp->chip); |
| 291 | |
| 292 | /* NOTE: these chips have a relatively sane IRQ framework, with |
| 293 | * per-signal masking and level/edge triggering. It's not yet |
| 294 | * handled here... |
| 295 | */ |
| 296 | |
| 297 | if (pdata->setup) { |
| 298 | status = pdata->setup(spi, mcp->chip.base, |
| 299 | mcp->chip.ngpio, pdata->context); |
| 300 | if (status < 0) |
| 301 | dev_dbg(&spi->dev, "setup --> %d\n", status); |
| 302 | } |
| 303 | |
| 304 | return 0; |
| 305 | |
| 306 | fail: |
| 307 | kfree(mcp); |
| 308 | return status; |
| 309 | } |
| 310 | |
| 311 | static int mcp23s08_remove(struct spi_device *spi) |
| 312 | { |
| 313 | struct mcp23s08 *mcp = spi_get_drvdata(spi); |
| 314 | struct mcp23s08_platform_data *pdata = spi->dev.platform_data; |
| 315 | int status = 0; |
| 316 | |
| 317 | if (pdata->teardown) { |
| 318 | status = pdata->teardown(spi, |
| 319 | mcp->chip.base, mcp->chip.ngpio, |
| 320 | pdata->context); |
| 321 | if (status < 0) { |
| 322 | dev_err(&spi->dev, "%s --> %d\n", "teardown", status); |
| 323 | return status; |
| 324 | } |
| 325 | } |
| 326 | |
| 327 | status = gpiochip_remove(&mcp->chip); |
| 328 | if (status == 0) |
| 329 | kfree(mcp); |
| 330 | else |
| 331 | dev_err(&spi->dev, "%s --> %d\n", "remove", status); |
| 332 | return status; |
| 333 | } |
| 334 | |
| 335 | static struct spi_driver mcp23s08_driver = { |
| 336 | .probe = mcp23s08_probe, |
| 337 | .remove = mcp23s08_remove, |
| 338 | .driver = { |
| 339 | .name = "mcp23s08", |
| 340 | .owner = THIS_MODULE, |
| 341 | }, |
| 342 | }; |
| 343 | |
| 344 | /*----------------------------------------------------------------------*/ |
| 345 | |
| 346 | static int __init mcp23s08_init(void) |
| 347 | { |
| 348 | return spi_register_driver(&mcp23s08_driver); |
| 349 | } |
| 350 | module_init(mcp23s08_init); |
| 351 | |
| 352 | static void __exit mcp23s08_exit(void) |
| 353 | { |
| 354 | spi_unregister_driver(&mcp23s08_driver); |
| 355 | } |
| 356 | module_exit(mcp23s08_exit); |
| 357 | |
| 358 | MODULE_LICENSE("GPL"); |
| 359 | |