Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1 | /* cpudata.h: Per-cpu parameters. |
| 2 | * |
David S. Miller | 56fb4df | 2006-02-26 23:24:22 -0800 | [diff] [blame] | 3 | * Copyright (C) 2003, 2005, 2006 David S. Miller (davem@davemloft.net) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 4 | */ |
| 5 | |
| 6 | #ifndef _SPARC64_CPUDATA_H |
| 7 | #define _SPARC64_CPUDATA_H |
| 8 | |
David S. Miller | 56fb4df | 2006-02-26 23:24:22 -0800 | [diff] [blame] | 9 | #ifndef __ASSEMBLY__ |
| 10 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 11 | #include <linux/percpu.h> |
David S. Miller | 56fb4df | 2006-02-26 23:24:22 -0800 | [diff] [blame] | 12 | #include <linux/threads.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 13 | |
| 14 | typedef struct { |
| 15 | /* Dcache line 1 */ |
David S. Miller | d7ce78f | 2005-08-29 22:46:43 -0700 | [diff] [blame] | 16 | unsigned int __softirq_pending; /* must be 1st, see rtrap.S */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 17 | unsigned int multiplier; |
| 18 | unsigned int counter; |
| 19 | unsigned int idle_volume; |
| 20 | unsigned long clock_tick; /* %tick's per second */ |
| 21 | unsigned long udelay_val; |
| 22 | |
David S. Miller | 3c93646 | 2006-01-31 18:30:27 -0800 | [diff] [blame] | 23 | /* Dcache line 2, rarely used */ |
David S. Miller | 80dc0d6 | 2005-09-26 00:32:17 -0700 | [diff] [blame] | 24 | unsigned int dcache_size; |
| 25 | unsigned int dcache_line_size; |
| 26 | unsigned int icache_size; |
| 27 | unsigned int icache_line_size; |
| 28 | unsigned int ecache_size; |
| 29 | unsigned int ecache_line_size; |
David S. Miller | 80dc0d6 | 2005-09-26 00:32:17 -0700 | [diff] [blame] | 30 | unsigned int __pad3; |
David S. Miller | 05e28f9 | 2006-01-31 18:30:13 -0800 | [diff] [blame] | 31 | unsigned int __pad4; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 32 | } cpuinfo_sparc; |
| 33 | |
| 34 | DECLARE_PER_CPU(cpuinfo_sparc, __cpu_data); |
| 35 | #define cpu_data(__cpu) per_cpu(__cpu_data, (__cpu)) |
| 36 | #define local_cpu_data() __get_cpu_var(__cpu_data) |
| 37 | |
David S. Miller | 56fb4df | 2006-02-26 23:24:22 -0800 | [diff] [blame] | 38 | /* Trap handling code needs to get at a few critical values upon |
| 39 | * trap entry and to process TSB misses. These cannot be in the |
| 40 | * per_cpu() area as we really need to lock them into the TLB and |
| 41 | * thus make them part of the main kernel image. As a result we |
| 42 | * try to make this as small as possible. |
| 43 | * |
| 44 | * This is padded out and aligned to 64-bytes to avoid false sharing |
| 45 | * on SMP. |
| 46 | */ |
| 47 | |
| 48 | /* If you modify the size of this structure, please update |
| 49 | * TRAP_BLOCK_SZ_SHIFT below. |
| 50 | */ |
| 51 | struct thread_info; |
| 52 | struct trap_per_cpu { |
| 53 | /* D-cache line 1 */ |
| 54 | struct thread_info *thread; |
| 55 | unsigned long pgd_paddr; |
| 56 | unsigned long __pad1[2]; |
| 57 | |
| 58 | /* D-cache line 2 */ |
| 59 | unsigned long __pad2[4]; |
| 60 | } __attribute__((aligned(64))); |
| 61 | extern struct trap_per_cpu trap_block[NR_CPUS]; |
| 62 | extern void init_cur_cpu_trap(void); |
David S. Miller | a8b900d | 2006-01-31 18:33:37 -0800 | [diff] [blame] | 63 | extern void setup_tba(void); |
David S. Miller | 56fb4df | 2006-02-26 23:24:22 -0800 | [diff] [blame] | 64 | |
David S. Miller | 92704a1 | 2006-02-26 23:27:19 -0800 | [diff] [blame] | 65 | #ifdef CONFIG_SMP |
| 66 | struct cpuid_patch_entry { |
| 67 | unsigned int addr; |
| 68 | unsigned int cheetah_safari[4]; |
| 69 | unsigned int cheetah_jbus[4]; |
| 70 | unsigned int starfire[4]; |
David S. Miller | d96b815 | 2006-02-04 15:40:53 -0800 | [diff] [blame^] | 71 | unsigned int sun4v[4]; |
David S. Miller | 92704a1 | 2006-02-26 23:27:19 -0800 | [diff] [blame] | 72 | }; |
| 73 | extern struct cpuid_patch_entry __cpuid_patch, __cpuid_patch_end; |
| 74 | #endif |
| 75 | |
David S. Miller | 56fb4df | 2006-02-26 23:24:22 -0800 | [diff] [blame] | 76 | #endif /* !(__ASSEMBLY__) */ |
| 77 | |
| 78 | #define TRAP_PER_CPU_THREAD 0x00 |
| 79 | #define TRAP_PER_CPU_PGD_PADDR 0x08 |
| 80 | |
| 81 | #define TRAP_BLOCK_SZ_SHIFT 6 |
| 82 | |
David S. Miller | d96b815 | 2006-02-04 15:40:53 -0800 | [diff] [blame^] | 83 | #include <asm/scratchpad.h> |
| 84 | |
David S. Miller | 92704a1 | 2006-02-26 23:27:19 -0800 | [diff] [blame] | 85 | #ifdef CONFIG_SMP |
| 86 | |
| 87 | #define __GET_CPUID(REG) \ |
| 88 | /* Spitfire implementation (default). */ \ |
| 89 | 661: ldxa [%g0] ASI_UPA_CONFIG, REG; \ |
| 90 | srlx REG, 17, REG; \ |
| 91 | and REG, 0x1f, REG; \ |
| 92 | nop; \ |
| 93 | .section .cpuid_patch, "ax"; \ |
| 94 | /* Instruction location. */ \ |
| 95 | .word 661b; \ |
| 96 | /* Cheetah Safari implementation. */ \ |
| 97 | ldxa [%g0] ASI_SAFARI_CONFIG, REG; \ |
| 98 | srlx REG, 17, REG; \ |
| 99 | and REG, 0x3ff, REG; \ |
| 100 | nop; \ |
| 101 | /* Cheetah JBUS implementation. */ \ |
| 102 | ldxa [%g0] ASI_JBUS_CONFIG, REG; \ |
| 103 | srlx REG, 17, REG; \ |
| 104 | and REG, 0x1f, REG; \ |
| 105 | nop; \ |
| 106 | /* Starfire implementation. */ \ |
| 107 | sethi %hi(0x1fff40000d0 >> 9), REG; \ |
| 108 | sllx REG, 9, REG; \ |
| 109 | or REG, 0xd0, REG; \ |
| 110 | lduwa [REG] ASI_PHYS_BYPASS_EC_E, REG;\ |
David S. Miller | d96b815 | 2006-02-04 15:40:53 -0800 | [diff] [blame^] | 111 | /* sun4v implementation. */ \ |
| 112 | mov SCRATCHPAD_CPUID, REG; \ |
| 113 | nop; \ |
| 114 | ldxa [REG] ASI_SCRATCHPAD, REG; \ |
| 115 | nop; \ |
David S. Miller | 92704a1 | 2006-02-26 23:27:19 -0800 | [diff] [blame] | 116 | .previous; |
David S. Miller | 56fb4df | 2006-02-26 23:24:22 -0800 | [diff] [blame] | 117 | |
David S. Miller | ffe483d | 2006-02-02 21:55:10 -0800 | [diff] [blame] | 118 | /* Clobbers TMP, current address space PGD phys address into DEST. */ |
| 119 | #define TRAP_LOAD_PGD_PHYS(DEST, TMP) \ |
| 120 | __GET_CPUID(TMP) \ |
| 121 | sethi %hi(trap_block), DEST; \ |
| 122 | sllx TMP, TRAP_BLOCK_SZ_SHIFT, TMP; \ |
| 123 | or DEST, %lo(trap_block), DEST; \ |
| 124 | add DEST, TMP, DEST; \ |
| 125 | ldx [DEST + TRAP_PER_CPU_PGD_PADDR], DEST; |
David S. Miller | 56fb4df | 2006-02-26 23:24:22 -0800 | [diff] [blame] | 126 | |
David S. Miller | ffe483d | 2006-02-02 21:55:10 -0800 | [diff] [blame] | 127 | /* Clobbers TMP, loads local processor's IRQ work area into DEST. */ |
| 128 | #define TRAP_LOAD_IRQ_WORK(DEST, TMP) \ |
| 129 | __GET_CPUID(TMP) \ |
| 130 | sethi %hi(__irq_work), DEST; \ |
| 131 | sllx TMP, 6, TMP; \ |
| 132 | or DEST, %lo(__irq_work), DEST; \ |
| 133 | add DEST, TMP, DEST; |
David S. Miller | 56fb4df | 2006-02-26 23:24:22 -0800 | [diff] [blame] | 134 | |
David S. Miller | ffe483d | 2006-02-02 21:55:10 -0800 | [diff] [blame] | 135 | /* Clobbers TMP, loads DEST with current thread info pointer. */ |
| 136 | #define TRAP_LOAD_THREAD_REG(DEST, TMP) \ |
| 137 | __GET_CPUID(TMP) \ |
| 138 | sethi %hi(trap_block), DEST; \ |
| 139 | sllx TMP, TRAP_BLOCK_SZ_SHIFT, TMP; \ |
| 140 | or DEST, %lo(trap_block), DEST; \ |
| 141 | ldx [DEST + TMP], DEST; |
David S. Miller | 56fb4df | 2006-02-26 23:24:22 -0800 | [diff] [blame] | 142 | |
David S. Miller | ffe483d | 2006-02-02 21:55:10 -0800 | [diff] [blame] | 143 | /* Given the current thread info pointer in THR, load the per-cpu |
| 144 | * area base of the current processor into DEST. REG1, REG2, and REG3 are |
David S. Miller | 56fb4df | 2006-02-26 23:24:22 -0800 | [diff] [blame] | 145 | * clobbered. |
David S. Miller | 86b8186 | 2006-01-31 18:34:51 -0800 | [diff] [blame] | 146 | * |
David S. Miller | ffe483d | 2006-02-02 21:55:10 -0800 | [diff] [blame] | 147 | * You absolutely cannot use DEST as a temporary in this code. The |
David S. Miller | 86b8186 | 2006-01-31 18:34:51 -0800 | [diff] [blame] | 148 | * reason is that traps can happen during execution, and return from |
David S. Miller | ffe483d | 2006-02-02 21:55:10 -0800 | [diff] [blame] | 149 | * trap will load the fully resolved DEST per-cpu base. This can corrupt |
David S. Miller | 86b8186 | 2006-01-31 18:34:51 -0800 | [diff] [blame] | 150 | * the calculations done by the macro mid-stream. |
David S. Miller | 56fb4df | 2006-02-26 23:24:22 -0800 | [diff] [blame] | 151 | */ |
David S. Miller | ffe483d | 2006-02-02 21:55:10 -0800 | [diff] [blame] | 152 | #define LOAD_PER_CPU_BASE(DEST, THR, REG1, REG2, REG3) \ |
| 153 | ldub [THR + TI_CPU], REG1; \ |
David S. Miller | 86b8186 | 2006-01-31 18:34:51 -0800 | [diff] [blame] | 154 | sethi %hi(__per_cpu_shift), REG3; \ |
David S. Miller | 56fb4df | 2006-02-26 23:24:22 -0800 | [diff] [blame] | 155 | sethi %hi(__per_cpu_base), REG2; \ |
David S. Miller | 86b8186 | 2006-01-31 18:34:51 -0800 | [diff] [blame] | 156 | ldx [REG3 + %lo(__per_cpu_shift)], REG3; \ |
David S. Miller | 56fb4df | 2006-02-26 23:24:22 -0800 | [diff] [blame] | 157 | ldx [REG2 + %lo(__per_cpu_base)], REG2; \ |
David S. Miller | 86b8186 | 2006-01-31 18:34:51 -0800 | [diff] [blame] | 158 | sllx REG1, REG3, REG3; \ |
David S. Miller | ffe483d | 2006-02-02 21:55:10 -0800 | [diff] [blame] | 159 | add REG3, REG2, DEST; |
David S. Miller | 92704a1 | 2006-02-26 23:27:19 -0800 | [diff] [blame] | 160 | |
David S. Miller | 56fb4df | 2006-02-26 23:24:22 -0800 | [diff] [blame] | 161 | #else |
David S. Miller | 92704a1 | 2006-02-26 23:27:19 -0800 | [diff] [blame] | 162 | |
| 163 | /* Uniprocessor versions, we know the cpuid is zero. */ |
David S. Miller | ffe483d | 2006-02-02 21:55:10 -0800 | [diff] [blame] | 164 | #define TRAP_LOAD_PGD_PHYS(DEST, TMP) \ |
| 165 | sethi %hi(trap_block), DEST; \ |
| 166 | or DEST, %lo(trap_block), DEST; \ |
| 167 | ldx [DEST + TRAP_PER_CPU_PGD_PADDR], DEST; |
David S. Miller | 92704a1 | 2006-02-26 23:27:19 -0800 | [diff] [blame] | 168 | |
David S. Miller | ffe483d | 2006-02-02 21:55:10 -0800 | [diff] [blame] | 169 | #define TRAP_LOAD_IRQ_WORK(DEST, TMP) \ |
| 170 | sethi %hi(__irq_work), DEST; \ |
| 171 | or DEST, %lo(__irq_work), DEST; |
David S. Miller | 92704a1 | 2006-02-26 23:27:19 -0800 | [diff] [blame] | 172 | |
David S. Miller | ffe483d | 2006-02-02 21:55:10 -0800 | [diff] [blame] | 173 | #define TRAP_LOAD_THREAD_REG(DEST, TMP) \ |
| 174 | sethi %hi(trap_block), DEST; \ |
| 175 | ldx [DEST + %lo(trap_block)], DEST; |
David S. Miller | 92704a1 | 2006-02-26 23:27:19 -0800 | [diff] [blame] | 176 | |
David S. Miller | ffe483d | 2006-02-02 21:55:10 -0800 | [diff] [blame] | 177 | /* No per-cpu areas on uniprocessor, so no need to load DEST. */ |
| 178 | #define LOAD_PER_CPU_BASE(DEST, THR, REG1, REG2, REG3) |
David S. Miller | 92704a1 | 2006-02-26 23:27:19 -0800 | [diff] [blame] | 179 | |
| 180 | #endif /* !(CONFIG_SMP) */ |
David S. Miller | 56fb4df | 2006-02-26 23:24:22 -0800 | [diff] [blame] | 181 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 182 | #endif /* _SPARC64_CPUDATA_H */ |