blob: ef6c96cd3d68da35e3dcecb840289741159c129a [file] [log] [blame]
Mike Marciniszyn77241052015-07-30 15:17:43 -04001/*
Jubin John05d6ac12016-02-14 20:22:17 -08002 * Copyright(c) 2015, 2016 Intel Corporation.
Mike Marciniszyn77241052015-07-30 15:17:43 -04003 *
4 * This file is provided under a dual BSD/GPLv2 license. When using or
5 * redistributing this file, you may do so under either license.
6 *
7 * GPL LICENSE SUMMARY
8 *
Mike Marciniszyn77241052015-07-30 15:17:43 -04009 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of version 2 of the GNU General Public License as
11 * published by the Free Software Foundation.
12 *
13 * This program is distributed in the hope that it will be useful, but
14 * WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
16 * General Public License for more details.
17 *
18 * BSD LICENSE
19 *
Mike Marciniszyn77241052015-07-30 15:17:43 -040020 * Redistribution and use in source and binary forms, with or without
21 * modification, are permitted provided that the following conditions
22 * are met:
23 *
24 * - Redistributions of source code must retain the above copyright
25 * notice, this list of conditions and the following disclaimer.
26 * - Redistributions in binary form must reproduce the above copyright
27 * notice, this list of conditions and the following disclaimer in
28 * the documentation and/or other materials provided with the
29 * distribution.
30 * - Neither the name of Intel Corporation nor the names of its
31 * contributors may be used to endorse or promote products derived
32 * from this software without specific prior written permission.
33 *
34 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
35 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
36 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
37 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
38 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
39 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
40 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
41 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
42 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
43 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
44 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
45 *
46 */
47
48#include "hfi.h"
Dennis Dalessandrobb5df5f2016-02-14 12:44:43 -080049#include "verbs_txreq.h"
Mike Marciniszyn77241052015-07-30 15:17:43 -040050#include "qp.h"
51
52/* cut down ridiculously long IB macro names */
53#define OP(x) IB_OPCODE_UC_##x
54
Mike Marciniszyn14553ca2016-02-14 12:45:36 -080055/* only opcode mask for adaptive pio */
56const u32 uc_only_opcode =
57 BIT(OP(SEND_ONLY) & 0x1f) |
58 BIT(OP(SEND_ONLY_WITH_IMMEDIATE & 0x1f)) |
59 BIT(OP(RDMA_WRITE_ONLY & 0x1f)) |
60 BIT(OP(RDMA_WRITE_ONLY_WITH_IMMEDIATE & 0x1f));
61
Mike Marciniszyn77241052015-07-30 15:17:43 -040062/**
63 * hfi1_make_uc_req - construct a request packet (SEND, RDMA write)
64 * @qp: a pointer to the QP
65 *
Mike Marciniszyn46a80d62016-02-14 12:10:04 -080066 * Assume s_lock is held.
67 *
Mike Marciniszyn77241052015-07-30 15:17:43 -040068 * Return 1 if constructed; otherwise, return 0.
69 */
Dennis Dalessandrobb5df5f2016-02-14 12:44:43 -080070int hfi1_make_uc_req(struct rvt_qp *qp, struct hfi1_pkt_state *ps)
Mike Marciniszyn77241052015-07-30 15:17:43 -040071{
Dennis Dalessandro4c6829c2016-01-19 14:42:00 -080072 struct hfi1_qp_priv *priv = qp->priv;
Mike Marciniszyn77241052015-07-30 15:17:43 -040073 struct hfi1_other_headers *ohdr;
Dennis Dalessandro895420d2016-01-19 14:42:28 -080074 struct rvt_swqe *wqe;
Mike Marciniszyn77241052015-07-30 15:17:43 -040075 u32 hwords = 5;
76 u32 bth0 = 0;
77 u32 len;
78 u32 pmtu = qp->pmtu;
Mike Marciniszyn77241052015-07-30 15:17:43 -040079 int middle = 0;
Jianxin Xiong0db3dfa2016-07-25 13:38:37 -070080 int err;
Mike Marciniszyn77241052015-07-30 15:17:43 -040081
Dennis Dalessandrobb5df5f2016-02-14 12:44:43 -080082 ps->s_txreq = get_txreq(ps->dev, qp);
83 if (IS_ERR(ps->s_txreq))
84 goto bail_no_tx;
85
Dennis Dalessandro83693bd2016-01-19 14:43:33 -080086 if (!(ib_rvt_state_ops[qp->state] & RVT_PROCESS_SEND_OK)) {
87 if (!(ib_rvt_state_ops[qp->state] & RVT_FLUSH_SEND))
Mike Marciniszyn77241052015-07-30 15:17:43 -040088 goto bail;
89 /* We are in the error state, flush the work request. */
Mike Marciniszyn46a80d62016-02-14 12:10:04 -080090 smp_read_barrier_depends(); /* see post_one_send() */
91 if (qp->s_last == ACCESS_ONCE(qp->s_head))
Mike Marciniszyn77241052015-07-30 15:17:43 -040092 goto bail;
93 /* If DMAs are in progress, we can't flush immediately. */
Mike Marciniszyn14553ca2016-02-14 12:45:36 -080094 if (iowait_sdma_pending(&priv->s_iowait)) {
Dennis Dalessandro54d10c12016-01-19 14:43:01 -080095 qp->s_flags |= RVT_S_WAIT_DMA;
Mike Marciniszyn77241052015-07-30 15:17:43 -040096 goto bail;
97 }
98 clear_ahg(qp);
Dennis Dalessandro83693bd2016-01-19 14:43:33 -080099 wqe = rvt_get_swqe_ptr(qp, qp->s_last);
Mike Marciniszyn77241052015-07-30 15:17:43 -0400100 hfi1_send_complete(qp, wqe, IB_WC_WR_FLUSH_ERR);
Dennis Dalessandrobb5df5f2016-02-14 12:44:43 -0800101 goto done_free_tx;
Mike Marciniszyn77241052015-07-30 15:17:43 -0400102 }
103
Dennis Dalessandrobb5df5f2016-02-14 12:44:43 -0800104 ohdr = &ps->s_txreq->phdr.hdr.u.oth;
Mike Marciniszyn77241052015-07-30 15:17:43 -0400105 if (qp->remote_ah_attr.ah_flags & IB_AH_GRH)
Dennis Dalessandrobb5df5f2016-02-14 12:44:43 -0800106 ohdr = &ps->s_txreq->phdr.hdr.u.l.oth;
Mike Marciniszyn77241052015-07-30 15:17:43 -0400107
108 /* Get the next send request. */
Dennis Dalessandro83693bd2016-01-19 14:43:33 -0800109 wqe = rvt_get_swqe_ptr(qp, qp->s_cur);
Mike Marciniszyn77241052015-07-30 15:17:43 -0400110 qp->s_wqe = NULL;
111 switch (qp->s_state) {
112 default:
Dennis Dalessandro83693bd2016-01-19 14:43:33 -0800113 if (!(ib_rvt_state_ops[qp->state] &
114 RVT_PROCESS_NEXT_SEND_OK))
Mike Marciniszyn77241052015-07-30 15:17:43 -0400115 goto bail;
116 /* Check if send work queue is empty. */
Mike Marciniszyn46a80d62016-02-14 12:10:04 -0800117 smp_read_barrier_depends(); /* see post_one_send() */
118 if (qp->s_cur == ACCESS_ONCE(qp->s_head)) {
Mike Marciniszyn77241052015-07-30 15:17:43 -0400119 clear_ahg(qp);
120 goto bail;
121 }
122 /*
Jianxin Xiong0db3dfa2016-07-25 13:38:37 -0700123 * Local operations are processed immediately
124 * after all prior requests have completed.
125 */
126 if (wqe->wr.opcode == IB_WR_REG_MR ||
127 wqe->wr.opcode == IB_WR_LOCAL_INV) {
128 if (qp->s_last != qp->s_cur)
129 goto bail;
130 if (++qp->s_cur == qp->s_size)
131 qp->s_cur = 0;
132 if (wqe->wr.opcode == IB_WR_REG_MR)
133 err = rvt_fast_reg_mr(qp, wqe->reg_wr.mr,
134 wqe->reg_wr.key,
135 wqe->reg_wr.access);
136 else
137 err = rvt_invalidate_rkey(
138 qp, wqe->wr.ex.invalidate_rkey);
139 hfi1_send_complete(qp, wqe, err ? IB_WC_LOC_PROT_ERR
140 : IB_WC_SUCCESS);
141 atomic_dec(&qp->local_ops_pending);
142 qp->s_hdrwords = 0;
143 goto done_free_tx;
144 }
145 /*
Mike Marciniszyn77241052015-07-30 15:17:43 -0400146 * Start a new request.
147 */
Mike Marciniszyn46a80d62016-02-14 12:10:04 -0800148 qp->s_psn = wqe->psn;
Mike Marciniszyn77241052015-07-30 15:17:43 -0400149 qp->s_sge.sge = wqe->sg_list[0];
150 qp->s_sge.sg_list = wqe->sg_list + 1;
151 qp->s_sge.num_sge = wqe->wr.num_sge;
152 qp->s_sge.total_len = wqe->length;
153 len = wqe->length;
154 qp->s_len = len;
155 switch (wqe->wr.opcode) {
156 case IB_WR_SEND:
157 case IB_WR_SEND_WITH_IMM:
158 if (len > pmtu) {
159 qp->s_state = OP(SEND_FIRST);
160 len = pmtu;
161 break;
162 }
Jubin Johne4909742016-02-14 20:22:00 -0800163 if (wqe->wr.opcode == IB_WR_SEND) {
Mike Marciniszyn77241052015-07-30 15:17:43 -0400164 qp->s_state = OP(SEND_ONLY);
Jubin Johne4909742016-02-14 20:22:00 -0800165 } else {
Mike Marciniszyn77241052015-07-30 15:17:43 -0400166 qp->s_state =
167 OP(SEND_ONLY_WITH_IMMEDIATE);
168 /* Immediate data comes after the BTH */
169 ohdr->u.imm_data = wqe->wr.ex.imm_data;
170 hwords += 1;
171 }
172 if (wqe->wr.send_flags & IB_SEND_SOLICITED)
173 bth0 |= IB_BTH_SOLICITED;
174 qp->s_wqe = wqe;
175 if (++qp->s_cur >= qp->s_size)
176 qp->s_cur = 0;
177 break;
178
179 case IB_WR_RDMA_WRITE:
180 case IB_WR_RDMA_WRITE_WITH_IMM:
181 ohdr->u.rc.reth.vaddr =
Christoph Hellwige622f2f2015-10-08 09:16:33 +0100182 cpu_to_be64(wqe->rdma_wr.remote_addr);
Mike Marciniszyn77241052015-07-30 15:17:43 -0400183 ohdr->u.rc.reth.rkey =
Christoph Hellwige622f2f2015-10-08 09:16:33 +0100184 cpu_to_be32(wqe->rdma_wr.rkey);
Mike Marciniszyn77241052015-07-30 15:17:43 -0400185 ohdr->u.rc.reth.length = cpu_to_be32(len);
186 hwords += sizeof(struct ib_reth) / 4;
187 if (len > pmtu) {
188 qp->s_state = OP(RDMA_WRITE_FIRST);
189 len = pmtu;
190 break;
191 }
Jubin Johne4909742016-02-14 20:22:00 -0800192 if (wqe->wr.opcode == IB_WR_RDMA_WRITE) {
Mike Marciniszyn77241052015-07-30 15:17:43 -0400193 qp->s_state = OP(RDMA_WRITE_ONLY);
Jubin Johne4909742016-02-14 20:22:00 -0800194 } else {
Mike Marciniszyn77241052015-07-30 15:17:43 -0400195 qp->s_state =
196 OP(RDMA_WRITE_ONLY_WITH_IMMEDIATE);
197 /* Immediate data comes after the RETH */
198 ohdr->u.rc.imm_data = wqe->wr.ex.imm_data;
199 hwords += 1;
200 if (wqe->wr.send_flags & IB_SEND_SOLICITED)
201 bth0 |= IB_BTH_SOLICITED;
202 }
203 qp->s_wqe = wqe;
204 if (++qp->s_cur >= qp->s_size)
205 qp->s_cur = 0;
206 break;
207
208 default:
209 goto bail;
210 }
211 break;
212
213 case OP(SEND_FIRST):
214 qp->s_state = OP(SEND_MIDDLE);
215 /* FALLTHROUGH */
216 case OP(SEND_MIDDLE):
217 len = qp->s_len;
218 if (len > pmtu) {
219 len = pmtu;
220 middle = HFI1_CAP_IS_KSET(SDMA_AHG);
221 break;
222 }
Jubin Johne4909742016-02-14 20:22:00 -0800223 if (wqe->wr.opcode == IB_WR_SEND) {
Mike Marciniszyn77241052015-07-30 15:17:43 -0400224 qp->s_state = OP(SEND_LAST);
Jubin Johne4909742016-02-14 20:22:00 -0800225 } else {
Mike Marciniszyn77241052015-07-30 15:17:43 -0400226 qp->s_state = OP(SEND_LAST_WITH_IMMEDIATE);
227 /* Immediate data comes after the BTH */
228 ohdr->u.imm_data = wqe->wr.ex.imm_data;
229 hwords += 1;
230 }
231 if (wqe->wr.send_flags & IB_SEND_SOLICITED)
232 bth0 |= IB_BTH_SOLICITED;
233 qp->s_wqe = wqe;
234 if (++qp->s_cur >= qp->s_size)
235 qp->s_cur = 0;
236 break;
237
238 case OP(RDMA_WRITE_FIRST):
239 qp->s_state = OP(RDMA_WRITE_MIDDLE);
240 /* FALLTHROUGH */
241 case OP(RDMA_WRITE_MIDDLE):
242 len = qp->s_len;
243 if (len > pmtu) {
244 len = pmtu;
245 middle = HFI1_CAP_IS_KSET(SDMA_AHG);
246 break;
247 }
Jubin Johne4909742016-02-14 20:22:00 -0800248 if (wqe->wr.opcode == IB_WR_RDMA_WRITE) {
Mike Marciniszyn77241052015-07-30 15:17:43 -0400249 qp->s_state = OP(RDMA_WRITE_LAST);
Jubin Johne4909742016-02-14 20:22:00 -0800250 } else {
Mike Marciniszyn77241052015-07-30 15:17:43 -0400251 qp->s_state =
252 OP(RDMA_WRITE_LAST_WITH_IMMEDIATE);
253 /* Immediate data comes after the BTH */
254 ohdr->u.imm_data = wqe->wr.ex.imm_data;
255 hwords += 1;
256 if (wqe->wr.send_flags & IB_SEND_SOLICITED)
257 bth0 |= IB_BTH_SOLICITED;
258 }
259 qp->s_wqe = wqe;
260 if (++qp->s_cur >= qp->s_size)
261 qp->s_cur = 0;
262 break;
263 }
264 qp->s_len -= len;
265 qp->s_hdrwords = hwords;
Mike Marciniszyn14553ca2016-02-14 12:45:36 -0800266 ps->s_txreq->sde = priv->s_sde;
Mike Marciniszyn77241052015-07-30 15:17:43 -0400267 qp->s_cur_sge = &qp->s_sge;
268 qp->s_cur_size = len;
269 hfi1_make_ruc_header(qp, ohdr, bth0 | (qp->s_state << 24),
Dennis Dalessandrobb5df5f2016-02-14 12:44:43 -0800270 mask_psn(qp->s_psn++), middle, ps);
Jianxin Xiongaa0ad412016-02-26 13:33:13 -0800271 /* pbc */
272 ps->s_txreq->hdr_dwords = qp->s_hdrwords + 2;
Dennis Dalessandrobb5df5f2016-02-14 12:44:43 -0800273 return 1;
274
275done_free_tx:
276 hfi1_put_txreq(ps->s_txreq);
277 ps->s_txreq = NULL;
Mike Marciniszyn46a80d62016-02-14 12:10:04 -0800278 return 1;
Mike Marciniszyn77241052015-07-30 15:17:43 -0400279
280bail:
Dennis Dalessandrobb5df5f2016-02-14 12:44:43 -0800281 hfi1_put_txreq(ps->s_txreq);
282
283bail_no_tx:
284 ps->s_txreq = NULL;
Dennis Dalessandro54d10c12016-01-19 14:43:01 -0800285 qp->s_flags &= ~RVT_S_BUSY;
Dennis Dalessandrobb5df5f2016-02-14 12:44:43 -0800286 qp->s_hdrwords = 0;
287 return 0;
Mike Marciniszyn77241052015-07-30 15:17:43 -0400288}
289
290/**
291 * hfi1_uc_rcv - handle an incoming UC packet
292 * @ibp: the port the packet came in on
293 * @hdr: the header of the packet
294 * @rcv_flags: flags relevant to rcv processing
295 * @data: the packet data
296 * @tlen: the length of the packet
297 * @qp: the QP for this packet.
298 *
299 * This is called from qp_rcv() to process an incoming UC packet
300 * for the given QP.
301 * Called at interrupt level.
302 */
303void hfi1_uc_rcv(struct hfi1_packet *packet)
304{
305 struct hfi1_ibport *ibp = &packet->rcd->ppd->ibport_data;
306 struct hfi1_ib_header *hdr = packet->hdr;
307 u32 rcv_flags = packet->rcv_flags;
308 void *data = packet->ebuf;
309 u32 tlen = packet->tlen;
Dennis Dalessandro895420d2016-01-19 14:42:28 -0800310 struct rvt_qp *qp = packet->qp;
Mike Marciniszyn77241052015-07-30 15:17:43 -0400311 struct hfi1_other_headers *ohdr = packet->ohdr;
Arthur Kepner977940b2015-11-04 21:10:10 -0500312 u32 bth0, opcode;
Mike Marciniszyn77241052015-07-30 15:17:43 -0400313 u32 hdrsize = packet->hlen;
314 u32 psn;
315 u32 pad;
316 struct ib_wc wc;
317 u32 pmtu = qp->pmtu;
318 struct ib_reth *reth;
319 int has_grh = rcv_flags & HFI1_HAS_GRH;
320 int ret;
Mike Marciniszyn77241052015-07-30 15:17:43 -0400321
Arthur Kepner977940b2015-11-04 21:10:10 -0500322 bth0 = be32_to_cpu(ohdr->bth[0]);
323 if (hfi1_ruc_check_hdr(ibp, hdr, has_grh, qp, bth0))
Mike Marciniszyn77241052015-07-30 15:17:43 -0400324 return;
325
Mitko Haralanov5fd2b562016-07-25 13:38:07 -0700326 process_ecn(qp, packet, true);
Mike Marciniszyn77241052015-07-30 15:17:43 -0400327
328 psn = be32_to_cpu(ohdr->bth[2]);
Arthur Kepner977940b2015-11-04 21:10:10 -0500329 opcode = (bth0 >> 24) & 0xff;
Mike Marciniszyn77241052015-07-30 15:17:43 -0400330
331 /* Compare the PSN verses the expected PSN. */
332 if (unlikely(cmp_psn(psn, qp->r_psn) != 0)) {
333 /*
334 * Handle a sequence error.
335 * Silently drop any current message.
336 */
337 qp->r_psn = psn;
338inv:
339 if (qp->r_state == OP(SEND_FIRST) ||
340 qp->r_state == OP(SEND_MIDDLE)) {
Dennis Dalessandro54d10c12016-01-19 14:43:01 -0800341 set_bit(RVT_R_REWIND_SGE, &qp->r_aflags);
Mike Marciniszyn77241052015-07-30 15:17:43 -0400342 qp->r_sge.num_sge = 0;
Jubin Johne4909742016-02-14 20:22:00 -0800343 } else {
Dennis Dalessandroec4274f2016-01-19 14:43:44 -0800344 rvt_put_ss(&qp->r_sge);
Jubin Johne4909742016-02-14 20:22:00 -0800345 }
Mike Marciniszyn77241052015-07-30 15:17:43 -0400346 qp->r_state = OP(SEND_LAST);
347 switch (opcode) {
348 case OP(SEND_FIRST):
349 case OP(SEND_ONLY):
350 case OP(SEND_ONLY_WITH_IMMEDIATE):
351 goto send_first;
352
353 case OP(RDMA_WRITE_FIRST):
354 case OP(RDMA_WRITE_ONLY):
355 case OP(RDMA_WRITE_ONLY_WITH_IMMEDIATE):
356 goto rdma_first;
357
358 default:
359 goto drop;
360 }
361 }
362
363 /* Check for opcode sequence errors. */
364 switch (qp->r_state) {
365 case OP(SEND_FIRST):
366 case OP(SEND_MIDDLE):
367 if (opcode == OP(SEND_MIDDLE) ||
368 opcode == OP(SEND_LAST) ||
369 opcode == OP(SEND_LAST_WITH_IMMEDIATE))
370 break;
371 goto inv;
372
373 case OP(RDMA_WRITE_FIRST):
374 case OP(RDMA_WRITE_MIDDLE):
375 if (opcode == OP(RDMA_WRITE_MIDDLE) ||
376 opcode == OP(RDMA_WRITE_LAST) ||
377 opcode == OP(RDMA_WRITE_LAST_WITH_IMMEDIATE))
378 break;
379 goto inv;
380
381 default:
382 if (opcode == OP(SEND_FIRST) ||
383 opcode == OP(SEND_ONLY) ||
384 opcode == OP(SEND_ONLY_WITH_IMMEDIATE) ||
385 opcode == OP(RDMA_WRITE_FIRST) ||
386 opcode == OP(RDMA_WRITE_ONLY) ||
387 opcode == OP(RDMA_WRITE_ONLY_WITH_IMMEDIATE))
388 break;
389 goto inv;
390 }
391
Dennis Dalessandro54d10c12016-01-19 14:43:01 -0800392 if (qp->state == IB_QPS_RTR && !(qp->r_flags & RVT_R_COMM_EST))
Mike Marciniszyn77241052015-07-30 15:17:43 -0400393 qp_comm_est(qp);
394
395 /* OK, process the packet. */
396 switch (opcode) {
397 case OP(SEND_FIRST):
398 case OP(SEND_ONLY):
399 case OP(SEND_ONLY_WITH_IMMEDIATE):
400send_first:
Jubin Johne4909742016-02-14 20:22:00 -0800401 if (test_and_clear_bit(RVT_R_REWIND_SGE, &qp->r_aflags)) {
Mike Marciniszyn77241052015-07-30 15:17:43 -0400402 qp->r_sge = qp->s_rdma_read_sge;
Jubin Johne4909742016-02-14 20:22:00 -0800403 } else {
Dennis Dalessandroec4274f2016-01-19 14:43:44 -0800404 ret = hfi1_rvt_get_rwqe(qp, 0);
Mike Marciniszyn77241052015-07-30 15:17:43 -0400405 if (ret < 0)
406 goto op_err;
407 if (!ret)
408 goto drop;
409 /*
410 * qp->s_rdma_read_sge will be the owner
411 * of the mr references.
412 */
413 qp->s_rdma_read_sge = qp->r_sge;
414 }
415 qp->r_rcv_len = 0;
416 if (opcode == OP(SEND_ONLY))
417 goto no_immediate_data;
418 else if (opcode == OP(SEND_ONLY_WITH_IMMEDIATE))
419 goto send_last_imm;
420 /* FALLTHROUGH */
421 case OP(SEND_MIDDLE):
422 /* Check for invalid length PMTU or posted rwqe len. */
423 if (unlikely(tlen != (hdrsize + pmtu + 4)))
424 goto rewind;
425 qp->r_rcv_len += pmtu;
426 if (unlikely(qp->r_rcv_len > qp->r_len))
427 goto rewind;
Dean Luick7b0b01a2016-02-03 14:35:49 -0800428 hfi1_copy_sge(&qp->r_sge, data, pmtu, 0, 0);
Mike Marciniszyn77241052015-07-30 15:17:43 -0400429 break;
430
431 case OP(SEND_LAST_WITH_IMMEDIATE):
432send_last_imm:
433 wc.ex.imm_data = ohdr->u.imm_data;
434 wc.wc_flags = IB_WC_WITH_IMM;
435 goto send_last;
436 case OP(SEND_LAST):
437no_immediate_data:
438 wc.ex.imm_data = 0;
439 wc.wc_flags = 0;
440send_last:
441 /* Get the number of bytes the message was padded by. */
442 pad = (be32_to_cpu(ohdr->bth[0]) >> 20) & 3;
443 /* Check for invalid length. */
444 /* LAST len should be >= 1 */
445 if (unlikely(tlen < (hdrsize + pad + 4)))
446 goto rewind;
447 /* Don't count the CRC. */
448 tlen -= (hdrsize + pad + 4);
449 wc.byte_len = tlen + qp->r_rcv_len;
450 if (unlikely(wc.byte_len > qp->r_len))
451 goto rewind;
452 wc.opcode = IB_WC_RECV;
Dean Luick7b0b01a2016-02-03 14:35:49 -0800453 hfi1_copy_sge(&qp->r_sge, data, tlen, 0, 0);
Dennis Dalessandroec4274f2016-01-19 14:43:44 -0800454 rvt_put_ss(&qp->s_rdma_read_sge);
Mike Marciniszyn77241052015-07-30 15:17:43 -0400455last_imm:
456 wc.wr_id = qp->r_wr_id;
457 wc.status = IB_WC_SUCCESS;
458 wc.qp = &qp->ibqp;
459 wc.src_qp = qp->remote_qpn;
460 wc.slid = qp->remote_ah_attr.dlid;
461 /*
462 * It seems that IB mandates the presence of an SL in a
463 * work completion only for the UD transport (see section
464 * 11.4.2 of IBTA Vol. 1).
465 *
466 * However, the way the SL is chosen below is consistent
467 * with the way that IB/qib works and is trying avoid
468 * introducing incompatibilities.
469 *
470 * See also OPA Vol. 1, section 9.7.6, and table 9-17.
471 */
472 wc.sl = qp->remote_ah_attr.sl;
473 /* zero fields that are N/A */
474 wc.vendor_err = 0;
475 wc.pkey_index = 0;
476 wc.dlid_path_bits = 0;
477 wc.port_num = 0;
478 /* Signal completion event if the solicited bit is set. */
Dennis Dalessandroabd712d2016-01-19 14:43:22 -0800479 rvt_cq_enter(ibcq_to_rvtcq(qp->ibqp.recv_cq), &wc,
480 (ohdr->bth[0] &
481 cpu_to_be32(IB_BTH_SOLICITED)) != 0);
Mike Marciniszyn77241052015-07-30 15:17:43 -0400482 break;
483
484 case OP(RDMA_WRITE_FIRST):
485 case OP(RDMA_WRITE_ONLY):
486 case OP(RDMA_WRITE_ONLY_WITH_IMMEDIATE): /* consume RWQE */
487rdma_first:
488 if (unlikely(!(qp->qp_access_flags &
489 IB_ACCESS_REMOTE_WRITE))) {
490 goto drop;
491 }
492 reth = &ohdr->u.rc.reth;
493 qp->r_len = be32_to_cpu(reth->length);
494 qp->r_rcv_len = 0;
495 qp->r_sge.sg_list = NULL;
496 if (qp->r_len != 0) {
497 u32 rkey = be32_to_cpu(reth->rkey);
498 u64 vaddr = be64_to_cpu(reth->vaddr);
499 int ok;
500
501 /* Check rkey */
Dennis Dalessandro895420d2016-01-19 14:42:28 -0800502 ok = rvt_rkey_ok(qp, &qp->r_sge.sge, qp->r_len,
503 vaddr, rkey, IB_ACCESS_REMOTE_WRITE);
Mike Marciniszyn77241052015-07-30 15:17:43 -0400504 if (unlikely(!ok))
505 goto drop;
506 qp->r_sge.num_sge = 1;
507 } else {
508 qp->r_sge.num_sge = 0;
509 qp->r_sge.sge.mr = NULL;
510 qp->r_sge.sge.vaddr = NULL;
511 qp->r_sge.sge.length = 0;
512 qp->r_sge.sge.sge_length = 0;
513 }
Jubin Johne4909742016-02-14 20:22:00 -0800514 if (opcode == OP(RDMA_WRITE_ONLY)) {
Mike Marciniszyn77241052015-07-30 15:17:43 -0400515 goto rdma_last;
Jubin Johne4909742016-02-14 20:22:00 -0800516 } else if (opcode == OP(RDMA_WRITE_ONLY_WITH_IMMEDIATE)) {
Mike Marciniszyn77241052015-07-30 15:17:43 -0400517 wc.ex.imm_data = ohdr->u.rc.imm_data;
518 goto rdma_last_imm;
519 }
520 /* FALLTHROUGH */
521 case OP(RDMA_WRITE_MIDDLE):
522 /* Check for invalid length PMTU or posted rwqe len. */
523 if (unlikely(tlen != (hdrsize + pmtu + 4)))
524 goto drop;
525 qp->r_rcv_len += pmtu;
526 if (unlikely(qp->r_rcv_len > qp->r_len))
527 goto drop;
Dean Luick7b0b01a2016-02-03 14:35:49 -0800528 hfi1_copy_sge(&qp->r_sge, data, pmtu, 1, 0);
Mike Marciniszyn77241052015-07-30 15:17:43 -0400529 break;
530
531 case OP(RDMA_WRITE_LAST_WITH_IMMEDIATE):
532 wc.ex.imm_data = ohdr->u.imm_data;
533rdma_last_imm:
534 wc.wc_flags = IB_WC_WITH_IMM;
535
536 /* Get the number of bytes the message was padded by. */
537 pad = (be32_to_cpu(ohdr->bth[0]) >> 20) & 3;
538 /* Check for invalid length. */
539 /* LAST len should be >= 1 */
540 if (unlikely(tlen < (hdrsize + pad + 4)))
541 goto drop;
542 /* Don't count the CRC. */
543 tlen -= (hdrsize + pad + 4);
544 if (unlikely(tlen + qp->r_rcv_len != qp->r_len))
545 goto drop;
Jubin Johne4909742016-02-14 20:22:00 -0800546 if (test_and_clear_bit(RVT_R_REWIND_SGE, &qp->r_aflags)) {
Dennis Dalessandroec4274f2016-01-19 14:43:44 -0800547 rvt_put_ss(&qp->s_rdma_read_sge);
Jubin Johne4909742016-02-14 20:22:00 -0800548 } else {
Dennis Dalessandroec4274f2016-01-19 14:43:44 -0800549 ret = hfi1_rvt_get_rwqe(qp, 1);
Mike Marciniszyn77241052015-07-30 15:17:43 -0400550 if (ret < 0)
551 goto op_err;
552 if (!ret)
553 goto drop;
554 }
555 wc.byte_len = qp->r_len;
556 wc.opcode = IB_WC_RECV_RDMA_WITH_IMM;
Dean Luick7b0b01a2016-02-03 14:35:49 -0800557 hfi1_copy_sge(&qp->r_sge, data, tlen, 1, 0);
Dennis Dalessandroec4274f2016-01-19 14:43:44 -0800558 rvt_put_ss(&qp->r_sge);
Mike Marciniszyn77241052015-07-30 15:17:43 -0400559 goto last_imm;
560
561 case OP(RDMA_WRITE_LAST):
562rdma_last:
563 /* Get the number of bytes the message was padded by. */
564 pad = (be32_to_cpu(ohdr->bth[0]) >> 20) & 3;
565 /* Check for invalid length. */
566 /* LAST len should be >= 1 */
567 if (unlikely(tlen < (hdrsize + pad + 4)))
568 goto drop;
569 /* Don't count the CRC. */
570 tlen -= (hdrsize + pad + 4);
571 if (unlikely(tlen + qp->r_rcv_len != qp->r_len))
572 goto drop;
Dean Luick7b0b01a2016-02-03 14:35:49 -0800573 hfi1_copy_sge(&qp->r_sge, data, tlen, 1, 0);
Dennis Dalessandroec4274f2016-01-19 14:43:44 -0800574 rvt_put_ss(&qp->r_sge);
Mike Marciniszyn77241052015-07-30 15:17:43 -0400575 break;
576
577 default:
578 /* Drop packet for unknown opcodes. */
579 goto drop;
580 }
581 qp->r_psn++;
582 qp->r_state = opcode;
583 return;
584
585rewind:
Dennis Dalessandro54d10c12016-01-19 14:43:01 -0800586 set_bit(RVT_R_REWIND_SGE, &qp->r_aflags);
Mike Marciniszyn77241052015-07-30 15:17:43 -0400587 qp->r_sge.num_sge = 0;
588drop:
Dennis Dalessandro4eb06882016-01-19 14:42:39 -0800589 ibp->rvp.n_pkt_drops++;
Mike Marciniszyn77241052015-07-30 15:17:43 -0400590 return;
591
592op_err:
593 hfi1_rc_error(qp, IB_WC_LOC_QP_OP_ERR);
Mike Marciniszyn77241052015-07-30 15:17:43 -0400594}