Pavel Pisa | 56ca9040 | 2006-04-02 19:27:07 +0100 | [diff] [blame] | 1 | /* |
Pierre Ossman | 70f1048 | 2007-07-11 20:04:50 +0200 | [diff] [blame] | 2 | * linux/drivers/mmc/host/imxmmc.c - Motorola i.MX MMCI driver |
Pavel Pisa | 56ca9040 | 2006-04-02 19:27:07 +0100 | [diff] [blame] | 3 | * |
| 4 | * Copyright (C) 2004 Sascha Hauer, Pengutronix <sascha@saschahauer.de> |
| 5 | * Copyright (C) 2006 Pavel Pisa, PiKRON <ppisa@pikron.com> |
| 6 | * |
| 7 | * derived from pxamci.c by Russell King |
| 8 | * |
| 9 | * This program is free software; you can redistribute it and/or modify |
| 10 | * it under the terms of the GNU General Public License version 2 as |
| 11 | * published by the Free Software Foundation. |
| 12 | * |
Pavel Pisa | 56ca9040 | 2006-04-02 19:27:07 +0100 | [diff] [blame] | 13 | */ |
Pavel Pisa | 56ca9040 | 2006-04-02 19:27:07 +0100 | [diff] [blame] | 14 | |
Pavel Pisa | 56ca9040 | 2006-04-02 19:27:07 +0100 | [diff] [blame] | 15 | #include <linux/module.h> |
| 16 | #include <linux/init.h> |
| 17 | #include <linux/ioport.h> |
| 18 | #include <linux/platform_device.h> |
| 19 | #include <linux/interrupt.h> |
| 20 | #include <linux/blkdev.h> |
| 21 | #include <linux/dma-mapping.h> |
| 22 | #include <linux/mmc/host.h> |
| 23 | #include <linux/mmc/card.h> |
Pavel Pisa | 56ca9040 | 2006-04-02 19:27:07 +0100 | [diff] [blame] | 24 | #include <linux/delay.h> |
Sascha Hauer | 38a41fd | 2008-07-05 10:02:46 +0200 | [diff] [blame] | 25 | #include <linux/clk.h> |
Marc Kleine-Budde | 4b7c0e4 | 2008-10-10 12:05:03 +0200 | [diff] [blame] | 26 | #include <linux/io.h> |
Pavel Pisa | 56ca9040 | 2006-04-02 19:27:07 +0100 | [diff] [blame] | 27 | |
| 28 | #include <asm/dma.h> |
Pavel Pisa | 56ca9040 | 2006-04-02 19:27:07 +0100 | [diff] [blame] | 29 | #include <asm/irq.h> |
| 30 | #include <asm/sizes.h> |
Russell King | a09e64f | 2008-08-05 16:14:15 +0100 | [diff] [blame] | 31 | #include <mach/mmc.h> |
| 32 | #include <mach/imx-dma.h> |
Pavel Pisa | 56ca9040 | 2006-04-02 19:27:07 +0100 | [diff] [blame] | 33 | |
| 34 | #include "imxmmc.h" |
| 35 | |
| 36 | #define DRIVER_NAME "imx-mmc" |
| 37 | |
| 38 | #define IMXMCI_INT_MASK_DEFAULT (INT_MASK_BUF_READY | INT_MASK_DATA_TRAN | \ |
Marc Kleine-Budde | 4b7c0e4 | 2008-10-10 12:05:03 +0200 | [diff] [blame] | 39 | INT_MASK_WRITE_OP_DONE | INT_MASK_END_CMD_RES | \ |
| 40 | INT_MASK_AUTO_CARD_DETECT | INT_MASK_DAT0_EN | INT_MASK_SDIO) |
Pavel Pisa | 56ca9040 | 2006-04-02 19:27:07 +0100 | [diff] [blame] | 41 | |
| 42 | struct imxmci_host { |
| 43 | struct mmc_host *mmc; |
| 44 | spinlock_t lock; |
| 45 | struct resource *res; |
| 46 | int irq; |
| 47 | imx_dmach_t dma; |
Pavel Pisa | 56ca9040 | 2006-04-02 19:27:07 +0100 | [diff] [blame] | 48 | volatile unsigned int imask; |
| 49 | unsigned int power_mode; |
| 50 | unsigned int present; |
| 51 | struct imxmmc_platform_data *pdata; |
| 52 | |
| 53 | struct mmc_request *req; |
| 54 | struct mmc_command *cmd; |
| 55 | struct mmc_data *data; |
| 56 | |
| 57 | struct timer_list timer; |
| 58 | struct tasklet_struct tasklet; |
| 59 | unsigned int status_reg; |
| 60 | unsigned long pending_events; |
Marc Kleine-Budde | 4b7c0e4 | 2008-10-10 12:05:03 +0200 | [diff] [blame] | 61 | /* Next two fields are there for CPU driven transfers to overcome SDHC deficiencies */ |
Pavel Pisa | 56ca9040 | 2006-04-02 19:27:07 +0100 | [diff] [blame] | 62 | u16 *data_ptr; |
| 63 | unsigned int data_cnt; |
| 64 | atomic_t stuck_timeout; |
| 65 | |
| 66 | unsigned int dma_nents; |
| 67 | unsigned int dma_size; |
| 68 | unsigned int dma_dir; |
| 69 | int dma_allocated; |
| 70 | |
| 71 | unsigned char actual_bus_width; |
Pavel Pisa | 148f93d | 2006-09-07 15:53:29 +0100 | [diff] [blame] | 72 | |
| 73 | int prev_cmd_code; |
Sascha Hauer | 38a41fd | 2008-07-05 10:02:46 +0200 | [diff] [blame] | 74 | |
| 75 | struct clk *clk; |
Pavel Pisa | 56ca9040 | 2006-04-02 19:27:07 +0100 | [diff] [blame] | 76 | }; |
| 77 | |
| 78 | #define IMXMCI_PEND_IRQ_b 0 |
| 79 | #define IMXMCI_PEND_DMA_END_b 1 |
| 80 | #define IMXMCI_PEND_DMA_ERR_b 2 |
| 81 | #define IMXMCI_PEND_WAIT_RESP_b 3 |
| 82 | #define IMXMCI_PEND_DMA_DATA_b 4 |
| 83 | #define IMXMCI_PEND_CPU_DATA_b 5 |
| 84 | #define IMXMCI_PEND_CARD_XCHG_b 6 |
| 85 | #define IMXMCI_PEND_SET_INIT_b 7 |
Pavel Pisa | 81d3842 | 2006-04-30 15:35:54 +0100 | [diff] [blame] | 86 | #define IMXMCI_PEND_STARTED_b 8 |
Pavel Pisa | 56ca9040 | 2006-04-02 19:27:07 +0100 | [diff] [blame] | 87 | |
| 88 | #define IMXMCI_PEND_IRQ_m (1 << IMXMCI_PEND_IRQ_b) |
| 89 | #define IMXMCI_PEND_DMA_END_m (1 << IMXMCI_PEND_DMA_END_b) |
| 90 | #define IMXMCI_PEND_DMA_ERR_m (1 << IMXMCI_PEND_DMA_ERR_b) |
| 91 | #define IMXMCI_PEND_WAIT_RESP_m (1 << IMXMCI_PEND_WAIT_RESP_b) |
| 92 | #define IMXMCI_PEND_DMA_DATA_m (1 << IMXMCI_PEND_DMA_DATA_b) |
| 93 | #define IMXMCI_PEND_CPU_DATA_m (1 << IMXMCI_PEND_CPU_DATA_b) |
| 94 | #define IMXMCI_PEND_CARD_XCHG_m (1 << IMXMCI_PEND_CARD_XCHG_b) |
| 95 | #define IMXMCI_PEND_SET_INIT_m (1 << IMXMCI_PEND_SET_INIT_b) |
Pavel Pisa | 81d3842 | 2006-04-30 15:35:54 +0100 | [diff] [blame] | 96 | #define IMXMCI_PEND_STARTED_m (1 << IMXMCI_PEND_STARTED_b) |
Pavel Pisa | 56ca9040 | 2006-04-02 19:27:07 +0100 | [diff] [blame] | 97 | |
| 98 | static void imxmci_stop_clock(struct imxmci_host *host) |
| 99 | { |
| 100 | int i = 0; |
| 101 | MMC_STR_STP_CLK &= ~STR_STP_CLK_START_CLK; |
Marc Kleine-Budde | 4b7c0e4 | 2008-10-10 12:05:03 +0200 | [diff] [blame] | 102 | while (i < 0x1000) { |
| 103 | if (!(i & 0x7f)) |
Pavel Pisa | 56ca9040 | 2006-04-02 19:27:07 +0100 | [diff] [blame] | 104 | MMC_STR_STP_CLK |= STR_STP_CLK_STOP_CLK; |
| 105 | |
Marc Kleine-Budde | 4b7c0e4 | 2008-10-10 12:05:03 +0200 | [diff] [blame] | 106 | if (!(MMC_STATUS & STATUS_CARD_BUS_CLK_RUN)) { |
Pavel Pisa | 56ca9040 | 2006-04-02 19:27:07 +0100 | [diff] [blame] | 107 | /* Check twice before cut */ |
Marc Kleine-Budde | 4b7c0e4 | 2008-10-10 12:05:03 +0200 | [diff] [blame] | 108 | if (!(MMC_STATUS & STATUS_CARD_BUS_CLK_RUN)) |
Pavel Pisa | 56ca9040 | 2006-04-02 19:27:07 +0100 | [diff] [blame] | 109 | return; |
| 110 | } |
| 111 | |
| 112 | i++; |
| 113 | } |
| 114 | dev_dbg(mmc_dev(host->mmc), "imxmci_stop_clock blocked, no luck\n"); |
| 115 | } |
| 116 | |
Pavel Pisa | 81d3842 | 2006-04-30 15:35:54 +0100 | [diff] [blame] | 117 | static int imxmci_start_clock(struct imxmci_host *host) |
Pavel Pisa | 56ca9040 | 2006-04-02 19:27:07 +0100 | [diff] [blame] | 118 | { |
Pavel Pisa | 81d3842 | 2006-04-30 15:35:54 +0100 | [diff] [blame] | 119 | unsigned int trials = 0; |
| 120 | unsigned int delay_limit = 128; |
| 121 | unsigned long flags; |
Pavel Pisa | 56ca9040 | 2006-04-02 19:27:07 +0100 | [diff] [blame] | 122 | |
Pavel Pisa | 81d3842 | 2006-04-30 15:35:54 +0100 | [diff] [blame] | 123 | MMC_STR_STP_CLK &= ~STR_STP_CLK_STOP_CLK; |
| 124 | |
| 125 | clear_bit(IMXMCI_PEND_STARTED_b, &host->pending_events); |
| 126 | |
| 127 | /* |
| 128 | * Command start of the clock, this usually succeeds in less |
| 129 | * then 6 delay loops, but during card detection (low clockrate) |
| 130 | * it takes up to 5000 delay loops and sometimes fails for the first time |
| 131 | */ |
| 132 | MMC_STR_STP_CLK |= STR_STP_CLK_START_CLK; |
| 133 | |
| 134 | do { |
| 135 | unsigned int delay = delay_limit; |
| 136 | |
Marc Kleine-Budde | 4b7c0e4 | 2008-10-10 12:05:03 +0200 | [diff] [blame] | 137 | while (delay--) { |
| 138 | if (MMC_STATUS & STATUS_CARD_BUS_CLK_RUN) |
Pavel Pisa | 81d3842 | 2006-04-30 15:35:54 +0100 | [diff] [blame] | 139 | /* Check twice before cut */ |
Marc Kleine-Budde | 4b7c0e4 | 2008-10-10 12:05:03 +0200 | [diff] [blame] | 140 | if (MMC_STATUS & STATUS_CARD_BUS_CLK_RUN) |
Pavel Pisa | 81d3842 | 2006-04-30 15:35:54 +0100 | [diff] [blame] | 141 | return 0; |
| 142 | |
Marc Kleine-Budde | 4b7c0e4 | 2008-10-10 12:05:03 +0200 | [diff] [blame] | 143 | if (test_bit(IMXMCI_PEND_STARTED_b, &host->pending_events)) |
Pavel Pisa | 81d3842 | 2006-04-30 15:35:54 +0100 | [diff] [blame] | 144 | return 0; |
Pavel Pisa | 56ca9040 | 2006-04-02 19:27:07 +0100 | [diff] [blame] | 145 | } |
| 146 | |
Pavel Pisa | 81d3842 | 2006-04-30 15:35:54 +0100 | [diff] [blame] | 147 | local_irq_save(flags); |
| 148 | /* |
| 149 | * Ensure, that request is not doubled under all possible circumstances. |
| 150 | * It is possible, that cock running state is missed, because some other |
| 151 | * IRQ or schedule delays this function execution and the clocks has |
| 152 | * been already stopped by other means (response processing, SDHC HW) |
| 153 | */ |
Marc Kleine-Budde | 4b7c0e4 | 2008-10-10 12:05:03 +0200 | [diff] [blame] | 154 | if (!test_bit(IMXMCI_PEND_STARTED_b, &host->pending_events)) |
Pavel Pisa | 81d3842 | 2006-04-30 15:35:54 +0100 | [diff] [blame] | 155 | MMC_STR_STP_CLK |= STR_STP_CLK_START_CLK; |
| 156 | local_irq_restore(flags); |
| 157 | |
Marc Kleine-Budde | 4b7c0e4 | 2008-10-10 12:05:03 +0200 | [diff] [blame] | 158 | } while (++trials < 256); |
Pavel Pisa | 81d3842 | 2006-04-30 15:35:54 +0100 | [diff] [blame] | 159 | |
| 160 | dev_err(mmc_dev(host->mmc), "imxmci_start_clock blocked, no luck\n"); |
| 161 | |
| 162 | return -1; |
Pavel Pisa | 56ca9040 | 2006-04-02 19:27:07 +0100 | [diff] [blame] | 163 | } |
| 164 | |
| 165 | static void imxmci_softreset(void) |
| 166 | { |
| 167 | /* reset sequence */ |
| 168 | MMC_STR_STP_CLK = 0x8; |
| 169 | MMC_STR_STP_CLK = 0xD; |
| 170 | MMC_STR_STP_CLK = 0x5; |
| 171 | MMC_STR_STP_CLK = 0x5; |
| 172 | MMC_STR_STP_CLK = 0x5; |
| 173 | MMC_STR_STP_CLK = 0x5; |
| 174 | MMC_STR_STP_CLK = 0x5; |
| 175 | MMC_STR_STP_CLK = 0x5; |
| 176 | MMC_STR_STP_CLK = 0x5; |
| 177 | MMC_STR_STP_CLK = 0x5; |
| 178 | |
| 179 | MMC_RES_TO = 0xff; |
| 180 | MMC_BLK_LEN = 512; |
| 181 | MMC_NOB = 1; |
| 182 | } |
| 183 | |
| 184 | static int imxmci_busy_wait_for_status(struct imxmci_host *host, |
Marc Kleine-Budde | 4b7c0e4 | 2008-10-10 12:05:03 +0200 | [diff] [blame] | 185 | unsigned int *pstat, unsigned int stat_mask, |
| 186 | int timeout, const char *where) |
Pavel Pisa | 56ca9040 | 2006-04-02 19:27:07 +0100 | [diff] [blame] | 187 | { |
Marc Kleine-Budde | 4b7c0e4 | 2008-10-10 12:05:03 +0200 | [diff] [blame] | 188 | int loops = 0; |
| 189 | |
| 190 | while (!(*pstat & stat_mask)) { |
| 191 | loops += 2; |
| 192 | if (loops >= timeout) { |
Pavel Pisa | 56ca9040 | 2006-04-02 19:27:07 +0100 | [diff] [blame] | 193 | dev_dbg(mmc_dev(host->mmc), "busy wait timeout in %s, STATUS = 0x%x (0x%x)\n", |
| 194 | where, *pstat, stat_mask); |
| 195 | return -1; |
| 196 | } |
| 197 | udelay(2); |
| 198 | *pstat |= MMC_STATUS; |
| 199 | } |
Marc Kleine-Budde | 4b7c0e4 | 2008-10-10 12:05:03 +0200 | [diff] [blame] | 200 | if (!loops) |
Pavel Pisa | 56ca9040 | 2006-04-02 19:27:07 +0100 | [diff] [blame] | 201 | return 0; |
| 202 | |
Pavel Pisa | 2c171bf | 2006-05-19 21:48:03 +0100 | [diff] [blame] | 203 | /* The busy-wait is expected there for clock <8MHz due to SDHC hardware flaws */ |
Marc Kleine-Budde | 4b7c0e4 | 2008-10-10 12:05:03 +0200 | [diff] [blame] | 204 | if (!(stat_mask & STATUS_END_CMD_RESP) || (host->mmc->ios.clock >= 8000000)) |
Pavel Pisa | 2c171bf | 2006-05-19 21:48:03 +0100 | [diff] [blame] | 205 | dev_info(mmc_dev(host->mmc), "busy wait for %d usec in %s, STATUS = 0x%x (0x%x)\n", |
Marc Kleine-Budde | 4b7c0e4 | 2008-10-10 12:05:03 +0200 | [diff] [blame] | 206 | loops, where, *pstat, stat_mask); |
Pavel Pisa | 56ca9040 | 2006-04-02 19:27:07 +0100 | [diff] [blame] | 207 | return loops; |
| 208 | } |
| 209 | |
| 210 | static void imxmci_setup_data(struct imxmci_host *host, struct mmc_data *data) |
| 211 | { |
| 212 | unsigned int nob = data->blocks; |
Russell King | a3fd4a1 | 2006-06-04 17:51:15 +0100 | [diff] [blame] | 213 | unsigned int blksz = data->blksz; |
Pavel Pisa | 56ca9040 | 2006-04-02 19:27:07 +0100 | [diff] [blame] | 214 | unsigned int datasz = nob * blksz; |
| 215 | int i; |
| 216 | |
| 217 | if (data->flags & MMC_DATA_STREAM) |
| 218 | nob = 0xffff; |
| 219 | |
| 220 | host->data = data; |
| 221 | data->bytes_xfered = 0; |
| 222 | |
| 223 | MMC_NOB = nob; |
| 224 | MMC_BLK_LEN = blksz; |
| 225 | |
| 226 | /* |
| 227 | * DMA cannot be used for small block sizes, we have to use CPU driven transfers otherwise. |
| 228 | * We are in big troubles for non-512 byte transfers according to note in the paragraph |
| 229 | * 20.6.7 of User Manual anyway, but we need to be able to transfer SCR at least. |
| 230 | * The situation is even more complex in reality. The SDHC in not able to handle wll |
| 231 | * partial FIFO fills and reads. The length has to be rounded up to burst size multiple. |
| 232 | * This is required for SCR read at least. |
| 233 | */ |
Pavel Pisa | 148f93d | 2006-09-07 15:53:29 +0100 | [diff] [blame] | 234 | if (datasz < 512) { |
Pavel Pisa | 56ca9040 | 2006-04-02 19:27:07 +0100 | [diff] [blame] | 235 | host->dma_size = datasz; |
| 236 | if (data->flags & MMC_DATA_READ) { |
| 237 | host->dma_dir = DMA_FROM_DEVICE; |
| 238 | |
| 239 | /* Hack to enable read SCR */ |
Pavel Pisa | 148f93d | 2006-09-07 15:53:29 +0100 | [diff] [blame] | 240 | MMC_NOB = 1; |
| 241 | MMC_BLK_LEN = 512; |
Pavel Pisa | 56ca9040 | 2006-04-02 19:27:07 +0100 | [diff] [blame] | 242 | } else { |
| 243 | host->dma_dir = DMA_TO_DEVICE; |
| 244 | } |
| 245 | |
| 246 | /* Convert back to virtual address */ |
Marc Kleine-Budde | 4b7c0e4 | 2008-10-10 12:05:03 +0200 | [diff] [blame] | 247 | host->data_ptr = (u16 *)sg_virt(data->sg); |
Pavel Pisa | 56ca9040 | 2006-04-02 19:27:07 +0100 | [diff] [blame] | 248 | host->data_cnt = 0; |
| 249 | |
| 250 | clear_bit(IMXMCI_PEND_DMA_DATA_b, &host->pending_events); |
| 251 | set_bit(IMXMCI_PEND_CPU_DATA_b, &host->pending_events); |
| 252 | |
| 253 | return; |
| 254 | } |
| 255 | |
| 256 | if (data->flags & MMC_DATA_READ) { |
| 257 | host->dma_dir = DMA_FROM_DEVICE; |
| 258 | host->dma_nents = dma_map_sg(mmc_dev(host->mmc), data->sg, |
Marc Kleine-Budde | 4b7c0e4 | 2008-10-10 12:05:03 +0200 | [diff] [blame] | 259 | data->sg_len, host->dma_dir); |
Pavel Pisa | 56ca9040 | 2006-04-02 19:27:07 +0100 | [diff] [blame] | 260 | |
| 261 | imx_dma_setup_sg(host->dma, data->sg, data->sg_len, datasz, |
Marc Kleine-Budde | 4b7c0e4 | 2008-10-10 12:05:03 +0200 | [diff] [blame] | 262 | host->res->start + MMC_BUFFER_ACCESS_OFS, DMA_MODE_READ); |
Pavel Pisa | 56ca9040 | 2006-04-02 19:27:07 +0100 | [diff] [blame] | 263 | |
| 264 | /*imx_dma_setup_mem2dev_ccr(host->dma, DMA_MODE_READ, IMX_DMA_WIDTH_16, CCR_REN);*/ |
| 265 | CCR(host->dma) = CCR_DMOD_LINEAR | CCR_DSIZ_32 | CCR_SMOD_FIFO | CCR_SSIZ_16 | CCR_REN; |
| 266 | } else { |
| 267 | host->dma_dir = DMA_TO_DEVICE; |
| 268 | |
| 269 | host->dma_nents = dma_map_sg(mmc_dev(host->mmc), data->sg, |
Marc Kleine-Budde | 4b7c0e4 | 2008-10-10 12:05:03 +0200 | [diff] [blame] | 270 | data->sg_len, host->dma_dir); |
Pavel Pisa | 56ca9040 | 2006-04-02 19:27:07 +0100 | [diff] [blame] | 271 | |
| 272 | imx_dma_setup_sg(host->dma, data->sg, data->sg_len, datasz, |
Marc Kleine-Budde | 4b7c0e4 | 2008-10-10 12:05:03 +0200 | [diff] [blame] | 273 | host->res->start + MMC_BUFFER_ACCESS_OFS, DMA_MODE_WRITE); |
Pavel Pisa | 56ca9040 | 2006-04-02 19:27:07 +0100 | [diff] [blame] | 274 | |
| 275 | /*imx_dma_setup_mem2dev_ccr(host->dma, DMA_MODE_WRITE, IMX_DMA_WIDTH_16, CCR_REN);*/ |
| 276 | CCR(host->dma) = CCR_SMOD_LINEAR | CCR_SSIZ_32 | CCR_DMOD_FIFO | CCR_DSIZ_16 | CCR_REN; |
| 277 | } |
| 278 | |
| 279 | #if 1 /* This code is there only for consistency checking and can be disabled in future */ |
| 280 | host->dma_size = 0; |
Marc Kleine-Budde | 4b7c0e4 | 2008-10-10 12:05:03 +0200 | [diff] [blame] | 281 | for (i = 0; i < host->dma_nents; i++) |
| 282 | host->dma_size += data->sg[i].length; |
Pavel Pisa | 56ca9040 | 2006-04-02 19:27:07 +0100 | [diff] [blame] | 283 | |
| 284 | if (datasz > host->dma_size) { |
| 285 | dev_err(mmc_dev(host->mmc), "imxmci_setup_data datasz 0x%x > 0x%x dm_size\n", |
Marc Kleine-Budde | 4b7c0e4 | 2008-10-10 12:05:03 +0200 | [diff] [blame] | 286 | datasz, host->dma_size); |
Pavel Pisa | 56ca9040 | 2006-04-02 19:27:07 +0100 | [diff] [blame] | 287 | } |
| 288 | #endif |
| 289 | |
| 290 | host->dma_size = datasz; |
| 291 | |
| 292 | wmb(); |
| 293 | |
Marc Kleine-Budde | 4b7c0e4 | 2008-10-10 12:05:03 +0200 | [diff] [blame] | 294 | if (host->actual_bus_width == MMC_BUS_WIDTH_4) |
Pavel Pisa | 56ca9040 | 2006-04-02 19:27:07 +0100 | [diff] [blame] | 295 | BLR(host->dma) = 0; /* burst 64 byte read / 64 bytes write */ |
| 296 | else |
| 297 | BLR(host->dma) = 16; /* burst 16 byte read / 16 bytes write */ |
| 298 | |
| 299 | RSSR(host->dma) = DMA_REQ_SDHC; |
| 300 | |
| 301 | set_bit(IMXMCI_PEND_DMA_DATA_b, &host->pending_events); |
| 302 | clear_bit(IMXMCI_PEND_CPU_DATA_b, &host->pending_events); |
| 303 | |
| 304 | /* start DMA engine for read, write is delayed after initial response */ |
Marc Kleine-Budde | 4b7c0e4 | 2008-10-10 12:05:03 +0200 | [diff] [blame] | 305 | if (host->dma_dir == DMA_FROM_DEVICE) |
Pavel Pisa | 56ca9040 | 2006-04-02 19:27:07 +0100 | [diff] [blame] | 306 | imx_dma_enable(host->dma); |
Pavel Pisa | 56ca9040 | 2006-04-02 19:27:07 +0100 | [diff] [blame] | 307 | } |
| 308 | |
| 309 | static void imxmci_start_cmd(struct imxmci_host *host, struct mmc_command *cmd, unsigned int cmdat) |
| 310 | { |
| 311 | unsigned long flags; |
| 312 | u32 imask; |
| 313 | |
| 314 | WARN_ON(host->cmd != NULL); |
| 315 | host->cmd = cmd; |
| 316 | |
Pavel Pisa | 2c171bf | 2006-05-19 21:48:03 +0100 | [diff] [blame] | 317 | /* Ensure, that clock are stopped else command programming and start fails */ |
| 318 | imxmci_stop_clock(host); |
| 319 | |
Pavel Pisa | 56ca9040 | 2006-04-02 19:27:07 +0100 | [diff] [blame] | 320 | if (cmd->flags & MMC_RSP_BUSY) |
| 321 | cmdat |= CMD_DAT_CONT_BUSY; |
| 322 | |
| 323 | switch (mmc_resp_type(cmd)) { |
| 324 | case MMC_RSP_R1: /* short CRC, OPCODE */ |
| 325 | case MMC_RSP_R1B:/* short CRC, OPCODE, BUSY */ |
| 326 | cmdat |= CMD_DAT_CONT_RESPONSE_FORMAT_R1; |
| 327 | break; |
| 328 | case MMC_RSP_R2: /* long 136 bit + CRC */ |
| 329 | cmdat |= CMD_DAT_CONT_RESPONSE_FORMAT_R2; |
| 330 | break; |
| 331 | case MMC_RSP_R3: /* short */ |
| 332 | cmdat |= CMD_DAT_CONT_RESPONSE_FORMAT_R3; |
| 333 | break; |
Pavel Pisa | 56ca9040 | 2006-04-02 19:27:07 +0100 | [diff] [blame] | 334 | default: |
| 335 | break; |
| 336 | } |
| 337 | |
Marc Kleine-Budde | 4b7c0e4 | 2008-10-10 12:05:03 +0200 | [diff] [blame] | 338 | if (test_and_clear_bit(IMXMCI_PEND_SET_INIT_b, &host->pending_events)) |
Pavel Pisa | 56ca9040 | 2006-04-02 19:27:07 +0100 | [diff] [blame] | 339 | cmdat |= CMD_DAT_CONT_INIT; /* This command needs init */ |
| 340 | |
Marc Kleine-Budde | 4b7c0e4 | 2008-10-10 12:05:03 +0200 | [diff] [blame] | 341 | if (host->actual_bus_width == MMC_BUS_WIDTH_4) |
Pavel Pisa | 56ca9040 | 2006-04-02 19:27:07 +0100 | [diff] [blame] | 342 | cmdat |= CMD_DAT_CONT_BUS_WIDTH_4; |
| 343 | |
| 344 | MMC_CMD = cmd->opcode; |
| 345 | MMC_ARGH = cmd->arg >> 16; |
| 346 | MMC_ARGL = cmd->arg & 0xffff; |
| 347 | MMC_CMD_DAT_CONT = cmdat; |
| 348 | |
| 349 | atomic_set(&host->stuck_timeout, 0); |
| 350 | set_bit(IMXMCI_PEND_WAIT_RESP_b, &host->pending_events); |
| 351 | |
| 352 | |
| 353 | imask = IMXMCI_INT_MASK_DEFAULT; |
| 354 | imask &= ~INT_MASK_END_CMD_RES; |
Marc Kleine-Budde | 4b7c0e4 | 2008-10-10 12:05:03 +0200 | [diff] [blame] | 355 | if (cmdat & CMD_DAT_CONT_DATA_ENABLE) { |
| 356 | /* imask &= ~INT_MASK_BUF_READY; */ |
Pavel Pisa | 56ca9040 | 2006-04-02 19:27:07 +0100 | [diff] [blame] | 357 | imask &= ~INT_MASK_DATA_TRAN; |
Marc Kleine-Budde | 4b7c0e4 | 2008-10-10 12:05:03 +0200 | [diff] [blame] | 358 | if (cmdat & CMD_DAT_CONT_WRITE) |
Pavel Pisa | 56ca9040 | 2006-04-02 19:27:07 +0100 | [diff] [blame] | 359 | imask &= ~INT_MASK_WRITE_OP_DONE; |
Marc Kleine-Budde | 4b7c0e4 | 2008-10-10 12:05:03 +0200 | [diff] [blame] | 360 | if (test_bit(IMXMCI_PEND_CPU_DATA_b, &host->pending_events)) |
Pavel Pisa | 56ca9040 | 2006-04-02 19:27:07 +0100 | [diff] [blame] | 361 | imask &= ~INT_MASK_BUF_READY; |
| 362 | } |
| 363 | |
| 364 | spin_lock_irqsave(&host->lock, flags); |
| 365 | host->imask = imask; |
| 366 | MMC_INT_MASK = host->imask; |
| 367 | spin_unlock_irqrestore(&host->lock, flags); |
| 368 | |
| 369 | dev_dbg(mmc_dev(host->mmc), "CMD%02d (0x%02x) mask set to 0x%04x\n", |
| 370 | cmd->opcode, cmd->opcode, imask); |
| 371 | |
| 372 | imxmci_start_clock(host); |
| 373 | } |
| 374 | |
| 375 | static void imxmci_finish_request(struct imxmci_host *host, struct mmc_request *req) |
| 376 | { |
| 377 | unsigned long flags; |
| 378 | |
| 379 | spin_lock_irqsave(&host->lock, flags); |
| 380 | |
| 381 | host->pending_events &= ~(IMXMCI_PEND_WAIT_RESP_m | IMXMCI_PEND_DMA_END_m | |
Marc Kleine-Budde | 4b7c0e4 | 2008-10-10 12:05:03 +0200 | [diff] [blame] | 382 | IMXMCI_PEND_DMA_DATA_m | IMXMCI_PEND_CPU_DATA_m); |
Pavel Pisa | 56ca9040 | 2006-04-02 19:27:07 +0100 | [diff] [blame] | 383 | |
| 384 | host->imask = IMXMCI_INT_MASK_DEFAULT; |
| 385 | MMC_INT_MASK = host->imask; |
| 386 | |
| 387 | spin_unlock_irqrestore(&host->lock, flags); |
| 388 | |
Marc Kleine-Budde | 4b7c0e4 | 2008-10-10 12:05:03 +0200 | [diff] [blame] | 389 | if (req && req->cmd) |
Pavel Pisa | 148f93d | 2006-09-07 15:53:29 +0100 | [diff] [blame] | 390 | host->prev_cmd_code = req->cmd->opcode; |
| 391 | |
Pavel Pisa | 56ca9040 | 2006-04-02 19:27:07 +0100 | [diff] [blame] | 392 | host->req = NULL; |
| 393 | host->cmd = NULL; |
| 394 | host->data = NULL; |
| 395 | mmc_request_done(host->mmc, req); |
| 396 | } |
| 397 | |
| 398 | static int imxmci_finish_data(struct imxmci_host *host, unsigned int stat) |
| 399 | { |
| 400 | struct mmc_data *data = host->data; |
| 401 | int data_error; |
| 402 | |
Marc Kleine-Budde | 4b7c0e4 | 2008-10-10 12:05:03 +0200 | [diff] [blame] | 403 | if (test_and_clear_bit(IMXMCI_PEND_DMA_DATA_b, &host->pending_events)) { |
Pavel Pisa | 56ca9040 | 2006-04-02 19:27:07 +0100 | [diff] [blame] | 404 | imx_dma_disable(host->dma); |
| 405 | dma_unmap_sg(mmc_dev(host->mmc), data->sg, host->dma_nents, |
| 406 | host->dma_dir); |
| 407 | } |
| 408 | |
Marc Kleine-Budde | 4b7c0e4 | 2008-10-10 12:05:03 +0200 | [diff] [blame] | 409 | if (stat & STATUS_ERR_MASK) { |
| 410 | dev_dbg(mmc_dev(host->mmc), "request failed. status: 0x%08x\n", stat); |
| 411 | if (stat & (STATUS_CRC_READ_ERR | STATUS_CRC_WRITE_ERR)) |
Pierre Ossman | 17b0429 | 2007-07-22 22:18:46 +0200 | [diff] [blame] | 412 | data->error = -EILSEQ; |
Marc Kleine-Budde | 4b7c0e4 | 2008-10-10 12:05:03 +0200 | [diff] [blame] | 413 | else if (stat & STATUS_TIME_OUT_READ) |
Pierre Ossman | 17b0429 | 2007-07-22 22:18:46 +0200 | [diff] [blame] | 414 | data->error = -ETIMEDOUT; |
Pavel Pisa | 56ca9040 | 2006-04-02 19:27:07 +0100 | [diff] [blame] | 415 | else |
Pierre Ossman | 17b0429 | 2007-07-22 22:18:46 +0200 | [diff] [blame] | 416 | data->error = -EIO; |
Pavel Pisa | 56ca9040 | 2006-04-02 19:27:07 +0100 | [diff] [blame] | 417 | } else { |
| 418 | data->bytes_xfered = host->dma_size; |
| 419 | } |
| 420 | |
| 421 | data_error = data->error; |
| 422 | |
| 423 | host->data = NULL; |
| 424 | |
| 425 | return data_error; |
| 426 | } |
| 427 | |
| 428 | static int imxmci_cmd_done(struct imxmci_host *host, unsigned int stat) |
| 429 | { |
| 430 | struct mmc_command *cmd = host->cmd; |
| 431 | int i; |
Marc Kleine-Budde | 4b7c0e4 | 2008-10-10 12:05:03 +0200 | [diff] [blame] | 432 | u32 a, b, c; |
Pavel Pisa | 56ca9040 | 2006-04-02 19:27:07 +0100 | [diff] [blame] | 433 | struct mmc_data *data = host->data; |
| 434 | |
| 435 | if (!cmd) |
| 436 | return 0; |
| 437 | |
| 438 | host->cmd = NULL; |
| 439 | |
| 440 | if (stat & STATUS_TIME_OUT_RESP) { |
| 441 | dev_dbg(mmc_dev(host->mmc), "CMD TIMEOUT\n"); |
Pierre Ossman | 17b0429 | 2007-07-22 22:18:46 +0200 | [diff] [blame] | 442 | cmd->error = -ETIMEDOUT; |
Pavel Pisa | 56ca9040 | 2006-04-02 19:27:07 +0100 | [diff] [blame] | 443 | } else if (stat & STATUS_RESP_CRC_ERR && cmd->flags & MMC_RSP_CRC) { |
| 444 | dev_dbg(mmc_dev(host->mmc), "cmd crc error\n"); |
Pierre Ossman | 17b0429 | 2007-07-22 22:18:46 +0200 | [diff] [blame] | 445 | cmd->error = -EILSEQ; |
Pavel Pisa | 56ca9040 | 2006-04-02 19:27:07 +0100 | [diff] [blame] | 446 | } |
| 447 | |
Marc Kleine-Budde | 4b7c0e4 | 2008-10-10 12:05:03 +0200 | [diff] [blame] | 448 | if (cmd->flags & MMC_RSP_PRESENT) { |
| 449 | if (cmd->flags & MMC_RSP_136) { |
Pavel Pisa | 56ca9040 | 2006-04-02 19:27:07 +0100 | [diff] [blame] | 450 | for (i = 0; i < 4; i++) { |
Marc Kleine-Budde | 4b7c0e4 | 2008-10-10 12:05:03 +0200 | [diff] [blame] | 451 | u32 d = MMC_RES_FIFO & 0xffff; |
| 452 | u32 e = MMC_RES_FIFO & 0xffff; |
| 453 | cmd->resp[i] = d << 16 | e; |
Pavel Pisa | 56ca9040 | 2006-04-02 19:27:07 +0100 | [diff] [blame] | 454 | } |
| 455 | } else { |
| 456 | a = MMC_RES_FIFO & 0xffff; |
| 457 | b = MMC_RES_FIFO & 0xffff; |
| 458 | c = MMC_RES_FIFO & 0xffff; |
Marc Kleine-Budde | 4b7c0e4 | 2008-10-10 12:05:03 +0200 | [diff] [blame] | 459 | cmd->resp[0] = a << 24 | b << 8 | c >> 8; |
Pavel Pisa | 56ca9040 | 2006-04-02 19:27:07 +0100 | [diff] [blame] | 460 | } |
| 461 | } |
| 462 | |
| 463 | dev_dbg(mmc_dev(host->mmc), "RESP 0x%08x, 0x%08x, 0x%08x, 0x%08x, error %d\n", |
| 464 | cmd->resp[0], cmd->resp[1], cmd->resp[2], cmd->resp[3], cmd->error); |
| 465 | |
Pierre Ossman | 17b0429 | 2007-07-22 22:18:46 +0200 | [diff] [blame] | 466 | if (data && !cmd->error && !(stat & STATUS_ERR_MASK)) { |
Pavel Pisa | 56ca9040 | 2006-04-02 19:27:07 +0100 | [diff] [blame] | 467 | if (host->req->data->flags & MMC_DATA_WRITE) { |
| 468 | |
| 469 | /* Wait for FIFO to be empty before starting DMA write */ |
| 470 | |
| 471 | stat = MMC_STATUS; |
Marc Kleine-Budde | 4b7c0e4 | 2008-10-10 12:05:03 +0200 | [diff] [blame] | 472 | if (imxmci_busy_wait_for_status(host, &stat, |
| 473 | STATUS_APPL_BUFF_FE, |
| 474 | 40, "imxmci_cmd_done DMA WR") < 0) { |
Pierre Ossman | 17b0429 | 2007-07-22 22:18:46 +0200 | [diff] [blame] | 475 | cmd->error = -EIO; |
Pavel Pisa | 56ca9040 | 2006-04-02 19:27:07 +0100 | [diff] [blame] | 476 | imxmci_finish_data(host, stat); |
Marc Kleine-Budde | 4b7c0e4 | 2008-10-10 12:05:03 +0200 | [diff] [blame] | 477 | if (host->req) |
Pavel Pisa | 56ca9040 | 2006-04-02 19:27:07 +0100 | [diff] [blame] | 478 | imxmci_finish_request(host, host->req); |
| 479 | dev_warn(mmc_dev(host->mmc), "STATUS = 0x%04x\n", |
Marc Kleine-Budde | 4b7c0e4 | 2008-10-10 12:05:03 +0200 | [diff] [blame] | 480 | stat); |
Pavel Pisa | 56ca9040 | 2006-04-02 19:27:07 +0100 | [diff] [blame] | 481 | return 0; |
| 482 | } |
| 483 | |
Marc Kleine-Budde | 4b7c0e4 | 2008-10-10 12:05:03 +0200 | [diff] [blame] | 484 | if (test_bit(IMXMCI_PEND_DMA_DATA_b, &host->pending_events)) |
Pavel Pisa | 56ca9040 | 2006-04-02 19:27:07 +0100 | [diff] [blame] | 485 | imx_dma_enable(host->dma); |
Pavel Pisa | 56ca9040 | 2006-04-02 19:27:07 +0100 | [diff] [blame] | 486 | } |
| 487 | } else { |
| 488 | struct mmc_request *req; |
| 489 | imxmci_stop_clock(host); |
| 490 | req = host->req; |
| 491 | |
Marc Kleine-Budde | 4b7c0e4 | 2008-10-10 12:05:03 +0200 | [diff] [blame] | 492 | if (data) |
Pavel Pisa | 56ca9040 | 2006-04-02 19:27:07 +0100 | [diff] [blame] | 493 | imxmci_finish_data(host, stat); |
| 494 | |
Marc Kleine-Budde | 4b7c0e4 | 2008-10-10 12:05:03 +0200 | [diff] [blame] | 495 | if (req) |
Pavel Pisa | 56ca9040 | 2006-04-02 19:27:07 +0100 | [diff] [blame] | 496 | imxmci_finish_request(host, req); |
Marc Kleine-Budde | 4b7c0e4 | 2008-10-10 12:05:03 +0200 | [diff] [blame] | 497 | else |
Pavel Pisa | 56ca9040 | 2006-04-02 19:27:07 +0100 | [diff] [blame] | 498 | dev_warn(mmc_dev(host->mmc), "imxmci_cmd_done: no request to finish\n"); |
Pavel Pisa | 56ca9040 | 2006-04-02 19:27:07 +0100 | [diff] [blame] | 499 | } |
| 500 | |
| 501 | return 1; |
| 502 | } |
| 503 | |
| 504 | static int imxmci_data_done(struct imxmci_host *host, unsigned int stat) |
| 505 | { |
| 506 | struct mmc_data *data = host->data; |
| 507 | int data_error; |
| 508 | |
| 509 | if (!data) |
| 510 | return 0; |
| 511 | |
| 512 | data_error = imxmci_finish_data(host, stat); |
| 513 | |
Russell King | 58741e8 | 2006-05-02 20:02:39 +0100 | [diff] [blame] | 514 | if (host->req->stop) { |
Pavel Pisa | 56ca9040 | 2006-04-02 19:27:07 +0100 | [diff] [blame] | 515 | imxmci_stop_clock(host); |
| 516 | imxmci_start_cmd(host, host->req->stop, 0); |
| 517 | } else { |
| 518 | struct mmc_request *req; |
| 519 | req = host->req; |
Marc Kleine-Budde | 4b7c0e4 | 2008-10-10 12:05:03 +0200 | [diff] [blame] | 520 | if (req) |
Pavel Pisa | 56ca9040 | 2006-04-02 19:27:07 +0100 | [diff] [blame] | 521 | imxmci_finish_request(host, req); |
Marc Kleine-Budde | 4b7c0e4 | 2008-10-10 12:05:03 +0200 | [diff] [blame] | 522 | else |
Pavel Pisa | 56ca9040 | 2006-04-02 19:27:07 +0100 | [diff] [blame] | 523 | dev_warn(mmc_dev(host->mmc), "imxmci_data_done: no request to finish\n"); |
Pavel Pisa | 56ca9040 | 2006-04-02 19:27:07 +0100 | [diff] [blame] | 524 | } |
| 525 | |
| 526 | return 1; |
| 527 | } |
| 528 | |
| 529 | static int imxmci_cpu_driven_data(struct imxmci_host *host, unsigned int *pstat) |
| 530 | { |
| 531 | int i; |
| 532 | int burst_len; |
Pavel Pisa | 56ca9040 | 2006-04-02 19:27:07 +0100 | [diff] [blame] | 533 | int trans_done = 0; |
| 534 | unsigned int stat = *pstat; |
| 535 | |
Marc Kleine-Budde | 4b7c0e4 | 2008-10-10 12:05:03 +0200 | [diff] [blame] | 536 | if (host->actual_bus_width != MMC_BUS_WIDTH_4) |
Pavel Pisa | 56ca9040 | 2006-04-02 19:27:07 +0100 | [diff] [blame] | 537 | burst_len = 16; |
| 538 | else |
| 539 | burst_len = 64; |
| 540 | |
| 541 | /* This is unfortunately required */ |
| 542 | dev_dbg(mmc_dev(host->mmc), "imxmci_cpu_driven_data running STATUS = 0x%x\n", |
| 543 | stat); |
| 544 | |
Pavel Pisa | 148f93d | 2006-09-07 15:53:29 +0100 | [diff] [blame] | 545 | udelay(20); /* required for clocks < 8MHz*/ |
| 546 | |
Marc Kleine-Budde | 4b7c0e4 | 2008-10-10 12:05:03 +0200 | [diff] [blame] | 547 | if (host->dma_dir == DMA_FROM_DEVICE) { |
Pavel Pisa | 56ca9040 | 2006-04-02 19:27:07 +0100 | [diff] [blame] | 548 | imxmci_busy_wait_for_status(host, &stat, |
Marc Kleine-Budde | 4b7c0e4 | 2008-10-10 12:05:03 +0200 | [diff] [blame] | 549 | STATUS_APPL_BUFF_FF | STATUS_DATA_TRANS_DONE | |
| 550 | STATUS_TIME_OUT_READ, |
| 551 | 50, "imxmci_cpu_driven_data read"); |
Pavel Pisa | 56ca9040 | 2006-04-02 19:27:07 +0100 | [diff] [blame] | 552 | |
Marc Kleine-Budde | 4b7c0e4 | 2008-10-10 12:05:03 +0200 | [diff] [blame] | 553 | while ((stat & (STATUS_APPL_BUFF_FF | STATUS_DATA_TRANS_DONE)) && |
| 554 | !(stat & STATUS_TIME_OUT_READ) && |
| 555 | (host->data_cnt < 512)) { |
Pavel Pisa | 148f93d | 2006-09-07 15:53:29 +0100 | [diff] [blame] | 556 | |
| 557 | udelay(20); /* required for clocks < 8MHz*/ |
Pavel Pisa | 56ca9040 | 2006-04-02 19:27:07 +0100 | [diff] [blame] | 558 | |
Marc Kleine-Budde | 4b7c0e4 | 2008-10-10 12:05:03 +0200 | [diff] [blame] | 559 | for (i = burst_len; i >= 2 ; i -= 2) { |
Pavel Pisa | 148f93d | 2006-09-07 15:53:29 +0100 | [diff] [blame] | 560 | u16 data; |
| 561 | data = MMC_BUFFER_ACCESS; |
| 562 | udelay(10); /* required for clocks < 8MHz*/ |
Marc Kleine-Budde | 4b7c0e4 | 2008-10-10 12:05:03 +0200 | [diff] [blame] | 563 | if (host->data_cnt+2 <= host->dma_size) { |
Pavel Pisa | 148f93d | 2006-09-07 15:53:29 +0100 | [diff] [blame] | 564 | *(host->data_ptr++) = data; |
| 565 | } else { |
Marc Kleine-Budde | 4b7c0e4 | 2008-10-10 12:05:03 +0200 | [diff] [blame] | 566 | if (host->data_cnt < host->dma_size) |
| 567 | *(u8 *)(host->data_ptr) = data; |
Pavel Pisa | 148f93d | 2006-09-07 15:53:29 +0100 | [diff] [blame] | 568 | } |
| 569 | host->data_cnt += 2; |
Pavel Pisa | 56ca9040 | 2006-04-02 19:27:07 +0100 | [diff] [blame] | 570 | } |
| 571 | |
Pavel Pisa | 56ca9040 | 2006-04-02 19:27:07 +0100 | [diff] [blame] | 572 | stat = MMC_STATUS; |
| 573 | |
Pavel Pisa | 148f93d | 2006-09-07 15:53:29 +0100 | [diff] [blame] | 574 | dev_dbg(mmc_dev(host->mmc), "imxmci_cpu_driven_data read %d burst %d STATUS = 0x%x\n", |
| 575 | host->data_cnt, burst_len, stat); |
Pavel Pisa | 56ca9040 | 2006-04-02 19:27:07 +0100 | [diff] [blame] | 576 | } |
Pavel Pisa | 148f93d | 2006-09-07 15:53:29 +0100 | [diff] [blame] | 577 | |
Marc Kleine-Budde | 4b7c0e4 | 2008-10-10 12:05:03 +0200 | [diff] [blame] | 578 | if ((stat & STATUS_DATA_TRANS_DONE) && (host->data_cnt >= 512)) |
Pavel Pisa | 148f93d | 2006-09-07 15:53:29 +0100 | [diff] [blame] | 579 | trans_done = 1; |
| 580 | |
Marc Kleine-Budde | 4b7c0e4 | 2008-10-10 12:05:03 +0200 | [diff] [blame] | 581 | if (host->dma_size & 0x1ff) |
Pavel Pisa | 148f93d | 2006-09-07 15:53:29 +0100 | [diff] [blame] | 582 | stat &= ~STATUS_CRC_READ_ERR; |
| 583 | |
Marc Kleine-Budde | 4b7c0e4 | 2008-10-10 12:05:03 +0200 | [diff] [blame] | 584 | if (stat & STATUS_TIME_OUT_READ) { |
Pavel Pisa | 2cb3320 | 2007-03-08 00:00:40 +0100 | [diff] [blame] | 585 | dev_dbg(mmc_dev(host->mmc), "imxmci_cpu_driven_data read timeout STATUS = 0x%x\n", |
| 586 | stat); |
| 587 | trans_done = -1; |
| 588 | } |
| 589 | |
Pavel Pisa | 56ca9040 | 2006-04-02 19:27:07 +0100 | [diff] [blame] | 590 | } else { |
| 591 | imxmci_busy_wait_for_status(host, &stat, |
Marc Kleine-Budde | 4b7c0e4 | 2008-10-10 12:05:03 +0200 | [diff] [blame] | 592 | STATUS_APPL_BUFF_FE, |
| 593 | 20, "imxmci_cpu_driven_data write"); |
Pavel Pisa | 56ca9040 | 2006-04-02 19:27:07 +0100 | [diff] [blame] | 594 | |
Marc Kleine-Budde | 4b7c0e4 | 2008-10-10 12:05:03 +0200 | [diff] [blame] | 595 | while ((stat & STATUS_APPL_BUFF_FE) && |
| 596 | (host->data_cnt < host->dma_size)) { |
| 597 | if (burst_len >= host->dma_size - host->data_cnt) { |
Pavel Pisa | 56ca9040 | 2006-04-02 19:27:07 +0100 | [diff] [blame] | 598 | burst_len = host->dma_size - host->data_cnt; |
| 599 | host->data_cnt = host->dma_size; |
| 600 | trans_done = 1; |
| 601 | } else { |
| 602 | host->data_cnt += burst_len; |
| 603 | } |
| 604 | |
Marc Kleine-Budde | 4b7c0e4 | 2008-10-10 12:05:03 +0200 | [diff] [blame] | 605 | for (i = burst_len; i > 0 ; i -= 2) |
Pavel Pisa | 56ca9040 | 2006-04-02 19:27:07 +0100 | [diff] [blame] | 606 | MMC_BUFFER_ACCESS = *(host->data_ptr++); |
| 607 | |
| 608 | stat = MMC_STATUS; |
| 609 | |
| 610 | dev_dbg(mmc_dev(host->mmc), "imxmci_cpu_driven_data write burst %d STATUS = 0x%x\n", |
| 611 | burst_len, stat); |
| 612 | } |
| 613 | } |
| 614 | |
| 615 | *pstat = stat; |
| 616 | |
| 617 | return trans_done; |
| 618 | } |
| 619 | |
David Howells | 7d12e78 | 2006-10-05 14:55:46 +0100 | [diff] [blame] | 620 | static void imxmci_dma_irq(int dma, void *devid) |
Pavel Pisa | 56ca9040 | 2006-04-02 19:27:07 +0100 | [diff] [blame] | 621 | { |
| 622 | struct imxmci_host *host = devid; |
| 623 | uint32_t stat = MMC_STATUS; |
| 624 | |
| 625 | atomic_set(&host->stuck_timeout, 0); |
| 626 | host->status_reg = stat; |
| 627 | set_bit(IMXMCI_PEND_DMA_END_b, &host->pending_events); |
| 628 | tasklet_schedule(&host->tasklet); |
| 629 | } |
| 630 | |
David Howells | 7d12e78 | 2006-10-05 14:55:46 +0100 | [diff] [blame] | 631 | static irqreturn_t imxmci_irq(int irq, void *devid) |
Pavel Pisa | 56ca9040 | 2006-04-02 19:27:07 +0100 | [diff] [blame] | 632 | { |
| 633 | struct imxmci_host *host = devid; |
| 634 | uint32_t stat = MMC_STATUS; |
| 635 | int handled = 1; |
| 636 | |
| 637 | MMC_INT_MASK = host->imask | INT_MASK_SDIO | INT_MASK_AUTO_CARD_DETECT; |
| 638 | |
| 639 | atomic_set(&host->stuck_timeout, 0); |
| 640 | host->status_reg = stat; |
| 641 | set_bit(IMXMCI_PEND_IRQ_b, &host->pending_events); |
Pavel Pisa | 81d3842 | 2006-04-30 15:35:54 +0100 | [diff] [blame] | 642 | set_bit(IMXMCI_PEND_STARTED_b, &host->pending_events); |
Pavel Pisa | 56ca9040 | 2006-04-02 19:27:07 +0100 | [diff] [blame] | 643 | tasklet_schedule(&host->tasklet); |
| 644 | |
| 645 | return IRQ_RETVAL(handled);; |
| 646 | } |
| 647 | |
| 648 | static void imxmci_tasklet_fnc(unsigned long data) |
| 649 | { |
| 650 | struct imxmci_host *host = (struct imxmci_host *)data; |
| 651 | u32 stat; |
| 652 | unsigned int data_dir_mask = 0; /* STATUS_WR_CRC_ERROR_CODE_MASK */ |
| 653 | int timeout = 0; |
| 654 | |
Marc Kleine-Budde | 4b7c0e4 | 2008-10-10 12:05:03 +0200 | [diff] [blame] | 655 | if (atomic_read(&host->stuck_timeout) > 4) { |
Pavel Pisa | 56ca9040 | 2006-04-02 19:27:07 +0100 | [diff] [blame] | 656 | char *what; |
| 657 | timeout = 1; |
| 658 | stat = MMC_STATUS; |
| 659 | host->status_reg = stat; |
| 660 | if (test_bit(IMXMCI_PEND_WAIT_RESP_b, &host->pending_events)) |
| 661 | if (test_bit(IMXMCI_PEND_DMA_DATA_b, &host->pending_events)) |
| 662 | what = "RESP+DMA"; |
| 663 | else |
| 664 | what = "RESP"; |
| 665 | else |
| 666 | if (test_bit(IMXMCI_PEND_DMA_DATA_b, &host->pending_events)) |
Marc Kleine-Budde | 4b7c0e4 | 2008-10-10 12:05:03 +0200 | [diff] [blame] | 667 | if (test_bit(IMXMCI_PEND_DMA_END_b, &host->pending_events)) |
Pavel Pisa | 56ca9040 | 2006-04-02 19:27:07 +0100 | [diff] [blame] | 668 | what = "DATA"; |
| 669 | else |
| 670 | what = "DMA"; |
| 671 | else |
| 672 | what = "???"; |
| 673 | |
| 674 | dev_err(mmc_dev(host->mmc), "%s TIMEOUT, hardware stucked STATUS = 0x%04x IMASK = 0x%04x\n", |
Marc Kleine-Budde | 4b7c0e4 | 2008-10-10 12:05:03 +0200 | [diff] [blame] | 675 | what, stat, MMC_INT_MASK); |
Pavel Pisa | 56ca9040 | 2006-04-02 19:27:07 +0100 | [diff] [blame] | 676 | dev_err(mmc_dev(host->mmc), "CMD_DAT_CONT = 0x%04x, MMC_BLK_LEN = 0x%04x, MMC_NOB = 0x%04x, DMA_CCR = 0x%08x\n", |
Marc Kleine-Budde | 4b7c0e4 | 2008-10-10 12:05:03 +0200 | [diff] [blame] | 677 | MMC_CMD_DAT_CONT, MMC_BLK_LEN, MMC_NOB, CCR(host->dma)); |
Pavel Pisa | 148f93d | 2006-09-07 15:53:29 +0100 | [diff] [blame] | 678 | dev_err(mmc_dev(host->mmc), "CMD%d, prevCMD%d, bus %d-bit, dma_size = 0x%x\n", |
Marc Kleine-Budde | 4b7c0e4 | 2008-10-10 12:05:03 +0200 | [diff] [blame] | 679 | host->cmd?host->cmd->opcode:0, host->prev_cmd_code, 1 << host->actual_bus_width, host->dma_size); |
Pavel Pisa | 56ca9040 | 2006-04-02 19:27:07 +0100 | [diff] [blame] | 680 | } |
| 681 | |
Marc Kleine-Budde | 4b7c0e4 | 2008-10-10 12:05:03 +0200 | [diff] [blame] | 682 | if (!host->present || timeout) |
Pavel Pisa | 56ca9040 | 2006-04-02 19:27:07 +0100 | [diff] [blame] | 683 | host->status_reg = STATUS_TIME_OUT_RESP | STATUS_TIME_OUT_READ | |
Marc Kleine-Budde | 4b7c0e4 | 2008-10-10 12:05:03 +0200 | [diff] [blame] | 684 | STATUS_CRC_READ_ERR | STATUS_CRC_WRITE_ERR; |
Pavel Pisa | 56ca9040 | 2006-04-02 19:27:07 +0100 | [diff] [blame] | 685 | |
Marc Kleine-Budde | 4b7c0e4 | 2008-10-10 12:05:03 +0200 | [diff] [blame] | 686 | if (test_bit(IMXMCI_PEND_IRQ_b, &host->pending_events) || timeout) { |
Pavel Pisa | 56ca9040 | 2006-04-02 19:27:07 +0100 | [diff] [blame] | 687 | clear_bit(IMXMCI_PEND_IRQ_b, &host->pending_events); |
| 688 | |
| 689 | stat = MMC_STATUS; |
| 690 | /* |
| 691 | * This is not required in theory, but there is chance to miss some flag |
| 692 | * which clears automatically by mask write, FreeScale original code keeps |
| 693 | * stat from IRQ time so do I |
| 694 | */ |
| 695 | stat |= host->status_reg; |
| 696 | |
Marc Kleine-Budde | 4b7c0e4 | 2008-10-10 12:05:03 +0200 | [diff] [blame] | 697 | if (test_bit(IMXMCI_PEND_CPU_DATA_b, &host->pending_events)) |
Pavel Pisa | 2cb3320 | 2007-03-08 00:00:40 +0100 | [diff] [blame] | 698 | stat &= ~STATUS_CRC_READ_ERR; |
| 699 | |
Marc Kleine-Budde | 4b7c0e4 | 2008-10-10 12:05:03 +0200 | [diff] [blame] | 700 | if (test_bit(IMXMCI_PEND_WAIT_RESP_b, &host->pending_events)) { |
Pavel Pisa | 56ca9040 | 2006-04-02 19:27:07 +0100 | [diff] [blame] | 701 | imxmci_busy_wait_for_status(host, &stat, |
Marc Kleine-Budde | 4b7c0e4 | 2008-10-10 12:05:03 +0200 | [diff] [blame] | 702 | STATUS_END_CMD_RESP | STATUS_ERR_MASK, |
| 703 | 20, "imxmci_tasklet_fnc resp (ERRATUM #4)"); |
Pavel Pisa | 56ca9040 | 2006-04-02 19:27:07 +0100 | [diff] [blame] | 704 | } |
| 705 | |
Marc Kleine-Budde | 4b7c0e4 | 2008-10-10 12:05:03 +0200 | [diff] [blame] | 706 | if (stat & (STATUS_END_CMD_RESP | STATUS_ERR_MASK)) { |
| 707 | if (test_and_clear_bit(IMXMCI_PEND_WAIT_RESP_b, &host->pending_events)) |
Pavel Pisa | 56ca9040 | 2006-04-02 19:27:07 +0100 | [diff] [blame] | 708 | imxmci_cmd_done(host, stat); |
Marc Kleine-Budde | 4b7c0e4 | 2008-10-10 12:05:03 +0200 | [diff] [blame] | 709 | if (host->data && (stat & STATUS_ERR_MASK)) |
Pavel Pisa | 56ca9040 | 2006-04-02 19:27:07 +0100 | [diff] [blame] | 710 | imxmci_data_done(host, stat); |
| 711 | } |
| 712 | |
Marc Kleine-Budde | 4b7c0e4 | 2008-10-10 12:05:03 +0200 | [diff] [blame] | 713 | if (test_bit(IMXMCI_PEND_CPU_DATA_b, &host->pending_events)) { |
Pavel Pisa | 56ca9040 | 2006-04-02 19:27:07 +0100 | [diff] [blame] | 714 | stat |= MMC_STATUS; |
Marc Kleine-Budde | 4b7c0e4 | 2008-10-10 12:05:03 +0200 | [diff] [blame] | 715 | if (imxmci_cpu_driven_data(host, &stat)) { |
| 716 | if (test_and_clear_bit(IMXMCI_PEND_WAIT_RESP_b, &host->pending_events)) |
Pavel Pisa | 56ca9040 | 2006-04-02 19:27:07 +0100 | [diff] [blame] | 717 | imxmci_cmd_done(host, stat); |
| 718 | atomic_clear_mask(IMXMCI_PEND_IRQ_m|IMXMCI_PEND_CPU_DATA_m, |
Marc Kleine-Budde | 4b7c0e4 | 2008-10-10 12:05:03 +0200 | [diff] [blame] | 719 | &host->pending_events); |
Pavel Pisa | 56ca9040 | 2006-04-02 19:27:07 +0100 | [diff] [blame] | 720 | imxmci_data_done(host, stat); |
| 721 | } |
| 722 | } |
| 723 | } |
| 724 | |
Marc Kleine-Budde | 4b7c0e4 | 2008-10-10 12:05:03 +0200 | [diff] [blame] | 725 | if (test_bit(IMXMCI_PEND_DMA_END_b, &host->pending_events) && |
| 726 | !test_bit(IMXMCI_PEND_WAIT_RESP_b, &host->pending_events)) { |
Pavel Pisa | 56ca9040 | 2006-04-02 19:27:07 +0100 | [diff] [blame] | 727 | |
| 728 | stat = MMC_STATUS; |
| 729 | /* Same as above */ |
| 730 | stat |= host->status_reg; |
| 731 | |
Marc Kleine-Budde | 4b7c0e4 | 2008-10-10 12:05:03 +0200 | [diff] [blame] | 732 | if (host->dma_dir == DMA_TO_DEVICE) |
Pavel Pisa | 56ca9040 | 2006-04-02 19:27:07 +0100 | [diff] [blame] | 733 | data_dir_mask = STATUS_WRITE_OP_DONE; |
Marc Kleine-Budde | 4b7c0e4 | 2008-10-10 12:05:03 +0200 | [diff] [blame] | 734 | else |
Pavel Pisa | 56ca9040 | 2006-04-02 19:27:07 +0100 | [diff] [blame] | 735 | data_dir_mask = STATUS_DATA_TRANS_DONE; |
Pavel Pisa | 56ca9040 | 2006-04-02 19:27:07 +0100 | [diff] [blame] | 736 | |
Marc Kleine-Budde | 4b7c0e4 | 2008-10-10 12:05:03 +0200 | [diff] [blame] | 737 | if (stat & data_dir_mask) { |
Pavel Pisa | 56ca9040 | 2006-04-02 19:27:07 +0100 | [diff] [blame] | 738 | clear_bit(IMXMCI_PEND_DMA_END_b, &host->pending_events); |
| 739 | imxmci_data_done(host, stat); |
| 740 | } |
| 741 | } |
| 742 | |
Marc Kleine-Budde | 4b7c0e4 | 2008-10-10 12:05:03 +0200 | [diff] [blame] | 743 | if (test_and_clear_bit(IMXMCI_PEND_CARD_XCHG_b, &host->pending_events)) { |
Pavel Pisa | 56ca9040 | 2006-04-02 19:27:07 +0100 | [diff] [blame] | 744 | |
Marc Kleine-Budde | 4b7c0e4 | 2008-10-10 12:05:03 +0200 | [diff] [blame] | 745 | if (host->cmd) |
Pavel Pisa | 56ca9040 | 2006-04-02 19:27:07 +0100 | [diff] [blame] | 746 | imxmci_cmd_done(host, STATUS_TIME_OUT_RESP); |
| 747 | |
Marc Kleine-Budde | 4b7c0e4 | 2008-10-10 12:05:03 +0200 | [diff] [blame] | 748 | if (host->data) |
Pavel Pisa | 56ca9040 | 2006-04-02 19:27:07 +0100 | [diff] [blame] | 749 | imxmci_data_done(host, STATUS_TIME_OUT_READ | |
| 750 | STATUS_CRC_READ_ERR | STATUS_CRC_WRITE_ERR); |
| 751 | |
Marc Kleine-Budde | 4b7c0e4 | 2008-10-10 12:05:03 +0200 | [diff] [blame] | 752 | if (host->req) |
Pavel Pisa | 56ca9040 | 2006-04-02 19:27:07 +0100 | [diff] [blame] | 753 | imxmci_finish_request(host, host->req); |
| 754 | |
| 755 | mmc_detect_change(host->mmc, msecs_to_jiffies(100)); |
| 756 | |
| 757 | } |
| 758 | } |
| 759 | |
| 760 | static void imxmci_request(struct mmc_host *mmc, struct mmc_request *req) |
| 761 | { |
| 762 | struct imxmci_host *host = mmc_priv(mmc); |
| 763 | unsigned int cmdat; |
| 764 | |
| 765 | WARN_ON(host->req != NULL); |
| 766 | |
| 767 | host->req = req; |
| 768 | |
| 769 | cmdat = 0; |
| 770 | |
| 771 | if (req->data) { |
| 772 | imxmci_setup_data(host, req->data); |
| 773 | |
| 774 | cmdat |= CMD_DAT_CONT_DATA_ENABLE; |
| 775 | |
| 776 | if (req->data->flags & MMC_DATA_WRITE) |
| 777 | cmdat |= CMD_DAT_CONT_WRITE; |
| 778 | |
Marc Kleine-Budde | 4b7c0e4 | 2008-10-10 12:05:03 +0200 | [diff] [blame] | 779 | if (req->data->flags & MMC_DATA_STREAM) |
Pavel Pisa | 56ca9040 | 2006-04-02 19:27:07 +0100 | [diff] [blame] | 780 | cmdat |= CMD_DAT_CONT_STREAM_BLOCK; |
Pavel Pisa | 56ca9040 | 2006-04-02 19:27:07 +0100 | [diff] [blame] | 781 | } |
| 782 | |
| 783 | imxmci_start_cmd(host, req->cmd, cmdat); |
| 784 | } |
| 785 | |
| 786 | #define CLK_RATE 19200000 |
| 787 | |
| 788 | static void imxmci_set_ios(struct mmc_host *mmc, struct mmc_ios *ios) |
| 789 | { |
| 790 | struct imxmci_host *host = mmc_priv(mmc); |
| 791 | int prescaler; |
| 792 | |
Marc Kleine-Budde | 4b7c0e4 | 2008-10-10 12:05:03 +0200 | [diff] [blame] | 793 | if (ios->bus_width == MMC_BUS_WIDTH_4) { |
Pavel Pisa | 56ca9040 | 2006-04-02 19:27:07 +0100 | [diff] [blame] | 794 | host->actual_bus_width = MMC_BUS_WIDTH_4; |
| 795 | imx_gpio_mode(PB11_PF_SD_DAT3); |
Marc Kleine-Budde | 4b7c0e4 | 2008-10-10 12:05:03 +0200 | [diff] [blame] | 796 | } else { |
Pavel Pisa | 56ca9040 | 2006-04-02 19:27:07 +0100 | [diff] [blame] | 797 | host->actual_bus_width = MMC_BUS_WIDTH_1; |
| 798 | imx_gpio_mode(GPIO_PORTB | GPIO_IN | GPIO_PUEN | 11); |
| 799 | } |
| 800 | |
Marc Kleine-Budde | 4b7c0e4 | 2008-10-10 12:05:03 +0200 | [diff] [blame] | 801 | if (host->power_mode != ios->power_mode) { |
Pavel Pisa | 56ca9040 | 2006-04-02 19:27:07 +0100 | [diff] [blame] | 802 | switch (ios->power_mode) { |
| 803 | case MMC_POWER_OFF: |
Marc Kleine-Budde | 4b7c0e4 | 2008-10-10 12:05:03 +0200 | [diff] [blame] | 804 | break; |
Pavel Pisa | 56ca9040 | 2006-04-02 19:27:07 +0100 | [diff] [blame] | 805 | case MMC_POWER_UP: |
| 806 | set_bit(IMXMCI_PEND_SET_INIT_b, &host->pending_events); |
Marc Kleine-Budde | 4b7c0e4 | 2008-10-10 12:05:03 +0200 | [diff] [blame] | 807 | break; |
Pavel Pisa | 56ca9040 | 2006-04-02 19:27:07 +0100 | [diff] [blame] | 808 | case MMC_POWER_ON: |
Marc Kleine-Budde | 4b7c0e4 | 2008-10-10 12:05:03 +0200 | [diff] [blame] | 809 | break; |
Pavel Pisa | 56ca9040 | 2006-04-02 19:27:07 +0100 | [diff] [blame] | 810 | } |
| 811 | host->power_mode = ios->power_mode; |
| 812 | } |
| 813 | |
Marc Kleine-Budde | 4b7c0e4 | 2008-10-10 12:05:03 +0200 | [diff] [blame] | 814 | if (ios->clock) { |
Pavel Pisa | 56ca9040 | 2006-04-02 19:27:07 +0100 | [diff] [blame] | 815 | unsigned int clk; |
| 816 | |
| 817 | /* The prescaler is 5 for PERCLK2 equal to 96MHz |
| 818 | * then 96MHz / 5 = 19.2 MHz |
| 819 | */ |
Sascha Hauer | 38a41fd | 2008-07-05 10:02:46 +0200 | [diff] [blame] | 820 | clk = clk_get_rate(host->clk); |
Marc Kleine-Budde | 4b7c0e4 | 2008-10-10 12:05:03 +0200 | [diff] [blame] | 821 | prescaler = (clk + (CLK_RATE * 7) / 8) / CLK_RATE; |
| 822 | switch (prescaler) { |
Pavel Pisa | 56ca9040 | 2006-04-02 19:27:07 +0100 | [diff] [blame] | 823 | case 0: |
| 824 | case 1: prescaler = 0; |
| 825 | break; |
| 826 | case 2: prescaler = 1; |
| 827 | break; |
| 828 | case 3: prescaler = 2; |
| 829 | break; |
| 830 | case 4: prescaler = 4; |
| 831 | break; |
| 832 | default: |
| 833 | case 5: prescaler = 5; |
| 834 | break; |
| 835 | } |
| 836 | |
| 837 | dev_dbg(mmc_dev(host->mmc), "PERCLK2 %d MHz -> prescaler %d\n", |
| 838 | clk, prescaler); |
| 839 | |
Marc Kleine-Budde | 4b7c0e4 | 2008-10-10 12:05:03 +0200 | [diff] [blame] | 840 | for (clk = 0; clk < 8; clk++) { |
Pavel Pisa | 56ca9040 | 2006-04-02 19:27:07 +0100 | [diff] [blame] | 841 | int x; |
Marc Kleine-Budde | 4b7c0e4 | 2008-10-10 12:05:03 +0200 | [diff] [blame] | 842 | x = CLK_RATE / (1 << clk); |
| 843 | if (x <= ios->clock) |
Pavel Pisa | 56ca9040 | 2006-04-02 19:27:07 +0100 | [diff] [blame] | 844 | break; |
| 845 | } |
| 846 | |
| 847 | MMC_STR_STP_CLK |= STR_STP_CLK_ENABLE; /* enable controller */ |
| 848 | |
| 849 | imxmci_stop_clock(host); |
Marc Kleine-Budde | 4b7c0e4 | 2008-10-10 12:05:03 +0200 | [diff] [blame] | 850 | MMC_CLK_RATE = (prescaler << 3) | clk; |
Pavel Pisa | 2c171bf | 2006-05-19 21:48:03 +0100 | [diff] [blame] | 851 | /* |
| 852 | * Under my understanding, clock should not be started there, because it would |
| 853 | * initiate SDHC sequencer and send last or random command into card |
| 854 | */ |
Marc Kleine-Budde | 4b7c0e4 | 2008-10-10 12:05:03 +0200 | [diff] [blame] | 855 | /* imxmci_start_clock(host); */ |
Pavel Pisa | 56ca9040 | 2006-04-02 19:27:07 +0100 | [diff] [blame] | 856 | |
| 857 | dev_dbg(mmc_dev(host->mmc), "MMC_CLK_RATE: 0x%08x\n", MMC_CLK_RATE); |
| 858 | } else { |
| 859 | imxmci_stop_clock(host); |
| 860 | } |
| 861 | } |
| 862 | |
Pavel Pisa | faf39ed | 2007-09-23 22:59:01 +0200 | [diff] [blame] | 863 | static int imxmci_get_ro(struct mmc_host *mmc) |
| 864 | { |
| 865 | struct imxmci_host *host = mmc_priv(mmc); |
| 866 | |
| 867 | if (host->pdata && host->pdata->get_ro) |
Anton Vorontsov | 08f80bb | 2008-06-17 18:17:39 +0400 | [diff] [blame] | 868 | return !!host->pdata->get_ro(mmc_dev(mmc)); |
| 869 | /* |
| 870 | * Board doesn't support read only detection; let the mmc core |
| 871 | * decide what to do. |
| 872 | */ |
| 873 | return -ENOSYS; |
Pavel Pisa | faf39ed | 2007-09-23 22:59:01 +0200 | [diff] [blame] | 874 | } |
| 875 | |
| 876 | |
David Brownell | ab7aefd | 2006-11-12 17:55:30 -0800 | [diff] [blame] | 877 | static const struct mmc_host_ops imxmci_ops = { |
Pavel Pisa | 56ca9040 | 2006-04-02 19:27:07 +0100 | [diff] [blame] | 878 | .request = imxmci_request, |
| 879 | .set_ios = imxmci_set_ios, |
Pavel Pisa | faf39ed | 2007-09-23 22:59:01 +0200 | [diff] [blame] | 880 | .get_ro = imxmci_get_ro, |
Pavel Pisa | 56ca9040 | 2006-04-02 19:27:07 +0100 | [diff] [blame] | 881 | }; |
| 882 | |
Pavel Pisa | 56ca9040 | 2006-04-02 19:27:07 +0100 | [diff] [blame] | 883 | static void imxmci_check_status(unsigned long data) |
| 884 | { |
| 885 | struct imxmci_host *host = (struct imxmci_host *)data; |
| 886 | |
Paulius Zaleckas | c5d5e9c | 2008-07-09 16:03:20 +0300 | [diff] [blame] | 887 | if (host->pdata && host->pdata->card_present && |
| 888 | host->pdata->card_present(mmc_dev(host->mmc)) != host->present) { |
Pavel Pisa | 56ca9040 | 2006-04-02 19:27:07 +0100 | [diff] [blame] | 889 | host->present ^= 1; |
| 890 | dev_info(mmc_dev(host->mmc), "card %s\n", |
| 891 | host->present ? "inserted" : "removed"); |
| 892 | |
| 893 | set_bit(IMXMCI_PEND_CARD_XCHG_b, &host->pending_events); |
| 894 | tasklet_schedule(&host->tasklet); |
| 895 | } |
| 896 | |
Marc Kleine-Budde | 4b7c0e4 | 2008-10-10 12:05:03 +0200 | [diff] [blame] | 897 | if (test_bit(IMXMCI_PEND_WAIT_RESP_b, &host->pending_events) || |
| 898 | test_bit(IMXMCI_PEND_DMA_DATA_b, &host->pending_events)) { |
Pavel Pisa | 56ca9040 | 2006-04-02 19:27:07 +0100 | [diff] [blame] | 899 | atomic_inc(&host->stuck_timeout); |
Marc Kleine-Budde | 4b7c0e4 | 2008-10-10 12:05:03 +0200 | [diff] [blame] | 900 | if (atomic_read(&host->stuck_timeout) > 4) |
Pavel Pisa | 56ca9040 | 2006-04-02 19:27:07 +0100 | [diff] [blame] | 901 | tasklet_schedule(&host->tasklet); |
| 902 | } else { |
| 903 | atomic_set(&host->stuck_timeout, 0); |
| 904 | |
| 905 | } |
| 906 | |
| 907 | mod_timer(&host->timer, jiffies + (HZ>>1)); |
| 908 | } |
| 909 | |
| 910 | static int imxmci_probe(struct platform_device *pdev) |
| 911 | { |
| 912 | struct mmc_host *mmc; |
| 913 | struct imxmci_host *host = NULL; |
| 914 | struct resource *r; |
| 915 | int ret = 0, irq; |
| 916 | |
| 917 | printk(KERN_INFO "i.MX mmc driver\n"); |
| 918 | |
Paulius Zaleckas | 5fc63df | 2008-07-09 16:03:17 +0300 | [diff] [blame] | 919 | r = platform_get_resource(pdev, IORESOURCE_MEM, 0); |
| 920 | irq = platform_get_irq(pdev, 0); |
| 921 | if (!r || irq < 0) |
Pavel Pisa | 56ca9040 | 2006-04-02 19:27:07 +0100 | [diff] [blame] | 922 | return -ENXIO; |
| 923 | |
Paulius Zaleckas | 5fc63df | 2008-07-09 16:03:17 +0300 | [diff] [blame] | 924 | if (!request_mem_region(r->start, 0x100, pdev->name)) |
Pavel Pisa | 56ca9040 | 2006-04-02 19:27:07 +0100 | [diff] [blame] | 925 | return -EBUSY; |
| 926 | |
| 927 | mmc = mmc_alloc_host(sizeof(struct imxmci_host), &pdev->dev); |
| 928 | if (!mmc) { |
| 929 | ret = -ENOMEM; |
| 930 | goto out; |
| 931 | } |
| 932 | |
| 933 | mmc->ops = &imxmci_ops; |
| 934 | mmc->f_min = 150000; |
| 935 | mmc->f_max = CLK_RATE/2; |
| 936 | mmc->ocr_avail = MMC_VDD_32_33; |
Pierre Ossman | 255d01a | 2007-07-24 20:38:53 +0200 | [diff] [blame] | 937 | mmc->caps = MMC_CAP_4_BIT_DATA; |
Pavel Pisa | 56ca9040 | 2006-04-02 19:27:07 +0100 | [diff] [blame] | 938 | |
| 939 | /* MMC core transfer sizes tunable parameters */ |
| 940 | mmc->max_hw_segs = 64; |
| 941 | mmc->max_phys_segs = 64; |
Pavel Pisa | 56ca9040 | 2006-04-02 19:27:07 +0100 | [diff] [blame] | 942 | mmc->max_seg_size = 64*512; /* default PAGE_CACHE_SIZE */ |
Pierre Ossman | 55db890 | 2006-11-21 17:55:45 +0100 | [diff] [blame] | 943 | mmc->max_req_size = 64*512; /* default PAGE_CACHE_SIZE */ |
Pierre Ossman | fe4a3c7 | 2006-11-21 17:54:23 +0100 | [diff] [blame] | 944 | mmc->max_blk_size = 2048; |
Pierre Ossman | 55db890 | 2006-11-21 17:55:45 +0100 | [diff] [blame] | 945 | mmc->max_blk_count = 65535; |
Pavel Pisa | 56ca9040 | 2006-04-02 19:27:07 +0100 | [diff] [blame] | 946 | |
| 947 | host = mmc_priv(mmc); |
| 948 | host->mmc = mmc; |
| 949 | host->dma_allocated = 0; |
| 950 | host->pdata = pdev->dev.platform_data; |
Paulius Zaleckas | c5d5e9c | 2008-07-09 16:03:20 +0300 | [diff] [blame] | 951 | if (!host->pdata) |
| 952 | dev_warn(&pdev->dev, "No platform data provided!\n"); |
Pavel Pisa | 56ca9040 | 2006-04-02 19:27:07 +0100 | [diff] [blame] | 953 | |
| 954 | spin_lock_init(&host->lock); |
| 955 | host->res = r; |
| 956 | host->irq = irq; |
| 957 | |
Sascha Hauer | 38a41fd | 2008-07-05 10:02:46 +0200 | [diff] [blame] | 958 | host->clk = clk_get(&pdev->dev, "perclk2"); |
| 959 | if (IS_ERR(host->clk)) { |
| 960 | ret = PTR_ERR(host->clk); |
| 961 | goto out; |
| 962 | } |
| 963 | clk_enable(host->clk); |
| 964 | |
Pavel Pisa | 56ca9040 | 2006-04-02 19:27:07 +0100 | [diff] [blame] | 965 | imx_gpio_mode(PB8_PF_SD_DAT0); |
| 966 | imx_gpio_mode(PB9_PF_SD_DAT1); |
| 967 | imx_gpio_mode(PB10_PF_SD_DAT2); |
| 968 | /* Configured as GPIO with pull-up to ensure right MCC card mode */ |
| 969 | /* Switched to PB11_PF_SD_DAT3 if 4 bit bus is configured */ |
| 970 | imx_gpio_mode(GPIO_PORTB | GPIO_IN | GPIO_PUEN | 11); |
| 971 | /* imx_gpio_mode(PB11_PF_SD_DAT3); */ |
| 972 | imx_gpio_mode(PB12_PF_SD_CLK); |
| 973 | imx_gpio_mode(PB13_PF_SD_CMD); |
| 974 | |
| 975 | imxmci_softreset(); |
| 976 | |
Marc Kleine-Budde | 4b7c0e4 | 2008-10-10 12:05:03 +0200 | [diff] [blame] | 977 | if (MMC_REV_NO != 0x390) { |
Pavel Pisa | 56ca9040 | 2006-04-02 19:27:07 +0100 | [diff] [blame] | 978 | dev_err(mmc_dev(host->mmc), "wrong rev.no. 0x%08x. aborting.\n", |
Marc Kleine-Budde | 4b7c0e4 | 2008-10-10 12:05:03 +0200 | [diff] [blame] | 979 | MMC_REV_NO); |
Pavel Pisa | 56ca9040 | 2006-04-02 19:27:07 +0100 | [diff] [blame] | 980 | goto out; |
| 981 | } |
| 982 | |
| 983 | MMC_READ_TO = 0x2db4; /* recommended in data sheet */ |
| 984 | |
| 985 | host->imask = IMXMCI_INT_MASK_DEFAULT; |
| 986 | MMC_INT_MASK = host->imask; |
| 987 | |
Paulius Zaleckas | f7def13e | 2008-06-25 13:25:13 +0100 | [diff] [blame] | 988 | host->dma = imx_dma_request_by_prio(DRIVER_NAME, DMA_PRIO_LOW); |
| 989 | if(host->dma < 0) { |
Pavel Pisa | 56ca9040 | 2006-04-02 19:27:07 +0100 | [diff] [blame] | 990 | dev_err(mmc_dev(host->mmc), "imx_dma_request_by_prio failed\n"); |
| 991 | ret = -EBUSY; |
| 992 | goto out; |
| 993 | } |
Marc Kleine-Budde | 4b7c0e4 | 2008-10-10 12:05:03 +0200 | [diff] [blame] | 994 | host->dma_allocated = 1; |
Pavel Pisa | 56ca9040 | 2006-04-02 19:27:07 +0100 | [diff] [blame] | 995 | imx_dma_setup_handlers(host->dma, imxmci_dma_irq, NULL, host); |
| 996 | |
| 997 | tasklet_init(&host->tasklet, imxmci_tasklet_fnc, (unsigned long)host); |
| 998 | host->status_reg=0; |
| 999 | host->pending_events=0; |
| 1000 | |
| 1001 | ret = request_irq(host->irq, imxmci_irq, 0, DRIVER_NAME, host); |
| 1002 | if (ret) |
| 1003 | goto out; |
| 1004 | |
Paulius Zaleckas | c5d5e9c | 2008-07-09 16:03:20 +0300 | [diff] [blame] | 1005 | if (host->pdata && host->pdata->card_present) |
| 1006 | host->present = host->pdata->card_present(mmc_dev(mmc)); |
| 1007 | else /* if there is no way to detect assume that card is present */ |
| 1008 | host->present = 1; |
| 1009 | |
Pavel Pisa | 56ca9040 | 2006-04-02 19:27:07 +0100 | [diff] [blame] | 1010 | init_timer(&host->timer); |
| 1011 | host->timer.data = (unsigned long)host; |
| 1012 | host->timer.function = imxmci_check_status; |
| 1013 | add_timer(&host->timer); |
Marc Kleine-Budde | 4b7c0e4 | 2008-10-10 12:05:03 +0200 | [diff] [blame] | 1014 | mod_timer(&host->timer, jiffies + (HZ >> 1)); |
Pavel Pisa | 56ca9040 | 2006-04-02 19:27:07 +0100 | [diff] [blame] | 1015 | |
| 1016 | platform_set_drvdata(pdev, mmc); |
| 1017 | |
| 1018 | mmc_add_host(mmc); |
| 1019 | |
| 1020 | return 0; |
| 1021 | |
| 1022 | out: |
| 1023 | if (host) { |
Marc Kleine-Budde | 4b7c0e4 | 2008-10-10 12:05:03 +0200 | [diff] [blame] | 1024 | if (host->dma_allocated) { |
Pavel Pisa | 56ca9040 | 2006-04-02 19:27:07 +0100 | [diff] [blame] | 1025 | imx_dma_free(host->dma); |
Marc Kleine-Budde | 4b7c0e4 | 2008-10-10 12:05:03 +0200 | [diff] [blame] | 1026 | host->dma_allocated = 0; |
Pavel Pisa | 56ca9040 | 2006-04-02 19:27:07 +0100 | [diff] [blame] | 1027 | } |
Sascha Hauer | 38a41fd | 2008-07-05 10:02:46 +0200 | [diff] [blame] | 1028 | if (host->clk) { |
| 1029 | clk_disable(host->clk); |
| 1030 | clk_put(host->clk); |
| 1031 | } |
Pavel Pisa | 56ca9040 | 2006-04-02 19:27:07 +0100 | [diff] [blame] | 1032 | } |
| 1033 | if (mmc) |
| 1034 | mmc_free_host(mmc); |
Paulius Zaleckas | 5fc63df | 2008-07-09 16:03:17 +0300 | [diff] [blame] | 1035 | release_mem_region(r->start, 0x100); |
Pavel Pisa | 56ca9040 | 2006-04-02 19:27:07 +0100 | [diff] [blame] | 1036 | return ret; |
| 1037 | } |
| 1038 | |
| 1039 | static int imxmci_remove(struct platform_device *pdev) |
| 1040 | { |
| 1041 | struct mmc_host *mmc = platform_get_drvdata(pdev); |
| 1042 | |
| 1043 | platform_set_drvdata(pdev, NULL); |
| 1044 | |
| 1045 | if (mmc) { |
| 1046 | struct imxmci_host *host = mmc_priv(mmc); |
| 1047 | |
| 1048 | tasklet_disable(&host->tasklet); |
| 1049 | |
| 1050 | del_timer_sync(&host->timer); |
| 1051 | mmc_remove_host(mmc); |
| 1052 | |
| 1053 | free_irq(host->irq, host); |
Marc Kleine-Budde | 4b7c0e4 | 2008-10-10 12:05:03 +0200 | [diff] [blame] | 1054 | if (host->dma_allocated) { |
Pavel Pisa | 56ca9040 | 2006-04-02 19:27:07 +0100 | [diff] [blame] | 1055 | imx_dma_free(host->dma); |
Marc Kleine-Budde | 4b7c0e4 | 2008-10-10 12:05:03 +0200 | [diff] [blame] | 1056 | host->dma_allocated = 0; |
Pavel Pisa | 56ca9040 | 2006-04-02 19:27:07 +0100 | [diff] [blame] | 1057 | } |
| 1058 | |
| 1059 | tasklet_kill(&host->tasklet); |
| 1060 | |
Sascha Hauer | 38a41fd | 2008-07-05 10:02:46 +0200 | [diff] [blame] | 1061 | clk_disable(host->clk); |
| 1062 | clk_put(host->clk); |
| 1063 | |
Paulius Zaleckas | 5fc63df | 2008-07-09 16:03:17 +0300 | [diff] [blame] | 1064 | release_mem_region(host->res->start, 0x100); |
Pavel Pisa | 56ca9040 | 2006-04-02 19:27:07 +0100 | [diff] [blame] | 1065 | |
| 1066 | mmc_free_host(mmc); |
| 1067 | } |
| 1068 | return 0; |
| 1069 | } |
| 1070 | |
| 1071 | #ifdef CONFIG_PM |
| 1072 | static int imxmci_suspend(struct platform_device *dev, pm_message_t state) |
| 1073 | { |
| 1074 | struct mmc_host *mmc = platform_get_drvdata(dev); |
| 1075 | int ret = 0; |
| 1076 | |
| 1077 | if (mmc) |
| 1078 | ret = mmc_suspend_host(mmc, state); |
| 1079 | |
| 1080 | return ret; |
| 1081 | } |
| 1082 | |
| 1083 | static int imxmci_resume(struct platform_device *dev) |
| 1084 | { |
| 1085 | struct mmc_host *mmc = platform_get_drvdata(dev); |
| 1086 | struct imxmci_host *host; |
| 1087 | int ret = 0; |
| 1088 | |
| 1089 | if (mmc) { |
| 1090 | host = mmc_priv(mmc); |
Marc Kleine-Budde | 4b7c0e4 | 2008-10-10 12:05:03 +0200 | [diff] [blame] | 1091 | if (host) |
Pavel Pisa | 56ca9040 | 2006-04-02 19:27:07 +0100 | [diff] [blame] | 1092 | set_bit(IMXMCI_PEND_SET_INIT_b, &host->pending_events); |
| 1093 | ret = mmc_resume_host(mmc); |
| 1094 | } |
| 1095 | |
| 1096 | return ret; |
| 1097 | } |
| 1098 | #else |
| 1099 | #define imxmci_suspend NULL |
| 1100 | #define imxmci_resume NULL |
| 1101 | #endif /* CONFIG_PM */ |
| 1102 | |
| 1103 | static struct platform_driver imxmci_driver = { |
| 1104 | .probe = imxmci_probe, |
| 1105 | .remove = imxmci_remove, |
| 1106 | .suspend = imxmci_suspend, |
| 1107 | .resume = imxmci_resume, |
| 1108 | .driver = { |
| 1109 | .name = DRIVER_NAME, |
Kay Sievers | bc65c72 | 2008-04-15 14:34:28 -0700 | [diff] [blame] | 1110 | .owner = THIS_MODULE, |
Pavel Pisa | 56ca9040 | 2006-04-02 19:27:07 +0100 | [diff] [blame] | 1111 | } |
| 1112 | }; |
| 1113 | |
| 1114 | static int __init imxmci_init(void) |
| 1115 | { |
| 1116 | return platform_driver_register(&imxmci_driver); |
| 1117 | } |
| 1118 | |
| 1119 | static void __exit imxmci_exit(void) |
| 1120 | { |
| 1121 | platform_driver_unregister(&imxmci_driver); |
| 1122 | } |
| 1123 | |
| 1124 | module_init(imxmci_init); |
| 1125 | module_exit(imxmci_exit); |
| 1126 | |
| 1127 | MODULE_DESCRIPTION("i.MX Multimedia Card Interface Driver"); |
| 1128 | MODULE_AUTHOR("Sascha Hauer, Pengutronix"); |
| 1129 | MODULE_LICENSE("GPL"); |
Kay Sievers | bc65c72 | 2008-04-15 14:34:28 -0700 | [diff] [blame] | 1130 | MODULE_ALIAS("platform:imx-mmc"); |