blob: 5b9cb9f724719d6ccd1d88a9200f28b7360610c2 [file] [log] [blame]
Alexander Müllerd0c175d2016-08-27 19:40:50 +02001/*
2 * Copyright (c) 2015 Endless Mobile, Inc.
3 * Author: Carlo Caione <carlo@endlessm.com>
4 *
5 * Copyright (c) 2016 BayLibre, Inc.
6 * Michael Turquette <mturquette@baylibre.com>
7 *
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms and conditions of the GNU General Public License,
10 * version 2, as published by the Free Software Foundation.
11 *
12 * This program is distributed in the hope it will be useful, but WITHOUT
13 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
14 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
15 * more details.
16 *
17 * You should have received a copy of the GNU General Public License along with
18 * this program. If not, see <http://www.gnu.org/licenses/>.
19 */
20
21#ifndef __MESON8B_H
22#define __MESON8B_H
23
24/*
25 * Clock controller register offsets
26 *
27 * Register offsets from the HardKernel[0] data sheet are listed in comment
28 * blocks below. Those offsets must be multiplied by 4 before adding them to
29 * the base address to get the right value
30 *
31 * [0] http://dn.odroid.com/S805/Datasheet/S805_Datasheet%20V0.8%2020150126.pdf
32 */
33#define MESON8B_REG_SYS_CPU_CNTL1 0x015c /* 0x57 offset in data sheet */
34#define MESON8B_REG_HHI_MPEG 0x0174 /* 0x5d offset in data sheet */
35#define MESON8B_REG_MALI 0x01b0 /* 0x6c offset in data sheet */
36#define MESON8B_REG_PLL_FIXED 0x0280
37#define MESON8B_REG_PLL_SYS 0x0300
38#define MESON8B_REG_PLL_VID 0x0320
39
40#endif /* __MESON8B_H */