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Benoit Goby91525d02011-03-09 16:28:55 -08001/*
Benoit Goby91525d02011-03-09 16:28:55 -08002 * Copyright (C) 2010 Google, Inc.
3 *
4 * This software is licensed under the terms of the GNU General Public
5 * License version 2, as published by the Free Software Foundation, and
6 * may be copied, distributed, and modified under those terms.
7 *
8 * This program is distributed in the hope that it will be useful,
9 * but WITHOUT ANY WARRANTY; without even the implied warranty of
10 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
11 * GNU General Public License for more details.
12 *
13 */
14
Venu Byravarasu1ba82162012-09-05 18:50:23 +053015#ifndef __TEGRA_USB_PHY_H
16#define __TEGRA_USB_PHY_H
Benoit Goby91525d02011-03-09 16:28:55 -080017
18#include <linux/clk.h>
19#include <linux/usb/otg.h>
20
Tuomas Tynkkynen3e635202013-08-12 16:06:51 +030021/*
22 * utmi_pll_config_in_car_module: true if the UTMI PLL configuration registers
23 * should be set up by clk-tegra, false if by the PHY code
24 * has_hostpc: true if the USB controller has the HOSTPC extension, which
25 * changes the location of the PHCD and PTS fields
26 * requires_usbmode_setup: true if the USBMODE register needs to be set to
27 * enter host mode
28 * requires_extra_tuning_parameters: true if xcvr_hsslew, hssquelch_level
29 * and hsdiscon_level should be set for adequate signal quality
30 */
31
32struct tegra_phy_soc_config {
33 bool utmi_pll_config_in_car_module;
34 bool has_hostpc;
35 bool requires_usbmode_setup;
36 bool requires_extra_tuning_parameters;
37};
38
Benoit Goby91525d02011-03-09 16:28:55 -080039struct tegra_utmip_config {
40 u8 hssync_start_delay;
41 u8 elastic_limit;
42 u8 idle_wait_delay;
43 u8 term_range_adj;
44 u8 xcvr_setup;
45 u8 xcvr_lsfslew;
46 u8 xcvr_lsrslew;
47};
48
Benoit Goby91525d02011-03-09 16:28:55 -080049enum tegra_usb_phy_port_speed {
50 TEGRA_USB_PHY_PORT_SPEED_FULL = 0,
51 TEGRA_USB_PHY_PORT_SPEED_LOW,
52 TEGRA_USB_PHY_PORT_SPEED_HIGH,
53};
54
Benoit Goby91525d02011-03-09 16:28:55 -080055struct tegra_xtal_freq;
56
57struct tegra_usb_phy {
58 int instance;
59 const struct tegra_xtal_freq *freq;
60 void __iomem *regs;
61 void __iomem *pad_regs;
62 struct clk *clk;
63 struct clk *pll_u;
64 struct clk *pad_clk;
Mikko Perttunenf5b8c8b2013-07-17 10:37:49 +030065 struct regulator *vbus;
Tuomas Tynkkynen6558d7e2013-07-25 21:38:09 +030066 enum usb_dr_mode mode;
Benoit Goby91525d02011-03-09 16:28:55 -080067 void *config;
Tuomas Tynkkynen3e635202013-08-12 16:06:51 +030068 const struct tegra_phy_soc_config *soc_config;
Heikki Krogerus86753812012-02-13 13:24:02 +020069 struct usb_phy *ulpi;
Venu Byravarasu1ba82162012-09-05 18:50:23 +053070 struct usb_phy u_phy;
Venu Byravarasu3a55c6a2013-01-16 03:30:20 +000071 bool is_legacy_phy;
Venu Byravarasu3f9db1a2013-01-16 03:30:21 +000072 bool is_ulpi_phy;
Venu Byravarasu12ea18e2013-05-16 19:43:00 +053073 int reset_gpio;
Benoit Goby91525d02011-03-09 16:28:55 -080074};
75
Venu Byravarasuab137d02013-01-24 15:57:03 +053076void tegra_usb_phy_preresume(struct usb_phy *phy);
Benoit Goby91525d02011-03-09 16:28:55 -080077
Venu Byravarasuab137d02013-01-24 15:57:03 +053078void tegra_usb_phy_postresume(struct usb_phy *phy);
Benoit Goby91525d02011-03-09 16:28:55 -080079
Venu Byravarasuab137d02013-01-24 15:57:03 +053080void tegra_ehci_phy_restore_start(struct usb_phy *phy,
Benoit Goby91525d02011-03-09 16:28:55 -080081 enum tegra_usb_phy_port_speed port_speed);
82
Venu Byravarasuab137d02013-01-24 15:57:03 +053083void tegra_ehci_phy_restore_end(struct usb_phy *phy);
Benoit Goby91525d02011-03-09 16:28:55 -080084
Venu Byravarasu1ba82162012-09-05 18:50:23 +053085#endif /* __TEGRA_USB_PHY_H */