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Hollis Blanchard75f74f02008-11-05 09:36:16 -06001/*
2 * This program is free software; you can redistribute it and/or modify
3 * it under the terms of the GNU General Public License, version 2, as
4 * published by the Free Software Foundation.
5 *
6 * This program is distributed in the hope that it will be useful,
7 * but WITHOUT ANY WARRANTY; without even the implied warranty of
8 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
9 * GNU General Public License for more details.
10 *
11 * You should have received a copy of the GNU General Public License
12 * along with this program; if not, write to the Free Software
13 * Foundation, 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.
14 *
15 * Copyright IBM Corp. 2008
16 *
17 * Authors: Hollis Blanchard <hollisb@us.ibm.com>
18 */
19
20#include <asm/kvm_ppc.h>
21#include <asm/dcr.h>
22#include <asm/dcr-regs.h>
23#include <asm/disassemble.h>
Hollis Blanchardfe4e7712008-11-10 14:57:36 -060024#include <asm/kvm_44x.h>
Hollis Blanchard73e75b42008-12-02 15:51:57 -060025#include "timing.h"
Hollis Blanchard75f74f02008-11-05 09:36:16 -060026
27#include "booke.h"
28#include "44x_tlb.h"
29
Hollis Blanchard75f74f02008-11-05 09:36:16 -060030#define XOP_MFDCR 323
Alexander Grafe4dcfe82012-08-16 00:28:09 +020031#define XOP_MTDCRX 387
Hollis Blanchard75f74f02008-11-05 09:36:16 -060032#define XOP_MTDCR 451
33#define XOP_TLBSX 914
34#define XOP_ICCCI 966
35#define XOP_TLBWE 978
36
Alexander Grafe4dcfe82012-08-16 00:28:09 +020037static int emulate_mtdcr(struct kvm_vcpu *vcpu, int rs, int dcrn)
38{
39 /* emulate some access in kernel */
40 switch (dcrn) {
41 case DCRN_CPR0_CONFIG_ADDR:
42 vcpu->arch.cpr0_cfgaddr = kvmppc_get_gpr(vcpu, rs);
43 return EMULATE_DONE;
44 default:
45 vcpu->run->dcr.dcrn = dcrn;
46 vcpu->run->dcr.data = kvmppc_get_gpr(vcpu, rs);
47 vcpu->run->dcr.is_write = 1;
48 vcpu->arch.dcr_needed = 1;
49 kvmppc_account_exit(vcpu, DCR_EXITS);
50 return EMULATE_DO_DCR;
51 }
52}
53
Hollis Blanchard75f74f02008-11-05 09:36:16 -060054int kvmppc_core_emulate_op(struct kvm_run *run, struct kvm_vcpu *vcpu,
55 unsigned int inst, int *advance)
56{
57 int emulated = EMULATE_DONE;
Alexander Grafc46dc9a2012-05-04 14:01:33 +020058 int dcrn = get_dcrn(inst);
59 int ra = get_ra(inst);
60 int rb = get_rb(inst);
61 int rc = get_rc(inst);
62 int rs = get_rs(inst);
63 int rt = get_rt(inst);
64 int ws = get_ws(inst);
Hollis Blanchard75f74f02008-11-05 09:36:16 -060065
66 switch (get_op(inst)) {
Hollis Blanchard75f74f02008-11-05 09:36:16 -060067 case 31:
68 switch (get_xop(inst)) {
69
Hollis Blanchard75f74f02008-11-05 09:36:16 -060070 case XOP_MFDCR:
Hollis Blanchard75f74f02008-11-05 09:36:16 -060071 /* The guest may access CPR0 registers to determine the timebase
72 * frequency, and it must know the real host frequency because it
73 * can directly access the timebase registers.
74 *
75 * It would be possible to emulate those accesses in userspace,
76 * but userspace can really only figure out the end frequency.
77 * We could decompose that into the factors that compute it, but
78 * that's tricky math, and it's easier to just report the real
79 * CPR0 values.
80 */
81 switch (dcrn) {
82 case DCRN_CPR0_CONFIG_ADDR:
Alexander Graf8e5b26b2010-01-08 02:58:01 +010083 kvmppc_set_gpr(vcpu, rt, vcpu->arch.cpr0_cfgaddr);
Hollis Blanchard75f74f02008-11-05 09:36:16 -060084 break;
85 case DCRN_CPR0_CONFIG_DATA:
86 local_irq_disable();
87 mtdcr(DCRN_CPR0_CONFIG_ADDR,
88 vcpu->arch.cpr0_cfgaddr);
Alexander Graf8e5b26b2010-01-08 02:58:01 +010089 kvmppc_set_gpr(vcpu, rt,
90 mfdcr(DCRN_CPR0_CONFIG_DATA));
Hollis Blanchard75f74f02008-11-05 09:36:16 -060091 local_irq_enable();
92 break;
93 default:
94 run->dcr.dcrn = dcrn;
95 run->dcr.data = 0;
96 run->dcr.is_write = 0;
97 vcpu->arch.io_gpr = rt;
98 vcpu->arch.dcr_needed = 1;
Hollis Blanchard7b701592008-12-02 15:51:58 -060099 kvmppc_account_exit(vcpu, DCR_EXITS);
Hollis Blanchard75f74f02008-11-05 09:36:16 -0600100 emulated = EMULATE_DO_DCR;
101 }
102
103 break;
104
105 case XOP_MTDCR:
Alexander Grafe4dcfe82012-08-16 00:28:09 +0200106 emulated = emulate_mtdcr(vcpu, rs, dcrn);
107 break;
Hollis Blanchard75f74f02008-11-05 09:36:16 -0600108
Alexander Grafe4dcfe82012-08-16 00:28:09 +0200109 case XOP_MTDCRX:
110 emulated = emulate_mtdcr(vcpu, rs,
111 kvmppc_get_gpr(vcpu, ra));
Hollis Blanchard75f74f02008-11-05 09:36:16 -0600112 break;
113
114 case XOP_TLBWE:
Hollis Blanchard75f74f02008-11-05 09:36:16 -0600115 emulated = kvmppc_44x_emul_tlbwe(vcpu, ra, rs, ws);
116 break;
117
118 case XOP_TLBSX:
Hollis Blanchard75f74f02008-11-05 09:36:16 -0600119 emulated = kvmppc_44x_emul_tlbsx(vcpu, rt, ra, rb, rc);
120 break;
121
122 case XOP_ICCCI:
123 break;
124
125 default:
126 emulated = EMULATE_FAIL;
127 }
128
129 break;
130
131 default:
132 emulated = EMULATE_FAIL;
133 }
134
Hollis Blanchardd0c7dc02009-01-03 16:23:06 -0600135 if (emulated == EMULATE_FAIL)
136 emulated = kvmppc_booke_emulate_op(run, vcpu, inst, advance);
137
Hollis Blanchard75f74f02008-11-05 09:36:16 -0600138 return emulated;
139}
140
Alexander Graf54771e62012-05-04 14:55:12 +0200141int kvmppc_core_emulate_mtspr(struct kvm_vcpu *vcpu, int sprn, ulong spr_val)
Hollis Blanchard75f74f02008-11-05 09:36:16 -0600142{
Hollis Blanchardd0c7dc02009-01-03 16:23:06 -0600143 int emulated = EMULATE_DONE;
144
Hollis Blanchard75f74f02008-11-05 09:36:16 -0600145 switch (sprn) {
Hollis Blanchard75f74f02008-11-05 09:36:16 -0600146 case SPRN_PID:
Alexander Graf54771e62012-05-04 14:55:12 +0200147 kvmppc_set_pid(vcpu, spr_val); break;
Hollis Blanchardd0c7dc02009-01-03 16:23:06 -0600148 case SPRN_MMUCR:
Alexander Graf54771e62012-05-04 14:55:12 +0200149 vcpu->arch.mmucr = spr_val; break;
Hollis Blanchard75f74f02008-11-05 09:36:16 -0600150 case SPRN_CCR0:
Alexander Graf54771e62012-05-04 14:55:12 +0200151 vcpu->arch.ccr0 = spr_val; break;
Hollis Blanchard75f74f02008-11-05 09:36:16 -0600152 case SPRN_CCR1:
Alexander Graf54771e62012-05-04 14:55:12 +0200153 vcpu->arch.ccr1 = spr_val; break;
Hollis Blanchard75f74f02008-11-05 09:36:16 -0600154 default:
Alexander Graf54771e62012-05-04 14:55:12 +0200155 emulated = kvmppc_booke_emulate_mtspr(vcpu, sprn, spr_val);
Hollis Blanchard75f74f02008-11-05 09:36:16 -0600156 }
157
Hollis Blanchardd0c7dc02009-01-03 16:23:06 -0600158 return emulated;
Hollis Blanchard75f74f02008-11-05 09:36:16 -0600159}
160
Alexander Graf54771e62012-05-04 14:55:12 +0200161int kvmppc_core_emulate_mfspr(struct kvm_vcpu *vcpu, int sprn, ulong *spr_val)
Hollis Blanchard75f74f02008-11-05 09:36:16 -0600162{
Hollis Blanchardd0c7dc02009-01-03 16:23:06 -0600163 int emulated = EMULATE_DONE;
164
Hollis Blanchard75f74f02008-11-05 09:36:16 -0600165 switch (sprn) {
Hollis Blanchardd0c7dc02009-01-03 16:23:06 -0600166 case SPRN_PID:
Alexander Graf54771e62012-05-04 14:55:12 +0200167 *spr_val = vcpu->arch.pid; break;
Hollis Blanchard75f74f02008-11-05 09:36:16 -0600168 case SPRN_MMUCR:
Alexander Graf54771e62012-05-04 14:55:12 +0200169 *spr_val = vcpu->arch.mmucr; break;
Hollis Blanchard75f74f02008-11-05 09:36:16 -0600170 case SPRN_CCR0:
Alexander Graf54771e62012-05-04 14:55:12 +0200171 *spr_val = vcpu->arch.ccr0; break;
Hollis Blanchard75f74f02008-11-05 09:36:16 -0600172 case SPRN_CCR1:
Alexander Graf54771e62012-05-04 14:55:12 +0200173 *spr_val = vcpu->arch.ccr1; break;
Hollis Blanchard75f74f02008-11-05 09:36:16 -0600174 default:
Alexander Graf54771e62012-05-04 14:55:12 +0200175 emulated = kvmppc_booke_emulate_mfspr(vcpu, sprn, spr_val);
Hollis Blanchard75f74f02008-11-05 09:36:16 -0600176 }
177
Hollis Blanchardd0c7dc02009-01-03 16:23:06 -0600178 return emulated;
Hollis Blanchard75f74f02008-11-05 09:36:16 -0600179}
180