Hollis Blanchard | 75f74f0 | 2008-11-05 09:36:16 -0600 | [diff] [blame] | 1 | /* |
| 2 | * This program is free software; you can redistribute it and/or modify |
| 3 | * it under the terms of the GNU General Public License, version 2, as |
| 4 | * published by the Free Software Foundation. |
| 5 | * |
| 6 | * This program is distributed in the hope that it will be useful, |
| 7 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 8 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 9 | * GNU General Public License for more details. |
| 10 | * |
| 11 | * You should have received a copy of the GNU General Public License |
| 12 | * along with this program; if not, write to the Free Software |
| 13 | * Foundation, 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA. |
| 14 | * |
| 15 | * Copyright IBM Corp. 2008 |
| 16 | * |
| 17 | * Authors: Hollis Blanchard <hollisb@us.ibm.com> |
| 18 | */ |
| 19 | |
| 20 | #include <asm/kvm_ppc.h> |
| 21 | #include <asm/dcr.h> |
| 22 | #include <asm/dcr-regs.h> |
| 23 | #include <asm/disassemble.h> |
Hollis Blanchard | fe4e771 | 2008-11-10 14:57:36 -0600 | [diff] [blame] | 24 | #include <asm/kvm_44x.h> |
Hollis Blanchard | 73e75b4 | 2008-12-02 15:51:57 -0600 | [diff] [blame] | 25 | #include "timing.h" |
Hollis Blanchard | 75f74f0 | 2008-11-05 09:36:16 -0600 | [diff] [blame] | 26 | |
| 27 | #include "booke.h" |
| 28 | #include "44x_tlb.h" |
| 29 | |
Hollis Blanchard | 75f74f0 | 2008-11-05 09:36:16 -0600 | [diff] [blame] | 30 | #define XOP_MFDCR 323 |
Alexander Graf | e4dcfe8 | 2012-08-16 00:28:09 +0200 | [diff] [blame^] | 31 | #define XOP_MTDCRX 387 |
Hollis Blanchard | 75f74f0 | 2008-11-05 09:36:16 -0600 | [diff] [blame] | 32 | #define XOP_MTDCR 451 |
| 33 | #define XOP_TLBSX 914 |
| 34 | #define XOP_ICCCI 966 |
| 35 | #define XOP_TLBWE 978 |
| 36 | |
Alexander Graf | e4dcfe8 | 2012-08-16 00:28:09 +0200 | [diff] [blame^] | 37 | static int emulate_mtdcr(struct kvm_vcpu *vcpu, int rs, int dcrn) |
| 38 | { |
| 39 | /* emulate some access in kernel */ |
| 40 | switch (dcrn) { |
| 41 | case DCRN_CPR0_CONFIG_ADDR: |
| 42 | vcpu->arch.cpr0_cfgaddr = kvmppc_get_gpr(vcpu, rs); |
| 43 | return EMULATE_DONE; |
| 44 | default: |
| 45 | vcpu->run->dcr.dcrn = dcrn; |
| 46 | vcpu->run->dcr.data = kvmppc_get_gpr(vcpu, rs); |
| 47 | vcpu->run->dcr.is_write = 1; |
| 48 | vcpu->arch.dcr_needed = 1; |
| 49 | kvmppc_account_exit(vcpu, DCR_EXITS); |
| 50 | return EMULATE_DO_DCR; |
| 51 | } |
| 52 | } |
| 53 | |
Hollis Blanchard | 75f74f0 | 2008-11-05 09:36:16 -0600 | [diff] [blame] | 54 | int kvmppc_core_emulate_op(struct kvm_run *run, struct kvm_vcpu *vcpu, |
| 55 | unsigned int inst, int *advance) |
| 56 | { |
| 57 | int emulated = EMULATE_DONE; |
Alexander Graf | c46dc9a | 2012-05-04 14:01:33 +0200 | [diff] [blame] | 58 | int dcrn = get_dcrn(inst); |
| 59 | int ra = get_ra(inst); |
| 60 | int rb = get_rb(inst); |
| 61 | int rc = get_rc(inst); |
| 62 | int rs = get_rs(inst); |
| 63 | int rt = get_rt(inst); |
| 64 | int ws = get_ws(inst); |
Hollis Blanchard | 75f74f0 | 2008-11-05 09:36:16 -0600 | [diff] [blame] | 65 | |
| 66 | switch (get_op(inst)) { |
Hollis Blanchard | 75f74f0 | 2008-11-05 09:36:16 -0600 | [diff] [blame] | 67 | case 31: |
| 68 | switch (get_xop(inst)) { |
| 69 | |
Hollis Blanchard | 75f74f0 | 2008-11-05 09:36:16 -0600 | [diff] [blame] | 70 | case XOP_MFDCR: |
Hollis Blanchard | 75f74f0 | 2008-11-05 09:36:16 -0600 | [diff] [blame] | 71 | /* The guest may access CPR0 registers to determine the timebase |
| 72 | * frequency, and it must know the real host frequency because it |
| 73 | * can directly access the timebase registers. |
| 74 | * |
| 75 | * It would be possible to emulate those accesses in userspace, |
| 76 | * but userspace can really only figure out the end frequency. |
| 77 | * We could decompose that into the factors that compute it, but |
| 78 | * that's tricky math, and it's easier to just report the real |
| 79 | * CPR0 values. |
| 80 | */ |
| 81 | switch (dcrn) { |
| 82 | case DCRN_CPR0_CONFIG_ADDR: |
Alexander Graf | 8e5b26b | 2010-01-08 02:58:01 +0100 | [diff] [blame] | 83 | kvmppc_set_gpr(vcpu, rt, vcpu->arch.cpr0_cfgaddr); |
Hollis Blanchard | 75f74f0 | 2008-11-05 09:36:16 -0600 | [diff] [blame] | 84 | break; |
| 85 | case DCRN_CPR0_CONFIG_DATA: |
| 86 | local_irq_disable(); |
| 87 | mtdcr(DCRN_CPR0_CONFIG_ADDR, |
| 88 | vcpu->arch.cpr0_cfgaddr); |
Alexander Graf | 8e5b26b | 2010-01-08 02:58:01 +0100 | [diff] [blame] | 89 | kvmppc_set_gpr(vcpu, rt, |
| 90 | mfdcr(DCRN_CPR0_CONFIG_DATA)); |
Hollis Blanchard | 75f74f0 | 2008-11-05 09:36:16 -0600 | [diff] [blame] | 91 | local_irq_enable(); |
| 92 | break; |
| 93 | default: |
| 94 | run->dcr.dcrn = dcrn; |
| 95 | run->dcr.data = 0; |
| 96 | run->dcr.is_write = 0; |
| 97 | vcpu->arch.io_gpr = rt; |
| 98 | vcpu->arch.dcr_needed = 1; |
Hollis Blanchard | 7b70159 | 2008-12-02 15:51:58 -0600 | [diff] [blame] | 99 | kvmppc_account_exit(vcpu, DCR_EXITS); |
Hollis Blanchard | 75f74f0 | 2008-11-05 09:36:16 -0600 | [diff] [blame] | 100 | emulated = EMULATE_DO_DCR; |
| 101 | } |
| 102 | |
| 103 | break; |
| 104 | |
| 105 | case XOP_MTDCR: |
Alexander Graf | e4dcfe8 | 2012-08-16 00:28:09 +0200 | [diff] [blame^] | 106 | emulated = emulate_mtdcr(vcpu, rs, dcrn); |
| 107 | break; |
Hollis Blanchard | 75f74f0 | 2008-11-05 09:36:16 -0600 | [diff] [blame] | 108 | |
Alexander Graf | e4dcfe8 | 2012-08-16 00:28:09 +0200 | [diff] [blame^] | 109 | case XOP_MTDCRX: |
| 110 | emulated = emulate_mtdcr(vcpu, rs, |
| 111 | kvmppc_get_gpr(vcpu, ra)); |
Hollis Blanchard | 75f74f0 | 2008-11-05 09:36:16 -0600 | [diff] [blame] | 112 | break; |
| 113 | |
| 114 | case XOP_TLBWE: |
Hollis Blanchard | 75f74f0 | 2008-11-05 09:36:16 -0600 | [diff] [blame] | 115 | emulated = kvmppc_44x_emul_tlbwe(vcpu, ra, rs, ws); |
| 116 | break; |
| 117 | |
| 118 | case XOP_TLBSX: |
Hollis Blanchard | 75f74f0 | 2008-11-05 09:36:16 -0600 | [diff] [blame] | 119 | emulated = kvmppc_44x_emul_tlbsx(vcpu, rt, ra, rb, rc); |
| 120 | break; |
| 121 | |
| 122 | case XOP_ICCCI: |
| 123 | break; |
| 124 | |
| 125 | default: |
| 126 | emulated = EMULATE_FAIL; |
| 127 | } |
| 128 | |
| 129 | break; |
| 130 | |
| 131 | default: |
| 132 | emulated = EMULATE_FAIL; |
| 133 | } |
| 134 | |
Hollis Blanchard | d0c7dc0 | 2009-01-03 16:23:06 -0600 | [diff] [blame] | 135 | if (emulated == EMULATE_FAIL) |
| 136 | emulated = kvmppc_booke_emulate_op(run, vcpu, inst, advance); |
| 137 | |
Hollis Blanchard | 75f74f0 | 2008-11-05 09:36:16 -0600 | [diff] [blame] | 138 | return emulated; |
| 139 | } |
| 140 | |
Alexander Graf | 54771e6 | 2012-05-04 14:55:12 +0200 | [diff] [blame] | 141 | int kvmppc_core_emulate_mtspr(struct kvm_vcpu *vcpu, int sprn, ulong spr_val) |
Hollis Blanchard | 75f74f0 | 2008-11-05 09:36:16 -0600 | [diff] [blame] | 142 | { |
Hollis Blanchard | d0c7dc0 | 2009-01-03 16:23:06 -0600 | [diff] [blame] | 143 | int emulated = EMULATE_DONE; |
| 144 | |
Hollis Blanchard | 75f74f0 | 2008-11-05 09:36:16 -0600 | [diff] [blame] | 145 | switch (sprn) { |
Hollis Blanchard | 75f74f0 | 2008-11-05 09:36:16 -0600 | [diff] [blame] | 146 | case SPRN_PID: |
Alexander Graf | 54771e6 | 2012-05-04 14:55:12 +0200 | [diff] [blame] | 147 | kvmppc_set_pid(vcpu, spr_val); break; |
Hollis Blanchard | d0c7dc0 | 2009-01-03 16:23:06 -0600 | [diff] [blame] | 148 | case SPRN_MMUCR: |
Alexander Graf | 54771e6 | 2012-05-04 14:55:12 +0200 | [diff] [blame] | 149 | vcpu->arch.mmucr = spr_val; break; |
Hollis Blanchard | 75f74f0 | 2008-11-05 09:36:16 -0600 | [diff] [blame] | 150 | case SPRN_CCR0: |
Alexander Graf | 54771e6 | 2012-05-04 14:55:12 +0200 | [diff] [blame] | 151 | vcpu->arch.ccr0 = spr_val; break; |
Hollis Blanchard | 75f74f0 | 2008-11-05 09:36:16 -0600 | [diff] [blame] | 152 | case SPRN_CCR1: |
Alexander Graf | 54771e6 | 2012-05-04 14:55:12 +0200 | [diff] [blame] | 153 | vcpu->arch.ccr1 = spr_val; break; |
Hollis Blanchard | 75f74f0 | 2008-11-05 09:36:16 -0600 | [diff] [blame] | 154 | default: |
Alexander Graf | 54771e6 | 2012-05-04 14:55:12 +0200 | [diff] [blame] | 155 | emulated = kvmppc_booke_emulate_mtspr(vcpu, sprn, spr_val); |
Hollis Blanchard | 75f74f0 | 2008-11-05 09:36:16 -0600 | [diff] [blame] | 156 | } |
| 157 | |
Hollis Blanchard | d0c7dc0 | 2009-01-03 16:23:06 -0600 | [diff] [blame] | 158 | return emulated; |
Hollis Blanchard | 75f74f0 | 2008-11-05 09:36:16 -0600 | [diff] [blame] | 159 | } |
| 160 | |
Alexander Graf | 54771e6 | 2012-05-04 14:55:12 +0200 | [diff] [blame] | 161 | int kvmppc_core_emulate_mfspr(struct kvm_vcpu *vcpu, int sprn, ulong *spr_val) |
Hollis Blanchard | 75f74f0 | 2008-11-05 09:36:16 -0600 | [diff] [blame] | 162 | { |
Hollis Blanchard | d0c7dc0 | 2009-01-03 16:23:06 -0600 | [diff] [blame] | 163 | int emulated = EMULATE_DONE; |
| 164 | |
Hollis Blanchard | 75f74f0 | 2008-11-05 09:36:16 -0600 | [diff] [blame] | 165 | switch (sprn) { |
Hollis Blanchard | d0c7dc0 | 2009-01-03 16:23:06 -0600 | [diff] [blame] | 166 | case SPRN_PID: |
Alexander Graf | 54771e6 | 2012-05-04 14:55:12 +0200 | [diff] [blame] | 167 | *spr_val = vcpu->arch.pid; break; |
Hollis Blanchard | 75f74f0 | 2008-11-05 09:36:16 -0600 | [diff] [blame] | 168 | case SPRN_MMUCR: |
Alexander Graf | 54771e6 | 2012-05-04 14:55:12 +0200 | [diff] [blame] | 169 | *spr_val = vcpu->arch.mmucr; break; |
Hollis Blanchard | 75f74f0 | 2008-11-05 09:36:16 -0600 | [diff] [blame] | 170 | case SPRN_CCR0: |
Alexander Graf | 54771e6 | 2012-05-04 14:55:12 +0200 | [diff] [blame] | 171 | *spr_val = vcpu->arch.ccr0; break; |
Hollis Blanchard | 75f74f0 | 2008-11-05 09:36:16 -0600 | [diff] [blame] | 172 | case SPRN_CCR1: |
Alexander Graf | 54771e6 | 2012-05-04 14:55:12 +0200 | [diff] [blame] | 173 | *spr_val = vcpu->arch.ccr1; break; |
Hollis Blanchard | 75f74f0 | 2008-11-05 09:36:16 -0600 | [diff] [blame] | 174 | default: |
Alexander Graf | 54771e6 | 2012-05-04 14:55:12 +0200 | [diff] [blame] | 175 | emulated = kvmppc_booke_emulate_mfspr(vcpu, sprn, spr_val); |
Hollis Blanchard | 75f74f0 | 2008-11-05 09:36:16 -0600 | [diff] [blame] | 176 | } |
| 177 | |
Hollis Blanchard | d0c7dc0 | 2009-01-03 16:23:06 -0600 | [diff] [blame] | 178 | return emulated; |
Hollis Blanchard | 75f74f0 | 2008-11-05 09:36:16 -0600 | [diff] [blame] | 179 | } |
| 180 | |