Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1 | #ifndef __ASM_SH_PCI_H |
| 2 | #define __ASM_SH_PCI_H |
| 3 | |
| 4 | #ifdef __KERNEL__ |
| 5 | |
| 6 | #include <linux/dma-mapping.h> |
| 7 | |
| 8 | /* Can be used to override the logic in pci_scan_bus for skipping |
| 9 | already-configured bus numbers - to be used for buggy BIOSes |
| 10 | or architectures with incomplete PCI setup by the loader */ |
| 11 | |
| 12 | #define pcibios_assign_all_busses() 1 |
| 13 | #define pcibios_scan_all_fns(a, b) 0 |
| 14 | |
| 15 | /* |
| 16 | * A board can define one or more PCI channels that represent built-in (or |
| 17 | * external) PCI controllers. |
| 18 | */ |
| 19 | struct pci_channel { |
Paul Mundt | e79066a | 2009-04-20 18:29:22 +0900 | [diff] [blame^] | 20 | struct pci_channel *next; |
Paul Mundt | 0bb34a6 | 2009-04-20 16:38:00 +0900 | [diff] [blame] | 21 | |
Paul Mundt | e79066a | 2009-04-20 18:29:22 +0900 | [diff] [blame^] | 22 | int (*init)(struct pci_channel *chan); |
| 23 | |
| 24 | struct pci_ops *pci_ops; |
| 25 | struct resource *io_resource; |
| 26 | struct resource *mem_resource; |
| 27 | |
| 28 | int first_devfn; |
| 29 | int last_devfn; |
| 30 | int enabled; |
| 31 | |
| 32 | unsigned long reg_base; |
| 33 | unsigned long io_base; |
| 34 | |
| 35 | unsigned long io_map_base; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 36 | }; |
| 37 | |
| 38 | /* |
| 39 | * Each board initializes this array and terminates it with a NULL entry. |
| 40 | */ |
| 41 | extern struct pci_channel board_pci_channels[]; |
| 42 | |
Paul Mundt | e79066a | 2009-04-20 18:29:22 +0900 | [diff] [blame^] | 43 | extern void register_pci_controller(struct pci_channel *hose); |
| 44 | |
Paul Mundt | a3c0e0d | 2009-04-20 16:14:29 +0900 | [diff] [blame] | 45 | extern unsigned long PCIBIOS_MIN_IO, PCIBIOS_MIN_MEM; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 46 | |
| 47 | struct pci_dev; |
| 48 | |
Paul Mundt | 9833385 | 2009-04-20 15:51:45 +0900 | [diff] [blame] | 49 | #define HAVE_PCI_MMAP |
| 50 | extern int pci_mmap_page_range(struct pci_dev *dev, struct vm_area_struct *vma, |
| 51 | enum pci_mmap_state mmap_state, int write_combine); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 52 | extern void pcibios_set_master(struct pci_dev *dev); |
| 53 | |
David Shaohua Li | c9c3e45 | 2005-04-01 00:07:31 -0500 | [diff] [blame] | 54 | static inline void pcibios_penalize_isa_irq(int irq, int active) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 55 | { |
| 56 | /* We don't do dynamic PCI IRQ allocation */ |
| 57 | } |
| 58 | |
| 59 | /* Dynamic DMA mapping stuff. |
| 60 | * SuperH has everything mapped statically like x86. |
| 61 | */ |
| 62 | |
| 63 | /* The PCI address space does equal the physical memory |
| 64 | * address space. The networking and block device layers use |
| 65 | * this boolean for bounce buffer decisions. |
| 66 | */ |
| 67 | #define PCI_DMA_BUS_IS_PHYS (1) |
| 68 | |
| 69 | #include <linux/types.h> |
| 70 | #include <linux/slab.h> |
| 71 | #include <asm/scatterlist.h> |
| 72 | #include <linux/string.h> |
| 73 | #include <asm/io.h> |
| 74 | |
| 75 | /* pci_unmap_{single,page} being a nop depends upon the |
| 76 | * configuration. |
| 77 | */ |
| 78 | #ifdef CONFIG_SH_PCIDMA_NONCOHERENT |
| 79 | #define DECLARE_PCI_UNMAP_ADDR(ADDR_NAME) \ |
| 80 | dma_addr_t ADDR_NAME; |
| 81 | #define DECLARE_PCI_UNMAP_LEN(LEN_NAME) \ |
| 82 | __u32 LEN_NAME; |
| 83 | #define pci_unmap_addr(PTR, ADDR_NAME) \ |
| 84 | ((PTR)->ADDR_NAME) |
| 85 | #define pci_unmap_addr_set(PTR, ADDR_NAME, VAL) \ |
| 86 | (((PTR)->ADDR_NAME) = (VAL)) |
| 87 | #define pci_unmap_len(PTR, LEN_NAME) \ |
| 88 | ((PTR)->LEN_NAME) |
| 89 | #define pci_unmap_len_set(PTR, LEN_NAME, VAL) \ |
| 90 | (((PTR)->LEN_NAME) = (VAL)) |
| 91 | #else |
| 92 | #define DECLARE_PCI_UNMAP_ADDR(ADDR_NAME) |
| 93 | #define DECLARE_PCI_UNMAP_LEN(LEN_NAME) |
| 94 | #define pci_unmap_addr(PTR, ADDR_NAME) (0) |
| 95 | #define pci_unmap_addr_set(PTR, ADDR_NAME, VAL) do { } while (0) |
| 96 | #define pci_unmap_len(PTR, LEN_NAME) (0) |
| 97 | #define pci_unmap_len_set(PTR, LEN_NAME, VAL) do { } while (0) |
| 98 | #endif |
| 99 | |
David S. Miller | e24c2d9 | 2005-06-02 12:55:50 -0700 | [diff] [blame] | 100 | static inline void pci_dma_burst_advice(struct pci_dev *pdev, |
| 101 | enum pci_dma_burst_strategy *strat, |
| 102 | unsigned long *strategy_parameter) |
| 103 | { |
| 104 | *strat = PCI_DMA_BURST_INFINITY; |
| 105 | *strategy_parameter = ~0UL; |
| 106 | } |
Magnus Damm | ef339f2 | 2008-02-19 21:35:22 +0900 | [diff] [blame] | 107 | |
Paul Mundt | 99f95f1 | 2009-04-20 18:24:57 +0900 | [diff] [blame] | 108 | #ifdef CONFIG_SUPERH32 |
| 109 | /* |
| 110 | * If we're on an SH7751 or SH7780 PCI controller, PCI memory is mapped |
| 111 | * at the end of the address space in a special non-translatable area. |
| 112 | */ |
| 113 | #define PCI_MEM_FIXED_START 0xfd000000 |
| 114 | #define PCI_MEM_FIXED_END (PCI_MEM_FIXED_START + 0x01000000) |
Magnus Damm | ef339f2 | 2008-02-19 21:35:22 +0900 | [diff] [blame] | 115 | |
Paul Mundt | 99f95f1 | 2009-04-20 18:24:57 +0900 | [diff] [blame] | 116 | #define is_pci_memory_fixed_range(s, e) \ |
| 117 | ((s) >= PCI_MEM_FIXED_START && (e) < PCI_MEM_FIXED_END) |
Magnus Damm | ef339f2 | 2008-02-19 21:35:22 +0900 | [diff] [blame] | 118 | #else |
Paul Mundt | 99f95f1 | 2009-04-20 18:24:57 +0900 | [diff] [blame] | 119 | #define is_pci_memory_fixed_range(s, e) (0) |
Andrew Morton | bb4a61b | 2005-06-06 23:07:46 -0700 | [diff] [blame] | 120 | #endif |
David S. Miller | e24c2d9 | 2005-06-02 12:55:50 -0700 | [diff] [blame] | 121 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 122 | /* Board-specific fixup routines. */ |
Paul Mundt | 959f85f | 2006-09-27 16:43:28 +0900 | [diff] [blame] | 123 | int pcibios_init_platform(void); |
| 124 | int pcibios_map_platform_irq(struct pci_dev *dev, u8 slot, u8 pin); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 125 | |
| 126 | #ifdef CONFIG_PCI_AUTO |
Paul Mundt | 959f85f | 2006-09-27 16:43:28 +0900 | [diff] [blame] | 127 | int pciauto_assign_resources(int busno, struct pci_channel *hose); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 128 | #endif |
| 129 | |
Paul Mundt | 9ade121 | 2009-04-20 15:38:25 +0900 | [diff] [blame] | 130 | extern void pcibios_resource_to_bus(struct pci_dev *dev, |
| 131 | struct pci_bus_region *region, struct resource *res); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 132 | |
Paul Mundt | 9ade121 | 2009-04-20 15:38:25 +0900 | [diff] [blame] | 133 | extern void pcibios_bus_to_resource(struct pci_dev *dev, struct resource *res, |
| 134 | struct pci_bus_region *region); |
| 135 | |
| 136 | static inline struct resource * |
| 137 | pcibios_select_root(struct pci_dev *pdev, struct resource *res) |
| 138 | { |
| 139 | struct resource *root = NULL; |
| 140 | |
| 141 | if (res->flags & IORESOURCE_IO) |
| 142 | root = &ioport_resource; |
| 143 | if (res->flags & IORESOURCE_MEM) |
| 144 | root = &iomem_resource; |
| 145 | |
| 146 | return root; |
| 147 | } |
| 148 | |
| 149 | /* Chances are this interrupt is wired PC-style ... */ |
| 150 | static inline int pci_get_legacy_ide_irq(struct pci_dev *dev, int channel) |
| 151 | { |
| 152 | return channel ? 15 : 14; |
| 153 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 154 | |
| 155 | /* generic DMA-mapping stuff */ |
| 156 | #include <asm-generic/pci-dma-compat.h> |
| 157 | |
Paul Mundt | 9ade121 | 2009-04-20 15:38:25 +0900 | [diff] [blame] | 158 | #endif /* __KERNEL__ */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 159 | #endif /* __ASM_SH_PCI_H */ |
| 160 | |