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gerrit-public.fairphone.software / kernel / msm-5.4 / 8a5bdf41d2c027c1e4ad62bc4f96f3fdf82070ba / . / tools / power / x86 / turbostat / turbostat.c
blob: 203d45d0a560d18f40a19fd830e5fd046207802f [file] [log] [blame]
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]1/*
2 * turbostat -- show CPU frequency and C-state residency
3 * on modern Intel turbo-capable processors.
4 *
Len Brown144b44b2013-11-09 00:30:16 -0500[diff] [blame]5 * Copyright (c) 2013 Intel Corporation.
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]6 * Len Brown <len.brown@intel.com>
7 *
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms and conditions of the GNU General Public License,
10 * version 2, as published by the Free Software Foundation.
11 *
12 * This program is distributed in the hope it will be useful, but WITHOUT
13 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
14 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
15 * more details.
16 *
17 * You should have received a copy of the GNU General Public License along with
18 * this program; if not, write to the Free Software Foundation, Inc.,
19 * 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
20 */
21
Len Brown88c32812012-03-29 21:44:40 -0400[diff] [blame]22#define _GNU_SOURCE
Josh Triplettb731f312013-08-20 17:20:12 -0700[diff] [blame]23#include MSRHEADER
Josh Triplett95aebc42013-08-20 17:20:16 -0700[diff] [blame]24#include <stdarg.h>
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]25#include <stdio.h>
Josh Triplettb2c95d92013-08-20 17:20:18 -0700[diff] [blame]26#include <err.h>
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]27#include <unistd.h>
28#include <sys/types.h>
29#include <sys/wait.h>
30#include <sys/stat.h>
31#include <sys/resource.h>
32#include <fcntl.h>
33#include <signal.h>
34#include <sys/time.h>
35#include <stdlib.h>
Len Brownd8af6f52015-02-10 01:56:38 -0500[diff] [blame]36#include <getopt.h>
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]37#include <dirent.h>
38#include <string.h>
39#include <ctype.h>
Len Brown88c32812012-03-29 21:44:40 -0400[diff] [blame]40#include <sched.h>
Josh Triplett2b928652013-08-20 17:20:14 -0700[diff] [blame]41#include <cpuid.h>
Len Brown98481e72014-08-15 00:36:50 -0400[diff] [blame]42#include <linux/capability.h>
43#include <errno.h>
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]44
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]45char *proc_stat = "/proc/stat";
Len Brownd8af6f52015-02-10 01:56:38 -0500[diff] [blame]46unsigned int interval_sec = 5;
47unsigned int debug;
48unsigned int rapl_joules;
49unsigned int summary_only;
50unsigned int dump_only;
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]51unsigned int skip_c0;
52unsigned int skip_c1;
53unsigned int do_nhm_cstates;
54unsigned int do_snb_cstates;
Len Brownee7e38e2015-02-09 23:39:45 -0500[diff] [blame]55unsigned int do_pc2;
56unsigned int do_pc3;
57unsigned int do_pc6;
58unsigned int do_pc7;
Kristen Carlson Accardica587102012-11-21 05:22:43 -0800[diff] [blame]59unsigned int do_c8_c9_c10;
Len Brown0b2bb692015-03-26 00:50:30 -0400[diff] [blame]60unsigned int do_skl_residency;
Len Brown144b44b2013-11-09 00:30:16 -0500[diff] [blame]61unsigned int do_slm_cstates;
62unsigned int use_c1_residency_msr;
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]63unsigned int has_aperf;
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]64unsigned int has_epb;
Len Brownfc04cc62014-02-06 00:55:19 -0500[diff] [blame]65unsigned int units = 1000000; /* MHz etc */
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]66unsigned int genuine_intel;
67unsigned int has_invariant_tsc;
Len Brownd7899442015-01-23 00:12:33 -0500[diff] [blame]68unsigned int do_nhm_platform_info;
Len Brown2f32edf2012-09-21 23:45:46 -0400[diff] [blame]69unsigned int extra_msr_offset32;
70unsigned int extra_msr_offset64;
Len Brown8e180f32012-09-22 01:25:08 -0400[diff] [blame]71unsigned int extra_delta_offset32;
72unsigned int extra_delta_offset64;
Len Brown1ed51012013-02-10 17:19:24 -0500[diff] [blame]73int do_smi;
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]74double bclk;
75unsigned int show_pkg;
76unsigned int show_core;
77unsigned int show_cpu;
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]78unsigned int show_pkg_only;
79unsigned int show_core_only;
80char *output_buffer, *outp;
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]81unsigned int do_rapl;
82unsigned int do_dts;
83unsigned int do_ptm;
84unsigned int tcc_activation_temp;
85unsigned int tcc_activation_temp_override;
Andrey Semin40ee8e32014-12-05 00:07:00 -0500[diff] [blame]86double rapl_power_units, rapl_time_units;
87double rapl_dram_energy_units, rapl_energy_units;
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]88double rapl_joule_counter_range;
Len Brown3a9a9412014-08-15 02:39:52 -0400[diff] [blame]89unsigned int do_core_perf_limit_reasons;
90unsigned int do_gfx_perf_limit_reasons;
91unsigned int do_ring_perf_limit_reasons;
Len Brown8a5bdf42015-04-01 21:02:57 -0400[diff] [blame^]92unsigned int crystal_hz;
93unsigned long long tsc_hz;
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]94
Len Browne6f9bb32013-12-03 02:19:19 -0500[diff] [blame]95#define RAPL_PKG (1 << 0)
96 /* 0x610 MSR_PKG_POWER_LIMIT */
97 /* 0x611 MSR_PKG_ENERGY_STATUS */
98#define RAPL_PKG_PERF_STATUS (1 << 1)
99 /* 0x613 MSR_PKG_PERF_STATUS */
100#define RAPL_PKG_POWER_INFO (1 << 2)
101 /* 0x614 MSR_PKG_POWER_INFO */
102
103#define RAPL_DRAM (1 << 3)
104 /* 0x618 MSR_DRAM_POWER_LIMIT */
105 /* 0x619 MSR_DRAM_ENERGY_STATUS */
Len Browne6f9bb32013-12-03 02:19:19 -0500[diff] [blame]106#define RAPL_DRAM_PERF_STATUS (1 << 4)
107 /* 0x61b MSR_DRAM_PERF_STATUS */
Len Brown0b2bb692015-03-26 00:50:30 -0400[diff] [blame]108#define RAPL_DRAM_POWER_INFO (1 << 5)
109 /* 0x61c MSR_DRAM_POWER_INFO */
Len Browne6f9bb32013-12-03 02:19:19 -0500[diff] [blame]110
Len Brown0b2bb692015-03-26 00:50:30 -0400[diff] [blame]111#define RAPL_CORES (1 << 6)
Len Browne6f9bb32013-12-03 02:19:19 -0500[diff] [blame]112 /* 0x638 MSR_PP0_POWER_LIMIT */
113 /* 0x639 MSR_PP0_ENERGY_STATUS */
Len Brown0b2bb692015-03-26 00:50:30 -0400[diff] [blame]114#define RAPL_CORE_POLICY (1 << 7)
Len Browne6f9bb32013-12-03 02:19:19 -0500[diff] [blame]115 /* 0x63a MSR_PP0_POLICY */
116
Len Brown0b2bb692015-03-26 00:50:30 -0400[diff] [blame]117#define RAPL_GFX (1 << 8)
Len Browne6f9bb32013-12-03 02:19:19 -0500[diff] [blame]118 /* 0x640 MSR_PP1_POWER_LIMIT */
119 /* 0x641 MSR_PP1_ENERGY_STATUS */
120 /* 0x642 MSR_PP1_POLICY */
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]121#define TJMAX_DEFAULT 100
122
123#define MAX(a, b) ((a) > (b) ? (a) : (b))
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]124
125int aperf_mperf_unstable;
126int backwards_count;
127char *progname;
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]128
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]129cpu_set_t *cpu_present_set, *cpu_affinity_set;
130size_t cpu_present_setsize, cpu_affinity_setsize;
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]131
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]132struct thread_data {
133 unsigned long long tsc;
134 unsigned long long aperf;
135 unsigned long long mperf;
Len Brown144b44b2013-11-09 00:30:16 -0500[diff] [blame]136 unsigned long long c1;
Len Brown2f32edf2012-09-21 23:45:46 -0400[diff] [blame]137 unsigned long long extra_msr64;
Len Brown8e180f32012-09-22 01:25:08 -0400[diff] [blame]138 unsigned long long extra_delta64;
139 unsigned long long extra_msr32;
140 unsigned long long extra_delta32;
Len Brown1ed51012013-02-10 17:19:24 -0500[diff] [blame]141 unsigned int smi_count;
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]142 unsigned int cpu_id;
143 unsigned int flags;
144#define CPU_IS_FIRST_THREAD_IN_CORE 0x2
145#define CPU_IS_FIRST_CORE_IN_PACKAGE 0x4
146} *thread_even, *thread_odd;
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]147
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]148struct core_data {
149 unsigned long long c3;
150 unsigned long long c6;
151 unsigned long long c7;
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]152 unsigned int core_temp_c;
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]153 unsigned int core_id;
154} *core_even, *core_odd;
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]155
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]156struct pkg_data {
157 unsigned long long pc2;
158 unsigned long long pc3;
159 unsigned long long pc6;
160 unsigned long long pc7;
Kristen Carlson Accardica587102012-11-21 05:22:43 -0800[diff] [blame]161 unsigned long long pc8;
162 unsigned long long pc9;
163 unsigned long long pc10;
Len Brown0b2bb692015-03-26 00:50:30 -0400[diff] [blame]164 unsigned long long pkg_wtd_core_c0;
165 unsigned long long pkg_any_core_c0;
166 unsigned long long pkg_any_gfxe_c0;
167 unsigned long long pkg_both_core_gfxe_c0;
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]168 unsigned int package_id;
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]169 unsigned int energy_pkg; /* MSR_PKG_ENERGY_STATUS */
170 unsigned int energy_dram; /* MSR_DRAM_ENERGY_STATUS */
171 unsigned int energy_cores; /* MSR_PP0_ENERGY_STATUS */
172 unsigned int energy_gfx; /* MSR_PP1_ENERGY_STATUS */
173 unsigned int rapl_pkg_perf_status; /* MSR_PKG_PERF_STATUS */
174 unsigned int rapl_dram_perf_status; /* MSR_DRAM_PERF_STATUS */
175 unsigned int pkg_temp_c;
176
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]177} *package_even, *package_odd;
178
179#define ODD_COUNTERS thread_odd, core_odd, package_odd
180#define EVEN_COUNTERS thread_even, core_even, package_even
181
182#define GET_THREAD(thread_base, thread_no, core_no, pkg_no) \
183 (thread_base + (pkg_no) * topo.num_cores_per_pkg * \
184 topo.num_threads_per_core + \
185 (core_no) * topo.num_threads_per_core + (thread_no))
186#define GET_CORE(core_base, core_no, pkg_no) \
187 (core_base + (pkg_no) * topo.num_cores_per_pkg + (core_no))
188#define GET_PKG(pkg_base, pkg_no) (pkg_base + pkg_no)
189
190struct system_summary {
191 struct thread_data threads;
192 struct core_data cores;
193 struct pkg_data packages;
194} sum, average;
195
196
197struct topo_params {
198 int num_packages;
199 int num_cpus;
200 int num_cores;
201 int max_cpu_num;
202 int num_cores_per_pkg;
203 int num_threads_per_core;
204} topo;
205
206struct timeval tv_even, tv_odd, tv_delta;
207
208void setup_all_buffers(void);
209
210int cpu_is_not_present(int cpu)
Len Brownd15cf7c2012-06-03 23:24:00 -0400[diff] [blame]211{
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]212 return !CPU_ISSET_S(cpu, cpu_present_setsize, cpu_present_set);
Len Brownd15cf7c2012-06-03 23:24:00 -0400[diff] [blame]213}
Len Brown88c32812012-03-29 21:44:40 -0400[diff] [blame]214/*
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]215 * run func(thread, core, package) in topology order
216 * skip non-present cpus
Len Brown88c32812012-03-29 21:44:40 -0400[diff] [blame]217 */
Len Brownd15cf7c2012-06-03 23:24:00 -0400[diff] [blame]218
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]219int for_all_cpus(int (func)(struct thread_data *, struct core_data *, struct pkg_data *),
220 struct thread_data *thread_base, struct core_data *core_base, struct pkg_data *pkg_base)
Len Brown88c32812012-03-29 21:44:40 -0400[diff] [blame]221{
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]222 int retval, pkg_no, core_no, thread_no;
223
224 for (pkg_no = 0; pkg_no < topo.num_packages; ++pkg_no) {
225 for (core_no = 0; core_no < topo.num_cores_per_pkg; ++core_no) {
226 for (thread_no = 0; thread_no <
227 topo.num_threads_per_core; ++thread_no) {
228 struct thread_data *t;
229 struct core_data *c;
230 struct pkg_data *p;
231
232 t = GET_THREAD(thread_base, thread_no, core_no, pkg_no);
233
234 if (cpu_is_not_present(t->cpu_id))
235 continue;
236
237 c = GET_CORE(core_base, core_no, pkg_no);
238 p = GET_PKG(pkg_base, pkg_no);
239
240 retval = func(t, c, p);
241 if (retval)
242 return retval;
243 }
244 }
245 }
246 return 0;
Len Brown88c32812012-03-29 21:44:40 -0400[diff] [blame]247}
248
249int cpu_migrate(int cpu)
250{
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]251 CPU_ZERO_S(cpu_affinity_setsize, cpu_affinity_set);
252 CPU_SET_S(cpu, cpu_affinity_setsize, cpu_affinity_set);
253 if (sched_setaffinity(0, cpu_affinity_setsize, cpu_affinity_set) == -1)
Len Brown88c32812012-03-29 21:44:40 -0400[diff] [blame]254 return -1;
255 else
256 return 0;
257}
258
Len Brown15aaa342012-03-29 22:19:58 -0400[diff] [blame]259int get_msr(int cpu, off_t offset, unsigned long long *msr)
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]260{
261 ssize_t retval;
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]262 char pathname[32];
263 int fd;
264
265 sprintf(pathname, "/dev/cpu/%d/msr", cpu);
266 fd = open(pathname, O_RDONLY);
Len Brown15aaa342012-03-29 22:19:58 -0400[diff] [blame]267 if (fd < 0)
Len Brown98481e72014-08-15 00:36:50 -0400[diff] [blame]268 err(-1, "%s open failed, try chown or chmod +r /dev/cpu/*/msr, or run as root", pathname);
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]269
Len Brown15aaa342012-03-29 22:19:58 -0400[diff] [blame]270 retval = pread(fd, msr, sizeof *msr, offset);
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]271 close(fd);
Len Brown15aaa342012-03-29 22:19:58 -0400[diff] [blame]272
Len Brown98481e72014-08-15 00:36:50 -0400[diff] [blame]273 if (retval != sizeof *msr)
274 err(-1, "%s offset 0x%llx read failed", pathname, (unsigned long long)offset);
Len Brown15aaa342012-03-29 22:19:58 -0400[diff] [blame]275
276 return 0;
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]277}
278
Len Brownfc04cc62014-02-06 00:55:19 -0500[diff] [blame]279/*
280 * Example Format w/ field column widths:
281 *
Len Browne7c95ff2014-08-14 21:22:13 -0400[diff] [blame]282 * Package Core CPU Avg_MHz Bzy_MHz TSC_MHz SMI %Busy CPU_%c1 CPU_%c3 CPU_%c6 CPU_%c7 CoreTmp PkgTmp Pkg%pc2 Pkg%pc3 Pkg%pc6 Pkg%pc7 PkgWatt CorWatt GFXWatt
283 * 123456781234567812345678123456781234567812345678123456781234567812345678123456781234567812345678123456781234567812345678123456781234567812345678123456781234567812345678
Len Brownfc04cc62014-02-06 00:55:19 -0500[diff] [blame]284 */
285
Len Browna829eb42011-02-10 23:36:34 -0500[diff] [blame]286void print_header(void)
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]287{
288 if (show_pkg)
Len Browne7c95ff2014-08-14 21:22:13 -0400[diff] [blame]289 outp += sprintf(outp, " Package");
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]290 if (show_core)
Len Browne7c95ff2014-08-14 21:22:13 -0400[diff] [blame]291 outp += sprintf(outp, " Core");
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]292 if (show_cpu)
Len Browne7c95ff2014-08-14 21:22:13 -0400[diff] [blame]293 outp += sprintf(outp, " CPU");
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]294 if (has_aperf)
Len Browne7c95ff2014-08-14 21:22:13 -0400[diff] [blame]295 outp += sprintf(outp, " Avg_MHz");
Len Brownd7899442015-01-23 00:12:33 -0500[diff] [blame]296 if (has_aperf)
Len Browne7c95ff2014-08-14 21:22:13 -0400[diff] [blame]297 outp += sprintf(outp, " %%Busy");
Len Brownfc04cc62014-02-06 00:55:19 -0500[diff] [blame]298 if (has_aperf)
Len Browne7c95ff2014-08-14 21:22:13 -0400[diff] [blame]299 outp += sprintf(outp, " Bzy_MHz");
300 outp += sprintf(outp, " TSC_MHz");
Len Brown1cc21f72015-02-23 00:34:57 -0500[diff] [blame]301
Len Brown8e180f32012-09-22 01:25:08 -0400[diff] [blame]302 if (extra_delta_offset32)
Len Browne7c95ff2014-08-14 21:22:13 -0400[diff] [blame]303 outp += sprintf(outp, " count 0x%03X", extra_delta_offset32);
Len Brown8e180f32012-09-22 01:25:08 -0400[diff] [blame]304 if (extra_delta_offset64)
Len Browne7c95ff2014-08-14 21:22:13 -0400[diff] [blame]305 outp += sprintf(outp, " COUNT 0x%03X", extra_delta_offset64);
Len Brown2f32edf2012-09-21 23:45:46 -0400[diff] [blame]306 if (extra_msr_offset32)
Len Browne7c95ff2014-08-14 21:22:13 -0400[diff] [blame]307 outp += sprintf(outp, " MSR 0x%03X", extra_msr_offset32);
Len Brown2f32edf2012-09-21 23:45:46 -0400[diff] [blame]308 if (extra_msr_offset64)
Len Browne7c95ff2014-08-14 21:22:13 -0400[diff] [blame]309 outp += sprintf(outp, " MSR 0x%03X", extra_msr_offset64);
Len Brown1cc21f72015-02-23 00:34:57 -0500[diff] [blame]310
311 if (!debug)
312 goto done;
313
314 if (do_smi)
315 outp += sprintf(outp, " SMI");
316
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]317 if (do_nhm_cstates)
Len Browne7c95ff2014-08-14 21:22:13 -0400[diff] [blame]318 outp += sprintf(outp, " CPU%%c1");
Len Brown144b44b2013-11-09 00:30:16 -0500[diff] [blame]319 if (do_nhm_cstates && !do_slm_cstates)
Len Browne7c95ff2014-08-14 21:22:13 -0400[diff] [blame]320 outp += sprintf(outp, " CPU%%c3");
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]321 if (do_nhm_cstates)
Len Browne7c95ff2014-08-14 21:22:13 -0400[diff] [blame]322 outp += sprintf(outp, " CPU%%c6");
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]323 if (do_snb_cstates)
Len Browne7c95ff2014-08-14 21:22:13 -0400[diff] [blame]324 outp += sprintf(outp, " CPU%%c7");
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]325
326 if (do_dts)
Len Browne7c95ff2014-08-14 21:22:13 -0400[diff] [blame]327 outp += sprintf(outp, " CoreTmp");
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]328 if (do_ptm)
Len Browne7c95ff2014-08-14 21:22:13 -0400[diff] [blame]329 outp += sprintf(outp, " PkgTmp");
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]330
Len Brown0b2bb692015-03-26 00:50:30 -0400[diff] [blame]331 if (do_skl_residency) {
332 outp += sprintf(outp, " Totl%%C0");
333 outp += sprintf(outp, " Any%%C0");
334 outp += sprintf(outp, " GFX%%C0");
335 outp += sprintf(outp, " CPUGFX%%");
336 }
337
Len Brownee7e38e2015-02-09 23:39:45 -0500[diff] [blame]338 if (do_pc2)
Len Browne7c95ff2014-08-14 21:22:13 -0400[diff] [blame]339 outp += sprintf(outp, " Pkg%%pc2");
Len Brownee7e38e2015-02-09 23:39:45 -0500[diff] [blame]340 if (do_pc3)
Len Browne7c95ff2014-08-14 21:22:13 -0400[diff] [blame]341 outp += sprintf(outp, " Pkg%%pc3");
Len Brownee7e38e2015-02-09 23:39:45 -0500[diff] [blame]342 if (do_pc6)
Len Browne7c95ff2014-08-14 21:22:13 -0400[diff] [blame]343 outp += sprintf(outp, " Pkg%%pc6");
Len Brownee7e38e2015-02-09 23:39:45 -0500[diff] [blame]344 if (do_pc7)
Len Browne7c95ff2014-08-14 21:22:13 -0400[diff] [blame]345 outp += sprintf(outp, " Pkg%%pc7");
Kristen Carlson Accardica587102012-11-21 05:22:43 -0800[diff] [blame]346 if (do_c8_c9_c10) {
Len Browne7c95ff2014-08-14 21:22:13 -0400[diff] [blame]347 outp += sprintf(outp, " Pkg%%pc8");
348 outp += sprintf(outp, " Pkg%%pc9");
349 outp += sprintf(outp, " Pk%%pc10");
Kristen Carlson Accardica587102012-11-21 05:22:43 -0800[diff] [blame]350 }
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]351
Dirk Brandewie5c56be92013-12-16 10:23:41 -0800[diff] [blame]352 if (do_rapl && !rapl_joules) {
353 if (do_rapl & RAPL_PKG)
Len Browne7c95ff2014-08-14 21:22:13 -0400[diff] [blame]354 outp += sprintf(outp, " PkgWatt");
Dirk Brandewie5c56be92013-12-16 10:23:41 -0800[diff] [blame]355 if (do_rapl & RAPL_CORES)
Len Browne7c95ff2014-08-14 21:22:13 -0400[diff] [blame]356 outp += sprintf(outp, " CorWatt");
Dirk Brandewie5c56be92013-12-16 10:23:41 -0800[diff] [blame]357 if (do_rapl & RAPL_GFX)
Len Browne7c95ff2014-08-14 21:22:13 -0400[diff] [blame]358 outp += sprintf(outp, " GFXWatt");
Dirk Brandewie5c56be92013-12-16 10:23:41 -0800[diff] [blame]359 if (do_rapl & RAPL_DRAM)
Len Browne7c95ff2014-08-14 21:22:13 -0400[diff] [blame]360 outp += sprintf(outp, " RAMWatt");
Dirk Brandewie5c56be92013-12-16 10:23:41 -0800[diff] [blame]361 if (do_rapl & RAPL_PKG_PERF_STATUS)
Len Browne7c95ff2014-08-14 21:22:13 -0400[diff] [blame]362 outp += sprintf(outp, " PKG_%%");
Dirk Brandewie5c56be92013-12-16 10:23:41 -0800[diff] [blame]363 if (do_rapl & RAPL_DRAM_PERF_STATUS)
Len Browne7c95ff2014-08-14 21:22:13 -0400[diff] [blame]364 outp += sprintf(outp, " RAM_%%");
Len Brownd7899442015-01-23 00:12:33 -0500[diff] [blame]365 } else if (do_rapl && rapl_joules) {
Dirk Brandewie5c56be92013-12-16 10:23:41 -0800[diff] [blame]366 if (do_rapl & RAPL_PKG)
Len Browne7c95ff2014-08-14 21:22:13 -0400[diff] [blame]367 outp += sprintf(outp, " Pkg_J");
Dirk Brandewie5c56be92013-12-16 10:23:41 -0800[diff] [blame]368 if (do_rapl & RAPL_CORES)
Len Browne7c95ff2014-08-14 21:22:13 -0400[diff] [blame]369 outp += sprintf(outp, " Cor_J");
Dirk Brandewie5c56be92013-12-16 10:23:41 -0800[diff] [blame]370 if (do_rapl & RAPL_GFX)
Len Browne7c95ff2014-08-14 21:22:13 -0400[diff] [blame]371 outp += sprintf(outp, " GFX_J");
Dirk Brandewie5c56be92013-12-16 10:23:41 -0800[diff] [blame]372 if (do_rapl & RAPL_DRAM)
Len Browne7c95ff2014-08-14 21:22:13 -0400[diff] [blame]373 outp += sprintf(outp, " RAM_W");
Dirk Brandewie5c56be92013-12-16 10:23:41 -0800[diff] [blame]374 if (do_rapl & RAPL_PKG_PERF_STATUS)
Len Browne7c95ff2014-08-14 21:22:13 -0400[diff] [blame]375 outp += sprintf(outp, " PKG_%%");
Dirk Brandewie5c56be92013-12-16 10:23:41 -0800[diff] [blame]376 if (do_rapl & RAPL_DRAM_PERF_STATUS)
Len Browne7c95ff2014-08-14 21:22:13 -0400[diff] [blame]377 outp += sprintf(outp, " RAM_%%");
378 outp += sprintf(outp, " time");
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]379
Dirk Brandewie5c56be92013-12-16 10:23:41 -0800[diff] [blame]380 }
Len Brown1cc21f72015-02-23 00:34:57 -0500[diff] [blame]381 done:
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]382 outp += sprintf(outp, "\n");
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]383}
384
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]385int dump_counters(struct thread_data *t, struct core_data *c,
386 struct pkg_data *p)
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]387{
Andy Shevchenko3b4d5c72014-01-23 17:13:15 +0200[diff] [blame]388 outp += sprintf(outp, "t %p, c %p, p %p\n", t, c, p);
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]389
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]390 if (t) {
Andy Shevchenko3b4d5c72014-01-23 17:13:15 +0200[diff] [blame]391 outp += sprintf(outp, "CPU: %d flags 0x%x\n",
392 t->cpu_id, t->flags);
393 outp += sprintf(outp, "TSC: %016llX\n", t->tsc);
394 outp += sprintf(outp, "aperf: %016llX\n", t->aperf);
395 outp += sprintf(outp, "mperf: %016llX\n", t->mperf);
396 outp += sprintf(outp, "c1: %016llX\n", t->c1);
397 outp += sprintf(outp, "msr0x%x: %08llX\n",
Len Brown8e180f32012-09-22 01:25:08 -0400[diff] [blame]398 extra_delta_offset32, t->extra_delta32);
Andy Shevchenko3b4d5c72014-01-23 17:13:15 +0200[diff] [blame]399 outp += sprintf(outp, "msr0x%x: %016llX\n",
Len Brown8e180f32012-09-22 01:25:08 -0400[diff] [blame]400 extra_delta_offset64, t->extra_delta64);
Andy Shevchenko3b4d5c72014-01-23 17:13:15 +0200[diff] [blame]401 outp += sprintf(outp, "msr0x%x: %08llX\n",
Len Brown2f32edf2012-09-21 23:45:46 -0400[diff] [blame]402 extra_msr_offset32, t->extra_msr32);
Andy Shevchenko3b4d5c72014-01-23 17:13:15 +0200[diff] [blame]403 outp += sprintf(outp, "msr0x%x: %016llX\n",
Len Brown2f32edf2012-09-21 23:45:46 -0400[diff] [blame]404 extra_msr_offset64, t->extra_msr64);
Len Brown1ed51012013-02-10 17:19:24 -0500[diff] [blame]405 if (do_smi)
Andy Shevchenko3b4d5c72014-01-23 17:13:15 +0200[diff] [blame]406 outp += sprintf(outp, "SMI: %08X\n", t->smi_count);
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]407 }
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]408
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]409 if (c) {
Andy Shevchenko3b4d5c72014-01-23 17:13:15 +0200[diff] [blame]410 outp += sprintf(outp, "core: %d\n", c->core_id);
411 outp += sprintf(outp, "c3: %016llX\n", c->c3);
412 outp += sprintf(outp, "c6: %016llX\n", c->c6);
413 outp += sprintf(outp, "c7: %016llX\n", c->c7);
414 outp += sprintf(outp, "DTS: %dC\n", c->core_temp_c);
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]415 }
416
417 if (p) {
Andy Shevchenko3b4d5c72014-01-23 17:13:15 +0200[diff] [blame]418 outp += sprintf(outp, "package: %d\n", p->package_id);
Len Brown0b2bb692015-03-26 00:50:30 -0400[diff] [blame]419
420 outp += sprintf(outp, "Weighted cores: %016llX\n", p->pkg_wtd_core_c0);
421 outp += sprintf(outp, "Any cores: %016llX\n", p->pkg_any_core_c0);
422 outp += sprintf(outp, "Any GFX: %016llX\n", p->pkg_any_gfxe_c0);
423 outp += sprintf(outp, "CPU + GFX: %016llX\n", p->pkg_both_core_gfxe_c0);
424
Andy Shevchenko3b4d5c72014-01-23 17:13:15 +0200[diff] [blame]425 outp += sprintf(outp, "pc2: %016llX\n", p->pc2);
Len Brownee7e38e2015-02-09 23:39:45 -0500[diff] [blame]426 if (do_pc3)
427 outp += sprintf(outp, "pc3: %016llX\n", p->pc3);
428 if (do_pc6)
429 outp += sprintf(outp, "pc6: %016llX\n", p->pc6);
430 if (do_pc7)
431 outp += sprintf(outp, "pc7: %016llX\n", p->pc7);
Andy Shevchenko3b4d5c72014-01-23 17:13:15 +0200[diff] [blame]432 outp += sprintf(outp, "pc8: %016llX\n", p->pc8);
433 outp += sprintf(outp, "pc9: %016llX\n", p->pc9);
434 outp += sprintf(outp, "pc10: %016llX\n", p->pc10);
435 outp += sprintf(outp, "Joules PKG: %0X\n", p->energy_pkg);
436 outp += sprintf(outp, "Joules COR: %0X\n", p->energy_cores);
437 outp += sprintf(outp, "Joules GFX: %0X\n", p->energy_gfx);
438 outp += sprintf(outp, "Joules RAM: %0X\n", p->energy_dram);
439 outp += sprintf(outp, "Throttle PKG: %0X\n",
440 p->rapl_pkg_perf_status);
441 outp += sprintf(outp, "Throttle RAM: %0X\n",
442 p->rapl_dram_perf_status);
443 outp += sprintf(outp, "PTM: %dC\n", p->pkg_temp_c);
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]444 }
Andy Shevchenko3b4d5c72014-01-23 17:13:15 +0200[diff] [blame]445
446 outp += sprintf(outp, "\n");
447
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]448 return 0;
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]449}
450
Len Browne23da032012-02-06 18:37:16 -0500[diff] [blame]451/*
452 * column formatting convention & formats
Len Browne23da032012-02-06 18:37:16 -0500[diff] [blame]453 */
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]454int format_counters(struct thread_data *t, struct core_data *c,
455 struct pkg_data *p)
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]456{
457 double interval_float;
Len Brownfc04cc62014-02-06 00:55:19 -0500[diff] [blame]458 char *fmt8;
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]459
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]460 /* if showing only 1st thread in core and this isn't one, bail out */
461 if (show_core_only && !(t->flags & CPU_IS_FIRST_THREAD_IN_CORE))
462 return 0;
463
464 /* if showing only 1st thread in pkg and this isn't one, bail out */
465 if (show_pkg_only && !(t->flags & CPU_IS_FIRST_CORE_IN_PACKAGE))
466 return 0;
467
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]468 interval_float = tv_delta.tv_sec + tv_delta.tv_usec/1000000.0;
469
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]470 /* topo columns, print blanks on 1st (average) line */
471 if (t == &average.threads) {
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]472 if (show_pkg)
Len Brownfc04cc62014-02-06 00:55:19 -0500[diff] [blame]473 outp += sprintf(outp, " -");
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]474 if (show_core)
Len Brownfc04cc62014-02-06 00:55:19 -0500[diff] [blame]475 outp += sprintf(outp, " -");
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]476 if (show_cpu)
Len Brownfc04cc62014-02-06 00:55:19 -0500[diff] [blame]477 outp += sprintf(outp, " -");
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]478 } else {
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]479 if (show_pkg) {
480 if (p)
Len Brownfc04cc62014-02-06 00:55:19 -0500[diff] [blame]481 outp += sprintf(outp, "%8d", p->package_id);
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]482 else
Len Brownfc04cc62014-02-06 00:55:19 -0500[diff] [blame]483 outp += sprintf(outp, " -");
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]484 }
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]485 if (show_core) {
486 if (c)
Len Brownfc04cc62014-02-06 00:55:19 -0500[diff] [blame]487 outp += sprintf(outp, "%8d", c->core_id);
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]488 else
Len Brownfc04cc62014-02-06 00:55:19 -0500[diff] [blame]489 outp += sprintf(outp, " -");
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]490 }
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]491 if (show_cpu)
Len Brownfc04cc62014-02-06 00:55:19 -0500[diff] [blame]492 outp += sprintf(outp, "%8d", t->cpu_id);
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]493 }
Len Brownfc04cc62014-02-06 00:55:19 -0500[diff] [blame]494
Len Brownd7899442015-01-23 00:12:33 -0500[diff] [blame]495 /* Avg_MHz */
Len Brownfc04cc62014-02-06 00:55:19 -0500[diff] [blame]496 if (has_aperf)
497 outp += sprintf(outp, "%8.0f",
498 1.0 / units * t->aperf / interval_float);
499
Len Brownd7899442015-01-23 00:12:33 -0500[diff] [blame]500 /* %Busy */
501 if (has_aperf) {
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]502 if (!skip_c0)
Len Brownfc04cc62014-02-06 00:55:19 -0500[diff] [blame]503 outp += sprintf(outp, "%8.2f", 100.0 * t->mperf/t->tsc);
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]504 else
Len Brownfc04cc62014-02-06 00:55:19 -0500[diff] [blame]505 outp += sprintf(outp, "********");
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]506 }
507
Len Brownd7899442015-01-23 00:12:33 -0500[diff] [blame]508 /* Bzy_MHz */
Len Brownfc04cc62014-02-06 00:55:19 -0500[diff] [blame]509 if (has_aperf)
510 outp += sprintf(outp, "%8.0f",
511 1.0 * t->tsc / units * t->aperf / t->mperf / interval_float);
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]512
Len Brownd7899442015-01-23 00:12:33 -0500[diff] [blame]513 /* TSC_MHz */
Len Brownfc04cc62014-02-06 00:55:19 -0500[diff] [blame]514 outp += sprintf(outp, "%8.0f", 1.0 * t->tsc/units/interval_float);
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]515
Len Brown8e180f32012-09-22 01:25:08 -0400[diff] [blame]516 /* delta */
517 if (extra_delta_offset32)
518 outp += sprintf(outp, " %11llu", t->extra_delta32);
519
520 /* DELTA */
521 if (extra_delta_offset64)
522 outp += sprintf(outp, " %11llu", t->extra_delta64);
Len Brown2f32edf2012-09-21 23:45:46 -0400[diff] [blame]523 /* msr */
524 if (extra_msr_offset32)
Len Brown8e180f32012-09-22 01:25:08 -0400[diff] [blame]525 outp += sprintf(outp, " 0x%08llx", t->extra_msr32);
Len Brown2f32edf2012-09-21 23:45:46 -0400[diff] [blame]526
Len Brown130ff302012-09-21 22:56:06 -0400[diff] [blame]527 /* MSR */
Len Brown2f32edf2012-09-21 23:45:46 -0400[diff] [blame]528 if (extra_msr_offset64)
529 outp += sprintf(outp, " 0x%016llx", t->extra_msr64);
Len Brown130ff302012-09-21 22:56:06 -0400[diff] [blame]530
Len Brown1cc21f72015-02-23 00:34:57 -0500[diff] [blame]531 if (!debug)
532 goto done;
533
534 /* SMI */
535 if (do_smi)
536 outp += sprintf(outp, "%8d", t->smi_count);
537
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]538 if (do_nhm_cstates) {
539 if (!skip_c1)
Len Brownfc04cc62014-02-06 00:55:19 -0500[diff] [blame]540 outp += sprintf(outp, "%8.2f", 100.0 * t->c1/t->tsc);
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]541 else
Len Brownfc04cc62014-02-06 00:55:19 -0500[diff] [blame]542 outp += sprintf(outp, "********");
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]543 }
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]544
545 /* print per-core data only for 1st thread in core */
546 if (!(t->flags & CPU_IS_FIRST_THREAD_IN_CORE))
547 goto done;
548
Len Brown144b44b2013-11-09 00:30:16 -0500[diff] [blame]549 if (do_nhm_cstates && !do_slm_cstates)
Len Brownfc04cc62014-02-06 00:55:19 -0500[diff] [blame]550 outp += sprintf(outp, "%8.2f", 100.0 * c->c3/t->tsc);
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]551 if (do_nhm_cstates)
Len Brownfc04cc62014-02-06 00:55:19 -0500[diff] [blame]552 outp += sprintf(outp, "%8.2f", 100.0 * c->c6/t->tsc);
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]553 if (do_snb_cstates)
Len Brownfc04cc62014-02-06 00:55:19 -0500[diff] [blame]554 outp += sprintf(outp, "%8.2f", 100.0 * c->c7/t->tsc);
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]555
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]556 if (do_dts)
Len Brownfc04cc62014-02-06 00:55:19 -0500[diff] [blame]557 outp += sprintf(outp, "%8d", c->core_temp_c);
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]558
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]559 /* print per-package data only for 1st core in package */
560 if (!(t->flags & CPU_IS_FIRST_CORE_IN_PACKAGE))
561 goto done;
562
Len Brown0b2bb692015-03-26 00:50:30 -0400[diff] [blame]563 /* PkgTmp */
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]564 if (do_ptm)
Len Brownfc04cc62014-02-06 00:55:19 -0500[diff] [blame]565 outp += sprintf(outp, "%8d", p->pkg_temp_c);
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]566
Len Brown0b2bb692015-03-26 00:50:30 -0400[diff] [blame]567 /* Totl%C0, Any%C0 GFX%C0 CPUGFX% */
568 if (do_skl_residency) {
569 outp += sprintf(outp, "%8.2f", 100.0 * p->pkg_wtd_core_c0/t->tsc);
570 outp += sprintf(outp, "%8.2f", 100.0 * p->pkg_any_core_c0/t->tsc);
571 outp += sprintf(outp, "%8.2f", 100.0 * p->pkg_any_gfxe_c0/t->tsc);
572 outp += sprintf(outp, "%8.2f", 100.0 * p->pkg_both_core_gfxe_c0/t->tsc);
573 }
574
Len Brownee7e38e2015-02-09 23:39:45 -0500[diff] [blame]575 if (do_pc2)
Len Brownfc04cc62014-02-06 00:55:19 -0500[diff] [blame]576 outp += sprintf(outp, "%8.2f", 100.0 * p->pc2/t->tsc);
Len Brownee7e38e2015-02-09 23:39:45 -0500[diff] [blame]577 if (do_pc3)
Len Brownfc04cc62014-02-06 00:55:19 -0500[diff] [blame]578 outp += sprintf(outp, "%8.2f", 100.0 * p->pc3/t->tsc);
Len Brownee7e38e2015-02-09 23:39:45 -0500[diff] [blame]579 if (do_pc6)
Len Brownfc04cc62014-02-06 00:55:19 -0500[diff] [blame]580 outp += sprintf(outp, "%8.2f", 100.0 * p->pc6/t->tsc);
Len Brownee7e38e2015-02-09 23:39:45 -0500[diff] [blame]581 if (do_pc7)
Len Brownfc04cc62014-02-06 00:55:19 -0500[diff] [blame]582 outp += sprintf(outp, "%8.2f", 100.0 * p->pc7/t->tsc);
Kristen Carlson Accardica587102012-11-21 05:22:43 -0800[diff] [blame]583 if (do_c8_c9_c10) {
Len Brownfc04cc62014-02-06 00:55:19 -0500[diff] [blame]584 outp += sprintf(outp, "%8.2f", 100.0 * p->pc8/t->tsc);
585 outp += sprintf(outp, "%8.2f", 100.0 * p->pc9/t->tsc);
586 outp += sprintf(outp, "%8.2f", 100.0 * p->pc10/t->tsc);
Kristen Carlson Accardica587102012-11-21 05:22:43 -0800[diff] [blame]587 }
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]588
589 /*
590 * If measurement interval exceeds minimum RAPL Joule Counter range,
591 * indicate that results are suspect by printing "**" in fraction place.
592 */
Len Brownfc04cc62014-02-06 00:55:19 -0500[diff] [blame]593 if (interval_float < rapl_joule_counter_range)
594 fmt8 = "%8.2f";
595 else
596 fmt8 = " %6.0f**";
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]597
Dirk Brandewie5c56be92013-12-16 10:23:41 -0800[diff] [blame]598 if (do_rapl && !rapl_joules) {
599 if (do_rapl & RAPL_PKG)
Len Brownfc04cc62014-02-06 00:55:19 -0500[diff] [blame]600 outp += sprintf(outp, fmt8, p->energy_pkg * rapl_energy_units / interval_float);
Dirk Brandewie5c56be92013-12-16 10:23:41 -0800[diff] [blame]601 if (do_rapl & RAPL_CORES)
Len Brownfc04cc62014-02-06 00:55:19 -0500[diff] [blame]602 outp += sprintf(outp, fmt8, p->energy_cores * rapl_energy_units / interval_float);
Dirk Brandewie5c56be92013-12-16 10:23:41 -0800[diff] [blame]603 if (do_rapl & RAPL_GFX)
Len Brownfc04cc62014-02-06 00:55:19 -0500[diff] [blame]604 outp += sprintf(outp, fmt8, p->energy_gfx * rapl_energy_units / interval_float);
Dirk Brandewie5c56be92013-12-16 10:23:41 -0800[diff] [blame]605 if (do_rapl & RAPL_DRAM)
Andrey Semin40ee8e32014-12-05 00:07:00 -0500[diff] [blame]606 outp += sprintf(outp, fmt8, p->energy_dram * rapl_dram_energy_units / interval_float);
Dirk Brandewie5c56be92013-12-16 10:23:41 -0800[diff] [blame]607 if (do_rapl & RAPL_PKG_PERF_STATUS)
Len Brownfc04cc62014-02-06 00:55:19 -0500[diff] [blame]608 outp += sprintf(outp, fmt8, 100.0 * p->rapl_pkg_perf_status * rapl_time_units / interval_float);
Dirk Brandewie5c56be92013-12-16 10:23:41 -0800[diff] [blame]609 if (do_rapl & RAPL_DRAM_PERF_STATUS)
Len Brownfc04cc62014-02-06 00:55:19 -0500[diff] [blame]610 outp += sprintf(outp, fmt8, 100.0 * p->rapl_dram_perf_status * rapl_time_units / interval_float);
Len Brownd7899442015-01-23 00:12:33 -0500[diff] [blame]611 } else if (do_rapl && rapl_joules) {
Dirk Brandewie5c56be92013-12-16 10:23:41 -0800[diff] [blame]612 if (do_rapl & RAPL_PKG)
Len Brownfc04cc62014-02-06 00:55:19 -0500[diff] [blame]613 outp += sprintf(outp, fmt8,
Dirk Brandewie5c56be92013-12-16 10:23:41 -0800[diff] [blame]614 p->energy_pkg * rapl_energy_units);
615 if (do_rapl & RAPL_CORES)
Len Brownfc04cc62014-02-06 00:55:19 -0500[diff] [blame]616 outp += sprintf(outp, fmt8,
Dirk Brandewie5c56be92013-12-16 10:23:41 -0800[diff] [blame]617 p->energy_cores * rapl_energy_units);
618 if (do_rapl & RAPL_GFX)
Len Brownfc04cc62014-02-06 00:55:19 -0500[diff] [blame]619 outp += sprintf(outp, fmt8,
Dirk Brandewie5c56be92013-12-16 10:23:41 -0800[diff] [blame]620 p->energy_gfx * rapl_energy_units);
621 if (do_rapl & RAPL_DRAM)
Len Brownfc04cc62014-02-06 00:55:19 -0500[diff] [blame]622 outp += sprintf(outp, fmt8,
Andrey Semin40ee8e32014-12-05 00:07:00 -0500[diff] [blame]623 p->energy_dram * rapl_dram_energy_units);
Dirk Brandewie5c56be92013-12-16 10:23:41 -0800[diff] [blame]624 if (do_rapl & RAPL_PKG_PERF_STATUS)
Len Brownfc04cc62014-02-06 00:55:19 -0500[diff] [blame]625 outp += sprintf(outp, fmt8, 100.0 * p->rapl_pkg_perf_status * rapl_time_units / interval_float);
Dirk Brandewie5c56be92013-12-16 10:23:41 -0800[diff] [blame]626 if (do_rapl & RAPL_DRAM_PERF_STATUS)
Len Brownfc04cc62014-02-06 00:55:19 -0500[diff] [blame]627 outp += sprintf(outp, fmt8, 100.0 * p->rapl_dram_perf_status * rapl_time_units / interval_float);
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]628
Len Brownd7899442015-01-23 00:12:33 -0500[diff] [blame]629 outp += sprintf(outp, fmt8, interval_float);
Dirk Brandewie5c56be92013-12-16 10:23:41 -0800[diff] [blame]630 }
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]631done:
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]632 outp += sprintf(outp, "\n");
633
634 return 0;
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]635}
636
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]637void flush_stdout()
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]638{
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]639 fputs(output_buffer, stdout);
Len Brownddac0d62012-11-30 01:01:40 -0500[diff] [blame]640 fflush(stdout);
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]641 outp = output_buffer;
642}
643void flush_stderr()
644{
645 fputs(output_buffer, stderr);
646 outp = output_buffer;
647}
648void format_all_counters(struct thread_data *t, struct core_data *c, struct pkg_data *p)
649{
Len Browne23da032012-02-06 18:37:16 -0500[diff] [blame]650 static int printed;
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]651
Len Browne23da032012-02-06 18:37:16 -0500[diff] [blame]652 if (!printed || !summary_only)
653 print_header();
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]654
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]655 if (topo.num_cpus > 1)
656 format_counters(&average.threads, &average.cores,
657 &average.packages);
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]658
Len Browne23da032012-02-06 18:37:16 -0500[diff] [blame]659 printed = 1;
660
661 if (summary_only)
662 return;
663
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]664 for_all_cpus(format_counters, t, c, p);
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]665}
666
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]667#define DELTA_WRAP32(new, old) \
668 if (new > old) { \
669 old = new - old; \
670 } else { \
671 old = 0x100000000 + new - old; \
672 }
673
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]674void
675delta_package(struct pkg_data *new, struct pkg_data *old)
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]676{
Len Brown0b2bb692015-03-26 00:50:30 -0400[diff] [blame]677
678 if (do_skl_residency) {
679 old->pkg_wtd_core_c0 = new->pkg_wtd_core_c0 - old->pkg_wtd_core_c0;
680 old->pkg_any_core_c0 = new->pkg_any_core_c0 - old->pkg_any_core_c0;
681 old->pkg_any_gfxe_c0 = new->pkg_any_gfxe_c0 - old->pkg_any_gfxe_c0;
682 old->pkg_both_core_gfxe_c0 = new->pkg_both_core_gfxe_c0 - old->pkg_both_core_gfxe_c0;
683 }
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]684 old->pc2 = new->pc2 - old->pc2;
Len Brownee7e38e2015-02-09 23:39:45 -0500[diff] [blame]685 if (do_pc3)
686 old->pc3 = new->pc3 - old->pc3;
687 if (do_pc6)
688 old->pc6 = new->pc6 - old->pc6;
689 if (do_pc7)
690 old->pc7 = new->pc7 - old->pc7;
Kristen Carlson Accardica587102012-11-21 05:22:43 -0800[diff] [blame]691 old->pc8 = new->pc8 - old->pc8;
692 old->pc9 = new->pc9 - old->pc9;
693 old->pc10 = new->pc10 - old->pc10;
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]694 old->pkg_temp_c = new->pkg_temp_c;
695
696 DELTA_WRAP32(new->energy_pkg, old->energy_pkg);
697 DELTA_WRAP32(new->energy_cores, old->energy_cores);
698 DELTA_WRAP32(new->energy_gfx, old->energy_gfx);
699 DELTA_WRAP32(new->energy_dram, old->energy_dram);
700 DELTA_WRAP32(new->rapl_pkg_perf_status, old->rapl_pkg_perf_status);
701 DELTA_WRAP32(new->rapl_dram_perf_status, old->rapl_dram_perf_status);
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]702}
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]703
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]704void
705delta_core(struct core_data *new, struct core_data *old)
706{
707 old->c3 = new->c3 - old->c3;
708 old->c6 = new->c6 - old->c6;
709 old->c7 = new->c7 - old->c7;
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]710 old->core_temp_c = new->core_temp_c;
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]711}
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]712
Len Brownc3ae3312012-06-13 21:31:46 -0400[diff] [blame]713/*
714 * old = new - old
715 */
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]716void
717delta_thread(struct thread_data *new, struct thread_data *old,
718 struct core_data *core_delta)
719{
720 old->tsc = new->tsc - old->tsc;
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]721
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]722 /* check for TSC < 1 Mcycles over interval */
Josh Triplettb2c95d92013-08-20 17:20:18 -0700[diff] [blame]723 if (old->tsc < (1000 * 1000))
724 errx(-3, "Insanely slow TSC rate, TSC stops in idle?\n"
725 "You can disable all c-states by booting with \"idle=poll\"\n"
726 "or just the deep ones with \"processor.max_cstate=1\"");
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]727
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]728 old->c1 = new->c1 - old->c1;
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]729
Len Browna7296172015-01-23 01:33:58 -0500[diff] [blame]730 if (has_aperf) {
731 if ((new->aperf > old->aperf) && (new->mperf > old->mperf)) {
732 old->aperf = new->aperf - old->aperf;
733 old->mperf = new->mperf - old->mperf;
734 } else {
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]735
Len Browna7296172015-01-23 01:33:58 -0500[diff] [blame]736 if (!aperf_mperf_unstable) {
737 fprintf(stderr, "%s: APERF or MPERF went backwards *\n", progname);
738 fprintf(stderr, "* Frequency results do not cover entire interval *\n");
739 fprintf(stderr, "* fix this by running Linux-2.6.30 or later *\n");
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]740
Len Browna7296172015-01-23 01:33:58 -0500[diff] [blame]741 aperf_mperf_unstable = 1;
742 }
743 /*
744 * mperf delta is likely a huge "positive" number
745 * can not use it for calculating c0 time
746 */
747 skip_c0 = 1;
748 skip_c1 = 1;
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]749 }
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]750 }
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]751
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]752
Len Brown144b44b2013-11-09 00:30:16 -0500[diff] [blame]753 if (use_c1_residency_msr) {
754 /*
755 * Some models have a dedicated C1 residency MSR,
756 * which should be more accurate than the derivation below.
757 */
758 } else {
759 /*
760 * As counter collection is not atomic,
761 * it is possible for mperf's non-halted cycles + idle states
762 * to exceed TSC's all cycles: show c1 = 0% in that case.
763 */
764 if ((old->mperf + core_delta->c3 + core_delta->c6 + core_delta->c7) > old->tsc)
765 old->c1 = 0;
766 else {
767 /* normal case, derive c1 */
768 old->c1 = old->tsc - old->mperf - core_delta->c3
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]769 - core_delta->c6 - core_delta->c7;
Len Brown144b44b2013-11-09 00:30:16 -0500[diff] [blame]770 }
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]771 }
Len Brownc3ae3312012-06-13 21:31:46 -0400[diff] [blame]772
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]773 if (old->mperf == 0) {
Len Brownd8af6f52015-02-10 01:56:38 -0500[diff] [blame]774 if (debug > 1) fprintf(stderr, "cpu%d MPERF 0!\n", old->cpu_id);
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]775 old->mperf = 1; /* divide by 0 protection */
776 }
777
Len Brown8e180f32012-09-22 01:25:08 -0400[diff] [blame]778 old->extra_delta32 = new->extra_delta32 - old->extra_delta32;
779 old->extra_delta32 &= 0xFFFFFFFF;
780
781 old->extra_delta64 = new->extra_delta64 - old->extra_delta64;
782
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]783 /*
Len Brown8e180f32012-09-22 01:25:08 -0400[diff] [blame]784 * Extra MSR is just a snapshot, simply copy latest w/o subtracting
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]785 */
Len Brown2f32edf2012-09-21 23:45:46 -0400[diff] [blame]786 old->extra_msr32 = new->extra_msr32;
787 old->extra_msr64 = new->extra_msr64;
Len Brown1ed51012013-02-10 17:19:24 -0500[diff] [blame]788
789 if (do_smi)
790 old->smi_count = new->smi_count - old->smi_count;
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]791}
792
793int delta_cpu(struct thread_data *t, struct core_data *c,
794 struct pkg_data *p, struct thread_data *t2,
795 struct core_data *c2, struct pkg_data *p2)
796{
797 /* calculate core delta only for 1st thread in core */
798 if (t->flags & CPU_IS_FIRST_THREAD_IN_CORE)
799 delta_core(c, c2);
800
801 /* always calculate thread delta */
802 delta_thread(t, t2, c2); /* c2 is core delta */
803
804 /* calculate package delta only for 1st core in package */
805 if (t->flags & CPU_IS_FIRST_CORE_IN_PACKAGE)
806 delta_package(p, p2);
807
808 return 0;
809}
810
811void clear_counters(struct thread_data *t, struct core_data *c, struct pkg_data *p)
812{
813 t->tsc = 0;
814 t->aperf = 0;
815 t->mperf = 0;
816 t->c1 = 0;
817
Len Brown1ed51012013-02-10 17:19:24 -0500[diff] [blame]818 t->smi_count = 0;
Len Brown8e180f32012-09-22 01:25:08 -0400[diff] [blame]819 t->extra_delta32 = 0;
820 t->extra_delta64 = 0;
821
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]822 /* tells format_counters to dump all fields from this set */
823 t->flags = CPU_IS_FIRST_THREAD_IN_CORE | CPU_IS_FIRST_CORE_IN_PACKAGE;
824
825 c->c3 = 0;
826 c->c6 = 0;
827 c->c7 = 0;
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]828 c->core_temp_c = 0;
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]829
Len Brown0b2bb692015-03-26 00:50:30 -0400[diff] [blame]830 p->pkg_wtd_core_c0 = 0;
831 p->pkg_any_core_c0 = 0;
832 p->pkg_any_gfxe_c0 = 0;
833 p->pkg_both_core_gfxe_c0 = 0;
834
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]835 p->pc2 = 0;
Len Brownee7e38e2015-02-09 23:39:45 -0500[diff] [blame]836 if (do_pc3)
837 p->pc3 = 0;
838 if (do_pc6)
839 p->pc6 = 0;
840 if (do_pc7)
841 p->pc7 = 0;
Kristen Carlson Accardica587102012-11-21 05:22:43 -0800[diff] [blame]842 p->pc8 = 0;
843 p->pc9 = 0;
844 p->pc10 = 0;
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]845
846 p->energy_pkg = 0;
847 p->energy_dram = 0;
848 p->energy_cores = 0;
849 p->energy_gfx = 0;
850 p->rapl_pkg_perf_status = 0;
851 p->rapl_dram_perf_status = 0;
852 p->pkg_temp_c = 0;
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]853}
854int sum_counters(struct thread_data *t, struct core_data *c,
855 struct pkg_data *p)
856{
857 average.threads.tsc += t->tsc;
858 average.threads.aperf += t->aperf;
859 average.threads.mperf += t->mperf;
860 average.threads.c1 += t->c1;
861
Len Brown8e180f32012-09-22 01:25:08 -0400[diff] [blame]862 average.threads.extra_delta32 += t->extra_delta32;
863 average.threads.extra_delta64 += t->extra_delta64;
864
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]865 /* sum per-core values only for 1st thread in core */
866 if (!(t->flags & CPU_IS_FIRST_THREAD_IN_CORE))
867 return 0;
868
869 average.cores.c3 += c->c3;
870 average.cores.c6 += c->c6;
871 average.cores.c7 += c->c7;
872
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]873 average.cores.core_temp_c = MAX(average.cores.core_temp_c, c->core_temp_c);
874
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]875 /* sum per-pkg values only for 1st core in pkg */
876 if (!(t->flags & CPU_IS_FIRST_CORE_IN_PACKAGE))
877 return 0;
878
Len Brown0b2bb692015-03-26 00:50:30 -0400[diff] [blame]879 if (do_skl_residency) {
880 average.packages.pkg_wtd_core_c0 += p->pkg_wtd_core_c0;
881 average.packages.pkg_any_core_c0 += p->pkg_any_core_c0;
882 average.packages.pkg_any_gfxe_c0 += p->pkg_any_gfxe_c0;
883 average.packages.pkg_both_core_gfxe_c0 += p->pkg_both_core_gfxe_c0;
884 }
885
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]886 average.packages.pc2 += p->pc2;
Len Brownee7e38e2015-02-09 23:39:45 -0500[diff] [blame]887 if (do_pc3)
888 average.packages.pc3 += p->pc3;
889 if (do_pc6)
890 average.packages.pc6 += p->pc6;
891 if (do_pc7)
892 average.packages.pc7 += p->pc7;
Kristen Carlson Accardica587102012-11-21 05:22:43 -0800[diff] [blame]893 average.packages.pc8 += p->pc8;
894 average.packages.pc9 += p->pc9;
895 average.packages.pc10 += p->pc10;
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]896
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]897 average.packages.energy_pkg += p->energy_pkg;
898 average.packages.energy_dram += p->energy_dram;
899 average.packages.energy_cores += p->energy_cores;
900 average.packages.energy_gfx += p->energy_gfx;
901
902 average.packages.pkg_temp_c = MAX(average.packages.pkg_temp_c, p->pkg_temp_c);
903
904 average.packages.rapl_pkg_perf_status += p->rapl_pkg_perf_status;
905 average.packages.rapl_dram_perf_status += p->rapl_dram_perf_status;
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]906 return 0;
907}
908/*
909 * sum the counters for all cpus in the system
910 * compute the weighted average
911 */
912void compute_average(struct thread_data *t, struct core_data *c,
913 struct pkg_data *p)
914{
915 clear_counters(&average.threads, &average.cores, &average.packages);
916
917 for_all_cpus(sum_counters, t, c, p);
918
919 average.threads.tsc /= topo.num_cpus;
920 average.threads.aperf /= topo.num_cpus;
921 average.threads.mperf /= topo.num_cpus;
922 average.threads.c1 /= topo.num_cpus;
923
Len Brown8e180f32012-09-22 01:25:08 -0400[diff] [blame]924 average.threads.extra_delta32 /= topo.num_cpus;
925 average.threads.extra_delta32 &= 0xFFFFFFFF;
926
927 average.threads.extra_delta64 /= topo.num_cpus;
928
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]929 average.cores.c3 /= topo.num_cores;
930 average.cores.c6 /= topo.num_cores;
931 average.cores.c7 /= topo.num_cores;
932
Len Brown0b2bb692015-03-26 00:50:30 -0400[diff] [blame]933 if (do_skl_residency) {
934 average.packages.pkg_wtd_core_c0 /= topo.num_packages;
935 average.packages.pkg_any_core_c0 /= topo.num_packages;
936 average.packages.pkg_any_gfxe_c0 /= topo.num_packages;
937 average.packages.pkg_both_core_gfxe_c0 /= topo.num_packages;
938 }
939
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]940 average.packages.pc2 /= topo.num_packages;
Len Brownee7e38e2015-02-09 23:39:45 -0500[diff] [blame]941 if (do_pc3)
942 average.packages.pc3 /= topo.num_packages;
943 if (do_pc6)
944 average.packages.pc6 /= topo.num_packages;
945 if (do_pc7)
946 average.packages.pc7 /= topo.num_packages;
Kristen Carlson Accardica587102012-11-21 05:22:43 -0800[diff] [blame]947
948 average.packages.pc8 /= topo.num_packages;
949 average.packages.pc9 /= topo.num_packages;
950 average.packages.pc10 /= topo.num_packages;
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]951}
952
953static unsigned long long rdtsc(void)
954{
955 unsigned int low, high;
956
957 asm volatile("rdtsc" : "=a" (low), "=d" (high));
958
959 return low | ((unsigned long long)high) << 32;
960}
961
962
963/*
964 * get_counters(...)
965 * migrate to cpu
966 * acquire and record local counters for that cpu
967 */
968int get_counters(struct thread_data *t, struct core_data *c, struct pkg_data *p)
969{
970 int cpu = t->cpu_id;
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]971 unsigned long long msr;
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]972
Len Browne52966c2012-11-08 22:38:05 -0500[diff] [blame]973 if (cpu_migrate(cpu)) {
974 fprintf(stderr, "Could not migrate to CPU %d\n", cpu);
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]975 return -1;
Len Browne52966c2012-11-08 22:38:05 -0500[diff] [blame]976 }
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]977
978 t->tsc = rdtsc(); /* we are running on local CPU of interest */
979
980 if (has_aperf) {
Len Brown9c63a652012-10-31 01:29:52 -0400[diff] [blame]981 if (get_msr(cpu, MSR_IA32_APERF, &t->aperf))
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]982 return -3;
Len Brown9c63a652012-10-31 01:29:52 -0400[diff] [blame]983 if (get_msr(cpu, MSR_IA32_MPERF, &t->mperf))
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]984 return -4;
985 }
986
Len Brown1ed51012013-02-10 17:19:24 -0500[diff] [blame]987 if (do_smi) {
988 if (get_msr(cpu, MSR_SMI_COUNT, &msr))
989 return -5;
990 t->smi_count = msr & 0xFFFFFFFF;
991 }
Len Brown8e180f32012-09-22 01:25:08 -0400[diff] [blame]992 if (extra_delta_offset32) {
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]993 if (get_msr(cpu, extra_delta_offset32, &msr))
Len Brown2f32edf2012-09-21 23:45:46 -0400[diff] [blame]994 return -5;
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]995 t->extra_delta32 = msr & 0xFFFFFFFF;
Len Brown8e180f32012-09-22 01:25:08 -0400[diff] [blame]996 }
997
998 if (extra_delta_offset64)
999 if (get_msr(cpu, extra_delta_offset64, &t->extra_delta64))
1000 return -5;
1001
1002 if (extra_msr_offset32) {
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]1003 if (get_msr(cpu, extra_msr_offset32, &msr))
Len Brown8e180f32012-09-22 01:25:08 -0400[diff] [blame]1004 return -5;
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]1005 t->extra_msr32 = msr & 0xFFFFFFFF;
Len Brown8e180f32012-09-22 01:25:08 -0400[diff] [blame]1006 }
Len Brown2f32edf2012-09-21 23:45:46 -0400[diff] [blame]1007
1008 if (extra_msr_offset64)
1009 if (get_msr(cpu, extra_msr_offset64, &t->extra_msr64))
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]1010 return -5;
1011
Len Brown144b44b2013-11-09 00:30:16 -0500[diff] [blame]1012 if (use_c1_residency_msr) {
1013 if (get_msr(cpu, MSR_CORE_C1_RES, &t->c1))
1014 return -6;
1015 }
1016
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]1017 /* collect core counters only for 1st thread in core */
1018 if (!(t->flags & CPU_IS_FIRST_THREAD_IN_CORE))
1019 return 0;
1020
Len Brown144b44b2013-11-09 00:30:16 -0500[diff] [blame]1021 if (do_nhm_cstates && !do_slm_cstates) {
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]1022 if (get_msr(cpu, MSR_CORE_C3_RESIDENCY, &c->c3))
1023 return -6;
Len Brown144b44b2013-11-09 00:30:16 -0500[diff] [blame]1024 }
1025
1026 if (do_nhm_cstates) {
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]1027 if (get_msr(cpu, MSR_CORE_C6_RESIDENCY, &c->c6))
1028 return -7;
1029 }
1030
1031 if (do_snb_cstates)
1032 if (get_msr(cpu, MSR_CORE_C7_RESIDENCY, &c->c7))
1033 return -8;
1034
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]1035 if (do_dts) {
1036 if (get_msr(cpu, MSR_IA32_THERM_STATUS, &msr))
1037 return -9;
1038 c->core_temp_c = tcc_activation_temp - ((msr >> 16) & 0x7F);
1039 }
1040
1041
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]1042 /* collect package counters only for 1st core in package */
1043 if (!(t->flags & CPU_IS_FIRST_CORE_IN_PACKAGE))
1044 return 0;
1045
Len Brown0b2bb692015-03-26 00:50:30 -0400[diff] [blame]1046 if (do_skl_residency) {
1047 if (get_msr(cpu, MSR_PKG_WEIGHTED_CORE_C0_RES, &p->pkg_wtd_core_c0))
1048 return -10;
1049 if (get_msr(cpu, MSR_PKG_ANY_CORE_C0_RES, &p->pkg_any_core_c0))
1050 return -11;
1051 if (get_msr(cpu, MSR_PKG_ANY_GFXE_C0_RES, &p->pkg_any_gfxe_c0))
1052 return -12;
1053 if (get_msr(cpu, MSR_PKG_BOTH_CORE_GFXE_C0_RES, &p->pkg_both_core_gfxe_c0))
1054 return -13;
1055 }
Len Brownee7e38e2015-02-09 23:39:45 -0500[diff] [blame]1056 if (do_pc3)
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]1057 if (get_msr(cpu, MSR_PKG_C3_RESIDENCY, &p->pc3))
1058 return -9;
Len Brownee7e38e2015-02-09 23:39:45 -0500[diff] [blame]1059 if (do_pc6)
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]1060 if (get_msr(cpu, MSR_PKG_C6_RESIDENCY, &p->pc6))
1061 return -10;
Len Brownee7e38e2015-02-09 23:39:45 -0500[diff] [blame]1062 if (do_pc2)
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]1063 if (get_msr(cpu, MSR_PKG_C2_RESIDENCY, &p->pc2))
1064 return -11;
Len Brownee7e38e2015-02-09 23:39:45 -0500[diff] [blame]1065 if (do_pc7)
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]1066 if (get_msr(cpu, MSR_PKG_C7_RESIDENCY, &p->pc7))
1067 return -12;
Kristen Carlson Accardica587102012-11-21 05:22:43 -0800[diff] [blame]1068 if (do_c8_c9_c10) {
1069 if (get_msr(cpu, MSR_PKG_C8_RESIDENCY, &p->pc8))
1070 return -13;
1071 if (get_msr(cpu, MSR_PKG_C9_RESIDENCY, &p->pc9))
1072 return -13;
1073 if (get_msr(cpu, MSR_PKG_C10_RESIDENCY, &p->pc10))
1074 return -13;
1075 }
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]1076 if (do_rapl & RAPL_PKG) {
1077 if (get_msr(cpu, MSR_PKG_ENERGY_STATUS, &msr))
1078 return -13;
1079 p->energy_pkg = msr & 0xFFFFFFFF;
1080 }
1081 if (do_rapl & RAPL_CORES) {
1082 if (get_msr(cpu, MSR_PP0_ENERGY_STATUS, &msr))
1083 return -14;
1084 p->energy_cores = msr & 0xFFFFFFFF;
1085 }
1086 if (do_rapl & RAPL_DRAM) {
1087 if (get_msr(cpu, MSR_DRAM_ENERGY_STATUS, &msr))
1088 return -15;
1089 p->energy_dram = msr & 0xFFFFFFFF;
1090 }
1091 if (do_rapl & RAPL_GFX) {
1092 if (get_msr(cpu, MSR_PP1_ENERGY_STATUS, &msr))
1093 return -16;
1094 p->energy_gfx = msr & 0xFFFFFFFF;
1095 }
1096 if (do_rapl & RAPL_PKG_PERF_STATUS) {
1097 if (get_msr(cpu, MSR_PKG_PERF_STATUS, &msr))
1098 return -16;
1099 p->rapl_pkg_perf_status = msr & 0xFFFFFFFF;
1100 }
1101 if (do_rapl & RAPL_DRAM_PERF_STATUS) {
1102 if (get_msr(cpu, MSR_DRAM_PERF_STATUS, &msr))
1103 return -16;
1104 p->rapl_dram_perf_status = msr & 0xFFFFFFFF;
1105 }
1106 if (do_ptm) {
1107 if (get_msr(cpu, MSR_IA32_PACKAGE_THERM_STATUS, &msr))
1108 return -17;
1109 p->pkg_temp_c = tcc_activation_temp - ((msr >> 16) & 0x7F);
1110 }
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]1111 return 0;
1112}
1113
Len Brownee7e38e2015-02-09 23:39:45 -0500[diff] [blame]1114/*
1115 * MSR_PKG_CST_CONFIG_CONTROL decoding for pkg_cstate_limit:
1116 * If you change the values, note they are used both in comparisons
1117 * (>= PCL__7) and to index pkg_cstate_limit_strings[].
1118 */
1119
1120#define PCLUKN 0 /* Unknown */
1121#define PCLRSV 1 /* Reserved */
1122#define PCL__0 2 /* PC0 */
1123#define PCL__1 3 /* PC1 */
1124#define PCL__2 4 /* PC2 */
1125#define PCL__3 5 /* PC3 */
1126#define PCL__4 6 /* PC4 */
1127#define PCL__6 7 /* PC6 */
1128#define PCL_6N 8 /* PC6 No Retention */
1129#define PCL_6R 9 /* PC6 Retention */
1130#define PCL__7 10 /* PC7 */
1131#define PCL_7S 11 /* PC7 Shrink */
Len Brown0b2bb692015-03-26 00:50:30 -0400[diff] [blame]1132#define PCL__8 12 /* PC8 */
1133#define PCL__9 13 /* PC9 */
1134#define PCLUNL 14 /* Unlimited */
Len Brownee7e38e2015-02-09 23:39:45 -0500[diff] [blame]1135
1136int pkg_cstate_limit = PCLUKN;
1137char *pkg_cstate_limit_strings[] = { "reserved", "unknown", "pc0", "pc1", "pc2",
Len Brown0b2bb692015-03-26 00:50:30 -0400[diff] [blame]1138 "pc3", "pc4", "pc6", "pc6n", "pc6r", "pc7", "pc7s", "pc8", "pc9", "unlimited"};
Len Brownee7e38e2015-02-09 23:39:45 -0500[diff] [blame]1139
1140int nhm_pkg_cstate_limits[8] = {PCL__0, PCL__1, PCL__3, PCL__6, PCL__7, PCLRSV, PCLRSV, PCLUNL};
1141int snb_pkg_cstate_limits[8] = {PCL__0, PCL__2, PCL_6N, PCL_6R, PCL__7, PCL_7S, PCLRSV, PCLUNL};
1142int hsw_pkg_cstate_limits[8] = {PCL__0, PCL__2, PCL__3, PCL__6, PCL__7, PCL_7S, PCLRSV, PCLUNL};
Len Brown0b2bb692015-03-26 00:50:30 -0400[diff] [blame]1143int skl_pkg_cstate_limits[8] = {PCL__0, PCL__2, PCL__3, PCL__6, PCL__7, PCL_7S, PCL__8, PCL__9};
Len Brownee7e38e2015-02-09 23:39:45 -0500[diff] [blame]1144int slv_pkg_cstate_limits[8] = {PCL__0, PCL__1, PCLRSV, PCLRSV, PCL__4, PCLRSV, PCL__6, PCL__7};
1145int amt_pkg_cstate_limits[8] = {PCL__0, PCL__1, PCL__2, PCLRSV, PCLRSV, PCLRSV, PCL__6, PCL__7};
1146int phi_pkg_cstate_limits[8] = {PCL__0, PCL__2, PCL_6N, PCL_6R, PCLRSV, PCLRSV, PCLRSV, PCLUNL};
1147
Len Brownfcd17212015-03-23 20:29:09 -0400[diff] [blame]1148static void
1149dump_nhm_platform_info(void)
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]1150{
1151 unsigned long long msr;
1152 unsigned int ratio;
1153
Len Brown9c63a652012-10-31 01:29:52 -0400[diff] [blame]1154 get_msr(0, MSR_NHM_PLATFORM_INFO, &msr);
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]1155
Len Brown67920412013-01-31 15:22:15 -0500[diff] [blame]1156 fprintf(stderr, "cpu0: MSR_NHM_PLATFORM_INFO: 0x%08llx\n", msr);
Len Brown6574a5d2012-09-21 00:01:31 -0400[diff] [blame]1157
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]1158 ratio = (msr >> 40) & 0xFF;
Len Brown8f61f352015-03-23 18:36:57 -0400[diff] [blame]1159 fprintf(stderr, "%d * %.0f = %.0f MHz max efficiency frequency\n",
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]1160 ratio, bclk, ratio * bclk);
1161
1162 ratio = (msr >> 8) & 0xFF;
Len Brown8f61f352015-03-23 18:36:57 -0400[diff] [blame]1163 fprintf(stderr, "%d * %.0f = %.0f MHz base frequency\n",
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]1164 ratio, bclk, ratio * bclk);
1165
Len Brown67920412013-01-31 15:22:15 -0500[diff] [blame]1166 get_msr(0, MSR_IA32_POWER_CTL, &msr);
Len Brown144b44b2013-11-09 00:30:16 -0500[diff] [blame]1167 fprintf(stderr, "cpu0: MSR_IA32_POWER_CTL: 0x%08llx (C1E auto-promotion: %sabled)\n",
Len Brown67920412013-01-31 15:22:15 -0500[diff] [blame]1168 msr, msr & 0x2 ? "EN" : "DIS");
1169
Len Brownfcd17212015-03-23 20:29:09 -0400[diff] [blame]1170 return;
1171}
1172
1173static void
1174dump_hsw_turbo_ratio_limits(void)
1175{
1176 unsigned long long msr;
1177 unsigned int ratio;
1178
1179 get_msr(0, MSR_TURBO_RATIO_LIMIT2, &msr);
1180
1181 fprintf(stderr, "cpu0: MSR_TURBO_RATIO_LIMIT2: 0x%08llx\n", msr);
1182
1183 ratio = (msr >> 8) & 0xFF;
1184 if (ratio)
1185 fprintf(stderr, "%d * %.0f = %.0f MHz max turbo 18 active cores\n",
1186 ratio, bclk, ratio * bclk);
1187
1188 ratio = (msr >> 0) & 0xFF;
1189 if (ratio)
1190 fprintf(stderr, "%d * %.0f = %.0f MHz max turbo 17 active cores\n",
1191 ratio, bclk, ratio * bclk);
1192 return;
1193}
1194
1195static void
1196dump_ivt_turbo_ratio_limits(void)
1197{
1198 unsigned long long msr;
1199 unsigned int ratio;
Len Brown6574a5d2012-09-21 00:01:31 -0400[diff] [blame]1200
Len Brown12bb43c2015-04-13 16:08:18 -0400[diff] [blame]1201 get_msr(0, MSR_TURBO_RATIO_LIMIT1, &msr);
Len Brown6574a5d2012-09-21 00:01:31 -0400[diff] [blame]1202
Len Brown12bb43c2015-04-13 16:08:18 -0400[diff] [blame]1203 fprintf(stderr, "cpu0: MSR_TURBO_RATIO_LIMIT1: 0x%08llx\n", msr);
Len Brown6574a5d2012-09-21 00:01:31 -0400[diff] [blame]1204
1205 ratio = (msr >> 56) & 0xFF;
1206 if (ratio)
1207 fprintf(stderr, "%d * %.0f = %.0f MHz max turbo 16 active cores\n",
1208 ratio, bclk, ratio * bclk);
1209
1210 ratio = (msr >> 48) & 0xFF;
1211 if (ratio)
1212 fprintf(stderr, "%d * %.0f = %.0f MHz max turbo 15 active cores\n",
1213 ratio, bclk, ratio * bclk);
1214
1215 ratio = (msr >> 40) & 0xFF;
1216 if (ratio)
1217 fprintf(stderr, "%d * %.0f = %.0f MHz max turbo 14 active cores\n",
1218 ratio, bclk, ratio * bclk);
1219
1220 ratio = (msr >> 32) & 0xFF;
1221 if (ratio)
1222 fprintf(stderr, "%d * %.0f = %.0f MHz max turbo 13 active cores\n",
1223 ratio, bclk, ratio * bclk);
1224
1225 ratio = (msr >> 24) & 0xFF;
1226 if (ratio)
1227 fprintf(stderr, "%d * %.0f = %.0f MHz max turbo 12 active cores\n",
1228 ratio, bclk, ratio * bclk);
1229
1230 ratio = (msr >> 16) & 0xFF;
1231 if (ratio)
1232 fprintf(stderr, "%d * %.0f = %.0f MHz max turbo 11 active cores\n",
1233 ratio, bclk, ratio * bclk);
1234
1235 ratio = (msr >> 8) & 0xFF;
1236 if (ratio)
1237 fprintf(stderr, "%d * %.0f = %.0f MHz max turbo 10 active cores\n",
1238 ratio, bclk, ratio * bclk);
1239
1240 ratio = (msr >> 0) & 0xFF;
1241 if (ratio)
1242 fprintf(stderr, "%d * %.0f = %.0f MHz max turbo 9 active cores\n",
1243 ratio, bclk, ratio * bclk);
Len Brownfcd17212015-03-23 20:29:09 -0400[diff] [blame]1244 return;
1245}
Len Brown6574a5d2012-09-21 00:01:31 -0400[diff] [blame]1246
Len Brownfcd17212015-03-23 20:29:09 -0400[diff] [blame]1247static void
1248dump_nhm_turbo_ratio_limits(void)
1249{
1250 unsigned long long msr;
1251 unsigned int ratio;
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]1252
Len Brown12bb43c2015-04-13 16:08:18 -0400[diff] [blame]1253 get_msr(0, MSR_TURBO_RATIO_LIMIT, &msr);
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]1254
Len Brown12bb43c2015-04-13 16:08:18 -0400[diff] [blame]1255 fprintf(stderr, "cpu0: MSR_TURBO_RATIO_LIMIT: 0x%08llx\n", msr);
Len Brown6574a5d2012-09-21 00:01:31 -0400[diff] [blame]1256
1257 ratio = (msr >> 56) & 0xFF;
1258 if (ratio)
1259 fprintf(stderr, "%d * %.0f = %.0f MHz max turbo 8 active cores\n",
1260 ratio, bclk, ratio * bclk);
1261
1262 ratio = (msr >> 48) & 0xFF;
1263 if (ratio)
1264 fprintf(stderr, "%d * %.0f = %.0f MHz max turbo 7 active cores\n",
1265 ratio, bclk, ratio * bclk);
1266
1267 ratio = (msr >> 40) & 0xFF;
1268 if (ratio)
1269 fprintf(stderr, "%d * %.0f = %.0f MHz max turbo 6 active cores\n",
1270 ratio, bclk, ratio * bclk);
1271
1272 ratio = (msr >> 32) & 0xFF;
1273 if (ratio)
1274 fprintf(stderr, "%d * %.0f = %.0f MHz max turbo 5 active cores\n",
1275 ratio, bclk, ratio * bclk);
1276
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]1277 ratio = (msr >> 24) & 0xFF;
1278 if (ratio)
1279 fprintf(stderr, "%d * %.0f = %.0f MHz max turbo 4 active cores\n",
1280 ratio, bclk, ratio * bclk);
1281
1282 ratio = (msr >> 16) & 0xFF;
1283 if (ratio)
1284 fprintf(stderr, "%d * %.0f = %.0f MHz max turbo 3 active cores\n",
1285 ratio, bclk, ratio * bclk);
1286
1287 ratio = (msr >> 8) & 0xFF;
1288 if (ratio)
1289 fprintf(stderr, "%d * %.0f = %.0f MHz max turbo 2 active cores\n",
1290 ratio, bclk, ratio * bclk);
1291
1292 ratio = (msr >> 0) & 0xFF;
1293 if (ratio)
1294 fprintf(stderr, "%d * %.0f = %.0f MHz max turbo 1 active cores\n",
1295 ratio, bclk, ratio * bclk);
Len Brownfcd17212015-03-23 20:29:09 -0400[diff] [blame]1296 return;
1297}
Len Brown3a9a9412014-08-15 02:39:52 -0400[diff] [blame]1298
Len Brownfcd17212015-03-23 20:29:09 -0400[diff] [blame]1299static void
1300dump_nhm_cst_cfg(void)
1301{
1302 unsigned long long msr;
1303
1304 get_msr(0, MSR_NHM_SNB_PKG_CST_CFG_CTL, &msr);
1305
1306#define SNB_C1_AUTO_UNDEMOTE (1UL << 27)
1307#define SNB_C3_AUTO_UNDEMOTE (1UL << 28)
1308
1309 fprintf(stderr, "cpu0: MSR_NHM_SNB_PKG_CST_CFG_CTL: 0x%08llx", msr);
1310
1311 fprintf(stderr, " (%s%s%s%s%slocked: pkg-cstate-limit=%d: %s)\n",
1312 (msr & SNB_C3_AUTO_UNDEMOTE) ? "UNdemote-C3, " : "",
1313 (msr & SNB_C1_AUTO_UNDEMOTE) ? "UNdemote-C1, " : "",
1314 (msr & NHM_C3_AUTO_DEMOTE) ? "demote-C3, " : "",
1315 (msr & NHM_C1_AUTO_DEMOTE) ? "demote-C1, " : "",
1316 (msr & (1 << 15)) ? "" : "UN",
1317 (unsigned int)msr & 7,
1318 pkg_cstate_limit_strings[pkg_cstate_limit]);
1319 return;
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]1320}
1321
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]1322void free_all_buffers(void)
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]1323{
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]1324 CPU_FREE(cpu_present_set);
1325 cpu_present_set = NULL;
1326 cpu_present_set = 0;
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]1327
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]1328 CPU_FREE(cpu_affinity_set);
1329 cpu_affinity_set = NULL;
1330 cpu_affinity_setsize = 0;
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]1331
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]1332 free(thread_even);
1333 free(core_even);
1334 free(package_even);
1335
1336 thread_even = NULL;
1337 core_even = NULL;
1338 package_even = NULL;
1339
1340 free(thread_odd);
1341 free(core_odd);
1342 free(package_odd);
1343
1344 thread_odd = NULL;
1345 core_odd = NULL;
1346 package_odd = NULL;
1347
1348 free(output_buffer);
1349 output_buffer = NULL;
1350 outp = NULL;
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]1351}
1352
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]1353/*
Josh Triplett57a42a32013-08-20 17:20:17 -0700[diff] [blame]1354 * Open a file, and exit on failure
1355 */
1356FILE *fopen_or_die(const char *path, const char *mode)
1357{
1358 FILE *filep = fopen(path, "r");
Josh Triplettb2c95d92013-08-20 17:20:18 -0700[diff] [blame]1359 if (!filep)
1360 err(1, "%s: open failed", path);
Josh Triplett57a42a32013-08-20 17:20:17 -0700[diff] [blame]1361 return filep;
1362}
1363
1364/*
Josh Triplett95aebc42013-08-20 17:20:16 -0700[diff] [blame]1365 * Parse a file containing a single int.
1366 */
1367int parse_int_file(const char *fmt, ...)
1368{
1369 va_list args;
1370 char path[PATH_MAX];
1371 FILE *filep;
1372 int value;
1373
1374 va_start(args, fmt);
1375 vsnprintf(path, sizeof(path), fmt, args);
1376 va_end(args);
Josh Triplett57a42a32013-08-20 17:20:17 -0700[diff] [blame]1377 filep = fopen_or_die(path, "r");
Josh Triplettb2c95d92013-08-20 17:20:18 -0700[diff] [blame]1378 if (fscanf(filep, "%d", &value) != 1)
1379 err(1, "%s: failed to parse number from file", path);
Josh Triplett95aebc42013-08-20 17:20:16 -0700[diff] [blame]1380 fclose(filep);
1381 return value;
1382}
1383
1384/*
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]1385 * cpu_is_first_sibling_in_core(cpu)
1386 * return 1 if given CPU is 1st HT sibling in the core
1387 */
1388int cpu_is_first_sibling_in_core(int cpu)
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]1389{
Josh Triplett95aebc42013-08-20 17:20:16 -0700[diff] [blame]1390 return cpu == parse_int_file("/sys/devices/system/cpu/cpu%d/topology/thread_siblings_list", cpu);
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]1391}
1392
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]1393/*
1394 * cpu_is_first_core_in_package(cpu)
1395 * return 1 if given CPU is 1st core in package
1396 */
1397int cpu_is_first_core_in_package(int cpu)
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]1398{
Josh Triplett95aebc42013-08-20 17:20:16 -0700[diff] [blame]1399 return cpu == parse_int_file("/sys/devices/system/cpu/cpu%d/topology/core_siblings_list", cpu);
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]1400}
1401
1402int get_physical_package_id(int cpu)
1403{
Josh Triplett95aebc42013-08-20 17:20:16 -0700[diff] [blame]1404 return parse_int_file("/sys/devices/system/cpu/cpu%d/topology/physical_package_id", cpu);
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]1405}
1406
1407int get_core_id(int cpu)
1408{
Josh Triplett95aebc42013-08-20 17:20:16 -0700[diff] [blame]1409 return parse_int_file("/sys/devices/system/cpu/cpu%d/topology/core_id", cpu);
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]1410}
1411
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]1412int get_num_ht_siblings(int cpu)
1413{
1414 char path[80];
1415 FILE *filep;
1416 int sib1, sib2;
1417 int matches;
1418 char character;
1419
1420 sprintf(path, "/sys/devices/system/cpu/cpu%d/topology/thread_siblings_list", cpu);
Josh Triplett57a42a32013-08-20 17:20:17 -0700[diff] [blame]1421 filep = fopen_or_die(path, "r");
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]1422 /*
1423 * file format:
1424 * if a pair of number with a character between: 2 siblings (eg. 1-2, or 1,4)
1425 * otherwinse 1 sibling (self).
1426 */
1427 matches = fscanf(filep, "%d%c%d\n", &sib1, &character, &sib2);
1428
1429 fclose(filep);
1430
1431 if (matches == 3)
1432 return 2;
1433 else
1434 return 1;
1435}
1436
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]1437/*
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]1438 * run func(thread, core, package) in topology order
1439 * skip non-present cpus
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]1440 */
1441
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]1442int for_all_cpus_2(int (func)(struct thread_data *, struct core_data *,
1443 struct pkg_data *, struct thread_data *, struct core_data *,
1444 struct pkg_data *), struct thread_data *thread_base,
1445 struct core_data *core_base, struct pkg_data *pkg_base,
1446 struct thread_data *thread_base2, struct core_data *core_base2,
1447 struct pkg_data *pkg_base2)
1448{
1449 int retval, pkg_no, core_no, thread_no;
1450
1451 for (pkg_no = 0; pkg_no < topo.num_packages; ++pkg_no) {
1452 for (core_no = 0; core_no < topo.num_cores_per_pkg; ++core_no) {
1453 for (thread_no = 0; thread_no <
1454 topo.num_threads_per_core; ++thread_no) {
1455 struct thread_data *t, *t2;
1456 struct core_data *c, *c2;
1457 struct pkg_data *p, *p2;
1458
1459 t = GET_THREAD(thread_base, thread_no, core_no, pkg_no);
1460
1461 if (cpu_is_not_present(t->cpu_id))
1462 continue;
1463
1464 t2 = GET_THREAD(thread_base2, thread_no, core_no, pkg_no);
1465
1466 c = GET_CORE(core_base, core_no, pkg_no);
1467 c2 = GET_CORE(core_base2, core_no, pkg_no);
1468
1469 p = GET_PKG(pkg_base, pkg_no);
1470 p2 = GET_PKG(pkg_base2, pkg_no);
1471
1472 retval = func(t, c, p, t2, c2, p2);
1473 if (retval)
1474 return retval;
1475 }
1476 }
1477 }
1478 return 0;
1479}
1480
1481/*
1482 * run func(cpu) on every cpu in /proc/stat
1483 * return max_cpu number
1484 */
1485int for_all_proc_cpus(int (func)(int))
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]1486{
1487 FILE *fp;
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]1488 int cpu_num;
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]1489 int retval;
1490
Josh Triplett57a42a32013-08-20 17:20:17 -0700[diff] [blame]1491 fp = fopen_or_die(proc_stat, "r");
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]1492
1493 retval = fscanf(fp, "cpu %*d %*d %*d %*d %*d %*d %*d %*d %*d %*d\n");
Josh Triplettb2c95d92013-08-20 17:20:18 -0700[diff] [blame]1494 if (retval != 0)
1495 err(1, "%s: failed to parse format", proc_stat);
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]1496
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]1497 while (1) {
1498 retval = fscanf(fp, "cpu%u %*d %*d %*d %*d %*d %*d %*d %*d %*d %*d\n", &cpu_num);
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]1499 if (retval != 1)
1500 break;
1501
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]1502 retval = func(cpu_num);
1503 if (retval) {
1504 fclose(fp);
1505 return(retval);
1506 }
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]1507 }
1508 fclose(fp);
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]1509 return 0;
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]1510}
1511
1512void re_initialize(void)
1513{
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]1514 free_all_buffers();
1515 setup_all_buffers();
1516 printf("turbostat: re-initialized with num_cpus %d\n", topo.num_cpus);
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]1517}
1518
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]1519
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]1520/*
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]1521 * count_cpus()
1522 * remember the last one seen, it will be the max
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]1523 */
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]1524int count_cpus(int cpu)
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]1525{
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]1526 if (topo.max_cpu_num < cpu)
1527 topo.max_cpu_num = cpu;
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]1528
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]1529 topo.num_cpus += 1;
1530 return 0;
1531}
1532int mark_cpu_present(int cpu)
1533{
1534 CPU_SET_S(cpu, cpu_present_setsize, cpu_present_set);
Len Brown15aaa342012-03-29 22:19:58 -0400[diff] [blame]1535 return 0;
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]1536}
1537
1538void turbostat_loop()
1539{
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]1540 int retval;
Len Browne52966c2012-11-08 22:38:05 -0500[diff] [blame]1541 int restarted = 0;
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]1542
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]1543restart:
Len Browne52966c2012-11-08 22:38:05 -0500[diff] [blame]1544 restarted++;
1545
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]1546 retval = for_all_cpus(get_counters, EVEN_COUNTERS);
Len Brownd91bb172012-11-01 00:08:19 -0400[diff] [blame]1547 if (retval < -1) {
1548 exit(retval);
1549 } else if (retval == -1) {
Len Browne52966c2012-11-08 22:38:05 -0500[diff] [blame]1550 if (restarted > 1) {
1551 exit(retval);
1552 }
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]1553 re_initialize();
1554 goto restart;
1555 }
Len Browne52966c2012-11-08 22:38:05 -0500[diff] [blame]1556 restarted = 0;
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]1557 gettimeofday(&tv_even, (struct timezone *)NULL);
1558
1559 while (1) {
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]1560 if (for_all_proc_cpus(cpu_is_not_present)) {
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]1561 re_initialize();
1562 goto restart;
1563 }
1564 sleep(interval_sec);
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]1565 retval = for_all_cpus(get_counters, ODD_COUNTERS);
Len Brownd91bb172012-11-01 00:08:19 -0400[diff] [blame]1566 if (retval < -1) {
1567 exit(retval);
1568 } else if (retval == -1) {
Len Brown15aaa342012-03-29 22:19:58 -0400[diff] [blame]1569 re_initialize();
1570 goto restart;
1571 }
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]1572 gettimeofday(&tv_odd, (struct timezone *)NULL);
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]1573 timersub(&tv_odd, &tv_even, &tv_delta);
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]1574 for_all_cpus_2(delta_cpu, ODD_COUNTERS, EVEN_COUNTERS);
1575 compute_average(EVEN_COUNTERS);
1576 format_all_counters(EVEN_COUNTERS);
1577 flush_stdout();
Len Brown15aaa342012-03-29 22:19:58 -0400[diff] [blame]1578 sleep(interval_sec);
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]1579 retval = for_all_cpus(get_counters, EVEN_COUNTERS);
Len Brownd91bb172012-11-01 00:08:19 -0400[diff] [blame]1580 if (retval < -1) {
1581 exit(retval);
1582 } else if (retval == -1) {
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]1583 re_initialize();
1584 goto restart;
1585 }
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]1586 gettimeofday(&tv_even, (struct timezone *)NULL);
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]1587 timersub(&tv_even, &tv_odd, &tv_delta);
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]1588 for_all_cpus_2(delta_cpu, EVEN_COUNTERS, ODD_COUNTERS);
1589 compute_average(ODD_COUNTERS);
1590 format_all_counters(ODD_COUNTERS);
1591 flush_stdout();
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]1592 }
1593}
1594
1595void check_dev_msr()
1596{
1597 struct stat sb;
1598
Josh Triplettb2c95d92013-08-20 17:20:18 -0700[diff] [blame]1599 if (stat("/dev/cpu/0/msr", &sb))
Len Browna21d38c2015-03-24 16:37:35 -0400[diff] [blame]1600 if (system("/sbin/modprobe msr > /dev/null 2>&1"))
1601 err(-5, "no /dev/cpu/0/msr, Try \"# modprobe msr\" ");
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]1602}
1603
Len Brown98481e72014-08-15 00:36:50 -0400[diff] [blame]1604void check_permissions()
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]1605{
Len Brown98481e72014-08-15 00:36:50 -0400[diff] [blame]1606 struct __user_cap_header_struct cap_header_data;
1607 cap_user_header_t cap_header = &cap_header_data;
1608 struct __user_cap_data_struct cap_data_data;
1609 cap_user_data_t cap_data = &cap_data_data;
1610 extern int capget(cap_user_header_t hdrp, cap_user_data_t datap);
1611 int do_exit = 0;
1612
1613 /* check for CAP_SYS_RAWIO */
1614 cap_header->pid = getpid();
1615 cap_header->version = _LINUX_CAPABILITY_VERSION;
1616 if (capget(cap_header, cap_data) < 0)
1617 err(-6, "capget(2) failed");
1618
1619 if ((cap_data->effective & (1 << CAP_SYS_RAWIO)) == 0) {
1620 do_exit++;
1621 warnx("capget(CAP_SYS_RAWIO) failed,"
1622 " try \"# setcap cap_sys_rawio=ep %s\"", progname);
1623 }
1624
1625 /* test file permissions */
1626 if (euidaccess("/dev/cpu/0/msr", R_OK)) {
1627 do_exit++;
1628 warn("/dev/cpu/0/msr open failed, try chown or chmod +r /dev/cpu/*/msr");
1629 }
1630
1631 /* if all else fails, thell them to be root */
1632 if (do_exit)
1633 if (getuid() != 0)
Len Brownd7899442015-01-23 00:12:33 -0500[diff] [blame]1634 warnx("... or simply run as root");
Len Brown98481e72014-08-15 00:36:50 -0400[diff] [blame]1635
1636 if (do_exit)
1637 exit(-6);
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]1638}
1639
Len Brownd7899442015-01-23 00:12:33 -0500[diff] [blame]1640/*
1641 * NHM adds support for additional MSRs:
1642 *
1643 * MSR_SMI_COUNT 0x00000034
1644 *
1645 * MSR_NHM_PLATFORM_INFO 0x000000ce
1646 * MSR_NHM_SNB_PKG_CST_CFG_CTL 0x000000e2
1647 *
1648 * MSR_PKG_C3_RESIDENCY 0x000003f8
1649 * MSR_PKG_C6_RESIDENCY 0x000003f9
1650 * MSR_CORE_C3_RESIDENCY 0x000003fc
1651 * MSR_CORE_C6_RESIDENCY 0x000003fd
1652 *
Len Brownee7e38e2015-02-09 23:39:45 -0500[diff] [blame]1653 * Side effect:
1654 * sets global pkg_cstate_limit to decode MSR_NHM_SNB_PKG_CST_CFG_CTL
Len Brownd7899442015-01-23 00:12:33 -0500[diff] [blame]1655 */
Len Brownee7e38e2015-02-09 23:39:45 -0500[diff] [blame]1656int probe_nhm_msrs(unsigned int family, unsigned int model)
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]1657{
Len Brownee7e38e2015-02-09 23:39:45 -0500[diff] [blame]1658 unsigned long long msr;
1659 int *pkg_cstate_limits;
1660
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]1661 if (!genuine_intel)
1662 return 0;
1663
1664 if (family != 6)
1665 return 0;
1666
1667 switch (model) {
1668 case 0x1A: /* Core i7, Xeon 5500 series - Bloomfield, Gainstown NHM-EP */
1669 case 0x1E: /* Core i7 and i5 Processor - Clarksfield, Lynnfield, Jasper Forest */
1670 case 0x1F: /* Core i7 and i5 Processor - Nehalem */
1671 case 0x25: /* Westmere Client - Clarkdale, Arrandale */
1672 case 0x2C: /* Westmere EP - Gulftown */
Len Brownee7e38e2015-02-09 23:39:45 -0500[diff] [blame]1673 case 0x2E: /* Nehalem-EX Xeon - Beckton */
1674 case 0x2F: /* Westmere-EX Xeon - Eagleton */
1675 pkg_cstate_limits = nhm_pkg_cstate_limits;
1676 break;
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]1677 case 0x2A: /* SNB */
1678 case 0x2D: /* SNB Xeon */
Len Brown553575f2011-11-18 03:32:01 -0500[diff] [blame]1679 case 0x3A: /* IVB */
Len Brown13006512012-09-26 18:11:31 -0400[diff] [blame]1680 case 0x3E: /* IVB Xeon */
Len Brownee7e38e2015-02-09 23:39:45 -0500[diff] [blame]1681 pkg_cstate_limits = snb_pkg_cstate_limits;
1682 break;
Len Brown70b43402013-01-08 01:26:07 -0500[diff] [blame]1683 case 0x3C: /* HSW */
Len Browne6f9bb32013-12-03 02:19:19 -0500[diff] [blame]1684 case 0x3F: /* HSX */
Len Brown70b43402013-01-08 01:26:07 -0500[diff] [blame]1685 case 0x45: /* HSW */
Len Brown149c2312013-03-15 10:58:02 -0400[diff] [blame]1686 case 0x46: /* HSW */
Len Brown4e8e863f2014-02-27 23:28:53 -0500[diff] [blame]1687 case 0x3D: /* BDW */
Len Brown48a06312015-02-10 15:38:04 -0500[diff] [blame]1688 case 0x47: /* BDW */
Len Brown4e8e863f2014-02-27 23:28:53 -0500[diff] [blame]1689 case 0x4F: /* BDX */
1690 case 0x56: /* BDX-DE */
Len Brown0b2bb692015-03-26 00:50:30 -0400[diff] [blame]1691 case 0x4E: /* SKL */
1692 case 0x5E: /* SKL */
Len Brownee7e38e2015-02-09 23:39:45 -0500[diff] [blame]1693 pkg_cstate_limits = hsw_pkg_cstate_limits;
1694 break;
1695 case 0x37: /* BYT */
1696 case 0x4D: /* AVN */
1697 pkg_cstate_limits = slv_pkg_cstate_limits;
1698 break;
1699 case 0x4C: /* AMT */
1700 pkg_cstate_limits = amt_pkg_cstate_limits;
1701 break;
1702 case 0x57: /* PHI */
1703 pkg_cstate_limits = phi_pkg_cstate_limits;
1704 break;
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]1705 default:
1706 return 0;
1707 }
Len Brownee7e38e2015-02-09 23:39:45 -0500[diff] [blame]1708 get_msr(0, MSR_NHM_SNB_PKG_CST_CFG_CTL, &msr);
1709
1710 pkg_cstate_limit = pkg_cstate_limits[msr & 0x7];
1711
1712 return 1;
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]1713}
Len Brownd7899442015-01-23 00:12:33 -0500[diff] [blame]1714int has_nhm_turbo_ratio_limit(unsigned int family, unsigned int model)
1715{
Len Brownd7899442015-01-23 00:12:33 -0500[diff] [blame]1716 switch (model) {
1717 /* Nehalem compatible, but do not include turbo-ratio limit support */
1718 case 0x2E: /* Nehalem-EX Xeon - Beckton */
1719 case 0x2F: /* Westmere-EX Xeon - Eagleton */
1720 return 0;
1721 default:
1722 return 1;
1723 }
1724}
Len Brown6574a5d2012-09-21 00:01:31 -0400[diff] [blame]1725int has_ivt_turbo_ratio_limit(unsigned int family, unsigned int model)
1726{
1727 if (!genuine_intel)
1728 return 0;
1729
1730 if (family != 6)
1731 return 0;
1732
1733 switch (model) {
1734 case 0x3E: /* IVB Xeon */
Len Brownfcd17212015-03-23 20:29:09 -0400[diff] [blame]1735 case 0x3F: /* HSW Xeon */
Len Brown6574a5d2012-09-21 00:01:31 -0400[diff] [blame]1736 return 1;
1737 default:
1738 return 0;
1739 }
1740}
Len Brownfcd17212015-03-23 20:29:09 -0400[diff] [blame]1741int has_hsw_turbo_ratio_limit(unsigned int family, unsigned int model)
1742{
1743 if (!genuine_intel)
1744 return 0;
1745
1746 if (family != 6)
1747 return 0;
1748
1749 switch (model) {
1750 case 0x3F: /* HSW Xeon */
1751 return 1;
1752 default:
1753 return 0;
1754 }
1755}
1756
1757static void
1758dump_cstate_pstate_config_info(family, model)
1759{
1760 if (!do_nhm_platform_info)
1761 return;
1762
1763 dump_nhm_platform_info();
1764
1765 if (has_hsw_turbo_ratio_limit(family, model))
1766 dump_hsw_turbo_ratio_limits();
1767
1768 if (has_ivt_turbo_ratio_limit(family, model))
1769 dump_ivt_turbo_ratio_limits();
1770
1771 if (has_nhm_turbo_ratio_limit(family, model))
1772 dump_nhm_turbo_ratio_limits();
1773
1774 dump_nhm_cst_cfg();
1775}
1776
Len Brown6574a5d2012-09-21 00:01:31 -0400[diff] [blame]1777
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]1778/*
1779 * print_epb()
1780 * Decode the ENERGY_PERF_BIAS MSR
1781 */
1782int print_epb(struct thread_data *t, struct core_data *c, struct pkg_data *p)
1783{
1784 unsigned long long msr;
1785 char *epb_string;
1786 int cpu;
1787
1788 if (!has_epb)
1789 return 0;
1790
1791 cpu = t->cpu_id;
1792
1793 /* EPB is per-package */
1794 if (!(t->flags & CPU_IS_FIRST_THREAD_IN_CORE) || !(t->flags & CPU_IS_FIRST_CORE_IN_PACKAGE))
1795 return 0;
1796
1797 if (cpu_migrate(cpu)) {
1798 fprintf(stderr, "Could not migrate to CPU %d\n", cpu);
1799 return -1;
1800 }
1801
1802 if (get_msr(cpu, MSR_IA32_ENERGY_PERF_BIAS, &msr))
1803 return 0;
1804
1805 switch (msr & 0x7) {
1806 case ENERGY_PERF_BIAS_PERFORMANCE:
1807 epb_string = "performance";
1808 break;
1809 case ENERGY_PERF_BIAS_NORMAL:
1810 epb_string = "balanced";
1811 break;
1812 case ENERGY_PERF_BIAS_POWERSAVE:
1813 epb_string = "powersave";
1814 break;
1815 default:
1816 epb_string = "custom";
1817 break;
1818 }
1819 fprintf(stderr, "cpu%d: MSR_IA32_ENERGY_PERF_BIAS: 0x%08llx (%s)\n", cpu, msr, epb_string);
1820
1821 return 0;
1822}
1823
Len Brown3a9a9412014-08-15 02:39:52 -0400[diff] [blame]1824/*
1825 * print_perf_limit()
1826 */
1827int print_perf_limit(struct thread_data *t, struct core_data *c, struct pkg_data *p)
1828{
1829 unsigned long long msr;
1830 int cpu;
1831
1832 cpu = t->cpu_id;
1833
1834 /* per-package */
1835 if (!(t->flags & CPU_IS_FIRST_THREAD_IN_CORE) || !(t->flags & CPU_IS_FIRST_CORE_IN_PACKAGE))
1836 return 0;
1837
1838 if (cpu_migrate(cpu)) {
1839 fprintf(stderr, "Could not migrate to CPU %d\n", cpu);
1840 return -1;
1841 }
1842
1843 if (do_core_perf_limit_reasons) {
1844 get_msr(cpu, MSR_CORE_PERF_LIMIT_REASONS, &msr);
1845 fprintf(stderr, "cpu%d: MSR_CORE_PERF_LIMIT_REASONS, 0x%08llx", cpu, msr);
1846 fprintf(stderr, " (Active: %s%s%s%s%s%s%s%s%s%s%s%s%s%s)",
Len Browne33cbe82015-03-13 16:30:57 -0400[diff] [blame]1847 (msr & 1 << 15) ? "bit15, " : "",
Len Brown3a9a9412014-08-15 02:39:52 -0400[diff] [blame]1848 (msr & 1 << 14) ? "bit14, " : "",
Len Browne33cbe82015-03-13 16:30:57 -0400[diff] [blame]1849 (msr & 1 << 13) ? "Transitions, " : "",
1850 (msr & 1 << 12) ? "MultiCoreTurbo, " : "",
1851 (msr & 1 << 11) ? "PkgPwrL2, " : "",
1852 (msr & 1 << 10) ? "PkgPwrL1, " : "",
1853 (msr & 1 << 9) ? "CorePwr, " : "",
1854 (msr & 1 << 8) ? "Amps, " : "",
1855 (msr & 1 << 6) ? "VR-Therm, " : "",
1856 (msr & 1 << 5) ? "Auto-HWP, " : "",
1857 (msr & 1 << 4) ? "Graphics, " : "",
1858 (msr & 1 << 2) ? "bit2, " : "",
1859 (msr & 1 << 1) ? "ThermStatus, " : "",
1860 (msr & 1 << 0) ? "PROCHOT, " : "");
Len Brown3a9a9412014-08-15 02:39:52 -0400[diff] [blame]1861 fprintf(stderr, " (Logged: %s%s%s%s%s%s%s%s%s%s%s%s%s%s)\n",
Len Browne33cbe82015-03-13 16:30:57 -0400[diff] [blame]1862 (msr & 1 << 31) ? "bit31, " : "",
Len Brown3a9a9412014-08-15 02:39:52 -0400[diff] [blame]1863 (msr & 1 << 30) ? "bit30, " : "",
Len Browne33cbe82015-03-13 16:30:57 -0400[diff] [blame]1864 (msr & 1 << 29) ? "Transitions, " : "",
1865 (msr & 1 << 28) ? "MultiCoreTurbo, " : "",
1866 (msr & 1 << 27) ? "PkgPwrL2, " : "",
1867 (msr & 1 << 26) ? "PkgPwrL1, " : "",
1868 (msr & 1 << 25) ? "CorePwr, " : "",
1869 (msr & 1 << 24) ? "Amps, " : "",
1870 (msr & 1 << 22) ? "VR-Therm, " : "",
1871 (msr & 1 << 21) ? "Auto-HWP, " : "",
1872 (msr & 1 << 20) ? "Graphics, " : "",
1873 (msr & 1 << 18) ? "bit18, " : "",
1874 (msr & 1 << 17) ? "ThermStatus, " : "",
1875 (msr & 1 << 16) ? "PROCHOT, " : "");
Len Brown3a9a9412014-08-15 02:39:52 -0400[diff] [blame]1876
1877 }
1878 if (do_gfx_perf_limit_reasons) {
1879 get_msr(cpu, MSR_GFX_PERF_LIMIT_REASONS, &msr);
1880 fprintf(stderr, "cpu%d: MSR_GFX_PERF_LIMIT_REASONS, 0x%08llx", cpu, msr);
1881 fprintf(stderr, " (Active: %s%s%s%s%s%s%s%s)",
1882 (msr & 1 << 0) ? "PROCHOT, " : "",
1883 (msr & 1 << 1) ? "ThermStatus, " : "",
1884 (msr & 1 << 4) ? "Graphics, " : "",
1885 (msr & 1 << 6) ? "VR-Therm, " : "",
1886 (msr & 1 << 8) ? "Amps, " : "",
1887 (msr & 1 << 9) ? "GFXPwr, " : "",
1888 (msr & 1 << 10) ? "PkgPwrL1, " : "",
1889 (msr & 1 << 11) ? "PkgPwrL2, " : "");
1890 fprintf(stderr, " (Logged: %s%s%s%s%s%s%s%s)\n",
1891 (msr & 1 << 16) ? "PROCHOT, " : "",
1892 (msr & 1 << 17) ? "ThermStatus, " : "",
1893 (msr & 1 << 20) ? "Graphics, " : "",
1894 (msr & 1 << 22) ? "VR-Therm, " : "",
1895 (msr & 1 << 24) ? "Amps, " : "",
1896 (msr & 1 << 25) ? "GFXPwr, " : "",
1897 (msr & 1 << 26) ? "PkgPwrL1, " : "",
1898 (msr & 1 << 27) ? "PkgPwrL2, " : "");
1899 }
1900 if (do_ring_perf_limit_reasons) {
1901 get_msr(cpu, MSR_RING_PERF_LIMIT_REASONS, &msr);
1902 fprintf(stderr, "cpu%d: MSR_RING_PERF_LIMIT_REASONS, 0x%08llx", cpu, msr);
1903 fprintf(stderr, " (Active: %s%s%s%s%s%s)",
1904 (msr & 1 << 0) ? "PROCHOT, " : "",
1905 (msr & 1 << 1) ? "ThermStatus, " : "",
1906 (msr & 1 << 6) ? "VR-Therm, " : "",
1907 (msr & 1 << 8) ? "Amps, " : "",
1908 (msr & 1 << 10) ? "PkgPwrL1, " : "",
1909 (msr & 1 << 11) ? "PkgPwrL2, " : "");
1910 fprintf(stderr, " (Logged: %s%s%s%s%s%s)\n",
1911 (msr & 1 << 16) ? "PROCHOT, " : "",
1912 (msr & 1 << 17) ? "ThermStatus, " : "",
1913 (msr & 1 << 22) ? "VR-Therm, " : "",
1914 (msr & 1 << 24) ? "Amps, " : "",
1915 (msr & 1 << 26) ? "PkgPwrL1, " : "",
1916 (msr & 1 << 27) ? "PkgPwrL2, " : "");
1917 }
1918 return 0;
1919}
1920
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]1921#define RAPL_POWER_GRANULARITY 0x7FFF /* 15 bit power granularity */
1922#define RAPL_TIME_GRANULARITY 0x3F /* 6 bit time granularity */
1923
Len Brown144b44b2013-11-09 00:30:16 -0500[diff] [blame]1924double get_tdp(model)
1925{
1926 unsigned long long msr;
1927
1928 if (do_rapl & RAPL_PKG_POWER_INFO)
1929 if (!get_msr(0, MSR_PKG_POWER_INFO, &msr))
1930 return ((msr >> 0) & RAPL_POWER_GRANULARITY) * rapl_power_units;
1931
1932 switch (model) {
1933 case 0x37:
1934 case 0x4D:
1935 return 30.0;
1936 default:
1937 return 135.0;
1938 }
1939}
1940
Andrey Semin40ee8e32014-12-05 00:07:00 -0500[diff] [blame]1941/*
1942 * rapl_dram_energy_units_probe()
1943 * Energy units are either hard-coded, or come from RAPL Energy Unit MSR.
1944 */
1945static double
1946rapl_dram_energy_units_probe(int model, double rapl_energy_units)
1947{
1948 /* only called for genuine_intel, family 6 */
1949
1950 switch (model) {
1951 case 0x3F: /* HSX */
1952 case 0x4F: /* BDX */
1953 case 0x56: /* BDX-DE */
1954 return (rapl_dram_energy_units = 15.3 / 1000000);
1955 default:
1956 return (rapl_energy_units);
1957 }
1958}
1959
Len Brown144b44b2013-11-09 00:30:16 -0500[diff] [blame]1960
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]1961/*
1962 * rapl_probe()
1963 *
Len Brown144b44b2013-11-09 00:30:16 -0500[diff] [blame]1964 * sets do_rapl, rapl_power_units, rapl_energy_units, rapl_time_units
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]1965 */
1966void rapl_probe(unsigned int family, unsigned int model)
1967{
1968 unsigned long long msr;
Len Brown144b44b2013-11-09 00:30:16 -0500[diff] [blame]1969 unsigned int time_unit;
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]1970 double tdp;
1971
1972 if (!genuine_intel)
1973 return;
1974
1975 if (family != 6)
1976 return;
1977
1978 switch (model) {
1979 case 0x2A:
1980 case 0x3A:
Len Brown70b43402013-01-08 01:26:07 -0500[diff] [blame]1981 case 0x3C: /* HSW */
Len Brown70b43402013-01-08 01:26:07 -0500[diff] [blame]1982 case 0x45: /* HSW */
Len Brown149c2312013-03-15 10:58:02 -0400[diff] [blame]1983 case 0x46: /* HSW */
Len Brown4e8e863f2014-02-27 23:28:53 -0500[diff] [blame]1984 case 0x3D: /* BDW */
Len Brown48a06312015-02-10 15:38:04 -0500[diff] [blame]1985 case 0x47: /* BDW */
Len Brown144b44b2013-11-09 00:30:16 -0500[diff] [blame]1986 do_rapl = RAPL_PKG | RAPL_CORES | RAPL_CORE_POLICY | RAPL_GFX | RAPL_PKG_POWER_INFO;
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]1987 break;
Len Brown0b2bb692015-03-26 00:50:30 -0400[diff] [blame]1988 case 0x4E: /* SKL */
1989 case 0x5E: /* SKL */
1990 do_rapl = RAPL_PKG | RAPL_DRAM | RAPL_DRAM_PERF_STATUS | RAPL_PKG_PERF_STATUS | RAPL_PKG_POWER_INFO;
1991 break;
Len Browne6f9bb32013-12-03 02:19:19 -0500[diff] [blame]1992 case 0x3F: /* HSX */
Len Brown4e8e863f2014-02-27 23:28:53 -0500[diff] [blame]1993 case 0x4F: /* BDX */
1994 case 0x56: /* BDX-DE */
Len Brown0b2bb692015-03-26 00:50:30 -0400[diff] [blame]1995 do_rapl = RAPL_PKG | RAPL_DRAM | RAPL_DRAM_POWER_INFO | RAPL_DRAM_PERF_STATUS | RAPL_PKG_PERF_STATUS | RAPL_PKG_POWER_INFO;
Len Browne6f9bb32013-12-03 02:19:19 -0500[diff] [blame]1996 break;
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]1997 case 0x2D:
1998 case 0x3E:
Len Brown0b2bb692015-03-26 00:50:30 -0400[diff] [blame]1999 do_rapl = RAPL_PKG | RAPL_CORES | RAPL_CORE_POLICY | RAPL_DRAM | RAPL_DRAM_POWER_INFO | RAPL_PKG_PERF_STATUS | RAPL_DRAM_PERF_STATUS | RAPL_PKG_POWER_INFO;
Len Brown144b44b2013-11-09 00:30:16 -0500[diff] [blame]2000 break;
2001 case 0x37: /* BYT */
2002 case 0x4D: /* AVN */
2003 do_rapl = RAPL_PKG | RAPL_CORES ;
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]2004 break;
2005 default:
2006 return;
2007 }
2008
2009 /* units on package 0, verify later other packages match */
2010 if (get_msr(0, MSR_RAPL_POWER_UNIT, &msr))
2011 return;
2012
2013 rapl_power_units = 1.0 / (1 << (msr & 0xF));
Len Brown144b44b2013-11-09 00:30:16 -0500[diff] [blame]2014 if (model == 0x37)
2015 rapl_energy_units = 1.0 * (1 << (msr >> 8 & 0x1F)) / 1000000;
2016 else
2017 rapl_energy_units = 1.0 / (1 << (msr >> 8 & 0x1F));
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]2018
Andrey Semin40ee8e32014-12-05 00:07:00 -0500[diff] [blame]2019 rapl_dram_energy_units = rapl_dram_energy_units_probe(model, rapl_energy_units);
2020
Len Brown144b44b2013-11-09 00:30:16 -0500[diff] [blame]2021 time_unit = msr >> 16 & 0xF;
2022 if (time_unit == 0)
2023 time_unit = 0xA;
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]2024
Len Brown144b44b2013-11-09 00:30:16 -0500[diff] [blame]2025 rapl_time_units = 1.0 / (1 << (time_unit));
2026
2027 tdp = get_tdp(model);
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]2028
2029 rapl_joule_counter_range = 0xFFFFFFFF * rapl_energy_units / tdp;
Len Brownd8af6f52015-02-10 01:56:38 -0500[diff] [blame]2030 if (debug)
Len Brown144b44b2013-11-09 00:30:16 -0500[diff] [blame]2031 fprintf(stderr, "RAPL: %.0f sec. Joule Counter Range, at %.0f Watts\n", rapl_joule_counter_range, tdp);
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]2032
2033 return;
2034}
2035
Len Brown3a9a9412014-08-15 02:39:52 -0400[diff] [blame]2036void perf_limit_reasons_probe(family, model)
2037{
2038 if (!genuine_intel)
2039 return;
2040
2041 if (family != 6)
2042 return;
2043
2044 switch (model) {
2045 case 0x3C: /* HSW */
2046 case 0x45: /* HSW */
2047 case 0x46: /* HSW */
2048 do_gfx_perf_limit_reasons = 1;
2049 case 0x3F: /* HSX */
2050 do_core_perf_limit_reasons = 1;
2051 do_ring_perf_limit_reasons = 1;
2052 default:
2053 return;
2054 }
2055}
2056
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]2057int print_thermal(struct thread_data *t, struct core_data *c, struct pkg_data *p)
2058{
2059 unsigned long long msr;
2060 unsigned int dts;
2061 int cpu;
2062
2063 if (!(do_dts || do_ptm))
2064 return 0;
2065
2066 cpu = t->cpu_id;
2067
2068 /* DTS is per-core, no need to print for each thread */
2069 if (!(t->flags & CPU_IS_FIRST_THREAD_IN_CORE))
2070 return 0;
2071
2072 if (cpu_migrate(cpu)) {
2073 fprintf(stderr, "Could not migrate to CPU %d\n", cpu);
2074 return -1;
2075 }
2076
2077 if (do_ptm && (t->flags & CPU_IS_FIRST_CORE_IN_PACKAGE)) {
2078 if (get_msr(cpu, MSR_IA32_PACKAGE_THERM_STATUS, &msr))
2079 return 0;
2080
2081 dts = (msr >> 16) & 0x7F;
2082 fprintf(stderr, "cpu%d: MSR_IA32_PACKAGE_THERM_STATUS: 0x%08llx (%d C)\n",
2083 cpu, msr, tcc_activation_temp - dts);
2084
2085#ifdef THERM_DEBUG
2086 if (get_msr(cpu, MSR_IA32_PACKAGE_THERM_INTERRUPT, &msr))
2087 return 0;
2088
2089 dts = (msr >> 16) & 0x7F;
2090 dts2 = (msr >> 8) & 0x7F;
2091 fprintf(stderr, "cpu%d: MSR_IA32_PACKAGE_THERM_INTERRUPT: 0x%08llx (%d C, %d C)\n",
2092 cpu, msr, tcc_activation_temp - dts, tcc_activation_temp - dts2);
2093#endif
2094 }
2095
2096
2097 if (do_dts) {
2098 unsigned int resolution;
2099
2100 if (get_msr(cpu, MSR_IA32_THERM_STATUS, &msr))
2101 return 0;
2102
2103 dts = (msr >> 16) & 0x7F;
2104 resolution = (msr >> 27) & 0xF;
2105 fprintf(stderr, "cpu%d: MSR_IA32_THERM_STATUS: 0x%08llx (%d C +/- %d)\n",
2106 cpu, msr, tcc_activation_temp - dts, resolution);
2107
2108#ifdef THERM_DEBUG
2109 if (get_msr(cpu, MSR_IA32_THERM_INTERRUPT, &msr))
2110 return 0;
2111
2112 dts = (msr >> 16) & 0x7F;
2113 dts2 = (msr >> 8) & 0x7F;
2114 fprintf(stderr, "cpu%d: MSR_IA32_THERM_INTERRUPT: 0x%08llx (%d C, %d C)\n",
2115 cpu, msr, tcc_activation_temp - dts, tcc_activation_temp - dts2);
2116#endif
2117 }
2118
2119 return 0;
2120}
2121
2122void print_power_limit_msr(int cpu, unsigned long long msr, char *label)
2123{
2124 fprintf(stderr, "cpu%d: %s: %sabled (%f Watts, %f sec, clamp %sabled)\n",
2125 cpu, label,
2126 ((msr >> 15) & 1) ? "EN" : "DIS",
2127 ((msr >> 0) & 0x7FFF) * rapl_power_units,
2128 (1.0 + (((msr >> 22) & 0x3)/4.0)) * (1 << ((msr >> 17) & 0x1F)) * rapl_time_units,
2129 (((msr >> 16) & 1) ? "EN" : "DIS"));
2130
2131 return;
2132}
2133
2134int print_rapl(struct thread_data *t, struct core_data *c, struct pkg_data *p)
2135{
2136 unsigned long long msr;
2137 int cpu;
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]2138
2139 if (!do_rapl)
2140 return 0;
2141
2142 /* RAPL counters are per package, so print only for 1st thread/package */
2143 if (!(t->flags & CPU_IS_FIRST_THREAD_IN_CORE) || !(t->flags & CPU_IS_FIRST_CORE_IN_PACKAGE))
2144 return 0;
2145
2146 cpu = t->cpu_id;
2147 if (cpu_migrate(cpu)) {
2148 fprintf(stderr, "Could not migrate to CPU %d\n", cpu);
2149 return -1;
2150 }
2151
2152 if (get_msr(cpu, MSR_RAPL_POWER_UNIT, &msr))
2153 return -1;
2154
Len Brownd8af6f52015-02-10 01:56:38 -0500[diff] [blame]2155 if (debug) {
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]2156 fprintf(stderr, "cpu%d: MSR_RAPL_POWER_UNIT: 0x%08llx "
2157 "(%f Watts, %f Joules, %f sec.)\n", cpu, msr,
Len Brown144b44b2013-11-09 00:30:16 -0500[diff] [blame]2158 rapl_power_units, rapl_energy_units, rapl_time_units);
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]2159 }
Len Brown144b44b2013-11-09 00:30:16 -0500[diff] [blame]2160 if (do_rapl & RAPL_PKG_POWER_INFO) {
2161
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]2162 if (get_msr(cpu, MSR_PKG_POWER_INFO, &msr))
2163 return -5;
2164
2165
2166 fprintf(stderr, "cpu%d: MSR_PKG_POWER_INFO: 0x%08llx (%.0f W TDP, RAPL %.0f - %.0f W, %f sec.)\n",
2167 cpu, msr,
2168 ((msr >> 0) & RAPL_POWER_GRANULARITY) * rapl_power_units,
2169 ((msr >> 16) & RAPL_POWER_GRANULARITY) * rapl_power_units,
2170 ((msr >> 32) & RAPL_POWER_GRANULARITY) * rapl_power_units,
2171 ((msr >> 48) & RAPL_TIME_GRANULARITY) * rapl_time_units);
2172
Len Brown144b44b2013-11-09 00:30:16 -0500[diff] [blame]2173 }
2174 if (do_rapl & RAPL_PKG) {
2175
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]2176 if (get_msr(cpu, MSR_PKG_POWER_LIMIT, &msr))
2177 return -9;
2178
2179 fprintf(stderr, "cpu%d: MSR_PKG_POWER_LIMIT: 0x%08llx (%slocked)\n",
2180 cpu, msr, (msr >> 63) & 1 ? "": "UN");
2181
2182 print_power_limit_msr(cpu, msr, "PKG Limit #1");
2183 fprintf(stderr, "cpu%d: PKG Limit #2: %sabled (%f Watts, %f* sec, clamp %sabled)\n",
2184 cpu,
2185 ((msr >> 47) & 1) ? "EN" : "DIS",
2186 ((msr >> 32) & 0x7FFF) * rapl_power_units,
2187 (1.0 + (((msr >> 54) & 0x3)/4.0)) * (1 << ((msr >> 49) & 0x1F)) * rapl_time_units,
2188 ((msr >> 48) & 1) ? "EN" : "DIS");
2189 }
2190
Len Brown0b2bb692015-03-26 00:50:30 -0400[diff] [blame]2191 if (do_rapl & RAPL_DRAM_POWER_INFO) {
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]2192 if (get_msr(cpu, MSR_DRAM_POWER_INFO, &msr))
2193 return -6;
2194
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]2195 fprintf(stderr, "cpu%d: MSR_DRAM_POWER_INFO,: 0x%08llx (%.0f W TDP, RAPL %.0f - %.0f W, %f sec.)\n",
2196 cpu, msr,
2197 ((msr >> 0) & RAPL_POWER_GRANULARITY) * rapl_power_units,
2198 ((msr >> 16) & RAPL_POWER_GRANULARITY) * rapl_power_units,
2199 ((msr >> 32) & RAPL_POWER_GRANULARITY) * rapl_power_units,
2200 ((msr >> 48) & RAPL_TIME_GRANULARITY) * rapl_time_units);
Len Brown0b2bb692015-03-26 00:50:30 -0400[diff] [blame]2201 }
2202 if (do_rapl & RAPL_DRAM) {
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]2203 if (get_msr(cpu, MSR_DRAM_POWER_LIMIT, &msr))
2204 return -9;
2205 fprintf(stderr, "cpu%d: MSR_DRAM_POWER_LIMIT: 0x%08llx (%slocked)\n",
2206 cpu, msr, (msr >> 31) & 1 ? "": "UN");
2207
2208 print_power_limit_msr(cpu, msr, "DRAM Limit");
2209 }
Len Brown144b44b2013-11-09 00:30:16 -0500[diff] [blame]2210 if (do_rapl & RAPL_CORE_POLICY) {
Len Brownd8af6f52015-02-10 01:56:38 -0500[diff] [blame]2211 if (debug) {
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]2212 if (get_msr(cpu, MSR_PP0_POLICY, &msr))
2213 return -7;
2214
2215 fprintf(stderr, "cpu%d: MSR_PP0_POLICY: %lld\n", cpu, msr & 0xF);
Len Brown144b44b2013-11-09 00:30:16 -0500[diff] [blame]2216 }
2217 }
2218 if (do_rapl & RAPL_CORES) {
Len Brownd8af6f52015-02-10 01:56:38 -0500[diff] [blame]2219 if (debug) {
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]2220
2221 if (get_msr(cpu, MSR_PP0_POWER_LIMIT, &msr))
2222 return -9;
2223 fprintf(stderr, "cpu%d: MSR_PP0_POWER_LIMIT: 0x%08llx (%slocked)\n",
2224 cpu, msr, (msr >> 31) & 1 ? "": "UN");
2225 print_power_limit_msr(cpu, msr, "Cores Limit");
2226 }
2227 }
2228 if (do_rapl & RAPL_GFX) {
Len Brownd8af6f52015-02-10 01:56:38 -0500[diff] [blame]2229 if (debug) {
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]2230 if (get_msr(cpu, MSR_PP1_POLICY, &msr))
2231 return -8;
2232
2233 fprintf(stderr, "cpu%d: MSR_PP1_POLICY: %lld\n", cpu, msr & 0xF);
2234
2235 if (get_msr(cpu, MSR_PP1_POWER_LIMIT, &msr))
2236 return -9;
2237 fprintf(stderr, "cpu%d: MSR_PP1_POWER_LIMIT: 0x%08llx (%slocked)\n",
2238 cpu, msr, (msr >> 31) & 1 ? "": "UN");
2239 print_power_limit_msr(cpu, msr, "GFX Limit");
2240 }
2241 }
2242 return 0;
2243}
2244
Len Brownd7899442015-01-23 00:12:33 -0500[diff] [blame]2245/*
2246 * SNB adds support for additional MSRs:
2247 *
2248 * MSR_PKG_C7_RESIDENCY 0x000003fa
2249 * MSR_CORE_C7_RESIDENCY 0x000003fe
2250 * MSR_PKG_C2_RESIDENCY 0x0000060d
2251 */
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]2252
Len Brownd7899442015-01-23 00:12:33 -0500[diff] [blame]2253int has_snb_msrs(unsigned int family, unsigned int model)
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]2254{
2255 if (!genuine_intel)
2256 return 0;
2257
2258 switch (model) {
2259 case 0x2A:
2260 case 0x2D:
Len Brown650a37f2012-06-03 23:34:44 -0400[diff] [blame]2261 case 0x3A: /* IVB */
Len Brown13006512012-09-26 18:11:31 -0400[diff] [blame]2262 case 0x3E: /* IVB Xeon */
Len Brown70b43402013-01-08 01:26:07 -0500[diff] [blame]2263 case 0x3C: /* HSW */
2264 case 0x3F: /* HSW */
2265 case 0x45: /* HSW */
Len Brown149c2312013-03-15 10:58:02 -0400[diff] [blame]2266 case 0x46: /* HSW */
Len Brown4e8e863f2014-02-27 23:28:53 -0500[diff] [blame]2267 case 0x3D: /* BDW */
Len Brown48a06312015-02-10 15:38:04 -0500[diff] [blame]2268 case 0x47: /* BDW */
Len Brown4e8e863f2014-02-27 23:28:53 -0500[diff] [blame]2269 case 0x4F: /* BDX */
2270 case 0x56: /* BDX-DE */
Len Brown0b2bb692015-03-26 00:50:30 -0400[diff] [blame]2271 case 0x4E: /* SKL */
2272 case 0x5E: /* SKL */
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]2273 return 1;
2274 }
2275 return 0;
2276}
2277
Len Brownd7899442015-01-23 00:12:33 -0500[diff] [blame]2278/*
2279 * HSW adds support for additional MSRs:
2280 *
2281 * MSR_PKG_C8_RESIDENCY 0x00000630
2282 * MSR_PKG_C9_RESIDENCY 0x00000631
2283 * MSR_PKG_C10_RESIDENCY 0x00000632
2284 */
2285int has_hsw_msrs(unsigned int family, unsigned int model)
Kristen Carlson Accardica587102012-11-21 05:22:43 -0800[diff] [blame]2286{
2287 if (!genuine_intel)
2288 return 0;
2289
2290 switch (model) {
Len Brown4e8e863f2014-02-27 23:28:53 -0500[diff] [blame]2291 case 0x45: /* HSW */
2292 case 0x3D: /* BDW */
Len Brown0b2bb692015-03-26 00:50:30 -0400[diff] [blame]2293 case 0x4E: /* SKL */
2294 case 0x5E: /* SKL */
Kristen Carlson Accardica587102012-11-21 05:22:43 -0800[diff] [blame]2295 return 1;
2296 }
2297 return 0;
2298}
2299
Len Brown0b2bb692015-03-26 00:50:30 -0400[diff] [blame]2300/*
2301 * SKL adds support for additional MSRS:
2302 *
2303 * MSR_PKG_WEIGHTED_CORE_C0_RES 0x00000658
2304 * MSR_PKG_ANY_CORE_C0_RES 0x00000659
2305 * MSR_PKG_ANY_GFXE_C0_RES 0x0000065A
2306 * MSR_PKG_BOTH_CORE_GFXE_C0_RES 0x0000065B
2307 */
2308int has_skl_msrs(unsigned int family, unsigned int model)
2309{
2310 if (!genuine_intel)
2311 return 0;
2312
2313 switch (model) {
2314 case 0x4E: /* SKL */
2315 case 0x5E: /* SKL */
2316 return 1;
2317 }
2318 return 0;
2319}
2320
2321
Kristen Carlson Accardica587102012-11-21 05:22:43 -0800[diff] [blame]2322
Len Brown144b44b2013-11-09 00:30:16 -0500[diff] [blame]2323int is_slm(unsigned int family, unsigned int model)
2324{
2325 if (!genuine_intel)
2326 return 0;
2327 switch (model) {
2328 case 0x37: /* BYT */
2329 case 0x4D: /* AVN */
2330 return 1;
2331 }
2332 return 0;
2333}
2334
2335#define SLM_BCLK_FREQS 5
2336double slm_freq_table[SLM_BCLK_FREQS] = { 83.3, 100.0, 133.3, 116.7, 80.0};
2337
2338double slm_bclk(void)
2339{
2340 unsigned long long msr = 3;
2341 unsigned int i;
2342 double freq;
2343
2344 if (get_msr(0, MSR_FSB_FREQ, &msr))
2345 fprintf(stderr, "SLM BCLK: unknown\n");
2346
2347 i = msr & 0xf;
2348 if (i >= SLM_BCLK_FREQS) {
2349 fprintf(stderr, "SLM BCLK[%d] invalid\n", i);
2350 msr = 3;
2351 }
2352 freq = slm_freq_table[i];
2353
2354 fprintf(stderr, "SLM BCLK: %.1f Mhz\n", freq);
2355
2356 return freq;
2357}
2358
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]2359double discover_bclk(unsigned int family, unsigned int model)
2360{
Len Brownd7899442015-01-23 00:12:33 -0500[diff] [blame]2361 if (has_snb_msrs(family, model))
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]2362 return 100.00;
Len Brown144b44b2013-11-09 00:30:16 -0500[diff] [blame]2363 else if (is_slm(family, model))
2364 return slm_bclk();
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]2365 else
2366 return 133.33;
2367}
2368
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]2369/*
2370 * MSR_IA32_TEMPERATURE_TARGET indicates the temperature where
2371 * the Thermal Control Circuit (TCC) activates.
2372 * This is usually equal to tjMax.
2373 *
2374 * Older processors do not have this MSR, so there we guess,
2375 * but also allow cmdline over-ride with -T.
2376 *
2377 * Several MSR temperature values are in units of degrees-C
2378 * below this value, including the Digital Thermal Sensor (DTS),
2379 * Package Thermal Management Sensor (PTM), and thermal event thresholds.
2380 */
2381int set_temperature_target(struct thread_data *t, struct core_data *c, struct pkg_data *p)
2382{
2383 unsigned long long msr;
2384 unsigned int target_c_local;
2385 int cpu;
2386
2387 /* tcc_activation_temp is used only for dts or ptm */
2388 if (!(do_dts || do_ptm))
2389 return 0;
2390
2391 /* this is a per-package concept */
2392 if (!(t->flags & CPU_IS_FIRST_THREAD_IN_CORE) || !(t->flags & CPU_IS_FIRST_CORE_IN_PACKAGE))
2393 return 0;
2394
2395 cpu = t->cpu_id;
2396 if (cpu_migrate(cpu)) {
2397 fprintf(stderr, "Could not migrate to CPU %d\n", cpu);
2398 return -1;
2399 }
2400
2401 if (tcc_activation_temp_override != 0) {
2402 tcc_activation_temp = tcc_activation_temp_override;
2403 fprintf(stderr, "cpu%d: Using cmdline TCC Target (%d C)\n",
2404 cpu, tcc_activation_temp);
2405 return 0;
2406 }
2407
2408 /* Temperature Target MSR is Nehalem and newer only */
Len Brownd7899442015-01-23 00:12:33 -0500[diff] [blame]2409 if (!do_nhm_platform_info)
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]2410 goto guess;
2411
2412 if (get_msr(0, MSR_IA32_TEMPERATURE_TARGET, &msr))
2413 goto guess;
2414
Jean Delvare34821242014-05-01 11:40:19 +0200[diff] [blame]2415 target_c_local = (msr >> 16) & 0xFF;
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]2416
Len Brownd8af6f52015-02-10 01:56:38 -0500[diff] [blame]2417 if (debug)
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]2418 fprintf(stderr, "cpu%d: MSR_IA32_TEMPERATURE_TARGET: 0x%08llx (%d C)\n",
2419 cpu, msr, target_c_local);
2420
Jean Delvare34821242014-05-01 11:40:19 +0200[diff] [blame]2421 if (!target_c_local)
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]2422 goto guess;
2423
2424 tcc_activation_temp = target_c_local;
2425
2426 return 0;
2427
2428guess:
2429 tcc_activation_temp = TJMAX_DEFAULT;
2430 fprintf(stderr, "cpu%d: Guessing tjMax %d C, Please use -T to specify\n",
2431 cpu, tcc_activation_temp);
2432
2433 return 0;
2434}
Len Brownfcd17212015-03-23 20:29:09 -0400[diff] [blame]2435void process_cpuid()
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]2436{
2437 unsigned int eax, ebx, ecx, edx, max_level;
2438 unsigned int fms, family, model, stepping;
2439
2440 eax = ebx = ecx = edx = 0;
2441
Josh Triplett2b928652013-08-20 17:20:14 -0700[diff] [blame]2442 __get_cpuid(0, &max_level, &ebx, &ecx, &edx);
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]2443
2444 if (ebx == 0x756e6547 && edx == 0x49656e69 && ecx == 0x6c65746e)
2445 genuine_intel = 1;
2446
Len Brownd8af6f52015-02-10 01:56:38 -0500[diff] [blame]2447 if (debug)
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]2448 fprintf(stderr, "CPUID(0): %.4s%.4s%.4s ",
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]2449 (char *)&ebx, (char *)&edx, (char *)&ecx);
2450
Josh Triplett2b928652013-08-20 17:20:14 -0700[diff] [blame]2451 __get_cpuid(1, &fms, &ebx, &ecx, &edx);
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]2452 family = (fms >> 8) & 0xf;
2453 model = (fms >> 4) & 0xf;
2454 stepping = fms & 0xf;
2455 if (family == 6 || family == 0xf)
2456 model += ((fms >> 16) & 0xf) << 4;
2457
Len Brownd8af6f52015-02-10 01:56:38 -0500[diff] [blame]2458 if (debug)
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]2459 fprintf(stderr, "%d CPUID levels; family:model:stepping 0x%x:%x:%x (%d:%d:%d)\n",
2460 max_level, family, model, stepping, family, model, stepping);
2461
Josh Triplettb2c95d92013-08-20 17:20:18 -0700[diff] [blame]2462 if (!(edx & (1 << 5)))
2463 errx(1, "CPUID: no MSR");
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]2464
2465 /*
2466 * check max extended function levels of CPUID.
2467 * This is needed to check for invariant TSC.
2468 * This check is valid for both Intel and AMD.
2469 */
2470 ebx = ecx = edx = 0;
Josh Triplett2b928652013-08-20 17:20:14 -0700[diff] [blame]2471 __get_cpuid(0x80000000, &max_level, &ebx, &ecx, &edx);
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]2472
Len Brownd7899442015-01-23 00:12:33 -0500[diff] [blame]2473 if (max_level >= 0x80000007) {
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]2474
Len Brownd7899442015-01-23 00:12:33 -0500[diff] [blame]2475 /*
2476 * Non-Stop TSC is advertised by CPUID.EAX=0x80000007: EDX.bit8
2477 * this check is valid for both Intel and AMD
2478 */
2479 __get_cpuid(0x80000007, &eax, &ebx, &ecx, &edx);
2480 has_invariant_tsc = edx & (1 << 8);
2481 }
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]2482
2483 /*
2484 * APERF/MPERF is advertised by CPUID.EAX=0x6: ECX.bit0
2485 * this check is valid for both Intel and AMD
2486 */
2487
Josh Triplett2b928652013-08-20 17:20:14 -0700[diff] [blame]2488 __get_cpuid(0x6, &eax, &ebx, &ecx, &edx);
Thomas Renninger8209e052011-01-21 15:11:19 +0100[diff] [blame]2489 has_aperf = ecx & (1 << 0);
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]2490 do_dts = eax & (1 << 0);
2491 do_ptm = eax & (1 << 6);
2492 has_epb = ecx & (1 << 3);
2493
Len Brownd8af6f52015-02-10 01:56:38 -0500[diff] [blame]2494 if (debug)
Len Browna7296172015-01-23 01:33:58 -0500[diff] [blame]2495 fprintf(stderr, "CPUID(6): %sAPERF, %sDTS, %sPTM, %sEPB\n",
2496 has_aperf ? "" : "No ",
2497 do_dts ? "" : "No ",
2498 do_ptm ? "" : "No ",
2499 has_epb ? "" : "No ");
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]2500
Len Brown8a5bdf42015-04-01 21:02:57 -0400[diff] [blame^]2501 if (max_level > 0x15) {
2502 unsigned int eax_crystal;
2503 unsigned int ebx_tsc;
2504
2505 /*
2506 * CPUID 15H TSC/Crystal ratio, possibly Crystal Hz
2507 */
2508 eax_crystal = ebx_tsc = crystal_hz = edx = 0;
2509 __get_cpuid(0x15, &eax_crystal, &ebx_tsc, &crystal_hz, &edx);
2510
2511 if (ebx_tsc != 0) {
2512
2513 if (debug && (ebx != 0))
2514 fprintf(stderr, "CPUID(0x15): eax_crystal: %d ebx_tsc: %d ecx_crystal_hz: %d\n",
2515 eax_crystal, ebx_tsc, crystal_hz);
2516
2517 if (crystal_hz == 0)
2518 switch(model) {
2519 case 0x4E: /* SKL */
2520 case 0x5E: /* SKL */
2521 crystal_hz = 24000000; /* 24 MHz */
2522 break;
2523 default:
2524 crystal_hz = 0;
2525 }
2526
2527 if (crystal_hz) {
2528 tsc_hz = (unsigned long long) crystal_hz * ebx_tsc / eax_crystal;
2529 if (debug)
2530 fprintf(stderr, "TSC: %lld MHz (%d Hz * %d / %d / 1000000)\n",
2531 tsc_hz / 1000000, crystal_hz, ebx_tsc, eax_crystal);
2532 }
2533 }
2534 }
2535
Len Brownee7e38e2015-02-09 23:39:45 -0500[diff] [blame]2536 do_nhm_platform_info = do_nhm_cstates = do_smi = probe_nhm_msrs(family, model);
Len Brownd7899442015-01-23 00:12:33 -0500[diff] [blame]2537 do_snb_cstates = has_snb_msrs(family, model);
Len Brownee7e38e2015-02-09 23:39:45 -0500[diff] [blame]2538 do_pc2 = do_snb_cstates && (pkg_cstate_limit >= PCL__2);
2539 do_pc3 = (pkg_cstate_limit >= PCL__3);
2540 do_pc6 = (pkg_cstate_limit >= PCL__6);
2541 do_pc7 = do_snb_cstates && (pkg_cstate_limit >= PCL__7);
Len Brownd7899442015-01-23 00:12:33 -0500[diff] [blame]2542 do_c8_c9_c10 = has_hsw_msrs(family, model);
Len Brown0b2bb692015-03-26 00:50:30 -0400[diff] [blame]2543 do_skl_residency = has_skl_msrs(family, model);
Len Brown144b44b2013-11-09 00:30:16 -0500[diff] [blame]2544 do_slm_cstates = is_slm(family, model);
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]2545 bclk = discover_bclk(family, model);
2546
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]2547 rapl_probe(family, model);
Len Brown3a9a9412014-08-15 02:39:52 -0400[diff] [blame]2548 perf_limit_reasons_probe(family, model);
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]2549
Len Brownfcd17212015-03-23 20:29:09 -0400[diff] [blame]2550 if (debug)
2551 dump_cstate_pstate_config_info();
2552
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]2553 return;
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]2554}
2555
Len Brownd8af6f52015-02-10 01:56:38 -0500[diff] [blame]2556void help()
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]2557{
Len Brownd8af6f52015-02-10 01:56:38 -0500[diff] [blame]2558 fprintf(stderr,
2559 "Usage: turbostat [OPTIONS][(--interval seconds) | COMMAND ...]\n"
2560 "\n"
2561 "Turbostat forks the specified COMMAND and prints statistics\n"
2562 "when COMMAND completes.\n"
2563 "If no COMMAND is specified, turbostat wakes every 5-seconds\n"
2564 "to print statistics, until interrupted.\n"
2565 "--debug run in \"debug\" mode\n"
2566 "--interval sec Override default 5-second measurement interval\n"
2567 "--help print this help message\n"
2568 "--counter msr print 32-bit counter at address \"msr\"\n"
2569 "--Counter msr print 64-bit Counter at address \"msr\"\n"
2570 "--msr msr print 32-bit value at address \"msr\"\n"
2571 "--MSR msr print 64-bit Value at address \"msr\"\n"
2572 "--version print version information\n"
2573 "\n"
2574 "For more help, run \"man turbostat\"\n");
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]2575}
2576
2577
2578/*
2579 * in /dev/cpu/ return success for names that are numbers
2580 * ie. filter out ".", "..", "microcode".
2581 */
2582int dir_filter(const struct dirent *dirp)
2583{
2584 if (isdigit(dirp->d_name[0]))
2585 return 1;
2586 else
2587 return 0;
2588}
2589
2590int open_dev_cpu_msr(int dummy1)
2591{
2592 return 0;
2593}
2594
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]2595void topology_probe()
2596{
2597 int i;
2598 int max_core_id = 0;
2599 int max_package_id = 0;
2600 int max_siblings = 0;
2601 struct cpu_topology {
2602 int core_id;
2603 int physical_package_id;
2604 } *cpus;
2605
2606 /* Initialize num_cpus, max_cpu_num */
2607 topo.num_cpus = 0;
2608 topo.max_cpu_num = 0;
2609 for_all_proc_cpus(count_cpus);
2610 if (!summary_only && topo.num_cpus > 1)
2611 show_cpu = 1;
2612
Len Brownd8af6f52015-02-10 01:56:38 -0500[diff] [blame]2613 if (debug > 1)
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]2614 fprintf(stderr, "num_cpus %d max_cpu_num %d\n", topo.num_cpus, topo.max_cpu_num);
2615
2616 cpus = calloc(1, (topo.max_cpu_num + 1) * sizeof(struct cpu_topology));
Josh Triplettb2c95d92013-08-20 17:20:18 -0700[diff] [blame]2617 if (cpus == NULL)
2618 err(1, "calloc cpus");
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]2619
2620 /*
2621 * Allocate and initialize cpu_present_set
2622 */
2623 cpu_present_set = CPU_ALLOC((topo.max_cpu_num + 1));
Josh Triplettb2c95d92013-08-20 17:20:18 -0700[diff] [blame]2624 if (cpu_present_set == NULL)
2625 err(3, "CPU_ALLOC");
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]2626 cpu_present_setsize = CPU_ALLOC_SIZE((topo.max_cpu_num + 1));
2627 CPU_ZERO_S(cpu_present_setsize, cpu_present_set);
2628 for_all_proc_cpus(mark_cpu_present);
2629
2630 /*
2631 * Allocate and initialize cpu_affinity_set
2632 */
2633 cpu_affinity_set = CPU_ALLOC((topo.max_cpu_num + 1));
Josh Triplettb2c95d92013-08-20 17:20:18 -0700[diff] [blame]2634 if (cpu_affinity_set == NULL)
2635 err(3, "CPU_ALLOC");
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]2636 cpu_affinity_setsize = CPU_ALLOC_SIZE((topo.max_cpu_num + 1));
2637 CPU_ZERO_S(cpu_affinity_setsize, cpu_affinity_set);
2638
2639
2640 /*
2641 * For online cpus
2642 * find max_core_id, max_package_id
2643 */
2644 for (i = 0; i <= topo.max_cpu_num; ++i) {
2645 int siblings;
2646
2647 if (cpu_is_not_present(i)) {
Len Brownd8af6f52015-02-10 01:56:38 -0500[diff] [blame]2648 if (debug > 1)
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]2649 fprintf(stderr, "cpu%d NOT PRESENT\n", i);
2650 continue;
2651 }
2652 cpus[i].core_id = get_core_id(i);
2653 if (cpus[i].core_id > max_core_id)
2654 max_core_id = cpus[i].core_id;
2655
2656 cpus[i].physical_package_id = get_physical_package_id(i);
2657 if (cpus[i].physical_package_id > max_package_id)
2658 max_package_id = cpus[i].physical_package_id;
2659
2660 siblings = get_num_ht_siblings(i);
2661 if (siblings > max_siblings)
2662 max_siblings = siblings;
Len Brownd8af6f52015-02-10 01:56:38 -0500[diff] [blame]2663 if (debug > 1)
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]2664 fprintf(stderr, "cpu %d pkg %d core %d\n",
2665 i, cpus[i].physical_package_id, cpus[i].core_id);
2666 }
2667 topo.num_cores_per_pkg = max_core_id + 1;
Len Brownd8af6f52015-02-10 01:56:38 -0500[diff] [blame]2668 if (debug > 1)
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]2669 fprintf(stderr, "max_core_id %d, sizing for %d cores per package\n",
2670 max_core_id, topo.num_cores_per_pkg);
Len Brown1cc21f72015-02-23 00:34:57 -0500[diff] [blame]2671 if (debug && !summary_only && topo.num_cores_per_pkg > 1)
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]2672 show_core = 1;
2673
2674 topo.num_packages = max_package_id + 1;
Len Brownd8af6f52015-02-10 01:56:38 -0500[diff] [blame]2675 if (debug > 1)
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]2676 fprintf(stderr, "max_package_id %d, sizing for %d packages\n",
2677 max_package_id, topo.num_packages);
Len Brown1cc21f72015-02-23 00:34:57 -0500[diff] [blame]2678 if (debug && !summary_only && topo.num_packages > 1)
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]2679 show_pkg = 1;
2680
2681 topo.num_threads_per_core = max_siblings;
Len Brownd8af6f52015-02-10 01:56:38 -0500[diff] [blame]2682 if (debug > 1)
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]2683 fprintf(stderr, "max_siblings %d\n", max_siblings);
2684
2685 free(cpus);
2686}
2687
2688void
2689allocate_counters(struct thread_data **t, struct core_data **c, struct pkg_data **p)
2690{
2691 int i;
2692
2693 *t = calloc(topo.num_threads_per_core * topo.num_cores_per_pkg *
2694 topo.num_packages, sizeof(struct thread_data));
2695 if (*t == NULL)
2696 goto error;
2697
2698 for (i = 0; i < topo.num_threads_per_core *
2699 topo.num_cores_per_pkg * topo.num_packages; i++)
2700 (*t)[i].cpu_id = -1;
2701
2702 *c = calloc(topo.num_cores_per_pkg * topo.num_packages,
2703 sizeof(struct core_data));
2704 if (*c == NULL)
2705 goto error;
2706
2707 for (i = 0; i < topo.num_cores_per_pkg * topo.num_packages; i++)
2708 (*c)[i].core_id = -1;
2709
2710 *p = calloc(topo.num_packages, sizeof(struct pkg_data));
2711 if (*p == NULL)
2712 goto error;
2713
2714 for (i = 0; i < topo.num_packages; i++)
2715 (*p)[i].package_id = i;
2716
2717 return;
2718error:
Josh Triplettb2c95d92013-08-20 17:20:18 -0700[diff] [blame]2719 err(1, "calloc counters");
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]2720}
2721/*
2722 * init_counter()
2723 *
2724 * set cpu_id, core_num, pkg_num
2725 * set FIRST_THREAD_IN_CORE and FIRST_CORE_IN_PACKAGE
2726 *
2727 * increment topo.num_cores when 1st core in pkg seen
2728 */
2729void init_counter(struct thread_data *thread_base, struct core_data *core_base,
2730 struct pkg_data *pkg_base, int thread_num, int core_num,
2731 int pkg_num, int cpu_id)
2732{
2733 struct thread_data *t;
2734 struct core_data *c;
2735 struct pkg_data *p;
2736
2737 t = GET_THREAD(thread_base, thread_num, core_num, pkg_num);
2738 c = GET_CORE(core_base, core_num, pkg_num);
2739 p = GET_PKG(pkg_base, pkg_num);
2740
2741 t->cpu_id = cpu_id;
2742 if (thread_num == 0) {
2743 t->flags |= CPU_IS_FIRST_THREAD_IN_CORE;
2744 if (cpu_is_first_core_in_package(cpu_id))
2745 t->flags |= CPU_IS_FIRST_CORE_IN_PACKAGE;
2746 }
2747
2748 c->core_id = core_num;
2749 p->package_id = pkg_num;
2750}
2751
2752
2753int initialize_counters(int cpu_id)
2754{
2755 int my_thread_id, my_core_id, my_package_id;
2756
2757 my_package_id = get_physical_package_id(cpu_id);
2758 my_core_id = get_core_id(cpu_id);
2759
2760 if (cpu_is_first_sibling_in_core(cpu_id)) {
2761 my_thread_id = 0;
2762 topo.num_cores++;
2763 } else {
2764 my_thread_id = 1;
2765 }
2766
2767 init_counter(EVEN_COUNTERS, my_thread_id, my_core_id, my_package_id, cpu_id);
2768 init_counter(ODD_COUNTERS, my_thread_id, my_core_id, my_package_id, cpu_id);
2769 return 0;
2770}
2771
2772void allocate_output_buffer()
2773{
Andy Shevchenko3b4d5c72014-01-23 17:13:15 +0200[diff] [blame]2774 output_buffer = calloc(1, (1 + topo.num_cpus) * 1024);
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]2775 outp = output_buffer;
Josh Triplettb2c95d92013-08-20 17:20:18 -0700[diff] [blame]2776 if (outp == NULL)
2777 err(-1, "calloc output buffer");
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]2778}
2779
2780void setup_all_buffers(void)
2781{
2782 topology_probe();
2783 allocate_counters(&thread_even, &core_even, &package_even);
2784 allocate_counters(&thread_odd, &core_odd, &package_odd);
2785 allocate_output_buffer();
2786 for_all_proc_cpus(initialize_counters);
2787}
Andy Shevchenko3b4d5c72014-01-23 17:13:15 +0200[diff] [blame]2788
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]2789void turbostat_init()
2790{
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]2791 check_dev_msr();
Len Brown98481e72014-08-15 00:36:50 -0400[diff] [blame]2792 check_permissions();
Len Brownfcd17212015-03-23 20:29:09 -0400[diff] [blame]2793 process_cpuid();
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]2794
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]2795 setup_all_buffers();
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]2796
Len Brownd8af6f52015-02-10 01:56:38 -0500[diff] [blame]2797 if (debug)
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]2798 for_all_cpus(print_epb, ODD_COUNTERS);
2799
Len Brownd8af6f52015-02-10 01:56:38 -0500[diff] [blame]2800 if (debug)
Len Brown3a9a9412014-08-15 02:39:52 -0400[diff] [blame]2801 for_all_cpus(print_perf_limit, ODD_COUNTERS);
2802
Len Brownd8af6f52015-02-10 01:56:38 -0500[diff] [blame]2803 if (debug)
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]2804 for_all_cpus(print_rapl, ODD_COUNTERS);
2805
2806 for_all_cpus(set_temperature_target, ODD_COUNTERS);
2807
Len Brownd8af6f52015-02-10 01:56:38 -0500[diff] [blame]2808 if (debug)
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]2809 for_all_cpus(print_thermal, ODD_COUNTERS);
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]2810}
2811
2812int fork_it(char **argv)
2813{
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]2814 pid_t child_pid;
Len Brownd91bb172012-11-01 00:08:19 -0400[diff] [blame]2815 int status;
Len Brownd15cf7c2012-06-03 23:24:00 -0400[diff] [blame]2816
Len Brownd91bb172012-11-01 00:08:19 -0400[diff] [blame]2817 status = for_all_cpus(get_counters, EVEN_COUNTERS);
2818 if (status)
2819 exit(status);
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]2820 /* clear affinity side-effect of get_counters() */
2821 sched_setaffinity(0, cpu_present_setsize, cpu_present_set);
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]2822 gettimeofday(&tv_even, (struct timezone *)NULL);
2823
2824 child_pid = fork();
2825 if (!child_pid) {
2826 /* child */
2827 execvp(argv[0], argv);
2828 } else {
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]2829
2830 /* parent */
Josh Triplettb2c95d92013-08-20 17:20:18 -0700[diff] [blame]2831 if (child_pid == -1)
2832 err(1, "fork");
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]2833
2834 signal(SIGINT, SIG_IGN);
2835 signal(SIGQUIT, SIG_IGN);
Josh Triplettb2c95d92013-08-20 17:20:18 -0700[diff] [blame]2836 if (waitpid(child_pid, &status, 0) == -1)
2837 err(status, "waitpid");
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]2838 }
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]2839 /*
2840 * n.b. fork_it() does not check for errors from for_all_cpus()
2841 * because re-starting is problematic when forking
2842 */
2843 for_all_cpus(get_counters, ODD_COUNTERS);
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]2844 gettimeofday(&tv_odd, (struct timezone *)NULL);
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]2845 timersub(&tv_odd, &tv_even, &tv_delta);
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]2846 for_all_cpus_2(delta_cpu, ODD_COUNTERS, EVEN_COUNTERS);
2847 compute_average(EVEN_COUNTERS);
2848 format_all_counters(EVEN_COUNTERS);
2849 flush_stderr();
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]2850
Justin P. Mattock6eab04a2011-04-08 19:49:08 -0700[diff] [blame]2851 fprintf(stderr, "%.6f sec\n", tv_delta.tv_sec + tv_delta.tv_usec/1000000.0);
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]2852
Len Brownd91bb172012-11-01 00:08:19 -0400[diff] [blame]2853 return status;
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]2854}
2855
Andy Shevchenko3b4d5c72014-01-23 17:13:15 +0200[diff] [blame]2856int get_and_dump_counters(void)
2857{
2858 int status;
2859
2860 status = for_all_cpus(get_counters, ODD_COUNTERS);
2861 if (status)
2862 return status;
2863
2864 status = for_all_cpus(dump_counters, ODD_COUNTERS);
2865 if (status)
2866 return status;
2867
2868 flush_stdout();
2869
2870 return status;
2871}
2872
Len Brownd8af6f52015-02-10 01:56:38 -0500[diff] [blame]2873void print_version() {
Len Brown8a5bdf42015-04-01 21:02:57 -0400[diff] [blame^]2874 fprintf(stderr, "turbostat version 4.4 2 Apr, 2015"
Len Brownd8af6f52015-02-10 01:56:38 -0500[diff] [blame]2875 " - Len Brown <lenb@kernel.org>\n");
2876}
2877
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]2878void cmdline(int argc, char **argv)
2879{
2880 int opt;
Len Brownd8af6f52015-02-10 01:56:38 -0500[diff] [blame]2881 int option_index = 0;
2882 static struct option long_options[] = {
2883 {"Counter", required_argument, 0, 'C'},
2884 {"counter", required_argument, 0, 'c'},
2885 {"Dump", no_argument, 0, 'D'},
2886 {"debug", no_argument, 0, 'd'},
2887 {"interval", required_argument, 0, 'i'},
2888 {"help", no_argument, 0, 'h'},
2889 {"Joules", no_argument, 0, 'J'},
2890 {"MSR", required_argument, 0, 'M'},
2891 {"msr", required_argument, 0, 'm'},
2892 {"Package", no_argument, 0, 'p'},
2893 {"processor", no_argument, 0, 'p'},
2894 {"Summary", no_argument, 0, 'S'},
2895 {"TCC", required_argument, 0, 'T'},
2896 {"version", no_argument, 0, 'v' },
2897 {0, 0, 0, 0 }
2898 };
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]2899
2900 progname = argv[0];
2901
Len Brownd8af6f52015-02-10 01:56:38 -0500[diff] [blame]2902 while ((opt = getopt_long_only(argc, argv, "C:c:Ddhi:JM:m:PpST:v",
2903 long_options, &option_index)) != -1) {
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]2904 switch (opt) {
Len Brownd8af6f52015-02-10 01:56:38 -0500[diff] [blame]2905 case 'C':
2906 sscanf(optarg, "%x", &extra_delta_offset64);
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]2907 break;
Len Brownf9240812012-10-06 15:26:31 -0400[diff] [blame]2908 case 'c':
Len Brown8e180f32012-09-22 01:25:08 -0400[diff] [blame]2909 sscanf(optarg, "%x", &extra_delta_offset32);
2910 break;
Len Brownd8af6f52015-02-10 01:56:38 -0500[diff] [blame]2911 case 'D':
2912 dump_only++;
Len Brown8e180f32012-09-22 01:25:08 -0400[diff] [blame]2913 break;
Len Brownd8af6f52015-02-10 01:56:38 -0500[diff] [blame]2914 case 'd':
2915 debug++;
Len Brown2f32edf2012-09-21 23:45:46 -0400[diff] [blame]2916 break;
Len Brownd8af6f52015-02-10 01:56:38 -0500[diff] [blame]2917 case 'h':
2918 default:
2919 help();
2920 exit(1);
2921 case 'i':
2922 interval_sec = atoi(optarg);
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]2923 break;
Dirk Brandewie5c56be92013-12-16 10:23:41 -0800[diff] [blame]2924 case 'J':
2925 rapl_joules++;
2926 break;
Len Brownd8af6f52015-02-10 01:56:38 -0500[diff] [blame]2927 case 'M':
2928 sscanf(optarg, "%x", &extra_msr_offset64);
2929 break;
2930 case 'm':
2931 sscanf(optarg, "%x", &extra_msr_offset32);
2932 break;
2933 case 'P':
2934 show_pkg_only++;
2935 break;
2936 case 'p':
2937 show_core_only++;
2938 break;
2939 case 'S':
2940 summary_only++;
2941 break;
2942 case 'T':
2943 tcc_activation_temp_override = atoi(optarg);
2944 break;
2945 case 'v':
2946 print_version();
2947 exit(0);
2948 break;
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]2949 }
2950 }
2951}
2952
2953int main(int argc, char **argv)
2954{
2955 cmdline(argc, argv);
2956
Len Brownd8af6f52015-02-10 01:56:38 -0500[diff] [blame]2957 if (debug)
2958 print_version();
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]2959
2960 turbostat_init();
2961
Andy Shevchenko3b4d5c72014-01-23 17:13:15 +0200[diff] [blame]2962 /* dump counters and exit */
2963 if (dump_only)
2964 return get_and_dump_counters();
2965
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]2966 /*
2967 * if any params left, it must be a command to fork
2968 */
2969 if (argc - optind)
2970 return fork_it(argv + optind);
2971 else
2972 turbostat_loop();
2973
2974 return 0;
2975}