AnilKumar Ch | 32bb00e | 2012-06-22 15:10:49 +0530 | [diff] [blame] | 1 | /* |
| 2 | * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/ |
| 3 | * |
| 4 | * This program is free software; you can redistribute it and/or modify |
| 5 | * it under the terms of the GNU General Public License version 2 as |
| 6 | * published by the Free Software Foundation. |
| 7 | */ |
| 8 | /dts-v1/; |
| 9 | |
Florian Vaussard | eb33ef66 | 2013-06-03 16:12:22 +0200 | [diff] [blame^] | 10 | #include "am33xx.dtsi" |
AnilKumar Ch | 32bb00e | 2012-06-22 15:10:49 +0530 | [diff] [blame] | 11 | |
| 12 | / { |
| 13 | model = "TI AM335x EVM"; |
| 14 | compatible = "ti,am335x-evm", "ti,am33xx"; |
| 15 | |
AnilKumar Ch | efeedcf | 2012-08-31 15:07:20 +0530 | [diff] [blame] | 16 | cpus { |
| 17 | cpu@0 { |
| 18 | cpu0-supply = <&vdd1_reg>; |
| 19 | }; |
| 20 | }; |
| 21 | |
AnilKumar Ch | 32bb00e | 2012-06-22 15:10:49 +0530 | [diff] [blame] | 22 | memory { |
| 23 | device_type = "memory"; |
| 24 | reg = <0x80000000 0x10000000>; /* 256 MB */ |
| 25 | }; |
Vaibhav Hiremath | 53d9103 | 2012-08-15 16:53:25 +0530 | [diff] [blame] | 26 | |
AnilKumar Ch | 5d9b66f | 2012-11-06 19:18:29 +0530 | [diff] [blame] | 27 | am33xx_pinmux: pinmux@44e10800 { |
| 28 | pinctrl-names = "default"; |
Vaibhav Hiremath | 4d92757 | 2013-05-20 18:58:10 +0530 | [diff] [blame] | 29 | pinctrl-0 = <&matrix_keypad_s0 &volume_keys_s0 &clkout2_pin>; |
AnilKumar Ch | 5d9b66f | 2012-11-06 19:18:29 +0530 | [diff] [blame] | 30 | |
| 31 | matrix_keypad_s0: matrix_keypad_s0 { |
| 32 | pinctrl-single,pins = < |
| 33 | 0x54 0x7 /* gpmc_a5.gpio1_21, OUTPUT | MODE7 */ |
| 34 | 0x58 0x7 /* gpmc_a6.gpio1_22, OUTPUT | MODE7 */ |
| 35 | 0x64 0x27 /* gpmc_a9.gpio1_25, INPUT | MODE7 */ |
| 36 | 0x68 0x27 /* gpmc_a10.gpio1_26, INPUT | MODE7 */ |
| 37 | 0x6c 0x27 /* gpmc_a11.gpio1_27, INPUT | MODE7 */ |
| 38 | >; |
| 39 | }; |
AnilKumar Ch | 404aa0d | 2012-11-06 19:18:31 +0530 | [diff] [blame] | 40 | |
| 41 | volume_keys_s0: volume_keys_s0 { |
| 42 | pinctrl-single,pins = < |
| 43 | 0x150 0x27 /* spi0_sclk.gpio0_2, INPUT | MODE7 */ |
| 44 | 0x154 0x27 /* spi0_d0.gpio0_3, INPUT | MODE7 */ |
| 45 | >; |
| 46 | }; |
Vaibhav Hiremath | 3f86644 | 2013-03-26 14:14:01 +0530 | [diff] [blame] | 47 | |
| 48 | i2c0_pins: pinmux_i2c0_pins { |
| 49 | pinctrl-single,pins = < |
| 50 | 0x188 0x30 /* i2c0_sda.i2c0_sda PULLUP | INPUTENABLE | MODE0 */ |
| 51 | 0x18c 0x30 /* i2c0_scl.i2c0_scl PULLUP | INPUTENABLE | MODE0 */ |
| 52 | >; |
| 53 | }; |
| 54 | |
| 55 | i2c1_pins: pinmux_i2c1_pins { |
| 56 | pinctrl-single,pins = < |
| 57 | 0x158 0x32 /* spi0_d1.i2c1_sda PULLUP | INPUTENABLE | MODE2 */ |
| 58 | 0x15c 0x32 /* spi0_cs0.i2c1_scl PULLUP | INPUTENABLE | MODE2 */ |
| 59 | >; |
| 60 | }; |
Vaibhav Hiremath | 9f2fbe1 | 2013-03-27 16:31:34 +0530 | [diff] [blame] | 61 | |
| 62 | uart0_pins: pinmux_uart0_pins { |
| 63 | pinctrl-single,pins = < |
| 64 | 0x170 0x30 /* uart0_rxd.uart0_rxd PULLUP | INPUTENABLE | MODE0 */ |
| 65 | 0x174 0x00 /* uart0_txd.uart0_txd PULLDOWN | MODE0 */ |
| 66 | >; |
| 67 | }; |
Vaibhav Hiremath | 4d92757 | 2013-05-20 18:58:10 +0530 | [diff] [blame] | 68 | |
| 69 | clkout2_pin: pinmux_clkout2_pin { |
| 70 | pinctrl-single,pins = < |
| 71 | 0x1b4 0x03 /* xdma_event_intr1.clkout2 OMAP_MUX_MODE3 | AM33XX_PIN_OUTPUT */ |
| 72 | >; |
| 73 | }; |
Philip Avinash | fdc6a2d | 2013-05-31 13:19:05 +0530 | [diff] [blame] | 74 | |
| 75 | nandflash_pins_s0: nandflash_pins_s0 { |
| 76 | pinctrl-single,pins = < |
| 77 | 0x0 0x30 /* gpmc_ad0.gpmc_ad0, INPUT | PULLUP | MODE0 */ |
| 78 | 0x4 0x30 /* gpmc_ad1.gpmc_ad1, INPUT | PULLUP | MODE0 */ |
| 79 | 0x8 0x30 /* gpmc_ad2.gpmc_ad2, INPUT | PULLUP | MODE0 */ |
| 80 | 0xc 0x30 /* gpmc_ad3.gpmc_ad3, INPUT | PULLUP | MODE0 */ |
| 81 | 0x10 0x30 /* gpmc_ad4.gpmc_ad4, INPUT | PULLUP | MODE0 */ |
| 82 | 0x14 0x30 /* gpmc_ad5.gpmc_ad5, INPUT | PULLUP | MODE0 */ |
| 83 | 0x18 0x30 /* gpmc_ad6.gpmc_ad6, INPUT | PULLUP | MODE0 */ |
| 84 | 0x1c 0x30 /* gpmc_ad7.gpmc_ad7, INPUT | PULLUP | MODE0 */ |
| 85 | 0x70 0x30 /* gpmc_wait0.gpmc_wait0, INPUT | PULLUP | MODE0 */ |
| 86 | 0x74 0x37 /* gpmc_wpn.gpio0_30, INPUT | PULLUP | MODE7 */ |
| 87 | 0x7c 0x8 /* gpmc_csn0.gpmc_csn0, PULL DISA */ |
| 88 | 0x90 0x8 /* gpmc_advn_ale.gpmc_advn_ale, PULL DISA */ |
| 89 | 0x94 0x8 /* gpmc_oen_ren.gpmc_oen_ren, PULL DISA */ |
| 90 | 0x98 0x8 /* gpmc_wen.gpmc_wen, PULL DISA */ |
| 91 | 0x9c 0x8 /* gpmc_be0n_cle.gpmc_be0n_cle, PULL DISA */ |
| 92 | >; |
| 93 | }; |
AnilKumar Ch | 5d9b66f | 2012-11-06 19:18:29 +0530 | [diff] [blame] | 94 | }; |
| 95 | |
Vaibhav Hiremath | 53d9103 | 2012-08-15 16:53:25 +0530 | [diff] [blame] | 96 | ocp { |
Vaibhav Hiremath | dde3b0d | 2013-03-28 11:36:05 +0530 | [diff] [blame] | 97 | uart0: serial@44e09000 { |
Vaibhav Hiremath | 9f2fbe1 | 2013-03-27 16:31:34 +0530 | [diff] [blame] | 98 | pinctrl-names = "default"; |
| 99 | pinctrl-0 = <&uart0_pins>; |
| 100 | |
Vaibhav Hiremath | 53d9103 | 2012-08-15 16:53:25 +0530 | [diff] [blame] | 101 | status = "okay"; |
| 102 | }; |
AnilKumar Ch | 1b2a970 | 2012-08-21 16:47:29 +0530 | [diff] [blame] | 103 | |
AnilKumar Ch | b918e2c | 2012-11-21 17:22:17 +0530 | [diff] [blame] | 104 | i2c0: i2c@44e0b000 { |
Vaibhav Hiremath | 3f86644 | 2013-03-26 14:14:01 +0530 | [diff] [blame] | 105 | pinctrl-names = "default"; |
| 106 | pinctrl-0 = <&i2c0_pins>; |
| 107 | |
AnilKumar Ch | 1b2a970 | 2012-08-21 16:47:29 +0530 | [diff] [blame] | 108 | status = "okay"; |
| 109 | clock-frequency = <400000>; |
| 110 | |
Vaibhav Hiremath | 5d83cb8 | 2012-08-27 16:59:08 +0530 | [diff] [blame] | 111 | tps: tps@2d { |
| 112 | reg = <0x2d>; |
AnilKumar Ch | 1b2a970 | 2012-08-21 16:47:29 +0530 | [diff] [blame] | 113 | }; |
| 114 | }; |
AnilKumar Ch | 492dd02 | 2012-09-20 02:49:29 +0530 | [diff] [blame] | 115 | |
AnilKumar Ch | b918e2c | 2012-11-21 17:22:17 +0530 | [diff] [blame] | 116 | i2c1: i2c@4802a000 { |
Vaibhav Hiremath | 3f86644 | 2013-03-26 14:14:01 +0530 | [diff] [blame] | 117 | pinctrl-names = "default"; |
| 118 | pinctrl-0 = <&i2c1_pins>; |
| 119 | |
AnilKumar Ch | 492dd02 | 2012-09-20 02:49:29 +0530 | [diff] [blame] | 120 | status = "okay"; |
AnilKumar Ch | cd5cfac | 2012-09-21 21:19:11 +0530 | [diff] [blame] | 121 | clock-frequency = <100000>; |
AnilKumar Ch | 492dd02 | 2012-09-20 02:49:29 +0530 | [diff] [blame] | 122 | |
| 123 | lis331dlh: lis331dlh@18 { |
| 124 | compatible = "st,lis331dlh", "st,lis3lv02d"; |
| 125 | reg = <0x18>; |
| 126 | Vdd-supply = <&lis3_reg>; |
| 127 | Vdd_IO-supply = <&lis3_reg>; |
| 128 | |
| 129 | st,click-single-x; |
| 130 | st,click-single-y; |
| 131 | st,click-single-z; |
| 132 | st,click-thresh-x = <10>; |
| 133 | st,click-thresh-y = <10>; |
| 134 | st,click-thresh-z = <10>; |
| 135 | st,irq1-click; |
| 136 | st,irq2-click; |
| 137 | st,wakeup-x-lo; |
| 138 | st,wakeup-x-hi; |
| 139 | st,wakeup-y-lo; |
| 140 | st,wakeup-y-hi; |
| 141 | st,wakeup-z-lo; |
| 142 | st,wakeup-z-hi; |
| 143 | st,min-limit-x = <120>; |
| 144 | st,min-limit-y = <120>; |
| 145 | st,min-limit-z = <140>; |
| 146 | st,max-limit-x = <550>; |
| 147 | st,max-limit-y = <550>; |
| 148 | st,max-limit-z = <750>; |
| 149 | }; |
AnilKumar Ch | bf07855 | 2012-09-20 02:49:30 +0530 | [diff] [blame] | 150 | |
AnilKumar Ch | cd5cfac | 2012-09-21 21:19:11 +0530 | [diff] [blame] | 151 | tsl2550: tsl2550@39 { |
| 152 | compatible = "taos,tsl2550"; |
| 153 | reg = <0x39>; |
| 154 | }; |
| 155 | |
AnilKumar Ch | bf07855 | 2012-09-20 02:49:30 +0530 | [diff] [blame] | 156 | tmp275: tmp275@48 { |
| 157 | compatible = "ti,tmp275"; |
| 158 | reg = <0x48>; |
| 159 | }; |
AnilKumar Ch | 492dd02 | 2012-09-20 02:49:29 +0530 | [diff] [blame] | 160 | }; |
Philip Avinash | fdc6a2d | 2013-05-31 13:19:05 +0530 | [diff] [blame] | 161 | |
| 162 | elm: elm@48080000 { |
| 163 | status = "okay"; |
| 164 | }; |
| 165 | |
| 166 | gpmc: gpmc@50000000 { |
| 167 | status = "okay"; |
| 168 | pinctrl-names = "default"; |
| 169 | pinctrl-0 = <&nandflash_pins_s0>; |
| 170 | ranges = <0 0 0x08000000 0x10000000>; /* CS0: NAND */ |
| 171 | nand@0,0 { |
| 172 | reg = <0 0 0>; /* CS0, offset 0 */ |
| 173 | nand-bus-width = <8>; |
| 174 | ti,nand-ecc-opt = "bch8"; |
| 175 | gpmc,device-nand = "true"; |
| 176 | gpmc,device-width = <1>; |
| 177 | gpmc,sync-clk-ps = <0>; |
| 178 | gpmc,cs-on-ns = <0>; |
| 179 | gpmc,cs-rd-off-ns = <44>; |
| 180 | gpmc,cs-wr-off-ns = <44>; |
| 181 | gpmc,adv-on-ns = <6>; |
| 182 | gpmc,adv-rd-off-ns = <34>; |
| 183 | gpmc,adv-wr-off-ns = <44>; |
| 184 | gpmc,we-on-ns = <0>; |
| 185 | gpmc,we-off-ns = <40>; |
| 186 | gpmc,oe-on-ns = <0>; |
| 187 | gpmc,oe-off-ns = <54>; |
| 188 | gpmc,access-ns = <64>; |
| 189 | gpmc,rd-cycle-ns = <82>; |
| 190 | gpmc,wr-cycle-ns = <82>; |
| 191 | gpmc,wait-on-read = "true"; |
| 192 | gpmc,wait-on-write = "true"; |
| 193 | gpmc,bus-turnaround-ns = <0>; |
| 194 | gpmc,cycle2cycle-delay-ns = <0>; |
| 195 | gpmc,clk-activation-ns = <0>; |
| 196 | gpmc,wait-monitoring-ns = <0>; |
| 197 | gpmc,wr-access-ns = <40>; |
| 198 | gpmc,wr-data-mux-bus-ns = <0>; |
| 199 | |
| 200 | #address-cells = <1>; |
| 201 | #size-cells = <1>; |
| 202 | elm_id = <&elm>; |
| 203 | |
| 204 | /* MTD partition table */ |
| 205 | partition@0 { |
| 206 | label = "SPL1"; |
| 207 | reg = <0x00000000 0x000020000>; |
| 208 | }; |
| 209 | |
| 210 | partition@1 { |
| 211 | label = "SPL2"; |
| 212 | reg = <0x00020000 0x00020000>; |
| 213 | }; |
| 214 | |
| 215 | partition@2 { |
| 216 | label = "SPL3"; |
| 217 | reg = <0x00040000 0x00020000>; |
| 218 | }; |
| 219 | |
| 220 | partition@3 { |
| 221 | label = "SPL4"; |
| 222 | reg = <0x00060000 0x00020000>; |
| 223 | }; |
| 224 | |
| 225 | partition@4 { |
| 226 | label = "U-boot"; |
| 227 | reg = <0x00080000 0x001e0000>; |
| 228 | }; |
| 229 | |
| 230 | partition@5 { |
| 231 | label = "environment"; |
| 232 | reg = <0x00260000 0x00020000>; |
| 233 | }; |
| 234 | |
| 235 | partition@6 { |
| 236 | label = "Kernel"; |
| 237 | reg = <0x00280000 0x00500000>; |
| 238 | }; |
| 239 | |
| 240 | partition@7 { |
| 241 | label = "File-System"; |
| 242 | reg = <0x00780000 0x0F880000>; |
| 243 | }; |
| 244 | }; |
| 245 | }; |
AnilKumar Ch | 1b2a970 | 2012-08-21 16:47:29 +0530 | [diff] [blame] | 246 | }; |
| 247 | |
| 248 | vbat: fixedregulator@0 { |
| 249 | compatible = "regulator-fixed"; |
| 250 | regulator-name = "vbat"; |
| 251 | regulator-min-microvolt = <5000000>; |
| 252 | regulator-max-microvolt = <5000000>; |
| 253 | regulator-boot-on; |
| 254 | }; |
AnilKumar Ch | 492dd02 | 2012-09-20 02:49:29 +0530 | [diff] [blame] | 255 | |
| 256 | lis3_reg: fixedregulator@1 { |
| 257 | compatible = "regulator-fixed"; |
| 258 | regulator-name = "lis3_reg"; |
| 259 | regulator-boot-on; |
| 260 | }; |
AnilKumar Ch | 2ca1d31 | 2012-11-06 19:18:30 +0530 | [diff] [blame] | 261 | |
| 262 | matrix_keypad: matrix_keypad@0 { |
| 263 | compatible = "gpio-matrix-keypad"; |
| 264 | debounce-delay-ms = <5>; |
| 265 | col-scan-delay-us = <2>; |
| 266 | |
AnilKumar Ch | b918e2c | 2012-11-21 17:22:17 +0530 | [diff] [blame] | 267 | row-gpios = <&gpio1 25 0 /* Bank1, pin25 */ |
| 268 | &gpio1 26 0 /* Bank1, pin26 */ |
| 269 | &gpio1 27 0>; /* Bank1, pin27 */ |
AnilKumar Ch | 2ca1d31 | 2012-11-06 19:18:30 +0530 | [diff] [blame] | 270 | |
AnilKumar Ch | b918e2c | 2012-11-21 17:22:17 +0530 | [diff] [blame] | 271 | col-gpios = <&gpio1 21 0 /* Bank1, pin21 */ |
| 272 | &gpio1 22 0>; /* Bank1, pin22 */ |
AnilKumar Ch | 2ca1d31 | 2012-11-06 19:18:30 +0530 | [diff] [blame] | 273 | |
| 274 | linux,keymap = <0x0000008b /* MENU */ |
| 275 | 0x0100009e /* BACK */ |
| 276 | 0x02000069 /* LEFT */ |
| 277 | 0x0001006a /* RIGHT */ |
| 278 | 0x0101001c /* ENTER */ |
| 279 | 0x0201006c>; /* DOWN */ |
| 280 | }; |
AnilKumar Ch | 822c993 | 2012-11-06 19:18:32 +0530 | [diff] [blame] | 281 | |
| 282 | gpio_keys: volume_keys@0 { |
| 283 | compatible = "gpio-keys"; |
| 284 | #address-cells = <1>; |
| 285 | #size-cells = <0>; |
| 286 | autorepeat; |
| 287 | |
| 288 | switch@9 { |
| 289 | label = "volume-up"; |
| 290 | linux,code = <115>; |
AnilKumar Ch | b918e2c | 2012-11-21 17:22:17 +0530 | [diff] [blame] | 291 | gpios = <&gpio0 2 1>; |
AnilKumar Ch | 822c993 | 2012-11-06 19:18:32 +0530 | [diff] [blame] | 292 | gpio-key,wakeup; |
| 293 | }; |
| 294 | |
| 295 | switch@10 { |
| 296 | label = "volume-down"; |
| 297 | linux,code = <114>; |
AnilKumar Ch | b918e2c | 2012-11-21 17:22:17 +0530 | [diff] [blame] | 298 | gpios = <&gpio0 3 1>; |
AnilKumar Ch | 822c993 | 2012-11-06 19:18:32 +0530 | [diff] [blame] | 299 | gpio-key,wakeup; |
| 300 | }; |
| 301 | }; |
AnilKumar Ch | 1b2a970 | 2012-08-21 16:47:29 +0530 | [diff] [blame] | 302 | }; |
| 303 | |
Florian Vaussard | eb33ef66 | 2013-06-03 16:12:22 +0200 | [diff] [blame^] | 304 | #include "tps65910.dtsi" |
AnilKumar Ch | 1b2a970 | 2012-08-21 16:47:29 +0530 | [diff] [blame] | 305 | |
| 306 | &tps { |
| 307 | vcc1-supply = <&vbat>; |
| 308 | vcc2-supply = <&vbat>; |
| 309 | vcc3-supply = <&vbat>; |
| 310 | vcc4-supply = <&vbat>; |
| 311 | vcc5-supply = <&vbat>; |
| 312 | vcc6-supply = <&vbat>; |
| 313 | vcc7-supply = <&vbat>; |
| 314 | vccio-supply = <&vbat>; |
| 315 | |
| 316 | regulators { |
| 317 | vrtc_reg: regulator@0 { |
| 318 | regulator-always-on; |
| 319 | }; |
| 320 | |
| 321 | vio_reg: regulator@1 { |
| 322 | regulator-always-on; |
| 323 | }; |
| 324 | |
| 325 | vdd1_reg: regulator@2 { |
| 326 | /* VDD_MPU voltage limits 0.95V - 1.26V with +/-4% tolerance */ |
| 327 | regulator-name = "vdd_mpu"; |
| 328 | regulator-min-microvolt = <912500>; |
| 329 | regulator-max-microvolt = <1312500>; |
| 330 | regulator-boot-on; |
| 331 | regulator-always-on; |
| 332 | }; |
| 333 | |
| 334 | vdd2_reg: regulator@3 { |
| 335 | /* VDD_CORE voltage limits 0.95V - 1.1V with +/-4% tolerance */ |
| 336 | regulator-name = "vdd_core"; |
| 337 | regulator-min-microvolt = <912500>; |
| 338 | regulator-max-microvolt = <1150000>; |
| 339 | regulator-boot-on; |
| 340 | regulator-always-on; |
| 341 | }; |
| 342 | |
| 343 | vdd3_reg: regulator@4 { |
| 344 | regulator-always-on; |
| 345 | }; |
| 346 | |
| 347 | vdig1_reg: regulator@5 { |
| 348 | regulator-always-on; |
| 349 | }; |
| 350 | |
| 351 | vdig2_reg: regulator@6 { |
| 352 | regulator-always-on; |
| 353 | }; |
| 354 | |
| 355 | vpll_reg: regulator@7 { |
| 356 | regulator-always-on; |
| 357 | }; |
| 358 | |
| 359 | vdac_reg: regulator@8 { |
| 360 | regulator-always-on; |
| 361 | }; |
| 362 | |
| 363 | vaux1_reg: regulator@9 { |
| 364 | regulator-always-on; |
| 365 | }; |
| 366 | |
| 367 | vaux2_reg: regulator@10 { |
| 368 | regulator-always-on; |
| 369 | }; |
| 370 | |
| 371 | vaux33_reg: regulator@11 { |
| 372 | regulator-always-on; |
| 373 | }; |
| 374 | |
| 375 | vmmc_reg: regulator@12 { |
| 376 | regulator-always-on; |
| 377 | }; |
Vaibhav Hiremath | 53d9103 | 2012-08-15 16:53:25 +0530 | [diff] [blame] | 378 | }; |
AnilKumar Ch | 32bb00e | 2012-06-22 15:10:49 +0530 | [diff] [blame] | 379 | }; |
Mugunthan V N | 1a39a65 | 2012-11-14 09:08:00 +0000 | [diff] [blame] | 380 | |
| 381 | &cpsw_emac0 { |
| 382 | phy_id = <&davinci_mdio>, <0>; |
| 383 | }; |
| 384 | |
| 385 | &cpsw_emac1 { |
| 386 | phy_id = <&davinci_mdio>, <1>; |
| 387 | }; |