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Carlo Caionecfb61a42014-05-01 14:29:27 +02001/*
2 * Functions and registers to access AXP20X power management chip.
3 *
4 * Copyright (C) 2013, Carlo Caione <carlo@caione.org>
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 */
10
11#ifndef __LINUX_MFD_AXP20X_H
12#define __LINUX_MFD_AXP20X_H
13
Hans de Goede69fb4dc2015-08-01 10:39:38 +020014#include <linux/regmap.h>
15
Carlo Caionecfb61a42014-05-01 14:29:27 +020016enum {
Michal Suchanekd8d79f82015-07-11 14:59:56 +020017 AXP152_ID = 0,
18 AXP202_ID,
Carlo Caionecfb61a42014-05-01 14:29:27 +020019 AXP209_ID,
Boris BREZILLONf05be582015-04-10 12:09:01 +080020 AXP221_ID,
Chen-Yu Tsai02071f02016-02-12 10:02:44 +080021 AXP223_ID,
Jacob Panaf7e9062014-10-06 21:17:14 -070022 AXP288_ID,
23 NR_AXP20X_VARIANTS,
Carlo Caionecfb61a42014-05-01 14:29:27 +020024};
25
26#define AXP20X_DATACACHE(m) (0x04 + (m))
27
28/* Power supply */
Michal Suchanekd8d79f82015-07-11 14:59:56 +020029#define AXP152_PWR_OP_MODE 0x01
30#define AXP152_LDO3456_DC1234_CTRL 0x12
31#define AXP152_ALDO_OP_MODE 0x13
32#define AXP152_LDO0_CTRL 0x15
33#define AXP152_DCDC2_V_OUT 0x23
34#define AXP152_DCDC2_V_SCAL 0x25
35#define AXP152_DCDC1_V_OUT 0x26
36#define AXP152_DCDC3_V_OUT 0x27
37#define AXP152_ALDO12_V_OUT 0x28
38#define AXP152_DLDO1_V_OUT 0x29
39#define AXP152_DLDO2_V_OUT 0x2a
40#define AXP152_DCDC4_V_OUT 0x2b
41#define AXP152_V_OFF 0x31
42#define AXP152_OFF_CTRL 0x32
43#define AXP152_PEK_KEY 0x36
44#define AXP152_DCDC_FREQ 0x37
45#define AXP152_DCDC_MODE 0x80
46
Carlo Caionecfb61a42014-05-01 14:29:27 +020047#define AXP20X_PWR_INPUT_STATUS 0x00
48#define AXP20X_PWR_OP_MODE 0x01
49#define AXP20X_USB_OTG_STATUS 0x02
50#define AXP20X_PWR_OUT_CTRL 0x12
51#define AXP20X_DCDC2_V_OUT 0x23
52#define AXP20X_DCDC2_LDO3_V_SCAL 0x25
53#define AXP20X_DCDC3_V_OUT 0x27
54#define AXP20X_LDO24_V_OUT 0x28
55#define AXP20X_LDO3_V_OUT 0x29
56#define AXP20X_VBUS_IPSOUT_MGMT 0x30
57#define AXP20X_V_OFF 0x31
58#define AXP20X_OFF_CTRL 0x32
59#define AXP20X_CHRG_CTRL1 0x33
60#define AXP20X_CHRG_CTRL2 0x34
61#define AXP20X_CHRG_BAK_CTRL 0x35
62#define AXP20X_PEK_KEY 0x36
63#define AXP20X_DCDC_FREQ 0x37
64#define AXP20X_V_LTF_CHRG 0x38
65#define AXP20X_V_HTF_CHRG 0x39
66#define AXP20X_APS_WARN_L1 0x3a
67#define AXP20X_APS_WARN_L2 0x3b
68#define AXP20X_V_LTF_DISCHRG 0x3c
69#define AXP20X_V_HTF_DISCHRG 0x3d
70
Boris BREZILLONf05be582015-04-10 12:09:01 +080071#define AXP22X_PWR_OUT_CTRL1 0x10
72#define AXP22X_PWR_OUT_CTRL2 0x12
73#define AXP22X_PWR_OUT_CTRL3 0x13
74#define AXP22X_DLDO1_V_OUT 0x15
75#define AXP22X_DLDO2_V_OUT 0x16
76#define AXP22X_DLDO3_V_OUT 0x17
77#define AXP22X_DLDO4_V_OUT 0x18
78#define AXP22X_ELDO1_V_OUT 0x19
79#define AXP22X_ELDO2_V_OUT 0x1a
80#define AXP22X_ELDO3_V_OUT 0x1b
81#define AXP22X_DC5LDO_V_OUT 0x1c
82#define AXP22X_DCDC1_V_OUT 0x21
83#define AXP22X_DCDC2_V_OUT 0x22
84#define AXP22X_DCDC3_V_OUT 0x23
85#define AXP22X_DCDC4_V_OUT 0x24
86#define AXP22X_DCDC5_V_OUT 0x25
87#define AXP22X_DCDC23_V_RAMP_CTRL 0x27
88#define AXP22X_ALDO1_V_OUT 0x28
89#define AXP22X_ALDO2_V_OUT 0x29
90#define AXP22X_ALDO3_V_OUT 0x2a
91#define AXP22X_CHRG_CTRL3 0x35
92
Carlo Caionecfb61a42014-05-01 14:29:27 +020093/* Interrupt */
Michal Suchanekd8d79f82015-07-11 14:59:56 +020094#define AXP152_IRQ1_EN 0x40
95#define AXP152_IRQ2_EN 0x41
96#define AXP152_IRQ3_EN 0x42
97#define AXP152_IRQ1_STATE 0x48
98#define AXP152_IRQ2_STATE 0x49
99#define AXP152_IRQ3_STATE 0x4a
100
Carlo Caionecfb61a42014-05-01 14:29:27 +0200101#define AXP20X_IRQ1_EN 0x40
102#define AXP20X_IRQ2_EN 0x41
103#define AXP20X_IRQ3_EN 0x42
104#define AXP20X_IRQ4_EN 0x43
105#define AXP20X_IRQ5_EN 0x44
Jacob Panaf7e9062014-10-06 21:17:14 -0700106#define AXP20X_IRQ6_EN 0x45
Carlo Caionecfb61a42014-05-01 14:29:27 +0200107#define AXP20X_IRQ1_STATE 0x48
108#define AXP20X_IRQ2_STATE 0x49
109#define AXP20X_IRQ3_STATE 0x4a
110#define AXP20X_IRQ4_STATE 0x4b
111#define AXP20X_IRQ5_STATE 0x4c
Jacob Panaf7e9062014-10-06 21:17:14 -0700112#define AXP20X_IRQ6_STATE 0x4d
Carlo Caionecfb61a42014-05-01 14:29:27 +0200113
114/* ADC */
115#define AXP20X_ACIN_V_ADC_H 0x56
116#define AXP20X_ACIN_V_ADC_L 0x57
117#define AXP20X_ACIN_I_ADC_H 0x58
118#define AXP20X_ACIN_I_ADC_L 0x59
119#define AXP20X_VBUS_V_ADC_H 0x5a
120#define AXP20X_VBUS_V_ADC_L 0x5b
121#define AXP20X_VBUS_I_ADC_H 0x5c
122#define AXP20X_VBUS_I_ADC_L 0x5d
123#define AXP20X_TEMP_ADC_H 0x5e
124#define AXP20X_TEMP_ADC_L 0x5f
125#define AXP20X_TS_IN_H 0x62
126#define AXP20X_TS_IN_L 0x63
127#define AXP20X_GPIO0_V_ADC_H 0x64
128#define AXP20X_GPIO0_V_ADC_L 0x65
129#define AXP20X_GPIO1_V_ADC_H 0x66
130#define AXP20X_GPIO1_V_ADC_L 0x67
131#define AXP20X_PWR_BATT_H 0x70
132#define AXP20X_PWR_BATT_M 0x71
133#define AXP20X_PWR_BATT_L 0x72
134#define AXP20X_BATT_V_H 0x78
135#define AXP20X_BATT_V_L 0x79
136#define AXP20X_BATT_CHRG_I_H 0x7a
137#define AXP20X_BATT_CHRG_I_L 0x7b
138#define AXP20X_BATT_DISCHRG_I_H 0x7c
139#define AXP20X_BATT_DISCHRG_I_L 0x7d
140#define AXP20X_IPSOUT_V_HIGH_H 0x7e
141#define AXP20X_IPSOUT_V_HIGH_L 0x7f
142
143/* Power supply */
144#define AXP20X_DCDC_MODE 0x80
145#define AXP20X_ADC_EN1 0x82
146#define AXP20X_ADC_EN2 0x83
147#define AXP20X_ADC_RATE 0x84
148#define AXP20X_GPIO10_IN_RANGE 0x85
149#define AXP20X_GPIO1_ADC_IRQ_RIS 0x86
150#define AXP20X_GPIO1_ADC_IRQ_FAL 0x87
151#define AXP20X_TIMER_CTRL 0x8a
152#define AXP20X_VBUS_MON 0x8b
153#define AXP20X_OVER_TMP 0x8f
154
Boris BREZILLONf05be582015-04-10 12:09:01 +0800155#define AXP22X_PWREN_CTRL1 0x8c
156#define AXP22X_PWREN_CTRL2 0x8d
157
Carlo Caionecfb61a42014-05-01 14:29:27 +0200158/* GPIO */
Michal Suchanekd8d79f82015-07-11 14:59:56 +0200159#define AXP152_GPIO0_CTRL 0x90
160#define AXP152_GPIO1_CTRL 0x91
161#define AXP152_GPIO2_CTRL 0x92
162#define AXP152_GPIO3_CTRL 0x93
163#define AXP152_LDOGPIO2_V_OUT 0x96
164#define AXP152_GPIO_INPUT 0x97
165#define AXP152_PWM0_FREQ_X 0x98
166#define AXP152_PWM0_FREQ_Y 0x99
167#define AXP152_PWM0_DUTY_CYCLE 0x9a
168#define AXP152_PWM1_FREQ_X 0x9b
169#define AXP152_PWM1_FREQ_Y 0x9c
170#define AXP152_PWM1_DUTY_CYCLE 0x9d
171
Carlo Caionecfb61a42014-05-01 14:29:27 +0200172#define AXP20X_GPIO0_CTRL 0x90
173#define AXP20X_LDO5_V_OUT 0x91
174#define AXP20X_GPIO1_CTRL 0x92
175#define AXP20X_GPIO2_CTRL 0x93
176#define AXP20X_GPIO20_SS 0x94
177#define AXP20X_GPIO3_CTRL 0x95
178
Boris BREZILLONf05be582015-04-10 12:09:01 +0800179#define AXP22X_LDO_IO0_V_OUT 0x91
180#define AXP22X_LDO_IO1_V_OUT 0x93
181#define AXP22X_GPIO_STATE 0x94
182#define AXP22X_GPIO_PULL_DOWN 0x95
183
Carlo Caionecfb61a42014-05-01 14:29:27 +0200184/* Battery */
185#define AXP20X_CHRG_CC_31_24 0xb0
186#define AXP20X_CHRG_CC_23_16 0xb1
187#define AXP20X_CHRG_CC_15_8 0xb2
188#define AXP20X_CHRG_CC_7_0 0xb3
189#define AXP20X_DISCHRG_CC_31_24 0xb4
190#define AXP20X_DISCHRG_CC_23_16 0xb5
191#define AXP20X_DISCHRG_CC_15_8 0xb6
192#define AXP20X_DISCHRG_CC_7_0 0xb7
193#define AXP20X_CC_CTRL 0xb8
194#define AXP20X_FG_RES 0xb9
195
Bruno Prémont553ed4b2015-08-08 17:58:40 +0200196/* OCV */
197#define AXP20X_RDC_H 0xba
198#define AXP20X_RDC_L 0xbb
199#define AXP20X_OCV(m) (0xc0 + (m))
200#define AXP20X_OCV_MAX 0xf
201
Boris BREZILLONf05be582015-04-10 12:09:01 +0800202/* AXP22X specific registers */
203#define AXP22X_BATLOW_THRES1 0xe6
204
Jacob Panaf7e9062014-10-06 21:17:14 -0700205/* AXP288 specific registers */
206#define AXP288_PMIC_ADC_H 0x56
207#define AXP288_PMIC_ADC_L 0x57
208#define AXP288_ADC_TS_PIN_CTRL 0x84
Jacob Panaf7e9062014-10-06 21:17:14 -0700209#define AXP288_PMIC_ADC_EN 0x84
Jacob Panaf7e9062014-10-06 21:17:14 -0700210
Todd E Brandt774e0b42015-01-07 13:25:52 -0800211/* Fuel Gauge */
212#define AXP288_FG_RDC1_REG 0xba
213#define AXP288_FG_RDC0_REG 0xbb
214#define AXP288_FG_OCVH_REG 0xbc
215#define AXP288_FG_OCVL_REG 0xbd
216#define AXP288_FG_OCV_CURVE_REG 0xc0
217#define AXP288_FG_DES_CAP1_REG 0xe0
218#define AXP288_FG_DES_CAP0_REG 0xe1
219#define AXP288_FG_CC_MTR1_REG 0xe2
220#define AXP288_FG_CC_MTR0_REG 0xe3
221#define AXP288_FG_OCV_CAP_REG 0xe4
222#define AXP288_FG_CC_CAP_REG 0xe5
223#define AXP288_FG_LOW_CAP_REG 0xe6
224#define AXP288_FG_TUNE0 0xe8
225#define AXP288_FG_TUNE1 0xe9
226#define AXP288_FG_TUNE2 0xea
227#define AXP288_FG_TUNE3 0xeb
228#define AXP288_FG_TUNE4 0xec
229#define AXP288_FG_TUNE5 0xed
Jacob Panaf7e9062014-10-06 21:17:14 -0700230
Carlo Caionecfb61a42014-05-01 14:29:27 +0200231/* Regulators IDs */
232enum {
233 AXP20X_LDO1 = 0,
234 AXP20X_LDO2,
235 AXP20X_LDO3,
236 AXP20X_LDO4,
237 AXP20X_LDO5,
238 AXP20X_DCDC2,
239 AXP20X_DCDC3,
240 AXP20X_REG_ID_MAX,
241};
242
Boris BREZILLONf05be582015-04-10 12:09:01 +0800243enum {
244 AXP22X_DCDC1 = 0,
245 AXP22X_DCDC2,
246 AXP22X_DCDC3,
247 AXP22X_DCDC4,
248 AXP22X_DCDC5,
249 AXP22X_DC1SW,
250 AXP22X_DC5LDO,
251 AXP22X_ALDO1,
252 AXP22X_ALDO2,
253 AXP22X_ALDO3,
254 AXP22X_ELDO1,
255 AXP22X_ELDO2,
256 AXP22X_ELDO3,
257 AXP22X_DLDO1,
258 AXP22X_DLDO2,
259 AXP22X_DLDO3,
260 AXP22X_DLDO4,
261 AXP22X_RTC_LDO,
262 AXP22X_LDO_IO0,
263 AXP22X_LDO_IO1,
264 AXP22X_REG_ID_MAX,
265};
266
Carlo Caionecfb61a42014-05-01 14:29:27 +0200267/* IRQs */
268enum {
Michal Suchanekd8d79f82015-07-11 14:59:56 +0200269 AXP152_IRQ_LDO0IN_CONNECT = 1,
270 AXP152_IRQ_LDO0IN_REMOVAL,
271 AXP152_IRQ_ALDO0IN_CONNECT,
272 AXP152_IRQ_ALDO0IN_REMOVAL,
273 AXP152_IRQ_DCDC1_V_LOW,
274 AXP152_IRQ_DCDC2_V_LOW,
275 AXP152_IRQ_DCDC3_V_LOW,
276 AXP152_IRQ_DCDC4_V_LOW,
277 AXP152_IRQ_PEK_SHORT,
278 AXP152_IRQ_PEK_LONG,
279 AXP152_IRQ_TIMER,
280 AXP152_IRQ_PEK_RIS_EDGE,
281 AXP152_IRQ_PEK_FAL_EDGE,
282 AXP152_IRQ_GPIO3_INPUT,
283 AXP152_IRQ_GPIO2_INPUT,
284 AXP152_IRQ_GPIO1_INPUT,
285 AXP152_IRQ_GPIO0_INPUT,
286};
287
288enum {
Carlo Caionecfb61a42014-05-01 14:29:27 +0200289 AXP20X_IRQ_ACIN_OVER_V = 1,
290 AXP20X_IRQ_ACIN_PLUGIN,
291 AXP20X_IRQ_ACIN_REMOVAL,
292 AXP20X_IRQ_VBUS_OVER_V,
293 AXP20X_IRQ_VBUS_PLUGIN,
294 AXP20X_IRQ_VBUS_REMOVAL,
295 AXP20X_IRQ_VBUS_V_LOW,
296 AXP20X_IRQ_BATT_PLUGIN,
297 AXP20X_IRQ_BATT_REMOVAL,
298 AXP20X_IRQ_BATT_ENT_ACT_MODE,
299 AXP20X_IRQ_BATT_EXIT_ACT_MODE,
300 AXP20X_IRQ_CHARG,
301 AXP20X_IRQ_CHARG_DONE,
302 AXP20X_IRQ_BATT_TEMP_HIGH,
303 AXP20X_IRQ_BATT_TEMP_LOW,
304 AXP20X_IRQ_DIE_TEMP_HIGH,
305 AXP20X_IRQ_CHARG_I_LOW,
306 AXP20X_IRQ_DCDC1_V_LONG,
307 AXP20X_IRQ_DCDC2_V_LONG,
308 AXP20X_IRQ_DCDC3_V_LONG,
309 AXP20X_IRQ_PEK_SHORT = 22,
310 AXP20X_IRQ_PEK_LONG,
311 AXP20X_IRQ_N_OE_PWR_ON,
312 AXP20X_IRQ_N_OE_PWR_OFF,
313 AXP20X_IRQ_VBUS_VALID,
314 AXP20X_IRQ_VBUS_NOT_VALID,
315 AXP20X_IRQ_VBUS_SESS_VALID,
316 AXP20X_IRQ_VBUS_SESS_END,
317 AXP20X_IRQ_LOW_PWR_LVL1,
318 AXP20X_IRQ_LOW_PWR_LVL2,
319 AXP20X_IRQ_TIMER,
320 AXP20X_IRQ_PEK_RIS_EDGE,
321 AXP20X_IRQ_PEK_FAL_EDGE,
322 AXP20X_IRQ_GPIO3_INPUT,
323 AXP20X_IRQ_GPIO2_INPUT,
324 AXP20X_IRQ_GPIO1_INPUT,
325 AXP20X_IRQ_GPIO0_INPUT,
326};
327
Boris BREZILLONf05be582015-04-10 12:09:01 +0800328enum axp22x_irqs {
329 AXP22X_IRQ_ACIN_OVER_V = 1,
330 AXP22X_IRQ_ACIN_PLUGIN,
331 AXP22X_IRQ_ACIN_REMOVAL,
332 AXP22X_IRQ_VBUS_OVER_V,
333 AXP22X_IRQ_VBUS_PLUGIN,
334 AXP22X_IRQ_VBUS_REMOVAL,
335 AXP22X_IRQ_VBUS_V_LOW,
336 AXP22X_IRQ_BATT_PLUGIN,
337 AXP22X_IRQ_BATT_REMOVAL,
338 AXP22X_IRQ_BATT_ENT_ACT_MODE,
339 AXP22X_IRQ_BATT_EXIT_ACT_MODE,
340 AXP22X_IRQ_CHARG,
341 AXP22X_IRQ_CHARG_DONE,
342 AXP22X_IRQ_BATT_TEMP_HIGH,
343 AXP22X_IRQ_BATT_TEMP_LOW,
344 AXP22X_IRQ_DIE_TEMP_HIGH,
345 AXP22X_IRQ_PEK_SHORT,
346 AXP22X_IRQ_PEK_LONG,
347 AXP22X_IRQ_LOW_PWR_LVL1,
348 AXP22X_IRQ_LOW_PWR_LVL2,
349 AXP22X_IRQ_TIMER,
350 AXP22X_IRQ_PEK_RIS_EDGE,
351 AXP22X_IRQ_PEK_FAL_EDGE,
352 AXP22X_IRQ_GPIO1_INPUT,
353 AXP22X_IRQ_GPIO0_INPUT,
354};
355
Jacob Panaf7e9062014-10-06 21:17:14 -0700356enum axp288_irqs {
357 AXP288_IRQ_VBUS_FALL = 2,
358 AXP288_IRQ_VBUS_RISE,
359 AXP288_IRQ_OV,
360 AXP288_IRQ_FALLING_ALT,
361 AXP288_IRQ_RISING_ALT,
362 AXP288_IRQ_OV_ALT,
363 AXP288_IRQ_DONE = 10,
364 AXP288_IRQ_CHARGING,
365 AXP288_IRQ_SAFE_QUIT,
366 AXP288_IRQ_SAFE_ENTER,
367 AXP288_IRQ_ABSENT,
368 AXP288_IRQ_APPEND,
369 AXP288_IRQ_QWBTU,
370 AXP288_IRQ_WBTU,
371 AXP288_IRQ_QWBTO,
372 AXP288_IRQ_WBTO,
373 AXP288_IRQ_QCBTU,
374 AXP288_IRQ_CBTU,
375 AXP288_IRQ_QCBTO,
376 AXP288_IRQ_CBTO,
377 AXP288_IRQ_WL2,
378 AXP288_IRQ_WL1,
379 AXP288_IRQ_GPADC,
380 AXP288_IRQ_OT = 31,
381 AXP288_IRQ_GPIO0,
382 AXP288_IRQ_GPIO1,
383 AXP288_IRQ_POKO,
384 AXP288_IRQ_POKL,
385 AXP288_IRQ_POKS,
386 AXP288_IRQ_POKN,
387 AXP288_IRQ_POKP,
388 AXP288_IRQ_TIMER,
389 AXP288_IRQ_MV_CHNG,
390 AXP288_IRQ_BC_USB_CHNG,
391};
392
393#define AXP288_TS_ADC_H 0x58
394#define AXP288_TS_ADC_L 0x59
395#define AXP288_GP_ADC_H 0x5a
396#define AXP288_GP_ADC_L 0x5b
397
Carlo Caionecfb61a42014-05-01 14:29:27 +0200398struct axp20x_dev {
399 struct device *dev;
Chen-Yu Tsai4fd41152016-02-12 10:02:42 +0800400 int irq;
Carlo Caionecfb61a42014-05-01 14:29:27 +0200401 struct regmap *regmap;
402 struct regmap_irq_chip_data *regmap_irqc;
403 long variant;
Jacob Panaf7e9062014-10-06 21:17:14 -0700404 int nr_cells;
405 struct mfd_cell *cells;
406 const struct regmap_config *regmap_cfg;
407 const struct regmap_irq_chip *regmap_irq_chip;
Carlo Caionecfb61a42014-05-01 14:29:27 +0200408};
409
Todd E Brandt774e0b42015-01-07 13:25:52 -0800410#define BATTID_LEN 64
411#define OCV_CURVE_SIZE 32
412#define MAX_THERM_CURVE_SIZE 25
413#define PD_DEF_MIN_TEMP 0
414#define PD_DEF_MAX_TEMP 55
415
416struct axp20x_fg_pdata {
417 char battid[BATTID_LEN + 1];
418 int design_cap;
419 int min_volt;
420 int max_volt;
421 int max_temp;
422 int min_temp;
423 int cap1;
424 int cap0;
425 int rdc1;
426 int rdc0;
427 int ocv_curve[OCV_CURVE_SIZE];
428 int tcsz;
429 int thermistor_curve[MAX_THERM_CURVE_SIZE][2];
430};
431
Ramakrishna Pallala843735b2015-05-04 22:16:07 +0530432struct axp20x_chrg_pdata {
433 int max_cc;
434 int max_cv;
435 int def_cc;
436 int def_cv;
437};
438
Ramakrishna Pallalaf0312372015-04-30 20:44:45 +0530439struct axp288_extcon_pdata {
440 /* GPIO pin control to switch D+/D- lines b/w PMIC and SOC */
441 struct gpio_desc *gpio_mux_cntl;
442};
443
Hans de Goede69fb4dc2015-08-01 10:39:38 +0200444/* generic helper function for reading 9-16 bit wide regs */
445static inline int axp20x_read_variable_width(struct regmap *regmap,
446 unsigned int reg, unsigned int width)
447{
448 unsigned int reg_val, result;
449 int err;
450
451 err = regmap_read(regmap, reg, &reg_val);
452 if (err)
453 return err;
454
455 result = reg_val << (width - 8);
456
457 err = regmap_read(regmap, reg + 1, &reg_val);
458 if (err)
459 return err;
460
461 result |= reg_val;
462
463 return result;
464}
465
Chen-Yu Tsai4fd41152016-02-12 10:02:42 +0800466/**
467 * axp20x_match_device(): Setup axp20x variant related fields
468 *
469 * @axp20x: axp20x device to setup (.dev field must be set)
470 * @dev: device associated with this axp20x device
471 *
472 * This lets the axp20x core configure the mfd cells and register maps
473 * for later use.
474 */
475int axp20x_match_device(struct axp20x_dev *axp20x);
476
477/**
478 * axp20x_device_probe(): Probe a configured axp20x device
479 *
480 * @axp20x: axp20x device to probe (must be configured)
481 *
482 * This function lets the axp20x core register the axp20x mfd devices
483 * and irqchip. The axp20x device passed in must be fully configured
484 * with axp20x_match_device, its irq set, and regmap created.
485 */
486int axp20x_device_probe(struct axp20x_dev *axp20x);
487
488/**
489 * axp20x_device_probe(): Remove a axp20x device
490 *
491 * @axp20x: axp20x device to remove
492 *
493 * This tells the axp20x core to remove the associated mfd devices
494 */
495int axp20x_device_remove(struct axp20x_dev *axp20x);
496
Carlo Caionecfb61a42014-05-01 14:29:27 +0200497#endif /* __LINUX_MFD_AXP20X_H */