blob: d8f3ad4285d2506decea3fab5c2c6f791d3753d3 [file] [log] [blame]
Ben Skeggs6ee73862009-12-11 19:24:15 +10001#
2# Makefile for the drm device driver. This driver provides support for the
3# Direct Rendering Infrastructure (DRI) in XFree86 4.1.0 and higher.
4
Ben Skeggs9274f4a2012-07-06 07:36:43 +10005ccflags-y := -Iinclude/drm -DCONFIG_NOUVEAU_DEBUG=7 -DCONFIG_NOUVEAU_DEBUG_DEFAULT=3
Ben Skeggs02a841d2012-07-04 23:44:54 +10006ccflags-y += -I$(src)/core/include
Ben Skeggsebb945a2012-07-20 08:17:34 +10007ccflags-y += -I$(src)/core
Ben Skeggs02a841d2012-07-04 23:44:54 +10008ccflags-y += -I$(src)
9
Ben Skeggs9274f4a2012-07-06 07:36:43 +100010nouveau-y := core/core/client.o
Ben Skeggsebb945a2012-07-20 08:17:34 +100011nouveau-y += core/core/engctx.o
Ben Skeggs9274f4a2012-07-06 07:36:43 +100012nouveau-y += core/core/engine.o
Ben Skeggs861d2102012-07-11 19:05:01 +100013nouveau-y += core/core/enum.o
Ben Skeggs3863c9b2012-07-14 19:09:17 +100014nouveau-y += core/core/gpuobj.o
Ben Skeggs9274f4a2012-07-06 07:36:43 +100015nouveau-y += core/core/handle.o
16nouveau-y += core/core/mm.o
17nouveau-y += core/core/namedb.o
18nouveau-y += core/core/object.o
19nouveau-y += core/core/option.o
20nouveau-y += core/core/parent.o
21nouveau-y += core/core/printk.o
Ben Skeggs02a841d2012-07-04 23:44:54 +100022nouveau-y += core/core/ramht.o
Ben Skeggs9274f4a2012-07-06 07:36:43 +100023nouveau-y += core/core/subdev.o
Ben Skeggs02a841d2012-07-04 23:44:54 +100024
Ben Skeggs3863c9b2012-07-14 19:09:17 +100025nouveau-y += core/subdev/bar/base.o
26nouveau-y += core/subdev/bar/nv50.o
27nouveau-y += core/subdev/bar/nvc0.o
Ben Skeggs70c0f262012-07-10 10:49:22 +100028nouveau-y += core/subdev/bios/base.o
29nouveau-y += core/subdev/bios/bit.o
Ben Skeggscb75d972012-07-11 10:44:20 +100030nouveau-y += core/subdev/bios/conn.o
Ben Skeggse0996ae2012-07-10 12:20:17 +100031nouveau-y += core/subdev/bios/dcb.o
Ben Skeggscb75d972012-07-11 10:44:20 +100032nouveau-y += core/subdev/bios/dp.o
Ben Skeggse0996ae2012-07-10 12:20:17 +100033nouveau-y += core/subdev/bios/gpio.o
Ben Skeggs4196faa2012-07-10 14:36:38 +100034nouveau-y += core/subdev/bios/i2c.o
Ben Skeggscb75d972012-07-11 10:44:20 +100035nouveau-y += core/subdev/bios/init.o
Ben Skeggs70790f42012-07-10 17:26:46 +100036nouveau-y += core/subdev/bios/pll.o
Ben Skeggs8aceb7d2012-07-10 16:45:24 +100037nouveau-y += core/subdev/clock/nv04.o
38nouveau-y += core/subdev/clock/nv40.o
39nouveau-y += core/subdev/clock/nv50.o
40nouveau-y += core/subdev/clock/nva3.o
41nouveau-y += core/subdev/clock/nvc0.o
Ben Skeggs70790f42012-07-10 17:26:46 +100042nouveau-y += core/subdev/clock/pllnv04.o
43nouveau-y += core/subdev/clock/pllnva3.o
Ben Skeggs9274f4a2012-07-06 07:36:43 +100044nouveau-y += core/subdev/device/base.o
45nouveau-y += core/subdev/device/nv04.o
46nouveau-y += core/subdev/device/nv10.o
47nouveau-y += core/subdev/device/nv20.o
48nouveau-y += core/subdev/device/nv30.o
49nouveau-y += core/subdev/device/nv40.o
50nouveau-y += core/subdev/device/nv50.o
51nouveau-y += core/subdev/device/nvc0.o
52nouveau-y += core/subdev/device/nve0.o
Ben Skeggscb75d972012-07-11 10:44:20 +100053nouveau-y += core/subdev/devinit/base.o
54nouveau-y += core/subdev/devinit/nv04.o
55nouveau-y += core/subdev/devinit/nv05.o
56nouveau-y += core/subdev/devinit/nv10.o
57nouveau-y += core/subdev/devinit/nv1a.o
58nouveau-y += core/subdev/devinit/nv20.o
59nouveau-y += core/subdev/devinit/nv50.o
Ben Skeggs861d2102012-07-11 19:05:01 +100060nouveau-y += core/subdev/fb/base.o
Ben Skeggs02a841d2012-07-04 23:44:54 +100061nouveau-y += core/subdev/fb/nv04.o
62nouveau-y += core/subdev/fb/nv10.o
63nouveau-y += core/subdev/fb/nv20.o
64nouveau-y += core/subdev/fb/nv30.o
65nouveau-y += core/subdev/fb/nv40.o
66nouveau-y += core/subdev/fb/nv50.o
67nouveau-y += core/subdev/fb/nvc0.o
Ben Skeggs02a841d2012-07-04 23:44:54 +100068nouveau-y += core/subdev/gpio/base.o
69nouveau-y += core/subdev/gpio/nv10.o
70nouveau-y += core/subdev/gpio/nv50.o
Ben Skeggse0996ae2012-07-10 12:20:17 +100071nouveau-y += core/subdev/gpio/nvd0.o
Ben Skeggs02a841d2012-07-04 23:44:54 +100072nouveau-y += core/subdev/i2c/base.o
Ben Skeggs4196faa2012-07-10 14:36:38 +100073nouveau-y += core/subdev/i2c/aux.o
74nouveau-y += core/subdev/i2c/bit.o
Ben Skeggs3863c9b2012-07-14 19:09:17 +100075nouveau-y += core/subdev/instmem/base.o
Ben Skeggs02a841d2012-07-04 23:44:54 +100076nouveau-y += core/subdev/instmem/nv04.o
Ben Skeggsaf7afbd2012-07-13 16:14:25 +100077nouveau-y += core/subdev/instmem/nv40.o
Ben Skeggs02a841d2012-07-04 23:44:54 +100078nouveau-y += core/subdev/instmem/nv50.o
Ben Skeggs861d2102012-07-11 19:05:01 +100079nouveau-y += core/subdev/ltcg/nvc0.o
Ben Skeggs7d9115d2012-07-11 15:58:56 +100080nouveau-y += core/subdev/mc/base.o
Ben Skeggs02a841d2012-07-04 23:44:54 +100081nouveau-y += core/subdev/mc/nv04.o
Ben Skeggs7d9115d2012-07-11 15:58:56 +100082nouveau-y += core/subdev/mc/nv44.o
Ben Skeggs02a841d2012-07-04 23:44:54 +100083nouveau-y += core/subdev/mc/nv50.o
Ben Skeggs7d9115d2012-07-11 15:58:56 +100084nouveau-y += core/subdev/mc/nv98.o
85nouveau-y += core/subdev/mc/nvc0.o
Ben Skeggs5a5c7432012-07-11 16:08:25 +100086nouveau-y += core/subdev/timer/base.o
Ben Skeggs02a841d2012-07-04 23:44:54 +100087nouveau-y += core/subdev/timer/nv04.o
88nouveau-y += core/subdev/vm/base.o
Ben Skeggs3863c9b2012-07-14 19:09:17 +100089nouveau-y += core/subdev/vm/nv04.o
90nouveau-y += core/subdev/vm/nv41.o
91nouveau-y += core/subdev/vm/nv44.o
Ben Skeggs02a841d2012-07-04 23:44:54 +100092nouveau-y += core/subdev/vm/nv50.o
93nouveau-y += core/subdev/vm/nvc0.o
94
Ben Skeggsebb945a2012-07-20 08:17:34 +100095nouveau-y += core/engine/dmaobj/base.o
96nouveau-y += core/engine/dmaobj/nv04.o
97nouveau-y += core/engine/dmaobj/nv50.o
98nouveau-y += core/engine/dmaobj/nvc0.o
Ben Skeggs02a841d2012-07-04 23:44:54 +100099nouveau-y += core/engine/bsp/nv84.o
100nouveau-y += core/engine/copy/nva3.o
101nouveau-y += core/engine/copy/nvc0.o
102nouveau-y += core/engine/crypt/nv84.o
103nouveau-y += core/engine/crypt/nv98.o
Ben Skeggsebb945a2012-07-20 08:17:34 +1000104nouveau-y += core/engine/disp/nv04.o
105nouveau-y += core/engine/disp/nv50.o
106nouveau-y += core/engine/disp/nvd0.o
Ben Skeggs4196faa2012-07-10 14:36:38 +1000107nouveau-y += core/engine/disp/vga.o
Ben Skeggsebb945a2012-07-20 08:17:34 +1000108nouveau-y += core/engine/fifo/base.o
Ben Skeggs02a841d2012-07-04 23:44:54 +1000109nouveau-y += core/engine/fifo/nv04.o
110nouveau-y += core/engine/fifo/nv10.o
111nouveau-y += core/engine/fifo/nv17.o
112nouveau-y += core/engine/fifo/nv40.o
113nouveau-y += core/engine/fifo/nv50.o
114nouveau-y += core/engine/fifo/nv84.o
115nouveau-y += core/engine/fifo/nvc0.o
116nouveau-y += core/engine/fifo/nve0.o
117nouveau-y += core/engine/graph/ctxnv40.o
118nouveau-y += core/engine/graph/ctxnv50.o
119nouveau-y += core/engine/graph/ctxnvc0.o
120nouveau-y += core/engine/graph/ctxnve0.o
121nouveau-y += core/engine/graph/nv04.o
122nouveau-y += core/engine/graph/nv10.o
123nouveau-y += core/engine/graph/nv20.o
Ben Skeggsebb945a2012-07-20 08:17:34 +1000124nouveau-y += core/engine/graph/nv25.o
125nouveau-y += core/engine/graph/nv2a.o
126nouveau-y += core/engine/graph/nv30.o
127nouveau-y += core/engine/graph/nv34.o
128nouveau-y += core/engine/graph/nv35.o
Ben Skeggs02a841d2012-07-04 23:44:54 +1000129nouveau-y += core/engine/graph/nv40.o
130nouveau-y += core/engine/graph/nv50.o
131nouveau-y += core/engine/graph/nvc0.o
132nouveau-y += core/engine/graph/nve0.o
133nouveau-y += core/engine/mpeg/nv31.o
Ben Skeggsebb945a2012-07-20 08:17:34 +1000134nouveau-y += core/engine/mpeg/nv40.o
Ben Skeggs02a841d2012-07-04 23:44:54 +1000135nouveau-y += core/engine/mpeg/nv50.o
Ben Skeggsebb945a2012-07-20 08:17:34 +1000136nouveau-y += core/engine/mpeg/nv84.o
Ben Skeggs02a841d2012-07-04 23:44:54 +1000137nouveau-y += core/engine/ppp/nv98.o
Ben Skeggsebb945a2012-07-20 08:17:34 +1000138nouveau-y += core/engine/software/nv04.o
139nouveau-y += core/engine/software/nv10.o
140nouveau-y += core/engine/software/nv50.o
141nouveau-y += core/engine/software/nvc0.o
Ben Skeggs02a841d2012-07-04 23:44:54 +1000142nouveau-y += core/engine/vp/nv84.o
143
Ben Skeggsebb945a2012-07-20 08:17:34 +1000144# drm/compat - will go away
145nouveau-y += nouveau_compat.o nouveau_revcompat.o
Ben Skeggs6ee73862009-12-11 19:24:15 +1000146
Ben Skeggsebb945a2012-07-20 08:17:34 +1000147# drm/core
148nouveau-y += nouveau_drm.o nouveau_chan.o nouveau_dma.o nouveau_fence.o
149nouveau-y += nouveau_agp.o
150nouveau-y += nouveau_ttm.o nouveau_sgdma.o nouveau_bo.o nouveau_gem.o
151
152nouveau-y += nouveau_abi16.o
153nouveau-y += nv04_fence.o nv10_fence.o nv50_fence.o nv84_fence.o nvc0_fence.o
154
155# drm/kms/common
156nouveau-y += nouveau_fbcon.o
157
158# drm/kms/nv04:nv50
159nouveau-y += nv04_fbcon.o
160
161# drm/kms/nv50:nvd9
162nouveau-y += nv50_fbcon.o nvc0_fbcon.o
163
164# drm/kms/nvd9-
165
166##
167## unported bits below
168##
169
170# drm/core
171nouveau-y += nouveau_drv.o nouveau_state.o nouveau_irq.o
172nouveau-y += nouveau_prime.o
173
174# drm/kms/bios
175nouveau-y += nouveau_mxm.o nouveau_bios.o
176
177# drm/kms/common
178nouveau-y += nouveau_display.o nouveau_connector.o
179nouveau-y += nouveau_hdmi.o nouveau_dp.o
180
181# drm/kms/nv04:nv50
182nouveau-y += nouveau_hw.o nouveau_calc.o
183nouveau-y += nv04_dac.o nv04_dfp.o nv04_tv.o nv17_tv.o nv17_tv_modes.o
184nouveau-y += nv04_crtc.o nv04_display.o nv04_cursor.o
185
186# drm/kms/nv50-
187nouveau-y += nv50_display.o nvd0_display.o
188nouveau-y += nv50_crtc.o nv50_dac.o nv50_sor.o nv50_cursor.o
189nouveau-y += nv50_evo.o
190
191# drm/pm
192nouveau-y += nouveau_pm.o nouveau_volt.o nouveau_perf.o nouveau_temp.o
193nouveau-y += nv04_pm.o nv40_pm.o nv50_pm.o nva3_pm.o nvc0_pm.o
194nouveau-y += nouveau_mem.o
195
196# optional stuff
Ben Skeggs6ee73862009-12-11 19:24:15 +1000197nouveau-$(CONFIG_COMPAT) += nouveau_ioc32.o
198nouveau-$(CONFIG_DRM_NOUVEAU_BACKLIGHT) += nouveau_backlight.o
199nouveau-$(CONFIG_ACPI) += nouveau_acpi.o
200
Ben Skeggsebb945a2012-07-20 08:17:34 +1000201
Ben Skeggs6ee73862009-12-11 19:24:15 +1000202obj-$(CONFIG_DRM_NOUVEAU)+= nouveau.o