Laurent Pinchart | 26e0ca2 | 2013-06-04 11:22:30 -0300 | [diff] [blame] | 1 | /* |
| 2 | * vsp1_entity.c -- R-Car VSP1 Base Entity |
| 3 | * |
Laurent Pinchart | 8a1edc5 | 2014-02-06 14:42:31 -0300 | [diff] [blame] | 4 | * Copyright (C) 2013-2014 Renesas Electronics Corporation |
Laurent Pinchart | 26e0ca2 | 2013-06-04 11:22:30 -0300 | [diff] [blame] | 5 | * |
| 6 | * Contact: Laurent Pinchart (laurent.pinchart@ideasonboard.com) |
| 7 | * |
| 8 | * This program is free software; you can redistribute it and/or modify |
| 9 | * it under the terms of the GNU General Public License as published by |
| 10 | * the Free Software Foundation; either version 2 of the License, or |
| 11 | * (at your option) any later version. |
| 12 | */ |
| 13 | |
| 14 | #include <linux/device.h> |
| 15 | #include <linux/gfp.h> |
| 16 | |
| 17 | #include <media/media-entity.h> |
Laurent Pinchart | a626e64 | 2013-07-10 12:03:30 -0300 | [diff] [blame] | 18 | #include <media/v4l2-ctrls.h> |
Laurent Pinchart | 26e0ca2 | 2013-06-04 11:22:30 -0300 | [diff] [blame] | 19 | #include <media/v4l2-subdev.h> |
| 20 | |
| 21 | #include "vsp1.h" |
Laurent Pinchart | aa380ea | 2015-11-01 10:46:25 -0200 | [diff] [blame] | 22 | #include "vsp1_dl.h" |
Laurent Pinchart | 26e0ca2 | 2013-06-04 11:22:30 -0300 | [diff] [blame] | 23 | #include "vsp1_entity.h" |
Laurent Pinchart | aa380ea | 2015-11-01 10:46:25 -0200 | [diff] [blame] | 24 | #include "vsp1_pipe.h" |
| 25 | |
| 26 | void vsp1_mod_write(struct vsp1_entity *e, u32 reg, u32 data) |
| 27 | { |
| 28 | struct vsp1_pipeline *pipe = to_vsp1_pipeline(&e->subdev.entity); |
| 29 | |
| 30 | if (pipe->dl) |
Laurent Pinchart | c2dd2513 | 2015-11-08 20:06:57 -0200 | [diff] [blame^] | 31 | vsp1_dl_list_write(pipe->dl, reg, data); |
Laurent Pinchart | aa380ea | 2015-11-01 10:46:25 -0200 | [diff] [blame] | 32 | else |
| 33 | vsp1_write(e->vsp1, reg, data); |
| 34 | } |
Laurent Pinchart | 26e0ca2 | 2013-06-04 11:22:30 -0300 | [diff] [blame] | 35 | |
Laurent Pinchart | 960de2c | 2014-05-31 10:40:51 -0300 | [diff] [blame] | 36 | bool vsp1_entity_is_streaming(struct vsp1_entity *entity) |
| 37 | { |
Laurent Pinchart | adb8963 | 2015-04-13 11:43:40 -0300 | [diff] [blame] | 38 | unsigned long flags; |
Laurent Pinchart | 960de2c | 2014-05-31 10:40:51 -0300 | [diff] [blame] | 39 | bool streaming; |
| 40 | |
Laurent Pinchart | adb8963 | 2015-04-13 11:43:40 -0300 | [diff] [blame] | 41 | spin_lock_irqsave(&entity->lock, flags); |
Laurent Pinchart | 960de2c | 2014-05-31 10:40:51 -0300 | [diff] [blame] | 42 | streaming = entity->streaming; |
Laurent Pinchart | adb8963 | 2015-04-13 11:43:40 -0300 | [diff] [blame] | 43 | spin_unlock_irqrestore(&entity->lock, flags); |
Laurent Pinchart | 960de2c | 2014-05-31 10:40:51 -0300 | [diff] [blame] | 44 | |
| 45 | return streaming; |
| 46 | } |
| 47 | |
| 48 | int vsp1_entity_set_streaming(struct vsp1_entity *entity, bool streaming) |
| 49 | { |
Laurent Pinchart | adb8963 | 2015-04-13 11:43:40 -0300 | [diff] [blame] | 50 | unsigned long flags; |
Laurent Pinchart | 960de2c | 2014-05-31 10:40:51 -0300 | [diff] [blame] | 51 | int ret; |
| 52 | |
Laurent Pinchart | adb8963 | 2015-04-13 11:43:40 -0300 | [diff] [blame] | 53 | spin_lock_irqsave(&entity->lock, flags); |
Laurent Pinchart | 960de2c | 2014-05-31 10:40:51 -0300 | [diff] [blame] | 54 | entity->streaming = streaming; |
Laurent Pinchart | adb8963 | 2015-04-13 11:43:40 -0300 | [diff] [blame] | 55 | spin_unlock_irqrestore(&entity->lock, flags); |
Laurent Pinchart | 960de2c | 2014-05-31 10:40:51 -0300 | [diff] [blame] | 56 | |
| 57 | if (!streaming) |
| 58 | return 0; |
| 59 | |
Laurent Pinchart | 5aa2eb3 | 2015-12-05 20:17:10 -0200 | [diff] [blame] | 60 | if (!entity->vsp1->info->uapi || !entity->subdev.ctrl_handler) |
Laurent Pinchart | 960de2c | 2014-05-31 10:40:51 -0300 | [diff] [blame] | 61 | return 0; |
| 62 | |
| 63 | ret = v4l2_ctrl_handler_setup(entity->subdev.ctrl_handler); |
| 64 | if (ret < 0) { |
Laurent Pinchart | adb8963 | 2015-04-13 11:43:40 -0300 | [diff] [blame] | 65 | spin_lock_irqsave(&entity->lock, flags); |
Laurent Pinchart | 960de2c | 2014-05-31 10:40:51 -0300 | [diff] [blame] | 66 | entity->streaming = false; |
Laurent Pinchart | adb8963 | 2015-04-13 11:43:40 -0300 | [diff] [blame] | 67 | spin_unlock_irqrestore(&entity->lock, flags); |
Laurent Pinchart | 960de2c | 2014-05-31 10:40:51 -0300 | [diff] [blame] | 68 | } |
| 69 | |
| 70 | return ret; |
| 71 | } |
| 72 | |
Laurent Pinchart | 665b693 | 2015-08-02 18:58:31 -0300 | [diff] [blame] | 73 | void vsp1_entity_route_setup(struct vsp1_entity *source) |
| 74 | { |
| 75 | struct vsp1_entity *sink; |
| 76 | |
| 77 | if (source->route->reg == 0) |
| 78 | return; |
| 79 | |
| 80 | sink = container_of(source->sink, struct vsp1_entity, subdev.entity); |
Takashi Saito | 1517b03 | 2015-09-07 01:40:25 -0300 | [diff] [blame] | 81 | vsp1_mod_write(source, source->route->reg, |
| 82 | sink->route->inputs[source->sink_pad]); |
Laurent Pinchart | 665b693 | 2015-08-02 18:58:31 -0300 | [diff] [blame] | 83 | } |
| 84 | |
Laurent Pinchart | 26e0ca2 | 2013-06-04 11:22:30 -0300 | [diff] [blame] | 85 | /* ----------------------------------------------------------------------------- |
| 86 | * V4L2 Subdevice Operations |
| 87 | */ |
| 88 | |
| 89 | struct v4l2_mbus_framefmt * |
| 90 | vsp1_entity_get_pad_format(struct vsp1_entity *entity, |
Hans Verkuil | f723413 | 2015-03-04 01:47:54 -0800 | [diff] [blame] | 91 | struct v4l2_subdev_pad_config *cfg, |
Laurent Pinchart | 26e0ca2 | 2013-06-04 11:22:30 -0300 | [diff] [blame] | 92 | unsigned int pad, u32 which) |
| 93 | { |
| 94 | switch (which) { |
| 95 | case V4L2_SUBDEV_FORMAT_TRY: |
Hans Verkuil | f723413 | 2015-03-04 01:47:54 -0800 | [diff] [blame] | 96 | return v4l2_subdev_get_try_format(&entity->subdev, cfg, pad); |
Laurent Pinchart | 26e0ca2 | 2013-06-04 11:22:30 -0300 | [diff] [blame] | 97 | case V4L2_SUBDEV_FORMAT_ACTIVE: |
| 98 | return &entity->formats[pad]; |
| 99 | default: |
| 100 | return NULL; |
| 101 | } |
| 102 | } |
| 103 | |
| 104 | /* |
| 105 | * vsp1_entity_init_formats - Initialize formats on all pads |
| 106 | * @subdev: V4L2 subdevice |
Hans Verkuil | f723413 | 2015-03-04 01:47:54 -0800 | [diff] [blame] | 107 | * @cfg: V4L2 subdev pad configuration |
Laurent Pinchart | 26e0ca2 | 2013-06-04 11:22:30 -0300 | [diff] [blame] | 108 | * |
Hans Verkuil | f723413 | 2015-03-04 01:47:54 -0800 | [diff] [blame] | 109 | * Initialize all pad formats with default values. If cfg is not NULL, try |
Laurent Pinchart | 26e0ca2 | 2013-06-04 11:22:30 -0300 | [diff] [blame] | 110 | * formats are initialized on the file handle. Otherwise active formats are |
| 111 | * initialized on the device. |
| 112 | */ |
| 113 | void vsp1_entity_init_formats(struct v4l2_subdev *subdev, |
Hans Verkuil | f723413 | 2015-03-04 01:47:54 -0800 | [diff] [blame] | 114 | struct v4l2_subdev_pad_config *cfg) |
Laurent Pinchart | 26e0ca2 | 2013-06-04 11:22:30 -0300 | [diff] [blame] | 115 | { |
| 116 | struct v4l2_subdev_format format; |
| 117 | unsigned int pad; |
| 118 | |
| 119 | for (pad = 0; pad < subdev->entity.num_pads - 1; ++pad) { |
| 120 | memset(&format, 0, sizeof(format)); |
| 121 | |
| 122 | format.pad = pad; |
Hans Verkuil | f723413 | 2015-03-04 01:47:54 -0800 | [diff] [blame] | 123 | format.which = cfg ? V4L2_SUBDEV_FORMAT_TRY |
Laurent Pinchart | 26e0ca2 | 2013-06-04 11:22:30 -0300 | [diff] [blame] | 124 | : V4L2_SUBDEV_FORMAT_ACTIVE; |
| 125 | |
Hans Verkuil | f723413 | 2015-03-04 01:47:54 -0800 | [diff] [blame] | 126 | v4l2_subdev_call(subdev, pad, set_fmt, cfg, &format); |
Laurent Pinchart | 26e0ca2 | 2013-06-04 11:22:30 -0300 | [diff] [blame] | 127 | } |
| 128 | } |
| 129 | |
| 130 | static int vsp1_entity_open(struct v4l2_subdev *subdev, |
| 131 | struct v4l2_subdev_fh *fh) |
| 132 | { |
Hans Verkuil | f723413 | 2015-03-04 01:47:54 -0800 | [diff] [blame] | 133 | vsp1_entity_init_formats(subdev, fh->pad); |
Laurent Pinchart | 26e0ca2 | 2013-06-04 11:22:30 -0300 | [diff] [blame] | 134 | |
| 135 | return 0; |
| 136 | } |
| 137 | |
| 138 | const struct v4l2_subdev_internal_ops vsp1_subdev_internal_ops = { |
| 139 | .open = vsp1_entity_open, |
| 140 | }; |
| 141 | |
| 142 | /* ----------------------------------------------------------------------------- |
| 143 | * Media Operations |
| 144 | */ |
| 145 | |
Laurent Pinchart | babca00 | 2015-08-05 17:14:41 -0300 | [diff] [blame] | 146 | int vsp1_entity_link_setup(struct media_entity *entity, |
| 147 | const struct media_pad *local, |
| 148 | const struct media_pad *remote, u32 flags) |
Laurent Pinchart | 26e0ca2 | 2013-06-04 11:22:30 -0300 | [diff] [blame] | 149 | { |
| 150 | struct vsp1_entity *source; |
| 151 | |
| 152 | if (!(local->flags & MEDIA_PAD_FL_SOURCE)) |
| 153 | return 0; |
| 154 | |
| 155 | source = container_of(local->entity, struct vsp1_entity, subdev.entity); |
| 156 | |
| 157 | if (!source->route) |
| 158 | return 0; |
| 159 | |
| 160 | if (flags & MEDIA_LNK_FL_ENABLED) { |
| 161 | if (source->sink) |
| 162 | return -EBUSY; |
| 163 | source->sink = remote->entity; |
Laurent Pinchart | d9b45ed | 2013-07-10 18:37:27 -0300 | [diff] [blame] | 164 | source->sink_pad = remote->index; |
Laurent Pinchart | 26e0ca2 | 2013-06-04 11:22:30 -0300 | [diff] [blame] | 165 | } else { |
| 166 | source->sink = NULL; |
Laurent Pinchart | d9b45ed | 2013-07-10 18:37:27 -0300 | [diff] [blame] | 167 | source->sink_pad = 0; |
Laurent Pinchart | 26e0ca2 | 2013-06-04 11:22:30 -0300 | [diff] [blame] | 168 | } |
| 169 | |
| 170 | return 0; |
| 171 | } |
| 172 | |
Laurent Pinchart | 26e0ca2 | 2013-06-04 11:22:30 -0300 | [diff] [blame] | 173 | /* ----------------------------------------------------------------------------- |
| 174 | * Initialization |
| 175 | */ |
| 176 | |
Laurent Pinchart | d9b45ed | 2013-07-10 18:37:27 -0300 | [diff] [blame] | 177 | static const struct vsp1_route vsp1_routes[] = { |
Laurent Pinchart | 629bb6d | 2013-07-10 18:03:46 -0300 | [diff] [blame] | 178 | { VSP1_ENTITY_BRU, 0, VI6_DPR_BRU_ROUTE, |
| 179 | { VI6_DPR_NODE_BRU_IN(0), VI6_DPR_NODE_BRU_IN(1), |
Laurent Pinchart | 7f2d50f | 2015-09-07 08:05:39 -0300 | [diff] [blame] | 180 | VI6_DPR_NODE_BRU_IN(2), VI6_DPR_NODE_BRU_IN(3), |
| 181 | VI6_DPR_NODE_BRU_IN(4) } }, |
Laurent Pinchart | d9b45ed | 2013-07-10 18:37:27 -0300 | [diff] [blame] | 182 | { VSP1_ENTITY_HSI, 0, VI6_DPR_HSI_ROUTE, { VI6_DPR_NODE_HSI, } }, |
| 183 | { VSP1_ENTITY_HST, 0, VI6_DPR_HST_ROUTE, { VI6_DPR_NODE_HST, } }, |
| 184 | { VSP1_ENTITY_LIF, 0, 0, { VI6_DPR_NODE_LIF, } }, |
| 185 | { VSP1_ENTITY_LUT, 0, VI6_DPR_LUT_ROUTE, { VI6_DPR_NODE_LUT, } }, |
| 186 | { VSP1_ENTITY_RPF, 0, VI6_DPR_RPF_ROUTE(0), { VI6_DPR_NODE_RPF(0), } }, |
| 187 | { VSP1_ENTITY_RPF, 1, VI6_DPR_RPF_ROUTE(1), { VI6_DPR_NODE_RPF(1), } }, |
| 188 | { VSP1_ENTITY_RPF, 2, VI6_DPR_RPF_ROUTE(2), { VI6_DPR_NODE_RPF(2), } }, |
| 189 | { VSP1_ENTITY_RPF, 3, VI6_DPR_RPF_ROUTE(3), { VI6_DPR_NODE_RPF(3), } }, |
| 190 | { VSP1_ENTITY_RPF, 4, VI6_DPR_RPF_ROUTE(4), { VI6_DPR_NODE_RPF(4), } }, |
| 191 | { VSP1_ENTITY_SRU, 0, VI6_DPR_SRU_ROUTE, { VI6_DPR_NODE_SRU, } }, |
| 192 | { VSP1_ENTITY_UDS, 0, VI6_DPR_UDS_ROUTE(0), { VI6_DPR_NODE_UDS(0), } }, |
| 193 | { VSP1_ENTITY_UDS, 1, VI6_DPR_UDS_ROUTE(1), { VI6_DPR_NODE_UDS(1), } }, |
| 194 | { VSP1_ENTITY_UDS, 2, VI6_DPR_UDS_ROUTE(2), { VI6_DPR_NODE_UDS(2), } }, |
| 195 | { VSP1_ENTITY_WPF, 0, 0, { VI6_DPR_NODE_WPF(0), } }, |
| 196 | { VSP1_ENTITY_WPF, 1, 0, { VI6_DPR_NODE_WPF(1), } }, |
| 197 | { VSP1_ENTITY_WPF, 2, 0, { VI6_DPR_NODE_WPF(2), } }, |
| 198 | { VSP1_ENTITY_WPF, 3, 0, { VI6_DPR_NODE_WPF(3), } }, |
| 199 | }; |
| 200 | |
Laurent Pinchart | 26e0ca2 | 2013-06-04 11:22:30 -0300 | [diff] [blame] | 201 | int vsp1_entity_init(struct vsp1_device *vsp1, struct vsp1_entity *entity, |
| 202 | unsigned int num_pads) |
| 203 | { |
Laurent Pinchart | 26e0ca2 | 2013-06-04 11:22:30 -0300 | [diff] [blame] | 204 | unsigned int i; |
| 205 | |
Laurent Pinchart | d9b45ed | 2013-07-10 18:37:27 -0300 | [diff] [blame] | 206 | for (i = 0; i < ARRAY_SIZE(vsp1_routes); ++i) { |
| 207 | if (vsp1_routes[i].type == entity->type && |
| 208 | vsp1_routes[i].index == entity->index) { |
| 209 | entity->route = &vsp1_routes[i]; |
Laurent Pinchart | 26e0ca2 | 2013-06-04 11:22:30 -0300 | [diff] [blame] | 210 | break; |
| 211 | } |
| 212 | } |
| 213 | |
Laurent Pinchart | d9b45ed | 2013-07-10 18:37:27 -0300 | [diff] [blame] | 214 | if (i == ARRAY_SIZE(vsp1_routes)) |
Laurent Pinchart | 26e0ca2 | 2013-06-04 11:22:30 -0300 | [diff] [blame] | 215 | return -EINVAL; |
| 216 | |
Laurent Pinchart | adb8963 | 2015-04-13 11:43:40 -0300 | [diff] [blame] | 217 | spin_lock_init(&entity->lock); |
Laurent Pinchart | 960de2c | 2014-05-31 10:40:51 -0300 | [diff] [blame] | 218 | |
Laurent Pinchart | 26e0ca2 | 2013-06-04 11:22:30 -0300 | [diff] [blame] | 219 | entity->vsp1 = vsp1; |
| 220 | entity->source_pad = num_pads - 1; |
| 221 | |
| 222 | /* Allocate formats and pads. */ |
| 223 | entity->formats = devm_kzalloc(vsp1->dev, |
| 224 | num_pads * sizeof(*entity->formats), |
| 225 | GFP_KERNEL); |
| 226 | if (entity->formats == NULL) |
| 227 | return -ENOMEM; |
| 228 | |
| 229 | entity->pads = devm_kzalloc(vsp1->dev, num_pads * sizeof(*entity->pads), |
| 230 | GFP_KERNEL); |
| 231 | if (entity->pads == NULL) |
| 232 | return -ENOMEM; |
| 233 | |
| 234 | /* Initialize pads. */ |
| 235 | for (i = 0; i < num_pads - 1; ++i) |
| 236 | entity->pads[i].flags = MEDIA_PAD_FL_SINK; |
| 237 | |
| 238 | entity->pads[num_pads - 1].flags = MEDIA_PAD_FL_SOURCE; |
| 239 | |
| 240 | /* Initialize the media entity. */ |
Mauro Carvalho Chehab | ab22e77 | 2015-12-11 07:44:40 -0200 | [diff] [blame] | 241 | return media_entity_pads_init(&entity->subdev.entity, num_pads, |
Mauro Carvalho Chehab | 1809510 | 2015-08-06 09:25:57 -0300 | [diff] [blame] | 242 | entity->pads); |
Laurent Pinchart | 26e0ca2 | 2013-06-04 11:22:30 -0300 | [diff] [blame] | 243 | } |
| 244 | |
| 245 | void vsp1_entity_destroy(struct vsp1_entity *entity) |
| 246 | { |
Laurent Pinchart | a626e64 | 2013-07-10 12:03:30 -0300 | [diff] [blame] | 247 | if (entity->subdev.ctrl_handler) |
| 248 | v4l2_ctrl_handler_free(entity->subdev.ctrl_handler); |
Laurent Pinchart | 26e0ca2 | 2013-06-04 11:22:30 -0300 | [diff] [blame] | 249 | media_entity_cleanup(&entity->subdev.entity); |
Laurent Pinchart | 26e0ca2 | 2013-06-04 11:22:30 -0300 | [diff] [blame] | 250 | } |