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Christian Pellegrin1cad1de2008-11-15 08:58:16 +01001/*
2 * uda134x.c -- UDA134X ALSA SoC Codec driver
3 *
4 * Modifications by Christian Pellegrin <chripell@evolware.org>
5 *
6 * Copyright 2007 Dension Audio Systems Ltd.
7 * Author: Zoltan Devai
8 *
9 * Based on the WM87xx drivers by Liam Girdwood and Richard Purdie
10 *
11 * This program is free software; you can redistribute it and/or modify
12 * it under the terms of the GNU General Public License version 2 as
13 * published by the Free Software Foundation.
14 */
15
16#include <linux/module.h>
17#include <linux/delay.h>
Tejun Heo5a0e3ad2010-03-24 17:04:11 +090018#include <linux/slab.h>
Christian Pellegrin1cad1de2008-11-15 08:58:16 +010019#include <sound/pcm.h>
20#include <sound/pcm_params.h>
21#include <sound/soc.h>
Christian Pellegrin1cad1de2008-11-15 08:58:16 +010022#include <sound/initval.h>
23
24#include <sound/uda134x.h>
25#include <sound/l3.h>
26
Mark Brown72f2b892008-11-18 12:25:46 +000027#include "uda134x.h"
Christian Pellegrin1cad1de2008-11-15 08:58:16 +010028
29
Christian Pellegrin1cad1de2008-11-15 08:58:16 +010030#define UDA134X_RATES SNDRV_PCM_RATE_8000_48000
31#define UDA134X_FORMATS (SNDRV_PCM_FMTBIT_S8 | SNDRV_PCM_FMTBIT_S16_LE | \
32 SNDRV_PCM_FMTBIT_S18_3LE | SNDRV_PCM_FMTBIT_S20_3LE)
33
34struct uda134x_priv {
35 int sysclk;
36 int dai_fmt;
37
38 struct snd_pcm_substream *master_substream;
39 struct snd_pcm_substream *slave_substream;
40};
41
Christian Pellegrin1cad1de2008-11-15 08:58:16 +010042static const char uda134x_reg[UDA134X_REGS_NUM] = {
43 /* Extended address registers */
44 0x04, 0x04, 0x04, 0x00, 0x00, 0x00, 0x00, 0x00,
45 /* Status, data regs */
Lars-Peter Clausen82c7b532015-07-13 12:26:46 +020046 0x00, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00,
Christian Pellegrin1cad1de2008-11-15 08:58:16 +010047};
48
49/*
50 * The codec has no support for reading its registers except for peak level...
51 */
52static inline unsigned int uda134x_read_reg_cache(struct snd_soc_codec *codec,
53 unsigned int reg)
54{
55 u8 *cache = codec->reg_cache;
56
57 if (reg >= UDA134X_REGS_NUM)
58 return -1;
59 return cache[reg];
60}
61
62/*
63 * Write the register cache
64 */
65static inline void uda134x_write_reg_cache(struct snd_soc_codec *codec,
66 u8 reg, unsigned int value)
67{
68 u8 *cache = codec->reg_cache;
69
70 if (reg >= UDA134X_REGS_NUM)
71 return;
72 cache[reg] = value;
73}
74
75/*
76 * Write to the uda134x registers
77 *
78 */
79static int uda134x_write(struct snd_soc_codec *codec, unsigned int reg,
80 unsigned int value)
81{
82 int ret;
83 u8 addr;
84 u8 data = value;
85 struct uda134x_platform_data *pd = codec->control_data;
86
87 pr_debug("%s reg: %02X, value:%02X\n", __func__, reg, value);
88
89 if (reg >= UDA134X_REGS_NUM) {
André Goddard Rosaaf901ca2009-11-14 13:09:05 -020090 printk(KERN_ERR "%s unknown register: reg: %u",
Christian Pellegrin1cad1de2008-11-15 08:58:16 +010091 __func__, reg);
92 return -EINVAL;
93 }
94
95 uda134x_write_reg_cache(codec, reg, value);
96
97 switch (reg) {
98 case UDA134X_STATUS0:
99 case UDA134X_STATUS1:
100 addr = UDA134X_STATUS_ADDR;
Lars-Peter Clausen82c7b532015-07-13 12:26:46 +0200101 data |= (reg - UDA134X_STATUS0) << 7;
Christian Pellegrin1cad1de2008-11-15 08:58:16 +0100102 break;
103 case UDA134X_DATA000:
104 case UDA134X_DATA001:
105 case UDA134X_DATA010:
Vladimir Zapolskiyed632ad2010-06-24 15:17:07 +0400106 case UDA134X_DATA011:
Christian Pellegrin1cad1de2008-11-15 08:58:16 +0100107 addr = UDA134X_DATA0_ADDR;
Lars-Peter Clausen82c7b532015-07-13 12:26:46 +0200108 data |= (reg - UDA134X_DATA000) << 6;
Christian Pellegrin1cad1de2008-11-15 08:58:16 +0100109 break;
110 case UDA134X_DATA1:
111 addr = UDA134X_DATA1_ADDR;
112 break;
113 default:
114 /* It's an extended address register */
115 addr = (reg | UDA134X_EXTADDR_PREFIX);
116
117 ret = l3_write(&pd->l3,
118 UDA134X_DATA0_ADDR, &addr, 1);
119 if (ret != 1)
120 return -EIO;
121
122 addr = UDA134X_DATA0_ADDR;
123 data = (value | UDA134X_EXTDATA_PREFIX);
124 break;
125 }
126
127 ret = l3_write(&pd->l3,
128 addr, &data, 1);
129 if (ret != 1)
130 return -EIO;
131
132 return 0;
133}
134
135static inline void uda134x_reset(struct snd_soc_codec *codec)
136{
137 u8 reset_reg = uda134x_read_reg_cache(codec, UDA134X_STATUS0);
138 uda134x_write(codec, UDA134X_STATUS0, reset_reg | (1<<6));
139 msleep(1);
140 uda134x_write(codec, UDA134X_STATUS0, reset_reg & ~(1<<6));
141}
142
143static int uda134x_mute(struct snd_soc_dai *dai, int mute)
144{
145 struct snd_soc_codec *codec = dai->codec;
146 u8 mute_reg = uda134x_read_reg_cache(codec, UDA134X_DATA010);
147
148 pr_debug("%s mute: %d\n", __func__, mute);
149
150 if (mute)
151 mute_reg |= (1<<2);
152 else
153 mute_reg &= ~(1<<2);
154
Shine Liu0c093fb2009-08-17 18:52:01 +0800155 uda134x_write(codec, UDA134X_DATA010, mute_reg);
Christian Pellegrin1cad1de2008-11-15 08:58:16 +0100156
157 return 0;
158}
159
Mark Browndee89c42008-11-18 22:11:38 +0000160static int uda134x_startup(struct snd_pcm_substream *substream,
161 struct snd_soc_dai *dai)
Christian Pellegrin1cad1de2008-11-15 08:58:16 +0100162{
Mark Browne6968a12012-04-04 15:58:16 +0100163 struct snd_soc_codec *codec = dai->codec;
Mark Brownb2c812e2010-04-14 15:35:19 +0900164 struct uda134x_priv *uda134x = snd_soc_codec_get_drvdata(codec);
Christian Pellegrin1cad1de2008-11-15 08:58:16 +0100165 struct snd_pcm_runtime *master_runtime;
166
167 if (uda134x->master_substream) {
168 master_runtime = uda134x->master_substream->runtime;
169
170 pr_debug("%s constraining to %d bits at %d\n", __func__,
171 master_runtime->sample_bits,
172 master_runtime->rate);
173
174 snd_pcm_hw_constraint_minmax(substream->runtime,
175 SNDRV_PCM_HW_PARAM_RATE,
176 master_runtime->rate,
177 master_runtime->rate);
178
179 snd_pcm_hw_constraint_minmax(substream->runtime,
180 SNDRV_PCM_HW_PARAM_SAMPLE_BITS,
181 master_runtime->sample_bits,
182 master_runtime->sample_bits);
183
184 uda134x->slave_substream = substream;
185 } else
186 uda134x->master_substream = substream;
187
188 return 0;
189}
190
Mark Browndee89c42008-11-18 22:11:38 +0000191static void uda134x_shutdown(struct snd_pcm_substream *substream,
192 struct snd_soc_dai *dai)
Christian Pellegrin1cad1de2008-11-15 08:58:16 +0100193{
Mark Browne6968a12012-04-04 15:58:16 +0100194 struct snd_soc_codec *codec = dai->codec;
Mark Brownb2c812e2010-04-14 15:35:19 +0900195 struct uda134x_priv *uda134x = snd_soc_codec_get_drvdata(codec);
Christian Pellegrin1cad1de2008-11-15 08:58:16 +0100196
197 if (uda134x->master_substream == substream)
198 uda134x->master_substream = uda134x->slave_substream;
199
200 uda134x->slave_substream = NULL;
201}
202
203static int uda134x_hw_params(struct snd_pcm_substream *substream,
Mark Browndee89c42008-11-18 22:11:38 +0000204 struct snd_pcm_hw_params *params,
205 struct snd_soc_dai *dai)
Christian Pellegrin1cad1de2008-11-15 08:58:16 +0100206{
Lars-Peter Clausenab642462014-03-13 21:24:54 +0100207 struct snd_soc_codec *codec = dai->codec;
Mark Brownb2c812e2010-04-14 15:35:19 +0900208 struct uda134x_priv *uda134x = snd_soc_codec_get_drvdata(codec);
Christian Pellegrin1cad1de2008-11-15 08:58:16 +0100209 u8 hw_params;
210
211 if (substream == uda134x->slave_substream) {
212 pr_debug("%s ignoring hw_params for slave substream\n",
213 __func__);
214 return 0;
215 }
216
217 hw_params = uda134x_read_reg_cache(codec, UDA134X_STATUS0);
218 hw_params &= STATUS0_SYSCLK_MASK;
219 hw_params &= STATUS0_DAIFMT_MASK;
220
221 pr_debug("%s sysclk: %d, rate:%d\n", __func__,
222 uda134x->sysclk, params_rate(params));
223
224 /* set SYSCLK / fs ratio */
225 switch (uda134x->sysclk / params_rate(params)) {
226 case 512:
227 break;
228 case 384:
229 hw_params |= (1<<4);
230 break;
231 case 256:
232 hw_params |= (1<<5);
233 break;
234 default:
235 printk(KERN_ERR "%s unsupported fs\n", __func__);
236 return -EINVAL;
237 }
238
239 pr_debug("%s dai_fmt: %d, params_format:%d\n", __func__,
240 uda134x->dai_fmt, params_format(params));
241
242 /* set DAI format and word length */
243 switch (uda134x->dai_fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
244 case SND_SOC_DAIFMT_I2S:
245 break;
246 case SND_SOC_DAIFMT_RIGHT_J:
Mark Brownaa9ffad2014-07-31 12:49:26 +0100247 switch (params_width(params)) {
248 case 16:
Christian Pellegrin1cad1de2008-11-15 08:58:16 +0100249 hw_params |= (1<<1);
250 break;
Mark Brownaa9ffad2014-07-31 12:49:26 +0100251 case 18:
Christian Pellegrin1cad1de2008-11-15 08:58:16 +0100252 hw_params |= (1<<2);
253 break;
Mark Brownaa9ffad2014-07-31 12:49:26 +0100254 case 20:
Christian Pellegrin1cad1de2008-11-15 08:58:16 +0100255 hw_params |= ((1<<2) | (1<<1));
256 break;
257 default:
258 printk(KERN_ERR "%s unsupported format (right)\n",
259 __func__);
260 return -EINVAL;
261 }
262 break;
263 case SND_SOC_DAIFMT_LEFT_J:
264 hw_params |= (1<<3);
265 break;
266 default:
267 printk(KERN_ERR "%s unsupported format\n", __func__);
268 return -EINVAL;
269 }
270
271 uda134x_write(codec, UDA134X_STATUS0, hw_params);
272
273 return 0;
274}
275
276static int uda134x_set_dai_sysclk(struct snd_soc_dai *codec_dai,
277 int clk_id, unsigned int freq, int dir)
278{
279 struct snd_soc_codec *codec = codec_dai->codec;
Mark Brownb2c812e2010-04-14 15:35:19 +0900280 struct uda134x_priv *uda134x = snd_soc_codec_get_drvdata(codec);
Christian Pellegrin1cad1de2008-11-15 08:58:16 +0100281
Roel Kluin449bd542009-05-27 17:08:39 -0700282 pr_debug("%s clk_id: %d, freq: %u, dir: %d\n", __func__,
Christian Pellegrin1cad1de2008-11-15 08:58:16 +0100283 clk_id, freq, dir);
284
285 /* Anything between 256fs*8Khz and 512fs*48Khz should be acceptable
286 because the codec is slave. Of course limitations of the clock
287 master (the IIS controller) apply.
288 We'll error out on set_hw_params if it's not OK */
289 if ((freq >= (256 * 8000)) && (freq <= (512 * 48000))) {
290 uda134x->sysclk = freq;
291 return 0;
292 }
293
294 printk(KERN_ERR "%s unsupported sysclk\n", __func__);
295 return -EINVAL;
296}
297
298static int uda134x_set_dai_fmt(struct snd_soc_dai *codec_dai,
299 unsigned int fmt)
300{
301 struct snd_soc_codec *codec = codec_dai->codec;
Mark Brownb2c812e2010-04-14 15:35:19 +0900302 struct uda134x_priv *uda134x = snd_soc_codec_get_drvdata(codec);
Christian Pellegrin1cad1de2008-11-15 08:58:16 +0100303
304 pr_debug("%s fmt: %08X\n", __func__, fmt);
305
306 /* codec supports only full slave mode */
307 if ((fmt & SND_SOC_DAIFMT_MASTER_MASK) != SND_SOC_DAIFMT_CBS_CFS) {
308 printk(KERN_ERR "%s unsupported slave mode\n", __func__);
309 return -EINVAL;
310 }
311
312 /* no support for clock inversion */
313 if ((fmt & SND_SOC_DAIFMT_INV_MASK) != SND_SOC_DAIFMT_NB_NF) {
314 printk(KERN_ERR "%s unsupported clock inversion\n", __func__);
315 return -EINVAL;
316 }
317
318 /* We can't setup DAI format here as it depends on the word bit num */
319 /* so let's just store the value for later */
320 uda134x->dai_fmt = fmt;
321
322 return 0;
323}
324
325static int uda134x_set_bias_level(struct snd_soc_codec *codec,
326 enum snd_soc_bias_level level)
327{
Christian Pellegrin1cad1de2008-11-15 08:58:16 +0100328 struct uda134x_platform_data *pd = codec->control_data;
329 int i;
330 u8 *cache = codec->reg_cache;
331
332 pr_debug("%s bias level %d\n", __func__, level);
333
334 switch (level) {
335 case SND_SOC_BIAS_ON:
Christian Pellegrin1cad1de2008-11-15 08:58:16 +0100336 break;
337 case SND_SOC_BIAS_PREPARE:
338 /* power on */
339 if (pd->power) {
340 pd->power(1);
341 /* Sync reg_cache with the hardware */
342 for (i = 0; i < ARRAY_SIZE(uda134x_reg); i++)
Liam Girdwoodf0fba2a2010-03-17 20:15:21 +0000343 codec->driver->write(codec, i, *cache++);
Christian Pellegrin1cad1de2008-11-15 08:58:16 +0100344 }
345 break;
346 case SND_SOC_BIAS_STANDBY:
Christian Pellegrin1cad1de2008-11-15 08:58:16 +0100347 break;
348 case SND_SOC_BIAS_OFF:
349 /* power off */
350 if (pd->power)
351 pd->power(0);
352 break;
353 }
Christian Pellegrin1cad1de2008-11-15 08:58:16 +0100354 return 0;
355}
356
357static const char *uda134x_dsp_setting[] = {"Flat", "Minimum1",
358 "Minimum2", "Maximum"};
359static const char *uda134x_deemph[] = {"None", "32Khz", "44.1Khz", "48Khz"};
360static const char *uda134x_mixmode[] = {"Differential", "Analog1",
361 "Analog2", "Both"};
362
363static const struct soc_enum uda134x_mixer_enum[] = {
364SOC_ENUM_SINGLE(UDA134X_DATA010, 0, 0x04, uda134x_dsp_setting),
365SOC_ENUM_SINGLE(UDA134X_DATA010, 3, 0x04, uda134x_deemph),
366SOC_ENUM_SINGLE(UDA134X_EA010, 0, 0x04, uda134x_mixmode),
367};
368
369static const struct snd_kcontrol_new uda1341_snd_controls[] = {
370SOC_SINGLE("Master Playback Volume", UDA134X_DATA000, 0, 0x3F, 1),
371SOC_SINGLE("Capture Volume", UDA134X_EA010, 2, 0x07, 0),
372SOC_SINGLE("Analog1 Volume", UDA134X_EA000, 0, 0x1F, 1),
373SOC_SINGLE("Analog2 Volume", UDA134X_EA001, 0, 0x1F, 1),
374
375SOC_SINGLE("Mic Sensitivity", UDA134X_EA010, 2, 7, 0),
376SOC_SINGLE("Mic Volume", UDA134X_EA101, 0, 0x1F, 0),
377
378SOC_SINGLE("Tone Control - Bass", UDA134X_DATA001, 2, 0xF, 0),
379SOC_SINGLE("Tone Control - Treble", UDA134X_DATA001, 0, 3, 0),
380
381SOC_ENUM("Sound Processing Filter", uda134x_mixer_enum[0]),
382SOC_ENUM("PCM Playback De-emphasis", uda134x_mixer_enum[1]),
383SOC_ENUM("Input Mux", uda134x_mixer_enum[2]),
384
385SOC_SINGLE("AGC Switch", UDA134X_EA100, 4, 1, 0),
386SOC_SINGLE("AGC Target Volume", UDA134X_EA110, 0, 0x03, 1),
387SOC_SINGLE("AGC Timing", UDA134X_EA110, 2, 0x07, 0),
388
389SOC_SINGLE("DAC +6dB Switch", UDA134X_STATUS1, 6, 1, 0),
390SOC_SINGLE("ADC +6dB Switch", UDA134X_STATUS1, 5, 1, 0),
391SOC_SINGLE("ADC Polarity Switch", UDA134X_STATUS1, 4, 1, 0),
392SOC_SINGLE("DAC Polarity Switch", UDA134X_STATUS1, 3, 1, 0),
393SOC_SINGLE("Double Speed Playback Switch", UDA134X_STATUS1, 2, 1, 0),
394SOC_SINGLE("DC Filter Enable Switch", UDA134X_STATUS0, 0, 1, 0),
395};
396
397static const struct snd_kcontrol_new uda1340_snd_controls[] = {
398SOC_SINGLE("Master Playback Volume", UDA134X_DATA000, 0, 0x3F, 1),
399
400SOC_SINGLE("Tone Control - Bass", UDA134X_DATA001, 2, 0xF, 0),
401SOC_SINGLE("Tone Control - Treble", UDA134X_DATA001, 0, 3, 0),
402
403SOC_ENUM("Sound Processing Filter", uda134x_mixer_enum[0]),
404SOC_ENUM("PCM Playback De-emphasis", uda134x_mixer_enum[1]),
405
406SOC_SINGLE("DC Filter Enable Switch", UDA134X_STATUS0, 0, 1, 0),
407};
408
Vladimir Zapolskiyb28528a2010-04-26 14:56:57 +0400409static const struct snd_kcontrol_new uda1345_snd_controls[] = {
410SOC_SINGLE("Master Playback Volume", UDA134X_DATA000, 0, 0x3F, 1),
411
412SOC_ENUM("PCM Playback De-emphasis", uda134x_mixer_enum[1]),
413
414SOC_SINGLE("DC Filter Enable Switch", UDA134X_STATUS0, 0, 1, 0),
415};
416
Russell King113591e2013-07-30 11:18:52 +0100417/* UDA1341 has the DAC/ADC power down in STATUS1 */
418static const struct snd_soc_dapm_widget uda1341_dapm_widgets[] = {
419 SND_SOC_DAPM_DAC("DAC", "Playback", UDA134X_STATUS1, 0, 0),
420 SND_SOC_DAPM_ADC("ADC", "Capture", UDA134X_STATUS1, 1, 0),
421};
422
423/* UDA1340/4/5 has the DAC/ADC pwoer down in DATA0 11 */
424static const struct snd_soc_dapm_widget uda1340_dapm_widgets[] = {
425 SND_SOC_DAPM_DAC("DAC", "Playback", UDA134X_DATA011, 0, 0),
426 SND_SOC_DAPM_ADC("ADC", "Capture", UDA134X_DATA011, 1, 0),
427};
428
429/* Common DAPM widgets */
430static const struct snd_soc_dapm_widget uda134x_dapm_widgets[] = {
431 SND_SOC_DAPM_INPUT("VINL1"),
432 SND_SOC_DAPM_INPUT("VINR1"),
433 SND_SOC_DAPM_INPUT("VINL2"),
434 SND_SOC_DAPM_INPUT("VINR2"),
435 SND_SOC_DAPM_OUTPUT("VOUTL"),
436 SND_SOC_DAPM_OUTPUT("VOUTR"),
437};
438
439static const struct snd_soc_dapm_route uda134x_dapm_routes[] = {
440 { "ADC", NULL, "VINL1" },
441 { "ADC", NULL, "VINR1" },
442 { "ADC", NULL, "VINL2" },
443 { "ADC", NULL, "VINR2" },
444 { "VOUTL", NULL, "DAC" },
445 { "VOUTR", NULL, "DAC" },
446};
447
Lars-Peter Clausen85e76522011-11-23 11:40:40 +0100448static const struct snd_soc_dai_ops uda134x_dai_ops = {
Eric Miao6335d052009-03-03 09:41:00 +0800449 .startup = uda134x_startup,
450 .shutdown = uda134x_shutdown,
451 .hw_params = uda134x_hw_params,
452 .digital_mute = uda134x_mute,
453 .set_sysclk = uda134x_set_dai_sysclk,
454 .set_fmt = uda134x_set_dai_fmt,
455};
456
Liam Girdwoodf0fba2a2010-03-17 20:15:21 +0000457static struct snd_soc_dai_driver uda134x_dai = {
458 .name = "uda134x-hifi",
Christian Pellegrin1cad1de2008-11-15 08:58:16 +0100459 /* playback capabilities */
460 .playback = {
461 .stream_name = "Playback",
462 .channels_min = 1,
463 .channels_max = 2,
464 .rates = UDA134X_RATES,
465 .formats = UDA134X_FORMATS,
466 },
467 /* capture capabilities */
468 .capture = {
469 .stream_name = "Capture",
470 .channels_min = 1,
471 .channels_max = 2,
472 .rates = UDA134X_RATES,
473 .formats = UDA134X_FORMATS,
474 },
475 /* pcm operations */
Eric Miao6335d052009-03-03 09:41:00 +0800476 .ops = &uda134x_dai_ops,
Christian Pellegrin1cad1de2008-11-15 08:58:16 +0100477};
Christian Pellegrin1cad1de2008-11-15 08:58:16 +0100478
Liam Girdwoodf0fba2a2010-03-17 20:15:21 +0000479static int uda134x_soc_probe(struct snd_soc_codec *codec)
Christian Pellegrin1cad1de2008-11-15 08:58:16 +0100480{
Lars-Peter Clausen81024b12015-05-11 09:42:33 +0200481 struct snd_soc_dapm_context *dapm = snd_soc_codec_get_dapm(codec);
Lars-Peter Clausen00200102014-07-17 22:01:07 +0200482 struct uda134x_platform_data *pd = codec->component.card->dev->platform_data;
Lars-Peter Clausenf15c4442015-07-13 12:26:45 +0200483 struct uda134x_priv *uda134x = snd_soc_codec_get_drvdata(codec);
Russell King113591e2013-07-30 11:18:52 +0100484 const struct snd_soc_dapm_widget *widgets;
485 unsigned num_widgets;
Marek Beliskoa110f4e2011-03-09 21:46:20 +0100486
Liam Girdwoodf0fba2a2010-03-17 20:15:21 +0000487 int ret;
Christian Pellegrin1cad1de2008-11-15 08:58:16 +0100488
489 printk(KERN_INFO "UDA134X SoC Audio Codec\n");
490
Liam Girdwoodf0fba2a2010-03-17 20:15:21 +0000491 if (!pd) {
Christian Pellegrin1cad1de2008-11-15 08:58:16 +0100492 printk(KERN_ERR "UDA134X SoC codec: "
493 "missing L3 bitbang function\n");
494 return -ENODEV;
495 }
496
Christian Pellegrin1cad1de2008-11-15 08:58:16 +0100497 switch (pd->model) {
498 case UDA134X_UDA1340:
499 case UDA134X_UDA1341:
500 case UDA134X_UDA1344:
Vladimir Zapolskiyb28528a2010-04-26 14:56:57 +0400501 case UDA134X_UDA1345:
Christian Pellegrin1cad1de2008-11-15 08:58:16 +0100502 break;
503 default:
504 printk(KERN_ERR "UDA134X SoC codec: "
505 "unsupported model %d\n",
506 pd->model);
507 return -EINVAL;
508 }
509
Christian Pellegrin1cad1de2008-11-15 08:58:16 +0100510
Liam Girdwoodf0fba2a2010-03-17 20:15:21 +0000511 codec->control_data = pd;
Christian Pellegrin1cad1de2008-11-15 08:58:16 +0100512
513 if (pd->power)
514 pd->power(1);
515
516 uda134x_reset(codec);
517
Russell King113591e2013-07-30 11:18:52 +0100518 if (pd->model == UDA134X_UDA1341) {
519 widgets = uda1341_dapm_widgets;
520 num_widgets = ARRAY_SIZE(uda1341_dapm_widgets);
521 } else {
522 widgets = uda1340_dapm_widgets;
523 num_widgets = ARRAY_SIZE(uda1340_dapm_widgets);
524 }
525
Lars-Peter Clausen81024b12015-05-11 09:42:33 +0200526 ret = snd_soc_dapm_new_controls(dapm, widgets, num_widgets);
Russell King113591e2013-07-30 11:18:52 +0100527 if (ret) {
528 printk(KERN_ERR "%s failed to register dapm controls: %d",
529 __func__, ret);
Russell King113591e2013-07-30 11:18:52 +0100530 return ret;
531 }
532
Ian Molton3e8e1952009-01-09 00:23:21 +0000533 switch (pd->model) {
534 case UDA134X_UDA1340:
535 case UDA134X_UDA1344:
Liam Girdwood022658b2012-02-03 17:43:09 +0000536 ret = snd_soc_add_codec_controls(codec, uda1340_snd_controls,
Ian Molton3e8e1952009-01-09 00:23:21 +0000537 ARRAY_SIZE(uda1340_snd_controls));
538 break;
539 case UDA134X_UDA1341:
Liam Girdwood022658b2012-02-03 17:43:09 +0000540 ret = snd_soc_add_codec_controls(codec, uda1341_snd_controls,
Ian Molton3e8e1952009-01-09 00:23:21 +0000541 ARRAY_SIZE(uda1341_snd_controls));
542 break;
Vladimir Zapolskiyb28528a2010-04-26 14:56:57 +0400543 case UDA134X_UDA1345:
Liam Girdwood022658b2012-02-03 17:43:09 +0000544 ret = snd_soc_add_codec_controls(codec, uda1345_snd_controls,
Vladimir Zapolskiyb28528a2010-04-26 14:56:57 +0400545 ARRAY_SIZE(uda1345_snd_controls));
546 break;
Ian Molton3e8e1952009-01-09 00:23:21 +0000547 default:
André Goddard Rosaaf901ca2009-11-14 13:09:05 -0200548 printk(KERN_ERR "%s unknown codec type: %d",
Ian Molton3e8e1952009-01-09 00:23:21 +0000549 __func__, pd->model);
Liam Girdwoodf0fba2a2010-03-17 20:15:21 +0000550 return -EINVAL;
Ian Molton3e8e1952009-01-09 00:23:21 +0000551 }
552
Christian Pellegrin1cad1de2008-11-15 08:58:16 +0100553 if (ret < 0) {
554 printk(KERN_ERR "UDA134X: failed to register controls\n");
Liam Girdwoodf0fba2a2010-03-17 20:15:21 +0000555 return ret;
Christian Pellegrin1cad1de2008-11-15 08:58:16 +0100556 }
557
Christian Pellegrin1cad1de2008-11-15 08:58:16 +0100558 return 0;
Christian Pellegrin1cad1de2008-11-15 08:58:16 +0100559}
560
Liam Girdwoodf0fba2a2010-03-17 20:15:21 +0000561static struct snd_soc_codec_driver soc_codec_dev_uda134x = {
Christian Pellegrin1cad1de2008-11-15 08:58:16 +0100562 .probe = uda134x_soc_probe,
Liam Girdwoodf0fba2a2010-03-17 20:15:21 +0000563 .reg_cache_size = sizeof(uda134x_reg),
564 .reg_word_size = sizeof(u8),
Axel Lin2811fe22010-11-19 15:48:06 +0800565 .reg_cache_default = uda134x_reg,
Liam Girdwoodf0fba2a2010-03-17 20:15:21 +0000566 .reg_cache_step = 1,
567 .read = uda134x_read_reg_cache,
Liam Girdwoodf0fba2a2010-03-17 20:15:21 +0000568 .set_bias_level = uda134x_set_bias_level,
Lars-Peter Clausene03b9752014-11-23 15:04:13 +0100569 .suspend_bias_off = true,
570
Russell King113591e2013-07-30 11:18:52 +0100571 .dapm_widgets = uda134x_dapm_widgets,
572 .num_dapm_widgets = ARRAY_SIZE(uda134x_dapm_widgets),
573 .dapm_routes = uda134x_dapm_routes,
574 .num_dapm_routes = ARRAY_SIZE(uda134x_dapm_routes),
Christian Pellegrin1cad1de2008-11-15 08:58:16 +0100575};
Christian Pellegrin1cad1de2008-11-15 08:58:16 +0100576
Bill Pemberton7a79e942012-12-07 09:26:37 -0500577static int uda134x_codec_probe(struct platform_device *pdev)
Mark Brown64089b82008-12-08 19:17:58 +0000578{
Lars-Peter Clausenf15c4442015-07-13 12:26:45 +0200579 struct uda134x_priv *uda134x;
580
581 uda134x = devm_kzalloc(&pdev->dev, sizeof(*uda134x), GFP_KERNEL);
582 if (!uda134x)
583 return -ENOMEM;
584
585 platform_set_drvdata(pdev, uda134x);
586
Liam Girdwoodf0fba2a2010-03-17 20:15:21 +0000587 return snd_soc_register_codec(&pdev->dev,
588 &soc_codec_dev_uda134x, &uda134x_dai, 1);
Mark Brown64089b82008-12-08 19:17:58 +0000589}
Mark Brown64089b82008-12-08 19:17:58 +0000590
Bill Pemberton7a79e942012-12-07 09:26:37 -0500591static int uda134x_codec_remove(struct platform_device *pdev)
Mark Brown64089b82008-12-08 19:17:58 +0000592{
Liam Girdwoodf0fba2a2010-03-17 20:15:21 +0000593 snd_soc_unregister_codec(&pdev->dev);
594 return 0;
Mark Brown64089b82008-12-08 19:17:58 +0000595}
Liam Girdwoodf0fba2a2010-03-17 20:15:21 +0000596
597static struct platform_driver uda134x_codec_driver = {
598 .driver = {
599 .name = "uda134x-codec",
Liam Girdwoodf0fba2a2010-03-17 20:15:21 +0000600 },
601 .probe = uda134x_codec_probe,
Bill Pemberton7a79e942012-12-07 09:26:37 -0500602 .remove = uda134x_codec_remove,
Liam Girdwoodf0fba2a2010-03-17 20:15:21 +0000603};
604
Mark Brown5bbcc3c2011-11-23 22:52:08 +0000605module_platform_driver(uda134x_codec_driver);
Mark Brown64089b82008-12-08 19:17:58 +0000606
Christian Pellegrin1cad1de2008-11-15 08:58:16 +0100607MODULE_DESCRIPTION("UDA134X ALSA soc codec driver");
608MODULE_AUTHOR("Zoltan Devai, Christian Pellegrin <chripell@evolware.org>");
609MODULE_LICENSE("GPL");