blob: 896d392dc14d12d4fbae948c3491a56fadf2e5c5 [file] [log] [blame]
AnilKumar Ch32bb00e2012-06-22 15:10:49 +05301/*
2 * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License version 2 as
6 * published by the Free Software Foundation.
7 */
8/dts-v1/;
9
10/include/ "am33xx.dtsi"
11
12/ {
13 model = "TI AM335x EVM";
14 compatible = "ti,am335x-evm", "ti,am33xx";
15
AnilKumar Chefeedcf2012-08-31 15:07:20 +053016 cpus {
17 cpu@0 {
18 cpu0-supply = <&vdd1_reg>;
19 };
20 };
21
AnilKumar Ch32bb00e2012-06-22 15:10:49 +053022 memory {
23 device_type = "memory";
24 reg = <0x80000000 0x10000000>; /* 256 MB */
25 };
Vaibhav Hiremath53d91032012-08-15 16:53:25 +053026
AnilKumar Ch5d9b66f2012-11-06 19:18:29 +053027 am33xx_pinmux: pinmux@44e10800 {
28 pinctrl-names = "default";
Vaibhav Hiremath4d927572013-05-20 18:58:10 +053029 pinctrl-0 = <&matrix_keypad_s0 &volume_keys_s0 &clkout2_pin>;
AnilKumar Ch5d9b66f2012-11-06 19:18:29 +053030
31 matrix_keypad_s0: matrix_keypad_s0 {
32 pinctrl-single,pins = <
33 0x54 0x7 /* gpmc_a5.gpio1_21, OUTPUT | MODE7 */
34 0x58 0x7 /* gpmc_a6.gpio1_22, OUTPUT | MODE7 */
35 0x64 0x27 /* gpmc_a9.gpio1_25, INPUT | MODE7 */
36 0x68 0x27 /* gpmc_a10.gpio1_26, INPUT | MODE7 */
37 0x6c 0x27 /* gpmc_a11.gpio1_27, INPUT | MODE7 */
38 >;
39 };
AnilKumar Ch404aa0d2012-11-06 19:18:31 +053040
41 volume_keys_s0: volume_keys_s0 {
42 pinctrl-single,pins = <
43 0x150 0x27 /* spi0_sclk.gpio0_2, INPUT | MODE7 */
44 0x154 0x27 /* spi0_d0.gpio0_3, INPUT | MODE7 */
45 >;
46 };
Vaibhav Hiremath3f866442013-03-26 14:14:01 +053047
48 i2c0_pins: pinmux_i2c0_pins {
49 pinctrl-single,pins = <
50 0x188 0x30 /* i2c0_sda.i2c0_sda PULLUP | INPUTENABLE | MODE0 */
51 0x18c 0x30 /* i2c0_scl.i2c0_scl PULLUP | INPUTENABLE | MODE0 */
52 >;
53 };
54
55 i2c1_pins: pinmux_i2c1_pins {
56 pinctrl-single,pins = <
57 0x158 0x32 /* spi0_d1.i2c1_sda PULLUP | INPUTENABLE | MODE2 */
58 0x15c 0x32 /* spi0_cs0.i2c1_scl PULLUP | INPUTENABLE | MODE2 */
59 >;
60 };
Vaibhav Hiremath9f2fbe12013-03-27 16:31:34 +053061
62 uart0_pins: pinmux_uart0_pins {
63 pinctrl-single,pins = <
64 0x170 0x30 /* uart0_rxd.uart0_rxd PULLUP | INPUTENABLE | MODE0 */
65 0x174 0x00 /* uart0_txd.uart0_txd PULLDOWN | MODE0 */
66 >;
67 };
Vaibhav Hiremath4d927572013-05-20 18:58:10 +053068
69 clkout2_pin: pinmux_clkout2_pin {
70 pinctrl-single,pins = <
71 0x1b4 0x03 /* xdma_event_intr1.clkout2 OMAP_MUX_MODE3 | AM33XX_PIN_OUTPUT */
72 >;
73 };
AnilKumar Ch5d9b66f2012-11-06 19:18:29 +053074 };
75
Vaibhav Hiremath53d91032012-08-15 16:53:25 +053076 ocp {
Vaibhav Hiremathdde3b0d2013-03-28 11:36:05 +053077 uart0: serial@44e09000 {
Vaibhav Hiremath9f2fbe12013-03-27 16:31:34 +053078 pinctrl-names = "default";
79 pinctrl-0 = <&uart0_pins>;
80
Vaibhav Hiremath53d91032012-08-15 16:53:25 +053081 status = "okay";
82 };
AnilKumar Ch1b2a9702012-08-21 16:47:29 +053083
AnilKumar Chb918e2c2012-11-21 17:22:17 +053084 i2c0: i2c@44e0b000 {
Vaibhav Hiremath3f866442013-03-26 14:14:01 +053085 pinctrl-names = "default";
86 pinctrl-0 = <&i2c0_pins>;
87
AnilKumar Ch1b2a9702012-08-21 16:47:29 +053088 status = "okay";
89 clock-frequency = <400000>;
90
Vaibhav Hiremath5d83cb82012-08-27 16:59:08 +053091 tps: tps@2d {
92 reg = <0x2d>;
AnilKumar Ch1b2a9702012-08-21 16:47:29 +053093 };
94 };
AnilKumar Ch492dd022012-09-20 02:49:29 +053095
AnilKumar Chb918e2c2012-11-21 17:22:17 +053096 i2c1: i2c@4802a000 {
Vaibhav Hiremath3f866442013-03-26 14:14:01 +053097 pinctrl-names = "default";
98 pinctrl-0 = <&i2c1_pins>;
99
AnilKumar Ch492dd022012-09-20 02:49:29 +0530100 status = "okay";
AnilKumar Chcd5cfac2012-09-21 21:19:11 +0530101 clock-frequency = <100000>;
AnilKumar Ch492dd022012-09-20 02:49:29 +0530102
103 lis331dlh: lis331dlh@18 {
104 compatible = "st,lis331dlh", "st,lis3lv02d";
105 reg = <0x18>;
106 Vdd-supply = <&lis3_reg>;
107 Vdd_IO-supply = <&lis3_reg>;
108
109 st,click-single-x;
110 st,click-single-y;
111 st,click-single-z;
112 st,click-thresh-x = <10>;
113 st,click-thresh-y = <10>;
114 st,click-thresh-z = <10>;
115 st,irq1-click;
116 st,irq2-click;
117 st,wakeup-x-lo;
118 st,wakeup-x-hi;
119 st,wakeup-y-lo;
120 st,wakeup-y-hi;
121 st,wakeup-z-lo;
122 st,wakeup-z-hi;
123 st,min-limit-x = <120>;
124 st,min-limit-y = <120>;
125 st,min-limit-z = <140>;
126 st,max-limit-x = <550>;
127 st,max-limit-y = <550>;
128 st,max-limit-z = <750>;
129 };
AnilKumar Chbf078552012-09-20 02:49:30 +0530130
AnilKumar Chcd5cfac2012-09-21 21:19:11 +0530131 tsl2550: tsl2550@39 {
132 compatible = "taos,tsl2550";
133 reg = <0x39>;
134 };
135
AnilKumar Chbf078552012-09-20 02:49:30 +0530136 tmp275: tmp275@48 {
137 compatible = "ti,tmp275";
138 reg = <0x48>;
139 };
AnilKumar Ch492dd022012-09-20 02:49:29 +0530140 };
AnilKumar Ch1b2a9702012-08-21 16:47:29 +0530141 };
142
143 vbat: fixedregulator@0 {
144 compatible = "regulator-fixed";
145 regulator-name = "vbat";
146 regulator-min-microvolt = <5000000>;
147 regulator-max-microvolt = <5000000>;
148 regulator-boot-on;
149 };
AnilKumar Ch492dd022012-09-20 02:49:29 +0530150
151 lis3_reg: fixedregulator@1 {
152 compatible = "regulator-fixed";
153 regulator-name = "lis3_reg";
154 regulator-boot-on;
155 };
AnilKumar Ch2ca1d312012-11-06 19:18:30 +0530156
157 matrix_keypad: matrix_keypad@0 {
158 compatible = "gpio-matrix-keypad";
159 debounce-delay-ms = <5>;
160 col-scan-delay-us = <2>;
161
AnilKumar Chb918e2c2012-11-21 17:22:17 +0530162 row-gpios = <&gpio1 25 0 /* Bank1, pin25 */
163 &gpio1 26 0 /* Bank1, pin26 */
164 &gpio1 27 0>; /* Bank1, pin27 */
AnilKumar Ch2ca1d312012-11-06 19:18:30 +0530165
AnilKumar Chb918e2c2012-11-21 17:22:17 +0530166 col-gpios = <&gpio1 21 0 /* Bank1, pin21 */
167 &gpio1 22 0>; /* Bank1, pin22 */
AnilKumar Ch2ca1d312012-11-06 19:18:30 +0530168
169 linux,keymap = <0x0000008b /* MENU */
170 0x0100009e /* BACK */
171 0x02000069 /* LEFT */
172 0x0001006a /* RIGHT */
173 0x0101001c /* ENTER */
174 0x0201006c>; /* DOWN */
175 };
AnilKumar Ch822c9932012-11-06 19:18:32 +0530176
177 gpio_keys: volume_keys@0 {
178 compatible = "gpio-keys";
179 #address-cells = <1>;
180 #size-cells = <0>;
181 autorepeat;
182
183 switch@9 {
184 label = "volume-up";
185 linux,code = <115>;
AnilKumar Chb918e2c2012-11-21 17:22:17 +0530186 gpios = <&gpio0 2 1>;
AnilKumar Ch822c9932012-11-06 19:18:32 +0530187 gpio-key,wakeup;
188 };
189
190 switch@10 {
191 label = "volume-down";
192 linux,code = <114>;
AnilKumar Chb918e2c2012-11-21 17:22:17 +0530193 gpios = <&gpio0 3 1>;
AnilKumar Ch822c9932012-11-06 19:18:32 +0530194 gpio-key,wakeup;
195 };
196 };
AnilKumar Ch1b2a9702012-08-21 16:47:29 +0530197};
198
199/include/ "tps65910.dtsi"
200
201&tps {
202 vcc1-supply = <&vbat>;
203 vcc2-supply = <&vbat>;
204 vcc3-supply = <&vbat>;
205 vcc4-supply = <&vbat>;
206 vcc5-supply = <&vbat>;
207 vcc6-supply = <&vbat>;
208 vcc7-supply = <&vbat>;
209 vccio-supply = <&vbat>;
210
211 regulators {
212 vrtc_reg: regulator@0 {
213 regulator-always-on;
214 };
215
216 vio_reg: regulator@1 {
217 regulator-always-on;
218 };
219
220 vdd1_reg: regulator@2 {
221 /* VDD_MPU voltage limits 0.95V - 1.26V with +/-4% tolerance */
222 regulator-name = "vdd_mpu";
223 regulator-min-microvolt = <912500>;
224 regulator-max-microvolt = <1312500>;
225 regulator-boot-on;
226 regulator-always-on;
227 };
228
229 vdd2_reg: regulator@3 {
230 /* VDD_CORE voltage limits 0.95V - 1.1V with +/-4% tolerance */
231 regulator-name = "vdd_core";
232 regulator-min-microvolt = <912500>;
233 regulator-max-microvolt = <1150000>;
234 regulator-boot-on;
235 regulator-always-on;
236 };
237
238 vdd3_reg: regulator@4 {
239 regulator-always-on;
240 };
241
242 vdig1_reg: regulator@5 {
243 regulator-always-on;
244 };
245
246 vdig2_reg: regulator@6 {
247 regulator-always-on;
248 };
249
250 vpll_reg: regulator@7 {
251 regulator-always-on;
252 };
253
254 vdac_reg: regulator@8 {
255 regulator-always-on;
256 };
257
258 vaux1_reg: regulator@9 {
259 regulator-always-on;
260 };
261
262 vaux2_reg: regulator@10 {
263 regulator-always-on;
264 };
265
266 vaux33_reg: regulator@11 {
267 regulator-always-on;
268 };
269
270 vmmc_reg: regulator@12 {
271 regulator-always-on;
272 };
Vaibhav Hiremath53d91032012-08-15 16:53:25 +0530273 };
AnilKumar Ch32bb00e2012-06-22 15:10:49 +0530274};
Mugunthan V N1a39a652012-11-14 09:08:00 +0000275
276&cpsw_emac0 {
277 phy_id = <&davinci_mdio>, <0>;
278};
279
280&cpsw_emac1 {
281 phy_id = <&davinci_mdio>, <1>;
282};