1. 5fd2a84 OMAP3: set the core dpll clk rate in its set_rate function by Avinash H.M · 14 years ago
  2. 657ebfa OMAP3/4 clock: split into per-chip family files by Paul Walmsley · 15 years ago
  3. 35e424e OMAP3 clock: split out DPLL3 M2 divider functions into mach-omap2/clkt34xx_dpll3m2.c by Paul Walmsley · 15 years ago