1. 8062b4a Merge tag 'sunxi-clk-for-4.12' of https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux into clk-next by Stephen Boyd · 8 years ago
  2. 372fa10 clk: sunxi-ng: a33: gate then ungate PLL CPU clk after rate change by Chen-Yu Tsai · 8 years ago
  3. 68f37d86 clk: sunxi-ng: a33: Add offset and minimum value for DDR1 PLL N factor by Chen-Yu Tsai · 8 years ago
  4. 64afa89 clk: sunxi-ng: a33: Set CLK_SET_RATE_PARENT for the GPU by Maxime Ripard · 8 years ago
  5. 603a0c8 clk: sunxi-ng: a33: Add CLK_SET_RATE_PARENT to ac-dig by Mylène Josserand · 8 years ago
  6. bb021cd clk: sunxi-ng: set the parent rate when adjustin CPUX clock on A33 by Icenowy Zheng · 8 years ago
  7. 790d929 clk: sunxi-ng: fix PLL_CPUX adjusting on A33 by Icenowy Zheng · 8 years ago
  8. 98fb2b9 clk: sunxi-ng: enable so-said LDOs for A33 SoC's pll-mipi clock by Icenowy Zheng · 8 years ago
  9. 5519cf2 clk: sunxi-ng: Fix reset offset for the A23 and A33 by Maxime Ripard · 8 years ago
  10. d05c748 clk: sunxi-ng: Add A33 CCU support by Maxime Ripard · 9 years ago