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gerrit-public.fairphone.software / kernel / msm-5.4 / a398e9c79eea74ba2f3f24ac08902661682f008c / drivers / gpu / drm / i915 / intel_pm.c
  1. a398e9c drm/i915: Round-up clock and limit drain latency by Gajanan Bhat · 11 years ago
  2. 0948c26 drm/i915: Generalize drain latency computation by Gajanan Bhat · 11 years ago
  3. efd814b drm/i915: Polish the chv cmnlane resrt macros by Ville Syrjälä · 11 years ago
  4. 3dd7b974 drm/i915: Hack to tie both common lanes together on chv by Ville Syrjälä · 11 years ago
  5. 3c2777f drm/i915: Add cherryview_update_wm() by Ville Syrjälä · 11 years ago
  6. 41aad81 drm/i915: Update DDL only for current CRTC by Gajanan Bhat · 11 years ago
  7. 1abc4dc drm/i915: Parametrize VLV_DDL registers by Ville Syrjälä · 11 years ago
  8. 0a56067 drm/i915: Fill out the FWx watermark register defines by Ville Syrjälä · 11 years ago
  9. da46f93 drm/i915: Introduce FBC False Color for debug purposes. by Rodrigo Vivi · 11 years ago
  10. a504345 drm/i915: Split a few long debug prints by Ville Syrjälä · 11 years ago
  11. 2ce147f drm/i915: Add chv port D TX wells by Ville Syrjälä · 11 years ago
  12. 8258356 drm/i915: Add chv port B and C TX wells by Ville Syrjälä · 11 years ago
  13. 26972b0 drm/i915: Add per-pipe power wells for chv by Ville Syrjälä · 11 years ago
  14. f07057d drm/i915: Add disp2d power well for chv by Ville Syrjälä · 11 years ago
  15. 5d6f7ea drm/i915: Add chv cmnlane power wells by Ville Syrjälä · 11 years ago
  16. 4811ff4 drm/i915: Add chv_power_wells[] by Ville Syrjälä · 11 years ago
  17. 69bbeb4 drm/i915: Fix threshold for choosing 32 vs. 64 precisions for VLV DDL values by Ville Syrjälä · 11 years ago
  18. 22c5aee drm/i915: Fix drain latency precision multipler for VLV by Zhenyu Wang · 11 years ago
  19. df662a2 drm/i915: Tune down MCH_SSKPD values warning by Daniel Vetter · 11 years ago
  20. 8dfd1f0 drm/i915: Tune done rc6 enabling output by Daniel Vetter · 11 years ago
  21. 9df7575f drm/i915: add helper for checking whether IRQs are enabled by Jesse Barnes · 11 years ago
  22. d49bdb0 drm/i915: extract and improve gen8_irq_power_well_post_enable by Paulo Zanoni · 11 years ago
  23. 480c803 drm/i915: Use genX_ prefix for gt irq enable/disable functions by Daniel Vetter · 11 years ago
  24. ed57cb8 drm/i915: Also give the sprite width for WM computation by Damien Lespiau · 11 years ago
  25. 3463811 drm/i915/chv: Drop WaGsvBringDownFreqInRc6 by Deepak S · 11 years ago
  26. b47adc1 drm/i915: Force GPU Freq to lowest while suspending. by Deepak S · 11 years ago
  27. b55dd64 drm/i915: byt_gpu_freq() can be static by Fengguang Wu · 11 years ago
  28. 7707df4 drm/i915: Add RP1 render P state thresholds in CHV by Deepak S · 11 years ago
  29. 3497a56 drm/i915/chv: Add basic PM interrupt support for CHV by Deepak S · 11 years ago
  30. 22b1b2f drm/i915: CHV GPU frequency to opcode functions by Deepak S · 11 years ago
  31. 67c3bf6 drm/i915: populate mem_freq/cz_clock for chv by Deepak S · 11 years ago
  32. f8f2b00 drm/i915: Read guaranteed freq for valleyview by Deepak S · 11 years ago
  33. 03af204 drm/i915: Use the cached min/min/rpe values in the vlv debugfs code by Ville Syrjälä · 11 years ago
  34. 7b3c29f drm/i915: Make the RPS interrupt generation mask handle the vlv wa by Chris Wilson · 11 years ago
  35. bd2bb1b drm/i915: add POWER_DOMAIN_PLLS by Paulo Zanoni · 11 years ago
  36. 2ff8fde drm/i915: Make use of intel_fb_obj() (v2) by Matt Roper · 11 years ago
  37. 31685c2 drm/i915/vlv: WA for Turbo and RC6 to work together. by Deepak S · 11 years ago
  38. b3f9ad9 drm/i915/bdw: 3D_CHICKEN3 has write mask bits by Michel Thierry · 11 years ago
  39. 9858425 drm/i915: gmch: set SR WMs to valid values before enabling them by Imre Deak · 11 years ago
  40. 5209b1f drm/i915: gmch: factor out intel_set_memory_cxsr by Imre Deak · 11 years ago
  41. d2011dc drm/i915: Move VLV cmnlane workaround to intel_power_domains_init_hw() by Ville Syrjälä · 11 years ago
  42. aa519f2 drm/i915: Pull the cmnlane tricks into its own power well ops by Ville Syrjälä · 11 years ago
  43. f8bf63f drm/i915: Kill duplicated cdclk readout code from i2c by Ville Syrjälä · 11 years ago
  44. d197b7d drm/i915: Move vlv cdclk code to .get_display_clock_speed() by Ville Syrjälä · 11 years ago
  45. dfcab17 drm/i915: Change vlv cdclk to use kHz units by Ville Syrjälä · 11 years ago
  46. f1615bb Merge tag 'v3.16-rc4' into drm-intel-next-queued by Daniel Vetter · 11 years ago
  47. dfd7aec Merge tag 'drm-intel-fixes-2014-07-03' of git://anongit.freedesktop.org/drm-intel by Dave Airlie · 11 years ago
  48. 88b5a85 Merge tag 'sound-3.16-rc4' of git://git.kernel.org/pub/scm/linux/kernel/git/tiwai/sound by Linus Torvalds · 11 years ago
  49. c149dcb drm/i915: provide interface for audio driver to query cdclk by Jani Nikula · 11 years ago
  50. 5e59f71 drm/i915: Try harder to get FBC by Ben Widawsky · 11 years ago
  51. 0d68b25 drm/i915/bdw: Use timeout mode for RC6 on bdw by Tom O'Rourke · 11 years ago
  52. 5549d25 drm/i915: Drop early VLV WA to fix Voltage not getting dropped to Vmin by Deepak S · 11 years ago
  53. bfafe93 drm/i915: cache hw power well enabled state by Imre Deak · 11 years ago
  54. 4ef6107 Merge tag 'sound-3.16-rc2' of git://git.kernel.org/pub/scm/linux/kernel/git/tiwai/sound by Linus Torvalds · 11 years ago
  55. e11aa36 drm/i915: use runtime irq suspend/resume in freeze/thaw by Jesse Barnes · 11 years ago
  56. 5d0cf3d Merge branch 'topic/soix' into drm-intel-next-queued by Daniel Vetter · 11 years ago
  57. 032843a drm/i915: Broaden FBC resolution limit to 4096*4096 by Daisy Sun · 11 years ago
  58. 74b0c2d drm/i915, HD-audio: Don't continue probing when nomodeset is given by Takashi Iwai · 11 years ago
  59. 7405f42 drm/i915/chv: Fix "drm/i915/chv: Add a bunch of pre production workarounds" by Tom O'Rourke · 11 years ago
  60. e0f0273 drm/i915: Use named initializers for gmch wm params by Ville Syrjälä · 11 years ago
  61. 223a6f2 drm/i915/bdw: remove erroneous chv specific workarounds from bdw code by Tom O'Rourke · 11 years ago
  62. 10d8d36 drm/i915: Unifiy GT powersave suspend logic by Daniel Vetter · 11 years ago
  63. 156c7ca drm/i915: leave rc6 enabled at suspend time v4 by Jesse Barnes · 11 years ago
  64. 2b6b3a0 drm/i915/chv: Enable RPS (Turbo) for Cherryview by Deepak S · 11 years ago
  65. 3880774 drm/i915/chv: Enable Render Standby (RC6) for Cherryview by Deepak S · 11 years ago
  66. 0368920 drm/i915: Disable FBC by default also on Haswell and later by Chris Wilson · 11 years ago
  67. ecb889e Merge tag 'drm-intel-fixes-2014-06-06' of git://anongit.freedesktop.org/drm-intel into drm-next by Dave Airlie · 11 years ago
  68. 8d4ad9d Merge commit '9e9a928eed8796a0a1aaed7e0b676db86ba84594' into drm-next by Dave Airlie · 11 years ago
  69. b8c000d drm/i915: fix display power sw state reporting by Imre Deak · 11 years ago
  70. dbb4274 drm/i915: Move the C3 LP write bit setup to gen3_init_clock_gating() for KMS by Ville Syrjälä · 11 years ago
  71. 54e472a drm/i915: Enable interrupt-based AGPBUSY# enable on 85x by Ville Syrjälä · 11 years ago
  72. 3299254 drm/i915: Flip the sense of AGPBUSY_DIS bit by Ville Syrjälä · 11 years ago
  73. 12fabbcb9 drm/i915: Set AGPBUSY# bit in init_clock_gating by Ville Syrjälä · 11 years ago
  74. 4dfbd12 drm/i915/vlv: add pll assertion when disabling DPIO common well by Jesse Barnes · 11 years ago
  75. f618e38 drm/i915/vlv: move DPIO common reset de-assert into __vlv_set_power_well by Jesse Barnes · 11 years ago
  76. f099a3c drm/i915/vlv: re-order power wells so DPIO common comes after TX by Jesse Barnes · 11 years ago
  77. b00f025 drm/i915/vlv: move CRI refclk enable into __vlv_set_power_well by Jesse Barnes · 11 years ago
  78. 5702105 drm/i915/vlv: assert and de-assert sideband reset at boot and resume v3 by Jesse Barnes · 11 years ago
  79. c98f506 drm/i915/vlv: Modifying WA 'WaDisableL3Bank2xClockGate for vlv by Akash Goel · 11 years ago
  80. a4872ba drm/i915: s/intel_ring_buffer/intel_engine_cs by Oscar Mateo · 11 years ago
  81. e494837 drm/i915: fix possible RPM ref leaking during RPS disabling by Imre Deak · 11 years ago
  82. d40d918 Merge branch 'topic/drm-vblank-rework' into drm-intel-next-queued by Daniel Vetter · 11 years ago
  83. c5ab3bc drm/i915: Accurately initialize fifo underrun state on gmch platforms by Daniel Vetter · 11 years ago
  84. fd68e23 drm/i915: rip our vblank reset hacks for runtime PM by Daniel Vetter · 11 years ago
  85. e4443e4 drm/i915/chv: Add a bunch of pre production workarounds by Ville Syrjälä · 11 years ago
  86. e0d34ce drm/i915/chv: Implement WaDisableSamplerPowerBypass for CHV by Rafael Barbalho · 11 years ago
  87. c631780 drm/i915/chv: Implement WaDisableSDEUnitClockGating:chv by Ville Syrjälä · 11 years ago
  88. 0846697 drm/i915/chv: Implement WaDisableCSUnitClockGating:chv by Ville Syrjälä · 11 years ago
  89. acea6f9 drm/i915/chv: Implement WaDisableSemaphoreAndSyncFlipWait:chv by Ville Syrjälä · 11 years ago
  90. 232ce33 drm/i915/chv: Implement WaVSRefCountFullforceMissDisable:chv and WaDSRefCountFullforceMissDisable:chv by Ville Syrjälä · 11 years ago
  91. a706802 drm/i915/chv: Implement WaDisableThreadStallDopClockGating:chv by Ville Syrjälä · 11 years ago
  92. dd811e7 drm/i915/chv: Implement WaDisablePartialInstShootdown:chv by Ville Syrjälä · 11 years ago
  93. 992f191 drm/i915: Be careful with non-disp bit in PMINTRMSK by Mika Kuoppala · 11 years ago
  94. b7bb243 drm/i915: Enable rc6 with bdw by Mika Kuoppala · 11 years ago
  95. 8fd9c1a9 drm/i915: Fix rc6 options debug info by Mika Kuoppala · 11 years ago
  96. baccd45 drm/i915: Enable PM Interrupts target via Display Interface. by Deepak S · 11 years ago
  97. 0961021 drm/i915/bdw: Implement a basic PM interrupt handler by Ben Widawsky · 11 years ago
  98. e95a2f7 drm/i915: Increase WM memory latency values on SNB by Ville Syrjälä · 11 years ago
  99. 70e1e0e drm/i915: Use for_each_crtc() when iterating through the CRTCs by Damien Lespiau · 11 years ago
  100. d3fcc80 drm/i915: Use for_each_intel_crtc() when iterating through intel_crtcs by Damien Lespiau · 11 years ago