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gerrit-public.fairphone.software / kernel / msm-5.4 / aa610dcb7c1999fe3353562340a72196d9a54ae0 / drivers / gpu / drm / i915 / i915_reg.h
  1. aa610dc drm/i915/bxt: add DDI port HW readout support by Imre Deak · 10 years ago
  2. 05712c1 drm/i915/bxt: add missing DDI PLL registers to the state checking by Imre Deak · 10 years ago
  3. f8896f5 drm/i915/skl: Buffer translation improvements by David Weinehall · 10 years ago
  4. 54f1b6e drm/i915: Compute display FIFO split dynamically for CHV by Ville Syrjälä · 10 years ago
  5. 3504056 drm/i915: Update rps frequencies for BXT by Bob Paauwe · 10 years ago
  6. 0160f05 drm/i915/gen8: Add WaClearSlmSpaceAtContextSwitch workaround by Arun Siluvery · 10 years ago
  7. c82435b drm/i915/gen8: Add WaFlushCoherentL3CacheLinesAtContextSwitch workaround by Arun Siluvery · 10 years ago
  8. 7fd2d26 drm/i915: Reset request handling for gen8+ by Mika Kuoppala · 10 years ago
  9. b0a08be drm/i915/bxt: eDP Panel Power sequencing by Vandana Kannan · 10 years ago
  10. 31b9df1 drm/i915: print FBC compression status on debugfs by Paulo Zanoni · 10 years ago
  11. 7cd3527 drm/i915: Delete duplicate #defines added for DCx by Chandra Konduru · 10 years ago
  12. 6d67415 drm/i915: Send GCP infoframes for deep color HDMI sinks by Ville Syrjälä · 10 years ago
  13. d1b1589 drm/i915: Implement WaEnableHDMI8bpcBefore12bpc:snb, ivb by Ville Syrjälä · 10 years ago
  14. a9419e8 drm/i915/skl: Derive the max CDCLK from DFSM by Damien Lespiau · 10 years ago
  15. b432e5c drm/i915: BDW clock change support by Ville Syrjälä · 10 years ago
  16. 34edce2 drm/i915: Add cdclk extraction for g33, g965gm and g4x by Ville Syrjälä · 10 years ago
  17. 1b1d271 drm/i915: Fix i855 get_display_clock_speed by Ville Syrjälä · 10 years ago
  18. fde61e4 drm/i915: Throw out WIP CHV power well definitions by Ville Syrjälä · 10 years ago
  19. bc28454 drm/i915: Use the default 600ns LDO programming sequence delay by Ville Syrjälä · 10 years ago
  20. 6d50b06 drm/i915: Enable GTT caching on gen8 by Ville Syrjälä · 10 years ago
  21. adc289d drm/i915: Clean up the CPT DP .get_hw_state() port readout by Ville Syrjälä · 10 years ago
  22. 5d96d8a drm/i915/skl: Deinit/init the display at suspend/resume by Damien Lespiau · 10 years ago
  23. 2a0ee94 drm/i915/bxt: fix WaForceContextSaveRestoreNonCoherent on steppings B0+ by Imre Deak · 10 years ago
  24. b6dc71f drm/i915/bxt: Port PLL programming BUN by Vandana Kannan · 10 years ago
  25. 2cd601c drm/i915: Adding dbuf support for skl nv12 format. by Chandra Konduru · 10 years ago
  26. 7072246 drm/i915: Work around DISPLAY_PHY_CONTROL register corruption on CHV by Ville Syrjälä · 10 years ago
  27. 2e523e9 drm/i915: Implement chv display PHY lane stagger setup by Ville Syrjälä · 10 years ago
  28. f1d3d34 drm/i915/skl: Fix WaDisableChickenBitTSGBarrierAckForFFSliceCS by Damien Lespiau · 10 years ago
  29. 983b4b9 drm/i915/bxt: Add WaDisableSbeCacheDispatchPortSharing by Nick Hoath · 10 years ago
  30. 0fb890c drm/i915/bxt: BLC implementation by Vandana Kannan · 10 years ago
  31. 57520bc drm/i915: Merge the GEN9 memory latency PCU opcode with its friends by Damien Lespiau · 10 years ago
  32. 9043ae0 drm/i915: Re-order the PCU opcodes by Damien Lespiau · 10 years ago
  33. 71cd842 drm/i915/skl: Fix the CTRL typo in the DPLL_CRTL1 defines by Damien Lespiau · 10 years ago
  34. 3ef6234 drm/i915: Setup static bias for GPU by Deepak S · 10 years ago
  35. 6b457d3 drm/i915/skl: Implement enable/disable for Display C5 state. by A.Sunil Kamath · 10 years ago
  36. e1dee19 Merge tag 'drm-intel-next-2015-04-23-fixed' of git://anongit.freedesktop.org/drm-intel into drm-next by Dave Airlie · 10 years ago
  37. a04f90a drm/i915/chv: Implement WaDisableShadowRegForCpd by Deepak S · 10 years ago
  38. 9535c47 drm/i915: cope with large i2c transfers by Dmitry Torokhov · 10 years ago
  39. 96fb9f9 drm/i915/bxt: VSwing programming sequence by Vandana Kannan · 11 years ago
  40. dfb8240 drm/i915/bxt: Define bxt DDI PLLs and implement enable/disable sequence by Satheeshakrishna M · 11 years ago
  41. 664326f drm/i915/bxt: Implement enable/disable for Display C9 state by A.Sunil Kamath · 11 years ago
  42. eee2156 drm/i915/bxt: add description about the BXT PHYs by Imre Deak · 10 years ago
  43. 5c6706e drm/i915/bxt: add display initialize/uninitialize sequence (PHY) by Vandana Kannan · 11 years ago
  44. f8437dd1 drm/i915/bxt: add display initialize/uninitialize sequence (CDCLK) by Vandana Kannan · 11 years ago
  45. cff5190 drm/i915: PSR: Remove wrong LINK_DISABLE. by Rodrigo Vivi · 10 years ago
  46. 9e63743 drm/i915/bxt: Enable GMBUS IRQ by Shashank Sharma · 11 years ago
  47. e0a20ad drm/i915/bxt: DDI Hotplug interrupt setup by Shashank Sharma · 10 years ago
  48. 4c27283 drm/i915: add bxt gmbus support by Jani Nikula · 10 years ago
  49. c5fe557 Merge branch 'topic/bxt-stage1' into drm-intel-next-queued by Daniel Vetter · 10 years ago
  50. e3a2905 drm/i915/bxt: add workaround to avoid PTE corruption by Robert Beckett · 10 years ago
  51. 38a39a7 drm/i915/bxt: add WaDisableMaskBasedCammingInRCC workaround by Ben Widawsky · 10 years ago
  52. 868434c drm/i915/bxt: add GEN8_HDCUNIT_CLOCK_GATE_DISABLE_HDCREQ workaround by Ben Widawsky · 10 years ago
  53. 1c9a2d4 drm/i915: Register definitions for skylake scalers by Chandra Konduru · 10 years ago
  54. 3b7a511 drm/i915/skl: Support for 90/270 rotation by Sonika Jindal · 10 years ago
  55. a4104c5 drm/i915: Naming constants to be written to GEN9_PG_ENABLE by Sagar Kamble · 10 years ago
  56. 8fb5519 drm/i915: Agressive downclocking on Baytrail by Chris Wilson · 10 years ago
  57. f9fc42f drm/i915/skl: Implement WaDisableVFUnitClockGating by Damien Lespiau · 10 years ago
  58. 1c046bc drm/i915/bxt: Support BXT in SSEU device status dump by Jeff McGee · 10 years ago
  59. dead16e drm/i915/bxt: Determine BXT slice/subslice/EU info by Jeff McGee · 10 years ago
  60. b21249c drm/i915/bxt: Add the plane4 related interrupt definitions by Damien Lespiau · 10 years ago
  61. 51ce4db drm/i915/bdw: WaProgramL3SqcReg1Default by Rodrigo Vivi · 10 years ago
  62. 474d1ec drm/i915/skl: Enabling PSR2 SU with frame sync by Sonika Jindal · 10 years ago
  63. 5ea6e5e drm/i915: index gmbus tables using the pin pair number by Jani Nikula · 10 years ago
  64. 988c701 drm/i915: rename GMBUS_PORT_* macros as GMBUS_PIN_* by Jani Nikula · 10 years ago
  65. 6c826f3 drm/i915: Add fault address to error state for gen8 and gen9 by Mika Kuoppala · 10 years ago
  66. 6f4b12f8 drm/i915: Use down ei for manual Baytrail RPS calculations by Chris Wilson · 10 years ago
  67. 43cf3bf drm/i915: Improved w/a for rps on Baytrail by Chris Wilson · 10 years ago
  68. de43ae9 drm/i915/skl: Added new macros by Akash Goel · 10 years ago
  69. f499896 drm/i915: Use FW_WM() macro for older gmch platforms too by Ville Syrjälä · 10 years ago
  70. 1566597 drm/i915: Add polish to VLV WM shift+mask operations by Ville Syrjälä · 10 years ago
  71. fc1ac8d drm/i915: Disable DDR DVFS on CHV by Ville Syrjälä · 10 years ago
  72. cfb4141 drm/i915: Enable the maxfifo PM5 mode when appropriate on CHV by Ville Syrjälä · 10 years ago
  73. 1e69cd7 drm/i915: Program PFI credits for VLV by Vidya Srinivas · 10 years ago
  74. ae80152 drm/i915: Rewrite VLV/CHV watermark code by Ville Syrjälä · 10 years ago
  75. 9cbe40c drm/i915: Update prop, int co-eff and gain threshold for CHV by Vijay Purushothaman · 10 years ago
  76. de3a0fd drm/i915: Initialize CHV digital lock detect threshold by Vijay Purushothaman · 10 years ago
  77. a945ce7e drm/i915: Disable M2 frac division for integer case by Vijay Purushothaman · 10 years ago
  78. 5575f03 drm/i915/chv: Add CHV HW status to SSEU status by Jeff McGee · 10 years ago
  79. c93043a drm/i915/chv: Determine CHV slice/subslice/EU info by Jeff McGee · 10 years ago
  80. c6beb13 drm/i915: Make sure PND deadline mode is enabled on VLV/CHV by Ville Syrjälä · 10 years ago
  81. b500472 drm/i915: Read out display FIFO size on VLV/CHV by Ville Syrjälä · 10 years ago
  82. 341c526 drm/i915: Hide VLV DDL precision handling by Ville Syrjälä · 10 years ago
  83. 1203051 drm/i915: Kill DRAIN_LATENCY_PRECISION_* defines by Ville Syrjälä · 10 years ago
  84. edf6056 drm/i915: Reduce CHV DDL multiplier to 16/8 by Ville Syrjälä · 10 years ago
  85. fd0753c drm/i915: Fix trivial typos in comments and warning message by Yannick Guerrini · 10 years ago
  86. 6fa7aec drm/i915: Support for RR switching on VLV by Vandana Kannan · 11 years ago
  87. b766879 drm/i915/skl: Tune IZ hashing when subslices are unbalanced by Damien Lespiau · 10 years ago
  88. 0cea650 drm/i915: Request full SSEU enablement on Gen9 by Jeff McGee · 11 years ago
  89. 7f992ab drm/i915/skl: Add SKL HW status to SSEU status by Jeff McGee · 11 years ago
  90. 3873218 drm/i915/skl: Determine SKL slice/subslice/EU info by Jeff McGee · 11 years ago
  91. d0bbbc4f drm/i915/skl: Implement WaDisablePowerCompilerClockGating by Damien Lespiau · 11 years ago
  92. d3eee4b drm/i915: Add new PHY reg definitions for lock threshold by Vijay Purushothaman · 10 years ago
  93. 77719d2 drm/i915/skl: Implement WaEnableLbsSlaRetryTimerDecrement by Damien Lespiau · 11 years ago
  94. 183c6da drm/i915/skl: Implement WaSetDisablePixMaskCammingAndRhwoInCommonSliceChicken by Damien Lespiau · 11 years ago
  95. 65ca751 drm/i915/skl: Implement WaBarrierPerformanceFixDisable by Damien Lespiau · 11 years ago
  96. e2db707 drm/i915/skl: Implement WaCcsTlbPrefetchDisable:skl by Damien Lespiau · 11 years ago
  97. 2caa3b2 drm/i915/skl: Implement WaDisableChickenBitTSGBarrierAckForFFSliceCS by Damien Lespiau · 11 years ago
  98. 81e231a drm/i915/skl: Implement WaDisableHDCInvalidation by Damien Lespiau · 11 years ago
  99. 8bc0ccf drm/i915/skl: Implement WaDisableLSQCROPERFforOCL by Damien Lespiau · 11 years ago
  100. 9370cd9 drm/i915/skl: Implement WaDisablePartialResolveInVc by Damien Lespiau · 11 years ago