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gerrit-public.fairphone.software / kernel / msm-5.4 / b51a284278c634c675fa22e26e9e9b97dec4518a / drivers / gpu / drm / i915 / i915_reg.h
  1. 395b291 drm/i915: Fix a few bad hex numbers in register defines by Ville Syrjälä · 10 years ago
  2. 68d9753 drm/i915: Protect register macro arguments by Ville Syrjälä · 10 years ago
  3. 699fc40 drm/i915: Include gpio_mmio_base in GMBUS reg defines by Ville Syrjälä · 10 years ago
  4. 436c6d4 drm/i915: Parametrize HSW video DIP data registers by Ville Syrjälä · 10 years ago
  5. 03999f0 drm/i915: Eliminate weird parameter inversion from BXT PPS registers by Ville Syrjälä · 10 years ago
  6. 26148bd drm/i915/bxt: Set time interval unit to 0.833us by Akash Goel · 10 years ago
  7. 7b9748c drm/i915: Add GEN7_GPGPU_DISPATCHDIMX/Y/Z to the register whitelist by Jordan Justen · 10 years ago
  8. 022e4e5 drm/i915/bxt: Modify BXT BLC according to VBT changes by Sunil Kamath · 10 years ago
  9. 11b8e4f drm/i915/bxt: Program Tx Rx and Dphy clocks by Shashank Sharma · 10 years ago
  10. 37ab081 drm/i915/bxt: DSI enable for BXT by Shashank Sharma · 10 years ago
  11. 13d70b8 drm/i915: rename INSTDONE1 to GEN4_INSTDONE1 by Imre Deak · 10 years ago
  12. bd93a50 drm/i915: rename INSTDONE to GEN2_INSTDONE by Imre Deak · 10 years ago
  13. f1d5434 drm/i915: remove duplicate names for the render ring INSTDONE register by Imre Deak · 10 years ago
  14. 923c1241 drm/i915: s/GET_CFG_CR1_REG/DPLL_CFGCR1/ etc. by Ville Syrjälä · 10 years ago
  15. 91bedd3 drm/i915/bdw: Check for slice, subslice and EU count for BDW by Łukasz Daniluk · 10 years ago
  16. bfa7df0 drm/i915: Read czclk from CCK on vlv/chv by Ville Syrjälä · 10 years ago
  17. 87d5d25 drm/i915: Renaming CCK related reg definitions by Vandana Kannan · 10 years ago
  18. e66eb81 drm/i915: Add VLV_HDMIB etc. which already include VLV_DISPLAY_BASE by Ville Syrjälä · 10 years ago
  19. f65a9c5 drm/i915: Parametrize PALETTE and LGC_PALETTE by Ville Syrjälä · 10 years ago
  20. c039b7f drm/i915: Include MCHBAR_MIRROR_BASE in ILK_GDSR by Ville Syrjälä · 10 years ago
  21. 7e435ad drm/i915: Add LO/HI PRIVATE_PAT registers by Ville Syrjälä · 10 years ago
  22. eecf613 drm/i915: Parametrize fence registers by Ville Syrjälä · 10 years ago
  23. 9c58a04 drm/i915/bxt: Set oscaledcompmethod to enable scale value by Sonika Jindal · 10 years ago
  24. 9712e68 drm/i915: Parametrize DDI_BUF_TRANS registers by Ville Syrjälä · 10 years ago
  25. 184d7c0 drm/i915: Parametrize TV luma/chroma filter registers by Ville Syrjälä · 10 years ago
  26. 616847e drm/i915: Parametrize ILK turbo registers by Ville Syrjälä · 10 years ago
  27. 4d110c7 drm/i915: Parametrize FBC_TAG registers by Ville Syrjälä · 10 years ago
  28. 22dfe79 drm/i915: Parametrize GEN7_GT_SCRATCH and GEN7_LRA_LIMITS by Ville Syrjälä · 10 years ago
  29. 7d316ae drm/i915: Implement stolen reserved detection for ctg/elk by Ville Syrjälä · 10 years ago
  30. d2e08c0 drm/i915/bxt: DSI prepare changes for BXT by Shashank Sharma · 10 years ago
  31. cfe01a5 drm/i915/bxt: Enable BXT DSI PLL by Shashank Sharma · 10 years ago
  32. 6b6d562 drm/i915/gen9: WA ST Unit Power Optimization Disable by Robert Beckett · 10 years ago
  33. 5b88aba drm/i915/bxt: Add WaSetClckGatingDisableMedia by Arun Siluvery · 10 years ago
  34. aa17cdb drm/i915: initialize backlight max from VBT by Jani Nikula · 10 years ago
  35. a52bb15 drm/i915: Rewrite BXT HPD code to conform to pre-existing style by Ville Syrjälä · 10 years ago
  36. 74c0b39 drm/i915: Add port A HPD support for SPT by Ville Syrjälä · 10 years ago
  37. 195baa0 drm/i915: Rename BXT PORTA HPD defines by Ville Syrjälä · 10 years ago
  38. 40bfd7a drm/i915: Clean up various HPD defines by Ville Syrjälä · 10 years ago
  39. e93c28f Merge tag 'drm-intel-next-fixes-2015-09-02' into drm-intel-next-queued by Daniel Vetter · 10 years ago
  40. 3014227 drm/i915: Add CHV PHY LDO power sanity checks by Ville Syrjälä · 10 years ago
  41. 6669e39 drm/i915: Add some CHV DPIO lane power state asserts by Ville Syrjälä · 10 years ago
  42. 3e28878 drm/i915: Force CL2 off in CHV x1 PHY by Ville Syrjälä · 10 years ago
  43. ee27921 drm/i915: Enable DPIO SUS clock gating on CHV by Ville Syrjälä · 10 years ago
  44. e0fce78 drm/i915: Implement PHY lane power gating for CHV by Ville Syrjälä · 10 years ago
  45. 26951ca drm/i915/skl: enable DDI-E hotplug by Xiong Zhang · 10 years ago
  46. f1afe24 drm/i915: Change SRM, LRM instructions to use correct length by Arun Siluvery · 10 years ago
  47. 4df001d drm/i915: Interrupt routing for GuC submission by Dave Gordon · 10 years ago
  48. 33a732f drm/i915: GuC-specific firmware loader by Alex Dai · 10 years ago
  49. 90a6b7b drm/i915: Move intel_dp->lane_count into pipe_config by Ville Syrjälä · 10 years ago
  50. 2dba323 drm/i915/gen8: Add 4 level switching infrastructure and lrc support by Michel Thierry · 10 years ago
  51. 3774eb5 drm/i915: fix stolen bios_reserved checks by Paulo Zanoni · 10 years ago
  52. 245d966 drm/i915:skl: Add WaEnableGapsTsvCreditFix by Arun Siluvery · 10 years ago
  53. 63c88d2 drm/i915/bxt: add support for HPD long/short pulse detection on HPD_PORT_A pin by Imre Deak · 10 years ago
  54. ca6e440 Merge tag 'drm-intel-fixes-2015-07-15' into drm-intel-next-queued by Daniel Vetter · 10 years ago
  55. 6381b55 drm/i915/gen9: Implement WaDisableKillLogic for gen 9 by Nick Hoath · 10 years ago
  56. 3bbaba0 drm/i915: Added Programming of the MOCS by Peter Antoine · 10 years ago
  57. 60bfe44 drm/i915: Apply OCD to VLV/CHV DPLL defines by Ville Syrjälä · 10 years ago
  58. 9e00084 drm/i915: Update WaFlushCoherentL3CacheLinesAtContextSwitch by Arun Siluvery · 10 years ago
  59. 4c436d55 drm/i915: Enable Resource Streamer state save/restore on MI_SET_CONTEXT by Abdiel Janulgue · 10 years ago
  60. 919032e drm/i915: Enable resource streamer bits on MI_BATCH_BUFFER_START by Abdiel Janulgue · 10 years ago
  61. e629255 drm/i915/bxt: BUNs related to port PLL by Vandana Kannan · 10 years ago
  62. c021bf1 Merge tag 'drm-intel-next-fixes-2015-07-02' of git://anongit.freedesktop.org/drm-intel by Linus Torvalds · 10 years ago
  63. aa610dc drm/i915/bxt: add DDI port HW readout support by Imre Deak · 10 years ago
  64. 05712c1 drm/i915/bxt: add missing DDI PLL registers to the state checking by Imre Deak · 10 years ago
  65. f8896f5 drm/i915/skl: Buffer translation improvements by David Weinehall · 10 years ago
  66. 2059ac3 drm/i915: fix backlight after resume on 855gm by Jani Nikula · 10 years ago
  67. 54f1b6e drm/i915: Compute display FIFO split dynamically for CHV by Ville Syrjälä · 10 years ago
  68. 099bfbf Merge branch 'drm-next' of git://people.freedesktop.org/~airlied/linux by Linus Torvalds · 10 years ago
  69. 3504056 drm/i915: Update rps frequencies for BXT by Bob Paauwe · 10 years ago
  70. 0160f05 drm/i915/gen8: Add WaClearSlmSpaceAtContextSwitch workaround by Arun Siluvery · 10 years ago
  71. c82435b drm/i915/gen8: Add WaFlushCoherentL3CacheLinesAtContextSwitch workaround by Arun Siluvery · 10 years ago
  72. 7fd2d26 drm/i915: Reset request handling for gen8+ by Mika Kuoppala · 10 years ago
  73. b0a08be drm/i915/bxt: eDP Panel Power sequencing by Vandana Kannan · 10 years ago
  74. 31b9df1 drm/i915: print FBC compression status on debugfs by Paulo Zanoni · 10 years ago
  75. 7cd3527 drm/i915: Delete duplicate #defines added for DCx by Chandra Konduru · 10 years ago
  76. 6d67415 drm/i915: Send GCP infoframes for deep color HDMI sinks by Ville Syrjälä · 10 years ago
  77. d1b1589 drm/i915: Implement WaEnableHDMI8bpcBefore12bpc:snb, ivb by Ville Syrjälä · 10 years ago
  78. a9419e8 drm/i915/skl: Derive the max CDCLK from DFSM by Damien Lespiau · 10 years ago
  79. b432e5c drm/i915: BDW clock change support by Ville Syrjälä · 10 years ago
  80. 984a854 Merge branch 'for-linus' into for-next by Takashi Iwai · 10 years ago
  81. 34edce2 drm/i915: Add cdclk extraction for g33, g965gm and g4x by Ville Syrjälä · 10 years ago
  82. 1b1d271 drm/i915: Fix i855 get_display_clock_speed by Ville Syrjälä · 10 years ago
  83. fde61e4 drm/i915: Throw out WIP CHV power well definitions by Ville Syrjälä · 10 years ago
  84. bc28454 drm/i915: Use the default 600ns LDO programming sequence delay by Ville Syrjälä · 10 years ago
  85. 6d50b06 drm/i915: Enable GTT caching on gen8 by Ville Syrjälä · 10 years ago
  86. adc289d drm/i915: Clean up the CPT DP .get_hw_state() port readout by Ville Syrjälä · 10 years ago
  87. 5d96d8a drm/i915/skl: Deinit/init the display at suspend/resume by Damien Lespiau · 10 years ago
  88. 2a0ee94 drm/i915/bxt: fix WaForceContextSaveRestoreNonCoherent on steppings B0+ by Imre Deak · 10 years ago
  89. b6dc71f drm/i915/bxt: Port PLL programming BUN by Vandana Kannan · 10 years ago
  90. 2cd601c drm/i915: Adding dbuf support for skl nv12 format. by Chandra Konduru · 10 years ago
  91. 7072246 drm/i915: Work around DISPLAY_PHY_CONTROL register corruption on CHV by Ville Syrjälä · 10 years ago
  92. 2e523e9 drm/i915: Implement chv display PHY lane stagger setup by Ville Syrjälä · 10 years ago
  93. f1d3d34 drm/i915/skl: Fix WaDisableChickenBitTSGBarrierAckForFFSliceCS by Damien Lespiau · 10 years ago
  94. 983b4b9 drm/i915/bxt: Add WaDisableSbeCacheDispatchPortSharing by Nick Hoath · 10 years ago
  95. 0fb890c drm/i915/bxt: BLC implementation by Vandana Kannan · 10 years ago
  96. 57520bc drm/i915: Merge the GEN9 memory latency PCU opcode with its friends by Damien Lespiau · 10 years ago
  97. 9043ae0 drm/i915: Re-order the PCU opcodes by Damien Lespiau · 10 years ago
  98. 71cd842 drm/i915/skl: Fix the CTRL typo in the DPLL_CRTL1 defines by Damien Lespiau · 10 years ago
  99. 3ef6234 drm/i915: Setup static bias for GPU by Deepak S · 10 years ago
  100. 6b457d3 drm/i915/skl: Implement enable/disable for Display C5 state. by A.Sunil Kamath · 10 years ago