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gerrit-public.fairphone.software / kernel / msm-5.4 / c8d1a126924fcbc1d61ceb830226e0c7afdcc841 / arch / mips / include / asm / cpu.h
  1. 6f32946 MIPS: Give Octeon+ CPUs their own cputype. by David Daney · 15 years ago
  2. f8ede0f MIPS: Loongson 2F: Add CPU frequency scaling support by Wu Zhangjin · 15 years ago
  3. 0de663e MIPS: BCM63xx: Add Broadcom 63xx CPU definitions. by Maxime Bizon · 15 years ago
  4. 270717a MIPS: Alchemy: unify CPU model constants. by Manuel Lauss · 16 years ago
  5. 0dd4781 MIPS: Add Cavium OCTEON processor constants and CPU probe. by David Daney · 16 years ago
  6. 384740d MIPS: Move headfiles to new location below arch/mips/include by Ralf Baechle · 16 years ago[Renamed from include/asm-mips/cpu.h]
  7. 2954c02 [MIPS] modify the MIPS CPU classfication by Chen, Huacai · 16 years ago
  8. a92b058 [MIPS] Move arch/mips/philips to arch/mips/nxp by Daniel Laird · 17 years ago
  9. 39b8d52 [MIPS] Add support for MIPS CMP platform. by Ralf Baechle · 17 years ago
  10. 237cfee [MIPS] Alchemy: Au1210/Au1250 CPU support by Manuel Lauss · 17 years ago
  11. 36cfbaa [MIPS] Convert list of CPU types from #define to enum. by Ralf Baechle · 17 years ago
  12. 641e97f [MIPS] Sibyte: Replace SB1 cachecode with standard R4000 class cache code. by Ralf Baechle · 17 years ago
  13. 1c0c13e [MIPS] Add support for BCM47XX CPUs. by Aurelien Jarno · 17 years ago
  14. 9267a30 [MIPS] PMC MSP71xx mips common by Marc St-Jean · 17 years ago
  15. 2a21c73 [MIPS] define Hit_Invalidate_I to Index_Invalidate_I for loongson2 by Fuxin Zhang · 17 years ago
  16. a369202 [MIPS] Enable support for the userlocal hardware register by Ralf Baechle · 17 years ago
  17. fde9782 [MIPS] Add macros to encode processor revisions. by Ralf Baechle · 17 years ago
  18. fc5d2d2 [MIPS] Use the proper technical term for naming some of the cache macros. by Ralf Baechle · 18 years ago
  19. 44d921b [MIPS] Treat R14000 like R10000. by Kumba · 19 years ago
  20. c620953 [MIPS] Fix detection and handling of the 74K processor. by Chris Dearman · 19 years ago
  21. 9cf8ff9 [MIPS] Fix CPU type bitmasks for MIPS III, IV and V. by Maciej W. Rozycki · 19 years ago
  22. 0401572 MIPS: Reorganize ISA constants strictly as bitmasks. by Ralf Baechle · 19 years ago
  23. b4672d3 MIPS: Introduce machinery for testing for MIPSxxR1/2. by Ralf Baechle · 19 years ago
  24. e7958bb MIPS: Rename MIPS_CPU_ISA_M{32,64} -> MIPS_CPU_ISA_M{32,64}R1. by Ralf Baechle · 19 years ago
  25. 93ce2f52 Add support for SB1A CPU. by Andrew Isaacson · 19 years ago
  26. 02cf211 Cleanup the mess in cpu_cache_init. by Ralf Baechle · 19 years ago
  27. 98e316d Move MIPS Technologies processor IDs to where they belong. by Maciej W. Rozycki · 19 years ago
  28. bdf21b1 Philips PNX8550 support: MIPS32-like core with 2 Trimedias on it. by Pete Popov · 19 years ago
  29. 8f40611 Detect the MIPS R2 vectored interrupt, external interrupt controller by Ralf Baechle · 19 years ago
  30. bbc7f22 Detect the 34K. by Ralf Baechle · 19 years ago
  31. e50c0a8 Support the MIPS32 / MIPS64 DSP ASE. by Ralf Baechle · 19 years ago
  32. 4194318 Cleanup decoding of MIPSxx config registers. by Ralf Baechle · 20 years ago
  33. e3ad1c2 Base Au1200 2.6 support. by Pete Popov · 20 years ago
  34. 55a6feb Add a few more PrId vendor IDs. by Ralf Baechle · 20 years ago
  35. 1da177e Linux-2.6.12-rc2 by Linus Torvalds · 20 years ago