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gerrit-public.fairphone.software / kernel / msm-5.4 / d4c2aa60dee023c66444533930030a63561f6354 / drivers / gpu / drm / i915 / intel_pm.c
  1. d4c2aa6 drm/i915/skl: Updated watermark programming by Tvrtko Ursulin · 10 years ago
  2. 8095815 drm/i915/skl: Make sure to allocate mininum sizes in the DDB by Damien Lespiau · 11 years ago
  3. 77719d2 drm/i915/skl: Implement WaEnableLbsSlaRetryTimerDecrement by Damien Lespiau · 11 years ago
  4. 2caa3b2 drm/i915/skl: Implement WaDisableChickenBitTSGBarrierAckForFFSliceCS by Damien Lespiau · 11 years ago
  5. 81e231a drm/i915/skl: Implement WaDisableHDCInvalidation by Damien Lespiau · 11 years ago
  6. 8bc0ccf drm/i915/skl: Implement WaDisableLSQCROPERFforOCL by Damien Lespiau · 11 years ago
  7. 9253c2e drm/i915/skl: Implement WaSetGAPSunitClckGateDisable by Damien Lespiau · 11 years ago
  8. 45db219 drm/i915/skl: Make the init clock gating function skylake specific by Damien Lespiau · 11 years ago
  9. 6f97235 drm/i915/skl: Document the WM read latency W/A with its name by Damien Lespiau · 11 years ago
  10. f61018b drm/i915: Disable power management for i915 driver in VM by Yu Zhang · 11 years ago
  11. c57e355 drm/i915: Support not having an init clock gating function defined by Damien Lespiau · 11 years ago
  12. 1840481 drm/i915/gen9: Implement Wa4x4STCOptimizationDisable by Hoath, Nicholas · 11 years ago
  13. 3dcd020 drm/i915/gen9: Implement WaDisableSDEUnitClockGating by Hoath, Nicholas · 11 years ago
  14. 1de4582 drm/i915/gen9: Implement WaDisableDgMirrorFixInHalfSliceChicken5 by Nick Hoath · 11 years ago
  15. ffe02b4 drm/i915: Introduce intel_set_rps() by Ville Syrjälä · 11 years ago
  16. 21a11ff drm/i915: Handle CHV in vlv_set_rps_idle() by Ville Syrjälä · 11 years ago
  17. 7c59a9c1 drm/i915: Use intel_gpu_freq() and intel_freq_opcode() by Ville Syrjälä · 11 years ago
  18. 616bc82 drm/i915: Add intel_gpu_freq() and intel_freq_opcode() by Ville Syrjälä · 11 years ago
  19. da2518f drm/i915: Change VLV WIZ hashing mode to 16x4 by Ville Syrjälä · 11 years ago
  20. eb973a5 drm/i915: Drop some more CHV pre-production workarounds by Ville Syrjälä · 11 years ago
  21. 38c2352 drm/i915/skl: Gen9 coarse power gating by Zhe Wang · 11 years ago
  22. ba1c554 drm/i915/skl: Retrieve the frequency limits by Damien Lespiau · 11 years ago
  23. b6fef0e drm/i915/skl: add turbo support by Jesse Barnes · 11 years ago
  24. 59bad94 drm/i915: Rename the forcewake get/put functions by Mika Kuoppala · 11 years ago
  25. 6e3c971 drm/i915: Make intel_crtc->config a pointer by Ander Conselvan de Oliveira · 11 years ago
  26. 2d112de drm/i915: Embedded struct drm_crtc_state in intel_crtc_state by Ander Conselvan de Oliveira · 11 years ago
  27. 5cec258 drm/i915: Rename struct intel_crtc_config to intel_crtc_state by Ander Conselvan de Oliveira · 11 years ago
  28. af5a75a Revert "Revert "drm/i915/chv: Use timeout mode for RC6 on chv"" by Ville Syrjälä · 11 years ago
  29. 3cbdb48 drm/i915: Configure GEN6_RP_DOWN_TIMEOUT on CHV by Ville Syrjälä · 11 years ago
  30. cad725f drm/i915: Change VLV GEN6_RP_DOWN_TIMEOUT value to decimal by Ville Syrjälä · 11 years ago
  31. 160614a drm/i915: Disable RC6 before configuring in on VLV/CHV by Ville Syrjälä · 11 years ago
  32. 095acd5 drm/i915: New offset for reading frequencies on CHV. by Deepak S · 11 years ago
  33. d3e7a0d Merge tag 'drm-intel-next-2015-01-17' of git://anongit.freedesktop.org/drm-intel into drm-next by Dave Airlie · 11 years ago
  34. 281d1bb Merge remote-tracking branch 'origin/master' into drm-next by Dave Airlie · 11 years ago
  35. e85a5c7 Revert "drm/i915/chv: Use timeout mode for RC6 on chv" by Rodrigo Vivi · 11 years ago
  36. 0a87a2d Merge tag 'topic/i915-hda-componentized-2015-01-12' into drm-intel-next-queued by Daniel Vetter · 11 years ago
  37. f24eeb1 drm/i915: vlv: sanitize RPS interrupt mask during GPU idling by Imre Deak · 11 years ago
  38. 59d02a1 drm/i915: fix HW lockup due to missing RPS IRQ workaround on GEN6 by Imre Deak · 11 years ago
  39. 63a3451 drm/i915: gen9: fix RPS interrupt routing to CPU vs. GT by Imre Deak · 11 years ago
  40. adc3184 Merge tag 'drm-intel-next-2014-12-19' of git://anongit.freedesktop.org/drm-intel into drm-next by Dave Airlie · 11 years ago
  41. 9441159 drm/i915: Make sample_c messages go faster on Haswell. by Kenneth Graunke · 11 years ago
  42. 5a0afd4 drm/i915/chv: Use timeout mode for RC6 on chv by Deepak S · 11 years ago
  43. dbea3ce drm/i915: sanitize RPS resetting during GPU reset by Imre Deak · 11 years ago
  44. d9d8e6b drm/i915/skl: Correcting the flushing of pipe by Sonika Jindal · 11 years ago
  45. a712f8e drm/i915/skl: Correctly updating sprite wm parameter by Sonika Jindal · 11 years ago
  46. 7ff0ebc drm/i915: Move FBC stuff to intel_fbc.c by Rodrigo Vivi · 11 years ago
  47. 9853325 drm/i915/bdw: Fix the write setting up the WIZ hashing mode by Damien Lespiau · 11 years ago
  48. d972d6e drm/i915: Convert pxvid to extvid lookup table to a function by Mika Kuoppala · 11 years ago
  49. 99990f1 drm/i915: remove the IRQs enabled WARN from intel_disable_gt_powersave by Imre Deak · 11 years ago
  50. 2837ac4 drm/i915: vlv: increase timeout when setting idle GPU freq by Imre Deak · 11 years ago
  51. 6985b35 drm/i915: Update ring freq for full gpu freq range by Tom O'Rourke · 11 years ago
  52. c7f3153 drm/i915: change initial rps frequency for gen8 by Tom O'Rourke · 11 years ago
  53. f4ab408 drm/i915: Keep min freq above floor on HSW/BDW by Tom O'Rourke · 11 years ago
  54. 93ee292 drm/i915: Use efficient frequency for HSW/BDW by Tom O'Rourke · 11 years ago
  55. 54499b2 Merge tag 'drm-intel-fixes-2014-11-19' into drm-intel-next-queued by Daniel Vetter · 11 years ago
  56. 2eb5252 drm/i915: disable rps irqs earlier during suspend/unload by Imre Deak · 11 years ago
  57. d4d70aa drm/i915: sanitize rps irq disabling by Imre Deak · 11 years ago
  58. 3cc134e drm/i915: sanitize rps irq enabling by Imre Deak · 11 years ago
  59. e534770 drm/i915: move rps irq disable one level up by Imre Deak · 11 years ago
  60. 151a49d drm/i915: Extend pcode mailbox interface by Tom O'Rourke · 11 years ago
  61. ab3fb15 drm/i915: Change CHV SKU400 GPU freq divider to 10 by Ville Syrjälä · 11 years ago
  62. 80b83b6 drm/i915: Add missing newline to 'DDR speed' debug messages by Ville Syrjälä · 11 years ago
  63. dd06f88 drm/i915: Refactor vlv/chv GPU frequency divider setup by Ville Syrjälä · 11 years ago
  64. ce611ef drm/i915: Improve PCBR debug information by Ville Syrjälä · 11 years ago
  65. 8d40c3a drm/i915: Warn if GPLL isn't used on vlv/chv by Ville Syrjälä · 11 years ago
  66. c8e9627 drm/i915: Add a name for the Punit GPLLENABLE bit by Ville Syrjälä · 11 years ago
  67. 9a3b9c7 drm/i915: Silence valleyview_set_rps() by Ville Syrjälä · 11 years ago
  68. 2208d65 drm/i915: drop WaSetupGtModeTdRowDispatch:snb by Daniel Vetter · 11 years ago
  69. f5ed50c drm/i915: Let's hope future platforms will use the same WM code as SKL by Damien Lespiau · 11 years ago
  70. dddab34 drm/i915: Clear PCODE_DATA1 on SNB+ by Damien Lespiau · 11 years ago
  71. c6e8f39 drm/i915: Read the CCK fuse register from CCK by Ville Syrjälä · 11 years ago
  72. b900b94 drm/i915: move rps irq enable/disable to i915_irq.c by Imre Deak · 11 years ago
  73. 20415c5 drm/i915: unify gen6/gen8 rps irq enable/disable by Imre Deak · 11 years ago
  74. a72fbc3 drm/i915: unify gen6/gen8 pm irq helpers by Imre Deak · 11 years ago
  75. 3e470ea drm/i915/chv: Remove pre-production workarounds by Arun Siluvery · 11 years ago
  76. 20e4936 drm/i915/skl: Enable Gen9 RC6 by Zhe Wang · 11 years ago
  77. d21b795 drm/i915/skl: Log the order in which we flush the pipes in the WM code by Damien Lespiau · 11 years ago
  78. 0e8fb7b drm/i915/skl: Flush the WM configuration by Damien Lespiau · 11 years ago
  79. 34bb56a drm/i915/skl: Stage the pipe DDB allocation by Damien Lespiau · 11 years ago
  80. 5d374d9 drm/i915/skl: Reduce the indentation level in skl_write_wm_values() by Damien Lespiau · 11 years ago
  81. afb024a drm/i915/skl: Correctly align skl_compute_plane_wm() arguments by Damien Lespiau · 11 years ago
  82. 9414f56 drm/i915/skl: Rework when the transition WMs are computed by Damien Lespiau · 11 years ago
  83. 407b50f drm/i915/skl: Move all the WM compute functions in one place by Damien Lespiau · 11 years ago
  84. e6d6617 drm/i915/skl: Make res_blocks/lines intermediate values 32 bits by Damien Lespiau · 11 years ago
  85. 21fca25 drm/i915/skl: Use a more descriptive parameter name in skl_compute_plane_wm() by Damien Lespiau · 11 years ago
  86. 16160e3 drm/i915/skl: Make 'end' of the DDB allocation entry exclusive by Damien Lespiau · 11 years ago
  87. 08db665 drm/i915/skl: Check the DDB state at modeset by Damien Lespiau · 11 years ago
  88. a269c58 drm/i915/skl: Read back the DDB allocation hw state by Damien Lespiau · 11 years ago
  89. 53b0deb drm/i915/skl: Store the new WM state at the very end of the update by Damien Lespiau · 11 years ago
  90. 4f94738 drm/i915/gen9: Disable WM if corresponding latency is 0 by Vandana Kannan · 11 years ago
  91. 367294b drm/i915/gen9: Add 2us read latency to WM level by Vandana Kannan · 11 years ago
  92. 3078999 drm/i915/skl: Read the pipe WM HW state by Pradeep Bhat · 11 years ago
  93. 8211bd5 drm/i915/skl: Program the DDB allocation by Damien Lespiau · 11 years ago
  94. b9cec07 drm/i915/skl: Allocate DDB portions for display planes by Damien Lespiau · 11 years ago
  95. 2d41c0b drm/i915/skl: SKL Watermark Computation by Pradeep Bhat · 11 years ago
  96. 2ac96d2 drm/i915/skl: Definition of SKL WM param structs for pipe/plane by Pradeep Bhat · 11 years ago
  97. 2af30a5 drm/i915/skl: Read the Memory Latency Values for WM computation by Pradeep Bhat · 11 years ago
  98. 5e56ba4 drm/i915/chv: Use 16 and 32 for low and high drain latency precision. by Rodrigo Vivi · 11 years ago
  99. 101b376 drm/i915/bdw: Remove BDW preproduction W/As until C stepping. by Rodrigo Vivi · 11 years ago
  100. 58abf1d drm/i915: Do not export RC6p and RC6pp if they don't exist by Rodrigo Vivi · 11 years ago