| commit | 00b8dd7dd71ef129176731d5fa24f5e298797599 | [log] [tgz] |
|---|---|---|
| author | Clemens Ladisch <clemens@ladisch.de> | Mon Jan 10 16:09:23 2011 +0100 |
| committer | Takashi Iwai <tiwai@suse.de> | Mon Jan 10 16:46:21 2011 +0100 |
| tree | a3cb8cef9a89f6a0b55490adab58ae257a05a294 | |
| parent | d353eaa9a8133cdad8c1da23c84f9f529a23f0c2 [diff] |
ALSA: virtuoso: use lower master clock with H6 daughterboard Because of the unshielded connector cable, it is important to use as low a master clock frequency as possible with the H6. For double rate modes (64-96 kHz), the MCLK rate is unconditionally lowered from 512x to 256x because the higher rate would not improve anything. Signed-off-by: Clemens Ladisch <clemens@ladisch.de> Signed-off-by: Takashi Iwai <tiwai@suse.de>