Merge "ARM: dts: msm: Add support for 1.1GHz for 8610"
diff --git a/arch/arm/boot/dts/msm8610.dtsi b/arch/arm/boot/dts/msm8610.dtsi
index d243b78..ad029ee 100644
--- a/arch/arm/boot/dts/msm8610.dtsi
+++ b/arch/arm/boot/dts/msm8610.dtsi
@@ -470,14 +470,25 @@
qcom,clock-a7@f9011050 {
compatible = "qcom,clock-a7-8226";
- reg = <0xf9011050 0x8>;
- reg-names = "rcg-base";
+ reg = <0xf9011050 0x8>,
+ <0xfc4b80b8 0x8>;
+ reg-names = "rcg-base", "efuse";
clock-names = "clk-4", "clk-5";
qcom,speed0-bin-v0 =
< 0 0>,
< 384000000 1>,
< 787200000 2>,
<1190400000 3>;
+ qcom,speed1-bin-v0 =
+ < 0 0>,
+ < 384000000 1>,
+ < 787200000 2>,
+ <1094400000 3>;
+ qcom,speed1-bin-v2 =
+ < 0 0>,
+ < 384000000 1>,
+ < 787200000 2>,
+ <1094400000 3>;
cpu-vdd-supply = <&apc_vreg_corner>;
};
@@ -500,6 +511,7 @@
< 600000 1525 >,
< 787200 1525 >,
< 998400 2540 >,
+ < 1094400 2540 >,
< 1190400 2540 >;
};
diff --git a/arch/arm/mach-msm/clock-8610.c b/arch/arm/mach-msm/clock-8610.c
index e9c749a..482981c 100644
--- a/arch/arm/mach-msm/clock-8610.c
+++ b/arch/arm/mach-msm/clock-8610.c
@@ -559,6 +559,7 @@
F_APCS_PLL( 768000000, 40, 0x0, 0x1, 0x0, 0x0, 0x0),
F_APCS_PLL( 787200000, 41, 0x0, 0x1, 0x0, 0x0, 0x0),
F_APCS_PLL( 998400000, 52, 0x0, 0x1, 0x0, 0x0, 0x0),
+ F_APCS_PLL(1094400000, 57, 0x0, 0x1, 0x0, 0x0, 0x0),
F_APCS_PLL(1190400000, 62, 0x0, 0x1, 0x0, 0x0, 0x0),
PLL_F_END
};