| commit | 0962b92c155968adbc3c66d748364a53ac21bc90 | [log] [tgz] |
|---|---|---|
| author | Huaibin Yang <huaibiny@codeaurora.org> | Tue Mar 27 10:11:48 2012 -0700 |
| committer | Huaibin Yang <huaibiny@codeaurora.org> | Thu Apr 12 10:07:02 2012 -0700 |
| tree | 246be0b7968b18b036af2e3d3a2cdf5116432e8a | |
| parent | 53e4d58968bb8babccf7bc32f6cee9e538c51871 [diff] |
msm: display: add 8064 clock scaling Mdp core clk table was set to max during bringup, now add scaling for use cases. Change-Id: I311510e72e3c6fdf8459df5284b29d65c082e8d1 Signed-off-by: Huaibin Yang <huaibiny@codeaurora.org>