tree b1e2ed41a6b9b10a16fdb290f6f54cb148ccaf1a
parent a458465641bf61a00f4ca54da7265202a911f975
author David Daney <ddaney@caviumnetworks.com> 1301081931 -0700
committer Thomas Gleixner <tglx@linutronix.de> 1301402886 +0200

MIPS: Octeon: Rewrite interrupt handling code.

This includes conversion to new style irq_chip functions, and
correctly enabling/disabling per-CPU interrupts.

The hardware interrupt bit to irq number mapping is now done with a
flexible map, instead of by bit twiddling the irq number.

[ tglx: Adjusted to new irq_cpu_on/offline callbacks and
        __irq_set_affinity_lock ]

Signed-off-by: David Daney <ddaney@caviumnetworks.com>
Cc: linux-mips@linux-mips.org
Cc: ralf@linux-mips.org
LKML-Reference: <1301081931-11240-5-git-send-email-ddaney@caviumnetworks.com>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>