commit | 0d3e0460f307e84904968aad6cff97bd688583d8 | [log] [tgz] |
---|---|---|
author | Matthew Fleming <matthew.fleming@imgtec.com> | Thu Oct 02 12:24:05 2008 +0100 |
committer | Pierre Ossman <drzeus@drzeus.cx> | Sun Oct 12 11:04:37 2008 +0200 |
tree | ea939e4e6b8a5b24b294932974fbe42ca7d427be | |
parent | 7244b85bd17313d7d300ee93ec7bfbca1f4ccf3d [diff] |
MMC: CSD and CID timeout values The MMC spec states that the timeout for accessing the CSD and CID registers is 64 clock cycles. Signed-off-by: Matthew Fleming <matthew.fleming@imgtec.com> Signed-off-by: Pierre Ossman <drzeus@drzeus.cx>