tree ea939e4e6b8a5b24b294932974fbe42ca7d427be
parent 7244b85bd17313d7d300ee93ec7bfbca1f4ccf3d
author Matthew Fleming <matthew.fleming@imgtec.com> 1222946645 +0100
committer Pierre Ossman <drzeus@drzeus.cx> 1223802277 +0200

MMC: CSD and CID timeout values

The MMC spec states that the timeout for accessing the CSD and CID
registers is 64 clock cycles.

Signed-off-by: Matthew Fleming <matthew.fleming@imgtec.com>
Signed-off-by: Pierre Ossman <drzeus@drzeus.cx>