diag: Fix race condition for HSIC while in MEMORY_DEVICE_MODE
A race condition can occur when in MEMORY_DEVICE_MODE and
there are high amounts of data being read from the HSIC bridge
driver. In MEMORY_DEVICE_MODE, in the first thread the data read
from the HSIC is buffered up and a data ready bit is set. This first
thread runs in interrupt context. Later a second thread will process
the buffered data and clear the ready bit. This second thread runs in
process context. In high data throughput cases, the first thread can
add more data and set the data ready bit inbetween the second thread
processing the buffered data and clearing the data ready bit. In this
case there is data that is buffered and the data ready bit is clear. Make
modifications to protect the setting and clearing of the data ready
bit.
Change-Id: I1dfd52c55b40ab64cbb11fdcf90e5663dbbb3e87
Signed-off-by: Dixon Peterson <dixonp@codeaurora.org>
3 files changed