[PARISC] Clean up asm-parisc/serial.h
Russell King pointed out that asm/serial.h is anachronistic and we were
misusing BASE_BAUD. So fix BASE_BAUD for PCI 16550 UARTs, move LASI_BASE_BAUD
into 8250_gsc, and fix the obsolete comment about reserving serial port slots.
Signed-off-by: Matthew Wilcox <matthew@wil.cx>
Signed-off-by: Kyle McMartin <kyle@parisc-linux.org>
diff --git a/drivers/serial/8250_gsc.c b/drivers/serial/8250_gsc.c
index 1ebe6b5..c5d0add 100644
--- a/drivers/serial/8250_gsc.c
+++ b/drivers/serial/8250_gsc.c
@@ -22,7 +22,6 @@
#include <asm/hardware.h>
#include <asm/parisc-device.h>
#include <asm/io.h>
-#include <asm/serial.h> /* for LASI_BASE_BAUD */
#include "8250.h"
@@ -54,7 +53,8 @@
memset(&port, 0, sizeof(port));
port.iotype = UPIO_MEM;
- port.uartclk = LASI_BASE_BAUD * 16;
+ /* 7.272727MHz on Lasi. Assumed the same for Dino, Wax and Timi. */
+ port.uartclk = 7272727;
port.mapbase = address;
port.membase = ioremap_nocache(address, 16);
port.irq = dev->irq;
diff --git a/include/asm-parisc/serial.h b/include/asm-parisc/serial.h
index 82fd820..d7e3cc6 100644
--- a/include/asm-parisc/serial.h
+++ b/include/asm-parisc/serial.h
@@ -3,20 +3,8 @@
*/
/*
- * This assumes you have a 7.272727 MHz clock for your UART.
- * The documentation implies a 40Mhz clock, and elsewhere a 7Mhz clock
- * Clarified: 7.2727MHz on LASI. Not yet clarified for DINO
+ * This is used for 16550-compatible UARTs
*/
+#define BASE_BAUD ( 1843200 / 16 )
-#define LASI_BASE_BAUD ( 7272727 / 16 )
-#define BASE_BAUD LASI_BASE_BAUD
-
-/*
- * We don't use the ISA probing code, so these entries are just to reserve
- * space. Some example (maximal) configurations:
- * - 712 w/ additional Lasi & RJ16 ports: 4
- * - J5k w/ PCI serial cards: 2 + 4 * card ~= 34
- * A500 w/ PCI serial cards: 5 + 4 * card ~= 17
- */
-
#define SERIAL_PORT_DFNS