commit 160633ed064979143d94466ef19b32fea5703d34
author Yan He <yanhe@codeaurora.org> Thu Jun 30 12:18:56 2011 -0700
committer Bryan Huntsman <bryanh@codeaurora.org> Mon Oct 03 10:26:49 2011 -0700
tree b9413f916322366b737c2348663d9a8dc64c0d86
parent 3893b3b807fceedc10cb5e8bd39757cdb2ec4737

platform-drivers: msm: sps: add DFAB clock support for SPS driver.

Signed-off-by: Yan He <yanhe@codeaurora.org>

arch/arm/mach-msm/clock-8960.c

diff --git a/arch/arm/mach-msm/clock-8960.c b/arch/arm/mach-msm/clock-8960.c
index 1cca688..d9e6a62 100644
--- a/arch/arm/mach-msm/clock-8960.c
+++ b/arch/arm/mach-msm/clock-8960.c
@@ -3918,7 +3918,7 @@
 	CLK_LOOKUP("dfab_sdc_clk",	dfab_sdc3_clk.c, "msm_sdcc.3"),
 	CLK_LOOKUP("dfab_sdc_clk",	dfab_sdc4_clk.c, "msm_sdcc.4"),
 	CLK_LOOKUP("dfab_sdc_clk",	dfab_sdc5_clk.c, "msm_sdcc.5"),
-	CLK_LOOKUP("dfab_clk",		dfab_sps_clk.c,	NULL /* sps */),
+	CLK_LOOKUP("dfab_clk",		dfab_sps_clk.c,	"msm_sps"),
 
 	CLK_LOOKUP("ebi1_msmbus_clk",	ebi1_msmbus_clk.c, NULL),
 	CLK_LOOKUP("ebi1_clk",		ebi1_adm_clk.c, "msm_dmov"),

drivers/platform/msm/sps/sps.c

diff --git a/drivers/platform/msm/sps/sps.c b/drivers/platform/msm/sps/sps.c
index c36fa4e..c1b9bcc 100644
--- a/drivers/platform/msm/sps/sps.c
+++ b/drivers/platform/msm/sps/sps.c
@@ -718,6 +718,7 @@
 	struct sps_pipe *pipe = h;
 	struct sps_bam *bam;
 	int result;
+	int ret;
 
 	SPS_DBG("%s.", __func__);
 
@@ -725,7 +726,17 @@
 	if (bam == NULL)
 		return SPS_ERROR;
 
+	ret = clk_enable(sps->dfab_clk);
+	if (ret) {
+		SPS_ERR("sps:failed to enable dfab_clk. ret=%d", ret);
+		sps_bam_unlock(bam);
+		return SPS_ERROR;
+	}
+
 	result = sps_bam_pipe_transfer(bam, pipe->pipe_index, transfer);
+
+	clk_disable(sps->dfab_clk);
+
 	sps_bam_unlock(bam);
 
 	return result;
@@ -742,6 +753,7 @@
 	struct sps_pipe *pipe = h;
 	struct sps_bam *bam;
 	int result;
+	int ret;
 
 	SPS_DBG("%s.", __func__);
 
@@ -749,8 +761,18 @@
 	if (bam == NULL)
 		return SPS_ERROR;
 
+	ret = clk_enable(sps->dfab_clk);
+	if (ret) {
+		SPS_ERR("sps:failed to enable dfab_clk. ret=%d", ret);
+		sps_bam_unlock(bam);
+		return SPS_ERROR;
+	}
+
 	result = sps_bam_pipe_transfer_one(bam, pipe->pipe_index,
 					   addr, size, user, flags);
+
+	clk_disable(sps->dfab_clk);
+
 	sps_bam_unlock(bam);
 
 	return result;
@@ -1370,9 +1392,11 @@
 		SPS_ERR("sps:fail to get dfab_clk.");
 		goto clk_err;
 	} else {
-		ret = clk_enable(sps->dfab_clk);
+		ret = clk_set_rate(sps->dfab_clk, 64000000);
 		if (ret) {
-			SPS_ERR("sps:failed to enable dfab_clk. ret=%d", ret);
+			SPS_ERR("sps:failed to set dfab_clk rate. "
+					"ret=%d", ret);
+			clk_put(sps->dfab_clk);
 			goto clk_err;
 		}
 	}