msm: qdss: CP14 based save and restore of debug and trace registers
Accessing Krait debug registers from memory mapped interface requires
qdss_pclkdbg_clk and qdss_h_clk clocks apart from the ETM clock. This
means either:
1. requesting or releasing qdss clocks for every save and restore
or
2. leaving the qdss clocks on all the time
or
3. using the CP14 interface which is based on just the ETM clock and
doesn't require the qdss clocks
We choose to use CP14 interface to avoid the pitfalls for 1. and 2. above.
Moreover, we make the save-restore autodetect the debug and trace
architecture and do the needful based on it and hence consolidate the
code for 8660 and 8960.
Change-Id: If2a383e6f755c9ed893031966fa7ef6de41a5699
Signed-off-by: Pratik Patel <pratikp@codeaurora.org>
diff --git a/arch/arm/mach-msm/qdss-etb.c b/arch/arm/mach-msm/qdss-etb.c
index 16f8a5b..24419c6 100644
--- a/arch/arm/mach-msm/qdss-etb.c
+++ b/arch/arm/mach-msm/qdss-etb.c
@@ -1,4 +1,4 @@
-/* Copyright (c) 2011, Code Aurora Forum. All rights reserved.
+/* Copyright (c) 2011-2012, Code Aurora Forum. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -56,11 +56,11 @@
#define ETB_LOCK() \
do { \
mb(); \
- etb_writel(etb, MAGIC2, CS_LAR); \
+ etb_writel(etb, 0x0, CS_LAR); \
} while (0)
#define ETB_UNLOCK() \
do { \
- etb_writel(etb, MAGIC1, CS_LAR); \
+ etb_writel(etb, CS_UNLOCK_MAGIC, CS_LAR); \
mb(); \
} while (0)