mmc: msm_sdcc: Use MCI_VERSION to identify the Controller's version
With SDCC4, MCI_VERSION register holds the specific version information.
This information can be used to identify the controller version instead
of maintaining platform data in the board files.
CRs-Fixed: 313620
Change-Id: Ib745e83a52ba9e2e5b38d0989abd579d0e748c81
Signed-off-by: Pratibhasagar V <pratibha@codeaurora.org>
diff --git a/arch/arm/include/asm/mach/mmc.h b/arch/arm/include/asm/mach/mmc.h
index 6e55bf3..c86fad9 100644
--- a/arch/arm/include/asm/mach/mmc.h
+++ b/arch/arm/include/asm/mach/mmc.h
@@ -140,7 +140,6 @@
bool nonremovable;
bool pclk_src_dfab;
int (*cfg_mpm_sdiowakeup)(struct device *, unsigned);
- bool sdcc_v4_sup;
unsigned int wpswitch_gpio;
unsigned char wpswitch_polarity;
struct msm_mmc_slot_reg_data *vreg_data;
diff --git a/arch/arm/mach-msm/board-9615.c b/arch/arm/mach-msm/board-9615.c
index 1034b9b..d863b5d 100644
--- a/arch/arm/mach-msm/board-9615.c
+++ b/arch/arm/mach-msm/board-9615.c
@@ -499,7 +499,6 @@
.sup_clk_table = sdc1_sup_clk_rates,
.sup_clk_cnt = ARRAY_SIZE(sdc1_sup_clk_rates),
.pclk_src_dfab = true,
- .sdcc_v4_sup = true,
.vreg_data = &mmc_slot_vreg_data[SDCC1],
.pin_data = &mmc_slot_pin_data[SDCC1],
#ifdef CONFIG_MMC_MSM_CARD_HW_DETECTION
@@ -527,7 +526,6 @@
.sup_clk_table = sdc2_sup_clk_rates,
.sup_clk_cnt = ARRAY_SIZE(sdc2_sup_clk_rates),
.pclk_src_dfab = 1,
- .sdcc_v4_sup = true,
.pin_data = &mmc_slot_pin_data[SDCC2],
#ifdef CONFIG_MMC_MSM_SDIO_SUPPORT
.sdiowakeup_irq = MSM_GPIO_TO_INT(GPIO_SDC2_DAT1_WAKEUP),
diff --git a/arch/arm/mach-msm/board-apq8064.c b/arch/arm/mach-msm/board-apq8064.c
index d351268..b131989 100644
--- a/arch/arm/mach-msm/board-apq8064.c
+++ b/arch/arm/mach-msm/board-apq8064.c
@@ -401,7 +401,6 @@
.sup_clk_cnt = ARRAY_SIZE(sdc1_sup_clk_rates),
.pin_data = &mmc_slot_pin_data[SDCC1],
.vreg_data = &mmc_slot_vreg_data[SDCC1],
- .sdcc_v4_sup = true,
};
static struct mmc_platform_data *apq8064_sdc1_pdata = &sdc1_data;
#else
@@ -420,7 +419,6 @@
.sup_clk_cnt = ARRAY_SIZE(sdc3_sup_clk_rates),
.pin_data = &mmc_slot_pin_data[SDCC3],
.vreg_data = &mmc_slot_vreg_data[SDCC3],
- .sdcc_v4_sup = true,
};
static struct mmc_platform_data *apq8064_sdc3_pdata = &sdc3_data;
#else
diff --git a/arch/arm/mach-msm/board-msm8960.c b/arch/arm/mach-msm/board-msm8960.c
index 9a88eb1..ab45aca 100644
--- a/arch/arm/mach-msm/board-msm8960.c
+++ b/arch/arm/mach-msm/board-msm8960.c
@@ -3027,7 +3027,6 @@
.sup_clk_cnt = ARRAY_SIZE(sdc1_sup_clk_rates),
.pclk_src_dfab = 1,
.nonremovable = 1,
- .sdcc_v4_sup = true,
.vreg_data = &mmc_slot_vreg_data[SDCC1],
.pin_data = &mmc_slot_pin_data[SDCC1]
};
@@ -3043,7 +3042,6 @@
#ifdef CONFIG_MMC_MSM_SDC3_WP_SUPPORT
.wpswitch_gpio = PM8921_GPIO_PM_TO_SYS(16),
#endif
- .sdcc_v4_sup = true,
.vreg_data = &mmc_slot_vreg_data[SDCC3],
.pin_data = &mmc_slot_pin_data[SDCC3],
#ifdef CONFIG_MMC_MSM_CARD_HW_DETECTION
diff --git a/drivers/mmc/host/msm_sdcc.c b/drivers/mmc/host/msm_sdcc.c
index b0ec0e8..1ce089d 100644
--- a/drivers/mmc/host/msm_sdcc.c
+++ b/drivers/mmc/host/msm_sdcc.c
@@ -244,7 +244,7 @@
static void msmsdcc_reset_and_restore(struct msmsdcc_host *host)
{
- if (host->plat->sdcc_v4_sup) {
+ if (host->sdcc_version) {
if (host->is_sps_mode) {
/* Reset DML first */
msmsdcc_dml_reset(host);
@@ -345,7 +345,7 @@
mb();
udelay(host->reg_write_delay);
- if (host->plat->sdcc_v4_sup &&
+ if (host->sdcc_version &&
(readl_relaxed(host->base + MCI_STATUS2) &
MCI_MCLK_REG_WR_ACTIVE)) {
start = ktime_get();
@@ -1631,7 +1631,7 @@
if (mrq->data && (mrq->data->flags & MMC_DATA_WRITE)) {
if (mrq->cmd->opcode == SD_IO_RW_EXTENDED ||
mrq->cmd->opcode == 54) {
- if (!host->plat->sdcc_v4_sup)
+ if (!host->sdcc_version)
host->dummy_52_needed = 1;
else
/*
@@ -3701,6 +3701,14 @@
host->clk_rate = clk_get_rate(host->clk);
if (!host->clk_rate)
dev_err(&pdev->dev, "Failed to read MCLK\n");
+
+ /*
+ * Lookup the Controller Version, to identify the supported features
+ * Version number read as 0 would indicate SDCC3 or earlier versions
+ */
+ host->sdcc_version = readl_relaxed(host->base + MCI_VERSION);
+ pr_info("%s: mci-version: %x\n", mmc_hostname(host->mmc),
+ host->sdcc_version);
/*
* Set the register write delay according to min. clock frequency
* supported and update later when the host->clk_rate changes.
@@ -3752,7 +3760,7 @@
* status is to use the AUTO_PROG_DONE status provided by SDCC4
* controller. So let's enable the CMD23 for SDCC4 only.
*/
- if (!plat->disable_cmd23 && host->plat->sdcc_v4_sup)
+ if (!plat->disable_cmd23 && host->sdcc_version)
mmc->caps |= MMC_CAP_CMD23;
mmc->caps |= plat->uhs_caps;
diff --git a/drivers/mmc/host/msm_sdcc.h b/drivers/mmc/host/msm_sdcc.h
index 12aa54b..2019913 100644
--- a/drivers/mmc/host/msm_sdcc.h
+++ b/drivers/mmc/host/msm_sdcc.h
@@ -168,6 +168,7 @@
#define MMCIMASK1 0x040
#define MMCIFIFOCNT 0x044
+#define MCI_VERSION 0x050
#define MCICCSTIMER 0x058
#define MCI_DLL_CONFIG 0x060
#define MCI_DLL_EN (1 << 16)
@@ -316,6 +317,7 @@
u32 pwr;
struct mmc_platform_data *plat;
+ u32 sdcc_version;
unsigned int oldstat;