Revert "msm: 8226/8610: change phys offset to discard the lower 1M of memory"
This was a temporary workaround for 8x26/8x10 for SMP boot issues and is
no longer needed. The solution for Cortex-A7 SMP with memory map based at
0 is to use VINITHI for booting secondary cores. This is now done in TZ.
This reverts commit 62040d67663780048d1b2ec993c1dc9be92a707b.
Change-Id: I64af5206226857bd99c364c6d711659e12ea2809
Signed-off-by: Syed Rameez Mustafa <rameezmustafa@codeaurora.org>
diff --git a/arch/arm/mach-msm/Kconfig b/arch/arm/mach-msm/Kconfig
index f0b706a..b10212e 100644
--- a/arch/arm/mach-msm/Kconfig
+++ b/arch/arm/mach-msm/Kconfig
@@ -1039,8 +1039,8 @@
default "0x80200000" if ARCH_MSM8930
default "0x00000000" if ARCH_MSM8974
default "0x00000000" if ARCH_MPQ8092
- default "0x00100000" if ARCH_MSM8226
- default "0x00100000" if ARCH_MSM8610
+ default "0x00000000" if ARCH_MSM8226
+ default "0x00000000" if ARCH_MSM8610
default "0x10000000" if ARCH_FSM9XXX
default "0x00200000" if ARCH_MSM9625
default "0x00200000" if !MSM_STACKED_MEMORY
diff --git a/arch/arm/mach-msm/Makefile.boot b/arch/arm/mach-msm/Makefile.boot
index f683b33..02d0b46 100644
--- a/arch/arm/mach-msm/Makefile.boot
+++ b/arch/arm/mach-msm/Makefile.boot
@@ -72,7 +72,7 @@
dtb-$(CONFIG_ARCH_MSM9625) += msm9625-v2-1-cdp.dtb
# MSM8226
- zreladdr-$(CONFIG_ARCH_MSM8226) := 0x00108000
+ zreladdr-$(CONFIG_ARCH_MSM8226) := 0x00008000
dtb-$(CONFIG_ARCH_MSM8226) += msm8226-sim.dtb
dtb-$(CONFIG_ARCH_MSM8226) += msm8226-cdp.dtb
dtb-$(CONFIG_ARCH_MSM8226) += msm8226-mtp.dtb
@@ -87,6 +87,6 @@
zreladdr-$(CONFIG_ARCH_MPQ8092) := 0x00008000
# MSM8610
- zreladdr-$(CONFIG_ARCH_MSM8610) := 0x00108000
+ zreladdr-$(CONFIG_ARCH_MSM8610) := 0x00008000
dtb-$(CONFIG_ARCH_MSM8610) += msm8610-rumi.dtb
dtb-$(CONFIG_ARCH_MSM8610) += msm8610-sim.dtb