Merge "ASoC: msm: Fix for voice call recording" into msm-3.4
diff --git a/arch/arm/configs/msm8974_defconfig b/arch/arm/configs/msm8974_defconfig
index b02bd7c..00ebb0e 100644
--- a/arch/arm/configs/msm8974_defconfig
+++ b/arch/arm/configs/msm8974_defconfig
@@ -50,7 +50,6 @@
CONFIG_MSM_PIL_PRONTO=y
CONFIG_MSM_TZ_LOG=y
CONFIG_MSM_DIRECT_SCLK_ACCESS=y
-CONFIG_MSM_WATCHDOG_V2=y
CONFIG_MSM_OCMEM=y
CONFIG_NO_HZ=y
CONFIG_HIGH_RES_TIMERS=y
diff --git a/arch/arm/mach-msm/Kconfig b/arch/arm/mach-msm/Kconfig
index cc615ef..ab55bb1 100644
--- a/arch/arm/mach-msm/Kconfig
+++ b/arch/arm/mach-msm/Kconfig
@@ -698,20 +698,6 @@
help
Support for the Qualcomm MSM8x55 SVLTE SURF eval board.
-config MACH_MSM8X60_RUMI3
- depends on ARCH_MSM8X60
- default n
- bool "MSM8x60 RUMI3"
- help
- Support for the Qualcomm MSM8x60 RUMI3 emulator.
-
-config MACH_MSM8X60_SIM
- depends on ARCH_MSM8X60
- default n
- bool "MSM8x60 Simulator"
- help
- Support for the Qualcomm MSM8x60 simulator.
-
config MACH_MSM8X60_SURF
depends on ARCH_MSM8X60
default n
diff --git a/arch/arm/mach-msm/Makefile b/arch/arm/mach-msm/Makefile
index 50f811e..50841ae 100644
--- a/arch/arm/mach-msm/Makefile
+++ b/arch/arm/mach-msm/Makefile
@@ -229,8 +229,6 @@
obj-$(CONFIG_MSM_WATCHDOG) += msm_watchdog.o
obj-$(CONFIG_MSM_WATCHDOG) += msm_watchdog_asm.o
obj-$(CONFIG_MSM_WATCHDOG_V2) += msm_watchdog_v2.o
-obj-$(CONFIG_MACH_MSM8X60_RUMI3) += board-msm8x60.o
-obj-$(CONFIG_MACH_MSM8X60_SIM) += board-msm8x60.o
obj-$(CONFIG_MACH_MSM8X60_SURF) += board-msm8x60.o
obj-$(CONFIG_MACH_MSM8X60_FFA) += board-msm8x60.o
obj-$(CONFIG_MACH_MSM8X60_FLUID) += board-msm8x60.o
@@ -274,8 +272,6 @@
board-8960-all-objs += board-8960.o board-8960-camera.o board-8960-display.o board-8960-pmic.o board-8960-storage.o board-8960-gpiomux.o
board-8930-all-objs += board-8930.o board-8930-camera.o board-8930-display.o board-8930-pmic.o board-8930-storage.o board-8930-gpiomux.o devices-8930.o board-8930-gpu.o
board-8064-all-objs += board-8064.o board-8064-pmic.o board-8064-storage.o board-8064-gpiomux.o board-8064-camera.o board-8064-display.o board-8064-gpu.o
-obj-$(CONFIG_MACH_MSM8960_SIM) += board-8960-all.o board-8960-regulator.o
-obj-$(CONFIG_MACH_MSM8960_RUMI3) += board-8960-all.o board-8960-regulator.o
obj-$(CONFIG_MACH_MSM8960_CDP) += board-8960-all.o board-8960-regulator.o
obj-$(CONFIG_MACH_MSM8960_MTP) += board-8960-all.o board-8960-regulator.o
obj-$(CONFIG_MACH_MSM8960_FLUID) += board-8960-all.o board-8960-regulator.o
diff --git a/arch/arm/mach-msm/board-8960-display.c b/arch/arm/mach-msm/board-8960-display.c
index 27aeaf4..ddeba32 100644
--- a/arch/arm/mach-msm/board-8960-display.c
+++ b/arch/arm/mach-msm/board-8960-display.c
@@ -1017,11 +1017,7 @@
else
platform_device_register(&mipi_dsi_toshiba_panel_device);
- if (machine_is_msm8x60_rumi3()) {
- msm_fb_register_device("mdp", NULL);
- mipi_dsi_pdata.target_type = 1;
- } else
- msm_fb_register_device("mdp", &mdp_pdata);
+ msm_fb_register_device("mdp", &mdp_pdata);
msm_fb_register_device("mipi_dsi", &mipi_dsi_pdata);
#ifdef CONFIG_MSM_BUS_SCALING
msm_fb_register_device("dtv", &dtv_pdata);
diff --git a/arch/arm/mach-msm/board-msm7627a-camera.c b/arch/arm/mach-msm/board-msm7627a-camera.c
index 57684f9..1e198a7 100644
--- a/arch/arm/mach-msm/board-msm7627a-camera.c
+++ b/arch/arm/mach-msm/board-msm7627a-camera.c
@@ -281,8 +281,15 @@
.gpio_no_mux = 1,
};
+static struct msm_camera_sensor_flash_src msm_flash_src_ov8825 = {
+ .flash_sr_type = MSM_CAMERA_FLASH_SRC_LED1,
+ ._fsrc.ext_driver_src.led_en = 13,
+ ._fsrc.ext_driver_src.led_flash_en = 32,
+};
+
static struct msm_camera_sensor_flash_data flash_ov8825 = {
- .flash_type = MSM_CAMERA_FLASH_NONE,
+ .flash_type = MSM_CAMERA_FLASH_LED,
+ .flash_src = &msm_flash_src_ov8825,
};
static struct msm_camera_sensor_platform_info sensor_board_info_ov8825 = {
diff --git a/arch/arm/mach-msm/board-msm8x60.c b/arch/arm/mach-msm/board-msm8x60.c
index 1b21c23..50b1ac5 100644
--- a/arch/arm/mach-msm/board-msm8x60.c
+++ b/arch/arm/mach-msm/board-msm8x60.c
@@ -468,26 +468,6 @@
},
};
-/*
- * The smc91x configuration varies depending on platform.
- * The resources data structure is filled in at runtime.
- */
-static struct resource smc91x_resources[] = {
- [0] = {
- .flags = IORESOURCE_MEM,
- },
- [1] = {
- .flags = IORESOURCE_IRQ,
- },
-};
-
-static struct platform_device smc91x_device = {
- .name = "smc91x",
- .id = 0,
- .num_resources = ARRAY_SIZE(smc91x_resources),
- .resource = smc91x_resources,
-};
-
static struct resource smsc911x_resources[] = {
[0] = {
.flags = IORESOURCE_MEM,
@@ -4208,72 +4188,6 @@
.id = -1,
};
-static struct platform_device *rumi_sim_devices[] __initdata = {
- &smc91x_device,
- &msm_device_uart_dm12,
-#ifdef CONFIG_I2C_QUP
- &msm_gsbi3_qup_i2c_device,
- &msm_gsbi4_qup_i2c_device,
- &msm_gsbi7_qup_i2c_device,
- &msm_gsbi8_qup_i2c_device,
- &msm_gsbi9_qup_i2c_device,
- &msm_gsbi12_qup_i2c_device,
-#endif
-#ifdef CONFIG_I2C_SSBI
- &msm_device_ssbi3,
-#endif
-#ifdef CONFIG_ANDROID_PMEM
-#ifndef CONFIG_MSM_MULTIMEDIA_USE_ION
- &android_pmem_device,
- &android_pmem_adsp_device,
- &android_pmem_smipool_device,
- &android_pmem_audio_device,
-#endif /*CONFIG_MSM_MULTIMEDIA_USE_ION*/
-#endif /*CONFIG_ANDROID_PMEM*/
-#ifdef CONFIG_MSM_ROTATOR
- &msm_rotator_device,
-#endif
- &msm_fb_device,
- &msm_kgsl_3d0,
- &msm_kgsl_2d0,
- &msm_kgsl_2d1,
- &lcdc_samsung_panel_device,
-#ifdef CONFIG_FB_MSM_HDMI_MSM_PANEL
- &hdmi_msm_device,
-#endif /* CONFIG_FB_MSM_HDMI_MSM_PANEL */
-#ifdef CONFIG_MSM_CAMERA
-#ifndef CONFIG_MSM_CAMERA_V4L2
-#ifdef CONFIG_MT9E013
- &msm_camera_sensor_mt9e013,
-#endif
-#ifdef CONFIG_IMX074
- &msm_camera_sensor_imx074,
-#endif
-#ifdef CONFIG_VX6953
- &msm_camera_sensor_vx6953,
-#endif
-#ifdef CONFIG_WEBCAM_OV7692
- &msm_camera_sensor_webcam_ov7692,
-#endif
-#ifdef CONFIG_WEBCAM_OV9726
- &msm_camera_sensor_webcam_ov9726,
-#endif
-#ifdef CONFIG_QS_S5K4E1
- &msm_camera_sensor_qs_s5k4e1,
-#endif
-#endif
-#endif
-#ifdef CONFIG_MSM_GEMINI
- &msm_gemini_device,
-#endif
-#ifdef CONFIG_MSM_VPE
-#ifndef CONFIG_MSM_CAMERA_V4L2
- &msm_vpe_device,
-#endif
-#endif
- &msm_device_vidc,
-};
-
#if defined(CONFIG_GPIO_SX150X) || defined(CONFIG_GPIO_SX150X_MODULE)
enum {
SX150X_CORE,
@@ -7452,10 +7366,6 @@
mach_mask = I2C_SURF;
else if (machine_is_msm8x60_ffa() || machine_is_msm8x60_fusn_ffa())
mach_mask = I2C_FFA;
- else if (machine_is_msm8x60_rumi3())
- mach_mask = I2C_RUMI;
- else if (machine_is_msm8x60_sim())
- mach_mask = I2C_SIM;
else if (machine_is_msm8x60_fluid())
mach_mask = I2C_FLUID;
else if (machine_is_msm8x60_dragon())
@@ -7642,10 +7552,6 @@
machine_is_msm8x60_fluid() ||
machine_is_msm8x60_dragon())
ebi2_cfg |= (1 << 4) | (1 << 5); /* CS2, CS3 */
- else if (machine_is_msm8x60_sim())
- ebi2_cfg |= (1 << 4); /* CS2 */
- else if (machine_is_msm8x60_rumi3())
- ebi2_cfg |= (1 << 5); /* CS3 */
writel_relaxed(ebi2_cfg, ebi2_cfg_ptr);
iounmap(ebi2_cfg_ptr);
@@ -7686,32 +7592,6 @@
}
}
-static void __init msm8x60_configure_smc91x(void)
-{
- if (machine_is_msm8x60_sim()) {
-
- smc91x_resources[0].start = 0x1b800300;
- smc91x_resources[0].end = 0x1b8003ff;
-
- smc91x_resources[1].start = (NR_MSM_IRQS + 40);
- smc91x_resources[1].end = (NR_MSM_IRQS + 40);
-
- } else if (machine_is_msm8x60_rumi3()) {
-
- smc91x_resources[0].start = 0x1d000300;
- smc91x_resources[0].end = 0x1d0003ff;
-
- smc91x_resources[1].start = TLMM_MSM_DIR_CONN_IRQ_0;
- smc91x_resources[1].end = TLMM_MSM_DIR_CONN_IRQ_0;
- }
-}
-
-static void __init msm8x60_init_tlmm(void)
-{
- if (machine_is_msm8x60_rumi3())
- msm_gpio_install_direct_irq(0, 0, 1);
-}
-
#if (defined(CONFIG_MMC_MSM_SDC1_SUPPORT)\
|| defined(CONFIG_MMC_MSM_SDC2_SUPPORT)\
|| defined(CONFIG_MMC_MSM_SDC3_SUPPORT)\
@@ -9875,10 +9755,7 @@
mdp_pdata.num_mdp_clk = 0;
mdp_pdata.mdp_core_clk_rate = 200000000;
#endif
- if (machine_is_msm8x60_rumi3())
- msm_fb_register_device("mdp", NULL);
- else
- msm_fb_register_device("mdp", &mdp_pdata);
+ msm_fb_register_device("mdp", &mdp_pdata);
msm_fb_register_device("lcdc", &lcdc_pdata);
msm_fb_register_device("mipi_dsi", &mipi_dsi_pdata);
@@ -10300,14 +10177,6 @@
struct msm_gpiomux_configs *gpiomux_cfgs;
};
-static struct msm_board_data msm8x60_rumi3_board_data __initdata = {
- .gpiomux_cfgs = msm8x60_surf_ffa_gpiomux_cfgs,
-};
-
-static struct msm_board_data msm8x60_sim_board_data __initdata = {
- .gpiomux_cfgs = msm8x60_surf_ffa_gpiomux_cfgs,
-};
-
static struct msm_board_data msm8x60_surf_board_data __initdata = {
.gpiomux_cfgs = msm8x60_surf_ffa_gpiomux_cfgs,
};
@@ -10418,12 +10287,9 @@
* it disabled for all others for additional power savings.
*/
if (machine_is_msm8x60_surf() || machine_is_msm8x60_ffa() ||
- machine_is_msm8x60_rumi3() ||
- machine_is_msm8x60_sim() ||
machine_is_msm8x60_fluid() ||
machine_is_msm8x60_dragon())
msm8x60_init_ebi2();
- msm8x60_init_tlmm();
msm8x60_init_gpiomux(board_data->gpiomux_cfgs);
msm8x60_init_uart12dm();
#ifdef CONFIG_MSM_CAMERA_V4L2
@@ -10513,10 +10379,6 @@
#endif
platform_add_devices(asoc_devices,
ARRAY_SIZE(asoc_devices));
- } else {
- msm8x60_configure_smc91x();
- platform_add_devices(rumi_sim_devices,
- ARRAY_SIZE(rumi_sim_devices));
}
#if defined(CONFIG_USB_PEHCI_HCD) || defined(CONFIG_USB_PEHCI_HCD_MODULE)
if (machine_is_msm8x60_surf() || machine_is_msm8x60_ffa() ||
@@ -10540,8 +10402,7 @@
if (machine_is_msm8x60_fluid())
cyttsp_set_params();
#endif
- if (!machine_is_msm8x60_sim())
- msm_fb_add_devices();
+ msm_fb_add_devices();
fixup_i2c_configs();
register_i2c_devices();
@@ -10608,16 +10469,6 @@
msm_fusion_setup_pinctrl();
}
-static void __init msm8x60_rumi3_init(void)
-{
- msm8x60_init(&msm8x60_rumi3_board_data);
-}
-
-static void __init msm8x60_sim_init(void)
-{
- msm8x60_init(&msm8x60_sim_board_data);
-}
-
static void __init msm8x60_surf_init(void)
{
msm8x60_init(&msm8x60_surf_board_data);
@@ -10653,28 +10504,6 @@
msm8x60_init(&msm8x60_dragon_board_data);
}
-MACHINE_START(MSM8X60_RUMI3, "QCT MSM8X60 RUMI3")
- .map_io = msm8x60_map_io,
- .reserve = msm8x60_reserve,
- .init_irq = msm8x60_init_irq,
- .handle_irq = gic_handle_irq,
- .init_machine = msm8x60_rumi3_init,
- .timer = &msm_timer,
- .init_early = msm8x60_charm_init_early,
- .restart = msm_restart,
-MACHINE_END
-
-MACHINE_START(MSM8X60_SIM, "QCT MSM8X60 SIMULATOR")
- .map_io = msm8x60_map_io,
- .reserve = msm8x60_reserve,
- .init_irq = msm8x60_init_irq,
- .handle_irq = gic_handle_irq,
- .init_machine = msm8x60_sim_init,
- .timer = &msm_timer,
- .init_early = msm8x60_charm_init_early,
- .restart = msm_restart,
-MACHINE_END
-
MACHINE_START(MSM8X60_SURF, "QCT MSM8X60 SURF")
.map_io = msm8x60_map_io,
.reserve = msm8x60_reserve,
diff --git a/arch/arm/mach-msm/clock-8974.c b/arch/arm/mach-msm/clock-8974.c
index 73fd8ef..5463924 100644
--- a/arch/arm/mach-msm/clock-8974.c
+++ b/arch/arm/mach-msm/clock-8974.c
@@ -20,6 +20,7 @@
#include <linux/clk.h>
#include <mach/clk.h>
+#include <mach/rpm-regulator-smd.h>
#include "clock-local2.h"
#include "clock-pll.h"
@@ -197,6 +198,7 @@
#define AHB_CMD_RCGR 0x5000
#define AXI_CMD_RCGR 0x5040
#define OCMEMNOC_CMD_RCGR 0x5090
+#define OCMEMCX_OCMEMNOC_CBCR 0x4058
#define MMSS_BCR 0x0240
#define USB_30_BCR 0x03C0
@@ -580,10 +582,19 @@
VDD_DIG_HIGH
};
+static const int vdd_corner[] = {
+ [VDD_DIG_NONE] = RPM_REGULATOR_CORNER_NONE,
+ [VDD_DIG_LOW] = RPM_REGULATOR_CORNER_SVS_SOC,
+ [VDD_DIG_NOMINAL] = RPM_REGULATOR_CORNER_NORMAL,
+ [VDD_DIG_HIGH] = RPM_REGULATOR_CORNER_SUPER_TURBO,
+};
+
+static struct rpm_regulator *vdd_dig_reg;
+
static int set_vdd_dig(struct clk_vdd_class *vdd_class, int level)
{
- /* TODO: Actually call into regulator APIs to set VDD_DIG here. */
- return 0;
+ return rpm_regulator_set_voltage(vdd_dig_reg, vdd_corner[level],
+ RPM_REGULATOR_CORNER_SUPER_TURBO);
}
static DEFINE_VDD_CLASS(vdd_dig, set_vdd_dig);
@@ -689,7 +700,7 @@
.base = &virt_bases[MMSS_BASE],
.c = {
.dbg_name = "mmpll1_clk_src",
- .rate = 1000000000,
+ .rate = 846000000,
.ops = &clk_ops_pll_vote,
.warned = true,
CLK_INIT(mmpll1_clk_src.c),
@@ -705,6 +716,7 @@
.dbg_name = "mmpll3_clk_src",
.rate = 1000000000,
.ops = &clk_ops_local_pll,
+ .warned = true,
CLK_INIT(mmpll3_clk_src.c),
},
};
@@ -2205,6 +2217,28 @@
},
};
+struct branch_clk gcc_mmss_noc_cfg_ahb_clk = {
+ .cbcr_reg = MMSS_NOC_CFG_AHB_CBCR,
+ .has_sibling = 1,
+ .base = &virt_bases[GCC_BASE],
+ .c = {
+ .dbg_name = "gcc_mmss_noc_cfg_ahb_clk",
+ .ops = &clk_ops_branch,
+ CLK_INIT(gcc_mmss_noc_cfg_ahb_clk.c),
+ },
+};
+
+struct branch_clk gcc_ocmem_noc_cfg_ahb_clk = {
+ .cbcr_reg = OCMEM_NOC_CFG_AHB_CBCR,
+ .has_sibling = 1,
+ .base = &virt_bases[GCC_BASE],
+ .c = {
+ .dbg_name = "gcc_ocmem_noc_cfg_ahb_clk",
+ .ops = &clk_ops_branch,
+ CLK_INIT(gcc_ocmem_noc_cfg_ahb_clk.c),
+ },
+};
+
static struct branch_clk gcc_mss_cfg_ahb_clk = {
.cbcr_reg = MSS_CFG_AHB_CBCR,
.has_sibling = 1,
@@ -2217,10 +2251,11 @@
};
static struct clk_freq_tbl ftbl_mmss_axi_clk[] = {
- F_MM( 19200000, cxo, 1, 0, 0),
- F_MM(150000000, gpll0, 4, 0, 0),
- F_MM(333330000, mmpll1, 3, 0, 0),
- F_MM(400000000, mmpll0, 2, 0, 0),
+ F_MM( 19200000, cxo, 1, 0, 0),
+ F_MM(150000000, gpll0, 4, 0, 0),
+ F_MM(282000000, mmpll1, 3, 0, 0),
+ F_MM(320000000, mmpll1, 2.5, 0, 0),
+ F_MM(400000000, mmpll0, 2, 0, 0),
F_END
};
@@ -2233,8 +2268,8 @@
.c = {
.dbg_name = "axi_clk_src",
.ops = &clk_ops_rcg,
- VDD_DIG_FMAX_MAP3(LOW, 150000000, NOMINAL, 333330000,
- HIGH, 400000000),
+ VDD_DIG_FMAX_MAP3(LOW, 150000000, NOMINAL, 282000000,
+ HIGH, 320000000),
CLK_INIT(axi_clk_src.c),
},
};
@@ -2242,7 +2277,7 @@
static struct clk_freq_tbl ftbl_ocmemnoc_clk[] = {
F_MM( 19200000, cxo, 1, 0, 0),
F_MM(150000000, gpll0, 4, 0, 0),
- F_MM(333330000, mmpll1, 3, 0, 0),
+ F_MM(282000000, mmpll1, 3, 0, 0),
F_MM(400000000, mmpll0, 2, 0, 0),
F_END
};
@@ -2256,7 +2291,7 @@
.c = {
.dbg_name = "ocmemnoc_clk_src",
.ops = &clk_ops_rcg,
- VDD_DIG_FMAX_MAP3(LOW, 150000000, NOMINAL, 333330000,
+ VDD_DIG_FMAX_MAP3(LOW, 150000000, NOMINAL, 282000000,
HIGH, 400000000),
CLK_INIT(ocmemnoc_clk_src.c),
},
@@ -3735,6 +3770,18 @@
},
};
+struct branch_clk ocmemcx_ocmemnoc_clk = {
+ .cbcr_reg = OCMEMCX_OCMEMNOC_CBCR,
+ .parent = &ocmemnoc_clk_src.c,
+ .has_sibling = 1,
+ .base = &virt_bases[MMSS_BASE],
+ .c = {
+ .dbg_name = "ocmemcx_ocmemnoc_clk",
+ .ops = &clk_ops_branch,
+ CLK_INIT(ocmemcx_ocmemnoc_clk.c),
+ },
+};
+
static struct branch_clk venus0_ahb_clk = {
.cbcr_reg = VENUS0_AHB_CBCR,
.has_sibling = 1,
@@ -4319,6 +4366,8 @@
{&gcc_blsp2_uart5_apps_clk.c, GCC_BASE, 0x00c6},
{&gcc_blsp2_uart6_apps_clk.c, GCC_BASE, 0x00cb},
{&gcc_boot_rom_ahb_clk.c, GCC_BASE, 0x0100},
+ {&gcc_ocmem_noc_cfg_ahb_clk.c, GCC_BASE, 0x0029},
+ {&gcc_mmss_noc_cfg_ahb_clk.c, GCC_BASE, 0x002A},
{&gcc_mss_cfg_ahb_clk.c, GCC_BASE, 0x0030},
{&gcc_ce1_clk.c, GCC_BASE, 0x0140},
{&gcc_ce2_clk.c, GCC_BASE, 0x0148},
@@ -4346,6 +4395,7 @@
{&mmss_mmssnoc_ahb_clk.c, MMSS_BASE, 0x0001},
{&mmss_mmssnoc_axi_clk.c, MMSS_BASE, 0x0004},
{&ocmemnoc_clk.c, MMSS_BASE, 0x0007},
+ {&ocmemcx_ocmemnoc_clk.c, MMSS_BASE, 0x0009},
{&camss_cci_cci_ahb_clk.c, MMSS_BASE, 0x002e},
{&camss_cci_cci_clk.c, MMSS_BASE, 0x002d},
{&camss_csi0_ahb_clk.c, MMSS_BASE, 0x0042},
@@ -4780,6 +4830,8 @@
CLK_LOOKUP("bus_clk", mdss_axi_clk.c, "mdp.0"),
CLK_LOOKUP("core_clk", oxili_gfx3d_clk.c, "fdb00000.qcom,kgsl-3d0"),
CLK_LOOKUP("iface_clk", oxilicx_ahb_clk.c, "fdb00000.qcom,kgsl-3d0"),
+ CLK_LOOKUP("mem_iface_clk", ocmemcx_ocmemnoc_clk.c,
+ "fdb00000.qcom,kgsl-3d0"),
CLK_LOOKUP("core_clk", oxilicx_axi_clk.c, "fdb10000.qcom,iommu"),
CLK_LOOKUP("iface_clk", oxilicx_ahb_clk.c, "fdb10000.qcom,iommu"),
CLK_LOOKUP("alt_core_clk", oxili_gfx3d_clk.c, "fdb10000.qcom,iommu"),
@@ -4871,6 +4923,8 @@
CLK_LOOKUP("bus_a_clk", ocmemnoc_clk.c, "msm_ocmem_noc"),
CLK_LOOKUP("bus_clk", mmss_mmssnoc_axi_clk.c, "msm_mmss_noc"),
CLK_LOOKUP("bus_a_clk", mmss_mmssnoc_axi_clk.c, "msm_mmss_noc"),
+ CLK_LOOKUP("iface_clk", gcc_mmss_noc_cfg_ahb_clk.c, ""),
+ CLK_LOOKUP("iface_clk", gcc_ocmem_noc_cfg_ahb_clk.c, ""),
CLK_LOOKUP("core_clk", qdss_clk.c, "coresight-tmc-etr"),
CLK_LOOKUP("core_clk", qdss_clk.c, "coresight-tpiu"),
@@ -4990,9 +5044,9 @@
/* MMPLL1 at 1000 MHz, main output enabled. */
static struct pll_config mmpll1_config __initdata = {
- .l = 0x34,
+ .l = 0x2C,
.m = 0x1,
- .n = 0xC,
+ .n = 0x10,
.vco_val = 0x0,
.vco_mask = BM(21, 20),
.pre_div_val = 0x0,
@@ -5095,8 +5149,8 @@
static void __init msm8974_clock_post_init(void)
{
- clk_set_rate(&axi_clk_src.c, 333330000);
- clk_set_rate(&ocmemnoc_clk_src.c, 333330000);
+ clk_set_rate(&axi_clk_src.c, 282000000);
+ clk_set_rate(&ocmemnoc_clk_src.c, 282000000);
/*
* Hold an active set vote at a rate of 40MHz for the MMSS NOC AHB
@@ -5111,6 +5165,13 @@
*/
clk_prepare_enable(&cxo_a_clk_src.c);
+ /*
+ * TODO: Temporarily enable NOC configuration AHB clocks. Remove when
+ * the bus driver is ready.
+ */
+ clk_prepare_enable(&gcc_mmss_noc_cfg_ahb_clk.c);
+ clk_prepare_enable(&gcc_ocmem_noc_cfg_ahb_clk.c);
+
/* Set rates for single-rate clocks. */
clk_set_rate(&usb30_master_clk_src.c,
usb30_master_clk_src.freq_tbl[0].freq_hz);
@@ -5172,12 +5233,31 @@
clk_ops_local_pll.enable = msm8974_pll_clk_enable;
+ vdd_dig_reg = rpm_regulator_get(NULL, "vdd_dig");
+ if (IS_ERR(vdd_dig_reg))
+ panic("clock-copper: Unable to get the vdd_dig regulator!");
+
+ /*
+ * TODO: Set a voltage and enable vdd_dig, leaving the voltage high
+ * until late_init. This may not be necessary with clock handoff;
+ * Investigate this code on a real non-simulator target to determine
+ * its necessity.
+ */
+ vote_vdd_level(&vdd_dig, VDD_DIG_HIGH);
+ rpm_regulator_enable(vdd_dig_reg);
+
reg_init();
}
+static int __init msm8974_clock_late_init(void)
+{
+ return unvote_vdd_level(&vdd_dig, VDD_DIG_HIGH);
+}
+
struct clock_init_data msm8974_clock_init_data __initdata = {
.table = msm_clocks_8974,
.size = ARRAY_SIZE(msm_clocks_8974),
.pre_init = msm8974_clock_pre_init,
.post_init = msm8974_clock_post_init,
+ .late_init = msm8974_clock_late_init,
};
diff --git a/arch/arm/mach-msm/devices-8064.c b/arch/arm/mach-msm/devices-8064.c
index b2e4208..a6f18ba 100644
--- a/arch/arm/mach-msm/devices-8064.c
+++ b/arch/arm/mach-msm/devices-8064.c
@@ -15,6 +15,7 @@
#include <linux/list.h>
#include <linux/platform_device.h>
#include <linux/msm_rotator.h>
+#include <linux/gpio.h>
#include <linux/clkdev.h>
#include <linux/dma-mapping.h>
#include <linux/coresight.h>
@@ -27,6 +28,7 @@
#include <mach/msm_dsps.h>
#include <sound/msm-dai-q6.h>
#include <sound/apr_audio.h>
+#include <mach/msm_tsif.h>
#include <mach/msm_bus_board.h>
#include <mach/rpm.h>
#include <mach/mdm2.h>
@@ -464,6 +466,112 @@
.id = 0x4009,
};
+#define MSM_TSIF0_PHYS (0x18200000)
+#define MSM_TSIF1_PHYS (0x18201000)
+#define MSM_TSIF_SIZE (0x200)
+
+#define TSIF_0_CLK GPIO_CFG(55, 1, GPIO_CFG_INPUT, \
+ GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA)
+#define TSIF_0_EN GPIO_CFG(56, 1, GPIO_CFG_INPUT, \
+ GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA)
+#define TSIF_0_DATA GPIO_CFG(57, 1, GPIO_CFG_INPUT, \
+ GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA)
+#define TSIF_0_SYNC GPIO_CFG(62, 1, GPIO_CFG_INPUT, \
+ GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA)
+#define TSIF_1_CLK GPIO_CFG(59, 1, GPIO_CFG_INPUT, \
+ GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA)
+#define TSIF_1_EN GPIO_CFG(60, 1, GPIO_CFG_INPUT, \
+ GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA)
+#define TSIF_1_DATA GPIO_CFG(61, 1, GPIO_CFG_INPUT, \
+ GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA)
+#define TSIF_1_SYNC GPIO_CFG(58, 1, GPIO_CFG_INPUT, \
+ GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA)
+
+static const struct msm_gpio tsif0_gpios[] = {
+ { .gpio_cfg = TSIF_0_CLK, .label = "tsif_clk", },
+ { .gpio_cfg = TSIF_0_EN, .label = "tsif_en", },
+ { .gpio_cfg = TSIF_0_DATA, .label = "tsif_data", },
+ { .gpio_cfg = TSIF_0_SYNC, .label = "tsif_sync", },
+};
+
+static const struct msm_gpio tsif1_gpios[] = {
+ { .gpio_cfg = TSIF_1_CLK, .label = "tsif_clk", },
+ { .gpio_cfg = TSIF_1_EN, .label = "tsif_en", },
+ { .gpio_cfg = TSIF_1_DATA, .label = "tsif_data", },
+ { .gpio_cfg = TSIF_1_SYNC, .label = "tsif_sync", },
+};
+
+struct msm_tsif_platform_data tsif1_8064_platform_data = {
+ .num_gpios = ARRAY_SIZE(tsif1_gpios),
+ .gpios = tsif1_gpios,
+ .tsif_pclk = "iface_clk",
+ .tsif_ref_clk = "ref_clk",
+};
+
+struct resource tsif1_8064_resources[] = {
+ [0] = {
+ .flags = IORESOURCE_IRQ,
+ .start = TSIF2_IRQ,
+ .end = TSIF2_IRQ,
+ },
+ [1] = {
+ .flags = IORESOURCE_MEM,
+ .start = MSM_TSIF1_PHYS,
+ .end = MSM_TSIF1_PHYS + MSM_TSIF_SIZE - 1,
+ },
+ [2] = {
+ .flags = IORESOURCE_DMA,
+ .start = DMOV8064_TSIF_CHAN,
+ .end = DMOV8064_TSIF_CRCI,
+ },
+};
+
+struct msm_tsif_platform_data tsif0_8064_platform_data = {
+ .num_gpios = ARRAY_SIZE(tsif0_gpios),
+ .gpios = tsif0_gpios,
+ .tsif_pclk = "iface_clk",
+ .tsif_ref_clk = "ref_clk",
+};
+
+struct resource tsif0_8064_resources[] = {
+ [0] = {
+ .flags = IORESOURCE_IRQ,
+ .start = TSIF1_IRQ,
+ .end = TSIF1_IRQ,
+ },
+ [1] = {
+ .flags = IORESOURCE_MEM,
+ .start = MSM_TSIF0_PHYS,
+ .end = MSM_TSIF0_PHYS + MSM_TSIF_SIZE - 1,
+ },
+ [2] = {
+ .flags = IORESOURCE_DMA,
+ .start = DMOV_TSIF_CHAN,
+ .end = DMOV_TSIF_CRCI,
+ },
+};
+
+struct platform_device msm_8064_device_tsif[2] = {
+ {
+ .name = "msm_tsif",
+ .id = 0,
+ .num_resources = ARRAY_SIZE(tsif0_8064_resources),
+ .resource = tsif0_8064_resources,
+ .dev = {
+ .platform_data = &tsif0_8064_platform_data
+ },
+ },
+ {
+ .name = "msm_tsif",
+ .id = 1,
+ .num_resources = ARRAY_SIZE(tsif1_8064_resources),
+ .resource = tsif1_8064_resources,
+ .dev = {
+ .platform_data = &tsif1_8064_platform_data
+ },
+ }
+};
+
/*
* Machine specific data for AUX PCM Interface
* which the driver will be unware of.
diff --git a/arch/arm/mach-msm/include/mach/camera.h b/arch/arm/mach-msm/include/mach/camera.h
index 43d707e..3de6272 100644
--- a/arch/arm/mach-msm/include/mach/camera.h
+++ b/arch/arm/mach-msm/include/mach/camera.h
@@ -85,13 +85,12 @@
VFE_MSG_SYNC_TIMER1,
VFE_MSG_SYNC_TIMER2,
VFE_MSG_COMMON,
- VFE_MSG_V32_START,
- VFE_MSG_V32_START_RECORDING, /* 20 */
- VFE_MSG_V32_CAPTURE,
- VFE_MSG_V32_JPEG_CAPTURE,
+ VFE_MSG_START,
+ VFE_MSG_START_RECORDING, /* 20 */
+ VFE_MSG_CAPTURE,
+ VFE_MSG_JPEG_CAPTURE,
VFE_MSG_OUTPUT_IRQ,
- VFE_MSG_V2X_PREVIEW,
- VFE_MSG_V2X_CAPTURE,
+ VFE_MSG_PREVIEW,
VFE_MSG_OUTPUT_PRIMARY,
VFE_MSG_OUTPUT_SECONDARY,
VFE_MSG_OUTPUT_TERTIARY1,
diff --git a/arch/arm/mach-msm/pil-q6v4.c b/arch/arm/mach-msm/pil-q6v4.c
index 131a74b..32cce1d 100644
--- a/arch/arm/mach-msm/pil-q6v4.c
+++ b/arch/arm/mach-msm/pil-q6v4.c
@@ -116,7 +116,7 @@
int err;
struct q6v4_data *drv = dev_get_drvdata(dev);
- err = regulator_set_voltage(drv->vreg, 375000, 375000);
+ err = regulator_set_voltage(drv->vreg, 743750, 743750);
if (err) {
dev_err(dev, "Failed to set regulator's voltage step.\n");
return err;
diff --git a/arch/arm/mach-msm/qdsp5/adsp.c b/arch/arm/mach-msm/qdsp5/adsp.c
index eee7e37..11f6b28 100644
--- a/arch/arm/mach-msm/qdsp5/adsp.c
+++ b/arch/arm/mach-msm/qdsp5/adsp.c
@@ -1072,12 +1072,28 @@
int msm_adsp_enable(struct msm_adsp_module *module)
{
int rc = 0;
+ struct msm_adsp_module *module_en = NULL;
if (!module)
return -EINVAL;
MM_INFO("enable '%s'state[%d] id[%d]\n",
module->name, module->state, module->id);
+ if (!strncmp(module->name, "JPEGTASK", sizeof(module->name)))
+ module_en = find_adsp_module_by_name(&adsp_info, "VIDEOTASK");
+ else if (!strncmp(module->name, "VIDEOTASK", sizeof(module->name)))
+ module_en = find_adsp_module_by_name(&adsp_info, "JPEGTASK");
+ if (module_en) {
+ mutex_lock(&module_en->lock);
+ if (module_en->state == ADSP_STATE_ENABLED ||
+ module_en->state == ADSP_STATE_ENABLING) {
+ MM_ERR("both jpeg and video module can't"\
+ " exist at a time\n");
+ mutex_unlock(&module_en->lock);
+ return -EINVAL;
+ }
+ mutex_unlock(&module_en->lock);
+ }
mutex_lock(&module->lock);
switch (module->state) {
diff --git a/arch/arm/mach-msm/qdsp5/audio_out.c b/arch/arm/mach-msm/qdsp5/audio_out.c
index 8eaf829..0c8034c 100644
--- a/arch/arm/mach-msm/qdsp5/audio_out.c
+++ b/arch/arm/mach-msm/qdsp5/audio_out.c
@@ -111,7 +111,7 @@
-#define BUFSZ (960 * 5)
+#define BUFSZ (5248)
#define DMASZ (BUFSZ * 2)
#define COMMON_OBJ_ID 6
@@ -817,7 +817,7 @@
goto done;
audio->out_buffer_size = BUFSZ;
- audio->out_sample_rate = 44100;
+ audio->out_sample_rate = 48000;
audio->out_channel_mode = AUDPP_CMD_PCM_INTF_STEREO_V;
audio->out_weight = 100;
diff --git a/drivers/media/dvb/dvb-core/dvb_demux.c b/drivers/media/dvb/dvb-core/dvb_demux.c
index 0bdf6cb..790cc10 100644
--- a/drivers/media/dvb/dvb-core/dvb_demux.c
+++ b/drivers/media/dvb/dvb-core/dvb_demux.c
@@ -137,7 +137,12 @@
/*
cc = buf[3] & 0x0f;
- ccok = ((feed->cc + 1) & 0x0f) == cc;
+ if (feed->first_cc)
+ ccok = 1;
+ else
+ ccok = ((feed->cc + 1) & 0x0f) == cc;
+
+ feed->first_cc = 0;
feed->cc = cc;
if (!ccok)
printk("missed packet!\n");
@@ -351,7 +356,12 @@
p = 188 - count; /* payload start */
cc = buf[3] & 0x0f;
- ccok = ((feed->cc + 1) & 0x0f) == cc;
+ if (feed->first_cc)
+ ccok = 1;
+ else
+ ccok = ((feed->cc + 1) & 0x0f) == cc;
+
+ feed->first_cc = 0;
feed->cc = cc;
if (buf[3] & 0x20) {
@@ -996,6 +1006,8 @@
return -ENODEV;
}
+ feed->first_cc = 1;
+
if ((ret = demux->start_feed(feed)) < 0) {
mutex_unlock(&demux->mutex);
return ret;
@@ -1299,6 +1311,7 @@
dvbdmxfeed->feed.sec.secbuf = dvbdmxfeed->feed.sec.secbuf_base;
dvbdmxfeed->feed.sec.secbufp = 0;
dvbdmxfeed->feed.sec.seclen = 0;
+ dvbdmxfeed->first_cc = 1;
if (!dvbdmx->start_feed) {
mutex_unlock(&dvbdmx->mutex);
diff --git a/drivers/media/dvb/dvb-core/dvb_demux.h b/drivers/media/dvb/dvb-core/dvb_demux.h
index 3970a6c..a663191 100644
--- a/drivers/media/dvb/dvb-core/dvb_demux.h
+++ b/drivers/media/dvb/dvb-core/dvb_demux.h
@@ -98,6 +98,7 @@
enum dmx_ts_pes pes_type;
int cc;
+ int first_cc;
int pusi_seen; /* prevents feeding of garbage from previous section */
u32 peslen;
diff --git a/drivers/media/video/msm/Kconfig b/drivers/media/video/msm/Kconfig
index fb5aea0..48d488c 100644
--- a/drivers/media/video/msm/Kconfig
+++ b/drivers/media/video/msm/Kconfig
@@ -339,6 +339,15 @@
of CSIPHY, CSID and ISPIF subdevices to receive data
from sensor.
+config MSM_ISPIF
+ bool "Qualcomm MSM Image Signal Processing interface support"
+ depends on MSM_CAMERA
+ ---help---
+ Enable support for Image Signal Processing interface module.
+ This module acts as a crossbar between CSID and VFE. Output
+ of any CID of CSID can be routed to of of pixel or raw
+ data interface in VFE.
+
config S5K3L1YX
bool "Sensor S5K3L1YX (BAYER 12M)"
depends on MSM_CAMERA
diff --git a/drivers/media/video/msm/Makefile b/drivers/media/video/msm/Makefile
index eb45271..e22c9b2 100644
--- a/drivers/media/video/msm/Makefile
+++ b/drivers/media/video/msm/Makefile
@@ -1,9 +1,7 @@
GCC_VERSION := $(shell $(CONFIG_SHELL) $(PWD)/scripts/gcc-version.sh $(CROSS_COMPILE)gcc)
-ifeq ($(GCC_VERSION),0404)
-CFLAGS_REMOVE_msm_vfe8x.o = -Wframe-larger-than=1024
-endif
-EXTRA_CFLAGS += -Idrivers/media/video/msm/io
+ccflags-y += -Idrivers/media/video/msm/io
+ccflags-y += -Idrivers/media/video/msm/vfe
obj-$(CONFIG_MSM_CAMERA) += io/
ifeq ($(CONFIG_MSM_CAMERA_V4L2),y)
EXTRA_CFLAGS += -Idrivers/media/video/msm/csi
@@ -11,7 +9,7 @@
EXTRA_CFLAGS += -Idrivers/media/video/msm/sensors
EXTRA_CFLAGS += -Idrivers/media/video/msm/actuators
EXTRA_CFLAGS += -Idrivers/media/video/msm/server
- obj-$(CONFIG_MSM_CAMERA) += msm_isp.o msm.o msm_mem.o msm_mctl.o msm_mctl_buf.o msm_mctl_pp.o msm_vfe_stats_buf.o
+ obj-$(CONFIG_MSM_CAMERA) += msm_isp.o msm.o msm_mem.o msm_mctl.o msm_mctl_buf.o msm_mctl_pp.o
obj-$(CONFIG_MSM_CAMERA) += server/
obj-$(CONFIG_MSM_CAM_IRQ_ROUTER) += msm_camirq_router.o
obj-$(CONFIG_MSM_CAMERA) += eeprom/ sensors/ actuators/ csi/
@@ -20,23 +18,17 @@
else
obj-$(CONFIG_MSM_CAMERA) += msm_camera.o
endif
+obj-$(CONFIG_MSM_CAMERA) += vfe/
obj-$(CONFIG_MSM_CAMERA) += msm_axi_qos.o gemini/ mercury/
obj-$(CONFIG_MSM_CAMERA_FLASH) += flash.o
-obj-$(CONFIG_ARCH_MSM_ARM11) += msm_vfe7x.o
ifeq ($(CONFIG_MSM_CAMERA_V4L2),y)
- obj-$(CONFIG_ARCH_MSM7X27A) += msm_vfe7x27a_v4l2.o
+ obj-$(CONFIG_ARCH_MSM8X60) += msm_vpe.o
+ obj-$(CONFIG_ARCH_MSM7X30) += msm_vpe.o msm_axi_qos.o
else
- obj-$(CONFIG_ARCH_MSM7X27A) += msm_vfe7x27a.o
+ obj-$(CONFIG_ARCH_MSM8X60) += msm_vpe1.o
+ obj-$(CONFIG_ARCH_MSM7X30) += msm_vpe1.o
endif
-obj-$(CONFIG_ARCH_QSD8X50) += msm_vfe8x.o msm_vfe8x_proc.o
-ifeq ($(CONFIG_MSM_CAMERA_V4L2),y)
- obj-$(CONFIG_ARCH_MSM8X60) += msm_vfe31_v4l2.o msm_vpe.o
- obj-$(CONFIG_ARCH_MSM7X30) += msm_vfe31_v4l2.o msm_vpe.o msm_axi_qos.o
-else
- obj-$(CONFIG_ARCH_MSM8X60) += msm_vfe31.o msm_vpe1.o
- obj-$(CONFIG_ARCH_MSM7X30) += msm_vfe31.o msm_vpe1.o
-endif
-obj-$(CONFIG_ARCH_MSM8960) += msm_vfe32.o msm_vpe.o
+obj-$(CONFIG_ARCH_MSM8960) += msm_vpe.o
obj-$(CONFIG_MT9T013) += mt9t013.o mt9t013_reg.o
obj-$(CONFIG_SN12M0PZ) += sn12m0pz.o sn12m0pz_reg.o
obj-$(CONFIG_MT9P012) += mt9p012_reg.o
diff --git a/drivers/media/video/msm/csi/Makefile b/drivers/media/video/msm/csi/Makefile
index d11e2d2..547eb13 100644
--- a/drivers/media/video/msm/csi/Makefile
+++ b/drivers/media/video/msm/csi/Makefile
@@ -8,6 +8,7 @@
obj-$(CONFIG_MSM_CSI2_REGISTER) += msm_csi2_register.o
obj-$(CONFIG_MSM_CSIPHY) += msm_csiphy.o
obj-$(CONFIG_MSM_CSID) += msm_csid.o
+obj-$(CONFIG_MSM_ISPIF) += msm_ispif.o
obj-$(CONFIG_ARCH_MSM8960) += msm_csi2_register.o msm_csiphy.o msm_csid.o msm_ispif.o
obj-$(CONFIG_ARCH_MSM7X27A) += msm_csic_register.o msm_csic.o
obj-$(CONFIG_ARCH_MSM8X60) += msm_csic_register.o msm_csic.o
diff --git a/drivers/media/video/msm/csi/include/csi2.0/msm_ispif_hwreg.h b/drivers/media/video/msm/csi/include/csi2.0/msm_ispif_hwreg.h
new file mode 100644
index 0000000..ecc4fea
--- /dev/null
+++ b/drivers/media/video/msm/csi/include/csi2.0/msm_ispif_hwreg.h
@@ -0,0 +1,77 @@
+/* Copyright (c) 2012, Code Aurora Forum. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 and
+ * only version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#ifndef MSM_ISPIF_HWREG_H
+#define MSM_ISPIF_HWREG_H
+
+
+/* ISPIF registers */
+
+#define ISPIF_RST_CMD_ADDR 0x00
+#define ISPIF_RST_CMD_1_ADDR 0x00
+#define ISPIF_INTF_CMD_ADDR 0x04
+#define ISPIF_INTF_CMD_1_ADDR 0x30
+#define ISPIF_CTRL_ADDR 0x08
+#define ISPIF_INPUT_SEL_ADDR 0x0C
+#define ISPIF_PIX_0_INTF_CID_MASK_ADDR 0x10
+#define ISPIF_RDI_0_INTF_CID_MASK_ADDR 0x14
+#define ISPIF_PIX_1_INTF_CID_MASK_ADDR 0x38
+#define ISPIF_RDI_1_INTF_CID_MASK_ADDR 0x3C
+#define ISPIF_RDI_2_INTF_CID_MASK_ADDR 0x44
+#define ISPIF_PIX_0_STATUS_ADDR 0x24
+#define ISPIF_RDI_0_STATUS_ADDR 0x28
+#define ISPIF_PIX_1_STATUS_ADDR 0x60
+#define ISPIF_RDI_1_STATUS_ADDR 0x64
+#define ISPIF_RDI_2_STATUS_ADDR 0x6C
+#define ISPIF_IRQ_MASK_ADDR 0x0100
+#define ISPIF_IRQ_CLEAR_ADDR 0x0104
+#define ISPIF_IRQ_STATUS_ADDR 0x0108
+#define ISPIF_IRQ_MASK_1_ADDR 0x010C
+#define ISPIF_IRQ_CLEAR_1_ADDR 0x0110
+#define ISPIF_IRQ_STATUS_1_ADDR 0x0114
+#define ISPIF_IRQ_MASK_2_ADDR 0x0118
+#define ISPIF_IRQ_CLEAR_2_ADDR 0x011C
+#define ISPIF_IRQ_STATUS_2_ADDR 0x0120
+#define ISPIF_IRQ_GLOBAL_CLEAR_CMD_ADDR 0x0124
+
+/*ISPIF RESET BITS*/
+
+#define VFE_CLK_DOMAIN_RST 31
+#define RDI_CLK_DOMAIN_RST 30
+#define PIX_CLK_DOMAIN_RST 29
+#define AHB_CLK_DOMAIN_RST 28
+#define RDI_1_CLK_DOMAIN_RST 27
+#define RDI_2_VFE_RST_STB 19
+#define RDI_2_CSID_RST_STB 18
+#define RDI_1_VFE_RST_STB 13
+#define RDI_1_CSID_RST_STB 12
+#define RDI_0_VFE_RST_STB 7
+#define RDI_0_CSID_RST_STB 6
+#define PIX_1_VFE_RST_STB 10
+#define PIX_1_CSID_RST_STB 9
+#define PIX_0_VFE_RST_STB 4
+#define PIX_0_CSID_RST_STB 3
+#define SW_REG_RST_STB 2
+#define MISC_LOGIC_RST_STB 1
+#define STROBED_RST_EN 0
+
+#define PIX_INTF_0_OVERFLOW_IRQ 12
+#define RAW_INTF_0_OVERFLOW_IRQ 25
+#define RAW_INTF_1_OVERFLOW_IRQ 25
+#define RESET_DONE_IRQ 27
+
+#define ISPIF_IRQ_STATUS_MASK 0xA493000
+#define ISPIF_IRQ_1_STATUS_MASK 0xA493000
+#define ISPIF_IRQ_STATUS_RDI_SOF_MASK 0x492000
+#define ISPIF_IRQ_GLOBAL_CLEAR_CMD 0x1
+
+#endif
diff --git a/drivers/media/video/msm/csi/include/csi3.0/msm_ispif_hwreg.h b/drivers/media/video/msm/csi/include/csi3.0/msm_ispif_hwreg.h
new file mode 100644
index 0000000..820adf4
--- /dev/null
+++ b/drivers/media/video/msm/csi/include/csi3.0/msm_ispif_hwreg.h
@@ -0,0 +1,91 @@
+/* Copyright (c) 2012, Code Aurora Forum. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 and
+ * only version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#ifndef MSM_ISPIF_HWREG_H
+#define MSM_ISPIF_HWREG_H
+
+
+/* ISPIF registers */
+
+#define ISPIF_RST_CMD_ADDR 0x08
+#define ISPIF_RST_CMD_1_ADDR 0x0C
+#define ISPIF_INTF_CMD_ADDR 0x248
+#define ISPIF_INTF_CMD_1_ADDR 0x24C
+#define ISPIF_CTRL_ADDR 0x08
+#define ISPIF_INPUT_SEL_ADDR 0x244
+#define ISPIF_PIX_0_INTF_CID_MASK_ADDR 0x254
+#define ISPIF_RDI_0_INTF_CID_MASK_ADDR 0x264
+#define ISPIF_PIX_1_INTF_CID_MASK_ADDR 0x258
+#define ISPIF_RDI_1_INTF_CID_MASK_ADDR 0x268
+#define ISPIF_RDI_2_INTF_CID_MASK_ADDR 0x26C
+#define ISPIF_PIX_0_STATUS_ADDR 0x2C0
+#define ISPIF_RDI_0_STATUS_ADDR 0x2D0
+#define ISPIF_PIX_1_STATUS_ADDR 0x2C4
+#define ISPIF_RDI_1_STATUS_ADDR 0x2D4
+#define ISPIF_RDI_2_STATUS_ADDR 0x2D8
+#define ISPIF_IRQ_MASK_ADDR 0x208
+#define ISPIF_IRQ_CLEAR_ADDR 0x230
+#define ISPIF_IRQ_STATUS_ADDR 0x21C
+#define ISPIF_IRQ_MASK_1_ADDR 0x20C
+#define ISPIF_IRQ_CLEAR_1_ADDR 0x234
+#define ISPIF_IRQ_STATUS_1_ADDR 0x220
+#define ISPIF_IRQ_MASK_2_ADDR 0x210
+#define ISPIF_IRQ_CLEAR_2_ADDR 0x238
+#define ISPIF_IRQ_STATUS_2_ADDR 0x224
+#define ISPIF_IRQ_GLOBAL_CLEAR_CMD_ADDR 0x1C
+
+/* new */
+#define ISPIF_VFE_m_CTRL_0_ADDR 0x200
+#define ISPIF_VFE_m_IRQ_MASK_0 0x208
+#define ISPIF_VFE_m_IRQ_MASK_1 0x20C
+#define ISPIF_VFE_m_IRQ_MASK_2 0x210
+#define ISPIF_VFE_m_IRQ_STATUS_0 0x21C
+#define ISPIF_VFE_m_IRQ_STATUS_1 0x220
+#define ISPIF_VFE_m_IRQ_STATUS_2 0x224
+#define ISPIF_VFE_m_IRQ_CLEAR_0 0x230
+#define ISPIF_VFE_m_IRQ_CLEAR_1 0x234
+#define ISPIF_VFE_m_IRQ_CLEAR_2 0x238
+
+/*ISPIF RESET BITS*/
+
+#define VFE_CLK_DOMAIN_RST 31
+#define RDI_CLK_DOMAIN_RST 26
+#define RDI_1_CLK_DOMAIN_RST 27
+#define RDI_2_CLK_DOMAIN_RST 28
+#define PIX_CLK_DOMAIN_RST 29
+#define PIX_1_CLK_DOMAIN_RST 30
+#define AHB_CLK_DOMAIN_RST 25
+#define RDI_2_VFE_RST_STB 12
+#define RDI_2_CSID_RST_STB 11
+#define RDI_1_VFE_RST_STB 10
+#define RDI_1_CSID_RST_STB 9
+#define RDI_0_VFE_RST_STB 8
+#define RDI_0_CSID_RST_STB 7
+#define PIX_1_VFE_RST_STB 6
+#define PIX_1_CSID_RST_STB 5
+#define PIX_0_VFE_RST_STB 4
+#define PIX_0_CSID_RST_STB 3
+#define SW_REG_RST_STB 2
+#define MISC_LOGIC_RST_STB 1
+#define STROBED_RST_EN 0
+
+#define PIX_INTF_0_OVERFLOW_IRQ 12
+#define RAW_INTF_0_OVERFLOW_IRQ 25
+#define RAW_INTF_1_OVERFLOW_IRQ 25
+#define RESET_DONE_IRQ 27
+
+#define ISPIF_IRQ_STATUS_MASK 0xA493000
+#define ISPIF_IRQ_1_STATUS_MASK 0xA493000
+#define ISPIF_IRQ_STATUS_RDI_SOF_MASK 0x492000
+#define ISPIF_IRQ_GLOBAL_CLEAR_CMD 0x1
+
+#endif
diff --git a/drivers/media/video/msm/csi/msm_ispif.c b/drivers/media/video/msm/csi/msm_ispif.c
index 1494644..b23efb5 100644
--- a/drivers/media/video/msm/csi/msm_ispif.c
+++ b/drivers/media/video/msm/csi/msm_ispif.c
@@ -14,78 +14,30 @@
#include <linux/clk.h>
#include <linux/io.h>
#include <linux/module.h>
+#include <linux/of.h>
#include <mach/gpio.h>
#include <mach/camera.h>
#include "msm_ispif.h"
#include "msm.h"
+#include "msm_ispif_hwreg.h"
-#define V4L2_IDENT_ISPIF 50001
-#define CSID_VERSION_V2 0x2000011
-
-/* ISPIF registers */
-
-#define ISPIF_RST_CMD_ADDR 0X00
-#define ISPIF_INTF_CMD_ADDR 0X04
-#define ISPIF_CTRL_ADDR 0X08
-#define ISPIF_INPUT_SEL_ADDR 0X0C
-#define ISPIF_PIX_INTF_CID_MASK_ADDR 0X10
-#define ISPIF_RDI_INTF_CID_MASK_ADDR 0X14
-#define ISPIF_PIX_1_INTF_CID_MASK_ADDR 0X38
-#define ISPIF_RDI_1_INTF_CID_MASK_ADDR 0X3C
-#define ISPIF_PIX_STATUS_ADDR 0X24
-#define ISPIF_RDI_STATUS_ADDR 0X28
-#define ISPIF_RDI_1_STATUS_ADDR 0X64
-#define ISPIF_IRQ_MASK_ADDR 0X0100
-#define ISPIF_IRQ_CLEAR_ADDR 0X0104
-#define ISPIF_IRQ_STATUS_ADDR 0X0108
-#define ISPIF_IRQ_MASK_1_ADDR 0X010C
-#define ISPIF_IRQ_CLEAR_1_ADDR 0X0110
-#define ISPIF_IRQ_STATUS_1_ADDR 0X0114
-#define ISPIF_IRQ_GLOBAL_CLEAR_CMD_ADDR 0x0124
-
-/*ISPIF RESET BITS*/
-
-#define VFE_CLK_DOMAIN_RST 31
-#define RDI_CLK_DOMAIN_RST 30
-#define PIX_CLK_DOMAIN_RST 29
-#define AHB_CLK_DOMAIN_RST 28
-#define RDI_1_CLK_DOMAIN_RST 27
-#define RDI_1_VFE_RST_STB 13
-#define RDI_1_CSID_RST_STB 12
-#define RDI_VFE_RST_STB 7
-#define RDI_CSID_RST_STB 6
-#define PIX_VFE_RST_STB 4
-#define PIX_CSID_RST_STB 3
-#define SW_REG_RST_STB 2
-#define MISC_LOGIC_RST_STB 1
-#define STROBED_RST_EN 0
-
-#define PIX_INTF_0_OVERFLOW_IRQ 12
-#define RAW_INTF_0_OVERFLOW_IRQ 25
-#define RAW_INTF_1_OVERFLOW_IRQ 25
-#define RESET_DONE_IRQ 27
-
-#define ISPIF_IRQ_STATUS_MASK 0xA493000
-#define ISPIF_IRQ_1_STATUS_MASK 0xA493000
-#define ISPIF_IRQ_STATUS_RDI_SOF_MASK 0x492000
-#define ISPIF_IRQ_GLOBAL_CLEAR_CMD 0x1
-
+#define V4L2_IDENT_ISPIF 50001
+#define CSID_VERSION_V2 0x02000011
+#define CSID_VERSION_V3 0x30000000
#define MAX_CID 15
+static atomic_t ispif_irq_cnt;
+static spinlock_t ispif_tasklet_lock;
+static struct list_head ispif_tasklet_q;
-static struct ispif_device *ispif;
-atomic_t ispif_irq_cnt;
-spinlock_t ispif_tasklet_lock;
-struct list_head ispif_tasklet_q;
-
-static uint32_t global_intf_cmd_mask = 0xFFFFFFFF;
-
-
-static int msm_ispif_intf_reset(uint8_t intfmask)
+static int msm_ispif_intf_reset(struct ispif_device *ispif,
+ uint16_t intfmask, uint8_t vfe_intf)
{
int rc = 0;
- uint32_t data = 0x1;
- uint8_t intfnum = 0, mask = intfmask;
+ uint32_t data = (0x1 << STROBED_RST_EN);
+ uint32_t data1 = (0x1 << STROBED_RST_EN);
+ uint16_t intfnum = 0, mask = intfmask;
+
while (mask != 0) {
if (!(intfmask & (0x1 << intfnum))) {
mask >>= 1;
@@ -94,21 +46,48 @@
}
switch (intfnum) {
case PIX0:
- data = (0x1 << STROBED_RST_EN) +
- (0x1 << PIX_VFE_RST_STB) +
- (0x1 << PIX_CSID_RST_STB);
+ if (vfe_intf == VFE0)
+ data |= (0x1 << PIX_0_VFE_RST_STB) |
+ (0x1 << PIX_0_CSID_RST_STB);
+ else
+ data1 |= (0x1 << PIX_0_VFE_RST_STB) |
+ (0x1 << PIX_0_CSID_RST_STB);
break;
case RDI0:
- data = (0x1 << STROBED_RST_EN) +
- (0x1 << RDI_VFE_RST_STB) +
- (0x1 << RDI_CSID_RST_STB);
+ if (vfe_intf == VFE0)
+ data |= (0x1 << RDI_0_VFE_RST_STB) |
+ (0x1 << RDI_0_CSID_RST_STB);
+ else
+ data1 |= (0x1 << RDI_0_VFE_RST_STB) |
+ (0x1 << RDI_0_CSID_RST_STB);
+ break;
+
+ case PIX1:
+ if (vfe_intf == VFE0)
+ data |= (0x1 << PIX_1_VFE_RST_STB) |
+ (0x1 << PIX_1_CSID_RST_STB);
+ else
+ data1 |= (0x1 << PIX_1_VFE_RST_STB) |
+ (0x1 << PIX_1_CSID_RST_STB);
break;
case RDI1:
- data = (0x1 << STROBED_RST_EN) +
- (0x1 << RDI_1_VFE_RST_STB) +
- (0x1 << RDI_1_CSID_RST_STB);
+ if (vfe_intf == VFE0)
+ data |= (0x1 << RDI_1_VFE_RST_STB) |
+ (0x1 << RDI_1_CSID_RST_STB);
+ else
+ data1 |= (0x1 << RDI_1_VFE_RST_STB) |
+ (0x1 << RDI_1_CSID_RST_STB);
+ break;
+
+ case RDI2:
+ if (vfe_intf == VFE0)
+ data |= (0x1 << RDI_2_VFE_RST_STB) |
+ (0x1 << RDI_2_CSID_RST_STB);
+ else
+ data1 |= (0x1 << RDI_2_VFE_RST_STB) |
+ (0x1 << RDI_2_CSID_RST_STB);
break;
default:
@@ -118,27 +97,44 @@
mask >>= 1;
intfnum++;
} /*end while */
- if (rc >= 0) {
- msm_camera_io_w(data, ispif->base + ISPIF_RST_CMD_ADDR);
- rc = wait_for_completion_interruptible(&ispif->reset_complete);
+ msm_camera_io_w(data, ispif->base + ISPIF_RST_CMD_ADDR);
+ rc = wait_for_completion_interruptible(&ispif->reset_complete);
+ if (ispif->csid_version >= CSID_VERSION_V3 && data1 > 0x1) {
+ msm_camera_io_w(data1,
+ ispif->base + ISPIF_RST_CMD_1_ADDR);
+ rc = wait_for_completion_interruptible(&ispif->
+ reset_complete);
}
return rc;
}
-static int msm_ispif_reset(void)
+static int msm_ispif_reset(struct ispif_device *ispif)
{
- uint32_t data = (0x1 << STROBED_RST_EN) +
- (0x1 << SW_REG_RST_STB) +
- (0x1 << MISC_LOGIC_RST_STB) +
- (0x1 << PIX_VFE_RST_STB) +
- (0x1 << PIX_CSID_RST_STB) +
- (0x1 << RDI_VFE_RST_STB) +
- (0x1 << RDI_CSID_RST_STB) +
- (0x1 << RDI_1_VFE_RST_STB) +
+ int rc = 0;
+ uint32_t data = (0x1 << STROBED_RST_EN) |
+ (0x1 << SW_REG_RST_STB) |
+ (0x1 << MISC_LOGIC_RST_STB) |
+ (0x1 << PIX_0_VFE_RST_STB) |
+ (0x1 << PIX_0_CSID_RST_STB) |
+ (0x1 << RDI_0_VFE_RST_STB) |
+ (0x1 << RDI_0_CSID_RST_STB) |
+ (0x1 << RDI_1_VFE_RST_STB) |
(0x1 << RDI_1_CSID_RST_STB);
+
+ if (ispif->csid_version >= CSID_VERSION_V2)
+ data |= (0x1 << PIX_1_VFE_RST_STB) |
+ (0x1 << PIX_1_CSID_RST_STB) |
+ (0x1 << RDI_2_VFE_RST_STB) |
+ (0x1 << RDI_2_CSID_RST_STB);
+ return 0;
msm_camera_io_w(data, ispif->base + ISPIF_RST_CMD_ADDR);
- return wait_for_completion_interruptible(&ispif->reset_complete);
+ rc = wait_for_completion_interruptible(&ispif->reset_complete);
+ if (ispif->csid_version >= CSID_VERSION_V3) {
+ msm_camera_io_w(data, ispif->base + ISPIF_RST_CMD_1_ADDR);
+ rc = wait_for_completion_interruptible(&ispif->reset_complete);
+ }
+ return rc;
}
static int msm_ispif_subdev_g_chip_ident(struct v4l2_subdev *sd,
@@ -150,10 +146,12 @@
return 0;
}
-static void msm_ispif_sel_csid_core(uint8_t intftype, uint8_t csid)
+static void msm_ispif_sel_csid_core(struct ispif_device *ispif,
+ uint8_t intftype, uint8_t csid, uint8_t vfe_intf)
{
int rc = 0;
uint32_t data;
+
if (ispif->ispif_clk[intftype] == NULL) {
pr_err("%s: ispif NULL clk\n", __func__);
return;
@@ -163,62 +161,156 @@
if (rc < 0)
pr_err("%s: clk_set_rate failed %d\n", __func__, rc);
- data = msm_camera_io_r(ispif->base + ISPIF_INPUT_SEL_ADDR);
- data |= csid<<(intftype*4);
- msm_camera_io_w(data, ispif->base + ISPIF_INPUT_SEL_ADDR);
+ data = msm_camera_io_r(ispif->base + ISPIF_INPUT_SEL_ADDR +
+ (0x200 * vfe_intf));
+ switch (intftype) {
+ case PIX0:
+ data |= csid;
+ break;
+
+ case RDI0:
+ data |= (csid << 4);
+ break;
+
+ case PIX1:
+ data |= (csid << 8);
+ break;
+
+ case RDI1:
+ data |= (csid << 12);
+ break;
+
+ case RDI2:
+ data |= (csid << 20);
+ break;
+ }
+ msm_camera_io_w(data, ispif->base + ISPIF_INPUT_SEL_ADDR +
+ (0x200 * vfe_intf));
}
-static void msm_ispif_enable_intf_cids(uint8_t intftype, uint16_t cid_mask)
+static void msm_ispif_enable_intf_cids(struct ispif_device *ispif,
+ uint8_t intftype, uint16_t cid_mask, uint8_t vfe_intf)
{
uint32_t data;
mutex_lock(&ispif->mutex);
switch (intftype) {
case PIX0:
data = msm_camera_io_r(ispif->base +
- ISPIF_PIX_INTF_CID_MASK_ADDR);
+ ISPIF_PIX_0_INTF_CID_MASK_ADDR + (0x200 * vfe_intf));
data |= cid_mask;
msm_camera_io_w(data, ispif->base +
- ISPIF_PIX_INTF_CID_MASK_ADDR);
+ ISPIF_PIX_0_INTF_CID_MASK_ADDR + (0x200 * vfe_intf));
break;
case RDI0:
data = msm_camera_io_r(ispif->base +
- ISPIF_RDI_INTF_CID_MASK_ADDR);
+ ISPIF_RDI_0_INTF_CID_MASK_ADDR + (0x200 * vfe_intf));
data |= cid_mask;
msm_camera_io_w(data, ispif->base +
- ISPIF_RDI_INTF_CID_MASK_ADDR);
+ ISPIF_RDI_0_INTF_CID_MASK_ADDR + (0x200 * vfe_intf));
+ break;
+
+ case PIX1:
+ data = msm_camera_io_r(ispif->base +
+ ISPIF_PIX_1_INTF_CID_MASK_ADDR + (0x200 * vfe_intf));
+ data |= cid_mask;
+ msm_camera_io_w(data, ispif->base +
+ ISPIF_PIX_1_INTF_CID_MASK_ADDR + (0x200 * vfe_intf));
break;
case RDI1:
data = msm_camera_io_r(ispif->base +
- ISPIF_RDI_1_INTF_CID_MASK_ADDR);
+ ISPIF_RDI_1_INTF_CID_MASK_ADDR + (0x200 * vfe_intf));
data |= cid_mask;
msm_camera_io_w(data, ispif->base +
- ISPIF_RDI_1_INTF_CID_MASK_ADDR);
+ ISPIF_RDI_1_INTF_CID_MASK_ADDR + (0x200 * vfe_intf));
+ break;
+
+ case RDI2:
+ data = msm_camera_io_r(ispif->base +
+ ISPIF_RDI_2_INTF_CID_MASK_ADDR + (0x200 * vfe_intf));
+ data |= cid_mask;
+ msm_camera_io_w(data, ispif->base +
+ ISPIF_RDI_2_INTF_CID_MASK_ADDR + (0x200 * vfe_intf));
break;
}
mutex_unlock(&ispif->mutex);
}
-static int msm_ispif_config(struct msm_ispif_params_list *params_list)
+static int32_t msm_ispif_validate_intf_status(struct ispif_device *ispif,
+ uint8_t intftype, uint8_t vfe_intf)
+{
+ int32_t rc = 0;
+ uint32_t data;
+ mutex_lock(&ispif->mutex);
+ switch (intftype) {
+ case PIX0:
+ data = msm_camera_io_r(ispif->base +
+ ISPIF_PIX_0_STATUS_ADDR + (0x200 * vfe_intf));
+ break;
+
+ case RDI0:
+ data = msm_camera_io_r(ispif->base +
+ ISPIF_RDI_0_STATUS_ADDR + (0x200 * vfe_intf));
+ break;
+
+ case PIX1:
+ data = msm_camera_io_r(ispif->base +
+ ISPIF_PIX_1_STATUS_ADDR + (0x200 * vfe_intf));
+ break;
+
+ case RDI1:
+ data = msm_camera_io_r(ispif->base +
+ ISPIF_RDI_1_STATUS_ADDR + (0x200 * vfe_intf));
+ break;
+
+ case RDI2:
+ data = msm_camera_io_r(ispif->base +
+ ISPIF_RDI_2_STATUS_ADDR + (0x200 * vfe_intf));
+ break;
+ }
+ if ((data & 0xf) != 0xf)
+ rc = -EBUSY;
+ mutex_unlock(&ispif->mutex);
+ return rc;
+}
+
+static int msm_ispif_config(struct ispif_device *ispif,
+ struct msm_ispif_params_list *params_list)
{
uint32_t params_len;
struct msm_ispif_params *ispif_params;
- uint32_t data, data1;
int rc = 0, i = 0;
+ uint8_t intftype;
+ uint8_t vfe_intf;
params_len = params_list->len;
ispif_params = params_list->params;
CDBG("Enable interface\n");
- data = msm_camera_io_r(ispif->base + ISPIF_PIX_STATUS_ADDR);
- data1 = msm_camera_io_r(ispif->base + ISPIF_RDI_STATUS_ADDR);
- if (((data & 0xf) != 0xf) || ((data1 & 0xf) != 0xf))
- return -EBUSY;
msm_camera_io_w(0x00000000, ispif->base + ISPIF_IRQ_MASK_ADDR);
for (i = 0; i < params_len; i++) {
- msm_ispif_sel_csid_core(ispif_params[i].intftype,
- ispif_params[i].csid);
- msm_ispif_enable_intf_cids(ispif_params[i].intftype,
- ispif_params[i].cid_mask);
+ intftype = ispif_params[i].intftype;
+ vfe_intf = ispif_params[i].vfe_intf;
+ CDBG("%s intftype %x, vfe_intf %d\n", __func__, intftype,
+ vfe_intf);
+ if ((intftype >= INTF_MAX) ||
+ (ispif->csid_version <= CSID_VERSION_V2 &&
+ vfe_intf > VFE0) ||
+ (ispif->csid_version == CSID_VERSION_V3 &&
+ vfe_intf >= VFE_MAX)) {
+ pr_err("%s: intftype / vfe intf not valid\n",
+ __func__);
+ return -EINVAL;
+ }
+
+ rc = msm_ispif_validate_intf_status(ispif, intftype, vfe_intf);
+ if (rc < 0) {
+ pr_err("%s:%d failed rc %d\n", __func__, __LINE__, rc);
+ return rc;
+ }
+ msm_ispif_sel_csid_core(ispif, intftype, ispif_params[i].csid,
+ vfe_intf);
+ msm_ispif_enable_intf_cids(ispif, intftype,
+ ispif_params[i].cid_mask, vfe_intf);
}
msm_camera_io_w(ISPIF_IRQ_STATUS_MASK, ispif->base +
@@ -230,23 +322,34 @@
return rc;
}
-static uint32_t msm_ispif_get_cid_mask(uint8_t intftype)
+static uint32_t msm_ispif_get_cid_mask(struct ispif_device *ispif,
+ uint16_t intftype, uint8_t vfe_intf)
{
uint32_t mask = 0;
switch (intftype) {
case PIX0:
mask = msm_camera_io_r(ispif->base +
- ISPIF_PIX_INTF_CID_MASK_ADDR);
+ ISPIF_PIX_0_INTF_CID_MASK_ADDR + (0x200 * vfe_intf));
break;
case RDI0:
mask = msm_camera_io_r(ispif->base +
- ISPIF_RDI_INTF_CID_MASK_ADDR);
+ ISPIF_RDI_0_INTF_CID_MASK_ADDR + (0x200 * vfe_intf));
+ break;
+
+ case PIX1:
+ mask = msm_camera_io_r(ispif->base +
+ ISPIF_PIX_1_INTF_CID_MASK_ADDR + (0x200 * vfe_intf));
break;
case RDI1:
mask = msm_camera_io_r(ispif->base +
- ISPIF_RDI_1_INTF_CID_MASK_ADDR);
+ ISPIF_RDI_1_INTF_CID_MASK_ADDR + (0x200 * vfe_intf));
+ break;
+
+ case RDI2:
+ mask = msm_camera_io_r(ispif->base +
+ ISPIF_RDI_2_INTF_CID_MASK_ADDR + (0x200 * vfe_intf));
break;
default:
@@ -255,12 +358,14 @@
return mask;
}
-static void
-msm_ispif_intf_cmd(uint8_t intfmask, uint8_t intf_cmd_mask)
+static void msm_ispif_intf_cmd(struct ispif_device *ispif, uint16_t intfmask,
+ uint8_t intf_cmd_mask, uint8_t vfe_intf)
{
- uint8_t vc = 0, val = 0;
- uint8_t mask = intfmask, intfnum = 0;
+ uint8_t vc = 0;
+ uint16_t mask = intfmask, intfnum = 0;
uint32_t cid_mask = 0;
+ uint32_t global_intf_cmd_mask = 0xFFFFFFFF;
+ uint32_t global_intf_cmd_mask1 = 0xFFFFFFFF;
while (mask != 0) {
if (!(intfmask & (0x1 << intfnum))) {
mask >>= 1;
@@ -268,17 +373,20 @@
continue;
}
- cid_mask = msm_ispif_get_cid_mask(intfnum);
+ cid_mask = msm_ispif_get_cid_mask(ispif, intfnum, vfe_intf);
vc = 0;
while (cid_mask != 0) {
if ((cid_mask & 0xf) != 0x0) {
- val = (intf_cmd_mask>>(vc*2)) & 0x3;
- global_intf_cmd_mask |=
- (0x3 << ((vc * 2) + (intfnum * 8)));
- global_intf_cmd_mask &= ~((0x3 & ~val)
- << ((vc * 2) +
- (intfnum * 8)));
+ if (intfnum != RDI2)
+ global_intf_cmd_mask &=
+ ~((0x3 & ~intf_cmd_mask)
+ << ((vc * 2) +
+ (intfnum * 8)));
+ else
+ global_intf_cmd_mask1 &=
+ ~((0x3 & ~intf_cmd_mask)
+ << ((vc * 2) + 8));
}
vc++;
cid_mask >>= 4;
@@ -287,50 +395,57 @@
intfnum++;
}
msm_camera_io_w(global_intf_cmd_mask,
- ispif->base + ISPIF_INTF_CMD_ADDR);
+ ispif->base + ISPIF_INTF_CMD_ADDR + (0x200 * vfe_intf));
+ if (global_intf_cmd_mask1 != 0xFFFFFFFF)
+ msm_camera_io_w(global_intf_cmd_mask1,
+ ispif->base + ISPIF_INTF_CMD_1_ADDR +
+ (0x200 * vfe_intf));
}
-static int msm_ispif_abort_intf_transfer(uint8_t intfmask)
+static int msm_ispif_abort_intf_transfer(struct ispif_device *ispif,
+ uint16_t intfmask, uint8_t vfe_intf)
{
int rc = 0;
- uint8_t intf_cmd_mask = 0xAA;
- uint8_t intfnum = 0, mask = intfmask;
+ uint8_t intf_cmd_mask = 0x02;
mutex_lock(&ispif->mutex);
- msm_ispif_intf_cmd(intfmask, intf_cmd_mask);
- while (mask != 0) {
- if (intfmask & (0x1 << intfnum))
- global_intf_cmd_mask |= (0xFF << (intfnum * 8));
- mask >>= 1;
- intfnum++;
- }
+ CDBG("%s intfmask %x intf_cmd_mask %x\n", __func__, intfmask,
+ intf_cmd_mask);
+ msm_ispif_intf_cmd(ispif, intfmask, intf_cmd_mask, vfe_intf);
mutex_unlock(&ispif->mutex);
return rc;
}
-static int msm_ispif_start_intf_transfer(uint8_t intfmask)
+static int msm_ispif_start_intf_transfer(struct ispif_device *ispif,
+ uint16_t intfmask, uint8_t vfe_intf)
{
- uint8_t intf_cmd_mask = 0x55;
+ uint8_t intf_cmd_mask = 0x01;
int rc = 0;
mutex_lock(&ispif->mutex);
- rc = msm_ispif_intf_reset(intfmask);
- msm_ispif_intf_cmd(intfmask, intf_cmd_mask);
+ rc = msm_ispif_intf_reset(ispif, intfmask, vfe_intf);
+ CDBG("%s intfmask %x intf_cmd_mask %x\n", __func__, intfmask,
+ intf_cmd_mask);
+ msm_ispif_intf_cmd(ispif, intfmask, intf_cmd_mask, vfe_intf);
mutex_unlock(&ispif->mutex);
return rc;
}
-static int msm_ispif_stop_intf_transfer(uint8_t intfmask)
+static int msm_ispif_stop_intf_transfer(struct ispif_device *ispif,
+ uint16_t intfmask, uint8_t vfe_intf)
{
int rc = 0;
uint8_t intf_cmd_mask = 0x00;
- uint8_t intfnum = 0, mask = intfmask;
+ uint16_t intfnum = 0, mask = intfmask;
mutex_lock(&ispif->mutex);
- msm_ispif_intf_cmd(intfmask, intf_cmd_mask);
+ CDBG("%s intfmask %x intf_cmd_mask %x\n", __func__, intfmask,
+ intf_cmd_mask);
+ msm_ispif_intf_cmd(ispif, intfmask, intf_cmd_mask, vfe_intf);
while (mask != 0) {
if (intfmask & (0x1 << intfnum)) {
switch (intfnum) {
case PIX0:
while ((msm_camera_io_r(ispif->base +
- ISPIF_PIX_STATUS_ADDR)
+ ISPIF_PIX_0_STATUS_ADDR +
+ (0x200 * vfe_intf))
& 0xf) != 0xf) {
CDBG("Wait for pix0 Idle\n");
}
@@ -338,24 +453,43 @@
case RDI0:
while ((msm_camera_io_r(ispif->base +
- ISPIF_RDI_STATUS_ADDR)
+ ISPIF_RDI_0_STATUS_ADDR +
+ (0x200 * vfe_intf))
& 0xf) != 0xf) {
CDBG("Wait for rdi0 Idle\n");
}
break;
+ case PIX1:
+ while ((msm_camera_io_r(ispif->base +
+ ISPIF_PIX_1_STATUS_ADDR +
+ (0x200 * vfe_intf))
+ & 0xf) != 0xf) {
+ CDBG("Wait for pix1 Idle\n");
+ }
+ break;
+
case RDI1:
while ((msm_camera_io_r(ispif->base +
- ISPIF_RDI_1_STATUS_ADDR)
+ ISPIF_RDI_1_STATUS_ADDR +
+ (0x200 * vfe_intf))
& 0xf) != 0xf) {
CDBG("Wait for rdi1 Idle\n");
}
break;
+ case RDI2:
+ while ((msm_camera_io_r(ispif->base +
+ ISPIF_RDI_2_STATUS_ADDR +
+ (0x200 * vfe_intf))
+ & 0xf) != 0xf) {
+ CDBG("Wait for rdi2 Idle\n");
+ }
+ break;
+
default:
break;
}
- global_intf_cmd_mask |= (0xFF << (intfnum * 8));
}
mask >>= 1;
intfnum++;
@@ -364,24 +498,33 @@
return rc;
}
-static int msm_ispif_subdev_video_s_stream(struct v4l2_subdev *sd, int enable)
+static int msm_ispif_subdev_video_s_stream(struct v4l2_subdev *sd,
+ int enable)
{
struct ispif_device *ispif =
(struct ispif_device *)v4l2_get_subdevdata(sd);
- int32_t cmd = enable & ((1<<ISPIF_S_STREAM_SHIFT)-1);
- enum msm_ispif_intftype intf = enable >> ISPIF_S_STREAM_SHIFT;
+ uint32_t cmd = enable & ((1<<ISPIF_S_STREAM_SHIFT)-1);
+ uint16_t intf = enable >> ISPIF_S_STREAM_SHIFT;
+ uint8_t vfe_intf = enable >> ISPIF_VFE_INTF_SHIFT;
int rc = -EINVAL;
-
+ CDBG("%s enable %x, cmd %x, intf %x\n", __func__, enable, cmd, intf);
BUG_ON(!ispif);
+ if ((ispif->csid_version <= CSID_VERSION_V2 && vfe_intf > VFE0) ||
+ (ispif->csid_version == CSID_VERSION_V3 &&
+ vfe_intf >= VFE_MAX)) {
+ pr_err("%s invalid csid version %x && vfe intf %d\n", __func__,
+ ispif->csid_version, vfe_intf);
+ return rc;
+ }
switch (cmd) {
case ISPIF_ON_FRAME_BOUNDARY:
- rc = msm_ispif_start_intf_transfer(intf);
+ rc = msm_ispif_start_intf_transfer(ispif, intf, vfe_intf);
break;
case ISPIF_OFF_FRAME_BOUNDARY:
- rc = msm_ispif_stop_intf_transfer(intf);
+ rc = msm_ispif_stop_intf_transfer(ispif, intf, vfe_intf);
break;
case ISPIF_OFF_IMMEDIATELY:
- rc = msm_ispif_abort_intf_transfer(intf);
+ rc = msm_ispif_abort_intf_transfer(ispif, intf, vfe_intf);
break;
default:
break;
@@ -449,8 +592,10 @@
return;
}
-static inline void msm_ispif_read_irq_status(struct ispif_irq_status *out)
+static inline void msm_ispif_read_irq_status(struct ispif_irq_status *out,
+ void *data)
{
+ struct ispif_device *ispif = (struct ispif_device *)data;
out->ispifIrqStatus0 = msm_camera_io_r(ispif->base +
ISPIF_IRQ_STATUS_ADDR);
out->ispifIrqStatus1 = msm_camera_io_r(ispif->base +
@@ -482,7 +627,7 @@
static irqreturn_t msm_io_ispif_irq(int irq_num, void *data)
{
struct ispif_irq_status irq;
- msm_ispif_read_irq_status(&irq);
+ msm_ispif_read_irq_status(&irq, data);
return IRQ_HANDLED;
}
@@ -494,19 +639,20 @@
{"csi_rdi2_clk", 0},
};
-static int msm_ispif_init(const uint32_t *csid_version)
+static int msm_ispif_init(struct ispif_device *ispif,
+ const uint32_t *csid_version)
{
int rc = 0;
+ CDBG("%s called %d\n", __func__, __LINE__);
spin_lock_init(&ispif_tasklet_lock);
INIT_LIST_HEAD(&ispif_tasklet_q);
rc = request_irq(ispif->irq->start, msm_io_ispif_irq,
- IRQF_TRIGGER_RISING, "ispif", 0);
+ IRQF_TRIGGER_RISING, "ispif", ispif);
- global_intf_cmd_mask = 0xFFFFFFFF;
init_completion(&ispif->reset_complete);
ispif->csid_version = *csid_version;
- if (ispif->csid_version == CSID_VERSION_V2) {
+ if (ispif->csid_version >= CSID_VERSION_V2) {
rc = msm_cam_clk_enable(&ispif->pdev->dev, ispif_clk_info,
ispif->ispif_clk, ARRAY_SIZE(ispif_clk_info), 1);
if (rc < 0)
@@ -517,15 +663,12 @@
if (rc < 0)
return rc;
}
- rc = msm_ispif_reset();
+ rc = msm_ispif_reset(ispif);
return rc;
}
-static void msm_ispif_release(struct v4l2_subdev *sd)
+static void msm_ispif_release(struct ispif_device *ispif)
{
- struct ispif_device *ispif =
- (struct ispif_device *)v4l2_get_subdevdata(sd);
-
CDBG("%s, free_irq\n", __func__);
free_irq(ispif->irq->start, 0);
tasklet_kill(&ispif_tasklet);
@@ -538,43 +681,12 @@
ispif->ispif_clk, 2, 0);
}
-void msm_ispif_vfe_get_cid(uint8_t intftype, char *cids, int *num)
-{
- uint32_t data = 0;
- int i = 0, j = 0;
- switch (intftype) {
- case PIX0:
- data = msm_camera_io_r(ispif->base +
- ISPIF_PIX_INTF_CID_MASK_ADDR);
- break;
-
- case RDI0:
- data = msm_camera_io_r(ispif->base +
- ISPIF_RDI_INTF_CID_MASK_ADDR);
- break;
-
- case RDI1:
- data = msm_camera_io_r(ispif->base +
- ISPIF_RDI_1_INTF_CID_MASK_ADDR);
- break;
-
- default:
- break;
- }
- for (i = 0; i <= MAX_CID; i++) {
- if ((data & 0x1) == 0x1) {
- cids[j++] = i;
- (*num)++;
- }
- data >>= 1;
- }
-}
-
static long msm_ispif_cmd(struct v4l2_subdev *sd, void *arg)
{
long rc = 0;
struct ispif_cfg_data cdata;
-
+ struct ispif_device *ispif =
+ (struct ispif_device *)v4l2_get_subdevdata(sd);
if (copy_from_user(&cdata, (void *)arg, sizeof(struct ispif_cfg_data)))
return -EFAULT;
CDBG("%s cfgtype = %d\n", __func__, cdata.cfgtype);
@@ -582,7 +694,7 @@
case ISPIF_INIT:
CDBG("%s csid_version = %x\n", __func__,
cdata.cfg.csid_version);
- rc = msm_ispif_init(&cdata.cfg.csid_version);
+ rc = msm_ispif_init(ispif, &cdata.cfg.csid_version);
break;
case ISPIF_SET_CFG:
CDBG("%s len = %d, intftype = %d,.cid_mask = %d, csid = %d\n",
@@ -591,7 +703,7 @@
cdata.cfg.ispif_params.params[0].intftype,
cdata.cfg.ispif_params.params[0].cid_mask,
cdata.cfg.ispif_params.params[0].csid);
- rc = msm_ispif_config(&cdata.cfg.ispif_params);
+ rc = msm_ispif_config(ispif, &cdata.cfg.ispif_params);
break;
case ISPIF_SET_ON_FRAME_BOUNDARY:
@@ -600,7 +712,7 @@
rc = msm_ispif_subdev_video_s_stream(sd, cdata.cfg.cmd);
break;
case ISPIF_RELEASE:
- msm_ispif_release(sd);
+ msm_ispif_release(ispif);
break;
default:
break;
@@ -640,6 +752,7 @@
{
int rc = 0;
struct msm_cam_subdev_info sd_info;
+ struct ispif_device *ispif;
CDBG("%s\n", __func__);
ispif = kzalloc(sizeof(struct ispif_device), GFP_KERNEL);
@@ -659,6 +772,10 @@
"ispif");
mutex_init(&ispif->mutex);
+ if (pdev->dev.of_node)
+ of_property_read_u32((&pdev->dev)->of_node,
+ "cell-index", &pdev->id);
+
ispif->mem = platform_get_resource_byname(pdev,
IORESOURCE_MEM, "ispif");
if (!ispif->mem) {
@@ -709,11 +826,18 @@
return rc;
}
+static const struct of_device_id msm_ispif_dt_match[] = {
+ {.compatible = "qcom,ispif"},
+};
+
+MODULE_DEVICE_TABLE(of, msm_ispif_dt_match);
+
static struct platform_driver ispif_driver = {
.probe = ispif_probe,
.driver = {
.name = MSM_ISPIF_DRV_NAME,
.owner = THIS_MODULE,
+ .of_match_table = msm_ispif_dt_match,
},
};
diff --git a/drivers/media/video/msm/csi/msm_ispif.h b/drivers/media/video/msm/csi/msm_ispif.h
index 7b301ba..df93a44 100644
--- a/drivers/media/video/msm/csi/msm_ispif.h
+++ b/drivers/media/video/msm/csi/msm_ispif.h
@@ -45,6 +45,4 @@
#define VIDIOC_MSM_ISPIF_CFG \
_IOWR('V', BASE_VIDIOC_PRIVATE + 18, struct ispif_cfg_data*)
-void msm_ispif_vfe_get_cid(uint8_t intftype, char *cids, int *num);
-
#endif
diff --git a/drivers/media/video/msm/msm_isp.c b/drivers/media/video/msm/msm_isp.c
index 9ddde15..935ce75 100644
--- a/drivers/media/video/msm/msm_isp.c
+++ b/drivers/media/video/msm/msm_isp.c
@@ -188,9 +188,9 @@
}
switch (vdata->type) {
- case VFE_MSG_V32_START:
- case VFE_MSG_V32_START_RECORDING:
- case VFE_MSG_V2X_PREVIEW:
+ case VFE_MSG_START:
+ case VFE_MSG_START_RECORDING:
+ case VFE_MSG_PREVIEW:
D("%s Got V32_START_*: Getting ping addr id = %d",
__func__, vfe_id);
msm_mctl_reserve_free_buf(pmctl, NULL,
@@ -208,8 +208,7 @@
vfe_params.data = (void *)&free_buf;
rc = v4l2_subdev_call(sd, core, ioctl, 0, &vfe_params);
break;
- case VFE_MSG_V32_CAPTURE:
- case VFE_MSG_V2X_CAPTURE:
+ case VFE_MSG_CAPTURE:
pr_debug("%s Got V32_CAPTURE: getting buffer for id = %d",
__func__, vfe_id);
msm_mctl_reserve_free_buf(pmctl, NULL,
@@ -231,8 +230,8 @@
vfe_params.data = (void *)&free_buf;
rc = v4l2_subdev_call(sd, core, ioctl, 0, &vfe_params);
break;
- case VFE_MSG_V32_JPEG_CAPTURE:
- D("%s:VFE_MSG_V32_JPEG_CAPTURE vdata->type %d\n", __func__,
+ case VFE_MSG_JPEG_CAPTURE:
+ D("%s:VFE_MSG_JPEG_CAPTURE vdata->type %d\n", __func__,
vdata->type);
free_buf.num_planes = 2;
free_buf.ch_paddr[0] = pmctl->ping_imem_y;
@@ -241,7 +240,7 @@
cfgcmd.value = &vfe_id;
vfe_params.vfe_cfg = &cfgcmd;
vfe_params.data = (void *)&free_buf;
- D("%s:VFE_MSG_V32_JPEG_CAPTURE y_ping=%x cbcr_ping=%x\n",
+ D("%s:VFE_MSG_JPEG_CAPTURE y_ping=%x cbcr_ping=%x\n",
__func__, free_buf.ch_paddr[0], free_buf.ch_paddr[1]);
rc = v4l2_subdev_call(sd, core, ioctl, 0, &vfe_params);
/* Write the same buffer into PONG */
@@ -251,7 +250,7 @@
cfgcmd.value = &vfe_id;
vfe_params.vfe_cfg = &cfgcmd;
vfe_params.data = (void *)&free_buf;
- D("%s:VFE_MSG_V32_JPEG_CAPTURE y_pong=%x cbcr_pong=%x\n",
+ D("%s:VFE_MSG_JPEG_CAPTURE y_pong=%x cbcr_pong=%x\n",
__func__, free_buf.ch_paddr[0], free_buf.ch_paddr[1]);
rc = v4l2_subdev_call(sd, core, ioctl, 0, &vfe_params);
break;
diff --git a/drivers/media/video/msm/server/msm_cam_server.c b/drivers/media/video/msm/server/msm_cam_server.c
index deab77b..add6328 100644
--- a/drivers/media/video/msm/server/msm_cam_server.c
+++ b/drivers/media/video/msm/server/msm_cam_server.c
@@ -18,7 +18,6 @@
#include "msm_ispif.h"
#include "msm_sensor.h"
#include "msm_actuator.h"
-#include "msm_vfe32.h"
#include "msm_csi_register.h"
#ifdef CONFIG_MSM_CAMERA_DEBUG
diff --git a/drivers/media/video/msm/vfe/Makefile b/drivers/media/video/msm/vfe/Makefile
new file mode 100644
index 0000000..8068e4f
--- /dev/null
+++ b/drivers/media/video/msm/vfe/Makefile
@@ -0,0 +1,19 @@
+GCC_VERSION := $(shell $(CONFIG_SHELL) $(PWD)/scripts/gcc-version.sh $(CROSS_COMPILE)gcc)
+ccflags-y += -Idrivers/media/video/msm
+ccflags-y += -Idrivers/media/video/msm/server
+ifeq ($(GCC_VERSION),0404)
+CFLAGS_REMOVE_msm_vfe8x.o = -Wframe-larger-than=1024
+endif
+ifeq ($(CONFIG_MSM_CAMERA_V4L2),y)
+ obj-$(CONFIG_ARCH_MSM7X27A) += msm_vfe7x27a_v4l2.o
+ obj-$(CONFIG_ARCH_MSM8X60) += msm_vfe31_v4l2.o
+ obj-$(CONFIG_ARCH_MSM7X30) += msm_vfe31_v4l2.o
+else
+ obj-$(CONFIG_ARCH_MSM7X27A) += msm_vfe7x27a.o
+ obj-$(CONFIG_ARCH_MSM8X60) += msm_vfe31.o
+ obj-$(CONFIG_ARCH_MSM7X30) += msm_vfe31.o
+endif
+obj-$(CONFIG_ARCH_MSM_ARM11) += msm_vfe7x.o
+obj-$(CONFIG_ARCH_QSD8X50) += msm_vfe8x.o msm_vfe8x_proc.o
+obj-$(CONFIG_ARCH_MSM8960) += msm_vfe32.o
+obj-$(CONFIG_MSM_CAMERA_V4L2) += msm_vfe_stats_buf.o
diff --git a/drivers/media/video/msm/msm_vfe31.c b/drivers/media/video/msm/vfe/msm_vfe31.c
similarity index 100%
rename from drivers/media/video/msm/msm_vfe31.c
rename to drivers/media/video/msm/vfe/msm_vfe31.c
diff --git a/drivers/media/video/msm/msm_vfe31.h b/drivers/media/video/msm/vfe/msm_vfe31.h
similarity index 100%
rename from drivers/media/video/msm/msm_vfe31.h
rename to drivers/media/video/msm/vfe/msm_vfe31.h
diff --git a/drivers/media/video/msm/msm_vfe31_v4l2.c b/drivers/media/video/msm/vfe/msm_vfe31_v4l2.c
similarity index 99%
rename from drivers/media/video/msm/msm_vfe31_v4l2.c
rename to drivers/media/video/msm/vfe/msm_vfe31_v4l2.c
index a22a09f..b6e01a59 100644
--- a/drivers/media/video/msm/msm_vfe31_v4l2.c
+++ b/drivers/media/video/msm/vfe/msm_vfe31_v4l2.c
@@ -63,12 +63,6 @@
uint32_t vfeInterruptStatus1;
};
-/*TODO: Why is V32 reference in arch/arm/mach-msm/include/mach/camera.h?*/
-#define VFE_MSG_V31_START VFE_MSG_V32_START
-#define VFE_MSG_V31_CAPTURE VFE_MSG_V32_CAPTURE
-#define VFE_MSG_V31_JPEG_CAPTURE VFE_MSG_V32_JPEG_CAPTURE
-#define VFE_MSG_V31_START_RECORDING VFE_MSG_V32_START_RECORDING
-
static struct vfe31_cmd_type vfe31_cmd[] = {
/* 0*/ {VFE_CMD_DUMMY_0},
{VFE_CMD_SET_CLK},
@@ -1420,11 +1414,11 @@
VFE_OUTPUTS_PREVIEW))
/* Configure primary channel */
rc = vfe31_configure_pingpong_buffers(
- VFE_MSG_V31_START, VFE_MSG_OUTPUT_PRIMARY);
+ VFE_MSG_START, VFE_MSG_OUTPUT_PRIMARY);
else
/* Configure secondary channel */
rc = vfe31_configure_pingpong_buffers(
- VFE_MSG_V31_START, VFE_MSG_OUTPUT_SECONDARY);
+ VFE_MSG_START, VFE_MSG_OUTPUT_SECONDARY);
if (rc < 0) {
pr_err("%s error configuring pingpong buffers"
" for preview", __func__);
@@ -1443,7 +1437,7 @@
rc = -EFAULT;
goto proc_general_done;
}
- rc = vfe31_configure_pingpong_buffers(VFE_MSG_V31_CAPTURE,
+ rc = vfe31_configure_pingpong_buffers(VFE_MSG_CAPTURE,
VFE_MSG_OUTPUT_PRIMARY);
if (rc < 0) {
pr_err("%s error configuring pingpong buffers"
@@ -1469,12 +1463,12 @@
}
/* Configure primary channel for JPEG */
rc = vfe31_configure_pingpong_buffers(
- VFE_MSG_V31_JPEG_CAPTURE,
+ VFE_MSG_JPEG_CAPTURE,
VFE_MSG_OUTPUT_PRIMARY);
} else {
/* Configure primary channel */
rc = vfe31_configure_pingpong_buffers(
- VFE_MSG_V31_CAPTURE,
+ VFE_MSG_CAPTURE,
VFE_MSG_OUTPUT_PRIMARY);
}
if (rc < 0) {
@@ -1484,7 +1478,7 @@
goto proc_general_done;
}
/* Configure secondary channel */
- rc = vfe31_configure_pingpong_buffers(VFE_MSG_V31_CAPTURE,
+ rc = vfe31_configure_pingpong_buffers(VFE_MSG_CAPTURE,
VFE_MSG_OUTPUT_SECONDARY);
if (rc < 0) {
pr_err("%s error configuring pingpong buffers"
@@ -1508,13 +1502,13 @@
VFE_OUTPUTS_PREVIEW_AND_VIDEO) {
vfe31_ctrl->outpath.out1.inst_handle = temp1;
rc = vfe31_configure_pingpong_buffers(
- VFE_MSG_V31_START_RECORDING,
+ VFE_MSG_START_RECORDING,
VFE_MSG_OUTPUT_SECONDARY);
} else if (vfe31_ctrl->operation_mode ==
VFE_OUTPUTS_VIDEO_AND_PREVIEW) {
vfe31_ctrl->outpath.out0.inst_handle = temp1;
rc = vfe31_configure_pingpong_buffers(
- VFE_MSG_V31_START_RECORDING,
+ VFE_MSG_START_RECORDING,
VFE_MSG_OUTPUT_PRIMARY);
}
if (rc < 0) {
@@ -1955,7 +1949,7 @@
}
vfe31_ctrl->outpath.out0.inst_handle = temp1;
/* Configure primary channel */
- rc = vfe31_configure_pingpong_buffers(VFE_MSG_V31_CAPTURE,
+ rc = vfe31_configure_pingpong_buffers(VFE_MSG_CAPTURE,
VFE_MSG_OUTPUT_PRIMARY);
if (rc < 0) {
pr_err("%s error configuring pingpong buffers"
@@ -2261,11 +2255,11 @@
break;
case VFE_CMD_ZSL:
- rc = vfe31_configure_pingpong_buffers(VFE_MSG_V31_START,
+ rc = vfe31_configure_pingpong_buffers(VFE_MSG_START,
VFE_MSG_OUTPUT_PRIMARY);
if (rc < 0)
goto proc_general_done;
- rc = vfe31_configure_pingpong_buffers(VFE_MSG_V31_START,
+ rc = vfe31_configure_pingpong_buffers(VFE_MSG_START,
VFE_MSG_OUTPUT_SECONDARY);
if (rc < 0)
goto proc_general_done;
diff --git a/drivers/media/video/msm/msm_vfe31_v4l2.h b/drivers/media/video/msm/vfe/msm_vfe31_v4l2.h
similarity index 100%
rename from drivers/media/video/msm/msm_vfe31_v4l2.h
rename to drivers/media/video/msm/vfe/msm_vfe31_v4l2.h
diff --git a/drivers/media/video/msm/msm_vfe32.c b/drivers/media/video/msm/vfe/msm_vfe32.c
similarity index 99%
rename from drivers/media/video/msm/msm_vfe32.c
rename to drivers/media/video/msm/vfe/msm_vfe32.c
index c4bdad2..c5ff79d 100644
--- a/drivers/media/video/msm/msm_vfe32.c
+++ b/drivers/media/video/msm/vfe/msm_vfe32.c
@@ -1754,25 +1754,25 @@
VFE_OUTPUTS_PREVIEW))
/* Configure primary channel */
rc = vfe32_configure_pingpong_buffers(
- VFE_MSG_V32_START,
+ VFE_MSG_START,
VFE_MSG_OUTPUT_PRIMARY,
vfe32_ctrl);
else
/* Configure secondary channel */
rc = vfe32_configure_pingpong_buffers(
- VFE_MSG_V32_START,
+ VFE_MSG_START,
VFE_MSG_OUTPUT_SECONDARY,
vfe32_ctrl);
}
if (vfe32_ctrl->share_ctrl->operation_mode &
VFE_OUTPUTS_RDI0)
rc = vfe32_configure_pingpong_buffers(
- VFE_MSG_V32_START, VFE_MSG_OUTPUT_TERTIARY1,
+ VFE_MSG_START, VFE_MSG_OUTPUT_TERTIARY1,
vfe32_ctrl);
if (vfe32_ctrl->share_ctrl->operation_mode &
VFE_OUTPUTS_RDI1)
rc = vfe32_configure_pingpong_buffers(
- VFE_MSG_V32_START, VFE_MSG_OUTPUT_TERTIARY2,
+ VFE_MSG_START, VFE_MSG_OUTPUT_TERTIARY2,
vfe32_ctrl);
if (rc < 0) {
@@ -1794,7 +1794,7 @@
goto proc_general_done;
}
rc = vfe32_configure_pingpong_buffers(
- VFE_MSG_V32_CAPTURE, VFE_MSG_OUTPUT_PRIMARY,
+ VFE_MSG_CAPTURE, VFE_MSG_OUTPUT_PRIMARY,
vfe32_ctrl);
if (rc < 0) {
pr_err("%s error configuring pingpong buffers"
@@ -1822,13 +1822,13 @@
}
/* Configure primary channel for JPEG */
rc = vfe32_configure_pingpong_buffers(
- VFE_MSG_V32_JPEG_CAPTURE,
+ VFE_MSG_JPEG_CAPTURE,
VFE_MSG_OUTPUT_PRIMARY,
vfe32_ctrl);
} else {
/* Configure primary channel */
rc = vfe32_configure_pingpong_buffers(
- VFE_MSG_V32_CAPTURE,
+ VFE_MSG_CAPTURE,
VFE_MSG_OUTPUT_PRIMARY,
vfe32_ctrl);
}
@@ -1840,7 +1840,7 @@
}
/* Configure secondary channel */
rc = vfe32_configure_pingpong_buffers(
- VFE_MSG_V32_CAPTURE, VFE_MSG_OUTPUT_SECONDARY,
+ VFE_MSG_CAPTURE, VFE_MSG_OUTPUT_SECONDARY,
vfe32_ctrl);
if (rc < 0) {
pr_err("%s error configuring pingpong buffers"
@@ -1865,7 +1865,7 @@
vfe32_ctrl->share_ctrl->outpath.out1.inst_handle =
temp1;
rc = vfe32_configure_pingpong_buffers(
- VFE_MSG_V32_START_RECORDING,
+ VFE_MSG_START_RECORDING,
VFE_MSG_OUTPUT_SECONDARY,
vfe32_ctrl);
} else if (vfe32_ctrl->share_ctrl->operation_mode &
@@ -1873,7 +1873,7 @@
vfe32_ctrl->share_ctrl->outpath.out0.inst_handle =
temp1;
rc = vfe32_configure_pingpong_buffers(
- VFE_MSG_V32_START_RECORDING,
+ VFE_MSG_START_RECORDING,
VFE_MSG_OUTPUT_PRIMARY,
vfe32_ctrl);
}
@@ -2433,7 +2433,7 @@
}
vfe32_ctrl->share_ctrl->outpath.out0.inst_handle = temp1;
/* Configure primary channel */
- rc = vfe32_configure_pingpong_buffers(VFE_MSG_V32_CAPTURE,
+ rc = vfe32_configure_pingpong_buffers(VFE_MSG_CAPTURE,
VFE_MSG_OUTPUT_PRIMARY, vfe32_ctrl);
if (rc < 0) {
pr_err("%s error configuring pingpong buffers"
@@ -2964,11 +2964,11 @@
break;
case VFE_CMD_ZSL:
- rc = vfe32_configure_pingpong_buffers(VFE_MSG_V32_START,
+ rc = vfe32_configure_pingpong_buffers(VFE_MSG_START,
VFE_MSG_OUTPUT_PRIMARY, vfe32_ctrl);
if (rc < 0)
goto proc_general_done;
- rc = vfe32_configure_pingpong_buffers(VFE_MSG_V32_START,
+ rc = vfe32_configure_pingpong_buffers(VFE_MSG_START,
VFE_MSG_OUTPUT_SECONDARY, vfe32_ctrl);
if (rc < 0)
goto proc_general_done;
diff --git a/drivers/media/video/msm/msm_vfe32.h b/drivers/media/video/msm/vfe/msm_vfe32.h
similarity index 100%
rename from drivers/media/video/msm/msm_vfe32.h
rename to drivers/media/video/msm/vfe/msm_vfe32.h
diff --git a/drivers/media/video/msm/msm_vfe7x.c b/drivers/media/video/msm/vfe/msm_vfe7x.c
similarity index 100%
rename from drivers/media/video/msm/msm_vfe7x.c
rename to drivers/media/video/msm/vfe/msm_vfe7x.c
diff --git a/drivers/media/video/msm/msm_vfe7x.h b/drivers/media/video/msm/vfe/msm_vfe7x.h
similarity index 100%
rename from drivers/media/video/msm/msm_vfe7x.h
rename to drivers/media/video/msm/vfe/msm_vfe7x.h
diff --git a/drivers/media/video/msm/msm_vfe7x27a.c b/drivers/media/video/msm/vfe/msm_vfe7x27a.c
similarity index 100%
rename from drivers/media/video/msm/msm_vfe7x27a.c
rename to drivers/media/video/msm/vfe/msm_vfe7x27a.c
diff --git a/drivers/media/video/msm/msm_vfe7x27a.h b/drivers/media/video/msm/vfe/msm_vfe7x27a.h
similarity index 100%
rename from drivers/media/video/msm/msm_vfe7x27a.h
rename to drivers/media/video/msm/vfe/msm_vfe7x27a.h
diff --git a/drivers/media/video/msm/msm_vfe7x27a_v4l2.c b/drivers/media/video/msm/vfe/msm_vfe7x27a_v4l2.c
similarity index 99%
rename from drivers/media/video/msm/msm_vfe7x27a_v4l2.c
rename to drivers/media/video/msm/vfe/msm_vfe7x27a_v4l2.c
index 32b33e2..b6daa5f 100644
--- a/drivers/media/video/msm/msm_vfe7x27a_v4l2.c
+++ b/drivers/media/video/msm/vfe/msm_vfe7x27a_v4l2.c
@@ -1786,11 +1786,11 @@
}
if (op_mode & SNAPSHOT_MASK_MODE)
rc = vfe2x_configure_pingpong_buffers(
- VFE_MSG_V2X_CAPTURE,
+ VFE_MSG_CAPTURE,
VFE_MSG_OUTPUT_SECONDARY);
else
rc = vfe2x_configure_pingpong_buffers(
- VFE_MSG_V2X_PREVIEW,
+ VFE_MSG_PREVIEW,
VFE_MSG_OUTPUT_SECONDARY);
if (rc < 0) {
pr_err("%s error configuring pingpong buffers"
@@ -1840,11 +1840,11 @@
if (!vfe2x_ctrl->reconfig_vfe) {
if (op_mode & SNAPSHOT_MASK_MODE)
rc = vfe2x_configure_pingpong_buffers(
- VFE_MSG_V2X_CAPTURE,
+ VFE_MSG_CAPTURE,
VFE_MSG_OUTPUT_PRIMARY);
else
rc = vfe2x_configure_pingpong_buffers(
- VFE_MSG_V2X_PREVIEW,
+ VFE_MSG_PREVIEW,
VFE_MSG_OUTPUT_PRIMARY);
if (rc < 0) {
pr_err("%s error configuring pingpong buffers"
@@ -1905,10 +1905,10 @@
}
if (!vfe2x_ctrl->reconfig_vfe) {
rc = vfe2x_configure_pingpong_buffers(
- VFE_MSG_V2X_PREVIEW,
+ VFE_MSG_PREVIEW,
VFE_MSG_OUTPUT_PRIMARY);
rc = vfe2x_configure_pingpong_buffers(
- VFE_MSG_V2X_PREVIEW,
+ VFE_MSG_PREVIEW,
VFE_MSG_OUTPUT_SECONDARY);
if (rc < 0) {
pr_err("%s error configuring pingpong buffers"
@@ -1969,11 +1969,11 @@
}
if (op_mode & SNAPSHOT_MASK_MODE)
rc = vfe2x_configure_pingpong_buffers(
- VFE_MSG_V2X_CAPTURE,
+ VFE_MSG_CAPTURE,
VFE_MSG_OUTPUT_SECONDARY);
else
rc = vfe2x_configure_pingpong_buffers(
- VFE_MSG_V2X_PREVIEW,
+ VFE_MSG_PREVIEW,
VFE_MSG_OUTPUT_SECONDARY);
if (rc < 0) {
pr_err("%s error configuring pingpong buffers"
@@ -2011,11 +2011,11 @@
if (op_mode & SNAPSHOT_MASK_MODE)
rc = vfe2x_configure_pingpong_buffers(
- VFE_MSG_V2X_CAPTURE,
+ VFE_MSG_CAPTURE,
VFE_MSG_OUTPUT_PRIMARY);
else
rc = vfe2x_configure_pingpong_buffers(
- VFE_MSG_V2X_PREVIEW,
+ VFE_MSG_PREVIEW,
VFE_MSG_OUTPUT_PRIMARY);
if (rc < 0) {
pr_err("%s error configuring pingpong buffers"
@@ -2066,7 +2066,7 @@
}
header = cmds_map[vfecmd.id].vfe_id;
queue = cmds_map[vfecmd.id].queue;
- rc = vfe2x_configure_pingpong_buffers(VFE_MSG_V2X_CAPTURE,
+ rc = vfe2x_configure_pingpong_buffers(VFE_MSG_CAPTURE,
VFE_MSG_OUTPUT_PRIMARY);
if (rc < 0) {
pr_err("%s error configuring pingpong buffers"
diff --git a/drivers/media/video/msm/msm_vfe7x27a_v4l2.h b/drivers/media/video/msm/vfe/msm_vfe7x27a_v4l2.h
similarity index 100%
rename from drivers/media/video/msm/msm_vfe7x27a_v4l2.h
rename to drivers/media/video/msm/vfe/msm_vfe7x27a_v4l2.h
diff --git a/drivers/media/video/msm/msm_vfe8x.c b/drivers/media/video/msm/vfe/msm_vfe8x.c
similarity index 100%
rename from drivers/media/video/msm/msm_vfe8x.c
rename to drivers/media/video/msm/vfe/msm_vfe8x.c
diff --git a/drivers/media/video/msm/msm_vfe8x.h b/drivers/media/video/msm/vfe/msm_vfe8x.h
similarity index 100%
rename from drivers/media/video/msm/msm_vfe8x.h
rename to drivers/media/video/msm/vfe/msm_vfe8x.h
diff --git a/drivers/media/video/msm/msm_vfe8x_proc.c b/drivers/media/video/msm/vfe/msm_vfe8x_proc.c
similarity index 100%
rename from drivers/media/video/msm/msm_vfe8x_proc.c
rename to drivers/media/video/msm/vfe/msm_vfe8x_proc.c
diff --git a/drivers/media/video/msm/msm_vfe8x_proc.h b/drivers/media/video/msm/vfe/msm_vfe8x_proc.h
similarity index 100%
rename from drivers/media/video/msm/msm_vfe8x_proc.h
rename to drivers/media/video/msm/vfe/msm_vfe8x_proc.h
diff --git a/drivers/media/video/msm/msm_vfe_stats_buf.c b/drivers/media/video/msm/vfe/msm_vfe_stats_buf.c
similarity index 100%
rename from drivers/media/video/msm/msm_vfe_stats_buf.c
rename to drivers/media/video/msm/vfe/msm_vfe_stats_buf.c
diff --git a/drivers/media/video/msm/msm_vfe_stats_buf.h b/drivers/media/video/msm/vfe/msm_vfe_stats_buf.h
similarity index 100%
rename from drivers/media/video/msm/msm_vfe_stats_buf.h
rename to drivers/media/video/msm/vfe/msm_vfe_stats_buf.h
diff --git a/drivers/video/msm/external_common.c b/drivers/video/msm/external_common.c
index 9f301fe..46ef7b4 100644
--- a/drivers/video/msm/external_common.c
+++ b/drivers/video/msm/external_common.c
@@ -1981,8 +1981,8 @@
struct fb_var_screeninfo *var = &mfd->fbi->var;
bool changed = TRUE;
- if (var->reserved[2]) {
- format = var->reserved[2]-1;
+ if (var->reserved[3]) {
+ format = var->reserved[3]-1;
DEV_DBG("reserved format is %d\n", format);
} else if (hdmi_prim_resolution) {
format = hdmi_prim_resolution - 1;
diff --git a/drivers/video/msm/mdp.h b/drivers/video/msm/mdp.h
index e91209b..2411dca 100644
--- a/drivers/video/msm/mdp.h
+++ b/drivers/video/msm/mdp.h
@@ -283,10 +283,10 @@
#define MDP_PRIM_RDPTR_TERM 0x400
#endif
#define MDP_OVERLAY2_TERM 0x80
-#define MDP_HISTOGRAM_TERM_DMA_P 0x100
-#define MDP_HISTOGRAM_TERM_DMA_S 0x200
-#define MDP_HISTOGRAM_TERM_VG_1 0x400
-#define MDP_HISTOGRAM_TERM_VG_2 0x800
+#define MDP_HISTOGRAM_TERM_DMA_P 0x10000
+#define MDP_HISTOGRAM_TERM_DMA_S 0x20000
+#define MDP_HISTOGRAM_TERM_VG_1 0x40000
+#define MDP_HISTOGRAM_TERM_VG_2 0x80000
#define ACTIVE_START_X_EN BIT(31)
#define ACTIVE_START_Y_EN BIT(31)
diff --git a/drivers/video/msm/mdp4_overlay.c b/drivers/video/msm/mdp4_overlay.c
index 71315e6..eee114a 100644
--- a/drivers/video/msm/mdp4_overlay.c
+++ b/drivers/video/msm/mdp4_overlay.c
@@ -2064,7 +2064,7 @@
iom_pipe_info = &mdp_iommu[pipe->mixer_num][pipe->pipe_ndx - 1];
iom_pipe_info->mark_unmap = 1;
- mdp4_overlay_iommu_pipe_free(pipe->pipe_ndx, 1);
+ mdp4_overlay_iommu_pipe_free(pipe->pipe_ndx, 0);
memset(pipe, 0, sizeof(*pipe));
@@ -2886,16 +2886,11 @@
mfd->use_ov0_blt &= ~(1 << (pipe->pipe_ndx-1));
mdp4_overlay_update_blt_mode(mfd);
- if (!mfd->use_ov0_blt)
- mdp4_free_writeback_buf(mfd, MDP4_MIXER0);
} else { /* mixer1, DTV, ATV */
if (ctrl->panel_mode & MDP4_PANEL_DTV) {
mdp4_overlay_dtv_unset(mfd, pipe);
mfd->use_ov1_blt &= ~(1 << (pipe->pipe_ndx-1));
mdp4_overlay1_update_blt_mode(mfd);
- if (!mfd->use_ov1_blt)
- mdp4_free_writeback_buf(mfd,
- MDP4_MIXER1);
}
}
diff --git a/drivers/video/msm/mdp4_overlay_dsi_video.c b/drivers/video/msm/mdp4_overlay_dsi_video.c
index 28b5cd5..398b1e6 100644
--- a/drivers/video/msm/mdp4_overlay_dsi_video.c
+++ b/drivers/video/msm/mdp4_overlay_dsi_video.c
@@ -49,16 +49,19 @@
struct device *dev;
int inited;
int update_ndx;
- uint32 dmap_intr_cnt;
+ int ov_koff;
+ int ov_done;
atomic_t suspend;
- int dmap_wait_cnt;
int wait_vsync_cnt;
int blt_change;
+ int blt_free;
int fake_vsync;
struct mutex update_lock;
+ struct completion ov_comp;
struct completion dmap_comp;
struct completion vsync_comp;
spinlock_t spin_lock;
+ struct msm_fb_data_type *mfd;
struct mdp4_overlay_pipe *base_pipe;
struct vsync_update vlist[2];
int vsync_irq_enabled;
@@ -145,8 +148,9 @@
mdp4_stat.overlay_play[pipe->mixer_num]++;
}
-
static void mdp4_dsi_video_blt_ov_update(struct mdp4_overlay_pipe *pipe);
+static void mdp4_dsi_video_wait4dmap(int cndx);
+static void mdp4_dsi_video_wait4ov(int cndx);
int mdp4_dsi_video_pipe_commit(void)
{
@@ -175,11 +179,37 @@
vctrl->update_ndx++;
vctrl->update_ndx &= 0x01;
vp->update_cnt = 0; /* reset */
+ if (vctrl->blt_free) {
+ vctrl->blt_free--;
+ if (vctrl->blt_free == 0)
+ mdp4_free_writeback_buf(vctrl->mfd, mixer);
+ }
mutex_unlock(&vctrl->update_lock);
/* free previous committed iommu back to pool */
mdp4_overlay_iommu_unmap_freelist(mixer);
+ spin_lock_irqsave(&vctrl->spin_lock, flags);
+ if (vctrl->ov_koff != vctrl->ov_done) {
+ spin_unlock_irqrestore(&vctrl->spin_lock, flags);
+ pr_err("%s: Error, frame dropped %d %d\n", __func__,
+ vctrl->ov_koff, vctrl->ov_done);
+ return 0;
+ }
+ spin_unlock_irqrestore(&vctrl->spin_lock, flags);
+
+ if (vctrl->blt_change) {
+ pipe = vctrl->base_pipe;
+ spin_lock_irqsave(&vctrl->spin_lock, flags);
+ INIT_COMPLETION(vctrl->dmap_comp);
+ INIT_COMPLETION(vctrl->ov_comp);
+ vsync_irq_enable(INTR_DMA_P_DONE, MDP_DMAP_TERM);
+ spin_unlock_irqrestore(&vctrl->spin_lock, flags);
+ mdp4_dsi_video_wait4dmap(0);
+ if (pipe->ov_blt_addr)
+ mdp4_dsi_video_wait4ov(0);
+ }
+
pipe = vp->plist;
for (i = 0; i < OVERLAY_PIPE_MAX; i++, pipe++) {
if (pipe->pipe_used) {
@@ -200,16 +230,17 @@
spin_lock_irqsave(&vctrl->spin_lock, flags);
if (pipe->ov_blt_addr) {
mdp4_dsi_video_blt_ov_update(pipe);
- pipe->blt_ov_done++;
+ pipe->ov_cnt++;
+ INIT_COMPLETION(vctrl->ov_comp);
vsync_irq_enable(INTR_OVERLAY0_DONE, MDP_OVERLAY0_TERM);
mb();
- pipe->blt_ov_koff++;
+ vctrl->ov_koff++;
/* kickoff overlay engine */
mdp4_stat.kickoff_ov0++;
outpdw(MDP_BASE + 0x0004, 0);
- } else if (vctrl->dmap_intr_cnt == 0) {
+ } else {
/* schedule second phase update at dmap */
- vctrl->dmap_intr_cnt++;
+ INIT_COMPLETION(vctrl->dmap_comp);
vsync_irq_enable(INTR_DMA_P_DONE, MDP_DMAP_TERM);
}
spin_unlock_irqrestore(&vctrl->spin_lock, flags);
@@ -285,7 +316,6 @@
static void mdp4_dsi_video_wait4dmap(int cndx)
{
- unsigned long flags;
struct vsycn_ctrl *vctrl;
if (cndx >= MAX_CONTROLLER) {
@@ -298,23 +328,26 @@
if (atomic_read(&vctrl->suspend) > 0)
return;
- /* start timing generator & mmu if they are not started yet */
- mdp4_overlay_dsi_video_start();
-
- spin_lock_irqsave(&vctrl->spin_lock, flags);
- if (vctrl->dmap_wait_cnt == 0) {
- INIT_COMPLETION(vctrl->dmap_comp);
- if (vctrl->dmap_intr_cnt == 0) {
- vctrl->dmap_intr_cnt++;
- vsync_irq_enable(INTR_DMA_P_DONE, MDP_DMAP_TERM);
- }
- }
- vctrl->dmap_wait_cnt++;
- spin_unlock_irqrestore(&vctrl->spin_lock, flags);
-
wait_for_completion(&vctrl->dmap_comp);
}
+static void mdp4_dsi_video_wait4ov(int cndx)
+{
+ struct vsycn_ctrl *vctrl;
+
+ if (cndx >= MAX_CONTROLLER) {
+ pr_err("%s: out or range: cndx=%d\n", __func__, cndx);
+ return;
+ }
+
+ vctrl = &vsync_ctrl_db[cndx];
+
+ if (atomic_read(&vctrl->suspend) > 0)
+ return;
+
+ wait_for_completion(&vctrl->ov_comp);
+}
+
static void send_vsync_work(struct work_struct *work)
{
struct vsycn_ctrl *vctrl =
@@ -349,6 +382,7 @@
mutex_init(&vctrl->update_lock);
init_completion(&vctrl->vsync_comp);
init_completion(&vctrl->dmap_comp);
+ init_completion(&vctrl->ov_comp);
atomic_set(&vctrl->suspend, 0);
spin_lock_init(&vctrl->spin_lock);
INIT_WORK(&vctrl->vsync_work, send_vsync_work);
@@ -413,14 +447,15 @@
vctrl = &vsync_ctrl_db[cndx];
mfd = (struct msm_fb_data_type *)platform_get_drvdata(pdev);
- vctrl->dev = mfd->fbi->dev;
-
if (!mfd)
return -ENODEV;
if (mfd->key != MFD_KEY)
return -EINVAL;
+ vctrl->mfd = mfd;
+ vctrl->dev = mfd->fbi->dev;
+
/* mdp clock on */
mdp_clk_ctrl(1);
@@ -728,18 +763,16 @@
int bpp;
char *overlay_base;
-
if (pipe->ov_blt_addr == 0)
return;
-
#ifdef BLT_RGB565
bpp = 2; /* overlay ouput is RGB565 */
#else
bpp = 3; /* overlay ouput is RGB888 */
#endif
off = 0;
- if (pipe->blt_ov_done & 0x01)
+ if (pipe->ov_cnt & 0x01)
off = pipe->src_height * pipe->src_width * bpp;
addr = pipe->ov_blt_addr + off;
@@ -764,7 +797,7 @@
bpp = 3; /* overlay ouput is RGB888 */
#endif
off = 0;
- if (pipe->blt_dmap_done & 0x01)
+ if (pipe->dmap_cnt & 0x01)
off = pipe->src_height * pipe->src_width * bpp;
addr = pipe->dma_blt_addr + off;
@@ -774,7 +807,6 @@
void mdp4_overlay_dsi_video_set_perf(struct msm_fb_data_type *mfd)
{
- mdp4_dsi_video_wait4dmap(0);
/* change mdp clk while mdp is idle */
mdp4_set_perf_level();
}
@@ -819,30 +851,26 @@
pipe = vctrl->base_pipe;
spin_lock(&vctrl->spin_lock);
+ vsync_irq_disable(INTR_DMA_P_DONE, MDP_DMAP_TERM);
if (vctrl->blt_change) {
mdp4_overlayproc_cfg(pipe);
mdp4_overlay_dmap_xy(pipe);
if (pipe->ov_blt_addr) {
mdp4_dsi_video_blt_ov_update(pipe);
- pipe->blt_ov_done++;
-
+ pipe->ov_cnt++;
/* Prefill one frame */
- vsync_irq_enable(INTR_OVERLAY0_DONE, MDP_OVERLAY0_TERM);
+ vsync_irq_enable(INTR_OVERLAY0_DONE,
+ MDP_OVERLAY0_TERM);
/* kickoff overlay0 engine */
mdp4_stat.kickoff_ov0++;
+ vctrl->ov_koff++; /* make up for prefill */
outpdw(MDP_BASE + 0x0004, 0);
}
vctrl->blt_change = 0;
}
- vctrl->dmap_intr_cnt--;
- if (vctrl->dmap_wait_cnt) {
- complete_all(&vctrl->dmap_comp);
- vctrl->dmap_wait_cnt = 0; /* reset */
- } else {
- mdp4_overlay_dma_commit(cndx);
- }
- vsync_irq_disable(INTR_DMA_P_DONE, MDP_DMAP_TERM);
+ complete_all(&vctrl->dmap_comp);
+ mdp4_overlay_dma_commit(cndx);
spin_unlock(&vctrl->spin_lock);
}
@@ -858,14 +886,16 @@
pipe = vctrl->base_pipe;
spin_lock(&vctrl->spin_lock);
+ vsync_irq_disable(INTR_OVERLAY0_DONE, MDP_OVERLAY0_TERM);
+ vctrl->ov_done++;
+ complete_all(&vctrl->ov_comp);
if (pipe->ov_blt_addr == 0) {
spin_unlock(&vctrl->spin_lock);
return;
}
mdp4_dsi_video_blt_dmap_update(pipe);
- pipe->blt_dmap_done++;
- vsync_irq_disable(INTR_OVERLAY0_DONE, MDP_OVERLAY0_TERM);
+ pipe->dmap_cnt++;
spin_unlock(&vctrl->spin_lock);
}
@@ -876,7 +906,6 @@
static void mdp4_dsi_video_do_blt(struct msm_fb_data_type *mfd, int enable)
{
unsigned long flag;
- int data;
int cndx = 0;
struct vsycn_ctrl *vctrl;
struct mdp4_overlay_pipe *pipe;
@@ -895,16 +924,17 @@
if (enable && pipe->ov_blt_addr == 0) {
pipe->ov_blt_addr = mfd->ov0_wb_buf->write_addr;
pipe->dma_blt_addr = mfd->ov0_wb_buf->read_addr;
- pipe->blt_cnt = 0;
pipe->ov_cnt = 0;
- pipe->blt_dmap_done = 0;
- pipe->blt_ov_koff = 0;
- pipe->blt_ov_done = 0;
+ pipe->dmap_cnt = 0;
+ vctrl->ov_koff = 0;
+ vctrl->ov_done = 0;
+ vctrl->blt_free = 0;
mdp4_stat.blt_dsi_video++;
vctrl->blt_change++;
} else if (enable == 0 && pipe->ov_blt_addr) {
pipe->ov_blt_addr = 0;
pipe->dma_blt_addr = 0;
+ vctrl->blt_free = 4; /* 4 commits to free wb buf */
vctrl->blt_change++;
}
@@ -917,11 +947,6 @@
}
spin_unlock_irqrestore(&vctrl->spin_lock, flag);
-
- data = inpdw(MDP_BASE + DSI_VIDEO_BASE);
- data &= 0x01;
- if (data) /* timing generator enabled */
- mdp4_dsi_video_wait4dmap(0);
}
void mdp4_dsi_video_overlay_blt(struct msm_fb_data_type *mfd,
@@ -972,6 +997,10 @@
}
mdp4_dsi_video_pipe_commit();
- mdp4_dsi_video_wait4dmap(0);
+
+ if (pipe->ov_blt_addr)
+ mdp4_dsi_video_wait4ov(0);
+ else
+ mdp4_dsi_video_wait4dmap(0);
}
diff --git a/drivers/video/msm/mdp4_overlay_lcdc.c b/drivers/video/msm/mdp4_overlay_lcdc.c
index 57793fc..2da2052 100644
--- a/drivers/video/msm/mdp4_overlay_lcdc.c
+++ b/drivers/video/msm/mdp4_overlay_lcdc.c
@@ -50,16 +50,19 @@
struct device *dev;
int inited;
int update_ndx;
- uint32 dmap_intr_cnt;
+ int ov_koff;
+ int ov_done;
atomic_t suspend;
- int dmap_wait_cnt;
int wait_vsync_cnt;
int blt_change;
+ int blt_free;
int fake_vsync;
struct mutex update_lock;
+ struct completion ov_comp;
struct completion dmap_comp;
struct completion vsync_comp;
spinlock_t spin_lock;
+ struct msm_fb_data_type *mfd;
struct mdp4_overlay_pipe *base_pipe;
struct vsync_update vlist[2];
int vsync_irq_enabled;
@@ -150,8 +153,9 @@
mdp4_stat.overlay_play[pipe->mixer_num]++;
}
-
static void mdp4_lcdc_blt_ov_update(struct mdp4_overlay_pipe *pipe);
+static void mdp4_lcdc_wait4dmap(int cndx);
+static void mdp4_lcdc_wait4ov(int cndx);
int mdp4_lcdc_pipe_commit(void)
{
@@ -180,11 +184,37 @@
vctrl->update_ndx++;
vctrl->update_ndx &= 0x01;
vp->update_cnt = 0; /* reset */
+ if (vctrl->blt_free) {
+ vctrl->blt_free--;
+ if (vctrl->blt_free == 0)
+ mdp4_free_writeback_buf(vctrl->mfd, mixer);
+ }
mutex_unlock(&vctrl->update_lock);
/* free previous committed iommu back to pool */
mdp4_overlay_iommu_unmap_freelist(mixer);
+ spin_lock_irqsave(&vctrl->spin_lock, flags);
+ if (vctrl->ov_koff != vctrl->ov_done) {
+ spin_unlock_irqrestore(&vctrl->spin_lock, flags);
+ pr_err("%s: Error, frame dropped %d %d\n", __func__,
+ vctrl->ov_koff, vctrl->ov_done);
+ return 0;
+ }
+ spin_unlock_irqrestore(&vctrl->spin_lock, flags);
+
+ if (vctrl->blt_change) {
+ pipe = vctrl->base_pipe;
+ spin_lock_irqsave(&vctrl->spin_lock, flags);
+ INIT_COMPLETION(vctrl->dmap_comp);
+ INIT_COMPLETION(vctrl->ov_comp);
+ vsync_irq_enable(INTR_DMA_P_DONE, MDP_DMAP_TERM);
+ spin_unlock_irqrestore(&vctrl->spin_lock, flags);
+ mdp4_lcdc_wait4dmap(0);
+ if (pipe->ov_blt_addr)
+ mdp4_lcdc_wait4ov(0);
+ }
+
pipe = vp->plist;
for (i = 0; i < OVERLAY_PIPE_MAX; i++, pipe++) {
if (pipe->pipe_used) {
@@ -205,15 +235,17 @@
spin_lock_irqsave(&vctrl->spin_lock, flags);
if (pipe->ov_blt_addr) {
mdp4_lcdc_blt_ov_update(pipe);
- pipe->blt_ov_done++;
+ pipe->ov_cnt++;
+ INIT_COMPLETION(vctrl->ov_comp);
vsync_irq_enable(INTR_OVERLAY0_DONE, MDP_OVERLAY0_TERM);
mb();
- pipe->blt_ov_koff++;
+ vctrl->ov_koff++;
/* kickoff overlay engine */
+ mdp4_stat.kickoff_ov0++;
outpdw(MDP_BASE + 0x0004, 0);
- } else if (vctrl->dmap_intr_cnt == 0) {
+ } else {
/* schedule second phase update at dmap */
- vctrl->dmap_intr_cnt++;
+ INIT_COMPLETION(vctrl->dmap_comp);
vsync_irq_enable(INTR_DMA_P_DONE, MDP_DMAP_TERM);
}
spin_unlock_irqrestore(&vctrl->spin_lock, flags);
@@ -289,7 +321,6 @@
static void mdp4_lcdc_wait4dmap(int cndx)
{
- unsigned long flags;
struct vsycn_ctrl *vctrl;
if (cndx >= MAX_CONTROLLER) {
@@ -302,22 +333,24 @@
if (atomic_read(&vctrl->suspend) > 0)
return;
- /* start timing generator & mmu if they are not started yet */
- mdp4_overlay_lcdc_start();
-
- spin_lock_irqsave(&vctrl->spin_lock, flags);
- if (vctrl->dmap_wait_cnt == 0) {
- INIT_COMPLETION(vctrl->dmap_comp);
- if (vctrl->dmap_intr_cnt == 0) {
- vctrl->dmap_intr_cnt++;
- vsync_irq_enable(INTR_DMA_P_DONE, MDP_DMAP_TERM);
- }
- }
- vctrl->dmap_wait_cnt++;
- spin_unlock_irqrestore(&vctrl->spin_lock, flags);
-
wait_for_completion(&vctrl->dmap_comp);
- pr_debug("%s: pid=%d after wait\n", __func__, current->pid);
+}
+
+static void mdp4_lcdc_wait4ov(int cndx)
+{
+ struct vsycn_ctrl *vctrl;
+
+ if (cndx >= MAX_CONTROLLER) {
+ pr_err("%s: out or range: cndx=%d\n", __func__, cndx);
+ return;
+ }
+
+ vctrl = &vsync_ctrl_db[cndx];
+
+ if (atomic_read(&vctrl->suspend) > 0)
+ return;
+
+ wait_for_completion(&vctrl->ov_comp);
}
static void send_vsync_work(struct work_struct *work)
@@ -354,6 +387,7 @@
mutex_init(&vctrl->update_lock);
init_completion(&vctrl->vsync_comp);
init_completion(&vctrl->dmap_comp);
+ init_completion(&vctrl->ov_comp);
atomic_set(&vctrl->suspend, 0);
spin_lock_init(&vctrl->spin_lock);
INIT_WORK(&vctrl->vsync_work, send_vsync_work);
@@ -424,6 +458,7 @@
if (mfd->key != MFD_KEY)
return -EINVAL;
+ vctrl->mfd = mfd;
vctrl->dev = mfd->fbi->dev;
/* mdp clock on */
@@ -637,18 +672,16 @@
int bpp;
char *overlay_base;
-
if (pipe->ov_blt_addr == 0)
return;
-
#ifdef BLT_RGB565
bpp = 2; /* overlay ouput is RGB565 */
#else
bpp = 3; /* overlay ouput is RGB888 */
#endif
off = 0;
- if (pipe->blt_ov_done & 0x01)
+ if (pipe->ov_cnt & 0x01)
off = pipe->src_height * pipe->src_width * bpp;
addr = pipe->ov_blt_addr + off;
@@ -666,14 +699,13 @@
if (pipe->ov_blt_addr == 0)
return;
-
#ifdef BLT_RGB565
bpp = 2; /* overlay ouput is RGB565 */
#else
bpp = 3; /* overlay ouput is RGB888 */
#endif
off = 0;
- if (pipe->blt_dmap_done & 0x01)
+ if (pipe->dmap_cnt & 0x01)
off = pipe->src_height * pipe->src_width * bpp;
addr = pipe->dma_blt_addr + off;
@@ -683,7 +715,6 @@
void mdp4_overlay_lcdc_set_perf(struct msm_fb_data_type *mfd)
{
- mdp4_lcdc_wait4dmap(0);
/* change mdp clk while mdp is idle */
mdp4_set_perf_level();
}
@@ -727,29 +758,25 @@
pipe = vctrl->base_pipe;
spin_lock(&vctrl->spin_lock);
+ vsync_irq_disable(INTR_DMA_P_DONE, MDP_DMAP_TERM);
if (vctrl->blt_change) {
mdp4_overlayproc_cfg(pipe);
mdp4_overlay_dmap_xy(pipe);
if (pipe->ov_blt_addr) {
mdp4_lcdc_blt_ov_update(pipe);
- pipe->blt_ov_done++;
-
+ pipe->ov_cnt++;
/* Prefill one frame */
vsync_irq_enable(INTR_OVERLAY0_DONE, MDP_OVERLAY0_TERM);
/* kickoff overlay0 engine */
+ mdp4_stat.kickoff_ov0++;
+ vctrl->ov_koff++; /* make up for prefill */
outpdw(MDP_BASE + 0x0004, 0);
}
vctrl->blt_change = 0;
}
- vctrl->dmap_intr_cnt--;
- if (vctrl->dmap_wait_cnt) {
- complete_all(&vctrl->dmap_comp);
- vctrl->dmap_wait_cnt = 0; /* reset */
- } else {
- mdp4_overlay_dma_commit(cndx);
- }
- vsync_irq_disable(INTR_DMA_P_DONE, MDP_DMAP_TERM);
+ complete_all(&vctrl->dmap_comp);
+ mdp4_overlay_dma_commit(cndx);
spin_unlock(&vctrl->spin_lock);
}
@@ -765,21 +792,22 @@
pipe = vctrl->base_pipe;
spin_lock(&vctrl->spin_lock);
+ vsync_irq_disable(INTR_OVERLAY0_DONE, MDP_OVERLAY0_TERM);
+ vctrl->ov_done++;
+ complete_all(&vctrl->ov_comp);
if (pipe->ov_blt_addr == 0) {
spin_unlock(&vctrl->spin_lock);
return;
}
mdp4_lcdc_blt_dmap_update(pipe);
- pipe->blt_dmap_done++;
- mdp_disable_irq_nosync(MDP_OVERLAY0_TERM);
+ pipe->dmap_cnt++;
spin_unlock(&vctrl->spin_lock);
}
static void mdp4_lcdc_do_blt(struct msm_fb_data_type *mfd, int enable)
{
unsigned long flag;
- int data;
int cndx = 0;
struct vsycn_ctrl *vctrl;
struct mdp4_overlay_pipe *pipe;
@@ -798,16 +826,17 @@
if (enable && pipe->ov_blt_addr == 0) {
pipe->ov_blt_addr = mfd->ov0_wb_buf->write_addr;
pipe->dma_blt_addr = mfd->ov0_wb_buf->read_addr;
- pipe->blt_cnt = 0;
pipe->ov_cnt = 0;
- pipe->blt_dmap_done = 0;
- pipe->blt_ov_koff = 0;
- pipe->blt_ov_done = 0;
+ pipe->dmap_cnt = 0;
+ vctrl->ov_koff = 0;
+ vctrl->ov_done = 0;
+ vctrl->blt_free = 0;
mdp4_stat.blt_lcdc++;
vctrl->blt_change++;
} else if (enable == 0 && pipe->ov_blt_addr) {
pipe->ov_blt_addr = 0;
pipe->dma_blt_addr = 0;
+ vctrl->blt_free = 4; /* 4 commits to free wb buf */
vctrl->blt_change++;
}
@@ -820,11 +849,6 @@
}
spin_unlock_irqrestore(&vctrl->spin_lock, flag);
-
- data = inpdw(MDP_BASE + LCDC_BASE);
- data &= 0x01;
- if (data) /* timing generator enabled */
- mdp4_lcdc_wait4dmap(0);
}
void mdp4_lcdc_overlay_blt(struct msm_fb_data_type *mfd,
@@ -876,5 +900,9 @@
}
mdp4_lcdc_pipe_commit();
- mdp4_lcdc_wait4dmap(0);
+
+ if (pipe->ov_blt_addr)
+ mdp4_lcdc_wait4ov(0);
+ else
+ mdp4_lcdc_wait4dmap(0);
}
diff --git a/drivers/video/msm/mdp4_util.c b/drivers/video/msm/mdp4_util.c
index 573e317..e76b8ba 100644
--- a/drivers/video/msm/mdp4_util.c
+++ b/drivers/video/msm/mdp4_util.c
@@ -462,11 +462,6 @@
dma = &dma2_data;
if (panel & (MDP4_PANEL_LCDC | MDP4_PANEL_DSI_VIDEO)) {
/* disable LCDC interrupt */
- spin_lock(&mdp_spin_lock);
- mdp_intr_mask &= ~INTR_OVERLAY0_DONE;
- outp32(MDP_INTR_ENABLE, mdp_intr_mask);
- dma->waiting = FALSE;
- spin_unlock(&mdp_spin_lock);
if (panel & MDP4_PANEL_LCDC)
mdp4_overlay0_done_lcdc(0);
#ifdef CONFIG_FB_MSM_MIPI_DSI
diff --git a/drivers/video/msm/mdss/mdss_fb.c b/drivers/video/msm/mdss/mdss_fb.c
index a96bf3a..ee086ad 100644
--- a/drivers/video/msm/mdss/mdss_fb.c
+++ b/drivers/video/msm/mdss/mdss_fb.c
@@ -774,17 +774,23 @@
fix->type = panel_info->is_3d_panel;
fix->line_length = mdss_fb_line_length(mfd->index, panel_info->xres,
bpp);
- mfd->var_xres = panel_info->xres;
- mfd->var_yres = panel_info->yres;
-
- var->pixclock = mfd->panel_info.clk_rate;
- mfd->var_pixclock = var->pixclock;
var->xres = panel_info->xres;
var->yres = panel_info->yres;
var->xres_virtual = panel_info->xres;
var->yres_virtual = panel_info->yres * mfd->fb_page;
var->bits_per_pixel = bpp * 8; /* FrameBuffer color depth */
+ var->upper_margin = panel_info->lcdc.v_front_porch;
+ var->lower_margin = panel_info->lcdc.v_back_porch;
+ var->vsync_len = panel_info->lcdc.v_pulse_width;
+ var->left_margin = panel_info->lcdc.h_front_porch;
+ var->right_margin = panel_info->lcdc.h_back_porch;
+ var->hsync_len = panel_info->lcdc.h_pulse_width;
+ var->pixclock = panel_info->clk_rate / 1000;
+
+ mfd->var_xres = var->xres;
+ mfd->var_yres = var->yres;
+ mfd->var_pixclock = var->pixclock;
/* id field for fb app */
@@ -796,6 +802,7 @@
fbi->flags = FBINFO_FLAG_DEFAULT;
fbi->pseudo_palette = mdss_fb_pseudo_palette;
+ panel_info->fbi = fbi;
mfd->ref_cnt = 0;
mfd->panel_power_on = false;
diff --git a/drivers/video/msm/mdss/mdss_mdp_overlay.c b/drivers/video/msm/mdss/mdss_mdp_overlay.c
index 43ddb5e..2e9a2dc 100644
--- a/drivers/video/msm/mdss/mdss_mdp_overlay.c
+++ b/drivers/video/msm/mdss/mdss_mdp_overlay.c
@@ -115,11 +115,10 @@
if (fmt->is_yuv) {
if ((req->src_rect.x & 0x1) || (req->src_rect.y & 0x1) ||
(req->src_rect.w & 0x1) || (req->src_rect.h & 0x1)) {
- pr_err("invalid odd src resolution\n");
+ pr_err("invalid odd src resolution or coordinates\n");
return -EINVAL;
}
- if ((req->dst_rect.x & 0x1) || (req->dst_rect.y & 0x1) ||
- (req->dst_rect.w & 0x1) || (req->dst_rect.h & 0x1)) {
+ if ((req->dst_rect.w & 0x1) || (req->dst_rect.h & 0x1)) {
pr_err("invalid odd dst resolution\n");
return -EINVAL;
}
diff --git a/drivers/video/msm/mdss/mdss_mdp_pipe.c b/drivers/video/msm/mdss/mdss_mdp_pipe.c
index 52f4324..d9a148e 100644
--- a/drivers/video/msm/mdss/mdss_mdp_pipe.c
+++ b/drivers/video/msm/mdss/mdss_mdp_pipe.c
@@ -354,11 +354,12 @@
u32 chroma_sample;
if (pipe->type == MDSS_MDP_PIPE_TYPE_DMA) {
- if (!(pipe->flags & MDP_ROT_90) && (pipe->dst.h != pipe->src.h
- || pipe->dst.w != pipe->src.w))
- return -EINVAL; /* no scaling supported on dma pipes */
- else
+ if (pipe->dst.h != pipe->src.h || pipe->dst.w != pipe->src.w) {
+ pr_err("no scaling supported on dma pipe\n");
+ return -EINVAL;
+ } else {
return 0;
+ }
}
chroma_sample = pipe->src_fmt->chroma_sample;
@@ -535,10 +536,10 @@
pr_debug("pnum=%d format=%d opmode=%x\n", pipe->num, fmt->format,
opmode);
- rot90 = !!(pipe->flags & MDP_SOURCE_ROTATED_90);
+ rot90 = !!(pipe->flags & MDP_ROT_90);
chroma_samp = fmt->chroma_sample;
- if (rot90) {
+ if (pipe->flags & MDP_SOURCE_ROTATED_90) {
if (chroma_samp == MDSS_MDP_CHROMA_H2V1)
chroma_samp = MDSS_MDP_CHROMA_H1V2;
else if (chroma_samp == MDSS_MDP_CHROMA_H1V2)
diff --git a/drivers/video/msm/mdss/mdss_mdp_rotator.c b/drivers/video/msm/mdss/mdss_mdp_rotator.c
index fc3a843..dc1cb0d 100644
--- a/drivers/video/msm/mdss/mdss_mdp_rotator.c
+++ b/drivers/video/msm/mdss/mdss_mdp_rotator.c
@@ -212,6 +212,7 @@
rot_pipe->img_width = rot->img_width;
rot_pipe->img_height = rot->img_height;
rot_pipe->src = rot->src_rect;
+ rot_pipe->dst = rot->src_rect;
rot_pipe->bwc_mode = rot->bwc_mode;
rot_pipe->params_changed++;
}
diff --git a/drivers/video/msm/mdss/mdss_mdp_wb.c b/drivers/video/msm/mdss/mdss_mdp_wb.c
index da55edc..046f666 100644
--- a/drivers/video/msm/mdss/mdss_mdp_wb.c
+++ b/drivers/video/msm/mdss/mdss_mdp_wb.c
@@ -60,32 +60,40 @@
static struct mdss_mdp_wb mdss_mdp_wb_info;
#ifdef DEBUG_WRITEBACK
-/* for debugging: writeback output buffer to framebuffer memory */
+/* for debugging: writeback output buffer to allocated memory */
static inline
struct mdss_mdp_data *mdss_mdp_wb_debug_buffer(struct msm_fb_data_type *mfd)
{
+ static struct ion_handle *ihdl;
static void *videomemory;
- static void *mdss_wb_mem;
- static struct mdss_mdp_data buffer = {
- .num_planes = 1,
- };
-
+ static ion_phys_addr_t mdss_wb_mem;
+ static struct mdss_mdp_data buffer = { .num_planes = 1, };
struct fb_info *fbi;
- int img_size;
- int offset;
-
+ size_t img_size;
fbi = mfd->fbi;
img_size = fbi->var.xres * fbi->var.yres * fbi->var.bits_per_pixel / 8;
- offset = fbi->fix.smem_len - img_size;
- videomemory = fbi->screen_base + offset;
- mdss_wb_mem = (void *)(fbi->fix.smem_start + offset);
+ if (ihdl == NULL) {
+ ihdl = ion_alloc(mfd->iclient, img_size, SZ_4K,
+ ION_HEAP(ION_SF_HEAP_ID));
+ if (!IS_ERR_OR_NULL(ihdl)) {
+ videomemory = ion_map_kernel(mfd->iclient, ihdl, 0);
+ ion_phys(mfd->iclient, ihdl, &mdss_wb_mem, &img_size);
+ } else {
+ pr_err("unable to alloc fbmem from ion (%p)\n", ihdl);
+ ihdl = NULL;
+ }
+ }
- buffer.p[0].addr = fbi->fix.smem_start + offset;
- buffer.p[0].len = img_size;
+ if (mdss_wb_mem) {
+ buffer.p[0].addr = (u32) mdss_wb_mem;
+ buffer.p[0].len = img_size;
- return &buffer;
+ return &buffer;
+ }
+
+ return NULL;
}
#else
static inline
diff --git a/drivers/video/msm/mdss/mdss_panel.h b/drivers/video/msm/mdss/mdss_panel.h
index 3fd943d..0411d8e 100644
--- a/drivers/video/msm/mdss/mdss_panel.h
+++ b/drivers/video/msm/mdss/mdss_panel.h
@@ -161,6 +161,7 @@
struct lcdc_panel_info lcdc;
struct mipi_panel_info mipi;
struct lvds_panel_info lvds;
+ struct fb_info *fbi;
};
struct mdss_panel_data {
diff --git a/drivers/video/msm/msm_fb.c b/drivers/video/msm/msm_fb.c
index 7bf516d..0f948b1 100644
--- a/drivers/video/msm/msm_fb.c
+++ b/drivers/video/msm/msm_fb.c
@@ -1310,14 +1310,14 @@
var->bits_per_pixel = bpp * 8; /* FrameBuffer color depth */
if (mfd->dest == DISPLAY_LCD) {
if (panel_info->type == MDDI_PANEL && panel_info->mddi.is_type1)
- var->reserved[3] = panel_info->lcd.refx100 / (100 * 2);
+ var->reserved[4] = panel_info->lcd.refx100 / (100 * 2);
else
- var->reserved[3] = panel_info->lcd.refx100 / 100;
+ var->reserved[4] = panel_info->lcd.refx100 / 100;
} else {
if (panel_info->type == MIPI_VIDEO_PANEL) {
- var->reserved[3] = panel_info->mipi.frame_rate;
+ var->reserved[4] = panel_info->mipi.frame_rate;
} else {
- var->reserved[3] = panel_info->clk_rate /
+ var->reserved[4] = panel_info->clk_rate /
((panel_info->lcdc.h_back_porch +
panel_info->lcdc.h_front_porch +
panel_info->lcdc.h_pulse_width +
@@ -1328,7 +1328,7 @@
panel_info->yres));
}
}
- pr_debug("reserved[3] %u\n", var->reserved[3]);
+ pr_debug("reserved[4] %u\n", var->reserved[4]);
/*
* id field for fb app
diff --git a/include/linux/fb.h b/include/linux/fb.h
index d31cb68..f6a2923 100644
--- a/include/linux/fb.h
+++ b/include/linux/fb.h
@@ -279,7 +279,7 @@
__u32 vmode; /* see FB_VMODE_* */
__u32 rotate; /* angle we rotate counter clockwise */
__u32 colorspace; /* colorspace for FOURCC-based modes */
- __u32 reserved[4]; /* Reserved for future compatibility */
+ __u32 reserved[5]; /* Reserved for future compatibility */
};
struct fb_cmap {
diff --git a/include/media/msm_camera.h b/include/media/msm_camera.h
index 57ce7c0..7fe4074 100644
--- a/include/media/msm_camera.h
+++ b/include/media/msm_camera.h
@@ -1253,27 +1253,31 @@
#define CSI_DECODE_10BIT 2
#define CSI_DECODE_DPCM_10_8_10 5
-#define ISPIF_STREAM(intf, action) (((intf)<<ISPIF_S_STREAM_SHIFT)+(action))
-#define ISPIF_ON_FRAME_BOUNDARY (0x01 << 0)
-#define ISPIF_OFF_FRAME_BOUNDARY (0x01 << 1)
-#define ISPIF_OFF_IMMEDIATELY (0x01 << 2)
-#define ISPIF_S_STREAM_SHIFT 4
-
+#define ISPIF_STREAM(intf, action, vfe) (((intf)<<ISPIF_S_STREAM_SHIFT)+\
+ (action)+((vfe)<<ISPIF_VFE_INTF_SHIFT))
+#define ISPIF_ON_FRAME_BOUNDARY (0x01 << 0)
+#define ISPIF_OFF_FRAME_BOUNDARY (0x01 << 1)
+#define ISPIF_OFF_IMMEDIATELY (0x01 << 2)
+#define ISPIF_S_STREAM_SHIFT 4
+#define ISPIF_VFE_INTF_SHIFT 12
#define PIX_0 (0x01 << 0)
#define RDI_0 (0x01 << 1)
#define PIX_1 (0x01 << 2)
#define RDI_1 (0x01 << 3)
-#define PIX_2 (0x01 << 4)
-#define RDI_2 (0x01 << 5)
+#define RDI_2 (0x01 << 4)
+enum msm_ispif_vfe_intf {
+ VFE0,
+ VFE1,
+ VFE_MAX,
+};
enum msm_ispif_intftype {
PIX0,
RDI0,
PIX1,
RDI1,
- PIX2,
RDI2,
INTF_MAX,
};
@@ -1308,6 +1312,7 @@
uint8_t intftype;
uint16_t cid_mask;
uint8_t csid;
+ uint8_t vfe_intf;
};
struct msm_ispif_params_list {
diff --git a/net/bluetooth/hci_core.c b/net/bluetooth/hci_core.c
index da8b2dc..56bdd46 100644
--- a/net/bluetooth/hci_core.c
+++ b/net/bluetooth/hci_core.c
@@ -2124,6 +2124,55 @@
EXPORT_SYMBOL(hci_send_sco);
/* ---- HCI TX task (outgoing data) ---- */
+/* HCI ACL Connection scheduler */
+static inline struct hci_conn *hci_low_sent_acl(struct hci_dev *hdev,
+ int *quote)
+{
+ struct hci_conn_hash *h = &hdev->conn_hash;
+ struct hci_conn *conn = NULL;
+ int num = 0, min = ~0, conn_num = 0;
+ struct list_head *p;
+
+ /* We don't have to lock device here. Connections are always
+ * added and removed with TX task disabled. */
+ list_for_each(p, &h->list) {
+ struct hci_conn *c;
+ c = list_entry(p, struct hci_conn, list);
+ if (c->type == ACL_LINK)
+ conn_num++;
+
+ if (skb_queue_empty(&c->data_q))
+ continue;
+
+ if (c->state != BT_CONNECTED && c->state != BT_CONFIG)
+ continue;
+
+ num++;
+
+ if (c->sent < min) {
+ min = c->sent;
+ conn = c;
+ }
+ }
+
+ if (conn) {
+ int cnt, q;
+ cnt = hdev->acl_cnt;
+ q = cnt / num;
+ *quote = q ? q : 1;
+ } else
+ *quote = 0;
+
+ if ((*quote == hdev->acl_cnt) &&
+ (conn->sent == (hdev->acl_pkts - 1)) &&
+ (conn_num > 1)) {
+ *quote = 0;
+ conn = NULL;
+ }
+
+ BT_DBG("conn %p quote %d", conn, *quote);
+ return conn;
+}
/* HCI Connection scheduler */
static inline struct hci_conn *hci_low_sent(struct hci_dev *hdev, __u8 type, int *quote)
@@ -2217,8 +2266,10 @@
}
while (hdev->acl_cnt > 0 &&
- (conn = hci_low_sent(hdev, ACL_LINK, "e))) {
- while (quote > 0 && (skb = skb_dequeue(&conn->data_q))) {
+ ((conn = hci_low_sent_acl(hdev, "e)) != NULL)) {
+
+ while (quote > 0 &&
+ (skb = skb_dequeue(&conn->data_q))) {
int count = 1;
BT_DBG("skb %p len %d", skb, skb->len);
diff --git a/sound/soc/msm/msm8974.c b/sound/soc/msm/msm8974.c
index 9c57161..3516022 100644
--- a/sound/soc/msm/msm8974.c
+++ b/sound/soc/msm/msm8974.c
@@ -26,7 +26,7 @@
#include <asm/mach-types.h>
#include <mach/socinfo.h>
#include <qdsp6v2/msm-pcm-routing-v2.h>
-#include "../codecs/wcd9310.h"
+#include "../codecs/wcd9320.h"
/* 8974 machine driver */
@@ -81,21 +81,7 @@
static struct snd_soc_jack hs_jack;
static struct snd_soc_jack button_jack;
-static int msm_enable_codec_ext_clk(struct snd_soc_codec *codec, int enable,
- bool dapm);
-
-static struct tabla_mbhc_config mbhc_cfg = {
- .headset_jack = &hs_jack,
- .button_jack = &button_jack,
- .read_fw_bin = false,
- .calibration = NULL,
- .micbias = TABLA_MICBIAS2,
- .mclk_cb_fn = msm_enable_codec_ext_clk,
- .mclk_rate = TABLA_EXT_CLK_RATE,
- .gpio = 0, /* MBHC GPIO is not configured */
- .gpio_irq = 0,
- .gpio_level_insert = 1,
-};
+static struct mutex cdc_mclk_mutex;
static void msm_enable_ext_spk_amp_gpio(u32 spk_amp_gpio)
{
@@ -244,6 +230,8 @@
{
struct snd_soc_dapm_context *dapm = &codec->dapm;
+ mutex_lock(&dapm->codec->mutex);
+
pr_debug("%s: msm_spk_control = %d", __func__, msm_spk_control);
if (msm_spk_control == MSM8974_SPK_ON) {
snd_soc_dapm_enable_pin(dapm, "Ext Spk Bottom Pos");
@@ -258,17 +246,19 @@
}
snd_soc_dapm_sync(dapm);
+ mutex_unlock(&dapm->codec->mutex);
}
static int msm_get_spk(struct snd_kcontrol *kcontrol,
- struct snd_ctl_elem_value *ucontrol)
+ struct snd_ctl_elem_value *ucontrol)
{
pr_debug("%s: msm_spk_control = %d", __func__, msm_spk_control);
ucontrol->value.integer.value[0] = msm_spk_control;
return 0;
}
+
static int msm_set_spk(struct snd_kcontrol *kcontrol,
- struct snd_ctl_elem_value *ucontrol)
+ struct snd_ctl_elem_value *ucontrol)
{
struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
@@ -280,8 +270,9 @@
msm_ext_control(codec);
return 1;
}
+
static int msm_spkramp_event(struct snd_soc_dapm_widget *w,
- struct snd_kcontrol *k, int event)
+ struct snd_kcontrol *k, int event)
{
pr_debug("%s() %x\n", __func__, SND_SOC_DAPM_EVENT_ON(event));
@@ -318,12 +309,6 @@
return 0;
}
-static int msm_enable_codec_ext_clk(struct snd_soc_codec *codec, int enable,
- bool dapm)
-{
- return 0;
-}
-
static int msm_mclk_event(struct snd_soc_dapm_widget *w,
struct snd_kcontrol *kcontrol, int event)
{
@@ -453,14 +438,14 @@
static const char *const btsco_rate_text[] = {"8000", "16000"};
static const struct soc_enum msm_btsco_enum[] = {
- SOC_ENUM_SINGLE_EXT(2, btsco_rate_text),
+ SOC_ENUM_SINGLE_EXT(2, btsco_rate_text),
};
static int msm_slim_0_rx_ch_get(struct snd_kcontrol *kcontrol,
struct snd_ctl_elem_value *ucontrol)
{
pr_debug("%s: msm_slim_0_rx_ch = %d\n", __func__,
- msm_slim_0_rx_ch);
+ msm_slim_0_rx_ch);
ucontrol->value.integer.value[0] = msm_slim_0_rx_ch - 1;
return 0;
}
@@ -471,7 +456,7 @@
msm_slim_0_rx_ch = ucontrol->value.integer.value[0] + 1;
pr_debug("%s: msm_slim_0_rx_ch = %d\n", __func__,
- msm_slim_0_rx_ch);
+ msm_slim_0_rx_ch);
return 1;
}
@@ -479,7 +464,7 @@
struct snd_ctl_elem_value *ucontrol)
{
pr_debug("%s: msm_slim_0_tx_ch = %d\n", __func__,
- msm_slim_0_tx_ch);
+ msm_slim_0_tx_ch);
ucontrol->value.integer.value[0] = msm_slim_0_tx_ch - 1;
return 0;
}
@@ -489,16 +474,14 @@
{
msm_slim_0_tx_ch = ucontrol->value.integer.value[0] + 1;
- pr_debug("%s: msm_slim_0_tx_ch = %d\n", __func__,
- msm_slim_0_tx_ch);
+ pr_debug("%s: msm_slim_0_tx_ch = %d\n", __func__, msm_slim_0_tx_ch);
return 1;
}
static int msm_btsco_rate_get(struct snd_kcontrol *kcontrol,
struct snd_ctl_elem_value *ucontrol)
{
- pr_debug("%s: msm_btsco_rate = %d", __func__,
- msm_btsco_rate);
+ pr_debug("%s: msm_btsco_rate = %d", __func__, msm_btsco_rate);
ucontrol->value.integer.value[0] = msm_btsco_rate;
return 0;
}
@@ -517,33 +500,23 @@
msm_btsco_rate = BTSCO_RATE_8KHZ;
break;
}
- pr_debug("%s: msm_btsco_rate = %d\n", __func__,
- msm_btsco_rate);
+ pr_debug("%s: msm_btsco_rate = %d\n", __func__, msm_btsco_rate);
return 0;
}
-static const struct snd_kcontrol_new tabla_msm_controls[] = {
- SOC_ENUM_EXT("Speaker Function", msm_enum[0], msm_get_spk,
- msm_set_spk),
- SOC_ENUM_EXT("SLIM_0_RX Channels", msm_enum[1],
- msm_slim_0_rx_ch_get, msm_slim_0_rx_ch_put),
- SOC_ENUM_EXT("SLIM_0_TX Channels", msm_enum[2],
- msm_slim_0_tx_ch_get, msm_slim_0_tx_ch_put),
-};
-
static const struct snd_kcontrol_new int_btsco_rate_mixer_controls[] = {
SOC_ENUM_EXT("Internal BTSCO SampleRate", msm_btsco_enum[0],
- msm_btsco_rate_get, msm_btsco_rate_put),
+ msm_btsco_rate_get, msm_btsco_rate_put),
};
static int msm_auxpcm_be_params_fixup(struct snd_soc_pcm_runtime *rtd,
struct snd_pcm_hw_params *params)
{
- struct snd_interval *rate = hw_param_interval(params,
- SNDRV_PCM_HW_PARAM_RATE);
+ struct snd_interval *rate =
+ hw_param_interval(params, SNDRV_PCM_HW_PARAM_RATE);
- struct snd_interval *channels = hw_param_interval(params,
- SNDRV_PCM_HW_PARAM_CHANNELS);
+ struct snd_interval *channels =
+ hw_param_interval(params, SNDRV_PCM_HW_PARAM_CHANNELS);
/* PCM only supports mono output with 8khz sample rate */
rate->min = rate->max = 8000;
@@ -629,6 +602,193 @@
.startup = msm_auxpcm_startup,
.shutdown = msm_auxpcm_shutdown,
};
+
+static int msm_slim_0_rx_be_hw_params_fixup(struct snd_soc_pcm_runtime *rtd,
+ struct snd_pcm_hw_params *params)
+{
+ struct snd_interval *rate = hw_param_interval(params,
+ SNDRV_PCM_HW_PARAM_RATE);
+
+ struct snd_interval *channels =
+ hw_param_interval(params, SNDRV_PCM_HW_PARAM_CHANNELS);
+
+ pr_debug("%s()\n", __func__);
+ rate->min = rate->max = 48000;
+ channels->min = channels->max = msm_slim_0_rx_ch;
+
+ return 0;
+}
+
+static int msm_slim_0_tx_be_hw_params_fixup(struct snd_soc_pcm_runtime *rtd,
+ struct snd_pcm_hw_params *params)
+{
+ struct snd_interval *rate = hw_param_interval(params,
+ SNDRV_PCM_HW_PARAM_RATE);
+
+ struct snd_interval *channels = hw_param_interval(params,
+ SNDRV_PCM_HW_PARAM_CHANNELS);
+
+ pr_debug("%s()\n", __func__);
+ rate->min = rate->max = 48000;
+ channels->min = channels->max = msm_slim_0_tx_ch;
+
+ return 0;
+}
+
+static const struct soc_enum msm_snd_enum[] = {
+ SOC_ENUM_SINGLE_EXT(2, spk_function),
+ SOC_ENUM_SINGLE_EXT(2, slim0_rx_ch_text),
+ SOC_ENUM_SINGLE_EXT(4, slim0_tx_ch_text),
+};
+
+static const struct snd_kcontrol_new msm_snd_controls[] = {
+ SOC_ENUM_EXT("Speaker Function", msm_snd_enum[0], msm_get_spk,
+ msm_set_spk),
+ SOC_ENUM_EXT("SLIM_0_RX Channels", msm_snd_enum[1],
+ msm_slim_0_rx_ch_get, msm_slim_0_rx_ch_put),
+ SOC_ENUM_EXT("SLIM_0_TX Channels", msm_snd_enum[2],
+ msm_slim_0_tx_ch_get, msm_slim_0_tx_ch_put),
+};
+
+static int msm_audrx_init(struct snd_soc_pcm_runtime *rtd)
+{
+ int err;
+ struct snd_soc_codec *codec = rtd->codec;
+ struct snd_soc_dapm_context *dapm = &codec->dapm;
+ struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
+
+ pr_info("%s(), dev_name%s\n", __func__, dev_name(cpu_dai->dev));
+
+ if (machine_is_msm8960_liquid()) {
+ top_spk_pamp_gpio = (PM8921_GPIO_PM_TO_SYS(19));
+ bottom_spk_pamp_gpio = (PM8921_GPIO_PM_TO_SYS(18));
+ }
+
+ rtd->pmdown_time = 0;
+
+ err = snd_soc_add_codec_controls(codec, msm_snd_controls,
+ ARRAY_SIZE(msm_snd_controls));
+ if (err < 0)
+ return err;
+
+ snd_soc_dapm_new_controls(dapm, msm_dapm_widgets,
+ ARRAY_SIZE(msm_dapm_widgets));
+
+ snd_soc_dapm_add_routes(dapm, common_audio_map,
+ ARRAY_SIZE(common_audio_map));
+
+ snd_soc_dapm_enable_pin(dapm, "Ext Spk Bottom Pos");
+ snd_soc_dapm_enable_pin(dapm, "Ext Spk Bottom Neg");
+ snd_soc_dapm_enable_pin(dapm, "Ext Spk Top Pos");
+ snd_soc_dapm_enable_pin(dapm, "Ext Spk Top Neg");
+
+ snd_soc_dapm_sync(dapm);
+
+ err = snd_soc_jack_new(codec, "Headset Jack",
+ (SND_JACK_HEADSET | SND_JACK_OC_HPHL |
+ SND_JACK_OC_HPHR | SND_JACK_UNSUPPORTED),
+ &hs_jack);
+ if (err) {
+ pr_err("failed to create new jack\n");
+ return err;
+ }
+
+ err = snd_soc_jack_new(codec, "Button Jack",
+ TAIKO_JACK_BUTTON_MASK, &button_jack);
+ if (err) {
+ pr_err("failed to create new jack\n");
+ return err;
+ }
+
+ return err;
+}
+
+static int msm_snd_startup(struct snd_pcm_substream *substream)
+{
+ pr_debug("%s(): substream = %s stream = %d\n", __func__,
+ substream->name, substream->stream);
+ return 0;
+}
+
+static int msm_snd_hw_params(struct snd_pcm_substream *substream,
+ struct snd_pcm_hw_params *params)
+{
+ struct snd_soc_pcm_runtime *rtd = substream->private_data;
+ struct snd_soc_dai *codec_dai = rtd->codec_dai;
+ struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
+ int ret = 0;
+ unsigned int rx_ch[SLIM_MAX_RX_PORTS], tx_ch[SLIM_MAX_TX_PORTS];
+ unsigned int rx_ch_cnt = 0, tx_ch_cnt = 0;
+ unsigned int user_set_tx_ch = 0;
+
+ if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
+ pr_debug("%s: rx_0_ch=%d\n", __func__, msm_slim_0_rx_ch);
+ ret = snd_soc_dai_get_channel_map(codec_dai,
+ &tx_ch_cnt, tx_ch, &rx_ch_cnt , rx_ch);
+ if (ret < 0) {
+ pr_err("%s: failed to get codec chan map\n", __func__);
+ goto end;
+ }
+
+ ret = snd_soc_dai_set_channel_map(cpu_dai, 0, 0,
+ msm_slim_0_rx_ch, rx_ch);
+ if (ret < 0) {
+ pr_err("%s: failed to set cpu chan map\n", __func__);
+ goto end;
+ }
+ ret = snd_soc_dai_set_channel_map(codec_dai, 0, 0,
+ msm_slim_0_rx_ch, rx_ch);
+ if (ret < 0) {
+ pr_err("%s: failed to set codec channel map\n",
+ __func__);
+ goto end;
+ }
+ } else {
+
+ if (codec_dai->id == 2)
+ user_set_tx_ch = msm_slim_0_tx_ch;
+ else if (codec_dai->id == 4)
+ user_set_tx_ch = params_channels(params);
+
+ pr_debug("%s: %s_tx_dai_id_%d_ch=%d\n", __func__,
+ codec_dai->name, codec_dai->id, user_set_tx_ch);
+
+ ret = snd_soc_dai_get_channel_map(codec_dai,
+ &tx_ch_cnt, tx_ch, &rx_ch_cnt , rx_ch);
+ if (ret < 0) {
+ pr_err("%s: failed to get codec chan map\n", __func__);
+ goto end;
+ }
+ ret = snd_soc_dai_set_channel_map(cpu_dai,
+ user_set_tx_ch, tx_ch, 0 , 0);
+ if (ret < 0) {
+ pr_err("%s: failed to set cpu chan map\n", __func__);
+ goto end;
+ }
+ ret = snd_soc_dai_set_channel_map(codec_dai,
+ user_set_tx_ch, tx_ch, 0, 0);
+ if (ret < 0) {
+ pr_err("%s: failed to set codec channel map\n",
+ __func__);
+ goto end;
+ }
+ }
+end:
+ return ret;
+}
+
+static void msm_snd_shutdown(struct snd_pcm_substream *substream)
+{
+ pr_debug("%s(): substream = %s stream = %d\n", __func__,
+ substream->name, substream->stream);
+}
+
+static struct snd_soc_ops msm8974_be_ops = {
+ .startup = msm_snd_startup,
+ .hw_params = msm_snd_hw_params,
+ .shutdown = msm_snd_shutdown,
+};
+
/* Digital audio interface glue - connects codec <---> CPU */
static struct snd_soc_dai_link msm_dai[] = {
/* FrontEnd DAI Links */
@@ -734,7 +894,33 @@
.be_id = MSM_BACKEND_DAI_AUXPCM_TX,
.be_hw_params_fixup = msm_auxpcm_be_params_fixup,
},
-
+ /* Backend DAI Links */
+ {
+ .name = LPASS_BE_SLIMBUS_0_RX,
+ .stream_name = "Slimbus Playback",
+ .cpu_dai_name = "msm-dai-q6-dev.16384",
+ .platform_name = "msm-pcm-routing",
+ .codec_name = "taiko_codec",
+ .codec_dai_name = "taiko_rx1",
+ .no_pcm = 1,
+ .be_id = MSM_BACKEND_DAI_SLIMBUS_0_RX,
+ .init = &msm_audrx_init,
+ .be_hw_params_fixup = msm_slim_0_rx_be_hw_params_fixup,
+ .ops = &msm8974_be_ops,
+ .ignore_pmdown_time = 1, /* dai link has playback support */
+ },
+ {
+ .name = LPASS_BE_SLIMBUS_0_TX,
+ .stream_name = "Slimbus Capture",
+ .cpu_dai_name = "msm-dai-q6-dev.16385",
+ .platform_name = "msm-pcm-routing",
+ .codec_name = "taiko_codec",
+ .codec_dai_name = "taiko_tx1",
+ .no_pcm = 1,
+ .be_id = MSM_BACKEND_DAI_SLIMBUS_0_TX,
+ .be_hw_params_fixup = msm_slim_0_tx_be_hw_params_fixup,
+ .ops = &msm8974_be_ops,
+ },
};
struct snd_soc_card snd_soc_card_msm = {
@@ -756,6 +942,8 @@
static int __init msm_audio_init(void)
{
int ret = 0;
+
+ mutex_init(&cdc_mclk_mutex);
if (!machine_is_msm8974_sim()) {
pr_err("%s: Not the right machine type\n", __func__);
return -ENODEV;
@@ -763,7 +951,6 @@
msm_snd_device = platform_device_alloc("soc-audio", 0);
if (!msm_snd_device) {
pr_err("Platform device allocation failed\n");
- kfree(mbhc_cfg.calibration);
return -ENOMEM;
}
@@ -771,7 +958,6 @@
ret = platform_device_add(msm_snd_device);
if (ret) {
platform_device_put(msm_snd_device);
- kfree(mbhc_cfg.calibration);
return ret;
}
return ret;
@@ -787,7 +973,6 @@
}
msm_free_headset_mic_gpios();
platform_device_unregister(msm_snd_device);
- kfree(mbhc_cfg.calibration);
}
module_exit(msm_audio_exit);