Merge "gpu: ion: IOCTL return success when error occurs" into msm-3.0
diff --git a/arch/arm/configs/msm9615_defconfig b/arch/arm/configs/msm9615_defconfig
index e6b7b79..ac9f465 100644
--- a/arch/arm/configs/msm9615_defconfig
+++ b/arch/arm/configs/msm9615_defconfig
@@ -240,6 +240,7 @@
CONFIG_MMC_EMBEDDED_SDIO=y
CONFIG_MMC_PARANOID_SD_INIT=y
CONFIG_MMC_BLOCK_MINORS=32
+CONFIG_MMC_CLKGATE=y
# CONFIG_MMC_BLOCK_BOUNCE is not set
CONFIG_MMC_TEST=m
CONFIG_MMC_MSM=y
diff --git a/arch/arm/mach-msm/Kconfig b/arch/arm/mach-msm/Kconfig
index c294d59..79dd22e 100644
--- a/arch/arm/mach-msm/Kconfig
+++ b/arch/arm/mach-msm/Kconfig
@@ -302,6 +302,18 @@
select MULTI_IRQ_HANDLER
select ARM_TICKET_LOCKS
select MSM_RUN_QUEUE_STATS
+
+config ARCH_MSM9625
+ bool "MSM9625"
+ select ARM_GIC
+ select GIC_SECURE
+ select ARCH_MSM_CORTEX_A5
+ select SMP
+ select MSM_SMP
+ select CPU_V7
+ select MULTI_IRQ_HANDLER
+ select MSM_V2_TLMM
+
endmenu
choice
@@ -869,6 +881,7 @@
default "0x80200000" if ARCH_MSM8930
default "0x20200000" if ARCH_MSMCOPPER
default "0x10000000" if ARCH_FSM9XXX
+ default "0x20200000" if ARCH_MSM9625
default "0x00200000" if !MSM_STACKED_MEMORY
default "0x00000000" if ARCH_QSD8X50 && MSM_SOC_REV_A
default "0x20000000" if ARCH_QSD8X50
diff --git a/arch/arm/mach-msm/bam_dmux.c b/arch/arm/mach-msm/bam_dmux.c
index befa5bb..d53e471 100644
--- a/arch/arm/mach-msm/bam_dmux.c
+++ b/arch/arm/mach-msm/bam_dmux.c
@@ -1595,6 +1595,7 @@
static void ul_wakeup(void)
{
int ret;
+ int do_vote_dfab = 0;
mutex_lock(&wakeup_lock);
if (bam_is_connected) { /* bam got connected before lock grabbed */
@@ -1621,16 +1622,19 @@
* don't grab the wakelock the first time because it is
* already grabbed when a2 powers on
*/
- if (likely(a2_pc_disabled_wakelock_skipped))
+ if (likely(a2_pc_disabled_wakelock_skipped)) {
grab_wakelock();
- else
+ do_vote_dfab = 1; /* vote must occur after wait */
+ } else {
a2_pc_disabled_wakelock_skipped = 1;
+ }
if (wait_for_dfab) {
ret = wait_for_completion_timeout(
&dfab_unvote_completion, HZ);
BUG_ON(ret == 0);
}
- vote_dfab();
+ if (likely(do_vote_dfab))
+ vote_dfab();
schedule_delayed_work(&ul_timeout_work,
msecs_to_jiffies(UL_TIMEOUT_DELAY));
bam_is_connected = 1;
diff --git a/arch/arm/mach-msm/board-8930-pmic.c b/arch/arm/mach-msm/board-8930-pmic.c
index 86c0438..cf7a829 100644
--- a/arch/arm/mach-msm/board-8930-pmic.c
+++ b/arch/arm/mach-msm/board-8930-pmic.c
@@ -329,6 +329,10 @@
.priority = 0,
};
+static struct pm8xxx_spk_platform_data pm8xxx_spk_pdata = {
+ .spk_add_enable = false,
+};
+
static struct pm8921_bms_platform_data pm8921_bms_pdata __devinitdata = {
.battery_type = BATT_UNKNOWN,
.r_sense = 10,
@@ -351,6 +355,7 @@
.adc_pdata = &pm8xxx_adc_pdata,
.leds_pdata = &pm8xxx_leds_pdata,
.ccadc_pdata = &pm8xxx_ccadc_pdata,
+ .spk_pdata = &pm8xxx_spk_pdata,
};
static struct msm_ssbi_platform_data msm8930_ssbi_pm8038_pdata __devinitdata = {
diff --git a/arch/arm/mach-msm/board-8930.c b/arch/arm/mach-msm/board-8930.c
index f52d312..28499dd 100644
--- a/arch/arm/mach-msm/board-8930.c
+++ b/arch/arm/mach-msm/board-8930.c
@@ -128,13 +128,17 @@
#ifdef CONFIG_MSM_MULTIMEDIA_USE_ION
#define MSM_PMEM_KERNEL_EBI1_SIZE 0x65000
+#ifdef CONFIG_MSM_IOMMU
+#define MSM_ION_MM_SIZE 0x3800000 /* Need to be multiple of 64K */
+#define MSM_ION_SF_SIZE 0x0
+#define MSM_ION_HEAP_NUM 7
+#else
#define MSM_ION_SF_SIZE MSM_PMEM_SIZE
#define MSM_ION_MM_SIZE MSM_PMEM_ADSP_SIZE
-#define MSM_ION_QSECOM_SIZE 0x300000 /* (3MB) */
#define MSM_ION_HEAP_NUM 8
-
-
+#endif
#define MSM_ION_MM_FW_SIZE 0x200000 /* (2MB) */
+#define MSM_ION_QSECOM_SIZE 0x300000 /* (3MB) */
#define MSM_ION_MFC_SIZE SZ_8K
#define MSM_ION_AUDIO_SIZE MSM_PMEM_AUDIO_SIZE
@@ -388,6 +392,7 @@
.memory_type = ION_EBI_TYPE,
.extra_data = (void *) &cp_mfc_msm8930_ion_pdata,
},
+#ifndef CONFIG_MSM_IOMMU
{
.id = ION_SF_HEAP_ID,
.type = ION_HEAP_TYPE_CARVEOUT,
@@ -396,6 +401,7 @@
.memory_type = ION_EBI_TYPE,
.extra_data = (void *) &co_msm8930_ion_pdata,
},
+#endif
{
.id = ION_IOMMU_HEAP_ID,
.type = ION_HEAP_TYPE_IOMMU,
diff --git a/arch/arm/mach-msm/board-8960-pmic.c b/arch/arm/mach-msm/board-8960-pmic.c
index c9a5f77..ea1ab58 100644
--- a/arch/arm/mach-msm/board-8960-pmic.c
+++ b/arch/arm/mach-msm/board-8960-pmic.c
@@ -471,7 +471,7 @@
{
.name = "led:blue",
.flags = PM8XXX_ID_LED_2,
- .default_trigger = "dc-online",
+ .default_trigger = "notification",
},
};
diff --git a/arch/arm/mach-msm/board-copper.c b/arch/arm/mach-msm/board-copper.c
index eff5490..14efac4 100644
--- a/arch/arm/mach-msm/board-copper.c
+++ b/arch/arm/mach-msm/board-copper.c
@@ -409,6 +409,7 @@
*/
void __init msm_copper_add_drivers(void)
{
+ msm_smd_init();
msm_spm_device_init();
regulator_stub_init();
}
diff --git a/arch/arm/mach-msm/board-msm7627a-camera.c b/arch/arm/mach-msm/board-msm7627a-camera.c
index bd89e34..329dcae 100644
--- a/arch/arm/mach-msm/board-msm7627a-camera.c
+++ b/arch/arm/mach-msm/board-msm7627a-camera.c
@@ -29,6 +29,9 @@
#define GPIO_SKU3_CAM_5MP_SHDN_N 5 /* PWDN */
#define GPIO_SKU3_CAM_5MP_CAMIF_RESET 6 /* (board_is(EVT))?123:121 RESET */
#define GPIO_SKU3_CAM_5MP_CAM_DRIVER_PWDN 30
+#define GPIO_SKU7_CAM_VGA_SHDN 91
+#define GPIO_SKU7_CAM_5MP_SHDN_N 93 /* PWDN */
+#define GPIO_SKU7_CAM_5MP_CAMIF_RESET 23 /* (board_is(EVT))?123:121 RESET */
#ifdef CONFIG_MSM_CAMERA_V4L2
static uint32_t camera_off_gpio_table[] = {
@@ -339,14 +342,17 @@
}
platform_device_register(&msm_camera_server);
if (machine_is_msm8625_surf() || machine_is_msm8625_evb()
- || machine_is_msm8625_evt()) {
+ || machine_is_msm8625_evt()
+ || machine_is_msm8625_qrd7()) {
platform_device_register(&msm8625_device_csic0);
platform_device_register(&msm8625_device_csic1);
} else {
platform_device_register(&msm7x27a_device_csic0);
platform_device_register(&msm7x27a_device_csic1);
}
- if (machine_is_msm8625_evb() || machine_is_msm8625_evt())
+ if (machine_is_msm8625_evb()
+ || machine_is_msm8625_evt()
+ || machine_is_msm8625_qrd7())
*(int *) msm7x27a_device_clkctl.dev.platform_data = 1;
platform_device_register(&msm7x27a_device_clkctl);
platform_device_register(&msm7x27a_device_vfe);
@@ -462,39 +468,45 @@
{
int rc = 0;
- rc = gpio_request(GPIO_SKU3_CAM_5MP_SHDN_N, "ov5647");
+ rc = gpio_request(msm_camera_sensor_ov5647_data.sensor_pwd, "ov5647");
if (rc < 0)
- pr_err("%s: gpio_request GPIO_SKU3_CAM_5MP_SHDN_N failed!",
- __func__);
+ pr_err("%s: gpio_request OV5647 sensor_pwd: %d failed!",
+ __func__, msm_camera_sensor_ov5647_data.sensor_pwd);
- pr_debug("gpio_tlmm_config %d\r\n", GPIO_SKU3_CAM_5MP_SHDN_N);
- rc = gpio_tlmm_config(GPIO_CFG(GPIO_SKU3_CAM_5MP_SHDN_N, 0,
- GPIO_CFG_OUTPUT, GPIO_CFG_PULL_DOWN,
- GPIO_CFG_2MA), GPIO_CFG_ENABLE);
+ rc = gpio_tlmm_config(GPIO_CFG(msm_camera_sensor_ov5647_data.sensor_pwd,
+ 0, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_DOWN,
+ GPIO_CFG_2MA), GPIO_CFG_ENABLE);
if (rc < 0) {
pr_err("%s:unable to enable Powr Dwn gpio for main camera!\n",
__func__);
- gpio_free(GPIO_SKU3_CAM_5MP_SHDN_N);
+ gpio_free(msm_camera_sensor_ov5647_data.sensor_pwd);
}
- gpio_direction_output(GPIO_SKU3_CAM_5MP_SHDN_N, 1);
-
- rc = gpio_request(GPIO_SKU3_CAM_5MP_CAMIF_RESET, "ov5647");
+ rc = gpio_direction_output(msm_camera_sensor_ov5647_data.sensor_pwd, 1);
if (rc < 0)
- pr_err("%s: gpio_request GPIO_SKU3_CAM_5MP_CAMIF_RESET failed!",
- __func__);
+ pr_err("%s: unable to set gpio: %d direction for ov5647 camera\n",
+ __func__, msm_camera_sensor_ov5647_data.sensor_pwd);
- pr_debug("gpio_tlmm_config %d\r\n", GPIO_SKU3_CAM_5MP_CAMIF_RESET);
- rc = gpio_tlmm_config(GPIO_CFG(GPIO_SKU3_CAM_5MP_CAMIF_RESET, 0,
- GPIO_CFG_OUTPUT, GPIO_CFG_PULL_DOWN,
- GPIO_CFG_2MA), GPIO_CFG_ENABLE);
+ rc = gpio_request(msm_camera_sensor_ov5647_data.sensor_reset, "ov5647");
+ if (rc < 0)
+ pr_err("%s: gpio_request OV5647 sensor_reset: %d failed!",
+ __func__, msm_camera_sensor_ov5647_data.sensor_reset);
+
+ rc = gpio_tlmm_config(GPIO_CFG(
+ msm_camera_sensor_ov5647_data.sensor_reset,
+ 0, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_DOWN,
+ GPIO_CFG_2MA), GPIO_CFG_ENABLE);
if (rc < 0) {
pr_err("%s: unable to enable reset gpio for main camera!\n",
__func__);
- gpio_free(GPIO_SKU3_CAM_5MP_CAMIF_RESET);
+ gpio_free(msm_camera_sensor_ov5647_data.sensor_reset);
}
- gpio_direction_output(GPIO_SKU3_CAM_5MP_CAMIF_RESET, 1);
+ rc = gpio_direction_output(
+ msm_camera_sensor_ov5647_data.sensor_reset, 1);
+ if (rc < 0)
+ pr_err("%s: unable to set gpio: %d direction for ov5647 camera\n",
+ __func__, msm_camera_sensor_ov5647_data.sensor_reset);
}
@@ -976,6 +988,7 @@
#define LCD_CAMERA_LDO_2V8 35 /* SKU1&SKU3 2.8V LDO */
#define SKU3_LCD_CAMERA_LDO_1V8 40 /* SKU3 1.8V LDO */
+#define SKU7_LCD_CAMERA_LDO_1V8 58 /* SKU7 1.8V LDO */
static int lcd_camera_ldo_1v8 = SKU3_LCD_CAMERA_LDO_1V8;
@@ -985,7 +998,10 @@
pr_debug("lcd_camera_power_init\n");
- lcd_camera_ldo_1v8 = SKU3_LCD_CAMERA_LDO_1V8; /* SKU3 PVT */
+ if (machine_is_msm7627a_qrd3() || machine_is_msm8625_qrd7())
+ lcd_camera_ldo_1v8 = SKU7_LCD_CAMERA_LDO_1V8;
+ else
+ lcd_camera_ldo_1v8 = SKU3_LCD_CAMERA_LDO_1V8;
/* LDO_EXT2V8 */
if (gpio_request(LCD_CAMERA_LDO_2V8, "lcd_camera_ldo_2v8")) {
@@ -1077,9 +1093,28 @@
#endif
pr_debug("msm7627a_camera_init Entered\n");
+
+ if (machine_is_msm7627a_qrd3() || machine_is_msm8625_qrd7()) {
+ ov7692_cam_req_gpio[0].gpio =
+ GPIO_SKU7_CAM_VGA_SHDN;
+ ov7692_cam_gpio_set_tbl[0].gpio = GPIO_SKU7_CAM_VGA_SHDN;
+ ov7692_cam_gpio_set_tbl[1].gpio = GPIO_SKU7_CAM_VGA_SHDN;
+ ov7692_cam_gpio_set_tbl[4].gpio = LCD_CAMERA_LDO_2V8 ;
+ ov7692_cam_gpio_set_tbl[5].gpio = SKU7_LCD_CAMERA_LDO_1V8;
+
+ msm_camera_sensor_ov5647_data.sensor_pwd =
+ GPIO_SKU7_CAM_5MP_SHDN_N;
+ msm_camera_sensor_ov5647_data.sensor_reset =
+ GPIO_SKU7_CAM_5MP_CAMIF_RESET;
+
+ }
+
/* LCD and camera power (VREG & LDO) init */
if (machine_is_msm7627a_evb() || machine_is_msm8625_evb()
- || machine_is_msm8625_evt()) {
+ || machine_is_msm8625_evt()
+ || machine_is_msm7627a_qrd3()
+ || machine_is_msm8625_qrd7()) {
+
lcd_camera_power_init();
evb_camera_gpio_cfg();
}
@@ -1089,8 +1124,11 @@
qrd1_camera_gpio_cfg();
platform_add_devices(camera_devices_qrd,
ARRAY_SIZE(camera_devices_qrd));
- } else if (machine_is_msm7627a_evb() || machine_is_msm8625_evb()
- || machine_is_msm8625_evt()) {
+ } else if (machine_is_msm7627a_evb()
+ || machine_is_msm8625_evb()
+ || machine_is_msm8625_evt()
+ || machine_is_msm7627a_qrd3()
+ || machine_is_msm8625_qrd7()) {
platform_add_devices(camera_devices_evb,
ARRAY_SIZE(camera_devices_evb));
} else if (machine_is_msm7627a_qrd3())
@@ -1101,7 +1139,9 @@
#endif
if (!machine_is_msm7627a_qrd1() || !machine_is_msm7627a_evb()
|| !machine_is_msm8625_evb()
- || !machine_is_msm8625_evt())
+ || !machine_is_msm8625_evt()
+ || !machine_is_msm7627a_qrd3()
+ || !machine_is_msm8625_qrd7())
register_i2c_devices();
#ifndef CONFIG_MSM_CAMERA_V4L2
rc = regulator_bulk_get(NULL, ARRAY_SIZE(regs_camera), regs_camera);
@@ -1127,8 +1167,11 @@
i2c_register_board_info(MSM_GSBI0_QUP_I2C_BUS_ID,
i2c_camera_devices_qrd,
ARRAY_SIZE(i2c_camera_devices_qrd));
- } else if (machine_is_msm7627a_evb() || machine_is_msm8625_evb()
- || machine_is_msm8625_evt()) {
+ } else if (machine_is_msm7627a_evb()
+ || machine_is_msm8625_evb()
+ || machine_is_msm8625_evt()
+ || machine_is_msm7627a_qrd3()
+ || machine_is_msm8625_qrd7()) {
pr_debug("machine_is_msm7627a_evb i2c_register_board_info\n");
i2c_register_board_info(MSM_GSBI0_QUP_I2C_BUS_ID,
i2c_camera_devices_evb,
diff --git a/arch/arm/mach-msm/board-msm7627a-display.c b/arch/arm/mach-msm/board-msm7627a-display.c
index 89b9378..f44cc9e 100644
--- a/arch/arm/mach-msm/board-msm7627a-display.c
+++ b/arch/arm/mach-msm/board-msm7627a-display.c
@@ -665,6 +665,14 @@
return 0;
}
+static int mipi_NT35510_rotate_panel(void)
+{
+ int rotate = 0;
+ if (machine_is_msm8625_evt())
+ rotate = 1;
+
+ return rotate;
+}
static struct msm_panel_common_pdata mipi_truly_pdata = {
.pmic_backlight = mipi_truly_set_bl,
@@ -680,6 +688,7 @@
static struct msm_panel_common_pdata mipi_NT35510_pdata = {
.pmic_backlight = evb_backlight_control,
+ .rotate_panel = mipi_NT35510_rotate_panel,
};
static struct platform_device mipi_dsi_NT35510_panel_device = {
diff --git a/arch/arm/mach-msm/clock-8960.c b/arch/arm/mach-msm/clock-8960.c
index 4860d42..3a0b87e 100644
--- a/arch/arm/mach-msm/clock-8960.c
+++ b/arch/arm/mach-msm/clock-8960.c
@@ -49,6 +49,7 @@
#define CE3_CORE_CLK_CTL_REG REG(0x36CC)
#define CE3_CLK_SRC_NS_REG REG(0x36C0)
#define DMA_BAM_HCLK_CTL REG(0x25C0)
+#define CLK_HALT_AFAB_SFAB_STATEA_REG REG(0x2FC0)
#define CLK_HALT_AFAB_SFAB_STATEB_REG REG(0x2FC4)
#define CLK_HALT_CFPB_STATEA_REG REG(0x2FCC)
#define CLK_HALT_CFPB_STATEB_REG REG(0x2FD0)
@@ -142,7 +143,9 @@
#define USB_HSIC_XCVR_FS_CLK_NS_REG REG(0x2928)
#define USB_PHY0_RESET_REG REG(0x2E20)
#define PCIE_ALT_REF_CLK_NS_REG REG(0x3860)
+#define PCIE_ACLK_CTL_REG REG(0x22C0)
#define PCIE_HCLK_CTL_REG REG(0x22CC)
+#define PCIE_PCLK_CTL_REG REG(0x22D0)
#define GPLL1_MODE_REG REG(0x3160)
#define GPLL1_L_VAL_REG REG(0x3164)
#define GPLL1_M_VAL_REG REG(0x3168)
@@ -1952,6 +1955,34 @@
},
};
+static struct branch_clk pcie_phy_ref_clk = {
+ .b = {
+ .ctl_reg = PCIE_PCLK_CTL_REG,
+ .en_mask = BIT(4),
+ .halt_reg = CLK_HALT_MSS_SMPSS_MISC_STATE_REG,
+ .halt_bit = 29,
+ },
+ .c = {
+ .dbg_name = "pcie_phy_ref_clk",
+ .ops = &clk_ops_branch,
+ CLK_INIT(pcie_phy_ref_clk.c),
+ },
+};
+
+static struct branch_clk pcie_a_clk = {
+ .b = {
+ .ctl_reg = PCIE_ACLK_CTL_REG,
+ .en_mask = BIT(4),
+ .halt_reg = CLK_HALT_AFAB_SFAB_STATEA_REG,
+ .halt_bit = 13,
+ },
+ .c = {
+ .dbg_name = "pcie_a_clk",
+ .ops = &clk_ops_branch,
+ CLK_INIT(pcie_a_clk.c),
+ },
+};
+
static struct branch_clk dma_bam_p_clk = {
.b = {
.ctl_reg = DMA_BAM_HCLK_CTL,
@@ -4575,6 +4606,8 @@
{ TEST_PER_HS(0x26), &q6sw_clk },
{ TEST_PER_HS(0x27), &q6fw_clk },
{ TEST_PER_HS(0x2A), &adm0_clk.c },
+ { TEST_PER_HS(0x2D), &pcie_phy_ref_clk.c },
+ { TEST_PER_HS(0x32), &pcie_a_clk.c },
{ TEST_PER_HS(0x34), &ebi1_clk.c },
{ TEST_PER_HS(0x34), &ebi1_a_clk.c },
{ TEST_PER_HS(0x50), &usb_hsic_hsic_clk.c },
@@ -4960,6 +4993,8 @@
CLK_LOOKUP("iface_clk", sdc3_p_clk.c, "msm_sdcc.3"),
CLK_LOOKUP("iface_clk", sdc4_p_clk.c, "msm_sdcc.4"),
CLK_LOOKUP("iface_clk", pcie_p_clk.c, ""),
+ CLK_LOOKUP("ref_clk", pcie_phy_ref_clk.c, ""),
+ CLK_LOOKUP("bus_clk", pcie_a_clk.c, ""),
CLK_LOOKUP("core_clk", adm0_clk.c, "msm_dmov"),
CLK_LOOKUP("iface_clk", adm0_p_clk.c, "msm_dmov"),
CLK_LOOKUP("iface_clk", pmic_arb0_p_clk.c, ""),
diff --git a/arch/arm/mach-msm/clock-pll.c b/arch/arm/mach-msm/clock-pll.c
index a4750bc..3a232c5 100644
--- a/arch/arm/mach-msm/clock-pll.c
+++ b/arch/arm/mach-msm/clock-pll.c
@@ -238,7 +238,7 @@
spin_lock_irqsave(&pll_reg_lock, flags);
mode = readl_relaxed(PLL_MODE_REG(pll));
/* Disable PLL bypass mode. */
- mode |= BIT(1);
+ mode |= PLL_BYPASSNL;
writel_relaxed(mode, PLL_MODE_REG(pll));
/*
@@ -249,7 +249,7 @@
udelay(10);
/* De-assert active-low PLL reset. */
- mode |= BIT(2);
+ mode |= PLL_RESET_N;
writel_relaxed(mode, PLL_MODE_REG(pll));
/* Wait for pll to enable. */
@@ -266,7 +266,7 @@
}
/* Enable PLL output. */
- mode |= BIT(0);
+ mode |= PLL_OUTCTRL;
writel_relaxed(mode, PLL_MODE_REG(pll));
/* Ensure the write above goes through before returning. */
diff --git a/arch/arm/mach-msm/devices-8064.c b/arch/arm/mach-msm/devices-8064.c
index 2c533d9..f6eee76 100644
--- a/arch/arm/mach-msm/devices-8064.c
+++ b/arch/arm/mach-msm/devices-8064.c
@@ -1066,6 +1066,7 @@
#ifdef CONFIG_MSM_MULTIMEDIA_USE_ION
.memtype = ION_CP_MM_HEAP_ID,
.enable_ion = 1,
+ .cp_enabled = 1,
#else
.memtype = MEMTYPE_EBI1,
.enable_ion = 0,
diff --git a/arch/arm/mach-msm/devices-8930.c b/arch/arm/mach-msm/devices-8930.c
index f8cb345..4ad73f9 100644
--- a/arch/arm/mach-msm/devices-8930.c
+++ b/arch/arm/mach-msm/devices-8930.c
@@ -686,6 +686,7 @@
#ifdef CONFIG_MSM_MULTIMEDIA_USE_ION
.memtype = ION_CP_MM_HEAP_ID,
.enable_ion = 1,
+ .cp_enabled = 1,
#else
.memtype = MEMTYPE_EBI1,
.enable_ion = 0,
diff --git a/arch/arm/mach-msm/devices-8960.c b/arch/arm/mach-msm/devices-8960.c
index fd15c98..f1553b6 100644
--- a/arch/arm/mach-msm/devices-8960.c
+++ b/arch/arm/mach-msm/devices-8960.c
@@ -3622,6 +3622,7 @@
struct msm_cache_dump_platform_data msm8960_cache_dump_pdata = {
.l2_size = L2_BUFFER_SIZE,
+ .l1_size = L1_BUFFER_SIZE,
};
struct platform_device msm8960_cache_dump_device = {
diff --git a/arch/arm/mach-msm/dma.c b/arch/arm/mach-msm/dma.c
index 69c91f1..d433b9e 100644
--- a/arch/arm/mach-msm/dma.c
+++ b/arch/arm/mach-msm/dma.c
@@ -59,19 +59,20 @@
int channel_active;
int sd;
size_t sd_size;
+ struct list_head staged_commands[MSM_DMOV_CHANNEL_COUNT];
struct list_head ready_commands[MSM_DMOV_CHANNEL_COUNT];
struct list_head active_commands[MSM_DMOV_CHANNEL_COUNT];
- spinlock_t lock;
+ struct mutex lock;
+ spinlock_t list_lock;
unsigned int irq;
struct clk *clk;
struct clk *pclk;
struct clk *ebiclk;
unsigned int clk_ctl;
- struct timer_list timer;
+ struct delayed_work work;
};
-static void msm_dmov_clock_timer(unsigned long);
-static int msm_dmov_clk_toggle(int, int);
+static void msm_dmov_clock_work(struct work_struct *);
#ifdef CONFIG_ARCH_MSM8X60
@@ -163,15 +164,19 @@
{
.crci_conf = adm0_crci_conf,
.chan_conf = adm0_chan_conf,
- .lock = __SPIN_LOCK_UNLOCKED(dmov_lock),
+ .lock = __MUTEX_INITIALIZER(dmov_conf[0].lock),
+ .list_lock = __SPIN_LOCK_UNLOCKED(dmov_list_lock),
.clk_ctl = CLK_DIS,
- .timer = TIMER_INITIALIZER(msm_dmov_clock_timer, 0, 0),
+ .work = __DELAYED_WORK_INITIALIZER(dmov_conf[0].work,
+ msm_dmov_clock_work),
}, {
.crci_conf = adm1_crci_conf,
.chan_conf = adm1_chan_conf,
- .lock = __SPIN_LOCK_UNLOCKED(dmov_lock),
+ .lock = __MUTEX_INITIALIZER(dmov_conf[1].lock),
+ .list_lock = __SPIN_LOCK_UNLOCKED(dmov_list_lock),
.clk_ctl = CLK_DIS,
- .timer = TIMER_INITIALIZER(msm_dmov_clock_timer, 0, 1),
+ .work = __DELAYED_WORK_INITIALIZER(dmov_conf[1].work,
+ msm_dmov_clock_work),
}
};
#else
@@ -179,9 +184,11 @@
{
.crci_conf = NULL,
.chan_conf = NULL,
- .lock = __SPIN_LOCK_UNLOCKED(dmov_lock),
+ .lock = __MUTEX_INITIALIZER(dmov_conf[0].lock),
+ .list_lock = __SPIN_LOCK_UNLOCKED(dmov_list_lock),
.clk_ctl = CLK_DIS,
- .timer = TIMER_INITIALIZER(msm_dmov_clock_timer, 0, 0),
+ .work = __DELAYED_WORK_INITIALIZER(dmov_conf[0].work,
+ msm_dmov_clock_work),
}
};
#endif
@@ -223,103 +230,153 @@
#define PRINT_FLOW(format, args...) \
MSM_DMOV_DPRINTF(MSM_DMOV_PRINT_FLOW, format, args);
-static int msm_dmov_clk_toggle(int adm, int on)
+static int msm_dmov_clk_on(int adm)
{
- int ret = 0;
+ int ret;
- if (on) {
- ret = clk_enable(dmov_conf[adm].clk);
- if (ret)
- goto err;
- if (dmov_conf[adm].pclk) {
- ret = clk_enable(dmov_conf[adm].pclk);
- if (ret) {
- clk_disable(dmov_conf[adm].clk);
- goto err;
- }
+ ret = clk_prepare_enable(dmov_conf[adm].clk);
+ if (ret)
+ return ret;
+ if (dmov_conf[adm].pclk) {
+ ret = clk_prepare_enable(dmov_conf[adm].pclk);
+ if (ret) {
+ clk_disable_unprepare(dmov_conf[adm].clk);
+ return ret;
}
- if (dmov_conf[adm].ebiclk) {
- ret = clk_enable(dmov_conf[adm].ebiclk);
- if (ret) {
- if (dmov_conf[adm].pclk)
- clk_disable(dmov_conf[adm].pclk);
- clk_disable(dmov_conf[adm].clk);
- }
- }
- } else {
- clk_disable(dmov_conf[adm].clk);
- if (dmov_conf[adm].pclk)
- clk_disable(dmov_conf[adm].pclk);
- if (dmov_conf[adm].ebiclk)
- clk_disable(dmov_conf[adm].ebiclk);
}
-err:
+ if (dmov_conf[adm].ebiclk) {
+ ret = clk_prepare_enable(dmov_conf[adm].ebiclk);
+ if (ret) {
+ if (dmov_conf[adm].pclk)
+ clk_disable_unprepare(dmov_conf[adm].pclk);
+ clk_disable_unprepare(dmov_conf[adm].clk);
+ }
+ }
return ret;
}
-static void msm_dmov_clock_timer(unsigned long adm)
+static void msm_dmov_clk_off(int adm)
{
- unsigned long irq_flags;
- spin_lock_irqsave(&dmov_conf[adm].lock, irq_flags);
- if (dmov_conf[adm].clk_ctl == CLK_TO_BE_DIS) {
- BUG_ON(dmov_conf[adm].channel_active);
- msm_dmov_clk_toggle(adm, 0);
- dmov_conf[adm].clk_ctl = CLK_DIS;
+ clk_disable_unprepare(dmov_conf[adm].clk);
+ if (dmov_conf[adm].pclk)
+ clk_disable_unprepare(dmov_conf[adm].pclk);
+ if (dmov_conf[adm].ebiclk)
+ clk_disable_unprepare(dmov_conf[adm].ebiclk);
+}
+
+static void msm_dmov_clock_work(struct work_struct *work)
+{
+ struct msm_dmov_conf *conf =
+ container_of(to_delayed_work(work), struct msm_dmov_conf, work);
+ int adm = DMOV_IRQ_TO_ADM(conf->irq);
+ mutex_lock(&conf->lock);
+ if (conf->clk_ctl == CLK_TO_BE_DIS) {
+ BUG_ON(conf->channel_active);
+ msm_dmov_clk_off(adm);
+ conf->clk_ctl = CLK_DIS;
}
- spin_unlock_irqrestore(&dmov_conf[adm].lock, irq_flags);
+ mutex_unlock(&conf->lock);
}
-void msm_dmov_stop_cmd(unsigned id, struct msm_dmov_cmd *cmd, int graceful)
-{
- int adm = DMOV_ID_TO_ADM(id);
- int ch = DMOV_ID_TO_CHAN(id);
- writel_relaxed((graceful << 31), DMOV_REG(DMOV_FLUSH0(ch), adm));
- wmb();
-}
-EXPORT_SYMBOL(msm_dmov_stop_cmd);
+enum {
+ NOFLUSH = 0,
+ GRACEFUL,
+ NONGRACEFUL,
+};
-void msm_dmov_enqueue_cmd_ext(unsigned id, struct msm_dmov_cmd *cmd)
+/* Caller must hold the list lock */
+static struct msm_dmov_cmd *start_ready_cmd(unsigned ch, int adm)
{
- unsigned long irq_flags;
- unsigned int status;
+ struct msm_dmov_cmd *cmd;
+
+ if (list_empty(&dmov_conf[adm].ready_commands[ch]))
+ return NULL;
+
+ cmd = list_entry(dmov_conf[adm].ready_commands[ch].next, typeof(*cmd),
+ list);
+ list_del(&cmd->list);
+ if (cmd->exec_func)
+ cmd->exec_func(cmd);
+ list_add_tail(&cmd->list, &dmov_conf[adm].active_commands[ch]);
+ if (!dmov_conf[adm].channel_active)
+ enable_irq(dmov_conf[adm].irq);
+ dmov_conf[adm].channel_active |= BIT(ch);
+ PRINT_IO("msm dmov enqueue command, %x, ch %d\n", cmd->cmdptr, ch);
+ writel_relaxed(cmd->cmdptr, DMOV_REG(DMOV_CMD_PTR(ch), adm));
+
+ return cmd;
+}
+
+static void msm_dmov_enqueue_cmd_ext_work(struct work_struct *work)
+{
+ struct msm_dmov_cmd *cmd =
+ container_of(work, struct msm_dmov_cmd, work);
+ unsigned id = cmd->id;
+ unsigned status;
+ unsigned long flags;
int adm = DMOV_ID_TO_ADM(id);
int ch = DMOV_ID_TO_CHAN(id);
- spin_lock_irqsave(&dmov_conf[adm].lock, irq_flags);
+ mutex_lock(&dmov_conf[adm].lock);
if (dmov_conf[adm].clk_ctl == CLK_DIS) {
- status = msm_dmov_clk_toggle(adm, 1);
+ status = msm_dmov_clk_on(adm);
if (status != 0)
goto error;
} else if (dmov_conf[adm].clk_ctl == CLK_TO_BE_DIS)
- del_timer(&dmov_conf[adm].timer);
+ cancel_delayed_work_sync(&dmov_conf[adm].work);
dmov_conf[adm].clk_ctl = CLK_EN;
+ spin_lock_irqsave(&dmov_conf[adm].list_lock, flags);
+
+ cmd = list_entry(dmov_conf[adm].staged_commands[ch].next, typeof(*cmd),
+ list);
+ list_del(&cmd->list);
+ list_add_tail(&cmd->list, &dmov_conf[adm].ready_commands[ch]);
status = readl_relaxed(DMOV_REG(DMOV_STATUS(ch), adm));
if (status & DMOV_STATUS_CMD_PTR_RDY) {
PRINT_IO("msm_dmov_enqueue_cmd(%d), start command, status %x\n",
id, status);
- if (cmd->exec_func)
- cmd->exec_func(cmd);
- list_add_tail(&cmd->list, &dmov_conf[adm].active_commands[ch]);
- if (!dmov_conf[adm].channel_active)
- enable_irq(dmov_conf[adm].irq);
- dmov_conf[adm].channel_active |= 1U << ch;
- PRINT_IO("Writing %x exactly to register", cmd->cmdptr);
- writel_relaxed(cmd->cmdptr, DMOV_REG(DMOV_CMD_PTR(ch), adm));
- } else {
- if (!dmov_conf[adm].channel_active) {
- dmov_conf[adm].clk_ctl = CLK_TO_BE_DIS;
- mod_timer(&dmov_conf[adm].timer, jiffies + HZ);
+ cmd = start_ready_cmd(ch, adm);
+ /*
+ * We added something to the ready list, and still hold the
+ * list lock. Thus, no need to check for cmd == NULL
+ */
+ if (cmd->toflush) {
+ int flush = (cmd->toflush == GRACEFUL) ? 1 << 31 : 0;
+ writel_relaxed(flush, DMOV_REG(DMOV_FLUSH0(ch), adm));
}
- if (list_empty(&dmov_conf[adm].active_commands[ch]))
+ } else {
+ cmd->toflush = 0;
+ if (list_empty(&dmov_conf[adm].active_commands[ch]) &&
+ !list_empty(&dmov_conf[adm].ready_commands[ch]))
PRINT_ERROR("msm_dmov_enqueue_cmd_ext(%d), stalled, "
"status %x\n", id, status);
PRINT_IO("msm_dmov_enqueue_cmd(%d), enqueue command, status "
"%x\n", id, status);
- list_add_tail(&cmd->list, &dmov_conf[adm].ready_commands[ch]);
}
+ if (!dmov_conf[adm].channel_active) {
+ dmov_conf[adm].clk_ctl = CLK_TO_BE_DIS;
+ schedule_delayed_work(&dmov_conf[adm].work, HZ);
+ }
+ spin_unlock_irqrestore(&dmov_conf[adm].list_lock, flags);
error:
- spin_unlock_irqrestore(&dmov_conf[adm].lock, irq_flags);
+ mutex_unlock(&dmov_conf[adm].lock);
+}
+
+void msm_dmov_enqueue_cmd_ext(unsigned id, struct msm_dmov_cmd *cmd)
+{
+ int adm = DMOV_ID_TO_ADM(id);
+ int ch = DMOV_ID_TO_CHAN(id);
+ unsigned long flags;
+ cmd->id = id;
+ cmd->toflush = 0;
+ INIT_WORK(&cmd->work, msm_dmov_enqueue_cmd_ext_work);
+
+ spin_lock_irqsave(&dmov_conf[adm].list_lock, flags);
+ list_add_tail(&cmd->list, &dmov_conf[adm].staged_commands[ch]);
+ spin_unlock_irqrestore(&dmov_conf[adm].list_lock, flags);
+
+ schedule_work(&cmd->work);
}
EXPORT_SYMBOL(msm_dmov_enqueue_cmd_ext);
@@ -338,14 +395,18 @@
int ch = DMOV_ID_TO_CHAN(id);
int adm = DMOV_ID_TO_ADM(id);
int flush = graceful ? DMOV_FLUSH_TYPE : 0;
- spin_lock_irqsave(&dmov_conf[adm].lock, irq_flags);
+ struct msm_dmov_cmd *cmd;
+
+ spin_lock_irqsave(&dmov_conf[adm].list_lock, irq_flags);
/* XXX not checking if flush cmd sent already */
if (!list_empty(&dmov_conf[adm].active_commands[ch])) {
PRINT_IO("msm_dmov_flush(%d), send flush cmd\n", id);
writel_relaxed(flush, DMOV_REG(DMOV_FLUSH0(ch), adm));
}
+ list_for_each_entry(cmd, &dmov_conf[adm].staged_commands[ch], list)
+ cmd->toflush = graceful ? GRACEFUL : NONGRACEFUL;
/* spin_unlock_irqrestore has the necessary barrier */
- spin_unlock_irqrestore(&dmov_conf[adm].lock, irq_flags);
+ spin_unlock_irqrestore(&dmov_conf[adm].list_lock, irq_flags);
}
EXPORT_SYMBOL(msm_dmov_flush);
@@ -407,7 +468,7 @@
errdata->flush[5] = readl_relaxed(DMOV_REG(DMOV_FLUSH5(ch), adm));
}
-static irqreturn_t msm_datamover_irq_handler(int irq, void *dev_id)
+static irqreturn_t msm_dmov_isr(int irq, void *dev_id)
{
unsigned int int_status;
unsigned int mask;
@@ -420,11 +481,12 @@
struct msm_dmov_cmd *cmd;
int adm = DMOV_IRQ_TO_ADM(irq);
- spin_lock_irqsave(&dmov_conf[adm].lock, irq_flags);
+ mutex_lock(&dmov_conf[adm].lock);
/* read and clear isr */
int_status = readl_relaxed(DMOV_REG(DMOV_ISR, adm));
PRINT_FLOW("msm_datamover_irq_handler: DMOV_ISR %x\n", int_status);
+ spin_lock_irqsave(&dmov_conf[adm].list_lock, irq_flags);
while (int_status) {
mask = int_status & -int_status;
ch = fls(mask) - 1;
@@ -492,50 +554,38 @@
ch_status = readl_relaxed(DMOV_REG(DMOV_STATUS(ch),
adm));
PRINT_FLOW("msm_datamover_irq_handler id %d, status %x\n", id, ch_status);
- if ((ch_status & DMOV_STATUS_CMD_PTR_RDY) &&
- !list_empty(&dmov_conf[adm].ready_commands[ch])) {
- cmd = list_entry(dmov_conf[adm].
- ready_commands[ch].next, typeof(*cmd),
- list);
- list_del(&cmd->list);
- if (cmd->exec_func)
- cmd->exec_func(cmd);
- list_add_tail(&cmd->list,
- &dmov_conf[adm].active_commands[ch]);
- PRINT_FLOW("msm_datamover_irq_handler id %d, start command\n", id);
- writel_relaxed(cmd->cmdptr,
- DMOV_REG(DMOV_CMD_PTR(ch), adm));
- }
+ if (ch_status & DMOV_STATUS_CMD_PTR_RDY)
+ start_ready_cmd(ch, adm);
} while (ch_status & DMOV_STATUS_RSLT_VALID);
if (list_empty(&dmov_conf[adm].active_commands[ch]) &&
- list_empty(&dmov_conf[adm].ready_commands[ch]))
+ list_empty(&dmov_conf[adm].ready_commands[ch]))
dmov_conf[adm].channel_active &= ~(1U << ch);
PRINT_FLOW("msm_datamover_irq_handler id %d, status %x\n", id, ch_status);
}
+ spin_unlock_irqrestore(&dmov_conf[adm].list_lock, irq_flags);
if (!dmov_conf[adm].channel_active && valid) {
disable_irq_nosync(dmov_conf[adm].irq);
dmov_conf[adm].clk_ctl = CLK_TO_BE_DIS;
- mod_timer(&dmov_conf[adm].timer, jiffies + HZ);
+ schedule_delayed_work(&dmov_conf[adm].work, HZ);
}
- spin_unlock_irqrestore(&dmov_conf[adm].lock, irq_flags);
+ mutex_unlock(&dmov_conf[adm].lock);
return valid ? IRQ_HANDLED : IRQ_NONE;
}
static int msm_dmov_suspend_late(struct device *dev)
{
- unsigned long irq_flags;
struct platform_device *pdev = to_platform_device(dev);
int adm = (pdev->id >= 0) ? pdev->id : 0;
- spin_lock_irqsave(&dmov_conf[adm].lock, irq_flags);
+ mutex_lock(&dmov_conf[adm].lock);
if (dmov_conf[adm].clk_ctl == CLK_TO_BE_DIS) {
BUG_ON(dmov_conf[adm].channel_active);
- del_timer(&dmov_conf[adm].timer);
- msm_dmov_clk_toggle(adm, 0);
+ cancel_delayed_work_sync(&dmov_conf[adm].work);
+ msm_dmov_clk_off(adm);
dmov_conf[adm].clk_ctl = CLK_DIS;
}
- spin_unlock_irqrestore(&dmov_conf[adm].lock, irq_flags);
+ mutex_unlock(&dmov_conf[adm].lock);
return 0;
}
@@ -650,8 +700,8 @@
if (!dmov_conf[adm].base)
return -ENOMEM;
- ret = request_irq(dmov_conf[adm].irq, msm_datamover_irq_handler,
- 0, "msmdatamover", NULL);
+ ret = request_threaded_irq(dmov_conf[adm].irq, NULL, msm_dmov_isr,
+ IRQF_ONESHOT, "msmdatamover", NULL);
if (ret) {
PRINT_ERROR("Requesting ADM%d irq %d failed\n", adm,
dmov_conf[adm].irq);
@@ -663,7 +713,7 @@
PRINT_ERROR("Requesting ADM%d clocks failed\n", adm);
goto out_irq;
}
- ret = msm_dmov_clk_toggle(adm, 1);
+ ret = msm_dmov_clk_on(adm);
if (ret) {
PRINT_ERROR("Enabling ADM%d clocks failed\n", adm);
goto out_irq;
@@ -671,6 +721,7 @@
config_datamover(adm);
for (i = 0; i < MSM_DMOV_CHANNEL_COUNT; i++) {
+ INIT_LIST_HEAD(&dmov_conf[adm].staged_commands[i]);
INIT_LIST_HEAD(&dmov_conf[adm].ready_commands[i]);
INIT_LIST_HEAD(&dmov_conf[adm].active_commands[i]);
@@ -679,7 +730,7 @@
DMOV_REG(DMOV_RSLT_CONF(i), adm));
}
wmb();
- msm_dmov_clk_toggle(adm, 0);
+ msm_dmov_clk_off(adm);
return ret;
out_irq:
free_irq(dmov_conf[adm].irq, NULL);
diff --git a/arch/arm/mach-msm/include/mach/board.h b/arch/arm/mach-msm/include/mach/board.h
index 8a1474a..644746e 100644
--- a/arch/arm/mach-msm/include/mach/board.h
+++ b/arch/arm/mach-msm/include/mach/board.h
@@ -381,6 +381,7 @@
spinlock_t bl_spinlock;
int (*backlight_level)(int level, int max, int min);
int (*pmic_backlight)(int level);
+ int (*rotate_panel)(void);
int (*panel_num)(void);
void (*panel_config_gpio)(int);
int (*vga_switch)(int select_vga);
diff --git a/arch/arm/mach-msm/include/mach/dma.h b/arch/arm/mach-msm/include/mach/dma.h
index b3e536e..ba621e6 100644
--- a/arch/arm/mach-msm/include/mach/dma.h
+++ b/arch/arm/mach-msm/include/mach/dma.h
@@ -35,7 +35,10 @@
unsigned int result,
struct msm_dmov_errdata *err);
void (*exec_func)(struct msm_dmov_cmd *cmd);
+ struct work_struct work;
+ unsigned id; /* For internal use */
void *user; /* Pointer for caller's reference */
+ u8 toflush;
};
struct msm_dmov_pdata {
@@ -45,7 +48,6 @@
void msm_dmov_enqueue_cmd(unsigned id, struct msm_dmov_cmd *cmd);
void msm_dmov_enqueue_cmd_ext(unsigned id, struct msm_dmov_cmd *cmd);
-void msm_dmov_stop_cmd(unsigned id, struct msm_dmov_cmd *cmd, int graceful);
void msm_dmov_flush(unsigned int id, int graceful);
int msm_dmov_exec_cmd(unsigned id, unsigned int cmdptr);
diff --git a/arch/arm/mach-msm/include/mach/irqs-9625.h b/arch/arm/mach-msm/include/mach/irqs-9625.h
new file mode 100644
index 0000000..91b4d07
--- /dev/null
+++ b/arch/arm/mach-msm/include/mach/irqs-9625.h
@@ -0,0 +1,36 @@
+/* Copyright (c) 2012, Code Aurora Forum. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 and
+ * only version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#ifndef __ASM_ARCH_MSM_IRQS_9625_H
+#define __ASM_ARCH_MSM_IRQS_9625_H
+
+/* MSM ACPU Interrupt Numbers */
+
+/*
+ * 0-15: STI/SGI (software triggered/generated interrupts)
+ * 16-31: PPI (private peripheral interrupts)
+ * 32+: SPI (shared peripheral interrupts)
+ */
+
+
+#define APCC_QGICL2PERFMONIRPTREQ (GIC_SPI_START + 1)
+#define SC_SICL2PERFMONIRPTREQ APCC_QGICL2PERFMONIRPTREQ
+#define TLMM_MSM_SUMMARY_IRQ (GIC_SPI_START + 16)
+#define SPS_BAM_DMA_IRQ (GIC_SPI_START + 208)
+
+#define NR_MSM_IRQS 288
+#define NR_GPIO_IRQS 88
+#define NR_BOARD_IRQS 0
+#define NR_TLMM_MSM_DIR_CONN_IRQ 8 /*Need to Verify this Count*/
+#define NR_MSM_GPIOS NR_GPIO_IRQS
+
+#endif
diff --git a/arch/arm/mach-msm/include/mach/irqs.h b/arch/arm/mach-msm/include/mach/irqs.h
index e3904b4..bf766f4 100644
--- a/arch/arm/mach-msm/include/mach/irqs.h
+++ b/arch/arm/mach-msm/include/mach/irqs.h
@@ -62,6 +62,8 @@
#include "irqs-copper.h"
#elif defined(CONFIG_ARCH_MSM9615)
#include "irqs-9615.h"
+#elif defined(CONFIG_ARCH_MSM9625)
+#include "irqs-9625.h"
#elif defined(CONFIG_ARCH_MSM7X30)
#include "irqs-7x30.h"
#elif defined(CONFIG_ARCH_QSD8X50)
diff --git a/arch/arm/mach-msm/include/mach/msm_iomap-9625.h b/arch/arm/mach-msm/include/mach/msm_iomap-9625.h
new file mode 100644
index 0000000..493cf36
--- /dev/null
+++ b/arch/arm/mach-msm/include/mach/msm_iomap-9625.h
@@ -0,0 +1,42 @@
+/*
+ * Copyright (c) 2012, Code Aurora Forum. All rights reserved.
+ *
+ * This software is licensed under the terms of the GNU General Public
+ * License version 2, as published by the Free Software Foundation, and
+ * may be copied, distributed, and modified under those terms.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#ifndef __ASM_ARCH_MSM_IOMAP_MSM9625_H
+#define __ASM_ARCH_MSM_IOMAP_MSM9625_H
+
+/* Physical base address and size of peripherals.
+ * Ordered by the virtual base addresses they will be mapped at.
+ *
+ * If you add or remove entries here, you'll want to edit the
+ * io desc array in arch/arm/mach-msm/io.c to reflect your
+ * changes.
+ *
+ */
+
+#define MSM9625_SHARED_RAM_PHYS 0x18D00000
+
+#define MSM9625_APCS_GCC_PHYS 0xF9011000
+#define MSM9625_APCS_GCC_SIZE SZ_4K
+
+#define MSM9625_TMR_PHYS 0xF9021000
+#define MSM9625_TMR_SIZE SZ_4K
+
+#define MSM9625_TLMM_PHYS 0xFD510000
+#define MSM9625_TLMM_SIZE SZ_16K
+
+#ifdef CONFIG_DEBUG_MSM9625_UART
+#define MSM_DEBUG_UART_BASE IOMEM(0xFA71E000)
+#define MSM_DEBUG_UART_PHYS 0xF991E000
+#endif
+
+#endif
diff --git a/arch/arm/mach-msm/include/mach/msm_iomap.h b/arch/arm/mach-msm/include/mach/msm_iomap.h
index 34af610..2676297 100644
--- a/arch/arm/mach-msm/include/mach/msm_iomap.h
+++ b/arch/arm/mach-msm/include/mach/msm_iomap.h
@@ -58,7 +58,8 @@
defined(CONFIG_ARCH_MSM8930) || defined(CONFIG_ARCH_MSM9615) || \
defined(CONFIG_ARCH_MSMCOPPER) || defined(CONFIG_ARCH_MSM7X27) || \
defined(CONFIG_ARCH_MSM7X25) || defined(CONFIG_ARCH_MSM7X01A) || \
- defined(CONFIG_ARCH_MSM8625) || defined(CONFIG_ARCH_MSM7X30)
+ defined(CONFIG_ARCH_MSM8625) || defined(CONFIG_ARCH_MSM7X30) || \
+ defined(CONFIG_ARCH_MSM9625)
/* Unified iomap */
@@ -121,6 +122,7 @@
#include "msm_iomap-8064.h"
#include "msm_iomap-9615.h"
#include "msm_iomap-copper.h"
+#include "msm_iomap-9625.h"
#else
/* Legacy single-target iomap */
diff --git a/arch/arm/mach-msm/include/mach/msm_smd.h b/arch/arm/mach-msm/include/mach/msm_smd.h
index 2966509..dc633fb 100644
--- a/arch/arm/mach-msm/include/mach/msm_smd.h
+++ b/arch/arm/mach-msm/include/mach/msm_smd.h
@@ -295,6 +295,14 @@
* -EINVAL - NULL parameter or non-packet based channel provided
*/
int smd_is_pkt_avail(smd_channel_t *ch);
+
+/*
+ * SMD initialization function that registers for a SMD platform driver.
+ *
+ * returns success on successful driver registration.
+ */
+int __init msm_smd_init(void);
+
#else
static inline int smd_open(const char *name, smd_channel_t **ch, void *priv,
@@ -411,6 +419,11 @@
{
return -ENODEV;
}
+
+static inline int __init msm_smd_init(void)
+{
+ return 0;
+}
#endif
#endif
diff --git a/arch/arm/mach-msm/include/mach/socinfo.h b/arch/arm/mach-msm/include/mach/socinfo.h
index 09494ea..c0ad65b 100644
--- a/arch/arm/mach-msm/include/mach/socinfo.h
+++ b/arch/arm/mach-msm/include/mach/socinfo.h
@@ -40,11 +40,17 @@
of_machine_is_compatible("qcom,msmcopper-sim")
#define machine_is_copper_rumi() \
of_machine_is_compatible("qcom,msmcopper-rumi")
+#define early_machine_is_msm9625() \
+ of_flat_dt_is_compatible(of_get_flat_dt_root(), "qcom,msm9625")
+#define machine_is_msm9625() \
+ of_machine_is_compatible("qcom,msm9625")
#else
#define early_machine_is_copper() 0
#define machine_is_copper() 0
#define machine_is_copper_sim() 0
#define machine_is_copper_rumi() 0
+#define early_machine_is_msm9625() 0
+#define machine_is_msm9625() 0
#endif
#define PLATFORM_SUBTYPE_SGLTE 6
@@ -72,6 +78,7 @@
MSM_CPU_COPPER,
MSM_CPU_8627,
MSM_CPU_8625,
+ MSM_CPU_9625
};
enum msm_cpu socinfo_get_msm_cpu(void);
diff --git a/arch/arm/mach-msm/io.c b/arch/arm/mach-msm/io.c
index 7c0de57..59d3a96 100644
--- a/arch/arm/mach-msm/io.c
+++ b/arch/arm/mach-msm/io.c
@@ -449,6 +449,29 @@
void __init msm_map_msm8625_io(void) { return; }
#endif /* CONFIG_ARCH_MSM8625 */
+#ifdef CONFIG_ARCH_MSM9625
+static struct map_desc msm9625_io_desc[] __initdata = {
+ MSM_CHIP_DEVICE(APCS_GCC, MSM9625),
+ MSM_CHIP_DEVICE(TLMM, MSM9625),
+ MSM_CHIP_DEVICE(TMR, MSM9625),
+ {
+ .virtual = (unsigned long) MSM_SHARED_RAM_BASE,
+ .length = MSM_SHARED_RAM_SIZE,
+ .type = MT_DEVICE,
+ },
+#ifdef CONFIG_DEBUG_MSM9625_UART
+ MSM_DEVICE(DEBUG_UART),
+#endif
+};
+
+void __init msm_map_msm9625_io(void)
+{
+ msm_shared_ram_phys = MSM9625_SHARED_RAM_PHYS;
+ msm_map_io(msm9625_io_desc, ARRAY_SIZE(msm9625_io_desc));
+}
+#endif /* CONFIG_ARCH_MSM9625 */
+
+
void __iomem *
__msm_ioremap(unsigned long phys_addr, size_t size, unsigned int mtype)
{
diff --git a/arch/arm/mach-msm/ipc_socket.c b/arch/arm/mach-msm/ipc_socket.c
index 6e8c99e..085b87a 100644
--- a/arch/arm/mach-msm/ipc_socket.c
+++ b/arch/arm/mach-msm/ipc_socket.c
@@ -21,6 +21,10 @@
#include <linux/gfp.h>
#include <linux/msm_ipc.h>
+#ifdef CONFIG_ANDROID_PARANOID_NETWORK
+#include <linux/android_aid.h>
+#endif
+
#include <asm/string.h>
#include <asm/atomic.h>
@@ -39,6 +43,21 @@
static struct proto msm_ipc_proto;
static const struct proto_ops msm_ipc_proto_ops;
+#ifdef CONFIG_ANDROID_PARANOID_NETWORK
+static inline int check_permissions(void)
+{
+ int rc = 0;
+ if (!current_euid() || in_egroup_p(AID_NET_RAW))
+ rc = 1;
+ return rc;
+}
+# else
+static inline int check_permissions(void)
+{
+ return 1;
+}
+#endif
+
static void msm_ipc_router_unload_modem(void *pil)
{
if (pil)
@@ -214,6 +233,11 @@
struct msm_ipc_port *port_ptr;
void *pil;
+ if (!check_permissions()) {
+ pr_err("%s: Do not have permissions\n", __func__);
+ return -EPERM;
+ }
+
if (unlikely(protocol != 0)) {
pr_err("%s: Protocol not supported\n", __func__);
return -EPROTONOSUPPORT;
diff --git a/arch/arm/mach-msm/modem-8960.c b/arch/arm/mach-msm/modem-8960.c
index 9a1e565..4922007 100644
--- a/arch/arm/mach-msm/modem-8960.c
+++ b/arch/arm/mach-msm/modem-8960.c
@@ -36,6 +36,8 @@
static int crash_shutdown;
#define MAX_SSR_REASON_LEN 81U
+#define Q6_FW_WDOG_ENABLE 0x08882024
+#define Q6_SW_WDOG_ENABLE 0x08982024
static void log_modem_sfr(void)
{
@@ -61,6 +63,27 @@
wmb();
}
+static void modem_wdog_check(struct work_struct *work)
+{
+ void __iomem *q6_sw_wdog_addr;
+ u32 regval;
+
+ q6_sw_wdog_addr = ioremap_nocache(Q6_SW_WDOG_ENABLE, 4);
+ if (!q6_sw_wdog_addr)
+ panic("Unable to check modem watchdog status.\n");
+
+ regval = readl_relaxed(q6_sw_wdog_addr);
+ if (!regval) {
+ pr_err("modem-8960: Modem watchdog wasn't activated!. Restarting the modem now.\n");
+ log_modem_sfr();
+ subsystem_restart("modem");
+ }
+
+ iounmap(q6_sw_wdog_addr);
+}
+
+static DECLARE_DELAYED_WORK(modem_wdog_check_work, modem_wdog_check);
+
static void modem_sw_fatal_fn(struct work_struct *work)
{
uint32_t panic_smsm_states = SMSM_RESET | SMSM_SYSTEM_DOWNLOAD;
@@ -115,14 +138,18 @@
}
}
-#define Q6_FW_WDOG_ENABLE 0x08882024
-#define Q6_SW_WDOG_ENABLE 0x08982024
static int modem_shutdown(const struct subsys_data *subsys)
{
void __iomem *q6_fw_wdog_addr;
void __iomem *q6_sw_wdog_addr;
/*
+ * Cancel any pending wdog_check work items, since we're shutting
+ * down anyway.
+ */
+ cancel_delayed_work(&modem_wdog_check_work);
+
+ /*
* Disable the modem watchdog since it keeps running even after the
* modem is shutdown.
*/
@@ -150,12 +177,16 @@
return 0;
}
+#define MODEM_WDOG_CHECK_TIMEOUT_MS 10000
+
static int modem_powerup(const struct subsys_data *subsys)
{
pil_force_boot("modem_fw");
pil_force_boot("modem");
enable_irq(Q6FW_WDOG_EXPIRED_IRQ);
enable_irq(Q6SW_WDOG_EXPIRED_IRQ);
+ schedule_delayed_work(&modem_wdog_check_work,
+ msecs_to_jiffies(MODEM_WDOG_CHECK_TIMEOUT_MS));
return 0;
}
diff --git a/arch/arm/mach-msm/msm_cache_dump.c b/arch/arm/mach-msm/msm_cache_dump.c
index 404c8f0..191e950 100644
--- a/arch/arm/mach-msm/msm_cache_dump.c
+++ b/arch/arm/mach-msm/msm_cache_dump.c
@@ -26,7 +26,7 @@
#include <mach/memory.h>
#include <mach/msm_iomap.h>
-#define L2C_IMEM_ADDR 0x2a03f014
+#define L2_DUMP_OFFSET 0x14
static unsigned long msm_cache_dump_addr;
@@ -66,9 +66,6 @@
unsigned long buf;
unsigned long size;
} l1_cache_data;
-#ifndef CONFIG_MSM_CACHE_DUMP_ON_PANIC
- unsigned int *imem_loc;
-#endif
void *temp;
unsigned long total_size = d->l1_size + d->l2_size;
@@ -105,9 +102,8 @@
pr_err("%s: could not register L2 buffer ret = %d.\n",
__func__, ret);
#else
- imem_loc = ioremap(L2C_IMEM_ADDR, SZ_4K);
- __raw_writel(msm_cache_dump_addr + d->l1_size, imem_loc);
- iounmap(imem_loc);
+ __raw_writel(msm_cache_dump_addr + d->l1_size,
+ MSM_IMEM_BASE + L2_DUMP_OFFSET);
#endif
atomic_notifier_chain_register(&panic_notifier_list,
diff --git a/arch/arm/mach-msm/qdsp5/audio_amrnb_in.c b/arch/arm/mach-msm/qdsp5/audio_amrnb_in.c
index d4e4893..bec1d4c 100644
--- a/arch/arm/mach-msm/qdsp5/audio_amrnb_in.c
+++ b/arch/arm/mach-msm/qdsp5/audio_amrnb_in.c
@@ -821,13 +821,15 @@
}
/* Allow only single frame */
if (audio->mode == MSM_AUD_ENC_MODE_TUNNEL) {
- if (cfg.buffer_size != (FRAME_SIZE - 8))
+ if (cfg.buffer_size != (FRAME_SIZE - 8)) {
rc = -EINVAL;
break;
+ }
} else {
- if (cfg.buffer_size != (AMRNB_FRAME_SIZE + 14))
+ if (cfg.buffer_size != (AMRNB_FRAME_SIZE + 14)) {
rc = -EINVAL;
break;
+ }
}
audio->buffer_size = cfg.buffer_size;
break;
diff --git a/arch/arm/mach-msm/qdsp5/audio_evrc_in.c b/arch/arm/mach-msm/qdsp5/audio_evrc_in.c
index 99ad02b..05a16da 100644
--- a/arch/arm/mach-msm/qdsp5/audio_evrc_in.c
+++ b/arch/arm/mach-msm/qdsp5/audio_evrc_in.c
@@ -799,13 +799,15 @@
}
/* Allow only single frame */
if (audio->mode == MSM_AUD_ENC_MODE_TUNNEL) {
- if (cfg.buffer_size != (FRAME_SIZE - 8))
+ if (cfg.buffer_size != (FRAME_SIZE - 8)) {
rc = -EINVAL;
break;
+ }
} else {
- if (cfg.buffer_size != (EVRC_FRAME_SIZE + 14))
+ if (cfg.buffer_size != (EVRC_FRAME_SIZE + 14)) {
rc = -EINVAL;
break;
+ }
}
audio->buffer_size = cfg.buffer_size;
break;
diff --git a/arch/arm/mach-msm/qdsp5/audio_lpa.c b/arch/arm/mach-msm/qdsp5/audio_lpa.c
index 8dfba0b..a7c2543 100644
--- a/arch/arm/mach-msm/qdsp5/audio_lpa.c
+++ b/arch/arm/mach-msm/qdsp5/audio_lpa.c
@@ -552,7 +552,9 @@
struct audpcm_buffer_node *buf_node;
struct list_head *ptr, *next;
union msm_audio_event_payload payload;
+ unsigned long flags;
+ spin_lock_irqsave(&audio->dsp_lock, flags);
MM_DBG("\n"); /* Macro prints the file name and function */
list_for_each_safe(ptr, next, &audio->out_queue) {
buf_node = list_entry(ptr, struct audpcm_buffer_node, list);
@@ -565,6 +567,7 @@
audio->drv_status &= ~ADRV_STATUS_OBUF_GIVEN;
audio->out_needed = 0;
atomic_set(&audio->out_bytes, 0);
+ spin_unlock_irqrestore(&audio->dsp_lock, flags);
}
static void audio_ioport_reset(struct audio *audio)
{
diff --git a/arch/arm/mach-msm/qdsp5/audio_mp3.c b/arch/arm/mach-msm/qdsp5/audio_mp3.c
index 5abdf85..7f72e25 100644
--- a/arch/arm/mach-msm/qdsp5/audio_mp3.c
+++ b/arch/arm/mach-msm/qdsp5/audio_mp3.c
@@ -836,7 +836,9 @@
struct audmp3_buffer_node *buf_node;
struct list_head *ptr, *next;
union msm_audio_event_payload payload;
+ unsigned long flags;
+ spin_lock_irqsave(&audio->dsp_lock, flags);
MM_DBG("\n"); /* Macro prints the file name and function */
list_for_each_safe(ptr, next, &audio->out_queue) {
buf_node = list_entry(ptr, struct audmp3_buffer_node, list);
@@ -849,6 +851,7 @@
audio->drv_status &= ~ADRV_STATUS_OBUF_GIVEN;
audio->out_needed = 0;
atomic_set(&audio->out_bytes, 0);
+ spin_unlock_irqrestore(&audio->dsp_lock, flags);
}
static void audio_flush(struct audio *audio)
diff --git a/arch/arm/mach-msm/qdsp5/audio_out.c b/arch/arm/mach-msm/qdsp5/audio_out.c
index 8fe8cf66..ef7a70b 100644
--- a/arch/arm/mach-msm/qdsp5/audio_out.c
+++ b/arch/arm/mach-msm/qdsp5/audio_out.c
@@ -593,6 +593,7 @@
audio_flush(audio);
mutex_unlock(&audio->write_lock);
}
+ break;
case AUDIO_SET_CONFIG: {
struct msm_audio_config config;
if (copy_from_user(&config, (void*) arg, sizeof(config))) {
diff --git a/arch/arm/mach-msm/qdsp5/audio_pcm_in.c b/arch/arm/mach-msm/qdsp5/audio_pcm_in.c
index 16c70ce..851980d 100644
--- a/arch/arm/mach-msm/qdsp5/audio_pcm_in.c
+++ b/arch/arm/mach-msm/qdsp5/audio_pcm_in.c
@@ -585,7 +585,7 @@
audio->in_head = 0;
audio->in_tail = 0;
audio->in_count = 0;
- for (i = FRAME_NUM-1; i <= 0; i--) {
+ for (i = FRAME_NUM-1; i >= 0; i--) {
audio->in[i].size = 0;
audio->in[i].read = 0;
}
diff --git a/arch/arm/mach-msm/qdsp5/audio_qcelp_in.c b/arch/arm/mach-msm/qdsp5/audio_qcelp_in.c
index 6ebd5f9..e6906d0 100644
--- a/arch/arm/mach-msm/qdsp5/audio_qcelp_in.c
+++ b/arch/arm/mach-msm/qdsp5/audio_qcelp_in.c
@@ -800,13 +800,15 @@
}
/* Allow only single frame */
if (audio->mode == MSM_AUD_ENC_MODE_TUNNEL) {
- if (cfg.buffer_size != (FRAME_SIZE - 8))
+ if (cfg.buffer_size != (FRAME_SIZE - 8)) {
rc = -EINVAL;
break;
+ }
} else {
- if (cfg.buffer_size != (QCELP_FRAME_SIZE + 14))
+ if (cfg.buffer_size != (QCELP_FRAME_SIZE + 14)) {
rc = -EINVAL;
break;
+ }
}
audio->buffer_size = cfg.buffer_size;
break;
diff --git a/arch/arm/mach-msm/qdsp5/audio_wma.c b/arch/arm/mach-msm/qdsp5/audio_wma.c
index d767916..b17cdda 100644
--- a/arch/arm/mach-msm/qdsp5/audio_wma.c
+++ b/arch/arm/mach-msm/qdsp5/audio_wma.c
@@ -469,6 +469,7 @@
wake_up(&audio->write_wait);
if (audio->pcm_feedback)
audplay_buffer_refresh(audio);
+ break;
case AUDPP_MSG_PCMDMAMISSED:
MM_DBG("PCMDMAMISSED\n");
audio->teos = 1;
diff --git a/arch/arm/mach-msm/qdsp5/audio_wmapro.c b/arch/arm/mach-msm/qdsp5/audio_wmapro.c
index 7fb08ff..5e806e6 100644
--- a/arch/arm/mach-msm/qdsp5/audio_wmapro.c
+++ b/arch/arm/mach-msm/qdsp5/audio_wmapro.c
@@ -463,6 +463,7 @@
wake_up(&audio->write_wait);
if (audio->pcm_feedback)
audplay_buffer_refresh(audio);
+ break;
case AUDPP_MSG_PCMDMAMISSED:
MM_DBG("PCMDMAMISSED\n");
audio->teos = 1;
diff --git a/arch/arm/mach-msm/qdsp5v2/audio_a2dp_in.c b/arch/arm/mach-msm/qdsp5v2/audio_a2dp_in.c
index 60b5c20..733b7a1 100644
--- a/arch/arm/mach-msm/qdsp5v2/audio_a2dp_in.c
+++ b/arch/arm/mach-msm/qdsp5v2/audio_a2dp_in.c
@@ -1,4 +1,4 @@
-/* Copyright (c) 2010-2011, Code Aurora Forum. All rights reserved.
+/* Copyright (c) 2010-2012, Code Aurora Forum. All rights reserved.
*
* sbc/pcm audio input driver
* Based on the pcm input driver in arch/arm/mach-msm/qdsp5v2/audio_pcm_in.c
@@ -41,7 +41,6 @@
#include <mach/iommu_domains.h>
#include <mach/msm_adsp.h>
#include <mach/msm_memtypes.h>
-#include <mach/msm_subsystem_map.h>
#include <mach/socinfo.h>
#include <mach/qdsp5v2/qdsp5audreccmdi.h>
#include <mach/qdsp5v2/qdsp5audrecmsg.h>
@@ -108,7 +107,7 @@
/* data allocated for various buffers */
char *data;
dma_addr_t phys;
- struct msm_mapped_buffer *msm_map;
+ void *msm_map;
int opened;
int enabled;
@@ -849,7 +848,7 @@
audio->audrec = NULL;
audio->opened = 0;
if (audio->data) {
- msm_subsystem_unmap_buffer(audio->msm_map);
+ iounmap(audio->msm_map);
free_contiguous_memory_by_paddr(audio->phys);
audio->data = NULL;
}
@@ -871,9 +870,7 @@
audio->phys = allocate_contiguous_ebi_nomap(DMASZ, SZ_4K);
if (audio->phys) {
- audio->msm_map = msm_subsystem_map_buffer(
- audio->phys, DMASZ,
- MSM_SUBSYSTEM_MAP_KADDR, NULL, 0);
+ audio->msm_map = ioremap(audio->phys, DMASZ);
if (IS_ERR(audio->msm_map)) {
MM_ERR("could not map the phys address to kernel"
"space\n");
@@ -881,7 +878,7 @@
free_contiguous_memory_by_paddr(audio->phys);
goto done;
}
- audio->data = (u8 *)audio->msm_map->vaddr;
+ audio->data = (u8 *)audio->msm_map;
} else {
MM_ERR("could not allocate DMA buffers\n");
rc = -ENOMEM;
diff --git a/arch/arm/mach-msm/qdsp5v2/audio_aac.c b/arch/arm/mach-msm/qdsp5v2/audio_aac.c
index 9069426..32053bf 100644
--- a/arch/arm/mach-msm/qdsp5v2/audio_aac.c
+++ b/arch/arm/mach-msm/qdsp5v2/audio_aac.c
@@ -3,7 +3,7 @@
*
* Copyright (C) 2008 Google, Inc.
* Copyright (C) 2008 HTC Corporation
- * Copyright (c) 2008-2011, Code Aurora Forum. All rights reserved.
+ * Copyright (c) 2008-2012, Code Aurora Forum. All rights reserved.
*
* This software is licensed under the terms of the GNU General Public
* License version 2, as published by the Free Software Foundation, and
@@ -38,7 +38,6 @@
#include <mach/msm_adsp.h>
#include <mach/iommu.h>
#include <mach/iommu_domains.h>
-#include <mach/msm_subsystem_map.h>
#include <mach/qdsp5v2/qdsp5audppmsg.h>
#include <mach/qdsp5v2/qdsp5audplaycmdi.h>
#include <mach/qdsp5v2/qdsp5audplaymsg.h>
@@ -142,8 +141,8 @@
/* data allocated for various buffers */
char *data;
int32_t phys; /* physical address of write buffer */
- struct msm_mapped_buffer *map_v_read;
- struct msm_mapped_buffer *map_v_write;
+ void *map_v_read;
+ void *map_v_write;
int mfield; /* meta field embedded in data */
int rflush; /* Read flush */
@@ -1629,9 +1628,9 @@
audio->event_abort = 1;
wake_up(&audio->event_wait);
audaac_reset_event_queue(audio);
- msm_subsystem_unmap_buffer(audio->map_v_write);
+ iounmap(audio->map_v_write);
free_contiguous_memory_by_paddr(audio->phys);
- msm_subsystem_unmap_buffer(audio->map_v_read);
+ iounmap(audio->map_v_read);
free_contiguous_memory_by_paddr(audio->read_phys);
mutex_unlock(&audio->lock);
#ifdef CONFIG_DEBUG_FS
@@ -1821,10 +1820,8 @@
audio->phys = allocate_contiguous_ebi_nomap(pmem_sz, SZ_4K);
if (audio->phys) {
audio->map_v_write =
- msm_subsystem_map_buffer(audio->phys,
- pmem_sz,
- MSM_SUBSYSTEM_MAP_KADDR,
- NULL, 0);
+ ioremap(audio->phys,
+ pmem_sz);
if (IS_ERR(audio->map_v_write)) {
MM_ERR("could not map write phys address, \
freeing instance 0x%08x\n",
@@ -1835,7 +1832,7 @@
kfree(audio);
goto done;
}
- audio->data = (u8 *)audio->map_v_write->vaddr;
+ audio->data = (u8 *)audio->map_v_write;
MM_DBG("write buf: phy addr 0x%08x kernel addr \
0x%08x\n", audio->phys, (int)audio->data);
break;
@@ -1857,28 +1854,26 @@
MM_ERR("could not allocate read buffers, freeing instance \
0x%08x\n", (int)audio);
rc = -ENOMEM;
- msm_subsystem_unmap_buffer(audio->map_v_write);
+ iounmap(audio->map_v_write);
free_contiguous_memory_by_paddr(audio->phys);
audpp_adec_free(audio->dec_id);
kfree(audio);
goto done;
}
- audio->map_v_read = msm_subsystem_map_buffer(
- audio->read_phys,
- PCM_BUFSZ_MIN * PCM_BUF_MAX_COUNT,
- MSM_SUBSYSTEM_MAP_KADDR, NULL, 0);
+ audio->map_v_read = ioremap(audio->read_phys,
+ PCM_BUFSZ_MIN * PCM_BUF_MAX_COUNT);
if (IS_ERR(audio->map_v_read)) {
MM_ERR("could not map read phys address, freeing instance \
0x%08x\n", (int)audio);
rc = -ENOMEM;
- msm_subsystem_unmap_buffer(audio->map_v_write);
+ iounmap(audio->map_v_write);
free_contiguous_memory_by_paddr(audio->phys);
free_contiguous_memory_by_paddr(audio->read_phys);
audpp_adec_free(audio->dec_id);
kfree(audio);
goto done;
}
- audio->read_data = audio->map_v_read->vaddr;
+ audio->read_data = audio->map_v_read;
MM_DBG("read buf: phy addr 0x%08x kernel addr 0x%08x\n",
audio->read_phys, (int)audio->read_data);
@@ -2000,9 +1995,9 @@
event_err:
msm_adsp_put(audio->audplay);
err:
- msm_subsystem_unmap_buffer(audio->map_v_write);
+ iounmap(audio->map_v_write);
free_contiguous_memory_by_paddr(audio->phys);
- msm_subsystem_unmap_buffer(audio->map_v_read);
+ iounmap(audio->map_v_read);
free_contiguous_memory_by_paddr(audio->read_phys);
audpp_adec_free(audio->dec_id);
kfree(audio);
diff --git a/arch/arm/mach-msm/qdsp5v2/audio_aac_in.c b/arch/arm/mach-msm/qdsp5v2/audio_aac_in.c
index 010fd90..d2b4407 100644
--- a/arch/arm/mach-msm/qdsp5v2/audio_aac_in.c
+++ b/arch/arm/mach-msm/qdsp5v2/audio_aac_in.c
@@ -3,7 +3,7 @@
*
* Copyright (C) 2008 Google, Inc.
* Copyright (C) 2008 HTC Corporation
- * Copyright (c) 2009-2011, Code Aurora Forum. All rights reserved.
+ * Copyright (c) 2009-2012, Code Aurora Forum. All rights reserved.
*
* This software is licensed under the terms of the GNU General Public
* License version 2, as published by the Free Software Foundation, and
@@ -32,7 +32,6 @@
#include <mach/msm_adsp.h>
#include <mach/iommu.h>
-#include <mach/msm_subsystem_map.h>
#include <mach/iommu_domains.h>
#include <mach/qdsp5v2/qdsp5audreccmdi.h>
#include <mach/qdsp5v2/qdsp5audrecmsg.h>
@@ -97,8 +96,8 @@
wait_queue_head_t write_wait;
int32_t out_phys; /* physical address of write buffer */
char *out_data;
- struct msm_mapped_buffer *map_v_read;
- struct msm_mapped_buffer *map_v_write;
+ void *map_v_read;
+ void *map_v_write;
int mfield; /* meta field embedded in data */
int wflush; /*write flush */
@@ -1292,12 +1291,12 @@
audio->audrec = NULL;
audio->opened = 0;
if (audio->data) {
- msm_subsystem_unmap_buffer(audio->map_v_read);
+ iounmap(audio->map_v_read);
free_contiguous_memory_by_paddr(audio->phys);
audio->data = NULL;
}
if (audio->out_data) {
- msm_subsystem_unmap_buffer(audio->map_v_write);
+ iounmap(audio->map_v_write);
free_contiguous_memory_by_paddr(audio->out_phys);
audio->out_data = NULL;
}
@@ -1320,16 +1319,14 @@
}
audio->phys = allocate_contiguous_ebi_nomap(DMASZ, SZ_4K);
if (audio->phys) {
- audio->map_v_read = msm_subsystem_map_buffer(
- audio->phys, DMASZ,
- MSM_SUBSYSTEM_MAP_KADDR, NULL, 0);
+ audio->map_v_read = ioremap(audio->phys, DMASZ);
if (IS_ERR(audio->map_v_read)) {
MM_ERR("could not map DMA buffers\n");
rc = -ENOMEM;
free_contiguous_memory_by_paddr(audio->phys);
goto done;
}
- audio->data = audio->map_v_read->vaddr;
+ audio->data = audio->map_v_read;
} else {
MM_ERR("could not allocate DMA buffers\n");
rc = -ENOMEM;
@@ -1398,16 +1395,15 @@
rc = -ENOMEM;
goto evt_error;
} else {
- audio->map_v_write = msm_subsystem_map_buffer(
- audio->out_phys, BUFFER_SIZE,
- MSM_SUBSYSTEM_MAP_KADDR, NULL, 0);
+ audio->map_v_write = ioremap(
+ audio->out_phys, BUFFER_SIZE);
if (IS_ERR(audio->map_v_write)) {
MM_ERR("could not map write phys address\n");
rc = -ENOMEM;
free_contiguous_memory_by_paddr(audio->out_phys);
goto evt_error;
}
- audio->out_data = audio->map_v_write->vaddr;
+ audio->out_data = audio->map_v_write;
MM_DBG("write buf: phy addr 0x%08x kernel addr 0x%08x\n",
audio->out_phys, (int)audio->out_data);
}
@@ -1434,7 +1430,7 @@
aac_in_listener, (void *) audio);
if (rc) {
MM_ERR("failed to register device event listener\n");
- msm_subsystem_unmap_buffer(audio->map_v_write);
+ iounmap(audio->map_v_write);
free_contiguous_memory_by_paddr(audio->out_phys);
goto evt_error;
}
diff --git a/arch/arm/mach-msm/qdsp5v2/audio_acdb.c b/arch/arm/mach-msm/qdsp5v2/audio_acdb.c
index 90373f9..89957a4 100644
--- a/arch/arm/mach-msm/qdsp5v2/audio_acdb.c
+++ b/arch/arm/mach-msm/qdsp5v2/audio_acdb.c
@@ -1,4 +1,4 @@
-/* Copyright (c) 2009-2011, Code Aurora Forum. All rights reserved.
+/* Copyright (c) 2009-2012, Code Aurora Forum. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -28,7 +28,6 @@
#include <mach/dal.h>
#include <mach/iommu.h>
#include <mach/iommu_domains.h>
-#include <mach/msm_subsystem_map.h>
#include <mach/qdsp5v2/audio_dev_ctl.h>
#include <mach/qdsp5v2/audpp.h>
#include <mach/socinfo.h>
@@ -111,7 +110,7 @@
u16 *pbe_enable_flag;
u32 fluence_extbuff;
u8 *fluence_extbuff_virt;
- struct msm_mapped_buffer *map_v_fluence;
+ void *map_v_fluence;
struct acdb_pbe_block *pbe_blk;
@@ -130,7 +129,7 @@
/* pmem for get acdb blk */
unsigned long get_blk_paddr;
u8 *get_blk_kvaddr;
- struct msm_mapped_buffer *map_v_get_blk;
+ void *map_v_get_blk;
char *build_id;
};
@@ -140,7 +139,7 @@
u32 node_status;
s32 stream_id;
u32 phys_addr_acdb_values;
- struct msm_mapped_buffer *map_v_addr;
+ void *map_v_addr;
u8 *virt_addr_acdb_values;
struct auddev_evt_audcal_info device_info;
};
@@ -237,7 +236,7 @@
struct rtc_acdb_pmem {
u8 *viraddr;
int32_t phys;
- struct msm_mapped_buffer *map_v_rtc;
+ void *map_v_rtc;
};
struct rtc_acdb_data {
@@ -1087,11 +1086,11 @@
rtc_acdb.valid_abid = false;
if (rtc_read->viraddr != NULL || ((void *)rtc_read->phys) != NULL) {
- msm_subsystem_unmap_buffer(rtc_read->map_v_rtc);
+ iounmap(rtc_read->map_v_rtc);
free_contiguous_memory_by_paddr(rtc_read->phys);
}
if (rtc_write->viraddr != NULL || ((void *)rtc_write->phys) != NULL) {
- msm_subsystem_unmap_buffer(rtc_write->map_v_rtc);
+ iounmap(rtc_write->map_v_rtc);
free_contiguous_memory_by_paddr(rtc_write->phys);
}
}
@@ -1141,17 +1140,15 @@
result = -ENOMEM;
goto error;
}
- rtc_read->map_v_rtc = msm_subsystem_map_buffer(
- rtc_read->phys,
- PMEM_RTC_ACDB_QUERY_MEM,
- MSM_SUBSYSTEM_MAP_KADDR, NULL, 0);
+ rtc_read->map_v_rtc = ioremap(rtc_read->phys,
+ PMEM_RTC_ACDB_QUERY_MEM);
if (IS_ERR(rtc_read->map_v_rtc)) {
MM_ERR("ACDB Could not map physical address\n");
result = -ENOMEM;
goto error;
}
- rtc_read->viraddr = rtc_read->map_v_rtc->vaddr;
+ rtc_read->viraddr = rtc_read->map_v_rtc;
memset(rtc_read->viraddr, 0, PMEM_RTC_ACDB_QUERY_MEM);
rtc_write->phys = allocate_contiguous_ebi_nomap(PMEM_RTC_ACDB_QUERY_MEM,
@@ -1162,16 +1159,15 @@
result = -ENOMEM;
goto error;
}
- rtc_write->map_v_rtc = msm_subsystem_map_buffer(
- rtc_write->phys, PMEM_RTC_ACDB_QUERY_MEM,
- MSM_SUBSYSTEM_MAP_KADDR, NULL, 0);
+ rtc_write->map_v_rtc = ioremap(rtc_write->phys,
+ PMEM_RTC_ACDB_QUERY_MEM);
if (IS_ERR(rtc_write->map_v_rtc)) {
MM_ERR("ACDB Could not map physical address\n");
result = -ENOMEM;
goto error;
}
- rtc_write->viraddr = rtc_write->map_v_rtc->vaddr;
+ rtc_write->viraddr = rtc_write->map_v_rtc;
memset(rtc_write->viraddr, 0, PMEM_RTC_ACDB_QUERY_MEM);
init_waitqueue_head(&rtc_acdb.wait);
return true;
@@ -1187,11 +1183,11 @@
debugfs_remove(get_set_abid_data_dentry);
}
if (rtc_read->viraddr != NULL || ((void *)rtc_read->phys) != NULL) {
- msm_subsystem_unmap_buffer(rtc_read->map_v_rtc);
+ iounmap(rtc_read->map_v_rtc);
free_contiguous_memory_by_paddr(rtc_read->phys);
}
if (rtc_write->viraddr != NULL || ((void *)rtc_write->phys) != NULL) {
- msm_subsystem_unmap_buffer(rtc_write->map_v_rtc);
+ iounmap(rtc_write->map_v_rtc);
free_contiguous_memory_by_paddr(rtc_write->phys);
}
return false;
@@ -2544,11 +2540,9 @@
result = -ENOMEM;
goto error;
}
- acdb_cache_tx[i].map_v_addr =
- msm_subsystem_map_buffer(
+ acdb_cache_tx[i].map_v_addr = ioremap(
acdb_cache_tx[i].phys_addr_acdb_values,
- ACDB_BUF_SIZE,
- MSM_SUBSYSTEM_MAP_KADDR, NULL, 0);
+ ACDB_BUF_SIZE);
if (IS_ERR(acdb_cache_tx[i].map_v_addr)) {
MM_ERR("ACDB=> Could not map physical address\n");
result = -ENOMEM;
@@ -2557,15 +2551,14 @@
goto error;
}
acdb_cache_tx[i].virt_addr_acdb_values =
- acdb_cache_tx[i].map_v_addr->vaddr;
+ acdb_cache_tx[i].map_v_addr;
memset(acdb_cache_tx[i].virt_addr_acdb_values, 0,
ACDB_BUF_SIZE);
}
return result;
error:
for (err = 0; err < i; err++) {
- msm_subsystem_unmap_buffer(
- acdb_cache_tx[err].map_v_addr);
+ iounmap(acdb_cache_tx[err].map_v_addr);
free_contiguous_memory_by_paddr(
acdb_cache_tx[err].phys_addr_acdb_values);
}
@@ -2590,11 +2583,8 @@
goto error;
}
acdb_cache_rx[i].map_v_addr =
- msm_subsystem_map_buffer(
- acdb_cache_rx[i].phys_addr_acdb_values,
- ACDB_BUF_SIZE,
- MSM_SUBSYSTEM_MAP_KADDR,
- NULL, 0);
+ ioremap(acdb_cache_rx[i].phys_addr_acdb_values,
+ ACDB_BUF_SIZE);
if (IS_ERR(acdb_cache_rx[i].map_v_addr)) {
MM_ERR("ACDB=> Could not map physical address\n");
result = -ENOMEM;
@@ -2603,15 +2593,14 @@
goto error;
}
acdb_cache_rx[i].virt_addr_acdb_values =
- acdb_cache_rx[i].map_v_addr->vaddr;
+ acdb_cache_rx[i].map_v_addr;
memset(acdb_cache_rx[i].virt_addr_acdb_values, 0,
ACDB_BUF_SIZE);
}
return result;
error:
for (err = 0; err < i; err++) {
- msm_subsystem_unmap_buffer(
- acdb_cache_rx[err].map_v_addr);
+ iounmap(acdb_cache_rx[err].map_v_addr);
free_contiguous_memory_by_paddr(
acdb_cache_rx[err].phys_addr_acdb_values);
}
@@ -2628,10 +2617,8 @@
result = -ENOMEM;
goto error;
}
- acdb_data.map_v_get_blk = msm_subsystem_map_buffer(
- acdb_data.get_blk_paddr,
- ACDB_BUF_SIZE,
- MSM_SUBSYSTEM_MAP_KADDR, NULL, 0);
+ acdb_data.map_v_get_blk = ioremap(acdb_data.get_blk_paddr,
+ ACDB_BUF_SIZE);
if (IS_ERR(acdb_data.map_v_get_blk)) {
MM_ERR("ACDB=> Could not map physical address\n");
result = -ENOMEM;
@@ -2639,7 +2626,7 @@
acdb_data.get_blk_paddr);
goto error;
}
- acdb_data.get_blk_kvaddr = acdb_data.map_v_get_blk->vaddr;
+ acdb_data.get_blk_kvaddr = acdb_data.map_v_get_blk;
memset(acdb_data.get_blk_kvaddr, 0, ACDB_BUF_SIZE);
error:
return result;
@@ -2650,7 +2637,7 @@
u32 i = 0;
for (i = 0; i < MAX_COPP_NODE_SUPPORTED; i++) {
- msm_subsystem_unmap_buffer(acdb_cache_rx[i].map_v_addr);
+ iounmap(acdb_cache_rx[i].map_v_addr);
free_contiguous_memory_by_paddr(
acdb_cache_rx[i].phys_addr_acdb_values);
}
@@ -2661,7 +2648,7 @@
u32 i = 0;
for (i = 0; i < MAX_AUDREC_SESSIONS; i++) {
- msm_subsystem_unmap_buffer(acdb_cache_tx[i].map_v_addr);
+ iounmap(acdb_cache_tx[i].map_v_addr);
free_contiguous_memory_by_paddr(
acdb_cache_tx[i].phys_addr_acdb_values);
}
@@ -2669,7 +2656,7 @@
static void free_memory_acdb_get_blk(void)
{
- msm_subsystem_unmap_buffer(acdb_data.map_v_get_blk);
+ iounmap(acdb_data.map_v_get_blk);
free_contiguous_memory_by_paddr(acdb_data.get_blk_paddr);
}
@@ -2827,11 +2814,9 @@
result = -ENOMEM;
goto done;
}
- acdb_data.map_v_fluence =
- msm_subsystem_map_buffer(
+ acdb_data.map_v_fluence = ioremap(
acdb_data.fluence_extbuff,
- FLUENCE_BUF_SIZE,
- MSM_SUBSYSTEM_MAP_KADDR, NULL, 0);
+ FLUENCE_BUF_SIZE);
if (IS_ERR(acdb_data.map_v_fluence)) {
MM_ERR("ACDB=> Could not map physical address\n");
free_memory_acdb_get_blk();
@@ -2852,7 +2837,7 @@
goto done;
} else
acdb_data.fluence_extbuff_virt =
- acdb_data.map_v_fluence->vaddr;
+ acdb_data.map_v_fluence;
done:
return result;
}
@@ -3431,11 +3416,11 @@
for (i = 0; i < MAX_COPP_NODE_SUPPORTED; i++) {
if (i < MAX_AUDREC_SESSIONS) {
- msm_subsystem_unmap_buffer(acdb_cache_tx[i].map_v_addr);
+ iounmap(acdb_cache_tx[i].map_v_addr);
free_contiguous_memory_by_paddr(
acdb_cache_tx[i].phys_addr_acdb_values);
}
- msm_subsystem_unmap_buffer(acdb_cache_rx[i].map_v_addr);
+ iounmap(acdb_cache_rx[i].map_v_addr);
free_contiguous_memory_by_paddr(
acdb_cache_rx[i].phys_addr_acdb_values);
}
@@ -3446,7 +3431,7 @@
kfree(acdb_data.preproc_iir);
free_contiguous_memory_by_paddr(
(int32_t)acdb_data.pbe_extbuff);
- msm_subsystem_unmap_buffer(acdb_data.map_v_fluence);
+ iounmap(acdb_data.map_v_fluence);
free_contiguous_memory_by_paddr(
(int32_t)acdb_data.fluence_extbuff);
mutex_destroy(&acdb_data.acdb_mutex);
diff --git a/arch/arm/mach-msm/qdsp5v2/audio_adpcm.c b/arch/arm/mach-msm/qdsp5v2/audio_adpcm.c
index 4b8b7a6..a53128d 100644
--- a/arch/arm/mach-msm/qdsp5v2/audio_adpcm.c
+++ b/arch/arm/mach-msm/qdsp5v2/audio_adpcm.c
@@ -43,7 +43,6 @@
#include <mach/msm_adsp.h>
#include <mach/iommu.h>
#include <mach/iommu_domains.h>
-#include <mach/msm_subsystem_map.h>
#include <mach/qdsp5v2/qdsp5audppmsg.h>
#include <mach/qdsp5v2/qdsp5audplaycmdi.h>
#include <mach/qdsp5v2/qdsp5audplaymsg.h>
@@ -139,8 +138,8 @@
/* data allocated for various buffers */
char *data;
int32_t phys; /* physical address of write buffer */
- struct msm_mapped_buffer *map_v_read;
- struct msm_mapped_buffer *map_v_write;
+ void *map_v_read;
+ void *map_v_write;
int mfield; /* meta field embedded in data */
int rflush; /* Read flush */
int wflush; /* Write flush */
@@ -1023,12 +1022,10 @@
rc = -ENOMEM;
break;
}
- audio->map_v_read = msm_subsystem_map_buffer(
+ audio->map_v_read = ioremap(
audio->read_phys,
config.buffer_size *
- config.buffer_count,
- MSM_SUBSYSTEM_MAP_KADDR
- , NULL, 0);
+ config.buffer_count);
if (IS_ERR(audio->map_v_read)) {
MM_ERR("read buf map fail\n");
rc = -ENOMEM;
@@ -1038,7 +1035,7 @@
uint8_t index;
uint32_t offset = 0;
audio->read_data =
- audio->map_v_read->vaddr;
+ audio->map_v_read;
audio->buf_refresh = 0;
audio->pcm_buf_count =
config.buffer_count;
@@ -1420,10 +1417,10 @@
audio->event_abort = 1;
wake_up(&audio->event_wait);
audadpcm_reset_event_queue(audio);
- msm_subsystem_unmap_buffer(audio->map_v_write);
+ iounmap(audio->map_v_write);
free_contiguous_memory_by_paddr(audio->phys);
if (audio->read_data) {
- msm_subsystem_unmap_buffer(audio->map_v_read);
+ iounmap(audio->map_v_read);
free_contiguous_memory_by_paddr(audio->read_phys);
}
mutex_unlock(&audio->lock);
@@ -1615,10 +1612,7 @@
audio->phys = allocate_contiguous_ebi_nomap(pmem_sz,
SZ_4K);
if (audio->phys) {
- audio->map_v_write = msm_subsystem_map_buffer(
- audio->phys, pmem_sz,
- MSM_SUBSYSTEM_MAP_KADDR,
- NULL, 0);
+ audio->map_v_write = ioremap(audio->phys, pmem_sz);
if (IS_ERR(audio->map_v_write)) {
MM_ERR("could not map write phys address, \
freeing instance 0x%08x\n",
@@ -1629,7 +1623,7 @@
kfree(audio);
goto done;
}
- audio->data = audio->map_v_write->vaddr;
+ audio->data = audio->map_v_write;
MM_DBG("write buf: phy addr 0x%08x kernel addr \
0x%08x\n", audio->phys, (int)audio->data);
break;
@@ -1729,7 +1723,7 @@
event_err:
msm_adsp_put(audio->audplay);
err:
- msm_subsystem_unmap_buffer(audio->map_v_write);
+ iounmap(audio->map_v_write);
free_contiguous_memory_by_paddr(audio->phys);
audpp_adec_free(audio->dec_id);
kfree(audio);
diff --git a/arch/arm/mach-msm/qdsp5v2/audio_amrnb.c b/arch/arm/mach-msm/qdsp5v2/audio_amrnb.c
index a09b71b..5f288dd 100644
--- a/arch/arm/mach-msm/qdsp5v2/audio_amrnb.c
+++ b/arch/arm/mach-msm/qdsp5v2/audio_amrnb.c
@@ -44,7 +44,6 @@
#include <mach/msm_adsp.h>
#include <mach/iommu.h>
#include <mach/iommu_domains.h>
-#include <mach/msm_subsystem_map.h>
#include <mach/qdsp5v2/audio_dev_ctl.h>
#include <mach/qdsp5v2/qdsp5audppmsg.h>
#include <mach/qdsp5v2/qdsp5audplaycmdi.h>
@@ -132,8 +131,8 @@
/* data allocated for various buffers */
char *data;
int32_t phys; /* physical address of write buffer */
- struct msm_mapped_buffer *map_v_read;
- struct msm_mapped_buffer *map_v_write;
+ void *map_v_read;
+ void *map_v_write;
int mfield; /* meta field embedded in data */
int rflush; /* Read flush */
@@ -993,12 +992,10 @@
rc = -ENOMEM;
break;
}
- audio->map_v_read = msm_subsystem_map_buffer(
+ audio->map_v_read = ioremap(
audio->read_phys,
config.buffer_size *
- config.buffer_count,
- MSM_SUBSYSTEM_MAP_KADDR,
- NULL, 0);
+ config.buffer_count);
if (IS_ERR(audio->map_v_read)) {
MM_ERR("failed to map read phys address\n");
rc = -ENOMEM;
@@ -1007,7 +1004,7 @@
} else {
uint8_t index;
uint32_t offset = 0;
- audio->read_data = audio->map_v_read->vaddr;
+ audio->read_data = audio->map_v_read;
audio->buf_refresh = 0;
audio->pcm_buf_count =
config.buffer_count;
@@ -1317,10 +1314,10 @@
audio->event_abort = 1;
wake_up(&audio->event_wait);
audamrnb_reset_event_queue(audio);
- msm_subsystem_unmap_buffer(audio->map_v_write);
+ iounmap(audio->map_v_write);
free_contiguous_memory_by_paddr(audio->phys);
if (audio->read_data) {
- msm_subsystem_unmap_buffer(audio->map_v_read);
+ iounmap(audio->map_v_read);
free_contiguous_memory_by_paddr(audio->read_phys);
}
mutex_unlock(&audio->lock);
@@ -1512,9 +1509,7 @@
kfree(audio);
goto done;
} else {
- audio->map_v_write = msm_subsystem_map_buffer(
- audio->phys, DMASZ,
- MSM_SUBSYSTEM_MAP_KADDR, NULL, 0);
+ audio->map_v_write = ioremap(audio->phys, DMASZ);
if (IS_ERR(audio->map_v_write)) {
MM_ERR("could not map write phys address, freeing \
instance 0x%08x\n", (int)audio);
@@ -1525,7 +1520,7 @@
kfree(audio);
goto done;
}
- audio->data = audio->map_v_write->vaddr;
+ audio->data = audio->map_v_write;
MM_DBG("write buf: phy addr 0x%08x kernel addr \
0x%08x\n", audio->phys, (int)audio->data);
}
@@ -1610,7 +1605,7 @@
event_err:
msm_adsp_put(audio->audplay);
err:
- msm_subsystem_unmap_buffer(audio->map_v_write);
+ iounmap(audio->map_v_write);
free_contiguous_memory_by_paddr(audio->phys);
audpp_adec_free(audio->dec_id);
kfree(audio);
diff --git a/arch/arm/mach-msm/qdsp5v2/audio_amrnb_in.c b/arch/arm/mach-msm/qdsp5v2/audio_amrnb_in.c
index bdb5bb1..790c510 100644
--- a/arch/arm/mach-msm/qdsp5v2/audio_amrnb_in.c
+++ b/arch/arm/mach-msm/qdsp5v2/audio_amrnb_in.c
@@ -3,7 +3,7 @@
*
* Copyright (C) 2008 Google, Inc.
* Copyright (C) 2008 HTC Corporation
- * Copyright (c) 2009-2011, Code Aurora Forum. All rights reserved.
+ * Copyright (c) 2009-2012, Code Aurora Forum. All rights reserved.
*
* This software is licensed under the terms of the GNU General Public
* License version 2, as published by the Free Software Foundation, and
@@ -32,7 +32,6 @@
#include <mach/iommu.h>
#include <mach/iommu_domains.h>
-#include <mach/msm_subsystem_map.h>
#include <mach/msm_adsp.h>
#include <mach/socinfo.h>
#include <mach/qdsp5v2/qdsp5audreccmdi.h>
@@ -99,7 +98,7 @@
/* data allocated for various buffers */
char *data;
dma_addr_t phys;
- struct msm_mapped_buffer *map_v_read;
+ void *map_v_read;
int opened;
int enabled;
@@ -767,7 +766,7 @@
audio->audrec = NULL;
audio->opened = 0;
if (audio->data) {
- msm_subsystem_unmap_buffer(audio->map_v_read);
+ iounmap(audio->map_v_read);
free_contiguous_memory_by_paddr(audio->phys);
audio->data = NULL;
}
@@ -788,16 +787,14 @@
}
audio->phys = allocate_contiguous_ebi_nomap(DMASZ, SZ_4K);
if (audio->phys) {
- audio->map_v_read = msm_subsystem_map_buffer(
- audio->phys, DMASZ,
- MSM_SUBSYSTEM_MAP_KADDR, NULL, 0);
+ audio->map_v_read = ioremap(audio->phys, DMASZ);
if (IS_ERR(audio->map_v_read)) {
MM_ERR("could not map DMA buffers\n");
rc = -ENOMEM;
free_contiguous_memory_by_paddr(audio->phys);
goto done;
}
- audio->data = audio->map_v_read->vaddr;
+ audio->data = audio->map_v_read;
} else {
MM_ERR("could not allocate DMA buffers\n");
rc = -ENOMEM;
diff --git a/arch/arm/mach-msm/qdsp5v2/audio_amrwb.c b/arch/arm/mach-msm/qdsp5v2/audio_amrwb.c
index 48e9a9f..b74c054 100644
--- a/arch/arm/mach-msm/qdsp5v2/audio_amrwb.c
+++ b/arch/arm/mach-msm/qdsp5v2/audio_amrwb.c
@@ -45,7 +45,6 @@
#include <mach/msm_adsp.h>
#include <mach/iommu.h>
#include <mach/iommu_domains.h>
-#include <mach/msm_subsystem_map.h>
#include <mach/qdsp5v2/qdsp5audppmsg.h>
#include <mach/qdsp5v2/qdsp5audplaycmdi.h>
#include <mach/qdsp5v2/qdsp5audplaymsg.h>
@@ -136,8 +135,8 @@
char *data;
int32_t phys; /* physical address of write buffer */
- struct msm_mapped_buffer *map_v_read;
- struct msm_mapped_buffer *map_v_write;
+ void *map_v_read;
+ void *map_v_write;
int mfield; /* meta field embedded in data */
int rflush; /* Read flush */
@@ -1003,12 +1002,10 @@
rc = -ENOMEM;
break;
}
- audio->map_v_read = msm_subsystem_map_buffer(
+ audio->map_v_read = ioremap(
audio->read_phys,
config.buffer_size *
- config.buffer_count,
- MSM_SUBSYSTEM_MAP_KADDR,
- NULL, 0);
+ config.buffer_count);
if (IS_ERR(audio->map_v_read)) {
MM_ERR("Error could not map read"
" phys address\n");
@@ -1018,7 +1015,7 @@
} else {
uint8_t index;
uint32_t offset = 0;
- audio->read_data = audio->map_v_read->vaddr;
+ audio->read_data = audio->map_v_read;
audio->pcm_feedback = 1;
audio->buf_refresh = 0;
audio->pcm_buf_count =
@@ -1401,10 +1398,10 @@
audio->event_abort = 1;
wake_up(&audio->event_wait);
audamrwb_reset_event_queue(audio);
- msm_subsystem_unmap_buffer(audio->map_v_write);
+ iounmap(audio->map_v_write);
free_contiguous_memory_by_paddr(audio->phys);
if (audio->read_data) {
- msm_subsystem_unmap_buffer(audio->map_v_read);
+ iounmap(audio->map_v_read);
free_contiguous_memory_by_paddr(audio->read_phys);
}
mutex_unlock(&audio->lock);
@@ -1591,9 +1588,7 @@
kfree(audio);
goto done;
} else {
- audio->map_v_write = msm_subsystem_map_buffer(
- audio->phys, DMASZ,
- MSM_SUBSYSTEM_MAP_KADDR, NULL, 0);
+ audio->map_v_write = ioremap(audio->phys, DMASZ);
if (IS_ERR(audio->map_v_write)) {
MM_ERR("could not map write phys buffers, freeing \
instance 0x%08x\n", (int)audio);
@@ -1603,7 +1598,7 @@
kfree(audio);
goto done;
}
- audio->data = audio->map_v_write->vaddr;
+ audio->data = audio->map_v_write;
MM_DBG("write buf: phy addr 0x%08x kernel addr 0x%08x\n",
audio->phys, (int)audio->data);
}
@@ -1692,7 +1687,7 @@
event_err:
msm_adsp_put(audio->audplay);
err:
- msm_subsystem_unmap_buffer(audio->map_v_write);
+ iounmap(audio->map_v_write);
free_contiguous_memory_by_paddr(audio->phys);
audpp_adec_free(audio->dec_id);
kfree(audio);
diff --git a/arch/arm/mach-msm/qdsp5v2/audio_evrc.c b/arch/arm/mach-msm/qdsp5v2/audio_evrc.c
index 9b5694d..8818cbd 100644
--- a/arch/arm/mach-msm/qdsp5v2/audio_evrc.c
+++ b/arch/arm/mach-msm/qdsp5v2/audio_evrc.c
@@ -40,7 +40,6 @@
#include <mach/msm_adsp.h>
#include <mach/iommu.h>
#include <mach/iommu_domains.h>
-#include <mach/msm_subsystem_map.h>
#include <mach/qdsp5v2/audio_dev_ctl.h>
#include <mach/qdsp5v2/qdsp5audppmsg.h>
#include <mach/qdsp5v2/qdsp5audplaycmdi.h>
@@ -132,8 +131,8 @@
/* data allocated for various buffers */
char *data;
int32_t phys; /* physical address of write buffer */
- struct msm_mapped_buffer *map_v_read;
- struct msm_mapped_buffer *map_v_write;
+ void *map_v_read;
+ void *map_v_write;
int mfield; /* meta field embedded in data */
int rflush; /* Read flush */
@@ -982,12 +981,10 @@
rc = -ENOMEM;
break;
}
- audio->map_v_read = msm_subsystem_map_buffer(
+ audio->map_v_read = ioremap(
audio->read_phys,
config.buffer_size *
- config.buffer_count,
- MSM_SUBSYSTEM_MAP_KADDR
- , NULL, 0);
+ config.buffer_count);
if (IS_ERR(audio->map_v_read)) {
MM_ERR("failed to map read"
" phy address\n");
@@ -998,7 +995,7 @@
uint8_t index;
uint32_t offset = 0;
audio->read_data =
- audio->map_v_read->vaddr;
+ audio->map_v_read;
audio->buf_refresh = 0;
audio->pcm_buf_count =
config.buffer_count;
@@ -1311,10 +1308,10 @@
audio->event_abort = 1;
wake_up(&audio->event_wait);
audevrc_reset_event_queue(audio);
- msm_subsystem_unmap_buffer(audio->map_v_write);
+ iounmap(audio->map_v_write);
free_contiguous_memory_by_paddr(audio->phys);
if (audio->read_data) {
- msm_subsystem_unmap_buffer(audio->map_v_read);
+ iounmap(audio->map_v_read);
free_contiguous_memory_by_paddr(audio->read_phys);
}
mutex_unlock(&audio->lock);
@@ -1505,9 +1502,7 @@
kfree(audio);
goto done;
} else {
- audio->map_v_write = msm_subsystem_map_buffer(
- audio->phys, DMASZ,
- MSM_SUBSYSTEM_MAP_KADDR, NULL, 0);
+ audio->map_v_write = ioremap(audio->phys, DMASZ);
if (IS_ERR(audio->map_v_write)) {
MM_ERR("failed to map write physical address, freeing \
instance 0x%08x\n", (int)audio);
@@ -1517,7 +1512,7 @@
kfree(audio);
goto done;
}
- audio->data = audio->map_v_write->vaddr;
+ audio->data = audio->map_v_write;
MM_DBG("write buf: phy addr 0x%08x kernel addr 0x%08x\n",
audio->phys, (int)audio->data);
}
@@ -1604,7 +1599,7 @@
event_err:
msm_adsp_put(audio->audplay);
err:
- msm_subsystem_unmap_buffer(audio->map_v_write);
+ iounmap(audio->map_v_write);
free_contiguous_memory_by_paddr(audio->phys);
audpp_adec_free(audio->dec_id);
kfree(audio);
diff --git a/arch/arm/mach-msm/qdsp5v2/audio_evrc_in.c b/arch/arm/mach-msm/qdsp5v2/audio_evrc_in.c
index 50621c9..150e476 100644
--- a/arch/arm/mach-msm/qdsp5v2/audio_evrc_in.c
+++ b/arch/arm/mach-msm/qdsp5v2/audio_evrc_in.c
@@ -3,7 +3,7 @@
*
* Copyright (C) 2008 Google, Inc.
* Copyright (C) 2008 HTC Corporation
- * Copyright (c) 2009-2011, Code Aurora Forum. All rights reserved.
+ * Copyright (c) 2009-2012, Code Aurora Forum. All rights reserved.
*
* This software is licensed under the terms of the GNU General Public
* License version 2, as published by the Free Software Foundation, and
@@ -33,7 +33,6 @@
#include <mach/msm_adsp.h>
#include <mach/iommu.h>
#include <mach/iommu_domains.h>
-#include <mach/msm_subsystem_map.h>
#include <mach/socinfo.h>
#include <mach/qdsp5v2/qdsp5audreccmdi.h>
#include <mach/qdsp5v2/qdsp5audrecmsg.h>
@@ -131,8 +130,8 @@
/* data allocated for various buffers */
char *data;
dma_addr_t phys;
- struct msm_mapped_buffer *map_v_read;
- struct msm_mapped_buffer *map_v_write;
+ void *map_v_read;
+ void *map_v_write;
int opened;
int enabled;
int running;
@@ -1319,12 +1318,12 @@
audio->audrec = NULL;
audio->opened = 0;
if (audio->data) {
- msm_subsystem_unmap_buffer(audio->map_v_read);
+ iounmap(audio->map_v_read);
free_contiguous_memory_by_paddr(audio->phys);
audio->data = NULL;
}
if (audio->out_data) {
- msm_subsystem_unmap_buffer(audio->map_v_write);
+ iounmap(audio->map_v_write);
free_contiguous_memory_by_paddr(audio->out_phys);
audio->out_data = NULL;
}
@@ -1346,17 +1345,14 @@
}
audio->phys = allocate_contiguous_ebi_nomap(DMASZ, SZ_4K);
if (audio->phys) {
- audio->map_v_read = msm_subsystem_map_buffer(
- audio->phys, DMASZ,
- MSM_SUBSYSTEM_MAP_KADDR,
- NULL, 0);
+ audio->map_v_read = ioremap(audio->phys, DMASZ);
if (IS_ERR(audio->map_v_read)) {
MM_ERR("failed to map read physical address\n");
rc = -ENOMEM;
free_contiguous_memory_by_paddr(audio->phys);
goto done;
}
- audio->data = audio->map_v_read->vaddr;
+ audio->data = audio->map_v_read;
} else {
MM_ERR("could not allocate DMA buffers\n");
rc = -ENOMEM;
@@ -1425,17 +1421,14 @@
rc = -ENOMEM;
goto evt_error;
} else {
- audio->map_v_write = msm_subsystem_map_buffer(
- audio->out_phys, BUFFER_SIZE,
- MSM_SUBSYSTEM_MAP_KADDR,
- NULL, 0);
+ audio->map_v_write = ioremap(audio->out_phys, BUFFER_SIZE);
if (IS_ERR(audio->map_v_write)) {
MM_ERR("could map write buffers\n");
rc = -ENOMEM;
free_contiguous_memory_by_paddr(audio->out_phys);
goto evt_error;
}
- audio->out_data = audio->map_v_write->vaddr;
+ audio->out_data = audio->map_v_write;
MM_DBG("write buf: phy addr 0x%08x kernel addr 0x%08x\n",
audio->out_phys, (int)audio->out_data);
}
@@ -1461,7 +1454,7 @@
evrc_in_listener, (void *) audio);
if (rc) {
MM_ERR("failed to register device event listener\n");
- msm_subsystem_unmap_buffer(audio->map_v_write);
+ iounmap(audio->map_v_write);
free_contiguous_memory_by_paddr(audio->out_phys);
goto evt_error;
}
diff --git a/arch/arm/mach-msm/qdsp5v2/audio_mp3.c b/arch/arm/mach-msm/qdsp5v2/audio_mp3.c
index c639833..a4fc3e3 100644
--- a/arch/arm/mach-msm/qdsp5v2/audio_mp3.c
+++ b/arch/arm/mach-msm/qdsp5v2/audio_mp3.c
@@ -37,7 +37,6 @@
#include <mach/iommu.h>
#include <mach/iommu_domains.h>
-#include <mach/msm_subsystem_map.h>
#include <mach/qdsp5v2/audio_dev_ctl.h>
#include <mach/qdsp5v2/qdsp5audppmsg.h>
#include <mach/qdsp5v2/qdsp5audplaycmdi.h>
@@ -198,8 +197,8 @@
/* data allocated for various buffers */
char *data;
int32_t phys; /* physical address of write buffer */
- struct msm_mapped_buffer *map_v_read;
- struct msm_mapped_buffer *map_v_write;
+ void *map_v_read;
+ void *map_v_write;
uint32_t drv_status;
int mfield; /* meta field embedded in data */
@@ -1609,12 +1608,10 @@
rc = -ENOMEM;
break;
}
- audio->map_v_read = msm_subsystem_map_buffer(
+ audio->map_v_read = ioremap(
audio->read_phys,
config.buffer_size *
- config.buffer_count,
- MSM_SUBSYSTEM_MAP_KADDR
- , NULL, 0);
+ config.buffer_count);
if (IS_ERR(audio->map_v_read)) {
MM_ERR("failed to map read buffer"
" physical address\n");
@@ -1625,7 +1622,7 @@
uint8_t index;
uint32_t offset = 0;
audio->read_data =
- audio->map_v_read->vaddr;
+ audio->map_v_read;
audio->buf_refresh = 0;
audio->pcm_buf_count =
config.buffer_count;
@@ -2145,11 +2142,11 @@
wake_up(&audio->event_wait);
audmp3_reset_event_queue(audio);
if (audio->data) {
- msm_subsystem_unmap_buffer(audio->map_v_write);
+ iounmap(audio->map_v_write);
free_contiguous_memory_by_paddr(audio->phys);
}
if (audio->read_data) {
- msm_subsystem_unmap_buffer(audio->map_v_read);
+ iounmap(audio->map_v_read);
free_contiguous_memory_by_paddr(audio->read_phys);
}
mutex_unlock(&audio->lock);
@@ -2353,10 +2350,8 @@
audio->phys = allocate_contiguous_ebi_nomap(pmem_sz,
SZ_4K);
if (audio->phys) {
- audio->map_v_write = msm_subsystem_map_buffer(
- audio->phys, pmem_sz,
- MSM_SUBSYSTEM_MAP_KADDR
- , NULL, 0);
+ audio->map_v_write = ioremap(
+ audio->phys, pmem_sz);
if (IS_ERR(audio->map_v_write)) {
MM_ERR("failed to map write physical"
" address , freeing instance"
@@ -2368,7 +2363,7 @@
kfree(audio);
goto done;
}
- audio->data = audio->map_v_write->vaddr;
+ audio->data = audio->map_v_write;
MM_DBG("write buf: phy addr 0x%08x kernel addr\
0x%08x\n", audio->phys,\
(int)audio->data);
@@ -2485,7 +2480,7 @@
msm_adsp_put(audio->audplay);
err:
if (audio->data) {
- msm_subsystem_unmap_buffer(audio->map_v_write);
+ iounmap(audio->map_v_write);
free_contiguous_memory_by_paddr(audio->phys);
}
audpp_adec_free(audio->dec_id);
diff --git a/arch/arm/mach-msm/qdsp5v2/audio_out.c b/arch/arm/mach-msm/qdsp5v2/audio_out.c
index 9a93185..930de03 100644
--- a/arch/arm/mach-msm/qdsp5v2/audio_out.c
+++ b/arch/arm/mach-msm/qdsp5v2/audio_out.c
@@ -3,7 +3,7 @@
*
* Copyright (C) 2008 Google, Inc.
* Copyright (C) 2008 HTC Corporation
- * Copyright (c) 2009-2011, Code Aurora Forum. All rights reserved.
+ * Copyright (c) 2009-2012, Code Aurora Forum. All rights reserved.
*
* This software is licensed under the terms of the GNU General Public
* License version 2, as published by the Free Software Foundation, and
@@ -36,7 +36,6 @@
#include <mach/msm_adsp.h>
#include <mach/iommu.h>
#include <mach/iommu_domains.h>
-#include <mach/msm_subsystem_map.h>
#include <mach/qdsp5v2/qdsp5audppcmdi.h>
#include <mach/qdsp5v2/qdsp5audppmsg.h>
#include <mach/qdsp5v2/audio_dev_ctl.h>
@@ -86,7 +85,7 @@
/* data allocated for various buffers */
char *data;
dma_addr_t phys;
- struct msm_mapped_buffer *map_v_write;
+ void *map_v_write;
int teos; /* valid only if tunnel mode & no data left for decoder */
int opened;
int enabled;
@@ -704,16 +703,13 @@
{
the_audio.phys = allocate_contiguous_ebi_nomap(DMASZ, SZ_4K);
if (the_audio.phys) {
- the_audio.map_v_write = msm_subsystem_map_buffer(
- the_audio.phys, DMASZ,
- MSM_SUBSYSTEM_MAP_KADDR,
- NULL, 0);
+ the_audio.map_v_write = ioremap(the_audio.phys, DMASZ);
if (IS_ERR(the_audio.map_v_write)) {
MM_ERR("could not map physical buffers\n");
free_contiguous_memory_by_paddr(the_audio.phys);
return -ENOMEM;
}
- the_audio.data = the_audio.map_v_write->vaddr;
+ the_audio.data = the_audio.map_v_write;
} else {
MM_ERR("could not allocate physical buffers\n");
return -ENOMEM;
diff --git a/arch/arm/mach-msm/qdsp5v2/audio_pcm.c b/arch/arm/mach-msm/qdsp5v2/audio_pcm.c
index b22820b..613ee57 100644
--- a/arch/arm/mach-msm/qdsp5v2/audio_pcm.c
+++ b/arch/arm/mach-msm/qdsp5v2/audio_pcm.c
@@ -40,7 +40,6 @@
#include <mach/iommu.h>
#include <mach/iommu_domains.h>
-#include <mach/msm_subsystem_map.h>
#include <mach/qdsp5v2/qdsp5audppcmdi.h>
#include <mach/qdsp5v2/qdsp5audppmsg.h>
#include <mach/qdsp5v2/qdsp5audplaycmdi.h>
@@ -172,7 +171,7 @@
/* data allocated for various buffers */
char *data;
int32_t phys;
- struct msm_mapped_buffer *map_v_write;
+ void *map_v_write;
uint32_t drv_status;
int wflush; /* Write flush */
int opened;
@@ -1382,7 +1381,7 @@
wake_up(&audio->event_wait);
audpcm_reset_event_queue(audio);
if (audio->data) {
- msm_subsystem_unmap_buffer(audio->map_v_write);
+ iounmap(audio->map_v_write);
free_contiguous_memory_by_paddr(audio->phys);
}
mutex_unlock(&audio->lock);
@@ -1560,10 +1559,8 @@
audio->phys = allocate_contiguous_ebi_nomap(pmem_sz,
SZ_4K);
if (audio->phys) {
- audio->map_v_write = msm_subsystem_map_buffer(
- audio->phys, pmem_sz,
- MSM_SUBSYSTEM_MAP_KADDR
- , NULL, 0);
+ audio->map_v_write = ioremap(
+ audio->phys, pmem_sz);
if (IS_ERR(audio->map_v_write)) {
MM_ERR("could not map write phys\
address freeing instance \
@@ -1575,7 +1572,7 @@
kfree(audio);
goto done;
}
- audio->data = audio->map_v_write->vaddr;
+ audio->data = audio->map_v_write;
MM_DBG("write buf: phy addr 0x%08x \
kernel addr 0x%08x\n",
audio->phys, (int)audio->data);
@@ -1679,7 +1676,7 @@
msm_adsp_put(audio->audplay);
err:
if (audio->data) {
- msm_subsystem_unmap_buffer(audio->map_v_write);
+ iounmap(audio->map_v_write);
free_contiguous_memory_by_paddr(audio->phys);
}
audpp_adec_free(audio->dec_id);
diff --git a/arch/arm/mach-msm/qdsp5v2/audio_pcm_in.c b/arch/arm/mach-msm/qdsp5v2/audio_pcm_in.c
index a5a9bd2..ce67ebb 100644
--- a/arch/arm/mach-msm/qdsp5v2/audio_pcm_in.c
+++ b/arch/arm/mach-msm/qdsp5v2/audio_pcm_in.c
@@ -3,7 +3,7 @@
*
* Copyright (C) 2008 Google, Inc.
* Copyright (C) 2008 HTC Corporation
- * Copyright (c) 2009-2011, Code Aurora Forum. All rights reserved.
+ * Copyright (c) 2009-2012, Code Aurora Forum. All rights reserved.
*
* This software is licensed under the terms of the GNU General Public
* License version 2, as published by the Free Software Foundation, and
@@ -33,7 +33,6 @@
#include <mach/iommu.h>
#include <mach/iommu_domains.h>
-#include <mach/msm_subsystem_map.h>
#include <mach/msm_adsp.h>
#include <mach/socinfo.h>
@@ -113,7 +112,7 @@
/* data allocated for various buffers */
char *data;
dma_addr_t phys;
- struct msm_mapped_buffer *map_v_read;
+ void *map_v_read;
int opened;
int enabled;
@@ -843,7 +842,7 @@
audio->audrec = NULL;
audio->opened = 0;
if (audio->data) {
- msm_subsystem_unmap_buffer(audio->map_v_read);
+ iounmap(audio->map_v_read);
free_contiguous_memory_by_paddr(audio->phys);
audio->data = NULL;
}
@@ -864,16 +863,14 @@
}
audio->phys = allocate_contiguous_ebi_nomap(DMASZ, SZ_4K);
if (audio->phys) {
- audio->map_v_read = msm_subsystem_map_buffer(
- audio->phys, DMASZ,
- MSM_SUBSYSTEM_MAP_KADDR, NULL, 0);
+ audio->map_v_read = ioremap(audio->phys, DMASZ);
if (IS_ERR(audio->map_v_read)) {
MM_ERR("could not map read phys buffers\n");
rc = -ENOMEM;
free_contiguous_memory_by_paddr(audio->phys);
goto done;
}
- audio->data = audio->map_v_read->vaddr;
+ audio->data = audio->map_v_read;
} else {
MM_ERR("could not allocate read buffers\n");
rc = -ENOMEM;
diff --git a/arch/arm/mach-msm/qdsp5v2/audio_qcelp.c b/arch/arm/mach-msm/qdsp5v2/audio_qcelp.c
index ce5d421..c4851d9 100644
--- a/arch/arm/mach-msm/qdsp5v2/audio_qcelp.c
+++ b/arch/arm/mach-msm/qdsp5v2/audio_qcelp.c
@@ -41,7 +41,6 @@
#include <mach/msm_adsp.h>
#include <mach/iommu.h>
#include <mach/iommu_domains.h>
-#include <mach/msm_subsystem_map.h>
#include <mach/qdsp5v2/qdsp5audppmsg.h>
#include <mach/qdsp5v2/qdsp5audplaycmdi.h>
#include <mach/qdsp5v2/qdsp5audplaymsg.h>
@@ -128,8 +127,8 @@
/* data allocated for various buffers */
char *data;
int32_t phys; /* physical address of write buffer */
- struct msm_mapped_buffer *map_v_read;
- struct msm_mapped_buffer *map_v_write;
+ void *map_v_read;
+ void *map_v_write;
int mfield; /* meta field embedded in data */
int rflush; /* Read flush */
@@ -984,12 +983,10 @@
rc = -ENOMEM;
break;
}
- audio->map_v_read = msm_subsystem_map_buffer(
+ audio->map_v_read = ioremap(
audio->read_phys,
config.buffer_size *
- config.buffer_count,
- MSM_SUBSYSTEM_MAP_KADDR
- , NULL, 0);
+ config.buffer_count);
if (IS_ERR(audio->map_v_read)) {
MM_ERR("failed to map read buf\n");
rc = -ENOMEM;
@@ -999,7 +996,7 @@
uint8_t index;
uint32_t offset = 0;
audio->read_data =
- audio->map_v_read->vaddr;
+ audio->map_v_read;
audio->buf_refresh = 0;
audio->pcm_buf_count =
config.buffer_count;
@@ -1313,10 +1310,10 @@
audio->event_abort = 1;
wake_up(&audio->event_wait);
audqcelp_reset_event_queue(audio);
- msm_subsystem_unmap_buffer(audio->map_v_write);
+ iounmap(audio->map_v_write);
free_contiguous_memory_by_paddr(audio->phys);
if (audio->read_data) {
- msm_subsystem_unmap_buffer(audio->map_v_read);
+ iounmap(audio->map_v_read);
free_contiguous_memory_by_paddr(audio->read_phys);
}
mutex_unlock(&audio->lock);
@@ -1505,9 +1502,7 @@
kfree(audio);
goto done;
} else {
- audio->map_v_write = msm_subsystem_map_buffer(
- audio->phys, DMASZ,
- MSM_SUBSYSTEM_MAP_KADDR, NULL, 0);
+ audio->map_v_write = ioremap(audio->phys, DMASZ);
if (IS_ERR(audio->map_v_write)) {
MM_ERR("could not map write phys address, freeing \
instance 0x%08x\n", (int)audio);
@@ -1517,7 +1512,7 @@
kfree(audio);
goto done;
}
- audio->data = audio->map_v_write->vaddr;
+ audio->data = audio->map_v_write;
MM_DBG("write buf: phy addr 0x%08x kernel addr 0x%08x\n",
audio->phys, (int)audio->data);
}
@@ -1604,7 +1599,7 @@
event_err:
msm_adsp_put(audio->audplay);
err:
- msm_subsystem_unmap_buffer(audio->map_v_write);
+ iounmap(audio->map_v_write);
free_contiguous_memory_by_paddr(audio->phys);
audpp_adec_free(audio->dec_id);
kfree(audio);
diff --git a/arch/arm/mach-msm/qdsp5v2/audio_qcelp_in.c b/arch/arm/mach-msm/qdsp5v2/audio_qcelp_in.c
index d34499d..7041bde 100644
--- a/arch/arm/mach-msm/qdsp5v2/audio_qcelp_in.c
+++ b/arch/arm/mach-msm/qdsp5v2/audio_qcelp_in.c
@@ -3,7 +3,7 @@
*
* Copyright (C) 2008 Google, Inc.
* Copyright (C) 2008 HTC Corporation
- * Copyright (c) 2009-2011, Code Aurora Forum. All rights reserved.
+ * Copyright (c) 2009-2012, Code Aurora Forum. All rights reserved.
*
* This software is licensed under the terms of the GNU General Public
* License version 2, as published by the Free Software Foundation, and
@@ -33,7 +33,6 @@
#include <mach/msm_adsp.h>
#include <mach/iommu.h>
#include <mach/iommu_domains.h>
-#include <mach/msm_subsystem_map.h>
#include <mach/socinfo.h>
#include <mach/qdsp5v2/qdsp5audreccmdi.h>
#include <mach/qdsp5v2/qdsp5audrecmsg.h>
@@ -133,8 +132,8 @@
/* data allocated for various buffers */
char *data;
dma_addr_t phys;
- struct msm_mapped_buffer *map_v_read;
- struct msm_mapped_buffer *map_v_write;
+ void *map_v_read;
+ void *map_v_write;
int opened;
int enabled;
@@ -1325,12 +1324,12 @@
audio->audrec = NULL;
audio->opened = 0;
if (audio->data) {
- msm_subsystem_unmap_buffer(audio->map_v_read);
+ iounmap(audio->map_v_read);
free_contiguous_memory_by_paddr(audio->phys);
audio->data = NULL;
}
if (audio->out_data) {
- msm_subsystem_unmap_buffer(audio->map_v_write);
+ iounmap(audio->map_v_write);
free_contiguous_memory_by_paddr(audio->out_phys);
audio->out_data = NULL;
}
@@ -1352,16 +1351,14 @@
}
audio->phys = allocate_contiguous_ebi_nomap(DMASZ, SZ_4K);
if (audio->phys) {
- audio->map_v_read = msm_subsystem_map_buffer(
- audio->phys, DMASZ,
- MSM_SUBSYSTEM_MAP_KADDR, NULL, 0);
+ audio->map_v_read = ioremap(audio->phys, DMASZ);
if (IS_ERR(audio->map_v_read)) {
MM_ERR("could not map DMA buffers\n");
rc = -ENOMEM;
free_contiguous_memory_by_paddr(audio->phys);
goto done;
}
- audio->data = audio->map_v_read->vaddr;
+ audio->data = audio->map_v_read;
} else {
MM_ERR("could not allocate DMA buffers\n");
rc = -ENOMEM;
@@ -1431,16 +1428,14 @@
rc = -ENOMEM;
goto evt_error;
} else {
- audio->map_v_write = msm_subsystem_map_buffer(
- audio->out_phys, BUFFER_SIZE,
- MSM_SUBSYSTEM_MAP_KADDR, NULL, 0);
+ audio->map_v_write = ioremap(audio->out_phys, BUFFER_SIZE);
if (IS_ERR(audio->map_v_write)) {
MM_ERR("could not map write buffers\n");
rc = -ENOMEM;
free_contiguous_memory_by_paddr(audio->out_phys);
goto evt_error;
}
- audio->out_data = audio->map_v_write->vaddr;
+ audio->out_data = audio->map_v_write;
MM_DBG("write buf: phy addr 0x%08x kernel addr 0x%08x\n",
audio->out_phys, (int)audio->out_data);
}
@@ -1466,7 +1461,7 @@
qcelp_in_listener, (void *) audio);
if (rc) {
MM_ERR("failed to register device event listener\n");
- msm_subsystem_unmap_buffer(audio->map_v_write);
+ iounmap(audio->map_v_write);
free_contiguous_memory_by_paddr(audio->out_phys);
goto evt_error;
}
diff --git a/arch/arm/mach-msm/qdsp5v2/audio_wma.c b/arch/arm/mach-msm/qdsp5v2/audio_wma.c
index f29b078..79439e1 100644
--- a/arch/arm/mach-msm/qdsp5v2/audio_wma.c
+++ b/arch/arm/mach-msm/qdsp5v2/audio_wma.c
@@ -45,7 +45,6 @@
#include <mach/msm_adsp.h>
#include <mach/iommu.h>
#include <mach/iommu_domains.h>
-#include <mach/msm_subsystem_map.h>
#include <mach/qdsp5v2/qdsp5audppmsg.h>
#include <mach/qdsp5v2/qdsp5audplaycmdi.h>
#include <mach/qdsp5v2/qdsp5audplaymsg.h>
@@ -141,8 +140,8 @@
/* data allocated for various buffers */
char *data;
int32_t phys; /* physical address of write buffer */
- struct msm_mapped_buffer *map_v_read;
- struct msm_mapped_buffer *map_v_write;
+ void *map_v_read;
+ void *map_v_write;
int mfield; /* meta field embedded in data */
int rflush; /* Read flush */
@@ -1062,12 +1061,10 @@
rc = -ENOMEM;
break;
}
- audio->map_v_read = msm_subsystem_map_buffer(
+ audio->map_v_read = ioremap(
audio->read_phys,
config.buffer_size *
- config.buffer_count,
- MSM_SUBSYSTEM_MAP_KADDR
- , NULL, 0);
+ config.buffer_count);
if (IS_ERR(audio->map_v_read)) {
MM_ERR("read buf alloc fail\n");
rc = -ENOMEM;
@@ -1077,7 +1074,7 @@
uint8_t index;
uint32_t offset = 0;
audio->read_data =
- audio->map_v_read->vaddr;
+ audio->map_v_read;
audio->buf_refresh = 0;
audio->pcm_buf_count =
config.buffer_count;
@@ -1458,10 +1455,10 @@
audio->event_abort = 1;
wake_up(&audio->event_wait);
audwma_reset_event_queue(audio);
- msm_subsystem_unmap_buffer(audio->map_v_write);
+ iounmap(audio->map_v_write);
free_contiguous_memory_by_paddr(audio->phys);
if (audio->read_data) {
- msm_subsystem_unmap_buffer(audio->map_v_read);
+ iounmap(audio->map_v_read);
free_contiguous_memory_by_paddr(audio->read_phys);
}
mutex_unlock(&audio->lock);
@@ -1652,10 +1649,7 @@
MM_DBG("pmemsz = %d\n", pmem_sz);
audio->phys = allocate_contiguous_ebi_nomap(pmem_sz, SZ_4K);
if (audio->phys) {
- audio->map_v_write = msm_subsystem_map_buffer(
- audio->phys, pmem_sz,
- MSM_SUBSYSTEM_MAP_KADDR,
- NULL, 0);
+ audio->map_v_write = ioremap(audio->phys, pmem_sz);
if (IS_ERR(audio->map_v_write)) {
MM_ERR("could not allocate write buffers, \
freeing instance 0x%08x\n",
@@ -1666,7 +1660,7 @@
kfree(audio);
goto done;
}
- audio->data = audio->map_v_write->vaddr;
+ audio->data = audio->map_v_write;
MM_DBG("write buf: phy addr 0x%08x kernel addr \
0x%08x\n", audio->phys, (int)audio->data);
break;
@@ -1772,7 +1766,7 @@
event_err:
msm_adsp_put(audio->audplay);
err:
- msm_subsystem_unmap_buffer(audio->map_v_write);
+ iounmap(audio->map_v_write);
free_contiguous_memory_by_paddr(audio->phys);
audpp_adec_free(audio->dec_id);
kfree(audio);
diff --git a/arch/arm/mach-msm/qdsp5v2/audio_wmapro.c b/arch/arm/mach-msm/qdsp5v2/audio_wmapro.c
index cf25359..6672ca0 100644
--- a/arch/arm/mach-msm/qdsp5v2/audio_wmapro.c
+++ b/arch/arm/mach-msm/qdsp5v2/audio_wmapro.c
@@ -44,7 +44,6 @@
#include <mach/msm_adsp.h>
#include <mach/iommu.h>
#include <mach/iommu_domains.h>
-#include <mach/msm_subsystem_map.h>
#include <mach/qdsp5v2/qdsp5audppmsg.h>
#include <mach/qdsp5v2/qdsp5audplaycmdi.h>
#include <mach/qdsp5v2/qdsp5audplaymsg.h>
@@ -141,8 +140,8 @@
/* data allocated for various buffers */
char *data;
int32_t phys; /* physical address of write buffer */
- struct msm_mapped_buffer *map_v_read;
- struct msm_mapped_buffer *map_v_write;
+ void *map_v_read;
+ void *map_v_write;
int mfield; /* meta field embedded in data */
int rflush; /* Read flush */
@@ -1074,12 +1073,10 @@
rc = -ENOMEM;
break;
}
- audio->map_v_read = msm_subsystem_map_buffer(
+ audio->map_v_read = ioremap(
audio->read_phys,
config.buffer_size *
- config.buffer_count,
- MSM_SUBSYSTEM_MAP_KADDR
- , NULL, 0);
+ config.buffer_count);
if (IS_ERR(audio->map_v_read)) {
MM_ERR("read buf map fail\n");
rc = -ENOMEM;
@@ -1089,7 +1086,7 @@
uint8_t index;
uint32_t offset = 0;
audio->read_data =
- audio->map_v_read->vaddr;
+ audio->map_v_read;
audio->pcm_feedback = 1;
audio->buf_refresh = 0;
audio->pcm_buf_count =
@@ -1471,10 +1468,10 @@
audio->event_abort = 1;
wake_up(&audio->event_wait);
audwmapro_reset_event_queue(audio);
- msm_subsystem_unmap_buffer(audio->map_v_write);
+ iounmap(audio->map_v_write);
free_contiguous_memory_by_paddr(audio->phys);
if (audio->read_data) {
- msm_subsystem_unmap_buffer(audio->map_v_read);
+ iounmap(audio->map_v_read);
free_contiguous_memory_by_paddr(audio->read_phys);
}
mutex_unlock(&audio->lock);
@@ -1665,10 +1662,7 @@
MM_DBG("pmemsz = %d\n", pmem_sz);
audio->phys = allocate_contiguous_ebi_nomap(pmem_sz, SZ_4K);
if (audio->phys) {
- audio->map_v_write = msm_subsystem_map_buffer(
- audio->phys, pmem_sz,
- MSM_SUBSYSTEM_MAP_KADDR,
- NULL, 0);
+ audio->map_v_write = ioremap(audio->phys, pmem_sz);
if (IS_ERR(audio->map_v_write)) {
MM_ERR("could not map write buffers, \
freeing instance 0x%08x\n",
@@ -1679,7 +1673,7 @@
kfree(audio);
goto done;
}
- audio->data = audio->map_v_write->vaddr;
+ audio->data = audio->map_v_write;
MM_DBG("write buf: phy addr 0x%08x kernel addr \
0x%08x\n", audio->phys, (int)audio->data);
break;
@@ -1790,7 +1784,7 @@
event_err:
msm_adsp_put(audio->audplay);
err:
- msm_subsystem_unmap_buffer(audio->map_v_write);
+ iounmap(audio->map_v_write);
free_contiguous_memory_by_paddr(audio->phys);
audpp_adec_free(audio->dec_id);
kfree(audio);
diff --git a/arch/arm/mach-msm/qdsp6v2/snddev_ecodec.c b/arch/arm/mach-msm/qdsp6v2/snddev_ecodec.c
index eb394a3..f75af16 100644
--- a/arch/arm/mach-msm/qdsp6v2/snddev_ecodec.c
+++ b/arch/arm/mach-msm/qdsp6v2/snddev_ecodec.c
@@ -1,4 +1,4 @@
-/* Copyright (c) 2010-2011, Code Aurora Forum. All rights reserved.
+/* Copyright (c) 2010-2012, Code Aurora Forum. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -344,7 +344,7 @@
mutex_init(&drv->dev_lock);
drv->ref_cnt = 0;
- drv->ecodec_clk = clk_get(NULL, "pcm_clk");
+ drv->ecodec_clk = clk_get_sys(NULL, "pcm_clk");
if (IS_ERR(drv->ecodec_clk)) {
pr_err("%s: could not get pcm_clk\n", __func__);
return PTR_ERR(drv->ecodec_clk);
diff --git a/arch/arm/mach-msm/qdsp6v2/snddev_icodec.c b/arch/arm/mach-msm/qdsp6v2/snddev_icodec.c
index 216d982..ea935cc 100644
--- a/arch/arm/mach-msm/qdsp6v2/snddev_icodec.c
+++ b/arch/arm/mach-msm/qdsp6v2/snddev_icodec.c
@@ -1,4 +1,4 @@
-/* Copyright (c) 2010-2011, Code Aurora Forum. All rights reserved.
+/* Copyright (c) 2010-2012, Code Aurora Forum. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -308,7 +308,7 @@
}
msm_snddev_rx_mclk_request();
- drv->rx_osrclk = clk_get(0, "i2s_spkr_osr_clk");
+ drv->rx_osrclk = clk_get_sys(NULL, "i2s_spkr_osr_clk");
if (IS_ERR(drv->rx_osrclk))
pr_err("%s master clock Error\n", __func__);
@@ -320,7 +320,7 @@
}
clk_enable(drv->rx_osrclk);
- drv->rx_bitclk = clk_get(0, "i2s_spkr_bit_clk");
+ drv->rx_bitclk = clk_get_sys(NULL, "i2s_spkr_bit_clk");
if (IS_ERR(drv->rx_bitclk))
pr_err("%s clock Error\n", __func__);
@@ -437,7 +437,7 @@
msm_snddev_tx_mclk_request();
- drv->tx_osrclk = clk_get(0, "i2s_mic_osr_clk");
+ drv->tx_osrclk = clk_get_sys(NULL, "i2s_mic_osr_clk");
if (IS_ERR(drv->tx_osrclk))
pr_err("%s master clock Error\n", __func__);
@@ -449,7 +449,7 @@
}
clk_enable(drv->tx_osrclk);
- drv->tx_bitclk = clk_get(0, "i2s_mic_bit_clk");
+ drv->tx_bitclk = clk_get_sys(NULL, "i2s_mic_bit_clk");
if (IS_ERR(drv->tx_bitclk))
pr_err("%s clock Error\n", __func__);
diff --git a/arch/arm/mach-msm/qdsp6v2/snddev_mi2s.c b/arch/arm/mach-msm/qdsp6v2/snddev_mi2s.c
index a99b600..75a7411 100644
--- a/arch/arm/mach-msm/qdsp6v2/snddev_mi2s.c
+++ b/arch/arm/mach-msm/qdsp6v2/snddev_mi2s.c
@@ -1,4 +1,4 @@
-/* Copyright (c) 2010-2011, Code Aurora Forum. All rights reserved.
+/* Copyright (c) 2010-2012, Code Aurora Forum. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -184,7 +184,7 @@
}
/* set up osr clk */
- drv->tx_osrclk = clk_get(0, "mi2s_osr_clk");
+ drv->tx_osrclk = clk_get_sys(NULL, "mi2s_osr_clk");
if (IS_ERR(drv->tx_osrclk))
pr_err("%s master clock Error\n", __func__);
@@ -197,7 +197,7 @@
clk_enable(drv->tx_osrclk);
/* set up bit clk */
- drv->tx_bitclk = clk_get(0, "mi2s_bit_clk");
+ drv->tx_bitclk = clk_get_sys(NULL, "mi2s_bit_clk");
if (IS_ERR(drv->tx_bitclk))
pr_err("%s clock Error\n", __func__);
diff --git a/arch/arm/mach-msm/restart.c b/arch/arm/mach-msm/restart.c
index 5382102..e45e2c4 100644
--- a/arch/arm/mach-msm/restart.c
+++ b/arch/arm/mach-msm/restart.c
@@ -232,21 +232,10 @@
printk(KERN_ERR "Restarting has failed\n");
}
-static int __init msm_restart_init(void)
+static int __init msm_pmic_restart_init(void)
{
int rc;
-#ifdef CONFIG_MSM_DLOAD_MODE
- atomic_notifier_chain_register(&panic_notifier_list, &panic_blk);
- dload_mode_addr = MSM_IMEM_BASE + DLOAD_MODE_ADDR;
-
- /* Reset detection is switched on below.*/
- set_dload_mode(download_mode);
-#endif
- msm_tmr0_base = msm_timer_get_timer0_base();
- restart_reason = MSM_IMEM_BASE + RESTART_REASON_ADDR;
- pm_power_off = msm_power_off;
-
if (pmic_reset_irq != 0) {
rc = request_any_context_irq(pmic_reset_irq,
resout_irq_handler, IRQF_TRIGGER_HIGH,
@@ -260,4 +249,19 @@
return 0;
}
-late_initcall(msm_restart_init);
+late_initcall(msm_pmic_restart_init);
+
+static int __init msm_restart_init(void)
+{
+#ifdef CONFIG_MSM_DLOAD_MODE
+ atomic_notifier_chain_register(&panic_notifier_list, &panic_blk);
+ dload_mode_addr = MSM_IMEM_BASE + DLOAD_MODE_ADDR;
+ set_dload_mode(download_mode);
+#endif
+ msm_tmr0_base = msm_timer_get_timer0_base();
+ restart_reason = MSM_IMEM_BASE + RESTART_REASON_ADDR;
+ pm_power_off = msm_power_off;
+
+ return 0;
+}
+early_initcall(msm_restart_init);
diff --git a/arch/arm/mach-msm/smd.c b/arch/arm/mach-msm/smd.c
index dac0a37..ddc3a8d 100644
--- a/arch/arm/mach-msm/smd.c
+++ b/arch/arm/mach-msm/smd.c
@@ -3483,8 +3483,14 @@
},
};
-static int __init msm_smd_init(void)
+int __init msm_smd_init(void)
{
+ static bool registered;
+
+ if (registered)
+ return 0;
+
+ registered = true;
return platform_driver_register(&msm_smd_driver);
}
diff --git a/arch/arm/mach-msm/socinfo.c b/arch/arm/mach-msm/socinfo.c
index 00748e4..d811f71 100644
--- a/arch/arm/mach-msm/socinfo.c
+++ b/arch/arm/mach-msm/socinfo.c
@@ -247,6 +247,9 @@
[128] = MSM_CPU_8625,
[129] = MSM_CPU_8625,
+ /* 9625 IDs */
+ [130] = MSM_CPU_9625,
+
/* 7x25AB IDs */
[131] = MSM_CPU_7X25AB,
[132] = MSM_CPU_7X25AB,
@@ -621,6 +624,10 @@
dummy_socinfo.id = 126;
strlcpy(dummy_socinfo.build_id, "copper - ",
sizeof(dummy_socinfo.build_id));
+ } else if (early_machine_is_msm9625()) {
+ dummy_socinfo.id = 130;
+ strlcpy(dummy_socinfo.build_id, "msm9625 - ",
+ sizeof(dummy_socinfo.build_id));
} else if (machine_is_msm8625_rumi3())
dummy_socinfo.id = 127;
strlcat(dummy_socinfo.build_id, "Dummy socinfo",
diff --git a/drivers/char/msm_rotator.c b/drivers/char/msm_rotator.c
index b457a00..81a9fa7 100644
--- a/drivers/char/msm_rotator.c
+++ b/drivers/char/msm_rotator.c
@@ -393,6 +393,8 @@
case MDP_RGB_565:
case MDP_BGR_565:
case MDP_YCRYCB_H2V1:
+ case MDP_YCBCR_H1V1:
+ case MDP_YCRCB_H1V1:
p->num_planes = 1;
p->plane_size[0] = w * h * get_bpp(format);
break;
diff --git a/drivers/gpu/ion/msm/msm_ion.c b/drivers/gpu/ion/msm/msm_ion.c
index 15c0ec5..c8bfce3 100644
--- a/drivers/gpu/ion/msm/msm_ion.c
+++ b/drivers/gpu/ion/msm/msm_ion.c
@@ -213,6 +213,45 @@
}
}
+static int is_heap_overlapping(const struct ion_platform_heap *heap1,
+ const struct ion_platform_heap *heap2)
+{
+ unsigned long heap1_base = heap1->base;
+ unsigned long heap2_base = heap2->base;
+ unsigned long heap1_end = heap1->base + heap1->size - 1;
+ unsigned long heap2_end = heap2->base + heap2->size - 1;
+
+ if (heap1_base == heap2_base)
+ return 1;
+ if (heap1_base < heap2_base && heap1_end >= heap2_base)
+ return 1;
+ if (heap2_base < heap1_base && heap2_end >= heap1_base)
+ return 1;
+ return 0;
+}
+
+static void check_for_heap_overlap(const struct ion_platform_heap heap_list[],
+ unsigned long nheaps)
+{
+ unsigned long i;
+ unsigned long j;
+
+ for (i = 0; i < nheaps; ++i) {
+ const struct ion_platform_heap *heap1 = &heap_list[i];
+ if (!heap1->base)
+ continue;
+ for (j = i + 1; j < nheaps; ++j) {
+ const struct ion_platform_heap *heap2 = &heap_list[j];
+ if (!heap2->base)
+ continue;
+ if (is_heap_overlapping(heap1, heap2)) {
+ panic("Memory in heap %s overlaps with heap %s\n",
+ heap1->name, heap2->name);
+ }
+ }
+ }
+}
+
static int msm_ion_probe(struct platform_device *pdev)
{
struct ion_platform_data *pdata = pdev->dev.platform_data;
@@ -258,6 +297,8 @@
ion_device_add_heap(idev, heaps[i]);
}
+
+ check_for_heap_overlap(pdata->heaps, num_heaps);
platform_set_drvdata(pdev, idev);
return 0;
diff --git a/drivers/gpu/msm/adreno.c b/drivers/gpu/msm/adreno.c
index 9479302..bfbf411 100644
--- a/drivers/gpu/msm/adreno.c
+++ b/drivers/gpu/msm/adreno.c
@@ -69,10 +69,9 @@
static struct adreno_device device_3d0 = {
.dev = {
+ KGSL_DEVICE_COMMON_INIT(device_3d0.dev),
.name = DEVICE_3D0_NAME,
.id = KGSL_DEVICE_3D0,
- .ver_major = DRIVER_VERSION_MAJOR,
- .ver_minor = DRIVER_VERSION_MINOR,
.mh = {
.mharb = ADRENO_CFG_MHARB,
/* Remove 1k boundary check in z470 to avoid a GPU
@@ -92,9 +91,6 @@
.pwrctrl = {
.irq_name = KGSL_3D0_IRQ,
},
- .mutex = __MUTEX_INITIALIZER(device_3d0.dev.mutex),
- .state = KGSL_STATE_INIT,
- .active_cnt = 0,
.iomemname = KGSL_3D0_REG_MEMORY,
.ftbl = &adreno_functable,
#ifdef CONFIG_HAS_EARLYSUSPEND
@@ -482,8 +478,6 @@
adreno_dev = ADRENO_DEVICE(device);
device->parentdev = &pdev->dev;
- init_completion(&device->recovery_gate);
-
status = adreno_ringbuffer_init(device);
if (status != 0)
goto error;
diff --git a/drivers/gpu/msm/kgsl.c b/drivers/gpu/msm/kgsl.c
index 2ce2f2b..adf2772 100644
--- a/drivers/gpu/msm/kgsl.c
+++ b/drivers/gpu/msm/kgsl.c
@@ -25,6 +25,8 @@
#include <linux/ashmem.h>
#include <linux/major.h>
#include <linux/ion.h>
+#include <linux/io.h>
+#include <mach/socinfo.h>
#include "kgsl.h"
#include "kgsl_debugfs.h"
@@ -385,7 +387,7 @@
idr_remove(&dev_priv->device->context_idr, id);
}
-static void kgsl_timestamp_expired(struct work_struct *work)
+void kgsl_timestamp_expired(struct work_struct *work)
{
struct kgsl_device *device = container_of(work, struct kgsl_device,
ts_expired_ws);
@@ -415,6 +417,7 @@
mutex_unlock(&device->mutex);
}
+EXPORT_SYMBOL(kgsl_timestamp_expired);
static void kgsl_check_idle_locked(struct kgsl_device *device)
{
@@ -2334,7 +2337,7 @@
};
EXPORT_SYMBOL(kgsl_driver);
-void kgsl_unregister_device(struct kgsl_device *device)
+static void _unregister_device(struct kgsl_device *device)
{
int minor;
@@ -2343,43 +2346,15 @@
if (device == kgsl_driver.devp[minor])
break;
}
-
- mutex_unlock(&kgsl_driver.devlock);
-
- if (minor == KGSL_DEVICE_MAX)
- return;
-
- kgsl_device_snapshot_close(device);
-
- kgsl_cffdump_close(device->id);
- kgsl_pwrctrl_uninit_sysfs(device);
-
- wake_lock_destroy(&device->idle_wakelock);
- pm_qos_remove_request(&device->pm_qos_req_dma);
-
- idr_destroy(&device->context_idr);
-
- if (device->memstore.hostptr)
- kgsl_sharedmem_free(&device->memstore);
-
- kgsl_mmu_close(device);
-
- if (device->work_queue) {
- destroy_workqueue(device->work_queue);
- device->work_queue = NULL;
+ if (minor != KGSL_DEVICE_MAX) {
+ device_destroy(kgsl_driver.class,
+ MKDEV(MAJOR(kgsl_driver.major), minor));
+ kgsl_driver.devp[minor] = NULL;
}
-
- device_destroy(kgsl_driver.class,
- MKDEV(MAJOR(kgsl_driver.major), minor));
-
- mutex_lock(&kgsl_driver.devlock);
- kgsl_driver.devp[minor] = NULL;
mutex_unlock(&kgsl_driver.devlock);
}
-EXPORT_SYMBOL(kgsl_unregister_device);
-int
-kgsl_register_device(struct kgsl_device *device)
+static int _register_device(struct kgsl_device *device)
{
int minor, ret;
dev_t dev;
@@ -2393,7 +2368,6 @@
break;
}
}
-
mutex_unlock(&kgsl_driver.devlock);
if (minor == KGSL_DEVICE_MAX) {
@@ -2409,75 +2383,17 @@
device->name);
if (IS_ERR(device->dev)) {
+ mutex_lock(&kgsl_driver.devlock);
+ kgsl_driver.devp[minor] = NULL;
+ mutex_unlock(&kgsl_driver.devlock);
ret = PTR_ERR(device->dev);
KGSL_CORE_ERR("device_create(%s): %d\n", device->name, ret);
- goto err_devlist;
+ return ret;
}
dev_set_drvdata(device->parentdev, device);
-
- /* Generic device initialization */
- init_waitqueue_head(&device->wait_queue);
-
- kgsl_cffdump_open(device->id);
-
- init_completion(&device->hwaccess_gate);
- init_completion(&device->suspend_gate);
-
- ATOMIC_INIT_NOTIFIER_HEAD(&device->ts_notifier_list);
-
- setup_timer(&device->idle_timer, kgsl_timer, (unsigned long) device);
- ret = kgsl_create_device_workqueue(device);
- if (ret)
- goto err_devlist;
-
- INIT_WORK(&device->idle_check_ws, kgsl_idle_check);
- INIT_WORK(&device->ts_expired_ws, kgsl_timestamp_expired);
-
- INIT_LIST_HEAD(&device->events);
-
- device->last_expired_ctxt_id = KGSL_CONTEXT_INVALID;
-
- ret = kgsl_mmu_init(device);
- if (ret != 0)
- goto err_dest_work_q;
-
- ret = kgsl_allocate_contiguous(&device->memstore, KGSL_MEMSTORE_SIZE);
- if (ret != 0)
- goto err_close_mmu;
-
- wake_lock_init(&device->idle_wakelock, WAKE_LOCK_IDLE, device->name);
- pm_qos_add_request(&device->pm_qos_req_dma, PM_QOS_CPU_DMA_LATENCY,
- PM_QOS_DEFAULT_VALUE);
-
- idr_init(&device->context_idr);
-
- /* Initalize the snapshot engine */
- kgsl_device_snapshot_init(device);
-
- /* sysfs and debugfs initalization - failure here is non fatal */
-
- /* Initialize logging */
- kgsl_device_debugfs_init(device);
-
- /* Initialize common sysfs entries */
- kgsl_pwrctrl_init_sysfs(device);
-
return 0;
-
-err_close_mmu:
- kgsl_mmu_close(device);
-err_dest_work_q:
- destroy_workqueue(device->work_queue);
- device->work_queue = NULL;
-err_devlist:
- mutex_lock(&kgsl_driver.devlock);
- kgsl_driver.devp[minor] = NULL;
- mutex_unlock(&kgsl_driver.devlock);
-
- return ret;
}
-EXPORT_SYMBOL(kgsl_register_device);
int kgsl_device_platform_probe(struct kgsl_device *device)
{
@@ -2487,7 +2403,12 @@
struct platform_device *pdev =
container_of(device->parentdev, struct platform_device, dev);
- pm_runtime_enable(device->parentdev);
+ status = _register_device(device);
+ if (status)
+ return status;
+
+ /* Initialize logging first, so that failures below actually print. */
+ kgsl_device_debugfs_init(device);
status = kgsl_pwrctrl_init(device);
if (status)
@@ -2512,29 +2433,40 @@
device->reg_phys = res->start;
device->reg_len = resource_size(res);
- if (!request_mem_region(device->reg_phys, device->reg_len,
- device->name)) {
+ if (!devm_request_mem_region(device->dev, device->reg_phys,
+ device->reg_len, device->name)) {
KGSL_DRV_ERR(device, "request_mem_region failed\n");
status = -ENODEV;
goto error_pwrctrl_close;
}
- device->reg_virt = ioremap(device->reg_phys, device->reg_len);
+ device->reg_virt = devm_ioremap(device->dev, device->reg_phys,
+ device->reg_len);
if (device->reg_virt == NULL) {
KGSL_DRV_ERR(device, "ioremap failed\n");
status = -ENODEV;
- goto error_release_mem;
+ goto error_pwrctrl_close;
+ }
+ /*acquire interrupt */
+ device->pwrctrl.interrupt_num =
+ platform_get_irq_byname(pdev, device->pwrctrl.irq_name);
+
+ if (device->pwrctrl.interrupt_num <= 0) {
+ KGSL_DRV_ERR(device, "platform_get_irq_byname failed: %d\n",
+ device->pwrctrl.interrupt_num);
+ status = -EINVAL;
+ goto error_pwrctrl_close;
}
- status = request_irq(device->pwrctrl.interrupt_num, kgsl_irq_handler,
- IRQF_TRIGGER_HIGH, device->name, device);
+ status = devm_request_irq(device->dev, device->pwrctrl.interrupt_num,
+ kgsl_irq_handler, IRQF_TRIGGER_HIGH,
+ device->name, device);
if (status) {
KGSL_DRV_ERR(device, "request_irq(%d) failed: %d\n",
device->pwrctrl.interrupt_num, status);
- goto error_iounmap;
+ goto error_pwrctrl_close;
}
- device->pwrctrl.have_irq = 1;
disable_irq(device->pwrctrl.interrupt_num);
KGSL_DRV_INFO(device,
@@ -2544,38 +2476,78 @@
result = kgsl_drm_init(pdev);
if (result)
- goto error_iounmap;
+ goto error_pwrctrl_close;
- status = kgsl_register_device(device);
- if (!status)
- return status;
+ kgsl_cffdump_open(device->id);
- free_irq(device->pwrctrl.interrupt_num, NULL);
- device->pwrctrl.have_irq = 0;
-error_iounmap:
- iounmap(device->reg_virt);
- device->reg_virt = NULL;
-error_release_mem:
- release_mem_region(device->reg_phys, device->reg_len);
+ setup_timer(&device->idle_timer, kgsl_timer, (unsigned long) device);
+ status = kgsl_create_device_workqueue(device);
+ if (status)
+ goto error_pwrctrl_close;
+
+ status = kgsl_mmu_init(device);
+ if (status != 0) {
+ KGSL_DRV_ERR(device, "kgsl_mmu_init failed %d\n", status);
+ goto error_dest_work_q;
+ }
+
+ status = kgsl_allocate_contiguous(&device->memstore,
+ sizeof(struct kgsl_devmemstore));
+
+ if (status != 0) {
+ KGSL_DRV_ERR(device, "kgsl_allocate_contiguous failed %d\n",
+ status);
+ goto error_close_mmu;
+ }
+
+ wake_lock_init(&device->idle_wakelock, WAKE_LOCK_IDLE, device->name);
+ pm_qos_add_request(&device->pm_qos_req_dma, PM_QOS_CPU_DMA_LATENCY,
+ PM_QOS_DEFAULT_VALUE);
+
+ /* Initalize the snapshot engine */
+ kgsl_device_snapshot_init(device);
+
+ /* Initialize common sysfs entries */
+ kgsl_pwrctrl_init_sysfs(device);
+
+ return 0;
+
+error_close_mmu:
+ kgsl_mmu_close(device);
+error_dest_work_q:
+ destroy_workqueue(device->work_queue);
+ device->work_queue = NULL;
error_pwrctrl_close:
kgsl_pwrctrl_close(device);
error:
+ _unregister_device(device);
return status;
}
EXPORT_SYMBOL(kgsl_device_platform_probe);
void kgsl_device_platform_remove(struct kgsl_device *device)
{
- kgsl_unregister_device(device);
+ kgsl_device_snapshot_close(device);
- if (device->reg_virt != NULL) {
- iounmap(device->reg_virt);
- device->reg_virt = NULL;
- release_mem_region(device->reg_phys, device->reg_len);
+ kgsl_cffdump_close(device->id);
+ kgsl_pwrctrl_uninit_sysfs(device);
+
+ wake_lock_destroy(&device->idle_wakelock);
+ pm_qos_remove_request(&device->pm_qos_req_dma);
+
+ idr_destroy(&device->context_idr);
+
+ kgsl_sharedmem_free(&device->memstore);
+
+ kgsl_mmu_close(device);
+
+ if (device->work_queue) {
+ destroy_workqueue(device->work_queue);
+ device->work_queue = NULL;
}
kgsl_pwrctrl_close(device);
- pm_runtime_disable(device->parentdev);
+ _unregister_device(device);
}
EXPORT_SYMBOL(kgsl_device_platform_remove);
diff --git a/drivers/gpu/msm/kgsl_device.h b/drivers/gpu/msm/kgsl_device.h
index b42e606..0964458 100644
--- a/drivers/gpu/msm/kgsl_device.h
+++ b/drivers/gpu/msm/kgsl_device.h
@@ -199,6 +199,26 @@
s64 on_time;
};
+void kgsl_timestamp_expired(struct work_struct *work);
+
+#define KGSL_DEVICE_COMMON_INIT(_dev) \
+ .hwaccess_gate = COMPLETION_INITIALIZER((_dev).hwaccess_gate),\
+ .suspend_gate = COMPLETION_INITIALIZER((_dev).suspend_gate),\
+ .recovery_gate = COMPLETION_INITIALIZER((_dev).recovery_gate),\
+ .ts_notifier_list = ATOMIC_NOTIFIER_INIT((_dev).ts_notifier_list),\
+ .idle_check_ws = __WORK_INITIALIZER((_dev).idle_check_ws,\
+ kgsl_idle_check),\
+ .ts_expired_ws = __WORK_INITIALIZER((_dev).ts_expired_ws,\
+ kgsl_timestamp_expired),\
+ .context_idr = IDR_INIT((_dev).context_idr),\
+ .events = LIST_HEAD_INIT((_dev).events),\
+ .wait_queue = __WAIT_QUEUE_HEAD_INITIALIZER((_dev).wait_queue),\
+ .mutex = __MUTEX_INITIALIZER((_dev).mutex),\
+ .state = KGSL_STATE_INIT,\
+ .ver_major = DRIVER_VERSION_MAJOR,\
+ .ver_minor = DRIVER_VERSION_MINOR,\
+ .last_expired_ctxt_id = KGSL_CONTEXT_INVALID
+
struct kgsl_context {
uint32_t id;
diff --git a/drivers/gpu/msm/kgsl_gpummu.c b/drivers/gpu/msm/kgsl_gpummu.c
index 880fde1..a477439 100644
--- a/drivers/gpu/msm/kgsl_gpummu.c
+++ b/drivers/gpu/msm/kgsl_gpummu.c
@@ -719,6 +719,7 @@
.mmu_get_current_ptbase = kgsl_gpummu_get_current_ptbase,
.mmu_enable_clk = NULL,
.mmu_disable_clk = NULL,
+ .mmu_get_hwpagetable_asid = NULL,
};
struct kgsl_mmu_pt_ops gpummu_pt_ops = {
diff --git a/drivers/gpu/msm/kgsl_iommu.c b/drivers/gpu/msm/kgsl_iommu.c
index 4f27e6c..7d527e4 100644
--- a/drivers/gpu/msm/kgsl_iommu.c
+++ b/drivers/gpu/msm/kgsl_iommu.c
@@ -96,27 +96,77 @@
return ret;
}
+/*
+ * kgsl_iommu_pt_equal - Check if pagetables are equal
+ * @pt - Pointer to pagetable
+ * @pt_base - Address of a pagetable that the IOMMU register is
+ * programmed with
+ *
+ * Checks whether the pt_base is equal to the base address of
+ * the pagetable which is contained in the pt structure
+ * Return - Non-zero if the pagetable addresses are equal else 0
+ */
static int kgsl_iommu_pt_equal(struct kgsl_pagetable *pt,
unsigned int pt_base)
{
- struct iommu_domain *domain = pt ? pt->priv : NULL;
- return domain && pt_base && ((unsigned int)domain == pt_base);
+ struct kgsl_iommu_pt *iommu_pt = pt ? pt->priv : NULL;
+ unsigned int domain_ptbase = iommu_pt ?
+ iommu_get_pt_base_addr(iommu_pt->domain) : 0;
+ /* Only compare the valid address bits of the pt_base */
+ domain_ptbase &= (KGSL_IOMMU_TTBR0_PA_MASK <<
+ KGSL_IOMMU_TTBR0_PA_SHIFT);
+ pt_base &= (KGSL_IOMMU_TTBR0_PA_MASK <<
+ KGSL_IOMMU_TTBR0_PA_SHIFT);
+ return domain_ptbase && pt_base &&
+ (domain_ptbase == pt_base);
}
+/*
+ * kgsl_iommu_destroy_pagetable - Free up reaources help by a pagetable
+ * @mmu_specific_pt - Pointer to pagetable which is to be freed
+ *
+ * Return - void
+ */
static void kgsl_iommu_destroy_pagetable(void *mmu_specific_pt)
{
- struct iommu_domain *domain = mmu_specific_pt;
- if (domain)
- iommu_domain_free(domain);
+ struct kgsl_iommu_pt *iommu_pt = mmu_specific_pt;
+ if (iommu_pt->domain)
+ iommu_domain_free(iommu_pt->domain);
+ if (iommu_pt->iommu) {
+ if ((KGSL_IOMMU_ASID_REUSE == iommu_pt->asid) &&
+ iommu_pt->iommu->asid_reuse)
+ iommu_pt->iommu->asid_reuse--;
+ if (!iommu_pt->iommu->asid_reuse ||
+ (KGSL_IOMMU_ASID_REUSE != iommu_pt->asid))
+ clear_bit(iommu_pt->asid, iommu_pt->iommu->asids);
+ }
+ kfree(iommu_pt);
}
+/*
+ * kgsl_iommu_create_pagetable - Create a IOMMU pagetable
+ *
+ * Allocate memory to hold a pagetable and allocate the IOMMU
+ * domain which is the actual IOMMU pagetable
+ * Return - void
+ */
void *kgsl_iommu_create_pagetable(void)
{
- struct iommu_domain *domain = iommu_domain_alloc(0);
- if (!domain)
- KGSL_CORE_ERR("Failed to create iommu domain\n");
+ struct kgsl_iommu_pt *iommu_pt;
- return domain;
+ iommu_pt = kzalloc(sizeof(struct kgsl_iommu_pt), GFP_KERNEL);
+ if (!iommu_pt) {
+ KGSL_CORE_ERR("kzalloc(%d) failed\n",
+ sizeof(struct kgsl_iommu_pt));
+ return NULL;
+ }
+ iommu_pt->domain = iommu_domain_alloc(0);
+ if (!iommu_pt->domain) {
+ KGSL_CORE_ERR("Failed to create iommu domain\n");
+ kfree(iommu_pt);
+ return NULL;
+ }
+ return iommu_pt;
}
/*
@@ -133,25 +183,25 @@
*/
static void kgsl_detach_pagetable_iommu_domain(struct kgsl_mmu *mmu)
{
- struct iommu_domain *domain;
+ struct kgsl_iommu_pt *iommu_pt;
struct kgsl_iommu *iommu = mmu->priv;
int i, j;
BUG_ON(mmu->hwpagetable == NULL);
BUG_ON(mmu->hwpagetable->priv == NULL);
- domain = mmu->hwpagetable->priv;
+ iommu_pt = mmu->hwpagetable->priv;
for (i = 0; i < iommu->unit_count; i++) {
struct kgsl_iommu_unit *iommu_unit = &iommu->iommu_units[i];
for (j = 0; j < iommu_unit->dev_count; j++) {
if (iommu_unit->dev[j].attached) {
- iommu_detach_device(domain,
+ iommu_detach_device(iommu_pt->domain,
iommu_unit->dev[j].dev);
iommu_unit->dev[j].attached = false;
KGSL_MEM_INFO(mmu->device, "iommu %p detached "
"from user dev of MMU: %p\n",
- domain, mmu);
+ iommu_pt->domain, mmu);
}
}
}
@@ -172,14 +222,14 @@
*/
static int kgsl_attach_pagetable_iommu_domain(struct kgsl_mmu *mmu)
{
- struct iommu_domain *domain;
+ struct kgsl_iommu_pt *iommu_pt;
struct kgsl_iommu *iommu = mmu->priv;
int i, j, ret = 0;
BUG_ON(mmu->hwpagetable == NULL);
BUG_ON(mmu->hwpagetable->priv == NULL);
- domain = mmu->hwpagetable->priv;
+ iommu_pt = mmu->hwpagetable->priv;
/*
* Loop through all the iommu devcies under all iommu units and
@@ -189,7 +239,7 @@
struct kgsl_iommu_unit *iommu_unit = &iommu->iommu_units[i];
for (j = 0; j < iommu_unit->dev_count; j++) {
if (!iommu_unit->dev[j].attached) {
- ret = iommu_attach_device(domain,
+ ret = iommu_attach_device(iommu_pt->domain,
iommu_unit->dev[j].dev);
if (ret) {
KGSL_MEM_ERR(mmu->device,
@@ -200,8 +250,8 @@
iommu_unit->dev[j].attached = true;
KGSL_MEM_INFO(mmu->device,
"iommu pt %p attached to dev %p, ctx_id %d\n",
- domain, iommu_unit->dev[j].dev,
- iommu_unit->dev[j].ctx_id);
+ iommu_pt->domain, iommu_unit->dev[j].dev,
+ iommu_unit->dev[j].ctx_id);
}
}
}
@@ -352,19 +402,66 @@
return ret;
}
+/*
+ * kgsl_iommu_pt_get_base_addr - Get the address of the pagetable that the
+ * IOMMU ttbr0 register is programmed with
+ * @pt - kgsl pagetable pointer that contains the IOMMU domain pointer
+ *
+ * Return - actual pagetable address that the ttbr0 register is programmed
+ * with
+ */
+static unsigned int kgsl_iommu_pt_get_base_addr(struct kgsl_pagetable *pt)
+{
+ struct kgsl_iommu_pt *iommu_pt = pt->priv;
+ return iommu_get_pt_base_addr(iommu_pt->domain);
+}
+
+/*
+ * kgsl_iommu_get_pt_lsb - Return the lsb of the ttbr0 IOMMU register
+ * @mmu - Pointer to mmu structure
+ * @hostptr - Pointer to the IOMMU register map. This is used to match
+ * the iommu device whose lsb value is to be returned
+ * @ctx_id - The context bank whose lsb valus is to be returned
+ * Return - returns the lsb which is the last 14 bits of the ttbr0 IOMMU
+ * register. ttbr0 is the actual PTBR for of the IOMMU. The last 14 bits
+ * are only programmed once in the beginning when a domain is attached
+ * does not change.
+ */
+static int kgsl_iommu_get_pt_lsb(struct kgsl_mmu *mmu,
+ unsigned int unit_id,
+ enum kgsl_iommu_context_id ctx_id)
+{
+ struct kgsl_iommu *iommu = mmu->priv;
+ int i, j;
+ for (i = 0; i < iommu->unit_count; i++) {
+ struct kgsl_iommu_unit *iommu_unit = &iommu->iommu_units[i];
+ for (j = 0; j < iommu_unit->dev_count; j++)
+ if (unit_id == i &&
+ ctx_id == iommu_unit->dev[j].ctx_id)
+ return iommu_unit->dev[j].pt_lsb;
+ }
+ return 0;
+}
+
static void kgsl_iommu_setstate(struct kgsl_mmu *mmu,
struct kgsl_pagetable *pagetable)
{
if (mmu->flags & KGSL_FLAGS_STARTED) {
+ struct kgsl_iommu *iommu = mmu->priv;
+ struct kgsl_iommu_pt *iommu_pt = pagetable->priv;
/* page table not current, then setup mmu to use new
* specified page table
*/
if (mmu->hwpagetable != pagetable) {
- kgsl_idle(mmu->device, KGSL_TIMEOUT_DEFAULT);
- kgsl_detach_pagetable_iommu_domain(mmu);
+ unsigned int flags = 0;
mmu->hwpagetable = pagetable;
- if (mmu->hwpagetable)
- kgsl_attach_pagetable_iommu_domain(mmu);
+ /* force tlb flush if asid is reused */
+ if (iommu->asid_reuse &&
+ (KGSL_IOMMU_ASID_REUSE == iommu_pt->asid))
+ flags |= KGSL_MMUFLAGS_TLBFLUSH;
+ flags |= kgsl_mmu_pt_get_flags(mmu->hwpagetable,
+ mmu->device->id);
+ kgsl_setstate(mmu, KGSL_MMUFLAGS_PTUPDATE | flags);
}
}
}
@@ -385,6 +482,14 @@
sizeof(struct kgsl_iommu));
return -ENOMEM;
}
+ iommu->asids = kzalloc(BITS_TO_LONGS(KGSL_IOMMU_MAX_ASIDS) *
+ sizeof(unsigned long), GFP_KERNEL);
+ if (!iommu->asids) {
+ KGSL_CORE_ERR("kzalloc(%d) failed\n",
+ sizeof(struct kgsl_iommu));
+ status = -ENOMEM;
+ goto done;
+ }
mmu->priv = iommu;
status = kgsl_get_iommu_ctxt(mmu);
@@ -398,6 +503,7 @@
__func__);
done:
if (status) {
+ kfree(iommu->asids);
kfree(iommu);
mmu->priv = NULL;
}
@@ -418,6 +524,7 @@
int status = 0;
int i = 0;
struct kgsl_iommu *iommu = mmu->priv;
+ struct kgsl_iommu_pt *iommu_pt;
mmu->defaultpagetable = kgsl_mmu_getpagetable(KGSL_MMU_GLOBAL_PT);
/* Return error if the default pagetable doesn't exist */
@@ -437,6 +544,14 @@
goto err;
}
}
+ /*
+ * The dafault pagetable always has asid 0 assigned by the iommu driver
+ * and asid 1 is assigned to the private context.
+ */
+ iommu_pt = mmu->defaultpagetable->priv;
+ iommu_pt->asid = 0;
+ set_bit(0, iommu->asids);
+ set_bit(1, iommu->asids);
return status;
err:
for (i--; i >= 0; i--) {
@@ -454,6 +569,8 @@
static int kgsl_iommu_start(struct kgsl_mmu *mmu)
{
int status;
+ struct kgsl_iommu *iommu = mmu->priv;
+ int i, j;
if (mmu->flags & KGSL_FLAGS_STARTED)
return 0;
@@ -474,7 +591,42 @@
kgsl_detach_pagetable_iommu_domain(mmu);
mmu->hwpagetable = NULL;
}
+ status = kgsl_iommu_enable_clk(mmu, KGSL_IOMMU_CONTEXT_USER);
+ if (status) {
+ KGSL_CORE_ERR("clk enable failed\n");
+ goto done;
+ }
+ status = kgsl_iommu_enable_clk(mmu, KGSL_IOMMU_CONTEXT_PRIV);
+ if (status) {
+ KGSL_CORE_ERR("clk enable failed\n");
+ goto done;
+ }
+ /* Get the lsb value of pagetables set in the IOMMU ttbr0 register as
+ * that value should not change when we change pagetables, so while
+ * changing pagetables we can use this lsb value of the pagetable w/o
+ * having to read it again
+ */
+ for (i = 0; i < iommu->unit_count; i++) {
+ struct kgsl_iommu_unit *iommu_unit = &iommu->iommu_units[i];
+ for (j = 0; j < iommu_unit->dev_count; j++)
+ iommu_unit->dev[j].pt_lsb = KGSL_IOMMMU_PT_LSB(
+ KGSL_IOMMU_GET_IOMMU_REG(
+ iommu_unit->reg_map.hostptr,
+ iommu_unit->dev[j].ctx_id,
+ TTBR0));
+ }
+ iommu->asid = KGSL_IOMMU_GET_IOMMU_REG(
+ iommu->iommu_units[0].reg_map.hostptr,
+ KGSL_IOMMU_CONTEXT_USER,
+ CONTEXTIDR);
+ kgsl_iommu_disable_clk(mmu);
+
+done:
+ if (status) {
+ kgsl_iommu_disable_clk(mmu);
+ kgsl_detach_pagetable_iommu_domain(mmu);
+ }
return status;
}
@@ -484,8 +636,7 @@
{
int ret;
unsigned int range = memdesc->size;
- struct iommu_domain *domain = (struct iommu_domain *)
- mmu_specific_pt;
+ struct kgsl_iommu_pt *iommu_pt = mmu_specific_pt;
/* All GPU addresses as assigned are page aligned, but some
functions purturb the gpuaddr with an offset, so apply the
@@ -496,10 +647,10 @@
if (range == 0 || gpuaddr == 0)
return 0;
- ret = iommu_unmap_range(domain, gpuaddr, range);
+ ret = iommu_unmap_range(iommu_pt->domain, gpuaddr, range);
if (ret)
KGSL_CORE_ERR("iommu_unmap_range(%p, %x, %d) failed "
- "with err: %d\n", domain, gpuaddr,
+ "with err: %d\n", iommu_pt->domain, gpuaddr,
range, ret);
return 0;
@@ -513,20 +664,20 @@
{
int ret;
unsigned int iommu_virt_addr;
- struct iommu_domain *domain = mmu_specific_pt;
+ struct kgsl_iommu_pt *iommu_pt = mmu_specific_pt;
- BUG_ON(NULL == domain);
+ BUG_ON(NULL == iommu_pt);
iommu_virt_addr = memdesc->gpuaddr;
- ret = iommu_map_range(domain, iommu_virt_addr, memdesc->sg,
+ ret = iommu_map_range(iommu_pt->domain, iommu_virt_addr, memdesc->sg,
memdesc->size, (IOMMU_READ | IOMMU_WRITE));
if (ret) {
KGSL_CORE_ERR("iommu_map_range(%p, %x, %p, %d, %d) "
- "failed with err: %d\n", domain,
+ "failed with err: %d\n", iommu_pt->domain,
iommu_virt_addr, memdesc->sg, memdesc->size,
- 0, ret);
+ (IOMMU_READ | IOMMU_WRITE), ret);
return ret;
}
@@ -573,6 +724,8 @@
}
if (mmu->defaultpagetable)
kgsl_mmu_putpagetable(mmu->defaultpagetable);
+ kfree(iommu->asids);
+ kfree(iommu);
return 0;
}
@@ -592,17 +745,129 @@
KGSL_IOMMU_TTBR0_PA_SHIFT);
}
+/*
+ * kgsl_iommu_get_hwpagetable_asid - Returns asid(application space ID) for a
+ * pagetable
+ * @mmu - Pointer to mmu structure
+ *
+ * Allocates an asid to a IOMMU domain if it does not already have one. asid's
+ * are unique identifiers for pagetable that can be used to selectively flush
+ * tlb entries of the IOMMU unit.
+ * Return - asid to be used with the IOMMU domain
+ */
+static int kgsl_iommu_get_hwpagetable_asid(struct kgsl_mmu *mmu)
+{
+ struct kgsl_iommu *iommu = mmu->priv;
+ struct kgsl_iommu_pt *iommu_pt = mmu->hwpagetable->priv;
+
+ /*
+ * If the iommu pagetable does not have any asid assigned and is not the
+ * default pagetable then assign asid.
+ */
+ if (!iommu_pt->asid && iommu_pt != mmu->defaultpagetable->priv) {
+ iommu_pt->asid = find_first_zero_bit(iommu->asids,
+ KGSL_IOMMU_MAX_ASIDS);
+ /* No free bits means reuse asid */
+ if (iommu_pt->asid >= KGSL_IOMMU_MAX_ASIDS) {
+ iommu_pt->asid = KGSL_IOMMU_ASID_REUSE;
+ iommu->asid_reuse++;
+ }
+ set_bit(iommu_pt->asid, iommu->asids);
+ /*
+ * Store pointer to asids list so that during pagetable destroy
+ * the asid assigned to this pagetable may be cleared
+ */
+ iommu_pt->iommu = iommu;
+ }
+ /* Return the asid + the constant part of asid that never changes */
+ return (iommu_pt->asid & (KGSL_IOMMU_CONTEXTIDR_ASID_MASK <<
+ KGSL_IOMMU_CONTEXTIDR_ASID_SHIFT)) +
+ (iommu->asid & ~(KGSL_IOMMU_CONTEXTIDR_ASID_MASK <<
+ KGSL_IOMMU_CONTEXTIDR_ASID_SHIFT));
+}
+
+/*
+ * kgsl_iommu_default_setstate - Change the IOMMU pagetable or flush IOMMU tlb
+ * of the primary context bank
+ * @mmu - Pointer to mmu structure
+ * @flags - Flags indicating whether pagetable has to chnage or tlb is to be
+ * flushed or both
+ *
+ * Based on flags set the new pagetable fo the IOMMU unit or flush it's tlb or
+ * do both by doing direct register writes to the IOMMu registers through the
+ * cpu
+ * Return - void
+ */
+static void kgsl_iommu_default_setstate(struct kgsl_mmu *mmu,
+ uint32_t flags)
+{
+ struct kgsl_iommu *iommu = mmu->priv;
+ int temp;
+ int i;
+ unsigned int pt_base = kgsl_iommu_pt_get_base_addr(
+ mmu->hwpagetable);
+ unsigned int pt_val;
+
+ if (kgsl_iommu_enable_clk(mmu, KGSL_IOMMU_CONTEXT_USER)) {
+ KGSL_DRV_ERR(mmu->device, "Failed to enable iommu clocks\n");
+ return;
+ }
+ /* Mask off the lsb of the pt base address since lsb will not change */
+ pt_base &= (KGSL_IOMMU_TTBR0_PA_MASK << KGSL_IOMMU_TTBR0_PA_SHIFT);
+ if (flags & KGSL_MMUFLAGS_PTUPDATE) {
+ kgsl_idle(mmu->device, KGSL_TIMEOUT_DEFAULT);
+ for (i = 0; i < iommu->unit_count; i++) {
+ /* get the lsb value which should not change when
+ * changing ttbr0 */
+ pt_val = kgsl_iommu_get_pt_lsb(mmu, i,
+ KGSL_IOMMU_CONTEXT_USER);
+ pt_val += pt_base;
+
+ KGSL_IOMMU_SET_IOMMU_REG(
+ iommu->iommu_units[i].reg_map.hostptr,
+ KGSL_IOMMU_CONTEXT_USER, TTBR0, pt_val);
+
+ mb();
+ temp = KGSL_IOMMU_GET_IOMMU_REG(
+ iommu->iommu_units[i].reg_map.hostptr,
+ KGSL_IOMMU_CONTEXT_USER, TTBR0);
+ /* Set asid */
+ KGSL_IOMMU_SET_IOMMU_REG(
+ iommu->iommu_units[i].reg_map.hostptr,
+ KGSL_IOMMU_CONTEXT_USER, CONTEXTIDR,
+ kgsl_iommu_get_hwpagetable_asid(mmu));
+ mb();
+ temp = KGSL_IOMMU_GET_IOMMU_REG(
+ iommu->iommu_units[i].reg_map.hostptr,
+ KGSL_IOMMU_CONTEXT_USER, CONTEXTIDR);
+ }
+ }
+ /* Flush tlb */
+ if (flags & KGSL_MMUFLAGS_TLBFLUSH) {
+ for (i = 0; i < iommu->unit_count; i++) {
+ KGSL_IOMMU_SET_IOMMU_REG(
+ iommu->iommu_units[i].reg_map.hostptr,
+ KGSL_IOMMU_CONTEXT_USER, CTX_TLBIASID,
+ kgsl_iommu_get_hwpagetable_asid(mmu));
+ mb();
+ }
+ }
+ /* Disable smmu clock */
+ kgsl_iommu_disable_clk(mmu);
+}
+
struct kgsl_mmu_ops iommu_ops = {
.mmu_init = kgsl_iommu_init,
.mmu_close = kgsl_iommu_close,
.mmu_start = kgsl_iommu_start,
.mmu_stop = kgsl_iommu_stop,
.mmu_setstate = kgsl_iommu_setstate,
- .mmu_device_setstate = NULL,
+ .mmu_device_setstate = kgsl_iommu_default_setstate,
.mmu_pagefault = NULL,
.mmu_get_current_ptbase = kgsl_iommu_get_current_ptbase,
.mmu_enable_clk = kgsl_iommu_enable_clk,
.mmu_disable_clk = kgsl_iommu_disable_clk,
+ .mmu_get_hwpagetable_asid = kgsl_iommu_get_hwpagetable_asid,
};
struct kgsl_mmu_pt_ops iommu_pt_ops = {
diff --git a/drivers/gpu/msm/kgsl_iommu.h b/drivers/gpu/msm/kgsl_iommu.h
index 5a92f513..c2e84a6 100644
--- a/drivers/gpu/msm/kgsl_iommu.h
+++ b/drivers/gpu/msm/kgsl_iommu.h
@@ -26,6 +26,10 @@
#define KGSL_IOMMU_CONTEXTIDR_ASID_SHIFT 0
#define KGSL_IOMMU_CTX_TLBIASID 0x804
#define KGSL_IOMMU_CTX_SHIFT 12
+
+#define KGSL_IOMMU_MAX_ASIDS 256
+#define KGSL_IOMMU_ASID_REUSE 2
+
/*
* Max number of iommu units that the gpu core can have
* On APQ8064, KGSL can control a maximum of 2 IOMMU units.
@@ -35,6 +39,22 @@
/* Max number of iommu contexts per IOMMU unit */
#define KGSL_IOMMU_MAX_DEVS_PER_UNIT 2
+/* Macros to read/write IOMMU registers */
+#define KGSL_IOMMU_SET_IOMMU_REG(base_addr, ctx, REG, val) \
+ writel_relaxed(val, base_addr + \
+ (ctx << KGSL_IOMMU_CTX_SHIFT) + \
+ KGSL_IOMMU_##REG)
+
+#define KGSL_IOMMU_GET_IOMMU_REG(base_addr, ctx, REG) \
+ readl_relaxed(base_addr + \
+ (ctx << KGSL_IOMMU_CTX_SHIFT) + \
+ KGSL_IOMMU_##REG)
+
+/* Gets the lsb value of pagetable */
+#define KGSL_IOMMMU_PT_LSB(pt_val) \
+ (pt_val & ~(KGSL_IOMMU_TTBR0_PA_MASK << \
+ KGSL_IOMMU_TTBR0_PA_SHIFT))
+
/*
* struct kgsl_iommu_device - Structure holding data about iommu contexts
* @dev: Device pointer to iommu context
@@ -81,6 +101,7 @@
* @asids: A bit structure indicating which id's are presently used
* @asid: Contains the initial value of IOMMU_CONTEXTIDR when a domain
* is first attached
+ * asid_reuse: Holds the number of times the reuse asid is reused
*/
struct kgsl_iommu {
struct kgsl_iommu_unit iommu_units[KGSL_IOMMU_MAX_UNITS];
@@ -89,7 +110,19 @@
struct kgsl_device *device;
unsigned long *asids;
unsigned int asid;
- unsigned int active_ctx;
+ unsigned int asid_reuse;
+};
+
+/*
+ * struct kgsl_iommu_pt - Iommu pagetable structure private to kgsl driver
+ * @domain: Pointer to the iommu domain that contains the iommu pagetable
+ * @iommu: Pointer to iommu structure
+ * @asid: The asid assigned to this domain
+ */
+struct kgsl_iommu_pt {
+ struct iommu_domain *domain;
+ struct kgsl_iommu *iommu;
+ unsigned int asid;
};
#endif
diff --git a/drivers/gpu/msm/kgsl_mmu.c b/drivers/gpu/msm/kgsl_mmu.c
index 5fdc182..606d861 100644
--- a/drivers/gpu/msm/kgsl_mmu.c
+++ b/drivers/gpu/msm/kgsl_mmu.c
@@ -521,11 +521,8 @@
if (KGSL_MMU_TYPE_NONE == kgsl_mmu_type)
return (void *)(-1);
-#ifdef CONFIG_KGSL_PER_PROCESS_PAGE_TABLE
- if (KGSL_MMU_TYPE_IOMMU == kgsl_mmu_type)
- name = KGSL_MMU_GLOBAL_PT;
-#else
- name = KGSL_MMU_GLOBAL_PT;
+#ifndef CONFIG_KGSL_PER_PROCESS_PAGE_TABLE
+ name = KGSL_MMU_GLOBAL_PT;
#endif
pt = kgsl_get_pagetable(name);
@@ -546,7 +543,8 @@
struct kgsl_device *device = mmu->device;
if (KGSL_MMU_TYPE_NONE == kgsl_mmu_type)
return;
- else if (device->ftbl->setstate)
+ else if (device->ftbl->setstate && (KGSL_MMU_TYPE_IOMMU !=
+ kgsl_mmu_type))
device->ftbl->setstate(device, flags);
else if (mmu->mmu_ops->mmu_device_setstate)
mmu->mmu_ops->mmu_device_setstate(mmu, flags);
diff --git a/drivers/gpu/msm/kgsl_mmu.h b/drivers/gpu/msm/kgsl_mmu.h
index fc64629..24eaba4 100644
--- a/drivers/gpu/msm/kgsl_mmu.h
+++ b/drivers/gpu/msm/kgsl_mmu.h
@@ -134,6 +134,7 @@
(struct kgsl_mmu *mmu);
int (*mmu_enable_clk)
(struct kgsl_mmu *mmu, int ctx_id);
+ int (*mmu_get_hwpagetable_asid)(struct kgsl_mmu *mmu);
};
struct kgsl_mmu_pt_ops {
diff --git a/drivers/gpu/msm/kgsl_pwrctrl.c b/drivers/gpu/msm/kgsl_pwrctrl.c
index 15a0252..3a29d71 100644
--- a/drivers/gpu/msm/kgsl_pwrctrl.c
+++ b/drivers/gpu/msm/kgsl_pwrctrl.c
@@ -11,6 +11,7 @@
*
*/
#include <linux/interrupt.h>
+#include <linux/pm_runtime.h>
#include <mach/msm_iomap.h>
#include <mach/msm_bus.h>
@@ -403,7 +404,7 @@
trace_kgsl_bus(device, state);
if (pwr->ebi1_clk) {
clk_set_rate(pwr->ebi1_clk, 0);
- clk_disable(pwr->ebi1_clk);
+ clk_disable_unprepare(pwr->ebi1_clk);
}
if (pwr->pcl)
msm_bus_scale_client_update_request(pwr->pcl,
@@ -414,7 +415,7 @@
&pwr->power_flags)) {
trace_kgsl_bus(device, state);
if (pwr->ebi1_clk) {
- clk_enable(pwr->ebi1_clk);
+ clk_prepare_enable(pwr->ebi1_clk);
clk_set_rate(pwr->ebi1_clk,
pwr->pwrlevels[pwr->active_pwrlevel].
bus_freq);
@@ -552,17 +553,8 @@
}
}
- /*acquire interrupt */
- pwr->interrupt_num =
- platform_get_irq_byname(pdev, pwr->irq_name);
- if (pwr->interrupt_num <= 0) {
- KGSL_PWR_ERR(device, "platform_get_irq_byname failed: %d\n",
- pwr->interrupt_num);
- result = -EINVAL;
- goto done;
- }
-
+ pm_runtime_enable(device->parentdev);
register_early_suspend(&device->display_off);
return result;
@@ -582,16 +574,9 @@
KGSL_PWR_INFO(device, "close device %d\n", device->id);
+ pm_runtime_disable(device->parentdev);
unregister_early_suspend(&device->display_off);
- if (pwr->interrupt_num > 0) {
- if (pwr->have_irq) {
- free_irq(pwr->interrupt_num, NULL);
- pwr->have_irq = 0;
- }
- pwr->interrupt_num = 0;
- }
-
clk_put(pwr->ebi1_clk);
if (pwr->pcl)
diff --git a/drivers/gpu/msm/kgsl_pwrctrl.h b/drivers/gpu/msm/kgsl_pwrctrl.h
index 6325b66..1e5c21c 100644
--- a/drivers/gpu/msm/kgsl_pwrctrl.h
+++ b/drivers/gpu/msm/kgsl_pwrctrl.h
@@ -39,7 +39,6 @@
struct kgsl_pwrctrl {
int interrupt_num;
- int have_irq;
struct clk *ebi1_clk;
struct clk *grp_clks[KGSL_MAX_CLKS];
unsigned long power_flags;
diff --git a/drivers/gpu/msm/z180.c b/drivers/gpu/msm/z180.c
index 240de9a..846a9a1 100644
--- a/drivers/gpu/msm/z180.c
+++ b/drivers/gpu/msm/z180.c
@@ -132,10 +132,9 @@
static struct z180_device device_2d0 = {
.dev = {
+ KGSL_DEVICE_COMMON_INIT(device_2d0.dev),
.name = DEVICE_2D0_NAME,
.id = KGSL_DEVICE_2D0,
- .ver_major = DRIVER_VERSION_MAJOR,
- .ver_minor = DRIVER_VERSION_MINOR,
.mh = {
.mharb = Z180_CFG_MHARB,
.mh_intf_cfg1 = 0x00032f07,
@@ -152,20 +151,17 @@
.pwrctrl = {
.irq_name = KGSL_2D0_IRQ,
},
- .mutex = __MUTEX_INITIALIZER(device_2d0.dev.mutex),
- .state = KGSL_STATE_INIT,
- .active_cnt = 0,
.iomemname = KGSL_2D0_REG_MEMORY,
.ftbl = &z180_functable,
},
+ .cmdwin_lock = __SPIN_LOCK_INITIALIZER(device_2d1.cmdwin_lock),
};
static struct z180_device device_2d1 = {
.dev = {
+ KGSL_DEVICE_COMMON_INIT(device_2d1.dev),
.name = DEVICE_2D1_NAME,
.id = KGSL_DEVICE_2D1,
- .ver_major = DRIVER_VERSION_MAJOR,
- .ver_minor = DRIVER_VERSION_MINOR,
.mh = {
.mharb = Z180_CFG_MHARB,
.mh_intf_cfg1 = 0x00032f07,
@@ -182,12 +178,10 @@
.pwrctrl = {
.irq_name = KGSL_2D1_IRQ,
},
- .mutex = __MUTEX_INITIALIZER(device_2d1.dev.mutex),
- .state = KGSL_STATE_INIT,
- .active_cnt = 0,
.iomemname = KGSL_2D1_REG_MEMORY,
.ftbl = &z180_functable,
},
+ .cmdwin_lock = __SPIN_LOCK_INITIALIZER(device_2d1.cmdwin_lock),
};
static irqreturn_t z180_irq_handler(struct kgsl_device *device)
@@ -524,7 +518,6 @@
device->parentdev = &pdev->dev;
z180_dev = Z180_DEVICE(device);
- spin_lock_init(&z180_dev->cmdwin_lock);
status = z180_ringbuffer_init(device);
if (status != 0)
diff --git a/drivers/media/video/msm/io/msm_camera_io_util.c b/drivers/media/video/msm/io/msm_camera_io_util.c
index af60426..4049266 100644
--- a/drivers/media/video/msm/io/msm_camera_io_util.c
+++ b/drivers/media/video/msm/io/msm_camera_io_util.c
@@ -370,7 +370,7 @@
usleep_range(gpio_conf->cam_gpio_set_tbl[i].delay,
gpio_conf->cam_gpio_set_tbl[i].delay + 1000);
}
- } else if (!gpio_conf->gpio_no_mux) {
+ } else {
for (i = gpio_conf->cam_gpio_set_tbl_size - 1; i >= 0; i--) {
if (gpio_conf->cam_gpio_set_tbl[i].flags)
gpio_set_value_cansleep(
diff --git a/drivers/media/video/msm/msm.c b/drivers/media/video/msm/msm.c
index 8720d70..fa9aace 100644
--- a/drivers/media/video/msm/msm.c
+++ b/drivers/media/video/msm/msm.c
@@ -2384,16 +2384,20 @@
spin_lock_init(&config_cam->p_mctl->stats_info.pmem_stats_spinlock);
config_cam->p_mctl->config_device = config_cam;
+#ifdef CONFIG_MSM_MULTIMEDIA_USE_ION
kref_get(&config_cam->p_mctl->refcount);
+#endif
fp->private_data = config_cam;
return rc;
}
static int msm_close_config(struct inode *node, struct file *f)
{
+#ifdef CONFIG_MSM_MULTIMEDIA_USE_ION
struct msm_cam_config_dev *config_cam = f->private_data;
D("%s Decrementing ref count of config node ", __func__);
kref_put(&config_cam->p_mctl->refcount, msm_release_ion_client);
+#endif
return 0;
}
diff --git a/drivers/media/video/msm/msm_vfe7x27a_v4l2.c b/drivers/media/video/msm/msm_vfe7x27a_v4l2.c
index d9d315e..dd567d1 100644
--- a/drivers/media/video/msm/msm_vfe7x27a_v4l2.c
+++ b/drivers/media/video/msm/msm_vfe7x27a_v4l2.c
@@ -409,7 +409,7 @@
CDBG("%s:id=%d\n", __func__, id);
if (id != VFE_ADSP_EVENT) {
- data = kzalloc(len, GFP_KERNEL);
+ data = kzalloc(len, GFP_ATOMIC);
if (!data) {
pr_err("%s: rp: cannot allocate buffer\n", __func__);
return;
diff --git a/drivers/media/video/msm/msm_vpe.c b/drivers/media/video/msm/msm_vpe.c
index b7376dc..71c10ad 100644
--- a/drivers/media/video/msm/msm_vpe.c
+++ b/drivers/media/video/msm/msm_vpe.c
@@ -50,10 +50,12 @@
/* enable the frame irq, bit 0 = Display list 0 ROI done */
msm_camera_io_w_mb(1, vpe_ctrl->vpebase + VPE_INTR_ENABLE_OFFSET);
msm_camera_io_dump(vpe_ctrl->vpebase, 0x120);
+ msm_camera_io_dump(vpe_ctrl->vpebase + 0x00400, 0x18);
msm_camera_io_dump(vpe_ctrl->vpebase + 0x10000, 0x250);
msm_camera_io_dump(vpe_ctrl->vpebase + 0x30000, 0x20);
msm_camera_io_dump(vpe_ctrl->vpebase + 0x50000, 0x30);
msm_camera_io_dump(vpe_ctrl->vpebase + 0x50400, 0x10);
+
/* this triggers the operation. */
msm_camera_io_w(1, vpe_ctrl->vpebase + VPE_DL0_START_OFFSET);
wmb();
@@ -756,7 +758,7 @@
}
rc = request_irq(vpe_ctrl->vpeirq->start, vpe_parse_irq,
- IRQF_TRIGGER_RISING, "vfe", 0);
+ IRQF_TRIGGER_RISING, "vpe", 0);
if (rc < 0) {
release_mem_region(vpe_ctrl->vpemem->start,
resource_size(vpe_ctrl->vpemem));
diff --git a/drivers/media/video/msm/msm_vpe.h b/drivers/media/video/msm/msm_vpe.h
index 553ee4f..0d14626 100644
--- a/drivers/media/video/msm/msm_vpe.h
+++ b/drivers/media/video/msm/msm_vpe.h
@@ -60,7 +60,8 @@
#define VPE_SCALE_COEFF_LSP_0_OFFSET 0x50400
#define VPE_SCALE_COEFF_MSP_0_OFFSET 0x50404
-#define VPE_AXI_ARB_2_OFFSET 0x004C
+#define VPE_AXI_ARB_1_OFFSET 0x00408
+#define VPE_AXI_ARB_2_OFFSET 0x0040C
#define VPE_SCALE_COEFF_LSBn(n) (0x50400 + 8 * (n))
#define VPE_SCALE_COEFF_MSBn(n) (0x50404 + 8 * (n))
diff --git a/drivers/media/video/msm/sensors/ov2720.c b/drivers/media/video/msm/sensors/ov2720.c
index 1e66843..7531a26 100644
--- a/drivers/media/video/msm/sensors/ov2720.c
+++ b/drivers/media/video/msm/sensors/ov2720.c
@@ -333,7 +333,7 @@
{0x5000, 0xff},
{0x3a18, 0x00},
{0x3a19, 0x80},
- {0x3503, 0x00},
+ {0x3503, 0x07},
{0x4521, 0x00},
{0x5183, 0xb0},
{0x5184, 0xb0},
@@ -430,7 +430,7 @@
{0x5000, 0xff},
{0x3a18, 0x00},
{0x3a19, 0x80},
- {0x3503, 0x00},
+ {0x3503, 0x07},
{0x4521, 0x00},
{0x5183, 0xb0},
{0x5184, 0xb0},
@@ -527,7 +527,7 @@
{0x5000, 0xff},
{0x3a18, 0x00},
{0x3a19, 0x80},
- {0x3503, 0x00},
+ {0x3503, 0x07},
{0x4521, 0x00},
{0x5183, 0xb0},
{0x5184, 0xb0},
diff --git a/drivers/media/video/msm/sensors/s5k4e1_v4l2.c b/drivers/media/video/msm/sensors/s5k4e1_v4l2.c
index 6671073..2d25824 100644
--- a/drivers/media/video/msm/sensors/s5k4e1_v4l2.c
+++ b/drivers/media/video/msm/sensors/s5k4e1_v4l2.c
@@ -406,6 +406,36 @@
return 0;
}
+int32_t s5k4e1_sensor_i2c_probe(struct i2c_client *client,
+ const struct i2c_device_id *id)
+{
+ int rc = 0;
+ struct msm_camera_sensor_info *s_info;
+
+ rc = msm_sensor_i2c_probe(client, id);
+
+ s_info = client->dev.platform_data;
+ if (s_info == NULL) {
+ pr_err("%s %s NULL sensor data\n", __func__, client->name);
+ return -EFAULT;
+ }
+
+ if (s_info->actuator_info->vcm_enable) {
+ rc = gpio_request(s_info->actuator_info->vcm_pwd,
+ "msm_actuator");
+ if (rc < 0)
+ pr_err("%s: gpio_request:msm_actuator %d failed\n",
+ __func__, s_info->actuator_info->vcm_pwd);
+ rc = gpio_direction_output(s_info->actuator_info->vcm_pwd, 0);
+ if (rc < 0)
+ pr_err("%s: gpio:msm_actuator %d direction can't be set\n",
+ __func__, s_info->actuator_info->vcm_pwd);
+ gpio_free(s_info->actuator_info->vcm_pwd);
+ }
+
+ return rc;
+}
+
static const struct i2c_device_id s5k4e1_i2c_id[] = {
{SENSOR_NAME, (kernel_ulong_t)&s5k4e1_s_ctrl},
{ }
@@ -413,7 +443,7 @@
static struct i2c_driver s5k4e1_i2c_driver = {
.id_table = s5k4e1_i2c_id,
- .probe = msm_sensor_i2c_probe,
+ .probe = s5k4e1_sensor_i2c_probe,
.driver = {
.name = SENSOR_NAME,
},
diff --git a/drivers/mmc/core/quirks.c b/drivers/mmc/core/quirks.c
index 92990b9..f9999c5 100644
--- a/drivers/mmc/core/quirks.c
+++ b/drivers/mmc/core/quirks.c
@@ -29,6 +29,18 @@
#define SDIO_DEVICE_ID_MSM_WCN1314 0x2881
#endif
+#ifndef SDIO_VENDOR_ID_MSM_QCA
+#define SDIO_VENDOR_ID_MSM_QCA 0x271
+#endif
+
+#ifndef SDIO_DEVICE_ID_MSM_QCA_AR6003_1
+#define SDIO_DEVICE_ID_MSM_QCA_AR6003_1 0x300
+#endif
+
+#ifndef SDIO_DEVICE_ID_MSM_QCA_AR6003_2
+#define SDIO_DEVICE_ID_MSM_QCA_AR6003_2 0x301
+#endif
+
/*
* This hook just adds a quirk for all sdio devices
*/
@@ -51,6 +63,12 @@
SDIO_FIXUP(SDIO_VENDOR_ID_MSM, SDIO_DEVICE_ID_MSM_WCN1314,
remove_quirk, MMC_QUIRK_BROKEN_CLK_GATING),
+ SDIO_FIXUP(SDIO_VENDOR_ID_MSM_QCA, SDIO_DEVICE_ID_MSM_QCA_AR6003_1,
+ remove_quirk, MMC_QUIRK_BROKEN_CLK_GATING),
+
+ SDIO_FIXUP(SDIO_VENDOR_ID_MSM_QCA, SDIO_DEVICE_ID_MSM_QCA_AR6003_2,
+ remove_quirk, MMC_QUIRK_BROKEN_CLK_GATING),
+
SDIO_FIXUP(SDIO_VENDOR_ID_TI, SDIO_DEVICE_ID_TI_WL1271,
add_quirk, MMC_QUIRK_NONSTD_FUNC_IF),
diff --git a/drivers/mmc/core/sdio.c b/drivers/mmc/core/sdio.c
index 39e6ce3..13fe3e6 100644
--- a/drivers/mmc/core/sdio.c
+++ b/drivers/mmc/core/sdio.c
@@ -707,7 +707,7 @@
}
if (!err && host->sdio_irqs)
- mmc_signal_sdio_irq(host);
+ wake_up_process(host->sdio_irq_thread);
mmc_release_host(host);
/*
diff --git a/drivers/mmc/core/sdio_irq.c b/drivers/mmc/core/sdio_irq.c
index d489233..c442907 100644
--- a/drivers/mmc/core/sdio_irq.c
+++ b/drivers/mmc/core/sdio_irq.c
@@ -27,18 +27,20 @@
#include "sdio_ops.h"
-static int process_sdio_pending_irqs(struct mmc_card *card)
+static int process_sdio_pending_irqs(struct mmc_host *host)
{
+ struct mmc_card *card = host->card;
int i, ret, count;
unsigned char pending;
struct sdio_func *func;
/*
* Optimization, if there is only 1 function interrupt registered
- * call irq handler directly
+ * and we know an IRQ was signaled then call irq handler directly.
+ * Otherwise do the full probe.
*/
func = card->sdio_single_irq;
- if (func) {
+ if (func && host->sdio_irq_pending) {
func->irq_handler(func);
return 1;
}
@@ -115,7 +117,8 @@
ret = __mmc_claim_host(host, &host->sdio_irq_thread_abort);
if (ret)
break;
- ret = process_sdio_pending_irqs(host->card);
+ ret = process_sdio_pending_irqs(host);
+ host->sdio_irq_pending = false;
mmc_release_host(host);
/*
diff --git a/drivers/mmc/host/msm_sdcc.c b/drivers/mmc/host/msm_sdcc.c
index 73a31716..0d11dca 100644
--- a/drivers/mmc/host/msm_sdcc.c
+++ b/drivers/mmc/host/msm_sdcc.c
@@ -1612,8 +1612,7 @@
if (!cmd->data || cmd->error) {
if (host->curr.data && host->dma.sg &&
host->is_dma_mode)
- msm_dmov_stop_cmd(host->dma.channel,
- &host->dma.hdr, 0);
+ msm_dmov_flush(host->dma.channel, 0);
else if (host->curr.data && host->sps.sg &&
host->is_sps_mode){
/* Stop current SPS transfer */
@@ -1766,8 +1765,7 @@
msmsdcc_data_err(host, data, status);
host->curr.data_xfered = 0;
if (host->dma.sg && host->is_dma_mode)
- msm_dmov_stop_cmd(host->dma.channel,
- &host->dma.hdr, 0);
+ msm_dmov_flush(host->dma.channel, 0);
else if (host->sps.sg && host->is_sps_mode) {
/* Stop current SPS transfer */
msmsdcc_sps_exit_curr_xfer(host);
@@ -4340,8 +4338,7 @@
mrq->data->error = -ETIMEDOUT;
host->curr.data_xfered = 0;
if (host->dma.sg && host->is_dma_mode) {
- msm_dmov_stop_cmd(host->dma.channel,
- &host->dma.hdr, 0);
+ msm_dmov_flush(host->dma.channel, 0);
} else if (host->sps.sg && host->is_sps_mode) {
/* Stop current SPS transfer */
msmsdcc_sps_exit_curr_xfer(host);
diff --git a/drivers/power/pm8921-charger.c b/drivers/power/pm8921-charger.c
index de5e741..e7797b1 100644
--- a/drivers/power/pm8921-charger.c
+++ b/drivers/power/pm8921-charger.c
@@ -1863,6 +1863,8 @@
chip->ext_charging = false;
chip->ext_charge_done = false;
bms_notify_check(chip);
+ /* Update battery charging LEDs and user space battery info */
+ power_supply_changed(&chip->batt_psy);
}
static void handle_start_ext_chg(struct pm8921_chg_chip *chip)
@@ -1917,6 +1919,8 @@
/* Start BMS */
schedule_delayed_work(&chip->eoc_work, delay);
wake_lock(&chip->eoc_wake_lock);
+ /* Update battery charging LEDs and user space battery info */
+ power_supply_changed(&chip->batt_psy);
}
static void turn_off_usb_ovp_fet(struct pm8921_chg_chip *chip)
diff --git a/drivers/tty/serial/msm_serial_hs.c b/drivers/tty/serial/msm_serial_hs.c
index f559160..d310381 100644
--- a/drivers/tty/serial/msm_serial_hs.c
+++ b/drivers/tty/serial/msm_serial_hs.c
@@ -769,8 +769,7 @@
*/
mb();
/* do discard flush */
- msm_dmov_stop_cmd(msm_uport->dma_rx_channel,
- &msm_uport->rx.xfer, 0);
+ msm_dmov_flush(msm_uport->dma_rx_channel, 0);
}
msm_hs_write(uport, UARTDM_IMR_ADDR, msm_uport->imr_reg);
@@ -831,8 +830,7 @@
if (msm_uport->rx.flush == FLUSH_NONE) {
wake_lock(&msm_uport->rx.wake_lock);
/* do discard flush */
- msm_dmov_stop_cmd(msm_uport->dma_rx_channel,
- &msm_uport->rx.xfer, 0);
+ msm_dmov_flush(msm_uport->dma_rx_channel, 0);
}
if (msm_uport->rx.flush != FLUSH_SHUTDOWN)
msm_uport->rx.flush = FLUSH_STOP;
diff --git a/drivers/tty/serial/msm_serial_hs_hwreg.h b/drivers/tty/serial/msm_serial_hs_hwreg.h
index 780a3c2..81f3d54 100644
--- a/drivers/tty/serial/msm_serial_hs_hwreg.h
+++ b/drivers/tty/serial/msm_serial_hs_hwreg.h
@@ -1,6 +1,6 @@
/* drivers/serial/msm_serial_hs_hwreg.h
*
- * Copyright (c) 2007-2009, Code Aurora Forum. All rights reserved.
+ * Copyright (c) 2007-2009, 2012, Code Aurora Forum. All rights reserved.
*
* All source code in this file is licensed under the following license
* except where indicated.
@@ -160,9 +160,12 @@
#define UARTDM_MR1_CTS_CTL_BMSK 0x40
#define UARTDM_MR1_RX_RDY_CTL_BMSK 0x80
-#define UARTDM_MR2_LOOP_MODE_BMSK 0x80
-#define UARTDM_MR2_ERROR_MODE_BMSK 0x40
-#define UARTDM_MR2_BITS_PER_CHAR_BMSK 0x30
+#define UARTDM_MR2_LOOP_MODE_BMSK 0x80
+#define UARTDM_MR2_ERROR_MODE_BMSK 0x40
+#define UARTDM_MR2_BITS_PER_CHAR_BMSK 0x30
+#define UARTDM_MR2_RX_ZERO_CHAR_OFF 0x100
+#define UARTDM_MR2_RX_ERROR_CHAR_OFF 0x200
+#define UARTDM_MR2_RX_BREAK_ZERO_CHAR_OFF 0x100
#define UARTDM_MR2_BITS_PER_CHAR_8 (0x3 << 4)
diff --git a/drivers/tty/serial/msm_serial_hs_lite.c b/drivers/tty/serial/msm_serial_hs_lite.c
index 787b826..62d25cf 100644
--- a/drivers/tty/serial/msm_serial_hs_lite.c
+++ b/drivers/tty/serial/msm_serial_hs_lite.c
@@ -1173,7 +1173,7 @@
{
struct uart_port *port;
unsigned int vid;
- int baud = 0, flow, bits, parity;
+ int baud = 0, flow, bits, parity, mr2;
int ret;
if (unlikely(co->index >= UART_NR || co->index < 0))
@@ -1208,6 +1208,12 @@
msm_hsl_set_baud_rate(port, baud);
ret = uart_set_options(port, co, baud, parity, bits, flow);
+
+ mr2 = msm_hsl_read(port, regmap[vid][UARTDM_MR2]);
+ mr2 |= UARTDM_MR2_RX_ERROR_CHAR_OFF;
+ mr2 |= UARTDM_MR2_RX_BREAK_ZERO_CHAR_OFF;
+ msm_hsl_write(port, mr2, regmap[vid][UARTDM_MR2]);
+
msm_hsl_reset(port);
/* Enable transmitter */
msm_hsl_write(port, CR_PROTECTION_EN, regmap[vid][UARTDM_CR]);
diff --git a/drivers/usb/gadget/ci13xxx_udc.c b/drivers/usb/gadget/ci13xxx_udc.c
index d754a88..b612a0b 100644
--- a/drivers/usb/gadget/ci13xxx_udc.c
+++ b/drivers/usb/gadget/ci13xxx_udc.c
@@ -3273,15 +3273,6 @@
udc->gadget.dev.parent = dev;
udc->gadget.dev.release = udc_release;
- retval = hw_device_init(regs);
- if (retval < 0)
- goto free_udc;
-
- for (i = 0; i < hw_ep_max; i++) {
- struct ci13xxx_ep *mEp = &udc->ci13xxx_ep[i];
- INIT_LIST_HEAD(&mEp->ep.ep_list);
- }
-
udc->transceiver = otg_get_transceiver();
if (udc->udc_driver->flags & CI13XXX_REQUIRE_TRANSCEIVER) {
@@ -3291,6 +3282,15 @@
}
}
+ retval = hw_device_init(regs);
+ if (retval < 0)
+ goto put_transceiver;
+
+ for (i = 0; i < hw_ep_max; i++) {
+ struct ci13xxx_ep *mEp = &udc->ci13xxx_ep[i];
+ INIT_LIST_HEAD(&mEp->ep.ep_list);
+ }
+
if (!(udc->udc_driver->flags & CI13XXX_REGS_SHARED)) {
retval = hw_device_reset(udc);
if (retval)
diff --git a/drivers/usb/gadget/msm72k_udc.c b/drivers/usb/gadget/msm72k_udc.c
index 35ea497..863ddcd 100644
--- a/drivers/usb/gadget/msm72k_udc.c
+++ b/drivers/usb/gadget/msm72k_udc.c
@@ -2301,13 +2301,14 @@
static int msm72k_pullup(struct usb_gadget *_gadget, int is_active)
{
struct usb_info *ui = container_of(_gadget, struct usb_info, gadget);
+ struct msm_otg *otg = to_msm_otg(ui->xceiv);
unsigned long flags;
-
atomic_set(&ui->softconnect, is_active);
spin_lock_irqsave(&ui->lock, flags);
- if (ui->usb_state == USB_STATE_NOTATTACHED || ui->driver == NULL) {
+ if (ui->usb_state == USB_STATE_NOTATTACHED || ui->driver == NULL ||
+ atomic_read(&otg->chg_type) == USB_CHG_TYPE__WALLCHARGER) {
spin_unlock_irqrestore(&ui->lock, flags);
return 0;
}
diff --git a/drivers/usb/serial/usb_wwan.c b/drivers/usb/serial/usb_wwan.c
index 2a08101..94de730 100644
--- a/drivers/usb/serial/usb_wwan.c
+++ b/drivers/usb/serial/usb_wwan.c
@@ -734,6 +734,10 @@
}
}
+ spin_lock_irq(&intfdata->susp_lock);
+ intfdata->suspended = 0;
+ spin_unlock_irq(&intfdata->susp_lock);
+
for (i = 0; i < serial->num_ports; i++) {
/* walk all ports */
port = serial->port[i];
@@ -759,9 +763,6 @@
play_delayed(port);
spin_unlock_irq(&intfdata->susp_lock);
}
- spin_lock_irq(&intfdata->susp_lock);
- intfdata->suspended = 0;
- spin_unlock_irq(&intfdata->susp_lock);
err_out:
return err;
}
diff --git a/drivers/video/msm/mipi_NT35510.c b/drivers/video/msm/mipi_NT35510.c
index eaf1868..964df4e 100644
--- a/drivers/video/msm/mipi_NT35510.c
+++ b/drivers/video/msm/mipi_NT35510.c
@@ -418,6 +418,7 @@
static char video27[2] = {
0x35, 0x00,
};
+static char config_video_MADCTL[2] = {0x36, 0xC0};
static struct dsi_cmd_desc nt35510_video_display_on_cmds[] = {
{DTYPE_GEN_LWRITE, 1, 0, 0, 50, sizeof(video0), video0},
{DTYPE_GEN_LWRITE, 1, 0, 0, 50, sizeof(video1), video1},
@@ -453,11 +454,15 @@
display_on},
};
+static struct dsi_cmd_desc nt35510_video_display_on_cmds_rotate[] = {
+ {DTYPE_DCS_WRITE1, 1, 0, 0, 150,
+ sizeof(config_video_MADCTL), config_video_MADCTL},
+};
static int mipi_nt35510_lcd_on(struct platform_device *pdev)
{
struct msm_fb_data_type *mfd;
struct mipi_panel_info *mipi;
-
+ static int rotate;
mfd = platform_get_drvdata(pdev);
if (!mfd)
return -ENODEV;
@@ -467,10 +472,19 @@
mipi = &mfd->panel_info.mipi;
+ if (mipi_nt35510_pdata && mipi_nt35510_pdata->rotate_panel)
+ rotate = mipi_nt35510_pdata->rotate_panel();
+
if (mipi->mode == DSI_VIDEO_MODE) {
mipi_dsi_cmds_tx(mfd, &nt35510_tx_buf,
nt35510_video_display_on_cmds,
ARRAY_SIZE(nt35510_video_display_on_cmds));
+
+ if (rotate) {
+ mipi_dsi_cmds_tx(mfd, &nt35510_tx_buf,
+ nt35510_video_display_on_cmds_rotate,
+ ARRAY_SIZE(nt35510_video_display_on_cmds_rotate));
+ }
} else if (mipi->mode == DSI_CMD_MODE) {
mipi_dsi_cmds_tx(mfd, &nt35510_tx_buf,
nt35510_cmd_display_on_cmds,
diff --git a/drivers/video/msm/vidc/1080p/ddl/vcd_ddl.h b/drivers/video/msm/vidc/1080p/ddl/vcd_ddl.h
index 4a952c9..86f282e 100644
--- a/drivers/video/msm/vidc/1080p/ddl/vcd_ddl.h
+++ b/drivers/video/msm/vidc/1080p/ddl/vcd_ddl.h
@@ -84,6 +84,8 @@
#define DDL_MAX_NUM_IN_INPUTFRAME_POOL (DDL_MAX_NUM_OF_B_FRAME + 1)
+#define MDP_MIN_TILE_HEIGHT 96
+
enum ddl_mem_area {
DDL_FW_MEM = 0x0,
DDL_MM_MEM = 0x1,
diff --git a/drivers/video/msm/vidc/1080p/ddl/vcd_ddl_properties.c b/drivers/video/msm/vidc/1080p/ddl/vcd_ddl_properties.c
index a5192b0..363fe53 100644
--- a/drivers/video/msm/vidc/1080p/ddl/vcd_ddl_properties.c
+++ b/drivers/video/msm/vidc/1080p/ddl/vcd_ddl_properties.c
@@ -1869,6 +1869,19 @@
input_buf_req = &decoder->actual_input_buf_req;
min_dpb = decoder->min_dpb_num;
y_cb_cr_size = decoder->y_cb_cr_size;
+ if ((decoder->buf_format.buffer_format ==
+ VCD_BUFFER_FORMAT_TILE_4x2) &&
+ (frame_size->height < MDP_MIN_TILE_HEIGHT)) {
+ frame_size->height = MDP_MIN_TILE_HEIGHT;
+ ddl_calculate_stride(frame_size,
+ !decoder->progressive_only);
+ y_cb_cr_size = ddl_get_yuv_buffer_size(
+ frame_size,
+ &decoder->buf_format,
+ (!decoder->progressive_only),
+ decoder->hdr.decoding, NULL);
+ } else
+ y_cb_cr_size = decoder->y_cb_cr_size;
}
memset(output_buf_req, 0,
sizeof(struct vcd_buffer_requirement));
diff --git a/drivers/video/msm/vidc/720p/ddl/vcd_ddl_interrupt_handler.c b/drivers/video/msm/vidc/720p/ddl/vcd_ddl_interrupt_handler.c
index fe71dc1..5fa9b09 100644
--- a/drivers/video/msm/vidc/720p/ddl/vcd_ddl_interrupt_handler.c
+++ b/drivers/video/msm/vidc/720p/ddl/vcd_ddl_interrupt_handler.c
@@ -290,6 +290,8 @@
decoder->client_output_buf_req.actual_count
&& decoder->progressive_only)
need_reconfig = false;
+ if (input_vcd_frm->flags & VCD_FRAME_FLAG_EOS)
+ need_reconfig = false;
if ((input_vcd_frm->data_len <= seq_hdr_info.dec_frm_size ||
(input_vcd_frm->flags & VCD_FRAME_FLAG_CODECCONFIG)) &&
(!need_reconfig ||
diff --git a/drivers/video/msm/vidc/common/vcd/vcd_device_sm.c b/drivers/video/msm/vidc/common/vcd/vcd_device_sm.c
index 9576387..49d885c 100644
--- a/drivers/video/msm/vidc/common/vcd/vcd_device_sm.c
+++ b/drivers/video/msm/vidc/common/vcd/vcd_device_sm.c
@@ -954,6 +954,9 @@
u32 rc = VCD_S_SUCCESS;
u32 client_inited = false;
u32 fail_all_open = false;
+ struct ddl_context *ddl_context;
+
+ ddl_context = ddl_get_context();
VCD_MSG_LOW("vcd_dev_cb_in_initing:");
@@ -1027,6 +1030,8 @@
tmp_client = client;
client = client->next;
+ if (tmp_client == dev_ctxt->cctxt_list_head)
+ fail_all_open = true;
vcd_destroy_client_context(tmp_client);
}
@@ -1035,6 +1040,10 @@
if (!client_inited || fail_all_open) {
VCD_MSG_ERROR("All client open requests failed");
+ DDL_IDLE(ddl_context);
+
+ vcd_handle_device_init_failed(drv_ctxt,
+ DEVICE_STATE_EVENT_NUMBER(close));
dev_ctxt->pending_cmd = VCD_CMD_DEVICE_TERM;
} else {
if (vcd_power_event(dev_ctxt, NULL,
diff --git a/include/linux/mmc/host.h b/include/linux/mmc/host.h
index a2ee306..c9a17de 100644
--- a/include/linux/mmc/host.h
+++ b/include/linux/mmc/host.h
@@ -317,6 +317,7 @@
unsigned int sdio_irqs;
struct task_struct *sdio_irq_thread;
+ bool sdio_irq_pending;
atomic_t sdio_irq_thread_abort;
mmc_pm_flag_t pm_flags; /* requested pm features */
@@ -411,6 +412,7 @@
static inline void mmc_signal_sdio_irq(struct mmc_host *host)
{
host->ops->enable_sdio_irq(host, 0);
+ host->sdio_irq_pending = true;
wake_up_process(host->sdio_irq_thread);
}
diff --git a/sound/soc/msm/msm8660-apq-wm8903.c b/sound/soc/msm/msm8660-apq-wm8903.c
index 15a01d7..e697c3f 100644
--- a/sound/soc/msm/msm8660-apq-wm8903.c
+++ b/sound/soc/msm/msm8660-apq-wm8903.c
@@ -1,4 +1,4 @@
-/* Copyright (c) 2011, Code Aurora Forum. All rights reserved.
+/* Copyright (c) 2011-2012, Code Aurora Forum. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -188,7 +188,7 @@
return ret;
}
- wm8903_mclk = clk_get(NULL, "i2s_mic_osr_clk");
+ wm8903_mclk = clk_get_sys(NULL, "i2s_mic_osr_clk");
if (IS_ERR(wm8903_mclk)) {
pr_err("Failed to get i2s_mic_osr_clk\n");
gpio_free(MSM_CDC_MIC_I2S_MCLK);
@@ -308,7 +308,7 @@
pr_err("cpu_dai set_fmt error\n");
return ret;
}
- spkr_osr_clk = clk_get(NULL, "i2s_spkr_osr_clk");
+ spkr_osr_clk = clk_get_sys(NULL, "i2s_spkr_osr_clk");
if (IS_ERR(spkr_osr_clk)) {
pr_err("Failed to get i2s_spkr_osr_clk\n");
return PTR_ERR(spkr_osr_clk);
@@ -320,7 +320,7 @@
clk_put(spkr_osr_clk);
return ret;
}
- spkr_bit_clk = clk_get(NULL, "i2s_spkr_bit_clk");
+ spkr_bit_clk = clk_get_sys(NULL, "i2s_spkr_bit_clk");
if (IS_ERR(spkr_bit_clk)) {
pr_err("Failed to get i2s_spkr_bit_clk\n");
clk_disable_unprepare(spkr_osr_clk);
@@ -351,7 +351,7 @@
return ret;
}
- mic_bit_clk = clk_get(NULL, "i2s_mic_bit_clk");
+ mic_bit_clk = clk_get_sys(NULL, "i2s_mic_bit_clk");
if (IS_ERR(mic_bit_clk)) {
pr_err("Failed to get i2s_mic_bit_clk\n");
return PTR_ERR(mic_bit_clk);