| commit | 249c0e64c24bf455a4e4815f72750f2b16cedd94 | [log] [tgz] |
|---|---|---|
| author | Zhenyu Wang <zhenyuw@linux.intel.com> | Fri Jul 24 01:00:29 2009 +0800 |
| committer | Eric Anholt <eric@anholt.net> | Wed Jul 29 15:16:01 2009 -0700 |
| tree | 0a75d3f0f48acdd5341a9670dc7c860af7669940 | |
| parent | 24f119c769bacac5729297b682fec7811a983cc6 [diff] |
drm/i915: fix issue in display pipe setup on IGDNG During pipe DPMS off, instead of busy waiting pipe off, insert delays during wait and don't loop after enough tries which matches spec requirement. Also try to match DPMS on path by disable FDI TX PLL in DPMS off. Disable PF by writing PF_WIN_SZ which really trigger the update. Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com> Signed-off-by: Eric Anholt <eric@anholt.net>