[MIPS] merge GT64111 PCI routines and GT64120 PCI_0 routines
This patch has merged GT64111 PCI routines and GT64120 PCI_0 routines.
GT64111 PCI is almost the same as GT64120's PCI_0.
This patch don't change GT64120 PCI routines.
Signed-off-by: Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
diff --git a/arch/mips/pci/Makefile b/arch/mips/pci/Makefile
index bf85995..df487c0 100644
--- a/arch/mips/pci/Makefile
+++ b/arch/mips/pci/Makefile
@@ -8,8 +8,7 @@
# PCI bus host bridge specific code
#
obj-$(CONFIG_MIPS_BONITO64) += ops-bonito64.o
-obj-$(CONFIG_MIPS_GT64111) += ops-gt64111.o
-obj-$(CONFIG_MIPS_GT64120) += ops-gt64120.o
+obj-$(CONFIG_PCI_GT64XXX_PCI0) += ops-gt64xxx_pci0.o
obj-$(CONFIG_PCI_MARVELL) += ops-marvell.o
obj-$(CONFIG_MIPS_MSC) += ops-msc.o
obj-$(CONFIG_MIPS_NILE4) += ops-nile4.o