ASoC: wcd9310: Fix DMIC current leakage after disable
Observed after disabling DMIC path, some DMICs observe
power leakage of around 2mA and affecting power numbers.
This happens due to the DMIC clock runs off MCLK. 2 Stage
of Dividers are used to generate various DMIC Clock Freq.
Since the SW Enable/Disabling is async to MCLK, the Divider
will either hold the last stage 0 or 1.
Manually force the digital mic clock pin to GPIO mode from
functional mode through the TLMM mux option and force the value
of DMIC voltage to 0V. This will avoid any current leakage.
Change-Id: Id2018aee27c4b31b0de8a9094613c1b07fa1112d
CRs-Fixed: 504468
Signed-off-by: Laxminath Kasam <lkasam@codeaurora.org>
1 file changed