| commit | 2b4cebe4e165b0ef30a138e4cf602538dea15583 | [log] [tgz] |
|---|---|---|
| author | Ben Skeggs <bskeggs@redhat.com> | Tue Mar 29 09:56:14 2011 +1000 |
| committer | Ben Skeggs <bskeggs@redhat.com> | Tue Apr 05 11:38:02 2011 +1000 |
| tree | 35dc42629387e7e6922e74b3afb7b31c82aaf139 | |
| parent | c0929b499f834210561fe5e8c48bcad4f2130d25 [diff] |
drm/nv50: use "nv86" tlb flush method on everything except 0x50/0xac It has been reported that this greatly improves (and possibly fixes completely) the stability of NVA3+ chipsets. In traces of my NVA8, NVIDIA now appear to be doing this too. The most recent traces of 0x50 and 0xac I could find don't show NVIDIA checking PGRAPH status on these flushes, so for now, we won't either. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>