[POWERPC] spufs: fix class0 interrupt assignment
The class zero interrupt handling for spus was confusing alignment and
error interrupts, so swap them.
Signed-off-by: Arnd Bergmann <arnd.bergmann@de.ibm.com>
Signed-off-by: Paul Mackerras <paulus@samba.org>
diff --git a/arch/powerpc/platforms/cell/spu_base.c b/arch/powerpc/platforms/cell/spu_base.c
index db82f50..b306723 100644
--- a/arch/powerpc/platforms/cell/spu_base.c
+++ b/arch/powerpc/platforms/cell/spu_base.c
@@ -168,12 +168,12 @@
stat &= mask;
- if (stat & 1) /* invalid MFC DMA */
- __spu_trap_invalid_dma(spu);
-
- if (stat & 2) /* invalid DMA alignment */
+ if (stat & 1) /* invalid DMA alignment */
__spu_trap_dma_align(spu);
+ if (stat & 2) /* invalid MFC DMA */
+ __spu_trap_invalid_dma(spu);
+
if (stat & 4) /* error on SPU */
__spu_trap_error(spu);