Merge branch 'upstream-net26' of master.kernel.org:/pub/scm/linux/kernel/git/jgarzik/netdev-2.6
diff --git a/arch/powerpc/platforms/82xx/ep8248e.c b/arch/powerpc/platforms/82xx/ep8248e.c
index ba93d8a..d5770fd 100644
--- a/arch/powerpc/platforms/82xx/ep8248e.c
+++ b/arch/powerpc/platforms/82xx/ep8248e.c
@@ -138,7 +138,7 @@
bus->name = "ep8248e-mdio-bitbang";
bus->dev = &ofdev->dev;
- bus->id = res.start;
+ snprintf(bus->id, MII_BUS_ID_SIZE, "%x", res.start);
return mdiobus_register(bus);
}
diff --git a/arch/powerpc/platforms/pasemi/gpio_mdio.c b/arch/powerpc/platforms/pasemi/gpio_mdio.c
index b465429..ab69554 100644
--- a/arch/powerpc/platforms/pasemi/gpio_mdio.c
+++ b/arch/powerpc/platforms/pasemi/gpio_mdio.c
@@ -241,7 +241,7 @@
new_bus->reset = &gpio_mdio_reset;
prop = of_get_property(np, "reg", NULL);
- new_bus->id = *prop;
+ snprintf(new_bus->id, MII_BUS_ID_SIZE, "%x", *prop);
new_bus->priv = priv;
new_bus->phy_mask = 0;
diff --git a/arch/powerpc/sysdev/fsl_soc.c b/arch/powerpc/sysdev/fsl_soc.c
index 2c5388c..3581416 100644
--- a/arch/powerpc/sysdev/fsl_soc.c
+++ b/arch/powerpc/sysdev/fsl_soc.c
@@ -341,7 +341,7 @@
goto unreg;
}
- gfar_data.bus_id = 0;
+ snprintf(gfar_data.bus_id, MII_BUS_ID_SIZE, "0");
gfar_data.phy_id = fixed_link[0];
} else {
phy = of_find_node_by_phandle(*ph);
@@ -362,7 +362,8 @@
}
gfar_data.phy_id = *id;
- gfar_data.bus_id = res.start;
+ snprintf(gfar_data.bus_id, MII_BUS_ID_SIZE, "%x",
+ res.start);
of_node_put(phy);
of_node_put(mdio);
diff --git a/drivers/net/Kconfig b/drivers/net/Kconfig
index da30a31..45c3a20 100644
--- a/drivers/net/Kconfig
+++ b/drivers/net/Kconfig
@@ -1438,7 +1438,7 @@
config TC35815
tristate "TOSHIBA TC35815 Ethernet support"
depends on NET_PCI && PCI && MIPS
- select MII
+ select PHYLIB
config EEPRO100
tristate "EtherExpressPro/100 support (eepro100, original Becker driver)"
diff --git a/drivers/net/au1000_eth.c b/drivers/net/au1000_eth.c
index 504b7ce..3634b5f 100644
--- a/drivers/net/au1000_eth.c
+++ b/drivers/net/au1000_eth.c
@@ -701,7 +701,7 @@
aup->mii_bus.write = mdiobus_write;
aup->mii_bus.reset = mdiobus_reset;
aup->mii_bus.name = "au1000_eth_mii";
- aup->mii_bus.id = aup->mac_id;
+ snprintf(aup->mii_bus.id, MII_BUS_ID_SIZE, "%x", aup->mac_id);
aup->mii_bus.irq = kmalloc(sizeof(int)*PHY_MAX_ADDR, GFP_KERNEL);
for(i = 0; i < PHY_MAX_ADDR; ++i)
aup->mii_bus.irq[i] = PHY_POLL;
@@ -709,11 +709,11 @@
/* if known, set corresponding PHY IRQs */
#if defined(AU1XXX_PHY_STATIC_CONFIG)
# if defined(AU1XXX_PHY0_IRQ)
- if (AU1XXX_PHY0_BUSID == aup->mii_bus.id)
+ if (AU1XXX_PHY0_BUSID == aup->mac_id)
aup->mii_bus.irq[AU1XXX_PHY0_ADDR] = AU1XXX_PHY0_IRQ;
# endif
# if defined(AU1XXX_PHY1_IRQ)
- if (AU1XXX_PHY1_BUSID == aup->mii_bus.id)
+ if (AU1XXX_PHY1_BUSID == aup->mac_id)
aup->mii_bus.irq[AU1XXX_PHY1_ADDR] = AU1XXX_PHY1_IRQ;
# endif
#endif
diff --git a/drivers/net/bfin_mac.c b/drivers/net/bfin_mac.c
index 26b2dd5..717dcc1 100644
--- a/drivers/net/bfin_mac.c
+++ b/drivers/net/bfin_mac.c
@@ -969,7 +969,7 @@
lp->mii_bus.write = mdiobus_write;
lp->mii_bus.reset = mdiobus_reset;
lp->mii_bus.name = "bfin_mac_mdio";
- lp->mii_bus.id = 0;
+ snprintf(lp->mii_bus.id, MII_BUS_ID_SIZE, "0");
lp->mii_bus.irq = kmalloc(sizeof(int)*PHY_MAX_ADDR, GFP_KERNEL);
for (i = 0; i < PHY_MAX_ADDR; ++i)
lp->mii_bus.irq[i] = PHY_POLL;
diff --git a/drivers/net/bonding/bond_main.c b/drivers/net/bonding/bond_main.c
index ecfaf14..6e91b4b 100644
--- a/drivers/net/bonding/bond_main.c
+++ b/drivers/net/bonding/bond_main.c
@@ -3065,8 +3065,6 @@
#ifdef CONFIG_PROC_FS
-#define SEQ_START_TOKEN ((void *)1)
-
static void *bond_info_seq_start(struct seq_file *seq, loff_t *pos)
{
struct bonding *bond = seq->private;
diff --git a/drivers/net/cpmac.c b/drivers/net/cpmac.c
index c85194f..9da7ff4 100644
--- a/drivers/net/cpmac.c
+++ b/drivers/net/cpmac.c
@@ -987,7 +987,7 @@
static int __devinit cpmac_probe(struct platform_device *pdev)
{
int rc, phy_id, i;
- int mdio_bus_id = cpmac_mii.id;
+ char *mdio_bus_id = "0";
struct resource *mem;
struct cpmac_priv *priv;
struct net_device *dev;
@@ -1008,8 +1008,6 @@
if (external_switch || dumb_switch) {
struct fixed_phy_status status = {};
- mdio_bus_id = 0;
-
/*
* FIXME: this should be in the platform code!
* Since there is not platform code at all (that is,
@@ -1143,6 +1141,7 @@
}
cpmac_mii.phy_mask = ~(mask | 0x80000000);
+ snprintf(cpmac_mii.id, MII_BUS_ID_SIZE, "0");
res = mdiobus_register(&cpmac_mii);
if (res)
diff --git a/drivers/net/cxgb3/cxgb3_main.c b/drivers/net/cxgb3/cxgb3_main.c
index fd2e05b..05e5f59e 100644
--- a/drivers/net/cxgb3/cxgb3_main.c
+++ b/drivers/net/cxgb3/cxgb3_main.c
@@ -1014,8 +1014,8 @@
adapter->port[0]->mtu : 0xffff);
init_smt(adapter);
- /* Never mind if the next step fails */
- sysfs_create_group(&tdev->lldev->dev.kobj, &offload_attr_group);
+ if (sysfs_create_group(&tdev->lldev->dev.kobj, &offload_attr_group))
+ dev_dbg(&dev->dev, "cannot create sysfs group\n");
/* Call back all registered clients */
cxgb3_add_clients(tdev);
diff --git a/drivers/net/e1000/e1000.h b/drivers/net/e1000/e1000.h
index a05aa51..31feae1 100644
--- a/drivers/net/e1000/e1000.h
+++ b/drivers/net/e1000/e1000.h
@@ -161,13 +161,13 @@
struct sk_buff *skb;
dma_addr_t dma;
unsigned long time_stamp;
- uint16_t length;
- uint16_t next_to_watch;
+ u16 length;
+ u16 next_to_watch;
};
struct e1000_ps_page { struct page *ps_page[PS_PAGE_BUFFERS]; };
-struct e1000_ps_page_dma { uint64_t ps_page_dma[PS_PAGE_BUFFERS]; };
+struct e1000_ps_page_dma { u64 ps_page_dma[PS_PAGE_BUFFERS]; };
struct e1000_tx_ring {
/* pointer to the descriptor ring memory */
@@ -186,8 +186,8 @@
struct e1000_buffer *buffer_info;
spinlock_t tx_lock;
- uint16_t tdh;
- uint16_t tdt;
+ u16 tdh;
+ u16 tdt;
bool last_tx_tso;
};
@@ -213,8 +213,8 @@
/* cpu for rx queue */
int cpu;
- uint16_t rdh;
- uint16_t rdt;
+ u16 rdh;
+ u16 rdt;
};
#define E1000_DESC_UNUSED(R) \
@@ -237,14 +237,14 @@
struct timer_list watchdog_timer;
struct timer_list phy_info_timer;
struct vlan_group *vlgrp;
- uint16_t mng_vlan_id;
- uint32_t bd_number;
- uint32_t rx_buffer_len;
- uint32_t wol;
- uint32_t smartspeed;
- uint32_t en_mng_pt;
- uint16_t link_speed;
- uint16_t link_duplex;
+ u16 mng_vlan_id;
+ u32 bd_number;
+ u32 rx_buffer_len;
+ u32 wol;
+ u32 smartspeed;
+ u32 en_mng_pt;
+ u16 link_speed;
+ u16 link_duplex;
spinlock_t stats_lock;
#ifdef CONFIG_E1000_NAPI
spinlock_t tx_queue_lock;
@@ -254,13 +254,13 @@
unsigned int total_rx_bytes;
unsigned int total_rx_packets;
/* Interrupt Throttle Rate */
- uint32_t itr;
- uint32_t itr_setting;
- uint16_t tx_itr;
- uint16_t rx_itr;
+ u32 itr;
+ u32 itr_setting;
+ u16 tx_itr;
+ u16 rx_itr;
struct work_struct reset_task;
- uint8_t fc_autoneg;
+ u8 fc_autoneg;
struct timer_list blink_timer;
unsigned long led_status;
@@ -269,18 +269,18 @@
struct e1000_tx_ring *tx_ring; /* One per active queue */
unsigned int restart_queue;
unsigned long tx_queue_len;
- uint32_t txd_cmd;
- uint32_t tx_int_delay;
- uint32_t tx_abs_int_delay;
- uint32_t gotcl;
- uint64_t gotcl_old;
- uint64_t tpt_old;
- uint64_t colc_old;
- uint32_t tx_timeout_count;
- uint32_t tx_fifo_head;
- uint32_t tx_head_addr;
- uint32_t tx_fifo_size;
- uint8_t tx_timeout_factor;
+ u32 txd_cmd;
+ u32 tx_int_delay;
+ u32 tx_abs_int_delay;
+ u32 gotcl;
+ u64 gotcl_old;
+ u64 tpt_old;
+ u64 colc_old;
+ u32 tx_timeout_count;
+ u32 tx_fifo_head;
+ u32 tx_head_addr;
+ u32 tx_fifo_size;
+ u8 tx_timeout_factor;
atomic_t tx_fifo_stall;
bool pcix_82544;
bool detect_tx_hung;
@@ -305,17 +305,17 @@
int num_tx_queues;
int num_rx_queues;
- uint64_t hw_csum_err;
- uint64_t hw_csum_good;
- uint64_t rx_hdr_split;
- uint32_t alloc_rx_buff_failed;
- uint32_t rx_int_delay;
- uint32_t rx_abs_int_delay;
+ u64 hw_csum_err;
+ u64 hw_csum_good;
+ u64 rx_hdr_split;
+ u32 alloc_rx_buff_failed;
+ u32 rx_int_delay;
+ u32 rx_abs_int_delay;
bool rx_csum;
unsigned int rx_ps_pages;
- uint32_t gorcl;
- uint64_t gorcl_old;
- uint16_t rx_ps_bsize0;
+ u32 gorcl;
+ u64 gorcl_old;
+ u16 rx_ps_bsize0;
/* OS defined structs */
@@ -329,7 +329,7 @@
struct e1000_phy_info phy_info;
struct e1000_phy_stats phy_stats;
- uint32_t test_icr;
+ u32 test_icr;
struct e1000_tx_ring test_tx_ring;
struct e1000_rx_ring test_rx_ring;
@@ -341,7 +341,7 @@
bool smart_power_down; /* phy smart power down */
bool quad_port_a;
unsigned long flags;
- uint32_t eeprom_wol;
+ u32 eeprom_wol;
};
enum e1000_state_t {
diff --git a/drivers/net/e1000/e1000_ethtool.c b/drivers/net/e1000/e1000_ethtool.c
index 05e1fb3..701531e 100644
--- a/drivers/net/e1000/e1000_ethtool.c
+++ b/drivers/net/e1000/e1000_ethtool.c
@@ -36,7 +36,7 @@
extern void e1000_down(struct e1000_adapter *adapter);
extern void e1000_reinit_locked(struct e1000_adapter *adapter);
extern void e1000_reset(struct e1000_adapter *adapter);
-extern int e1000_set_spd_dplx(struct e1000_adapter *adapter, uint16_t spddplx);
+extern int e1000_set_spd_dplx(struct e1000_adapter *adapter, u16 spddplx);
extern int e1000_setup_all_rx_resources(struct e1000_adapter *adapter);
extern int e1000_setup_all_tx_resources(struct e1000_adapter *adapter);
extern void e1000_free_all_rx_resources(struct e1000_adapter *adapter);
@@ -289,7 +289,7 @@
return retval;
}
-static uint32_t
+static u32
e1000_get_rx_csum(struct net_device *netdev)
{
struct e1000_adapter *adapter = netdev_priv(netdev);
@@ -297,7 +297,7 @@
}
static int
-e1000_set_rx_csum(struct net_device *netdev, uint32_t data)
+e1000_set_rx_csum(struct net_device *netdev, u32 data)
{
struct e1000_adapter *adapter = netdev_priv(netdev);
adapter->rx_csum = data;
@@ -309,14 +309,14 @@
return 0;
}
-static uint32_t
+static u32
e1000_get_tx_csum(struct net_device *netdev)
{
return (netdev->features & NETIF_F_HW_CSUM) != 0;
}
static int
-e1000_set_tx_csum(struct net_device *netdev, uint32_t data)
+e1000_set_tx_csum(struct net_device *netdev, u32 data)
{
struct e1000_adapter *adapter = netdev_priv(netdev);
@@ -335,7 +335,7 @@
}
static int
-e1000_set_tso(struct net_device *netdev, uint32_t data)
+e1000_set_tso(struct net_device *netdev, u32 data)
{
struct e1000_adapter *adapter = netdev_priv(netdev);
if ((adapter->hw.mac_type < e1000_82544) ||
@@ -357,7 +357,7 @@
return 0;
}
-static uint32_t
+static u32
e1000_get_msglevel(struct net_device *netdev)
{
struct e1000_adapter *adapter = netdev_priv(netdev);
@@ -365,7 +365,7 @@
}
static void
-e1000_set_msglevel(struct net_device *netdev, uint32_t data)
+e1000_set_msglevel(struct net_device *netdev, u32 data)
{
struct e1000_adapter *adapter = netdev_priv(netdev);
adapter->msg_enable = data;
@@ -375,7 +375,7 @@
e1000_get_regs_len(struct net_device *netdev)
{
#define E1000_REGS_LEN 32
- return E1000_REGS_LEN * sizeof(uint32_t);
+ return E1000_REGS_LEN * sizeof(u32);
}
static void
@@ -384,10 +384,10 @@
{
struct e1000_adapter *adapter = netdev_priv(netdev);
struct e1000_hw *hw = &adapter->hw;
- uint32_t *regs_buff = p;
- uint16_t phy_data;
+ u32 *regs_buff = p;
+ u16 phy_data;
- memset(p, 0, E1000_REGS_LEN * sizeof(uint32_t));
+ memset(p, 0, E1000_REGS_LEN * sizeof(u32));
regs->version = (1 << 24) | (hw->revision_id << 16) | hw->device_id;
@@ -412,44 +412,44 @@
IGP01E1000_PHY_AGC_A);
e1000_read_phy_reg(hw, IGP01E1000_PHY_AGC_A &
IGP01E1000_PHY_PAGE_SELECT, &phy_data);
- regs_buff[13] = (uint32_t)phy_data; /* cable length */
+ regs_buff[13] = (u32)phy_data; /* cable length */
e1000_write_phy_reg(hw, IGP01E1000_PHY_PAGE_SELECT,
IGP01E1000_PHY_AGC_B);
e1000_read_phy_reg(hw, IGP01E1000_PHY_AGC_B &
IGP01E1000_PHY_PAGE_SELECT, &phy_data);
- regs_buff[14] = (uint32_t)phy_data; /* cable length */
+ regs_buff[14] = (u32)phy_data; /* cable length */
e1000_write_phy_reg(hw, IGP01E1000_PHY_PAGE_SELECT,
IGP01E1000_PHY_AGC_C);
e1000_read_phy_reg(hw, IGP01E1000_PHY_AGC_C &
IGP01E1000_PHY_PAGE_SELECT, &phy_data);
- regs_buff[15] = (uint32_t)phy_data; /* cable length */
+ regs_buff[15] = (u32)phy_data; /* cable length */
e1000_write_phy_reg(hw, IGP01E1000_PHY_PAGE_SELECT,
IGP01E1000_PHY_AGC_D);
e1000_read_phy_reg(hw, IGP01E1000_PHY_AGC_D &
IGP01E1000_PHY_PAGE_SELECT, &phy_data);
- regs_buff[16] = (uint32_t)phy_data; /* cable length */
+ regs_buff[16] = (u32)phy_data; /* cable length */
regs_buff[17] = 0; /* extended 10bt distance (not needed) */
e1000_write_phy_reg(hw, IGP01E1000_PHY_PAGE_SELECT, 0x0);
e1000_read_phy_reg(hw, IGP01E1000_PHY_PORT_STATUS &
IGP01E1000_PHY_PAGE_SELECT, &phy_data);
- regs_buff[18] = (uint32_t)phy_data; /* cable polarity */
+ regs_buff[18] = (u32)phy_data; /* cable polarity */
e1000_write_phy_reg(hw, IGP01E1000_PHY_PAGE_SELECT,
IGP01E1000_PHY_PCS_INIT_REG);
e1000_read_phy_reg(hw, IGP01E1000_PHY_PCS_INIT_REG &
IGP01E1000_PHY_PAGE_SELECT, &phy_data);
- regs_buff[19] = (uint32_t)phy_data; /* cable polarity */
+ regs_buff[19] = (u32)phy_data; /* cable polarity */
regs_buff[20] = 0; /* polarity correction enabled (always) */
regs_buff[22] = 0; /* phy receive errors (unavailable) */
regs_buff[23] = regs_buff[18]; /* mdix mode */
e1000_write_phy_reg(hw, IGP01E1000_PHY_PAGE_SELECT, 0x0);
} else {
e1000_read_phy_reg(hw, M88E1000_PHY_SPEC_STATUS, &phy_data);
- regs_buff[13] = (uint32_t)phy_data; /* cable length */
+ regs_buff[13] = (u32)phy_data; /* cable length */
regs_buff[14] = 0; /* Dummy (to align w/ IGP phy reg dump) */
regs_buff[15] = 0; /* Dummy (to align w/ IGP phy reg dump) */
regs_buff[16] = 0; /* Dummy (to align w/ IGP phy reg dump) */
e1000_read_phy_reg(hw, M88E1000_PHY_SPEC_CTRL, &phy_data);
- regs_buff[17] = (uint32_t)phy_data; /* extended 10bt distance */
+ regs_buff[17] = (u32)phy_data; /* extended 10bt distance */
regs_buff[18] = regs_buff[13]; /* cable polarity */
regs_buff[19] = 0; /* Dummy (to align w/ IGP phy reg dump) */
regs_buff[20] = regs_buff[17]; /* polarity correction */
@@ -459,7 +459,7 @@
}
regs_buff[21] = adapter->phy_stats.idle_errors; /* phy idle errors */
e1000_read_phy_reg(hw, PHY_1000T_STATUS, &phy_data);
- regs_buff[24] = (uint32_t)phy_data; /* phy local receiver status */
+ regs_buff[24] = (u32)phy_data; /* phy local receiver status */
regs_buff[25] = regs_buff[24]; /* phy remote receiver status */
if (hw->mac_type >= e1000_82540 &&
hw->mac_type < e1000_82571 &&
@@ -477,14 +477,14 @@
static int
e1000_get_eeprom(struct net_device *netdev,
- struct ethtool_eeprom *eeprom, uint8_t *bytes)
+ struct ethtool_eeprom *eeprom, u8 *bytes)
{
struct e1000_adapter *adapter = netdev_priv(netdev);
struct e1000_hw *hw = &adapter->hw;
- uint16_t *eeprom_buff;
+ u16 *eeprom_buff;
int first_word, last_word;
int ret_val = 0;
- uint16_t i;
+ u16 i;
if (eeprom->len == 0)
return -EINVAL;
@@ -494,7 +494,7 @@
first_word = eeprom->offset >> 1;
last_word = (eeprom->offset + eeprom->len - 1) >> 1;
- eeprom_buff = kmalloc(sizeof(uint16_t) *
+ eeprom_buff = kmalloc(sizeof(u16) *
(last_word - first_word + 1), GFP_KERNEL);
if (!eeprom_buff)
return -ENOMEM;
@@ -514,7 +514,7 @@
for (i = 0; i < last_word - first_word + 1; i++)
le16_to_cpus(&eeprom_buff[i]);
- memcpy(bytes, (uint8_t *)eeprom_buff + (eeprom->offset & 1),
+ memcpy(bytes, (u8 *)eeprom_buff + (eeprom->offset & 1),
eeprom->len);
kfree(eeprom_buff);
@@ -523,14 +523,14 @@
static int
e1000_set_eeprom(struct net_device *netdev,
- struct ethtool_eeprom *eeprom, uint8_t *bytes)
+ struct ethtool_eeprom *eeprom, u8 *bytes)
{
struct e1000_adapter *adapter = netdev_priv(netdev);
struct e1000_hw *hw = &adapter->hw;
- uint16_t *eeprom_buff;
+ u16 *eeprom_buff;
void *ptr;
int max_len, first_word, last_word, ret_val = 0;
- uint16_t i;
+ u16 i;
if (eeprom->len == 0)
return -EOPNOTSUPP;
@@ -590,7 +590,7 @@
{
struct e1000_adapter *adapter = netdev_priv(netdev);
char firmware_version[32];
- uint16_t eeprom_data;
+ u16 eeprom_data;
strncpy(drvinfo->driver, e1000_driver_name, 32);
strncpy(drvinfo->version, e1000_driver_version, 32);
@@ -674,13 +674,13 @@
adapter->tx_ring = txdr;
adapter->rx_ring = rxdr;
- rxdr->count = max(ring->rx_pending,(uint32_t)E1000_MIN_RXD);
- rxdr->count = min(rxdr->count,(uint32_t)(mac_type < e1000_82544 ?
+ rxdr->count = max(ring->rx_pending,(u32)E1000_MIN_RXD);
+ rxdr->count = min(rxdr->count,(u32)(mac_type < e1000_82544 ?
E1000_MAX_RXD : E1000_MAX_82544_RXD));
rxdr->count = ALIGN(rxdr->count, REQ_RX_DESCRIPTOR_MULTIPLE);
- txdr->count = max(ring->tx_pending,(uint32_t)E1000_MIN_TXD);
- txdr->count = min(txdr->count,(uint32_t)(mac_type < e1000_82544 ?
+ txdr->count = max(ring->tx_pending,(u32)E1000_MIN_TXD);
+ txdr->count = min(txdr->count,(u32)(mac_type < e1000_82544 ?
E1000_MAX_TXD : E1000_MAX_82544_TXD));
txdr->count = ALIGN(txdr->count, REQ_TX_DESCRIPTOR_MULTIPLE);
@@ -728,13 +728,13 @@
return err;
}
-static bool reg_pattern_test(struct e1000_adapter *adapter, uint64_t *data,
- int reg, uint32_t mask, uint32_t write)
+static bool reg_pattern_test(struct e1000_adapter *adapter, u64 *data,
+ int reg, u32 mask, u32 write)
{
- static const uint32_t test[] =
+ static const u32 test[] =
{0x5A5A5A5A, 0xA5A5A5A5, 0x00000000, 0xFFFFFFFF};
- uint8_t __iomem *address = adapter->hw.hw_addr + reg;
- uint32_t read;
+ u8 __iomem *address = adapter->hw.hw_addr + reg;
+ u32 read;
int i;
for (i = 0; i < ARRAY_SIZE(test); i++) {
@@ -751,11 +751,11 @@
return false;
}
-static bool reg_set_and_check(struct e1000_adapter *adapter, uint64_t *data,
- int reg, uint32_t mask, uint32_t write)
+static bool reg_set_and_check(struct e1000_adapter *adapter, u64 *data,
+ int reg, u32 mask, u32 write)
{
- uint8_t __iomem *address = adapter->hw.hw_addr + reg;
- uint32_t read;
+ u8 __iomem *address = adapter->hw.hw_addr + reg;
+ u32 read;
writel(write & mask, address);
read = readl(address);
@@ -788,10 +788,10 @@
} while (0)
static int
-e1000_reg_test(struct e1000_adapter *adapter, uint64_t *data)
+e1000_reg_test(struct e1000_adapter *adapter, u64 *data)
{
- uint32_t value, before, after;
- uint32_t i, toggle;
+ u32 value, before, after;
+ u32 i, toggle;
/* The status register is Read Only, so a write should fail.
* Some bits that get toggled are ignored.
@@ -884,11 +884,11 @@
}
static int
-e1000_eeprom_test(struct e1000_adapter *adapter, uint64_t *data)
+e1000_eeprom_test(struct e1000_adapter *adapter, u64 *data)
{
- uint16_t temp;
- uint16_t checksum = 0;
- uint16_t i;
+ u16 temp;
+ u16 checksum = 0;
+ u16 i;
*data = 0;
/* Read and add up the contents of the EEPROM */
@@ -901,7 +901,7 @@
}
/* If Checksum is not Correct return error else test passed */
- if ((checksum != (uint16_t) EEPROM_SUM) && !(*data))
+ if ((checksum != (u16) EEPROM_SUM) && !(*data))
*data = 2;
return *data;
@@ -919,12 +919,12 @@
}
static int
-e1000_intr_test(struct e1000_adapter *adapter, uint64_t *data)
+e1000_intr_test(struct e1000_adapter *adapter, u64 *data)
{
struct net_device *netdev = adapter->netdev;
- uint32_t mask, i = 0;
+ u32 mask, i = 0;
bool shared_int = true;
- uint32_t irq = adapter->pdev->irq;
+ u32 irq = adapter->pdev->irq;
*data = 0;
@@ -1070,7 +1070,7 @@
struct e1000_tx_ring *txdr = &adapter->test_tx_ring;
struct e1000_rx_ring *rxdr = &adapter->test_rx_ring;
struct pci_dev *pdev = adapter->pdev;
- uint32_t rctl;
+ u32 rctl;
int i, ret_val;
/* Setup Tx descriptor ring and Tx buffers */
@@ -1096,8 +1096,8 @@
txdr->next_to_use = txdr->next_to_clean = 0;
E1000_WRITE_REG(&adapter->hw, TDBAL,
- ((uint64_t) txdr->dma & 0x00000000FFFFFFFF));
- E1000_WRITE_REG(&adapter->hw, TDBAH, ((uint64_t) txdr->dma >> 32));
+ ((u64) txdr->dma & 0x00000000FFFFFFFF));
+ E1000_WRITE_REG(&adapter->hw, TDBAH, ((u64) txdr->dma >> 32));
E1000_WRITE_REG(&adapter->hw, TDLEN,
txdr->count * sizeof(struct e1000_tx_desc));
E1000_WRITE_REG(&adapter->hw, TDH, 0);
@@ -1153,8 +1153,8 @@
rctl = E1000_READ_REG(&adapter->hw, RCTL);
E1000_WRITE_REG(&adapter->hw, RCTL, rctl & ~E1000_RCTL_EN);
E1000_WRITE_REG(&adapter->hw, RDBAL,
- ((uint64_t) rxdr->dma & 0xFFFFFFFF));
- E1000_WRITE_REG(&adapter->hw, RDBAH, ((uint64_t) rxdr->dma >> 32));
+ ((u64) rxdr->dma & 0xFFFFFFFF));
+ E1000_WRITE_REG(&adapter->hw, RDBAH, ((u64) rxdr->dma >> 32));
E1000_WRITE_REG(&adapter->hw, RDLEN, rxdr->size);
E1000_WRITE_REG(&adapter->hw, RDH, 0);
E1000_WRITE_REG(&adapter->hw, RDT, 0);
@@ -1202,7 +1202,7 @@
static void
e1000_phy_reset_clk_and_crs(struct e1000_adapter *adapter)
{
- uint16_t phy_reg;
+ u16 phy_reg;
/* Because we reset the PHY above, we need to re-force TX_CLK in the
* Extended PHY Specific Control Register to 25MHz clock. This
@@ -1226,8 +1226,8 @@
static int
e1000_nonintegrated_phy_loopback(struct e1000_adapter *adapter)
{
- uint32_t ctrl_reg;
- uint16_t phy_reg;
+ u32 ctrl_reg;
+ u16 phy_reg;
/* Setup the Device Control Register for PHY loopback test. */
@@ -1293,8 +1293,8 @@
static int
e1000_integrated_phy_loopback(struct e1000_adapter *adapter)
{
- uint32_t ctrl_reg = 0;
- uint32_t stat_reg = 0;
+ u32 ctrl_reg = 0;
+ u32 stat_reg = 0;
adapter->hw.autoneg = false;
@@ -1363,8 +1363,8 @@
static int
e1000_set_phy_loopback(struct e1000_adapter *adapter)
{
- uint16_t phy_reg = 0;
- uint16_t count = 0;
+ u16 phy_reg = 0;
+ u16 count = 0;
switch (adapter->hw.mac_type) {
case e1000_82543:
@@ -1416,7 +1416,7 @@
e1000_setup_loopback_test(struct e1000_adapter *adapter)
{
struct e1000_hw *hw = &adapter->hw;
- uint32_t rctl;
+ u32 rctl;
if (hw->media_type == e1000_media_type_fiber ||
hw->media_type == e1000_media_type_internal_serdes) {
@@ -1451,8 +1451,8 @@
e1000_loopback_cleanup(struct e1000_adapter *adapter)
{
struct e1000_hw *hw = &adapter->hw;
- uint32_t rctl;
- uint16_t phy_reg;
+ u32 rctl;
+ u16 phy_reg;
rctl = E1000_READ_REG(hw, RCTL);
rctl &= ~(E1000_RCTL_LBM_TCVR | E1000_RCTL_LBM_MAC);
@@ -1578,7 +1578,7 @@
}
static int
-e1000_loopback_test(struct e1000_adapter *adapter, uint64_t *data)
+e1000_loopback_test(struct e1000_adapter *adapter, u64 *data)
{
/* PHY loopback cannot be performed if SoL/IDER
* sessions are active */
@@ -1603,7 +1603,7 @@
}
static int
-e1000_link_test(struct e1000_adapter *adapter, uint64_t *data)
+e1000_link_test(struct e1000_adapter *adapter, u64 *data)
{
*data = 0;
if (adapter->hw.media_type == e1000_media_type_internal_serdes) {
@@ -1647,7 +1647,7 @@
static void
e1000_diag_test(struct net_device *netdev,
- struct ethtool_test *eth_test, uint64_t *data)
+ struct ethtool_test *eth_test, u64 *data)
{
struct e1000_adapter *adapter = netdev_priv(netdev);
bool if_running = netif_running(netdev);
@@ -1657,9 +1657,9 @@
/* Offline tests */
/* save speed, duplex, autoneg settings */
- uint16_t autoneg_advertised = adapter->hw.autoneg_advertised;
- uint8_t forced_speed_duplex = adapter->hw.forced_speed_duplex;
- uint8_t autoneg = adapter->hw.autoneg;
+ u16 autoneg_advertised = adapter->hw.autoneg_advertised;
+ u8 forced_speed_duplex = adapter->hw.forced_speed_duplex;
+ u8 autoneg = adapter->hw.autoneg;
DPRINTK(HW, INFO, "offline testing starting\n");
@@ -1877,7 +1877,7 @@
}
static int
-e1000_phys_id(struct net_device *netdev, uint32_t data)
+e1000_phys_id(struct net_device *netdev, u32 data)
{
struct e1000_adapter *adapter = netdev_priv(netdev);
@@ -1927,7 +1927,7 @@
static void
e1000_get_ethtool_stats(struct net_device *netdev,
- struct ethtool_stats *stats, uint64_t *data)
+ struct ethtool_stats *stats, u64 *data)
{
struct e1000_adapter *adapter = netdev_priv(netdev);
int i;
@@ -1936,15 +1936,15 @@
for (i = 0; i < E1000_GLOBAL_STATS_LEN; i++) {
char *p = (char *)adapter+e1000_gstrings_stats[i].stat_offset;
data[i] = (e1000_gstrings_stats[i].sizeof_stat ==
- sizeof(uint64_t)) ? *(uint64_t *)p : *(uint32_t *)p;
+ sizeof(u64)) ? *(u64 *)p : *(u32 *)p;
}
/* BUG_ON(i != E1000_STATS_LEN); */
}
static void
-e1000_get_strings(struct net_device *netdev, uint32_t stringset, uint8_t *data)
+e1000_get_strings(struct net_device *netdev, u32 stringset, u8 *data)
{
- uint8_t *p = data;
+ u8 *p = data;
int i;
switch (stringset) {
diff --git a/drivers/net/e1000/e1000_hw.c b/drivers/net/e1000/e1000_hw.c
index b642034..9a4b6cb 100644
--- a/drivers/net/e1000/e1000_hw.c
+++ b/drivers/net/e1000/e1000_hw.c
@@ -33,107 +33,107 @@
#include "e1000_hw.h"
-static int32_t e1000_swfw_sync_acquire(struct e1000_hw *hw, uint16_t mask);
-static void e1000_swfw_sync_release(struct e1000_hw *hw, uint16_t mask);
-static int32_t e1000_read_kmrn_reg(struct e1000_hw *hw, uint32_t reg_addr, uint16_t *data);
-static int32_t e1000_write_kmrn_reg(struct e1000_hw *hw, uint32_t reg_addr, uint16_t data);
-static int32_t e1000_get_software_semaphore(struct e1000_hw *hw);
+static s32 e1000_swfw_sync_acquire(struct e1000_hw *hw, u16 mask);
+static void e1000_swfw_sync_release(struct e1000_hw *hw, u16 mask);
+static s32 e1000_read_kmrn_reg(struct e1000_hw *hw, u32 reg_addr, u16 *data);
+static s32 e1000_write_kmrn_reg(struct e1000_hw *hw, u32 reg_addr, u16 data);
+static s32 e1000_get_software_semaphore(struct e1000_hw *hw);
static void e1000_release_software_semaphore(struct e1000_hw *hw);
-static uint8_t e1000_arc_subsystem_valid(struct e1000_hw *hw);
-static int32_t e1000_check_downshift(struct e1000_hw *hw);
-static int32_t e1000_check_polarity(struct e1000_hw *hw, e1000_rev_polarity *polarity);
+static u8 e1000_arc_subsystem_valid(struct e1000_hw *hw);
+static s32 e1000_check_downshift(struct e1000_hw *hw);
+static s32 e1000_check_polarity(struct e1000_hw *hw, e1000_rev_polarity *polarity);
static void e1000_clear_hw_cntrs(struct e1000_hw *hw);
static void e1000_clear_vfta(struct e1000_hw *hw);
-static int32_t e1000_commit_shadow_ram(struct e1000_hw *hw);
-static int32_t e1000_config_dsp_after_link_change(struct e1000_hw *hw,
+static s32 e1000_commit_shadow_ram(struct e1000_hw *hw);
+static s32 e1000_config_dsp_after_link_change(struct e1000_hw *hw,
bool link_up);
-static int32_t e1000_config_fc_after_link_up(struct e1000_hw *hw);
-static int32_t e1000_detect_gig_phy(struct e1000_hw *hw);
-static int32_t e1000_erase_ich8_4k_segment(struct e1000_hw *hw, uint32_t bank);
-static int32_t e1000_get_auto_rd_done(struct e1000_hw *hw);
-static int32_t e1000_get_cable_length(struct e1000_hw *hw, uint16_t *min_length, uint16_t *max_length);
-static int32_t e1000_get_hw_eeprom_semaphore(struct e1000_hw *hw);
-static int32_t e1000_get_phy_cfg_done(struct e1000_hw *hw);
-static int32_t e1000_get_software_flag(struct e1000_hw *hw);
-static int32_t e1000_ich8_cycle_init(struct e1000_hw *hw);
-static int32_t e1000_ich8_flash_cycle(struct e1000_hw *hw, uint32_t timeout);
-static int32_t e1000_id_led_init(struct e1000_hw *hw);
-static int32_t e1000_init_lcd_from_nvm_config_region(struct e1000_hw *hw, uint32_t cnf_base_addr, uint32_t cnf_size);
-static int32_t e1000_init_lcd_from_nvm(struct e1000_hw *hw);
+static s32 e1000_config_fc_after_link_up(struct e1000_hw *hw);
+static s32 e1000_detect_gig_phy(struct e1000_hw *hw);
+static s32 e1000_erase_ich8_4k_segment(struct e1000_hw *hw, u32 bank);
+static s32 e1000_get_auto_rd_done(struct e1000_hw *hw);
+static s32 e1000_get_cable_length(struct e1000_hw *hw, u16 *min_length, u16 *max_length);
+static s32 e1000_get_hw_eeprom_semaphore(struct e1000_hw *hw);
+static s32 e1000_get_phy_cfg_done(struct e1000_hw *hw);
+static s32 e1000_get_software_flag(struct e1000_hw *hw);
+static s32 e1000_ich8_cycle_init(struct e1000_hw *hw);
+static s32 e1000_ich8_flash_cycle(struct e1000_hw *hw, u32 timeout);
+static s32 e1000_id_led_init(struct e1000_hw *hw);
+static s32 e1000_init_lcd_from_nvm_config_region(struct e1000_hw *hw, u32 cnf_base_addr, u32 cnf_size);
+static s32 e1000_init_lcd_from_nvm(struct e1000_hw *hw);
static void e1000_init_rx_addrs(struct e1000_hw *hw);
static void e1000_initialize_hardware_bits(struct e1000_hw *hw);
static bool e1000_is_onboard_nvm_eeprom(struct e1000_hw *hw);
-static int32_t e1000_kumeran_lock_loss_workaround(struct e1000_hw *hw);
-static int32_t e1000_mng_enable_host_if(struct e1000_hw *hw);
-static int32_t e1000_mng_host_if_write(struct e1000_hw *hw, uint8_t *buffer, uint16_t length, uint16_t offset, uint8_t *sum);
-static int32_t e1000_mng_write_cmd_header(struct e1000_hw* hw, struct e1000_host_mng_command_header* hdr);
-static int32_t e1000_mng_write_commit(struct e1000_hw *hw);
-static int32_t e1000_phy_ife_get_info(struct e1000_hw *hw, struct e1000_phy_info *phy_info);
-static int32_t e1000_phy_igp_get_info(struct e1000_hw *hw, struct e1000_phy_info *phy_info);
-static int32_t e1000_read_eeprom_eerd(struct e1000_hw *hw, uint16_t offset, uint16_t words, uint16_t *data);
-static int32_t e1000_write_eeprom_eewr(struct e1000_hw *hw, uint16_t offset, uint16_t words, uint16_t *data);
-static int32_t e1000_poll_eerd_eewr_done(struct e1000_hw *hw, int eerd);
-static int32_t e1000_phy_m88_get_info(struct e1000_hw *hw, struct e1000_phy_info *phy_info);
+static s32 e1000_kumeran_lock_loss_workaround(struct e1000_hw *hw);
+static s32 e1000_mng_enable_host_if(struct e1000_hw *hw);
+static s32 e1000_mng_host_if_write(struct e1000_hw *hw, u8 *buffer, u16 length, u16 offset, u8 *sum);
+static s32 e1000_mng_write_cmd_header(struct e1000_hw* hw, struct e1000_host_mng_command_header* hdr);
+static s32 e1000_mng_write_commit(struct e1000_hw *hw);
+static s32 e1000_phy_ife_get_info(struct e1000_hw *hw, struct e1000_phy_info *phy_info);
+static s32 e1000_phy_igp_get_info(struct e1000_hw *hw, struct e1000_phy_info *phy_info);
+static s32 e1000_read_eeprom_eerd(struct e1000_hw *hw, u16 offset, u16 words, u16 *data);
+static s32 e1000_write_eeprom_eewr(struct e1000_hw *hw, u16 offset, u16 words, u16 *data);
+static s32 e1000_poll_eerd_eewr_done(struct e1000_hw *hw, int eerd);
+static s32 e1000_phy_m88_get_info(struct e1000_hw *hw, struct e1000_phy_info *phy_info);
static void e1000_put_hw_eeprom_semaphore(struct e1000_hw *hw);
-static int32_t e1000_read_ich8_byte(struct e1000_hw *hw, uint32_t index, uint8_t *data);
-static int32_t e1000_verify_write_ich8_byte(struct e1000_hw *hw, uint32_t index, uint8_t byte);
-static int32_t e1000_write_ich8_byte(struct e1000_hw *hw, uint32_t index, uint8_t byte);
-static int32_t e1000_read_ich8_word(struct e1000_hw *hw, uint32_t index, uint16_t *data);
-static int32_t e1000_read_ich8_data(struct e1000_hw *hw, uint32_t index, uint32_t size, uint16_t *data);
-static int32_t e1000_write_ich8_data(struct e1000_hw *hw, uint32_t index, uint32_t size, uint16_t data);
-static int32_t e1000_read_eeprom_ich8(struct e1000_hw *hw, uint16_t offset, uint16_t words, uint16_t *data);
-static int32_t e1000_write_eeprom_ich8(struct e1000_hw *hw, uint16_t offset, uint16_t words, uint16_t *data);
+static s32 e1000_read_ich8_byte(struct e1000_hw *hw, u32 index, u8 *data);
+static s32 e1000_verify_write_ich8_byte(struct e1000_hw *hw, u32 index, u8 byte);
+static s32 e1000_write_ich8_byte(struct e1000_hw *hw, u32 index, u8 byte);
+static s32 e1000_read_ich8_word(struct e1000_hw *hw, u32 index, u16 *data);
+static s32 e1000_read_ich8_data(struct e1000_hw *hw, u32 index, u32 size, u16 *data);
+static s32 e1000_write_ich8_data(struct e1000_hw *hw, u32 index, u32 size, u16 data);
+static s32 e1000_read_eeprom_ich8(struct e1000_hw *hw, u16 offset, u16 words, u16 *data);
+static s32 e1000_write_eeprom_ich8(struct e1000_hw *hw, u16 offset, u16 words, u16 *data);
static void e1000_release_software_flag(struct e1000_hw *hw);
-static int32_t e1000_set_d3_lplu_state(struct e1000_hw *hw, bool active);
-static int32_t e1000_set_d0_lplu_state(struct e1000_hw *hw, bool active);
-static int32_t e1000_set_pci_ex_no_snoop(struct e1000_hw *hw, uint32_t no_snoop);
+static s32 e1000_set_d3_lplu_state(struct e1000_hw *hw, bool active);
+static s32 e1000_set_d0_lplu_state(struct e1000_hw *hw, bool active);
+static s32 e1000_set_pci_ex_no_snoop(struct e1000_hw *hw, u32 no_snoop);
static void e1000_set_pci_express_master_disable(struct e1000_hw *hw);
-static int32_t e1000_wait_autoneg(struct e1000_hw *hw);
-static void e1000_write_reg_io(struct e1000_hw *hw, uint32_t offset, uint32_t value);
-static int32_t e1000_set_phy_type(struct e1000_hw *hw);
+static s32 e1000_wait_autoneg(struct e1000_hw *hw);
+static void e1000_write_reg_io(struct e1000_hw *hw, u32 offset, u32 value);
+static s32 e1000_set_phy_type(struct e1000_hw *hw);
static void e1000_phy_init_script(struct e1000_hw *hw);
-static int32_t e1000_setup_copper_link(struct e1000_hw *hw);
-static int32_t e1000_setup_fiber_serdes_link(struct e1000_hw *hw);
-static int32_t e1000_adjust_serdes_amplitude(struct e1000_hw *hw);
-static int32_t e1000_phy_force_speed_duplex(struct e1000_hw *hw);
-static int32_t e1000_config_mac_to_phy(struct e1000_hw *hw);
-static void e1000_raise_mdi_clk(struct e1000_hw *hw, uint32_t *ctrl);
-static void e1000_lower_mdi_clk(struct e1000_hw *hw, uint32_t *ctrl);
-static void e1000_shift_out_mdi_bits(struct e1000_hw *hw, uint32_t data,
- uint16_t count);
-static uint16_t e1000_shift_in_mdi_bits(struct e1000_hw *hw);
-static int32_t e1000_phy_reset_dsp(struct e1000_hw *hw);
-static int32_t e1000_write_eeprom_spi(struct e1000_hw *hw, uint16_t offset,
- uint16_t words, uint16_t *data);
-static int32_t e1000_write_eeprom_microwire(struct e1000_hw *hw,
- uint16_t offset, uint16_t words,
- uint16_t *data);
-static int32_t e1000_spi_eeprom_ready(struct e1000_hw *hw);
-static void e1000_raise_ee_clk(struct e1000_hw *hw, uint32_t *eecd);
-static void e1000_lower_ee_clk(struct e1000_hw *hw, uint32_t *eecd);
-static void e1000_shift_out_ee_bits(struct e1000_hw *hw, uint16_t data,
- uint16_t count);
-static int32_t e1000_write_phy_reg_ex(struct e1000_hw *hw, uint32_t reg_addr,
- uint16_t phy_data);
-static int32_t e1000_read_phy_reg_ex(struct e1000_hw *hw,uint32_t reg_addr,
- uint16_t *phy_data);
-static uint16_t e1000_shift_in_ee_bits(struct e1000_hw *hw, uint16_t count);
-static int32_t e1000_acquire_eeprom(struct e1000_hw *hw);
+static s32 e1000_setup_copper_link(struct e1000_hw *hw);
+static s32 e1000_setup_fiber_serdes_link(struct e1000_hw *hw);
+static s32 e1000_adjust_serdes_amplitude(struct e1000_hw *hw);
+static s32 e1000_phy_force_speed_duplex(struct e1000_hw *hw);
+static s32 e1000_config_mac_to_phy(struct e1000_hw *hw);
+static void e1000_raise_mdi_clk(struct e1000_hw *hw, u32 *ctrl);
+static void e1000_lower_mdi_clk(struct e1000_hw *hw, u32 *ctrl);
+static void e1000_shift_out_mdi_bits(struct e1000_hw *hw, u32 data,
+ u16 count);
+static u16 e1000_shift_in_mdi_bits(struct e1000_hw *hw);
+static s32 e1000_phy_reset_dsp(struct e1000_hw *hw);
+static s32 e1000_write_eeprom_spi(struct e1000_hw *hw, u16 offset,
+ u16 words, u16 *data);
+static s32 e1000_write_eeprom_microwire(struct e1000_hw *hw,
+ u16 offset, u16 words,
+ u16 *data);
+static s32 e1000_spi_eeprom_ready(struct e1000_hw *hw);
+static void e1000_raise_ee_clk(struct e1000_hw *hw, u32 *eecd);
+static void e1000_lower_ee_clk(struct e1000_hw *hw, u32 *eecd);
+static void e1000_shift_out_ee_bits(struct e1000_hw *hw, u16 data,
+ u16 count);
+static s32 e1000_write_phy_reg_ex(struct e1000_hw *hw, u32 reg_addr,
+ u16 phy_data);
+static s32 e1000_read_phy_reg_ex(struct e1000_hw *hw,u32 reg_addr,
+ u16 *phy_data);
+static u16 e1000_shift_in_ee_bits(struct e1000_hw *hw, u16 count);
+static s32 e1000_acquire_eeprom(struct e1000_hw *hw);
static void e1000_release_eeprom(struct e1000_hw *hw);
static void e1000_standby_eeprom(struct e1000_hw *hw);
-static int32_t e1000_set_vco_speed(struct e1000_hw *hw);
-static int32_t e1000_polarity_reversal_workaround(struct e1000_hw *hw);
-static int32_t e1000_set_phy_mode(struct e1000_hw *hw);
-static int32_t e1000_host_if_read_cookie(struct e1000_hw *hw, uint8_t *buffer);
-static uint8_t e1000_calculate_mng_checksum(char *buffer, uint32_t length);
-static int32_t e1000_configure_kmrn_for_10_100(struct e1000_hw *hw,
- uint16_t duplex);
-static int32_t e1000_configure_kmrn_for_1000(struct e1000_hw *hw);
+static s32 e1000_set_vco_speed(struct e1000_hw *hw);
+static s32 e1000_polarity_reversal_workaround(struct e1000_hw *hw);
+static s32 e1000_set_phy_mode(struct e1000_hw *hw);
+static s32 e1000_host_if_read_cookie(struct e1000_hw *hw, u8 *buffer);
+static u8 e1000_calculate_mng_checksum(char *buffer, u32 length);
+static s32 e1000_configure_kmrn_for_10_100(struct e1000_hw *hw,
+ u16 duplex);
+static s32 e1000_configure_kmrn_for_1000(struct e1000_hw *hw);
/* IGP cable length table */
static const
-uint16_t e1000_igp_cable_length_table[IGP01E1000_AGC_LENGTH_TABLE_SIZE] =
+u16 e1000_igp_cable_length_table[IGP01E1000_AGC_LENGTH_TABLE_SIZE] =
{ 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5,
5, 10, 10, 10, 10, 10, 10, 10, 20, 20, 20, 20, 20, 25, 25, 25,
25, 25, 25, 25, 30, 30, 30, 30, 40, 40, 40, 40, 40, 40, 40, 40,
@@ -144,7 +144,7 @@
110, 110, 110, 110, 110, 110, 120, 120, 120, 120, 120, 120, 120, 120, 120, 120};
static const
-uint16_t e1000_igp_2_cable_length_table[IGP02E1000_AGC_LENGTH_TABLE_SIZE] =
+u16 e1000_igp_2_cable_length_table[IGP02E1000_AGC_LENGTH_TABLE_SIZE] =
{ 0, 0, 0, 0, 0, 0, 0, 0, 3, 5, 8, 11, 13, 16, 18, 21,
0, 0, 0, 3, 6, 10, 13, 16, 19, 23, 26, 29, 32, 35, 38, 41,
6, 10, 14, 18, 22, 26, 30, 33, 37, 41, 44, 48, 51, 54, 58, 61,
@@ -159,7 +159,7 @@
*
* hw - Struct containing variables accessed by shared code
*****************************************************************************/
-static int32_t
+static s32
e1000_set_phy_type(struct e1000_hw *hw)
{
DEBUGFUNC("e1000_set_phy_type");
@@ -213,8 +213,8 @@
static void
e1000_phy_init_script(struct e1000_hw *hw)
{
- uint32_t ret_val;
- uint16_t phy_saved_data;
+ u32 ret_val;
+ u16 phy_saved_data;
DEBUGFUNC("e1000_phy_init_script");
@@ -272,7 +272,7 @@
e1000_write_phy_reg(hw, 0x2F5B, phy_saved_data);
if (hw->mac_type == e1000_82547) {
- uint16_t fused, fine, coarse;
+ u16 fused, fine, coarse;
/* Move to analog registers page */
e1000_read_phy_reg(hw, IGP01E1000_ANALOG_SPARE_FUSE_STATUS, &fused);
@@ -306,7 +306,7 @@
*
* hw - Struct containing variables accessed by shared code
*****************************************************************************/
-int32_t
+s32
e1000_set_mac_type(struct e1000_hw *hw)
{
DEBUGFUNC("e1000_set_mac_type");
@@ -477,7 +477,7 @@
void
e1000_set_media_type(struct e1000_hw *hw)
{
- uint32_t status;
+ u32 status;
DEBUGFUNC("e1000_set_media_type");
@@ -528,17 +528,17 @@
*
* hw - Struct containing variables accessed by shared code
*****************************************************************************/
-int32_t
+s32
e1000_reset_hw(struct e1000_hw *hw)
{
- uint32_t ctrl;
- uint32_t ctrl_ext;
- uint32_t icr;
- uint32_t manc;
- uint32_t led_ctrl;
- uint32_t timeout;
- uint32_t extcnf_ctrl;
- int32_t ret_val;
+ u32 ctrl;
+ u32 ctrl_ext;
+ u32 icr;
+ u32 manc;
+ u32 led_ctrl;
+ u32 timeout;
+ u32 extcnf_ctrl;
+ s32 ret_val;
DEBUGFUNC("e1000_reset_hw");
@@ -730,7 +730,7 @@
}
if (hw->mac_type == e1000_ich8lan) {
- uint32_t kab = E1000_READ_REG(hw, KABGTXD);
+ u32 kab = E1000_READ_REG(hw, KABGTXD);
kab |= E1000_KABGTXD_BGSQLBIAS;
E1000_WRITE_REG(hw, KABGTXD, kab);
}
@@ -752,10 +752,10 @@
{
if ((hw->mac_type >= e1000_82571) && (!hw->initialize_hw_bits_disable)) {
/* Settings common to all PCI-express silicon */
- uint32_t reg_ctrl, reg_ctrl_ext;
- uint32_t reg_tarc0, reg_tarc1;
- uint32_t reg_tctl;
- uint32_t reg_txdctl, reg_txdctl1;
+ u32 reg_ctrl, reg_ctrl_ext;
+ u32 reg_tarc0, reg_tarc1;
+ u32 reg_tctl;
+ u32 reg_txdctl, reg_txdctl1;
/* link autonegotiation/sync workarounds */
reg_tarc0 = E1000_READ_REG(hw, TARC0);
@@ -866,15 +866,15 @@
* configuration and flow control settings. Clears all on-chip counters. Leaves
* the transmit and receive units disabled and uninitialized.
*****************************************************************************/
-int32_t
+s32
e1000_init_hw(struct e1000_hw *hw)
{
- uint32_t ctrl;
- uint32_t i;
- int32_t ret_val;
- uint32_t mta_size;
- uint32_t reg_data;
- uint32_t ctrl_ext;
+ u32 ctrl;
+ u32 i;
+ s32 ret_val;
+ u32 mta_size;
+ u32 reg_data;
+ u32 ctrl_ext;
DEBUGFUNC("e1000_init_hw");
@@ -1020,7 +1020,7 @@
if (hw->mac_type == e1000_82573) {
- uint32_t gcr = E1000_READ_REG(hw, GCR);
+ u32 gcr = E1000_READ_REG(hw, GCR);
gcr |= E1000_GCR_L1_ACT_WITHOUT_L0S_RX;
E1000_WRITE_REG(hw, GCR, gcr);
}
@@ -1054,11 +1054,11 @@
*
* hw - Struct containing variables accessed by shared code.
*****************************************************************************/
-static int32_t
+static s32
e1000_adjust_serdes_amplitude(struct e1000_hw *hw)
{
- uint16_t eeprom_data;
- int32_t ret_val;
+ u16 eeprom_data;
+ s32 ret_val;
DEBUGFUNC("e1000_adjust_serdes_amplitude");
@@ -1100,12 +1100,12 @@
* established. Assumes the hardware has previously been reset and the
* transmitter and receiver are not enabled.
*****************************************************************************/
-int32_t
+s32
e1000_setup_link(struct e1000_hw *hw)
{
- uint32_t ctrl_ext;
- int32_t ret_val;
- uint16_t eeprom_data;
+ u32 ctrl_ext;
+ s32 ret_val;
+ u16 eeprom_data;
DEBUGFUNC("e1000_setup_link");
@@ -1233,15 +1233,15 @@
* link. Assumes the hardware has been previously reset and the transmitter
* and receiver are not enabled.
*****************************************************************************/
-static int32_t
+static s32
e1000_setup_fiber_serdes_link(struct e1000_hw *hw)
{
- uint32_t ctrl;
- uint32_t status;
- uint32_t txcw = 0;
- uint32_t i;
- uint32_t signal = 0;
- int32_t ret_val;
+ u32 ctrl;
+ u32 status;
+ u32 txcw = 0;
+ u32 i;
+ u32 signal = 0;
+ s32 ret_val;
DEBUGFUNC("e1000_setup_fiber_serdes_link");
@@ -1380,12 +1380,12 @@
*
* hw - Struct containing variables accessed by shared code
******************************************************************************/
-static int32_t
+static s32
e1000_copper_link_preconfig(struct e1000_hw *hw)
{
- uint32_t ctrl;
- int32_t ret_val;
- uint16_t phy_data;
+ u32 ctrl;
+ s32 ret_val;
+ u16 phy_data;
DEBUGFUNC("e1000_copper_link_preconfig");
@@ -1440,12 +1440,12 @@
*
* hw - Struct containing variables accessed by shared code
*********************************************************************/
-static int32_t
+static s32
e1000_copper_link_igp_setup(struct e1000_hw *hw)
{
- uint32_t led_ctrl;
- int32_t ret_val;
- uint16_t phy_data;
+ u32 led_ctrl;
+ s32 ret_val;
+ u16 phy_data;
DEBUGFUNC("e1000_copper_link_igp_setup");
@@ -1587,12 +1587,12 @@
*
* hw - Struct containing variables accessed by shared code
*********************************************************************/
-static int32_t
+static s32
e1000_copper_link_ggp_setup(struct e1000_hw *hw)
{
- int32_t ret_val;
- uint16_t phy_data;
- uint32_t reg_data;
+ s32 ret_val;
+ u16 phy_data;
+ u32 reg_data;
DEBUGFUNC("e1000_copper_link_ggp_setup");
@@ -1735,11 +1735,11 @@
*
* hw - Struct containing variables accessed by shared code
*********************************************************************/
-static int32_t
+static s32
e1000_copper_link_mgp_setup(struct e1000_hw *hw)
{
- int32_t ret_val;
- uint16_t phy_data;
+ s32 ret_val;
+ u16 phy_data;
DEBUGFUNC("e1000_copper_link_mgp_setup");
@@ -1839,11 +1839,11 @@
*
* hw - Struct containing variables accessed by shared code
*********************************************************************/
-static int32_t
+static s32
e1000_copper_link_autoneg(struct e1000_hw *hw)
{
- int32_t ret_val;
- uint16_t phy_data;
+ s32 ret_val;
+ u16 phy_data;
DEBUGFUNC("e1000_copper_link_autoneg");
@@ -1910,10 +1910,10 @@
*
* hw - Struct containing variables accessed by shared code
******************************************************************************/
-static int32_t
+static s32
e1000_copper_link_postconfig(struct e1000_hw *hw)
{
- int32_t ret_val;
+ s32 ret_val;
DEBUGFUNC("e1000_copper_link_postconfig");
if (hw->mac_type >= e1000_82544) {
@@ -1948,13 +1948,13 @@
*
* hw - Struct containing variables accessed by shared code
******************************************************************************/
-static int32_t
+static s32
e1000_setup_copper_link(struct e1000_hw *hw)
{
- int32_t ret_val;
- uint16_t i;
- uint16_t phy_data;
- uint16_t reg_data;
+ s32 ret_val;
+ u16 i;
+ u16 phy_data;
+ u16 reg_data;
DEBUGFUNC("e1000_setup_copper_link");
@@ -2062,12 +2062,12 @@
*
* hw - Struct containing variables accessed by shared code
******************************************************************************/
-static int32_t
-e1000_configure_kmrn_for_10_100(struct e1000_hw *hw, uint16_t duplex)
+static s32
+e1000_configure_kmrn_for_10_100(struct e1000_hw *hw, u16 duplex)
{
- int32_t ret_val = E1000_SUCCESS;
- uint32_t tipg;
- uint16_t reg_data;
+ s32 ret_val = E1000_SUCCESS;
+ u32 tipg;
+ u16 reg_data;
DEBUGFUNC("e1000_configure_kmrn_for_10_100");
@@ -2098,12 +2098,12 @@
return ret_val;
}
-static int32_t
+static s32
e1000_configure_kmrn_for_1000(struct e1000_hw *hw)
{
- int32_t ret_val = E1000_SUCCESS;
- uint16_t reg_data;
- uint32_t tipg;
+ s32 ret_val = E1000_SUCCESS;
+ u16 reg_data;
+ u32 tipg;
DEBUGFUNC("e1000_configure_kmrn_for_1000");
@@ -2135,12 +2135,12 @@
*
* hw - Struct containing variables accessed by shared code
******************************************************************************/
-int32_t
+s32
e1000_phy_setup_autoneg(struct e1000_hw *hw)
{
- int32_t ret_val;
- uint16_t mii_autoneg_adv_reg;
- uint16_t mii_1000t_ctrl_reg;
+ s32 ret_val;
+ u16 mii_autoneg_adv_reg;
+ u16 mii_1000t_ctrl_reg;
DEBUGFUNC("e1000_phy_setup_autoneg");
@@ -2284,15 +2284,15 @@
*
* hw - Struct containing variables accessed by shared code
******************************************************************************/
-static int32_t
+static s32
e1000_phy_force_speed_duplex(struct e1000_hw *hw)
{
- uint32_t ctrl;
- int32_t ret_val;
- uint16_t mii_ctrl_reg;
- uint16_t mii_status_reg;
- uint16_t phy_data;
- uint16_t i;
+ u32 ctrl;
+ s32 ret_val;
+ u16 mii_ctrl_reg;
+ u16 mii_status_reg;
+ u16 phy_data;
+ u16 i;
DEBUGFUNC("e1000_phy_force_speed_duplex");
@@ -2538,7 +2538,7 @@
void
e1000_config_collision_dist(struct e1000_hw *hw)
{
- uint32_t tctl, coll_dist;
+ u32 tctl, coll_dist;
DEBUGFUNC("e1000_config_collision_dist");
@@ -2565,12 +2565,12 @@
* The contents of the PHY register containing the needed information need to
* be passed in.
******************************************************************************/
-static int32_t
+static s32
e1000_config_mac_to_phy(struct e1000_hw *hw)
{
- uint32_t ctrl;
- int32_t ret_val;
- uint16_t phy_data;
+ u32 ctrl;
+ s32 ret_val;
+ u16 phy_data;
DEBUGFUNC("e1000_config_mac_to_phy");
@@ -2624,10 +2624,10 @@
* by the PHY rather than the MAC. Software must also configure these
* bits when link is forced on a fiber connection.
*****************************************************************************/
-int32_t
+s32
e1000_force_mac_fc(struct e1000_hw *hw)
{
- uint32_t ctrl;
+ u32 ctrl;
DEBUGFUNC("e1000_force_mac_fc");
@@ -2691,15 +2691,15 @@
* based on the flow control negotiated by the PHY. In TBI mode, the TFCE
* and RFCE bits will be automaticaly set to the negotiated flow control mode.
*****************************************************************************/
-static int32_t
+static s32
e1000_config_fc_after_link_up(struct e1000_hw *hw)
{
- int32_t ret_val;
- uint16_t mii_status_reg;
- uint16_t mii_nway_adv_reg;
- uint16_t mii_nway_lp_ability_reg;
- uint16_t speed;
- uint16_t duplex;
+ s32 ret_val;
+ u16 mii_status_reg;
+ u16 mii_nway_adv_reg;
+ u16 mii_nway_lp_ability_reg;
+ u16 speed;
+ u16 duplex;
DEBUGFUNC("e1000_config_fc_after_link_up");
@@ -2896,17 +2896,17 @@
*
* Called by any function that needs to check the link status of the adapter.
*****************************************************************************/
-int32_t
+s32
e1000_check_for_link(struct e1000_hw *hw)
{
- uint32_t rxcw = 0;
- uint32_t ctrl;
- uint32_t status;
- uint32_t rctl;
- uint32_t icr;
- uint32_t signal = 0;
- int32_t ret_val;
- uint16_t phy_data;
+ u32 rxcw = 0;
+ u32 ctrl;
+ u32 status;
+ u32 rctl;
+ u32 icr;
+ u32 signal = 0;
+ s32 ret_val;
+ u16 phy_data;
DEBUGFUNC("e1000_check_for_link");
@@ -3022,7 +3022,7 @@
* at gigabit speed, we turn on TBI compatibility.
*/
if (hw->tbi_compatibility_en) {
- uint16_t speed, duplex;
+ u16 speed, duplex;
ret_val = e1000_get_speed_and_duplex(hw, &speed, &duplex);
if (ret_val) {
DEBUGOUT("Error getting link speed and duplex\n");
@@ -3132,14 +3132,14 @@
* speed - Speed of the connection
* duplex - Duplex setting of the connection
*****************************************************************************/
-int32_t
+s32
e1000_get_speed_and_duplex(struct e1000_hw *hw,
- uint16_t *speed,
- uint16_t *duplex)
+ u16 *speed,
+ u16 *duplex)
{
- uint32_t status;
- int32_t ret_val;
- uint16_t phy_data;
+ u32 status;
+ s32 ret_val;
+ u16 phy_data;
DEBUGFUNC("e1000_get_speed_and_duplex");
@@ -3214,12 +3214,12 @@
*
* hw - Struct containing variables accessed by shared code
******************************************************************************/
-static int32_t
+static s32
e1000_wait_autoneg(struct e1000_hw *hw)
{
- int32_t ret_val;
- uint16_t i;
- uint16_t phy_data;
+ s32 ret_val;
+ u16 i;
+ u16 phy_data;
DEBUGFUNC("e1000_wait_autoneg");
DEBUGOUT("Waiting for Auto-Neg to complete.\n");
@@ -3251,7 +3251,7 @@
******************************************************************************/
static void
e1000_raise_mdi_clk(struct e1000_hw *hw,
- uint32_t *ctrl)
+ u32 *ctrl)
{
/* Raise the clock input to the Management Data Clock (by setting the MDC
* bit), and then delay 10 microseconds.
@@ -3269,7 +3269,7 @@
******************************************************************************/
static void
e1000_lower_mdi_clk(struct e1000_hw *hw,
- uint32_t *ctrl)
+ u32 *ctrl)
{
/* Lower the clock input to the Management Data Clock (by clearing the MDC
* bit), and then delay 10 microseconds.
@@ -3290,11 +3290,11 @@
******************************************************************************/
static void
e1000_shift_out_mdi_bits(struct e1000_hw *hw,
- uint32_t data,
- uint16_t count)
+ u32 data,
+ u16 count)
{
- uint32_t ctrl;
- uint32_t mask;
+ u32 ctrl;
+ u32 mask;
/* We need to shift "count" number of bits out to the PHY. So, the value
* in the "data" parameter will be shifted out to the PHY one bit at a
@@ -3338,12 +3338,12 @@
*
* Bits are shifted in in MSB to LSB order.
******************************************************************************/
-static uint16_t
+static u16
e1000_shift_in_mdi_bits(struct e1000_hw *hw)
{
- uint32_t ctrl;
- uint16_t data = 0;
- uint8_t i;
+ u32 ctrl;
+ u16 data = 0;
+ u8 i;
/* In order to read a register from the PHY, we need to shift in a total
* of 18 bits from the PHY. The first two bit (turnaround) times are used
@@ -3384,13 +3384,13 @@
return data;
}
-static int32_t
-e1000_swfw_sync_acquire(struct e1000_hw *hw, uint16_t mask)
+static s32
+e1000_swfw_sync_acquire(struct e1000_hw *hw, u16 mask)
{
- uint32_t swfw_sync = 0;
- uint32_t swmask = mask;
- uint32_t fwmask = mask << 16;
- int32_t timeout = 200;
+ u32 swfw_sync = 0;
+ u32 swmask = mask;
+ u32 fwmask = mask << 16;
+ s32 timeout = 200;
DEBUGFUNC("e1000_swfw_sync_acquire");
@@ -3429,10 +3429,10 @@
}
static void
-e1000_swfw_sync_release(struct e1000_hw *hw, uint16_t mask)
+e1000_swfw_sync_release(struct e1000_hw *hw, u16 mask)
{
- uint32_t swfw_sync;
- uint32_t swmask = mask;
+ u32 swfw_sync;
+ u32 swmask = mask;
DEBUGFUNC("e1000_swfw_sync_release");
@@ -3464,13 +3464,13 @@
* hw - Struct containing variables accessed by shared code
* reg_addr - address of the PHY register to read
******************************************************************************/
-int32_t
+s32
e1000_read_phy_reg(struct e1000_hw *hw,
- uint32_t reg_addr,
- uint16_t *phy_data)
+ u32 reg_addr,
+ u16 *phy_data)
{
- uint32_t ret_val;
- uint16_t swfw;
+ u32 ret_val;
+ u16 swfw;
DEBUGFUNC("e1000_read_phy_reg");
@@ -3488,7 +3488,7 @@
hw->phy_type == e1000_phy_igp_2) &&
(reg_addr > MAX_PHY_MULTI_PAGE_REG)) {
ret_val = e1000_write_phy_reg_ex(hw, IGP01E1000_PHY_PAGE_SELECT,
- (uint16_t)reg_addr);
+ (u16)reg_addr);
if (ret_val) {
e1000_swfw_sync_release(hw, swfw);
return ret_val;
@@ -3499,14 +3499,14 @@
/* Select Configuration Page */
if ((reg_addr & MAX_PHY_REG_ADDRESS) < GG82563_MIN_ALT_REG) {
ret_val = e1000_write_phy_reg_ex(hw, GG82563_PHY_PAGE_SELECT,
- (uint16_t)((uint16_t)reg_addr >> GG82563_PAGE_SHIFT));
+ (u16)((u16)reg_addr >> GG82563_PAGE_SHIFT));
} else {
/* Use Alternative Page Select register to access
* registers 30 and 31
*/
ret_val = e1000_write_phy_reg_ex(hw,
GG82563_PHY_PAGE_SELECT_ALT,
- (uint16_t)((uint16_t)reg_addr >> GG82563_PAGE_SHIFT));
+ (u16)((u16)reg_addr >> GG82563_PAGE_SHIFT));
}
if (ret_val) {
@@ -3523,13 +3523,13 @@
return ret_val;
}
-static int32_t
-e1000_read_phy_reg_ex(struct e1000_hw *hw, uint32_t reg_addr,
- uint16_t *phy_data)
+static s32
+e1000_read_phy_reg_ex(struct e1000_hw *hw, u32 reg_addr,
+ u16 *phy_data)
{
- uint32_t i;
- uint32_t mdic = 0;
- const uint32_t phy_addr = 1;
+ u32 i;
+ u32 mdic = 0;
+ const u32 phy_addr = 1;
DEBUGFUNC("e1000_read_phy_reg_ex");
@@ -3563,7 +3563,7 @@
DEBUGOUT("MDI Error\n");
return -E1000_ERR_PHY;
}
- *phy_data = (uint16_t) mdic;
+ *phy_data = (u16) mdic;
} else {
/* We must first send a preamble through the MDIO pin to signal the
* beginning of an MII instruction. This is done by sending 32
@@ -3603,12 +3603,12 @@
* reg_addr - address of the PHY register to write
* data - data to write to the PHY
******************************************************************************/
-int32_t
-e1000_write_phy_reg(struct e1000_hw *hw, uint32_t reg_addr,
- uint16_t phy_data)
+s32
+e1000_write_phy_reg(struct e1000_hw *hw, u32 reg_addr,
+ u16 phy_data)
{
- uint32_t ret_val;
- uint16_t swfw;
+ u32 ret_val;
+ u16 swfw;
DEBUGFUNC("e1000_write_phy_reg");
@@ -3626,7 +3626,7 @@
hw->phy_type == e1000_phy_igp_2) &&
(reg_addr > MAX_PHY_MULTI_PAGE_REG)) {
ret_val = e1000_write_phy_reg_ex(hw, IGP01E1000_PHY_PAGE_SELECT,
- (uint16_t)reg_addr);
+ (u16)reg_addr);
if (ret_val) {
e1000_swfw_sync_release(hw, swfw);
return ret_val;
@@ -3637,14 +3637,14 @@
/* Select Configuration Page */
if ((reg_addr & MAX_PHY_REG_ADDRESS) < GG82563_MIN_ALT_REG) {
ret_val = e1000_write_phy_reg_ex(hw, GG82563_PHY_PAGE_SELECT,
- (uint16_t)((uint16_t)reg_addr >> GG82563_PAGE_SHIFT));
+ (u16)((u16)reg_addr >> GG82563_PAGE_SHIFT));
} else {
/* Use Alternative Page Select register to access
* registers 30 and 31
*/
ret_val = e1000_write_phy_reg_ex(hw,
GG82563_PHY_PAGE_SELECT_ALT,
- (uint16_t)((uint16_t)reg_addr >> GG82563_PAGE_SHIFT));
+ (u16)((u16)reg_addr >> GG82563_PAGE_SHIFT));
}
if (ret_val) {
@@ -3661,13 +3661,13 @@
return ret_val;
}
-static int32_t
-e1000_write_phy_reg_ex(struct e1000_hw *hw, uint32_t reg_addr,
- uint16_t phy_data)
+static s32
+e1000_write_phy_reg_ex(struct e1000_hw *hw, u32 reg_addr,
+ u16 phy_data)
{
- uint32_t i;
- uint32_t mdic = 0;
- const uint32_t phy_addr = 1;
+ u32 i;
+ u32 mdic = 0;
+ const u32 phy_addr = 1;
DEBUGFUNC("e1000_write_phy_reg_ex");
@@ -3681,7 +3681,7 @@
* for the PHY register in the MDI Control register. The MAC will take
* care of interfacing with the PHY to send the desired data.
*/
- mdic = (((uint32_t) phy_data) |
+ mdic = (((u32) phy_data) |
(reg_addr << E1000_MDIC_REG_SHIFT) |
(phy_addr << E1000_MDIC_PHY_SHIFT) |
(E1000_MDIC_OP_WRITE));
@@ -3715,7 +3715,7 @@
mdic = ((PHY_TURNAROUND) | (reg_addr << 2) | (phy_addr << 7) |
(PHY_OP_WRITE << 12) | (PHY_SOF << 14));
mdic <<= 16;
- mdic |= (uint32_t) phy_data;
+ mdic |= (u32) phy_data;
e1000_shift_out_mdi_bits(hw, mdic, 32);
}
@@ -3723,13 +3723,13 @@
return E1000_SUCCESS;
}
-static int32_t
+static s32
e1000_read_kmrn_reg(struct e1000_hw *hw,
- uint32_t reg_addr,
- uint16_t *data)
+ u32 reg_addr,
+ u16 *data)
{
- uint32_t reg_val;
- uint16_t swfw;
+ u32 reg_val;
+ u16 swfw;
DEBUGFUNC("e1000_read_kmrn_reg");
if ((hw->mac_type == e1000_80003es2lan) &&
@@ -3750,19 +3750,19 @@
/* Read the data returned */
reg_val = E1000_READ_REG(hw, KUMCTRLSTA);
- *data = (uint16_t)reg_val;
+ *data = (u16)reg_val;
e1000_swfw_sync_release(hw, swfw);
return E1000_SUCCESS;
}
-static int32_t
+static s32
e1000_write_kmrn_reg(struct e1000_hw *hw,
- uint32_t reg_addr,
- uint16_t data)
+ u32 reg_addr,
+ u16 data)
{
- uint32_t reg_val;
- uint16_t swfw;
+ u32 reg_val;
+ u16 swfw;
DEBUGFUNC("e1000_write_kmrn_reg");
if ((hw->mac_type == e1000_80003es2lan) &&
@@ -3788,13 +3788,13 @@
*
* hw - Struct containing variables accessed by shared code
******************************************************************************/
-int32_t
+s32
e1000_phy_hw_reset(struct e1000_hw *hw)
{
- uint32_t ctrl, ctrl_ext;
- uint32_t led_ctrl;
- int32_t ret_val;
- uint16_t swfw;
+ u32 ctrl, ctrl_ext;
+ u32 led_ctrl;
+ s32 ret_val;
+ u16 swfw;
DEBUGFUNC("e1000_phy_hw_reset");
@@ -3882,11 +3882,11 @@
*
* Sets bit 15 of the MII Control register
******************************************************************************/
-int32_t
+s32
e1000_phy_reset(struct e1000_hw *hw)
{
- int32_t ret_val;
- uint16_t phy_data;
+ s32 ret_val;
+ u16 phy_data;
DEBUGFUNC("e1000_phy_reset");
@@ -3937,9 +3937,9 @@
void
e1000_phy_powerdown_workaround(struct e1000_hw *hw)
{
- int32_t reg;
- uint16_t phy_data;
- int32_t retry = 0;
+ s32 reg;
+ u16 phy_data;
+ s32 retry = 0;
DEBUGFUNC("e1000_phy_powerdown_workaround");
@@ -3987,13 +3987,13 @@
*
* hw - struct containing variables accessed by shared code
******************************************************************************/
-static int32_t
+static s32
e1000_kumeran_lock_loss_workaround(struct e1000_hw *hw)
{
- int32_t ret_val;
- int32_t reg;
- int32_t cnt;
- uint16_t phy_data;
+ s32 ret_val;
+ s32 reg;
+ s32 cnt;
+ u16 phy_data;
if (hw->kmrn_lock_loss_workaround_disabled)
return E1000_SUCCESS;
@@ -4040,11 +4040,11 @@
*
* hw - Struct containing variables accessed by shared code
******************************************************************************/
-static int32_t
+static s32
e1000_detect_gig_phy(struct e1000_hw *hw)
{
- int32_t phy_init_status, ret_val;
- uint16_t phy_id_high, phy_id_low;
+ s32 phy_init_status, ret_val;
+ u16 phy_id_high, phy_id_low;
bool match = false;
DEBUGFUNC("e1000_detect_gig_phy");
@@ -4076,14 +4076,14 @@
if (ret_val)
return ret_val;
- hw->phy_id = (uint32_t) (phy_id_high << 16);
+ hw->phy_id = (u32) (phy_id_high << 16);
udelay(20);
ret_val = e1000_read_phy_reg(hw, PHY_ID2, &phy_id_low);
if (ret_val)
return ret_val;
- hw->phy_id |= (uint32_t) (phy_id_low & PHY_REVISION_MASK);
- hw->phy_revision = (uint32_t) phy_id_low & ~PHY_REVISION_MASK;
+ hw->phy_id |= (u32) (phy_id_low & PHY_REVISION_MASK);
+ hw->phy_revision = (u32) phy_id_low & ~PHY_REVISION_MASK;
switch (hw->mac_type) {
case e1000_82543:
@@ -4136,10 +4136,10 @@
*
* hw - Struct containing variables accessed by shared code
******************************************************************************/
-static int32_t
+static s32
e1000_phy_reset_dsp(struct e1000_hw *hw)
{
- int32_t ret_val;
+ s32 ret_val;
DEBUGFUNC("e1000_phy_reset_dsp");
do {
@@ -4163,12 +4163,12 @@
* hw - Struct containing variables accessed by shared code
* phy_info - PHY information structure
******************************************************************************/
-static int32_t
+static s32
e1000_phy_igp_get_info(struct e1000_hw *hw,
struct e1000_phy_info *phy_info)
{
- int32_t ret_val;
- uint16_t phy_data, min_length, max_length, average;
+ s32 ret_val;
+ u16 phy_data, min_length, max_length, average;
e1000_rev_polarity polarity;
DEBUGFUNC("e1000_phy_igp_get_info");
@@ -4240,12 +4240,12 @@
* hw - Struct containing variables accessed by shared code
* phy_info - PHY information structure
******************************************************************************/
-static int32_t
+static s32
e1000_phy_ife_get_info(struct e1000_hw *hw,
struct e1000_phy_info *phy_info)
{
- int32_t ret_val;
- uint16_t phy_data;
+ s32 ret_val;
+ u16 phy_data;
e1000_rev_polarity polarity;
DEBUGFUNC("e1000_phy_ife_get_info");
@@ -4290,12 +4290,12 @@
* hw - Struct containing variables accessed by shared code
* phy_info - PHY information structure
******************************************************************************/
-static int32_t
+static s32
e1000_phy_m88_get_info(struct e1000_hw *hw,
struct e1000_phy_info *phy_info)
{
- int32_t ret_val;
- uint16_t phy_data;
+ s32 ret_val;
+ u16 phy_data;
e1000_rev_polarity polarity;
DEBUGFUNC("e1000_phy_m88_get_info");
@@ -4369,12 +4369,12 @@
* hw - Struct containing variables accessed by shared code
* phy_info - PHY information structure
******************************************************************************/
-int32_t
+s32
e1000_phy_get_info(struct e1000_hw *hw,
struct e1000_phy_info *phy_info)
{
- int32_t ret_val;
- uint16_t phy_data;
+ s32 ret_val;
+ u16 phy_data;
DEBUGFUNC("e1000_phy_get_info");
@@ -4415,7 +4415,7 @@
return e1000_phy_m88_get_info(hw, phy_info);
}
-int32_t
+s32
e1000_validate_mdi_setting(struct e1000_hw *hw)
{
DEBUGFUNC("e1000_validate_mdi_settings");
@@ -4436,13 +4436,13 @@
*
* hw - Struct containing variables accessed by shared code
*****************************************************************************/
-int32_t
+s32
e1000_init_eeprom_params(struct e1000_hw *hw)
{
struct e1000_eeprom_info *eeprom = &hw->eeprom;
- uint32_t eecd = E1000_READ_REG(hw, EECD);
- int32_t ret_val = E1000_SUCCESS;
- uint16_t eeprom_size;
+ u32 eecd = E1000_READ_REG(hw, EECD);
+ s32 ret_val = E1000_SUCCESS;
+ u16 eeprom_size;
DEBUGFUNC("e1000_init_eeprom_params");
@@ -4561,8 +4561,8 @@
break;
case e1000_ich8lan:
{
- int32_t i = 0;
- uint32_t flash_size = E1000_READ_ICH_FLASH_REG(hw, ICH_FLASH_GFPREG);
+ s32 i = 0;
+ u32 flash_size = E1000_READ_ICH_FLASH_REG(hw, ICH_FLASH_GFPREG);
eeprom->type = e1000_eeprom_ich8;
eeprom->use_eerd = false;
@@ -4586,7 +4586,7 @@
hw->flash_bank_size *= ICH_FLASH_SECTOR_SIZE;
- hw->flash_bank_size /= 2 * sizeof(uint16_t);
+ hw->flash_bank_size /= 2 * sizeof(u16);
break;
}
@@ -4611,7 +4611,7 @@
if (eeprom_size)
eeprom_size++;
} else {
- eeprom_size = (uint16_t)((eecd & E1000_EECD_SIZE_EX_MASK) >>
+ eeprom_size = (u16)((eecd & E1000_EECD_SIZE_EX_MASK) >>
E1000_EECD_SIZE_EX_SHIFT);
}
@@ -4628,7 +4628,7 @@
*****************************************************************************/
static void
e1000_raise_ee_clk(struct e1000_hw *hw,
- uint32_t *eecd)
+ u32 *eecd)
{
/* Raise the clock input to the EEPROM (by setting the SK bit), and then
* wait <delay> microseconds.
@@ -4647,7 +4647,7 @@
*****************************************************************************/
static void
e1000_lower_ee_clk(struct e1000_hw *hw,
- uint32_t *eecd)
+ u32 *eecd)
{
/* Lower the clock input to the EEPROM (by clearing the SK bit), and then
* wait 50 microseconds.
@@ -4667,12 +4667,12 @@
*****************************************************************************/
static void
e1000_shift_out_ee_bits(struct e1000_hw *hw,
- uint16_t data,
- uint16_t count)
+ u16 data,
+ u16 count)
{
struct e1000_eeprom_info *eeprom = &hw->eeprom;
- uint32_t eecd;
- uint32_t mask;
+ u32 eecd;
+ u32 mask;
/* We need to shift "count" bits out to the EEPROM. So, value in the
* "data" parameter will be shifted out to the EEPROM one bit at a time.
@@ -4718,13 +4718,13 @@
*
* hw - Struct containing variables accessed by shared code
*****************************************************************************/
-static uint16_t
+static u16
e1000_shift_in_ee_bits(struct e1000_hw *hw,
- uint16_t count)
+ u16 count)
{
- uint32_t eecd;
- uint32_t i;
- uint16_t data;
+ u32 eecd;
+ u32 i;
+ u16 data;
/* In order to read a register from the EEPROM, we need to shift 'count'
* bits in from the EEPROM. Bits are "shifted in" by raising the clock
@@ -4762,11 +4762,11 @@
* Lowers EEPROM clock. Clears input pin. Sets the chip select pin. This
* function should be called before issuing a command to the EEPROM.
*****************************************************************************/
-static int32_t
+static s32
e1000_acquire_eeprom(struct e1000_hw *hw)
{
struct e1000_eeprom_info *eeprom = &hw->eeprom;
- uint32_t eecd, i=0;
+ u32 eecd, i=0;
DEBUGFUNC("e1000_acquire_eeprom");
@@ -4825,7 +4825,7 @@
e1000_standby_eeprom(struct e1000_hw *hw)
{
struct e1000_eeprom_info *eeprom = &hw->eeprom;
- uint32_t eecd;
+ u32 eecd;
eecd = E1000_READ_REG(hw, EECD);
@@ -4873,7 +4873,7 @@
static void
e1000_release_eeprom(struct e1000_hw *hw)
{
- uint32_t eecd;
+ u32 eecd;
DEBUGFUNC("e1000_release_eeprom");
@@ -4921,11 +4921,11 @@
*
* hw - Struct containing variables accessed by shared code
*****************************************************************************/
-static int32_t
+static s32
e1000_spi_eeprom_ready(struct e1000_hw *hw)
{
- uint16_t retry_count = 0;
- uint8_t spi_stat_reg;
+ u16 retry_count = 0;
+ u8 spi_stat_reg;
DEBUGFUNC("e1000_spi_eeprom_ready");
@@ -4938,7 +4938,7 @@
do {
e1000_shift_out_ee_bits(hw, EEPROM_RDSR_OPCODE_SPI,
hw->eeprom.opcode_bits);
- spi_stat_reg = (uint8_t)e1000_shift_in_ee_bits(hw, 8);
+ spi_stat_reg = (u8)e1000_shift_in_ee_bits(hw, 8);
if (!(spi_stat_reg & EEPROM_STATUS_RDY_SPI))
break;
@@ -4967,14 +4967,14 @@
* data - word read from the EEPROM
* words - number of words to read
*****************************************************************************/
-int32_t
+s32
e1000_read_eeprom(struct e1000_hw *hw,
- uint16_t offset,
- uint16_t words,
- uint16_t *data)
+ u16 offset,
+ u16 words,
+ u16 *data)
{
struct e1000_eeprom_info *eeprom = &hw->eeprom;
- uint32_t i = 0;
+ u32 i = 0;
DEBUGFUNC("e1000_read_eeprom");
@@ -5012,8 +5012,8 @@
/* Set up the SPI or Microwire EEPROM for bit-bang reading. We have
* acquired the EEPROM at this point, so any returns should relase it */
if (eeprom->type == e1000_eeprom_spi) {
- uint16_t word_in;
- uint8_t read_opcode = EEPROM_READ_OPCODE_SPI;
+ u16 word_in;
+ u8 read_opcode = EEPROM_READ_OPCODE_SPI;
if (e1000_spi_eeprom_ready(hw)) {
e1000_release_eeprom(hw);
@@ -5028,7 +5028,7 @@
/* Send the READ command (opcode + addr) */
e1000_shift_out_ee_bits(hw, read_opcode, eeprom->opcode_bits);
- e1000_shift_out_ee_bits(hw, (uint16_t)(offset*2), eeprom->address_bits);
+ e1000_shift_out_ee_bits(hw, (u16)(offset*2), eeprom->address_bits);
/* Read the data. The address of the eeprom internally increments with
* each byte (spi) being read, saving on the overhead of eeprom setup
@@ -5044,7 +5044,7 @@
/* Send the READ command (opcode + addr) */
e1000_shift_out_ee_bits(hw, EEPROM_READ_OPCODE_MICROWIRE,
eeprom->opcode_bits);
- e1000_shift_out_ee_bits(hw, (uint16_t)(offset + i),
+ e1000_shift_out_ee_bits(hw, (u16)(offset + i),
eeprom->address_bits);
/* Read the data. For microwire, each word requires the overhead
@@ -5068,14 +5068,14 @@
* data - word read from the EEPROM
* words - number of words to read
*****************************************************************************/
-static int32_t
+static s32
e1000_read_eeprom_eerd(struct e1000_hw *hw,
- uint16_t offset,
- uint16_t words,
- uint16_t *data)
+ u16 offset,
+ u16 words,
+ u16 *data)
{
- uint32_t i, eerd = 0;
- int32_t error = 0;
+ u32 i, eerd = 0;
+ s32 error = 0;
for (i = 0; i < words; i++) {
eerd = ((offset+i) << E1000_EEPROM_RW_ADDR_SHIFT) +
@@ -5102,15 +5102,15 @@
* data - word read from the EEPROM
* words - number of words to read
*****************************************************************************/
-static int32_t
+static s32
e1000_write_eeprom_eewr(struct e1000_hw *hw,
- uint16_t offset,
- uint16_t words,
- uint16_t *data)
+ u16 offset,
+ u16 words,
+ u16 *data)
{
- uint32_t register_value = 0;
- uint32_t i = 0;
- int32_t error = 0;
+ u32 register_value = 0;
+ u32 i = 0;
+ s32 error = 0;
if (e1000_swfw_sync_acquire(hw, E1000_SWFW_EEP_SM))
return -E1000_ERR_SWFW_SYNC;
@@ -5143,12 +5143,12 @@
*
* hw - Struct containing variables accessed by shared code
*****************************************************************************/
-static int32_t
+static s32
e1000_poll_eerd_eewr_done(struct e1000_hw *hw, int eerd)
{
- uint32_t attempts = 100000;
- uint32_t i, reg = 0;
- int32_t done = E1000_ERR_EEPROM;
+ u32 attempts = 100000;
+ u32 i, reg = 0;
+ s32 done = E1000_ERR_EEPROM;
for (i = 0; i < attempts; i++) {
if (eerd == E1000_EEPROM_POLL_READ)
@@ -5174,7 +5174,7 @@
static bool
e1000_is_onboard_nvm_eeprom(struct e1000_hw *hw)
{
- uint32_t eecd = 0;
+ u32 eecd = 0;
DEBUGFUNC("e1000_is_onboard_nvm_eeprom");
@@ -5204,11 +5204,11 @@
* If the the sum of the 64 16 bit words is 0xBABA, the EEPROM's checksum is
* valid.
*****************************************************************************/
-int32_t
+s32
e1000_validate_eeprom_checksum(struct e1000_hw *hw)
{
- uint16_t checksum = 0;
- uint16_t i, eeprom_data;
+ u16 checksum = 0;
+ u16 i, eeprom_data;
DEBUGFUNC("e1000_validate_eeprom_checksum");
@@ -5252,7 +5252,7 @@
checksum += eeprom_data;
}
- if (checksum == (uint16_t) EEPROM_SUM)
+ if (checksum == (u16) EEPROM_SUM)
return E1000_SUCCESS;
else {
DEBUGOUT("EEPROM Checksum Invalid\n");
@@ -5268,12 +5268,12 @@
* Sums the first 63 16 bit words of the EEPROM. Subtracts the sum from 0xBABA.
* Writes the difference to word offset 63 of the EEPROM.
*****************************************************************************/
-int32_t
+s32
e1000_update_eeprom_checksum(struct e1000_hw *hw)
{
- uint32_t ctrl_ext;
- uint16_t checksum = 0;
- uint16_t i, eeprom_data;
+ u32 ctrl_ext;
+ u16 checksum = 0;
+ u16 i, eeprom_data;
DEBUGFUNC("e1000_update_eeprom_checksum");
@@ -5284,7 +5284,7 @@
}
checksum += eeprom_data;
}
- checksum = (uint16_t) EEPROM_SUM - checksum;
+ checksum = (u16) EEPROM_SUM - checksum;
if (e1000_write_eeprom(hw, EEPROM_CHECKSUM_REG, 1, &checksum) < 0) {
DEBUGOUT("EEPROM Write Error\n");
return -E1000_ERR_EEPROM;
@@ -5313,14 +5313,14 @@
* If e1000_update_eeprom_checksum is not called after this function, the
* EEPROM will most likely contain an invalid checksum.
*****************************************************************************/
-int32_t
+s32
e1000_write_eeprom(struct e1000_hw *hw,
- uint16_t offset,
- uint16_t words,
- uint16_t *data)
+ u16 offset,
+ u16 words,
+ u16 *data)
{
struct e1000_eeprom_info *eeprom = &hw->eeprom;
- int32_t status = 0;
+ s32 status = 0;
DEBUGFUNC("e1000_write_eeprom");
@@ -5370,19 +5370,19 @@
* data - pointer to array of 8 bit words to be written to the EEPROM
*
*****************************************************************************/
-static int32_t
+static s32
e1000_write_eeprom_spi(struct e1000_hw *hw,
- uint16_t offset,
- uint16_t words,
- uint16_t *data)
+ u16 offset,
+ u16 words,
+ u16 *data)
{
struct e1000_eeprom_info *eeprom = &hw->eeprom;
- uint16_t widx = 0;
+ u16 widx = 0;
DEBUGFUNC("e1000_write_eeprom_spi");
while (widx < words) {
- uint8_t write_opcode = EEPROM_WRITE_OPCODE_SPI;
+ u8 write_opcode = EEPROM_WRITE_OPCODE_SPI;
if (e1000_spi_eeprom_ready(hw)) return -E1000_ERR_EEPROM;
@@ -5401,14 +5401,14 @@
/* Send the Write command (8-bit opcode + addr) */
e1000_shift_out_ee_bits(hw, write_opcode, eeprom->opcode_bits);
- e1000_shift_out_ee_bits(hw, (uint16_t)((offset + widx)*2),
+ e1000_shift_out_ee_bits(hw, (u16)((offset + widx)*2),
eeprom->address_bits);
/* Send the data */
/* Loop to allow for up to whole page write (32 bytes) of eeprom */
while (widx < words) {
- uint16_t word_out = data[widx];
+ u16 word_out = data[widx];
word_out = (word_out >> 8) | (word_out << 8);
e1000_shift_out_ee_bits(hw, word_out, 16);
widx++;
@@ -5436,16 +5436,16 @@
* data - pointer to array of 16 bit words to be written to the EEPROM
*
*****************************************************************************/
-static int32_t
+static s32
e1000_write_eeprom_microwire(struct e1000_hw *hw,
- uint16_t offset,
- uint16_t words,
- uint16_t *data)
+ u16 offset,
+ u16 words,
+ u16 *data)
{
struct e1000_eeprom_info *eeprom = &hw->eeprom;
- uint32_t eecd;
- uint16_t words_written = 0;
- uint16_t i = 0;
+ u32 eecd;
+ u16 words_written = 0;
+ u16 i = 0;
DEBUGFUNC("e1000_write_eeprom_microwire");
@@ -5456,9 +5456,9 @@
* EEPROM into write/erase mode.
*/
e1000_shift_out_ee_bits(hw, EEPROM_EWEN_OPCODE_MICROWIRE,
- (uint16_t)(eeprom->opcode_bits + 2));
+ (u16)(eeprom->opcode_bits + 2));
- e1000_shift_out_ee_bits(hw, 0, (uint16_t)(eeprom->address_bits - 2));
+ e1000_shift_out_ee_bits(hw, 0, (u16)(eeprom->address_bits - 2));
/* Prepare the EEPROM */
e1000_standby_eeprom(hw);
@@ -5468,7 +5468,7 @@
e1000_shift_out_ee_bits(hw, EEPROM_WRITE_OPCODE_MICROWIRE,
eeprom->opcode_bits);
- e1000_shift_out_ee_bits(hw, (uint16_t)(offset + words_written),
+ e1000_shift_out_ee_bits(hw, (u16)(offset + words_written),
eeprom->address_bits);
/* Send the data */
@@ -5506,9 +5506,9 @@
* EEPROM out of write/erase mode.
*/
e1000_shift_out_ee_bits(hw, EEPROM_EWDS_OPCODE_MICROWIRE,
- (uint16_t)(eeprom->opcode_bits + 2));
+ (u16)(eeprom->opcode_bits + 2));
- e1000_shift_out_ee_bits(hw, 0, (uint16_t)(eeprom->address_bits - 2));
+ e1000_shift_out_ee_bits(hw, 0, (u16)(eeprom->address_bits - 2));
return E1000_SUCCESS;
}
@@ -5523,18 +5523,18 @@
* data - word read from the EEPROM
* words - number of words to read
*****************************************************************************/
-static int32_t
+static s32
e1000_commit_shadow_ram(struct e1000_hw *hw)
{
- uint32_t attempts = 100000;
- uint32_t eecd = 0;
- uint32_t flop = 0;
- uint32_t i = 0;
- int32_t error = E1000_SUCCESS;
- uint32_t old_bank_offset = 0;
- uint32_t new_bank_offset = 0;
- uint8_t low_byte = 0;
- uint8_t high_byte = 0;
+ u32 attempts = 100000;
+ u32 eecd = 0;
+ u32 flop = 0;
+ u32 i = 0;
+ s32 error = E1000_SUCCESS;
+ u32 old_bank_offset = 0;
+ u32 new_bank_offset = 0;
+ u8 low_byte = 0;
+ u8 high_byte = 0;
bool sector_write_failed = false;
if (hw->mac_type == e1000_82573) {
@@ -5595,7 +5595,7 @@
* in the other NVM bank or a modified value stored
* in the shadow RAM */
if (hw->eeprom_shadow_ram[i].modified) {
- low_byte = (uint8_t)hw->eeprom_shadow_ram[i].eeprom_word;
+ low_byte = (u8)hw->eeprom_shadow_ram[i].eeprom_word;
udelay(100);
error = e1000_verify_write_ich8_byte(hw,
(i << 1) + new_bank_offset, low_byte);
@@ -5604,7 +5604,7 @@
sector_write_failed = true;
else {
high_byte =
- (uint8_t)(hw->eeprom_shadow_ram[i].eeprom_word >> 8);
+ (u8)(hw->eeprom_shadow_ram[i].eeprom_word >> 8);
udelay(100);
}
} else {
@@ -5687,11 +5687,11 @@
*
* hw - Struct containing variables accessed by shared code
*****************************************************************************/
-int32_t
+s32
e1000_read_mac_addr(struct e1000_hw * hw)
{
- uint16_t offset;
- uint16_t eeprom_data, i;
+ u16 offset;
+ u16 eeprom_data, i;
DEBUGFUNC("e1000_read_mac_addr");
@@ -5701,8 +5701,8 @@
DEBUGOUT("EEPROM Read Error\n");
return -E1000_ERR_EEPROM;
}
- hw->perm_mac_addr[i] = (uint8_t) (eeprom_data & 0x00FF);
- hw->perm_mac_addr[i+1] = (uint8_t) (eeprom_data >> 8);
+ hw->perm_mac_addr[i] = (u8) (eeprom_data & 0x00FF);
+ hw->perm_mac_addr[i+1] = (u8) (eeprom_data >> 8);
}
switch (hw->mac_type) {
@@ -5734,8 +5734,8 @@
static void
e1000_init_rx_addrs(struct e1000_hw *hw)
{
- uint32_t i;
- uint32_t rar_num;
+ u32 i;
+ u32 rar_num;
DEBUGFUNC("e1000_init_rx_addrs");
@@ -5770,11 +5770,11 @@
* hw - Struct containing variables accessed by shared code
* mc_addr - the multicast address to hash
*****************************************************************************/
-uint32_t
+u32
e1000_hash_mc_addr(struct e1000_hw *hw,
- uint8_t *mc_addr)
+ u8 *mc_addr)
{
- uint32_t hash_value = 0;
+ u32 hash_value = 0;
/* The portion of the address that is used for the hash table is
* determined by the mc_filter_type setting.
@@ -5787,37 +5787,37 @@
case 0:
if (hw->mac_type == e1000_ich8lan) {
/* [47:38] i.e. 0x158 for above example address */
- hash_value = ((mc_addr[4] >> 6) | (((uint16_t) mc_addr[5]) << 2));
+ hash_value = ((mc_addr[4] >> 6) | (((u16) mc_addr[5]) << 2));
} else {
/* [47:36] i.e. 0x563 for above example address */
- hash_value = ((mc_addr[4] >> 4) | (((uint16_t) mc_addr[5]) << 4));
+ hash_value = ((mc_addr[4] >> 4) | (((u16) mc_addr[5]) << 4));
}
break;
case 1:
if (hw->mac_type == e1000_ich8lan) {
/* [46:37] i.e. 0x2B1 for above example address */
- hash_value = ((mc_addr[4] >> 5) | (((uint16_t) mc_addr[5]) << 3));
+ hash_value = ((mc_addr[4] >> 5) | (((u16) mc_addr[5]) << 3));
} else {
/* [46:35] i.e. 0xAC6 for above example address */
- hash_value = ((mc_addr[4] >> 3) | (((uint16_t) mc_addr[5]) << 5));
+ hash_value = ((mc_addr[4] >> 3) | (((u16) mc_addr[5]) << 5));
}
break;
case 2:
if (hw->mac_type == e1000_ich8lan) {
/*[45:36] i.e. 0x163 for above example address */
- hash_value = ((mc_addr[4] >> 4) | (((uint16_t) mc_addr[5]) << 4));
+ hash_value = ((mc_addr[4] >> 4) | (((u16) mc_addr[5]) << 4));
} else {
/* [45:34] i.e. 0x5D8 for above example address */
- hash_value = ((mc_addr[4] >> 2) | (((uint16_t) mc_addr[5]) << 6));
+ hash_value = ((mc_addr[4] >> 2) | (((u16) mc_addr[5]) << 6));
}
break;
case 3:
if (hw->mac_type == e1000_ich8lan) {
/* [43:34] i.e. 0x18D for above example address */
- hash_value = ((mc_addr[4] >> 2) | (((uint16_t) mc_addr[5]) << 6));
+ hash_value = ((mc_addr[4] >> 2) | (((u16) mc_addr[5]) << 6));
} else {
/* [43:32] i.e. 0x634 for above example address */
- hash_value = ((mc_addr[4]) | (((uint16_t) mc_addr[5]) << 8));
+ hash_value = ((mc_addr[4]) | (((u16) mc_addr[5]) << 8));
}
break;
}
@@ -5837,11 +5837,11 @@
*****************************************************************************/
void
e1000_mta_set(struct e1000_hw *hw,
- uint32_t hash_value)
+ u32 hash_value)
{
- uint32_t hash_bit, hash_reg;
- uint32_t mta;
- uint32_t temp;
+ u32 hash_bit, hash_reg;
+ u32 mta;
+ u32 temp;
/* The MTA is a register array of 128 32-bit registers.
* It is treated like an array of 4096 bits. We want to set
@@ -5886,18 +5886,18 @@
*****************************************************************************/
void
e1000_rar_set(struct e1000_hw *hw,
- uint8_t *addr,
- uint32_t index)
+ u8 *addr,
+ u32 index)
{
- uint32_t rar_low, rar_high;
+ u32 rar_low, rar_high;
/* HW expects these in little endian so we reverse the byte order
* from network order (big endian) to little endian
*/
- rar_low = ((uint32_t) addr[0] |
- ((uint32_t) addr[1] << 8) |
- ((uint32_t) addr[2] << 16) | ((uint32_t) addr[3] << 24));
- rar_high = ((uint32_t) addr[4] | ((uint32_t) addr[5] << 8));
+ rar_low = ((u32) addr[0] |
+ ((u32) addr[1] << 8) |
+ ((u32) addr[2] << 16) | ((u32) addr[3] << 24));
+ rar_high = ((u32) addr[4] | ((u32) addr[5] << 8));
/* Disable Rx and flush all Rx frames before enabling RSS to avoid Rx
* unit hang.
@@ -5944,10 +5944,10 @@
*****************************************************************************/
void
e1000_write_vfta(struct e1000_hw *hw,
- uint32_t offset,
- uint32_t value)
+ u32 offset,
+ u32 value)
{
- uint32_t temp;
+ u32 temp;
if (hw->mac_type == e1000_ich8lan)
return;
@@ -5972,10 +5972,10 @@
static void
e1000_clear_vfta(struct e1000_hw *hw)
{
- uint32_t offset;
- uint32_t vfta_value = 0;
- uint32_t vfta_offset = 0;
- uint32_t vfta_bit_in_reg = 0;
+ u32 offset;
+ u32 vfta_value = 0;
+ u32 vfta_offset = 0;
+ u32 vfta_bit_in_reg = 0;
if (hw->mac_type == e1000_ich8lan)
return;
@@ -6003,15 +6003,15 @@
}
}
-static int32_t
+static s32
e1000_id_led_init(struct e1000_hw * hw)
{
- uint32_t ledctl;
- const uint32_t ledctl_mask = 0x000000FF;
- const uint32_t ledctl_on = E1000_LEDCTL_MODE_LED_ON;
- const uint32_t ledctl_off = E1000_LEDCTL_MODE_LED_OFF;
- uint16_t eeprom_data, i, temp;
- const uint16_t led_mask = 0x0F;
+ u32 ledctl;
+ const u32 ledctl_mask = 0x000000FF;
+ const u32 ledctl_on = E1000_LEDCTL_MODE_LED_ON;
+ const u32 ledctl_off = E1000_LEDCTL_MODE_LED_OFF;
+ u16 eeprom_data, i, temp;
+ const u16 led_mask = 0x0F;
DEBUGFUNC("e1000_id_led_init");
@@ -6086,11 +6086,11 @@
*
* hw - Struct containing variables accessed by shared code
*****************************************************************************/
-int32_t
+s32
e1000_setup_led(struct e1000_hw *hw)
{
- uint32_t ledctl;
- int32_t ret_val = E1000_SUCCESS;
+ u32 ledctl;
+ s32 ret_val = E1000_SUCCESS;
DEBUGFUNC("e1000_setup_led");
@@ -6111,7 +6111,7 @@
if (ret_val)
return ret_val;
ret_val = e1000_write_phy_reg(hw, IGP01E1000_GMII_FIFO,
- (uint16_t)(hw->phy_spd_default &
+ (u16)(hw->phy_spd_default &
~IGP01E1000_GMII_SPD));
if (ret_val)
return ret_val;
@@ -6145,11 +6145,11 @@
*
* hw - Struct containing variables accessed by shared code
*****************************************************************************/
-int32_t
+s32
e1000_blink_led_start(struct e1000_hw *hw)
{
- int16_t i;
- uint32_t ledctl_blink = 0;
+ s16 i;
+ u32 ledctl_blink = 0;
DEBUGFUNC("e1000_id_led_blink_on");
@@ -6180,10 +6180,10 @@
*
* hw - Struct containing variables accessed by shared code
*****************************************************************************/
-int32_t
+s32
e1000_cleanup_led(struct e1000_hw *hw)
{
- int32_t ret_val = E1000_SUCCESS;
+ s32 ret_val = E1000_SUCCESS;
DEBUGFUNC("e1000_cleanup_led");
@@ -6222,10 +6222,10 @@
*
* hw - Struct containing variables accessed by shared code
*****************************************************************************/
-int32_t
+s32
e1000_led_on(struct e1000_hw *hw)
{
- uint32_t ctrl = E1000_READ_REG(hw, CTRL);
+ u32 ctrl = E1000_READ_REG(hw, CTRL);
DEBUGFUNC("e1000_led_on");
@@ -6273,10 +6273,10 @@
*
* hw - Struct containing variables accessed by shared code
*****************************************************************************/
-int32_t
+s32
e1000_led_off(struct e1000_hw *hw)
{
- uint32_t ctrl = E1000_READ_REG(hw, CTRL);
+ u32 ctrl = E1000_READ_REG(hw, CTRL);
DEBUGFUNC("e1000_led_off");
@@ -6327,7 +6327,7 @@
static void
e1000_clear_hw_cntrs(struct e1000_hw *hw)
{
- volatile uint32_t temp;
+ volatile u32 temp;
temp = E1000_READ_REG(hw, CRCERRS);
temp = E1000_READ_REG(hw, SYMERRS);
@@ -6495,10 +6495,10 @@
void
e1000_tbi_adjust_stats(struct e1000_hw *hw,
struct e1000_hw_stats *stats,
- uint32_t frame_len,
- uint8_t *mac_addr)
+ u32 frame_len,
+ u8 *mac_addr)
{
- uint64_t carry_bit;
+ u64 carry_bit;
/* First adjust the frame length. */
frame_len--;
@@ -6527,7 +6527,7 @@
* since the test for a multicast frame will test positive on
* a broadcast frame.
*/
- if ((mac_addr[0] == (uint8_t) 0xff) && (mac_addr[1] == (uint8_t) 0xff))
+ if ((mac_addr[0] == (u8) 0xff) && (mac_addr[1] == (u8) 0xff))
/* Broadcast packet */
stats->bprc++;
else if (*mac_addr & 0x01)
@@ -6573,9 +6573,9 @@
void
e1000_get_bus_info(struct e1000_hw *hw)
{
- int32_t ret_val;
- uint16_t pci_ex_link_status;
- uint32_t status;
+ s32 ret_val;
+ u16 pci_ex_link_status;
+ u32 status;
switch (hw->mac_type) {
case e1000_82542_rev2_0:
@@ -6647,8 +6647,8 @@
*****************************************************************************/
static void
e1000_write_reg_io(struct e1000_hw *hw,
- uint32_t offset,
- uint32_t value)
+ u32 offset,
+ u32 value)
{
unsigned long io_addr = hw->io_base;
unsigned long io_data = hw->io_base + 4;
@@ -6672,15 +6672,15 @@
* register to the minimum and maximum range.
* For IGP phy's, the function calculates the range by the AGC registers.
*****************************************************************************/
-static int32_t
+static s32
e1000_get_cable_length(struct e1000_hw *hw,
- uint16_t *min_length,
- uint16_t *max_length)
+ u16 *min_length,
+ u16 *max_length)
{
- int32_t ret_val;
- uint16_t agc_value = 0;
- uint16_t i, phy_data;
- uint16_t cable_length;
+ s32 ret_val;
+ u16 agc_value = 0;
+ u16 i, phy_data;
+ u16 cable_length;
DEBUGFUNC("e1000_get_cable_length");
@@ -6751,9 +6751,9 @@
break;
}
} else if (hw->phy_type == e1000_phy_igp) { /* For IGP PHY */
- uint16_t cur_agc_value;
- uint16_t min_agc_value = IGP01E1000_AGC_LENGTH_TABLE_SIZE;
- uint16_t agc_reg_array[IGP01E1000_PHY_CHANNEL_NUM] =
+ u16 cur_agc_value;
+ u16 min_agc_value = IGP01E1000_AGC_LENGTH_TABLE_SIZE;
+ u16 agc_reg_array[IGP01E1000_PHY_CHANNEL_NUM] =
{IGP01E1000_PHY_AGC_A,
IGP01E1000_PHY_AGC_B,
IGP01E1000_PHY_AGC_C,
@@ -6799,9 +6799,9 @@
IGP01E1000_AGC_RANGE;
} else if (hw->phy_type == e1000_phy_igp_2 ||
hw->phy_type == e1000_phy_igp_3) {
- uint16_t cur_agc_index, max_agc_index = 0;
- uint16_t min_agc_index = IGP02E1000_AGC_LENGTH_TABLE_SIZE - 1;
- uint16_t agc_reg_array[IGP02E1000_PHY_CHANNEL_NUM] =
+ u16 cur_agc_index, max_agc_index = 0;
+ u16 min_agc_index = IGP02E1000_AGC_LENGTH_TABLE_SIZE - 1;
+ u16 agc_reg_array[IGP02E1000_PHY_CHANNEL_NUM] =
{IGP02E1000_PHY_AGC_A,
IGP02E1000_PHY_AGC_B,
IGP02E1000_PHY_AGC_C,
@@ -6863,12 +6863,12 @@
* return 0. If the link speed is 1000 Mbps the polarity status is in the
* IGP01E1000_PHY_PCS_INIT_REG.
*****************************************************************************/
-static int32_t
+static s32
e1000_check_polarity(struct e1000_hw *hw,
e1000_rev_polarity *polarity)
{
- int32_t ret_val;
- uint16_t phy_data;
+ s32 ret_val;
+ u16 phy_data;
DEBUGFUNC("e1000_check_polarity");
@@ -6939,11 +6939,11 @@
* Link Health register. In IGP this bit is latched high, so the driver must
* read it immediately after link is established.
*****************************************************************************/
-static int32_t
+static s32
e1000_check_downshift(struct e1000_hw *hw)
{
- int32_t ret_val;
- uint16_t phy_data;
+ s32 ret_val;
+ u16 phy_data;
DEBUGFUNC("e1000_check_downshift");
@@ -6985,18 +6985,18 @@
*
****************************************************************************/
-static int32_t
+static s32
e1000_config_dsp_after_link_change(struct e1000_hw *hw,
bool link_up)
{
- int32_t ret_val;
- uint16_t phy_data, phy_saved_data, speed, duplex, i;
- uint16_t dsp_reg_array[IGP01E1000_PHY_CHANNEL_NUM] =
+ s32 ret_val;
+ u16 phy_data, phy_saved_data, speed, duplex, i;
+ u16 dsp_reg_array[IGP01E1000_PHY_CHANNEL_NUM] =
{IGP01E1000_PHY_AGC_PARAM_A,
IGP01E1000_PHY_AGC_PARAM_B,
IGP01E1000_PHY_AGC_PARAM_C,
IGP01E1000_PHY_AGC_PARAM_D};
- uint16_t min_length, max_length;
+ u16 min_length, max_length;
DEBUGFUNC("e1000_config_dsp_after_link_change");
@@ -7038,8 +7038,8 @@
if ((hw->ffe_config_state == e1000_ffe_config_enabled) &&
(min_length < e1000_igp_cable_length_50)) {
- uint16_t ffe_idle_err_timeout = FFE_IDLE_ERR_COUNT_TIMEOUT_20;
- uint32_t idle_errs = 0;
+ u16 ffe_idle_err_timeout = FFE_IDLE_ERR_COUNT_TIMEOUT_20;
+ u32 idle_errs = 0;
/* clear previous idle error counts */
ret_val = e1000_read_phy_reg(hw, PHY_1000T_STATUS,
@@ -7173,11 +7173,11 @@
*
* hw - Struct containing variables accessed by shared code
****************************************************************************/
-static int32_t
+static s32
e1000_set_phy_mode(struct e1000_hw *hw)
{
- int32_t ret_val;
- uint16_t eeprom_data;
+ s32 ret_val;
+ u16 eeprom_data;
DEBUGFUNC("e1000_set_phy_mode");
@@ -7218,13 +7218,13 @@
*
****************************************************************************/
-static int32_t
+static s32
e1000_set_d3_lplu_state(struct e1000_hw *hw,
bool active)
{
- uint32_t phy_ctrl = 0;
- int32_t ret_val;
- uint16_t phy_data;
+ u32 phy_ctrl = 0;
+ s32 ret_val;
+ u16 phy_data;
DEBUGFUNC("e1000_set_d3_lplu_state");
if (hw->phy_type != e1000_phy_igp && hw->phy_type != e1000_phy_igp_2
@@ -7348,13 +7348,13 @@
*
****************************************************************************/
-static int32_t
+static s32
e1000_set_d0_lplu_state(struct e1000_hw *hw,
bool active)
{
- uint32_t phy_ctrl = 0;
- int32_t ret_val;
- uint16_t phy_data;
+ u32 phy_ctrl = 0;
+ s32 ret_val;
+ u16 phy_data;
DEBUGFUNC("e1000_set_d0_lplu_state");
if (hw->mac_type <= e1000_82547_rev_2)
@@ -7439,12 +7439,12 @@
*
* hw - Struct containing variables accessed by shared code
*****************************************************************************/
-static int32_t
+static s32
e1000_set_vco_speed(struct e1000_hw *hw)
{
- int32_t ret_val;
- uint16_t default_page = 0;
- uint16_t phy_data;
+ s32 ret_val;
+ u16 default_page = 0;
+ u16 phy_data;
DEBUGFUNC("e1000_set_vco_speed");
@@ -7503,18 +7503,18 @@
*
* returns: - E1000_SUCCESS .
****************************************************************************/
-static int32_t
-e1000_host_if_read_cookie(struct e1000_hw * hw, uint8_t *buffer)
+static s32
+e1000_host_if_read_cookie(struct e1000_hw * hw, u8 *buffer)
{
- uint8_t i;
- uint32_t offset = E1000_MNG_DHCP_COOKIE_OFFSET;
- uint8_t length = E1000_MNG_DHCP_COOKIE_LENGTH;
+ u8 i;
+ u32 offset = E1000_MNG_DHCP_COOKIE_OFFSET;
+ u8 length = E1000_MNG_DHCP_COOKIE_LENGTH;
length = (length >> 2);
offset = (offset >> 2);
for (i = 0; i < length; i++) {
- *((uint32_t *) buffer + i) =
+ *((u32 *) buffer + i) =
E1000_READ_REG_ARRAY_DWORD(hw, HOST_IF, offset + i);
}
return E1000_SUCCESS;
@@ -7530,11 +7530,11 @@
* timeout
* - E1000_SUCCESS for success.
****************************************************************************/
-static int32_t
+static s32
e1000_mng_enable_host_if(struct e1000_hw * hw)
{
- uint32_t hicr;
- uint8_t i;
+ u32 hicr;
+ u8 i;
/* Check that the host interface is enabled. */
hicr = E1000_READ_REG(hw, HICR);
@@ -7564,14 +7564,14 @@
*
* returns - E1000_SUCCESS for success.
****************************************************************************/
-static int32_t
-e1000_mng_host_if_write(struct e1000_hw * hw, uint8_t *buffer,
- uint16_t length, uint16_t offset, uint8_t *sum)
+static s32
+e1000_mng_host_if_write(struct e1000_hw * hw, u8 *buffer,
+ u16 length, u16 offset, u8 *sum)
{
- uint8_t *tmp;
- uint8_t *bufptr = buffer;
- uint32_t data = 0;
- uint16_t remaining, i, j, prev_bytes;
+ u8 *tmp;
+ u8 *bufptr = buffer;
+ u32 data = 0;
+ u16 remaining, i, j, prev_bytes;
/* sum = only sum of the data and it is not checksum */
@@ -7579,14 +7579,14 @@
return -E1000_ERR_PARAM;
}
- tmp = (uint8_t *)&data;
+ tmp = (u8 *)&data;
prev_bytes = offset & 0x3;
offset &= 0xFFFC;
offset >>= 2;
if (prev_bytes) {
data = E1000_READ_REG_ARRAY_DWORD(hw, HOST_IF, offset);
- for (j = prev_bytes; j < sizeof(uint32_t); j++) {
+ for (j = prev_bytes; j < sizeof(u32); j++) {
*(tmp + j) = *bufptr++;
*sum += *(tmp + j);
}
@@ -7604,7 +7604,7 @@
/* The device driver writes the relevant command block into the
* ram area. */
for (i = 0; i < length; i++) {
- for (j = 0; j < sizeof(uint32_t); j++) {
+ for (j = 0; j < sizeof(u32); j++) {
*(tmp + j) = *bufptr++;
*sum += *(tmp + j);
}
@@ -7612,7 +7612,7 @@
E1000_WRITE_REG_ARRAY_DWORD(hw, HOST_IF, offset + i, data);
}
if (remaining) {
- for (j = 0; j < sizeof(uint32_t); j++) {
+ for (j = 0; j < sizeof(u32); j++) {
if (j < remaining)
*(tmp + j) = *bufptr++;
else
@@ -7632,23 +7632,23 @@
*
* returns - E1000_SUCCESS for success.
****************************************************************************/
-static int32_t
+static s32
e1000_mng_write_cmd_header(struct e1000_hw * hw,
struct e1000_host_mng_command_header * hdr)
{
- uint16_t i;
- uint8_t sum;
- uint8_t *buffer;
+ u16 i;
+ u8 sum;
+ u8 *buffer;
/* Write the whole command header structure which includes sum of
* the buffer */
- uint16_t length = sizeof(struct e1000_host_mng_command_header);
+ u16 length = sizeof(struct e1000_host_mng_command_header);
sum = hdr->checksum;
hdr->checksum = 0;
- buffer = (uint8_t *) hdr;
+ buffer = (u8 *) hdr;
i = length;
while (i--)
sum += buffer[i];
@@ -7658,7 +7658,7 @@
length >>= 2;
/* The device driver writes the relevant command block into the ram area. */
for (i = 0; i < length; i++) {
- E1000_WRITE_REG_ARRAY_DWORD(hw, HOST_IF, i, *((uint32_t *) hdr + i));
+ E1000_WRITE_REG_ARRAY_DWORD(hw, HOST_IF, i, *((u32 *) hdr + i));
E1000_WRITE_FLUSH(hw);
}
@@ -7672,10 +7672,10 @@
*
* returns - E1000_SUCCESS for success.
****************************************************************************/
-static int32_t
+static s32
e1000_mng_write_commit(struct e1000_hw * hw)
{
- uint32_t hicr;
+ u32 hicr;
hicr = E1000_READ_REG(hw, HICR);
/* Setting this bit tells the ARC that a new command is pending. */
@@ -7693,7 +7693,7 @@
bool
e1000_check_mng_mode(struct e1000_hw *hw)
{
- uint32_t fwsm;
+ u32 fwsm;
fwsm = E1000_READ_REG(hw, FWSM);
@@ -7712,11 +7712,11 @@
/*****************************************************************************
* This function writes the dhcp info .
****************************************************************************/
-int32_t
-e1000_mng_write_dhcp_info(struct e1000_hw * hw, uint8_t *buffer,
- uint16_t length)
+s32
+e1000_mng_write_dhcp_info(struct e1000_hw * hw, u8 *buffer,
+ u16 length)
{
- int32_t ret_val;
+ s32 ret_val;
struct e1000_host_mng_command_header hdr;
hdr.command_id = E1000_MNG_DHCP_TX_PAYLOAD_CMD;
@@ -7744,11 +7744,11 @@
*
* returns - checksum of buffer contents.
****************************************************************************/
-static uint8_t
-e1000_calculate_mng_checksum(char *buffer, uint32_t length)
+static u8
+e1000_calculate_mng_checksum(char *buffer, u32 length)
{
- uint8_t sum = 0;
- uint32_t i;
+ u8 sum = 0;
+ u32 i;
if (!buffer)
return 0;
@@ -7756,7 +7756,7 @@
for (i=0; i < length; i++)
sum += buffer[i];
- return (uint8_t) (0 - sum);
+ return (u8) (0 - sum);
}
/*****************************************************************************
@@ -7769,10 +7769,10 @@
{
/* called in init as well as watchdog timer functions */
- int32_t ret_val, checksum;
+ s32 ret_val, checksum;
bool tx_filter = false;
struct e1000_host_mng_dhcp_cookie *hdr = &(hw->mng_cookie);
- uint8_t *buffer = (uint8_t *) &(hw->mng_cookie);
+ u8 *buffer = (u8 *) &(hw->mng_cookie);
if (e1000_check_mng_mode(hw)) {
ret_val = e1000_mng_enable_host_if(hw);
@@ -7806,11 +7806,11 @@
* returns: - true/false
*
*****************************************************************************/
-uint32_t
+u32
e1000_enable_mng_pass_thru(struct e1000_hw *hw)
{
- uint32_t manc;
- uint32_t fwsm, factps;
+ u32 manc;
+ u32 fwsm, factps;
if (hw->asf_firmware_present) {
manc = E1000_READ_REG(hw, MANC);
@@ -7832,12 +7832,12 @@
return false;
}
-static int32_t
+static s32
e1000_polarity_reversal_workaround(struct e1000_hw *hw)
{
- int32_t ret_val;
- uint16_t mii_status_reg;
- uint16_t i;
+ s32 ret_val;
+ u16 mii_status_reg;
+ u16 i;
/* Polarity reversal workaround for forced 10F/10H links. */
@@ -7929,7 +7929,7 @@
static void
e1000_set_pci_express_master_disable(struct e1000_hw *hw)
{
- uint32_t ctrl;
+ u32 ctrl;
DEBUGFUNC("e1000_set_pci_express_master_disable");
@@ -7952,10 +7952,10 @@
* E1000_SUCCESS master requests disabled.
*
******************************************************************************/
-int32_t
+s32
e1000_disable_pciex_master(struct e1000_hw *hw)
{
- int32_t timeout = MASTER_DISABLE_TIMEOUT; /* 80ms */
+ s32 timeout = MASTER_DISABLE_TIMEOUT; /* 80ms */
DEBUGFUNC("e1000_disable_pciex_master");
@@ -7990,10 +7990,10 @@
* E1000_SUCCESS at any other case.
*
******************************************************************************/
-static int32_t
+static s32
e1000_get_auto_rd_done(struct e1000_hw *hw)
{
- int32_t timeout = AUTO_READ_DONE_TIMEOUT;
+ s32 timeout = AUTO_READ_DONE_TIMEOUT;
DEBUGFUNC("e1000_get_auto_rd_done");
@@ -8038,11 +8038,11 @@
* E1000_SUCCESS at any other case.
*
***************************************************************************/
-static int32_t
+static s32
e1000_get_phy_cfg_done(struct e1000_hw *hw)
{
- int32_t timeout = PHY_CFG_TIMEOUT;
- uint32_t cfg_mask = E1000_EEPROM_CFG_DONE;
+ s32 timeout = PHY_CFG_TIMEOUT;
+ u32 cfg_mask = E1000_EEPROM_CFG_DONE;
DEBUGFUNC("e1000_get_phy_cfg_done");
@@ -8085,11 +8085,11 @@
* E1000_SUCCESS at any other case.
*
***************************************************************************/
-static int32_t
+static s32
e1000_get_hw_eeprom_semaphore(struct e1000_hw *hw)
{
- int32_t timeout;
- uint32_t swsm;
+ s32 timeout;
+ u32 swsm;
DEBUGFUNC("e1000_get_hw_eeprom_semaphore");
@@ -8138,7 +8138,7 @@
static void
e1000_put_hw_eeprom_semaphore(struct e1000_hw *hw)
{
- uint32_t swsm;
+ u32 swsm;
DEBUGFUNC("e1000_put_hw_eeprom_semaphore");
@@ -8164,11 +8164,11 @@
* E1000_SUCCESS at any other case.
*
***************************************************************************/
-static int32_t
+static s32
e1000_get_software_semaphore(struct e1000_hw *hw)
{
- int32_t timeout = hw->eeprom.word_size + 1;
- uint32_t swsm;
+ s32 timeout = hw->eeprom.word_size + 1;
+ u32 swsm;
DEBUGFUNC("e1000_get_software_semaphore");
@@ -8203,7 +8203,7 @@
static void
e1000_release_software_semaphore(struct e1000_hw *hw)
{
- uint32_t swsm;
+ u32 swsm;
DEBUGFUNC("e1000_release_software_semaphore");
@@ -8228,11 +8228,11 @@
* E1000_SUCCESS
*
*****************************************************************************/
-int32_t
+s32
e1000_check_phy_reset_block(struct e1000_hw *hw)
{
- uint32_t manc = 0;
- uint32_t fwsm = 0;
+ u32 manc = 0;
+ u32 fwsm = 0;
if (hw->mac_type == e1000_ich8lan) {
fwsm = E1000_READ_REG(hw, FWSM);
@@ -8246,10 +8246,10 @@
E1000_BLK_PHY_RESET : E1000_SUCCESS;
}
-static uint8_t
+static u8
e1000_arc_subsystem_valid(struct e1000_hw *hw)
{
- uint32_t fwsm;
+ u32 fwsm;
/* On 8257x silicon, registers in the range of 0x8800 - 0x8FFC
* may not be provided a DMA clock when no manageability features are
@@ -8283,10 +8283,10 @@
* returns: E1000_SUCCESS
*
*****************************************************************************/
-static int32_t
-e1000_set_pci_ex_no_snoop(struct e1000_hw *hw, uint32_t no_snoop)
+static s32
+e1000_set_pci_ex_no_snoop(struct e1000_hw *hw, u32 no_snoop)
{
- uint32_t gcr_reg = 0;
+ u32 gcr_reg = 0;
DEBUGFUNC("e1000_set_pci_ex_no_snoop");
@@ -8303,7 +8303,7 @@
E1000_WRITE_REG(hw, GCR, gcr_reg);
}
if (hw->mac_type == e1000_ich8lan) {
- uint32_t ctrl_ext;
+ u32 ctrl_ext;
E1000_WRITE_REG(hw, GCR, PCI_EX_82566_SNOOP_ALL);
@@ -8324,11 +8324,11 @@
* hw: Struct containing variables accessed by shared code
*
***************************************************************************/
-static int32_t
+static s32
e1000_get_software_flag(struct e1000_hw *hw)
{
- int32_t timeout = PHY_CFG_TIMEOUT;
- uint32_t extcnf_ctrl;
+ s32 timeout = PHY_CFG_TIMEOUT;
+ u32 extcnf_ctrl;
DEBUGFUNC("e1000_get_software_flag");
@@ -8366,7 +8366,7 @@
static void
e1000_release_software_flag(struct e1000_hw *hw)
{
- uint32_t extcnf_ctrl;
+ u32 extcnf_ctrl;
DEBUGFUNC("e1000_release_software_flag");
@@ -8388,16 +8388,16 @@
* data - word read from the EEPROM
* words - number of words to read
*****************************************************************************/
-static int32_t
-e1000_read_eeprom_ich8(struct e1000_hw *hw, uint16_t offset, uint16_t words,
- uint16_t *data)
+static s32
+e1000_read_eeprom_ich8(struct e1000_hw *hw, u16 offset, u16 words,
+ u16 *data)
{
- int32_t error = E1000_SUCCESS;
- uint32_t flash_bank = 0;
- uint32_t act_offset = 0;
- uint32_t bank_offset = 0;
- uint16_t word = 0;
- uint16_t i = 0;
+ s32 error = E1000_SUCCESS;
+ u32 flash_bank = 0;
+ u32 act_offset = 0;
+ u32 bank_offset = 0;
+ u16 word = 0;
+ u16 i = 0;
/* We need to know which is the valid flash bank. In the event
* that we didn't allocate eeprom_shadow_ram, we may not be
@@ -8444,12 +8444,12 @@
* words - number of words to write
* data - words to write to the EEPROM
*****************************************************************************/
-static int32_t
-e1000_write_eeprom_ich8(struct e1000_hw *hw, uint16_t offset, uint16_t words,
- uint16_t *data)
+static s32
+e1000_write_eeprom_ich8(struct e1000_hw *hw, u16 offset, u16 words,
+ u16 *data)
{
- uint32_t i = 0;
- int32_t error = E1000_SUCCESS;
+ u32 i = 0;
+ s32 error = E1000_SUCCESS;
error = e1000_get_software_flag(hw);
if (error != E1000_SUCCESS)
@@ -8491,12 +8491,12 @@
*
* hw - The pointer to the hw structure
****************************************************************************/
-static int32_t
+static s32
e1000_ich8_cycle_init(struct e1000_hw *hw)
{
union ich8_hws_flash_status hsfsts;
- int32_t error = E1000_ERR_EEPROM;
- int32_t i = 0;
+ s32 error = E1000_ERR_EEPROM;
+ s32 i = 0;
DEBUGFUNC("e1000_ich8_cycle_init");
@@ -8558,13 +8558,13 @@
*
* hw - The pointer to the hw structure
****************************************************************************/
-static int32_t
-e1000_ich8_flash_cycle(struct e1000_hw *hw, uint32_t timeout)
+static s32
+e1000_ich8_flash_cycle(struct e1000_hw *hw, u32 timeout)
{
union ich8_hws_flash_ctrl hsflctl;
union ich8_hws_flash_status hsfsts;
- int32_t error = E1000_ERR_EEPROM;
- uint32_t i = 0;
+ s32 error = E1000_ERR_EEPROM;
+ u32 i = 0;
/* Start a cycle by writing 1 in Flash Cycle Go in Hw Flash Control */
hsflctl.regval = E1000_READ_ICH_FLASH_REG16(hw, ICH_FLASH_HSFCTL);
@@ -8593,16 +8593,16 @@
* size - Size of data to read, 1=byte 2=word
* data - Pointer to the word to store the value read.
*****************************************************************************/
-static int32_t
-e1000_read_ich8_data(struct e1000_hw *hw, uint32_t index,
- uint32_t size, uint16_t* data)
+static s32
+e1000_read_ich8_data(struct e1000_hw *hw, u32 index,
+ u32 size, u16* data)
{
union ich8_hws_flash_status hsfsts;
union ich8_hws_flash_ctrl hsflctl;
- uint32_t flash_linear_address;
- uint32_t flash_data = 0;
- int32_t error = -E1000_ERR_EEPROM;
- int32_t count = 0;
+ u32 flash_linear_address;
+ u32 flash_data = 0;
+ s32 error = -E1000_ERR_EEPROM;
+ s32 count = 0;
DEBUGFUNC("e1000_read_ich8_data");
@@ -8640,9 +8640,9 @@
if (error == E1000_SUCCESS) {
flash_data = E1000_READ_ICH_FLASH_REG(hw, ICH_FLASH_FDATA0);
if (size == 1) {
- *data = (uint8_t)(flash_data & 0x000000FF);
+ *data = (u8)(flash_data & 0x000000FF);
} else if (size == 2) {
- *data = (uint16_t)(flash_data & 0x0000FFFF);
+ *data = (u16)(flash_data & 0x0000FFFF);
}
break;
} else {
@@ -8672,16 +8672,16 @@
* size - Size of data to read, 1=byte 2=word
* data - The byte(s) to write to the NVM.
*****************************************************************************/
-static int32_t
-e1000_write_ich8_data(struct e1000_hw *hw, uint32_t index, uint32_t size,
- uint16_t data)
+static s32
+e1000_write_ich8_data(struct e1000_hw *hw, u32 index, u32 size,
+ u16 data)
{
union ich8_hws_flash_status hsfsts;
union ich8_hws_flash_ctrl hsflctl;
- uint32_t flash_linear_address;
- uint32_t flash_data = 0;
- int32_t error = -E1000_ERR_EEPROM;
- int32_t count = 0;
+ u32 flash_linear_address;
+ u32 flash_data = 0;
+ s32 error = -E1000_ERR_EEPROM;
+ s32 count = 0;
DEBUGFUNC("e1000_write_ich8_data");
@@ -8710,9 +8710,9 @@
E1000_WRITE_ICH_FLASH_REG(hw, ICH_FLASH_FADDR, flash_linear_address);
if (size == 1)
- flash_data = (uint32_t)data & 0x00FF;
+ flash_data = (u32)data & 0x00FF;
else
- flash_data = (uint32_t)data;
+ flash_data = (u32)data;
E1000_WRITE_ICH_FLASH_REG(hw, ICH_FLASH_FDATA0, flash_data);
@@ -8747,15 +8747,15 @@
* index - The index of the byte to read.
* data - Pointer to a byte to store the value read.
*****************************************************************************/
-static int32_t
-e1000_read_ich8_byte(struct e1000_hw *hw, uint32_t index, uint8_t* data)
+static s32
+e1000_read_ich8_byte(struct e1000_hw *hw, u32 index, u8* data)
{
- int32_t status = E1000_SUCCESS;
- uint16_t word = 0;
+ s32 status = E1000_SUCCESS;
+ u16 word = 0;
status = e1000_read_ich8_data(hw, index, 1, &word);
if (status == E1000_SUCCESS) {
- *data = (uint8_t)word;
+ *data = (u8)word;
}
return status;
@@ -8770,11 +8770,11 @@
* index - The index of the byte to write.
* byte - The byte to write to the NVM.
*****************************************************************************/
-static int32_t
-e1000_verify_write_ich8_byte(struct e1000_hw *hw, uint32_t index, uint8_t byte)
+static s32
+e1000_verify_write_ich8_byte(struct e1000_hw *hw, u32 index, u8 byte)
{
- int32_t error = E1000_SUCCESS;
- int32_t program_retries = 0;
+ s32 error = E1000_SUCCESS;
+ s32 program_retries = 0;
DEBUGOUT2("Byte := %2.2X Offset := %d\n", byte, index);
@@ -8803,11 +8803,11 @@
* index - The index of the byte to read.
* data - The byte to write to the NVM.
*****************************************************************************/
-static int32_t
-e1000_write_ich8_byte(struct e1000_hw *hw, uint32_t index, uint8_t data)
+static s32
+e1000_write_ich8_byte(struct e1000_hw *hw, u32 index, u8 data)
{
- int32_t status = E1000_SUCCESS;
- uint16_t word = (uint16_t)data;
+ s32 status = E1000_SUCCESS;
+ u16 word = (u16)data;
status = e1000_write_ich8_data(hw, index, 1, word);
@@ -8821,10 +8821,10 @@
* index - The starting byte index of the word to read.
* data - Pointer to a word to store the value read.
*****************************************************************************/
-static int32_t
-e1000_read_ich8_word(struct e1000_hw *hw, uint32_t index, uint16_t *data)
+static s32
+e1000_read_ich8_word(struct e1000_hw *hw, u32 index, u16 *data)
{
- int32_t status = E1000_SUCCESS;
+ s32 status = E1000_SUCCESS;
status = e1000_read_ich8_data(hw, index, 2, data);
return status;
}
@@ -8840,19 +8840,19 @@
* amount of NVM used in each bank is a *minimum* of 4 KBytes, but in fact the
* bank size may be 4, 8 or 64 KBytes
*****************************************************************************/
-static int32_t
-e1000_erase_ich8_4k_segment(struct e1000_hw *hw, uint32_t bank)
+static s32
+e1000_erase_ich8_4k_segment(struct e1000_hw *hw, u32 bank)
{
union ich8_hws_flash_status hsfsts;
union ich8_hws_flash_ctrl hsflctl;
- uint32_t flash_linear_address;
- int32_t count = 0;
- int32_t error = E1000_ERR_EEPROM;
- int32_t iteration;
- int32_t sub_sector_size = 0;
- int32_t bank_size;
- int32_t j = 0;
- int32_t error_flag = 0;
+ u32 flash_linear_address;
+ s32 count = 0;
+ s32 error = E1000_ERR_EEPROM;
+ s32 iteration;
+ s32 sub_sector_size = 0;
+ s32 bank_size;
+ s32 j = 0;
+ s32 error_flag = 0;
hsfsts.regval = E1000_READ_ICH_FLASH_REG16(hw, ICH_FLASH_HSFSTS);
@@ -8930,16 +8930,16 @@
return error;
}
-static int32_t
+static s32
e1000_init_lcd_from_nvm_config_region(struct e1000_hw *hw,
- uint32_t cnf_base_addr, uint32_t cnf_size)
+ u32 cnf_base_addr, u32 cnf_size)
{
- uint32_t ret_val = E1000_SUCCESS;
- uint16_t word_addr, reg_data, reg_addr;
- uint16_t i;
+ u32 ret_val = E1000_SUCCESS;
+ u16 word_addr, reg_data, reg_addr;
+ u16 i;
/* cnf_base_addr is in DWORD */
- word_addr = (uint16_t)(cnf_base_addr << 1);
+ word_addr = (u16)(cnf_base_addr << 1);
/* cnf_size is returned in size of dwords */
for (i = 0; i < cnf_size; i++) {
@@ -8955,7 +8955,7 @@
if (ret_val != E1000_SUCCESS)
return ret_val;
- ret_val = e1000_write_phy_reg_ex(hw, (uint32_t)reg_addr, reg_data);
+ ret_val = e1000_write_phy_reg_ex(hw, (u32)reg_addr, reg_data);
e1000_release_software_flag(hw);
}
@@ -8972,10 +8972,10 @@
*
* hw: Struct containing variables accessed by shared code
*****************************************************************************/
-static int32_t
+static s32
e1000_init_lcd_from_nvm(struct e1000_hw *hw)
{
- uint32_t reg_data, cnf_base_addr, cnf_size, ret_val, loop;
+ u32 reg_data, cnf_base_addr, cnf_size, ret_val, loop;
if (hw->phy_type != e1000_phy_igp_3)
return E1000_SUCCESS;
diff --git a/drivers/net/e1000/e1000_hw.h b/drivers/net/e1000/e1000_hw.h
index 572a7b6..99fce2c 100644
--- a/drivers/net/e1000/e1000_hw.h
+++ b/drivers/net/e1000/e1000_hw.h
@@ -100,7 +100,7 @@
} e1000_fc_type;
struct e1000_shadow_ram {
- uint16_t eeprom_word;
+ u16 eeprom_word;
bool modified;
};
@@ -263,17 +263,17 @@
};
struct e1000_phy_stats {
- uint32_t idle_errors;
- uint32_t receive_errors;
+ u32 idle_errors;
+ u32 receive_errors;
};
struct e1000_eeprom_info {
e1000_eeprom_type type;
- uint16_t word_size;
- uint16_t opcode_bits;
- uint16_t address_bits;
- uint16_t delay_usec;
- uint16_t page_size;
+ u16 word_size;
+ u16 opcode_bits;
+ u16 address_bits;
+ u16 delay_usec;
+ u16 page_size;
bool use_eerd;
bool use_eewr;
};
@@ -308,34 +308,34 @@
/* Function prototypes */
/* Initialization */
-int32_t e1000_reset_hw(struct e1000_hw *hw);
-int32_t e1000_init_hw(struct e1000_hw *hw);
-int32_t e1000_set_mac_type(struct e1000_hw *hw);
+s32 e1000_reset_hw(struct e1000_hw *hw);
+s32 e1000_init_hw(struct e1000_hw *hw);
+s32 e1000_set_mac_type(struct e1000_hw *hw);
void e1000_set_media_type(struct e1000_hw *hw);
/* Link Configuration */
-int32_t e1000_setup_link(struct e1000_hw *hw);
-int32_t e1000_phy_setup_autoneg(struct e1000_hw *hw);
+s32 e1000_setup_link(struct e1000_hw *hw);
+s32 e1000_phy_setup_autoneg(struct e1000_hw *hw);
void e1000_config_collision_dist(struct e1000_hw *hw);
-int32_t e1000_check_for_link(struct e1000_hw *hw);
-int32_t e1000_get_speed_and_duplex(struct e1000_hw *hw, uint16_t *speed, uint16_t *duplex);
-int32_t e1000_force_mac_fc(struct e1000_hw *hw);
+s32 e1000_check_for_link(struct e1000_hw *hw);
+s32 e1000_get_speed_and_duplex(struct e1000_hw *hw, u16 *speed, u16 *duplex);
+s32 e1000_force_mac_fc(struct e1000_hw *hw);
/* PHY */
-int32_t e1000_read_phy_reg(struct e1000_hw *hw, uint32_t reg_addr, uint16_t *phy_data);
-int32_t e1000_write_phy_reg(struct e1000_hw *hw, uint32_t reg_addr, uint16_t data);
-int32_t e1000_phy_hw_reset(struct e1000_hw *hw);
-int32_t e1000_phy_reset(struct e1000_hw *hw);
-int32_t e1000_phy_get_info(struct e1000_hw *hw, struct e1000_phy_info *phy_info);
-int32_t e1000_validate_mdi_setting(struct e1000_hw *hw);
+s32 e1000_read_phy_reg(struct e1000_hw *hw, u32 reg_addr, u16 *phy_data);
+s32 e1000_write_phy_reg(struct e1000_hw *hw, u32 reg_addr, u16 data);
+s32 e1000_phy_hw_reset(struct e1000_hw *hw);
+s32 e1000_phy_reset(struct e1000_hw *hw);
+s32 e1000_phy_get_info(struct e1000_hw *hw, struct e1000_phy_info *phy_info);
+s32 e1000_validate_mdi_setting(struct e1000_hw *hw);
void e1000_phy_powerdown_workaround(struct e1000_hw *hw);
/* EEPROM Functions */
-int32_t e1000_init_eeprom_params(struct e1000_hw *hw);
+s32 e1000_init_eeprom_params(struct e1000_hw *hw);
/* MNG HOST IF functions */
-uint32_t e1000_enable_mng_pass_thru(struct e1000_hw *hw);
+u32 e1000_enable_mng_pass_thru(struct e1000_hw *hw);
#define E1000_MNG_DHCP_TX_PAYLOAD_CMD 64
#define E1000_HI_MAX_MNG_DATA_LENGTH 0x6F8 /* Host Interface data length */
@@ -354,80 +354,80 @@
#define E1000_VFTA_ENTRY_BIT_SHIFT_MASK 0x1F
struct e1000_host_mng_command_header {
- uint8_t command_id;
- uint8_t checksum;
- uint16_t reserved1;
- uint16_t reserved2;
- uint16_t command_length;
+ u8 command_id;
+ u8 checksum;
+ u16 reserved1;
+ u16 reserved2;
+ u16 command_length;
};
struct e1000_host_mng_command_info {
struct e1000_host_mng_command_header command_header; /* Command Head/Command Result Head has 4 bytes */
- uint8_t command_data[E1000_HI_MAX_MNG_DATA_LENGTH]; /* Command data can length 0..0x658*/
+ u8 command_data[E1000_HI_MAX_MNG_DATA_LENGTH]; /* Command data can length 0..0x658*/
};
#ifdef __BIG_ENDIAN
struct e1000_host_mng_dhcp_cookie{
- uint32_t signature;
- uint16_t vlan_id;
- uint8_t reserved0;
- uint8_t status;
- uint32_t reserved1;
- uint8_t checksum;
- uint8_t reserved3;
- uint16_t reserved2;
+ u32 signature;
+ u16 vlan_id;
+ u8 reserved0;
+ u8 status;
+ u32 reserved1;
+ u8 checksum;
+ u8 reserved3;
+ u16 reserved2;
};
#else
struct e1000_host_mng_dhcp_cookie{
- uint32_t signature;
- uint8_t status;
- uint8_t reserved0;
- uint16_t vlan_id;
- uint32_t reserved1;
- uint16_t reserved2;
- uint8_t reserved3;
- uint8_t checksum;
+ u32 signature;
+ u8 status;
+ u8 reserved0;
+ u16 vlan_id;
+ u32 reserved1;
+ u16 reserved2;
+ u8 reserved3;
+ u8 checksum;
};
#endif
-int32_t e1000_mng_write_dhcp_info(struct e1000_hw *hw, uint8_t *buffer,
- uint16_t length);
+s32 e1000_mng_write_dhcp_info(struct e1000_hw *hw, u8 *buffer,
+ u16 length);
bool e1000_check_mng_mode(struct e1000_hw *hw);
bool e1000_enable_tx_pkt_filtering(struct e1000_hw *hw);
-int32_t e1000_read_eeprom(struct e1000_hw *hw, uint16_t reg, uint16_t words, uint16_t *data);
-int32_t e1000_validate_eeprom_checksum(struct e1000_hw *hw);
-int32_t e1000_update_eeprom_checksum(struct e1000_hw *hw);
-int32_t e1000_write_eeprom(struct e1000_hw *hw, uint16_t reg, uint16_t words, uint16_t *data);
-int32_t e1000_read_mac_addr(struct e1000_hw * hw);
+s32 e1000_read_eeprom(struct e1000_hw *hw, u16 reg, u16 words, u16 *data);
+s32 e1000_validate_eeprom_checksum(struct e1000_hw *hw);
+s32 e1000_update_eeprom_checksum(struct e1000_hw *hw);
+s32 e1000_write_eeprom(struct e1000_hw *hw, u16 reg, u16 words, u16 *data);
+s32 e1000_read_mac_addr(struct e1000_hw * hw);
/* Filters (multicast, vlan, receive) */
-uint32_t e1000_hash_mc_addr(struct e1000_hw *hw, uint8_t * mc_addr);
-void e1000_mta_set(struct e1000_hw *hw, uint32_t hash_value);
-void e1000_rar_set(struct e1000_hw *hw, uint8_t * mc_addr, uint32_t rar_index);
-void e1000_write_vfta(struct e1000_hw *hw, uint32_t offset, uint32_t value);
+u32 e1000_hash_mc_addr(struct e1000_hw *hw, u8 * mc_addr);
+void e1000_mta_set(struct e1000_hw *hw, u32 hash_value);
+void e1000_rar_set(struct e1000_hw *hw, u8 * mc_addr, u32 rar_index);
+void e1000_write_vfta(struct e1000_hw *hw, u32 offset, u32 value);
/* LED functions */
-int32_t e1000_setup_led(struct e1000_hw *hw);
-int32_t e1000_cleanup_led(struct e1000_hw *hw);
-int32_t e1000_led_on(struct e1000_hw *hw);
-int32_t e1000_led_off(struct e1000_hw *hw);
-int32_t e1000_blink_led_start(struct e1000_hw *hw);
+s32 e1000_setup_led(struct e1000_hw *hw);
+s32 e1000_cleanup_led(struct e1000_hw *hw);
+s32 e1000_led_on(struct e1000_hw *hw);
+s32 e1000_led_off(struct e1000_hw *hw);
+s32 e1000_blink_led_start(struct e1000_hw *hw);
/* Adaptive IFS Functions */
/* Everything else */
void e1000_reset_adaptive(struct e1000_hw *hw);
void e1000_update_adaptive(struct e1000_hw *hw);
-void e1000_tbi_adjust_stats(struct e1000_hw *hw, struct e1000_hw_stats *stats, uint32_t frame_len, uint8_t * mac_addr);
+void e1000_tbi_adjust_stats(struct e1000_hw *hw, struct e1000_hw_stats *stats, u32 frame_len, u8 * mac_addr);
void e1000_get_bus_info(struct e1000_hw *hw);
void e1000_pci_set_mwi(struct e1000_hw *hw);
void e1000_pci_clear_mwi(struct e1000_hw *hw);
-int32_t e1000_read_pcie_cap_reg(struct e1000_hw *hw, uint32_t reg, uint16_t *value);
+s32 e1000_read_pcie_cap_reg(struct e1000_hw *hw, u32 reg, u16 *value);
void e1000_pcix_set_mmrbc(struct e1000_hw *hw, int mmrbc);
int e1000_pcix_get_mmrbc(struct e1000_hw *hw);
/* Port I/O is only supported on 82544 and newer */
-void e1000_io_write(struct e1000_hw *hw, unsigned long port, uint32_t value);
-int32_t e1000_disable_pciex_master(struct e1000_hw *hw);
-int32_t e1000_check_phy_reset_block(struct e1000_hw *hw);
+void e1000_io_write(struct e1000_hw *hw, unsigned long port, u32 value);
+s32 e1000_disable_pciex_master(struct e1000_hw *hw);
+s32 e1000_check_phy_reset_block(struct e1000_hw *hw);
#define E1000_READ_REG_IO(a, reg) \
@@ -596,8 +596,8 @@
__le64 buffer_addr; /* Address of the descriptor's data buffer */
__le16 length; /* Length of data DMAed into data buffer */
__le16 csum; /* Packet checksum */
- uint8_t status; /* Descriptor status */
- uint8_t errors; /* Descriptor Errors */
+ u8 status; /* Descriptor status */
+ u8 errors; /* Descriptor Errors */
__le16 special;
};
@@ -718,15 +718,15 @@
__le32 data;
struct {
__le16 length; /* Data buffer length */
- uint8_t cso; /* Checksum offset */
- uint8_t cmd; /* Descriptor control */
+ u8 cso; /* Checksum offset */
+ u8 cmd; /* Descriptor control */
} flags;
} lower;
union {
__le32 data;
struct {
- uint8_t status; /* Descriptor status */
- uint8_t css; /* Checksum start */
+ u8 status; /* Descriptor status */
+ u8 css; /* Checksum start */
__le16 special;
} fields;
} upper;
@@ -759,16 +759,16 @@
union {
__le32 ip_config;
struct {
- uint8_t ipcss; /* IP checksum start */
- uint8_t ipcso; /* IP checksum offset */
+ u8 ipcss; /* IP checksum start */
+ u8 ipcso; /* IP checksum offset */
__le16 ipcse; /* IP checksum end */
} ip_fields;
} lower_setup;
union {
__le32 tcp_config;
struct {
- uint8_t tucss; /* TCP checksum start */
- uint8_t tucso; /* TCP checksum offset */
+ u8 tucss; /* TCP checksum start */
+ u8 tucso; /* TCP checksum offset */
__le16 tucse; /* TCP checksum end */
} tcp_fields;
} upper_setup;
@@ -776,8 +776,8 @@
union {
__le32 data;
struct {
- uint8_t status; /* Descriptor status */
- uint8_t hdr_len; /* Header length */
+ u8 status; /* Descriptor status */
+ u8 hdr_len; /* Header length */
__le16 mss; /* Maximum segment size */
} fields;
} tcp_seg_setup;
@@ -790,15 +790,15 @@
__le32 data;
struct {
__le16 length; /* Data buffer length */
- uint8_t typ_len_ext; /* */
- uint8_t cmd; /* */
+ u8 typ_len_ext; /* */
+ u8 cmd; /* */
} flags;
} lower;
union {
__le32 data;
struct {
- uint8_t status; /* Descriptor status */
- uint8_t popts; /* Packet Options */
+ u8 status; /* Descriptor status */
+ u8 popts; /* Packet Options */
__le16 special; /* */
} fields;
} upper;
@@ -825,8 +825,8 @@
/* IPv4 Address Table Entry */
struct e1000_ipv4_at_entry {
- volatile uint32_t ipv4_addr; /* IP Address (RW) */
- volatile uint32_t reserved;
+ volatile u32 ipv4_addr; /* IP Address (RW) */
+ volatile u32 reserved;
};
/* Four wakeup IP addresses are supported */
@@ -837,25 +837,25 @@
/* IPv6 Address Table Entry */
struct e1000_ipv6_at_entry {
- volatile uint8_t ipv6_addr[16];
+ volatile u8 ipv6_addr[16];
};
/* Flexible Filter Length Table Entry */
struct e1000_fflt_entry {
- volatile uint32_t length; /* Flexible Filter Length (RW) */
- volatile uint32_t reserved;
+ volatile u32 length; /* Flexible Filter Length (RW) */
+ volatile u32 reserved;
};
/* Flexible Filter Mask Table Entry */
struct e1000_ffmt_entry {
- volatile uint32_t mask; /* Flexible Filter Mask (RW) */
- volatile uint32_t reserved;
+ volatile u32 mask; /* Flexible Filter Mask (RW) */
+ volatile u32 reserved;
};
/* Flexible Filter Value Table Entry */
struct e1000_ffvt_entry {
- volatile uint32_t value; /* Flexible Filter Value (RW) */
- volatile uint32_t reserved;
+ volatile u32 value; /* Flexible Filter Value (RW) */
+ volatile u32 reserved;
};
/* Four Flexible Filters are supported */
@@ -1309,89 +1309,89 @@
/* Statistics counters collected by the MAC */
struct e1000_hw_stats {
- uint64_t crcerrs;
- uint64_t algnerrc;
- uint64_t symerrs;
- uint64_t rxerrc;
- uint64_t txerrc;
- uint64_t mpc;
- uint64_t scc;
- uint64_t ecol;
- uint64_t mcc;
- uint64_t latecol;
- uint64_t colc;
- uint64_t dc;
- uint64_t tncrs;
- uint64_t sec;
- uint64_t cexterr;
- uint64_t rlec;
- uint64_t xonrxc;
- uint64_t xontxc;
- uint64_t xoffrxc;
- uint64_t xofftxc;
- uint64_t fcruc;
- uint64_t prc64;
- uint64_t prc127;
- uint64_t prc255;
- uint64_t prc511;
- uint64_t prc1023;
- uint64_t prc1522;
- uint64_t gprc;
- uint64_t bprc;
- uint64_t mprc;
- uint64_t gptc;
- uint64_t gorcl;
- uint64_t gorch;
- uint64_t gotcl;
- uint64_t gotch;
- uint64_t rnbc;
- uint64_t ruc;
- uint64_t rfc;
- uint64_t roc;
- uint64_t rlerrc;
- uint64_t rjc;
- uint64_t mgprc;
- uint64_t mgpdc;
- uint64_t mgptc;
- uint64_t torl;
- uint64_t torh;
- uint64_t totl;
- uint64_t toth;
- uint64_t tpr;
- uint64_t tpt;
- uint64_t ptc64;
- uint64_t ptc127;
- uint64_t ptc255;
- uint64_t ptc511;
- uint64_t ptc1023;
- uint64_t ptc1522;
- uint64_t mptc;
- uint64_t bptc;
- uint64_t tsctc;
- uint64_t tsctfc;
- uint64_t iac;
- uint64_t icrxptc;
- uint64_t icrxatc;
- uint64_t ictxptc;
- uint64_t ictxatc;
- uint64_t ictxqec;
- uint64_t ictxqmtc;
- uint64_t icrxdmtc;
- uint64_t icrxoc;
+ u64 crcerrs;
+ u64 algnerrc;
+ u64 symerrs;
+ u64 rxerrc;
+ u64 txerrc;
+ u64 mpc;
+ u64 scc;
+ u64 ecol;
+ u64 mcc;
+ u64 latecol;
+ u64 colc;
+ u64 dc;
+ u64 tncrs;
+ u64 sec;
+ u64 cexterr;
+ u64 rlec;
+ u64 xonrxc;
+ u64 xontxc;
+ u64 xoffrxc;
+ u64 xofftxc;
+ u64 fcruc;
+ u64 prc64;
+ u64 prc127;
+ u64 prc255;
+ u64 prc511;
+ u64 prc1023;
+ u64 prc1522;
+ u64 gprc;
+ u64 bprc;
+ u64 mprc;
+ u64 gptc;
+ u64 gorcl;
+ u64 gorch;
+ u64 gotcl;
+ u64 gotch;
+ u64 rnbc;
+ u64 ruc;
+ u64 rfc;
+ u64 roc;
+ u64 rlerrc;
+ u64 rjc;
+ u64 mgprc;
+ u64 mgpdc;
+ u64 mgptc;
+ u64 torl;
+ u64 torh;
+ u64 totl;
+ u64 toth;
+ u64 tpr;
+ u64 tpt;
+ u64 ptc64;
+ u64 ptc127;
+ u64 ptc255;
+ u64 ptc511;
+ u64 ptc1023;
+ u64 ptc1522;
+ u64 mptc;
+ u64 bptc;
+ u64 tsctc;
+ u64 tsctfc;
+ u64 iac;
+ u64 icrxptc;
+ u64 icrxatc;
+ u64 ictxptc;
+ u64 ictxatc;
+ u64 ictxqec;
+ u64 ictxqmtc;
+ u64 icrxdmtc;
+ u64 icrxoc;
};
/* Structure containing variables used by the shared code (e1000_hw.c) */
struct e1000_hw {
- uint8_t __iomem *hw_addr;
- uint8_t __iomem *flash_address;
+ u8 __iomem *hw_addr;
+ u8 __iomem *flash_address;
e1000_mac_type mac_type;
e1000_phy_type phy_type;
- uint32_t phy_init_script;
+ u32 phy_init_script;
e1000_media_type media_type;
void *back;
struct e1000_shadow_ram *eeprom_shadow_ram;
- uint32_t flash_bank_size;
- uint32_t flash_base_addr;
+ u32 flash_bank_size;
+ u32 flash_base_addr;
e1000_fc_type fc;
e1000_bus_speed bus_speed;
e1000_bus_width bus_width;
@@ -1400,51 +1400,51 @@
e1000_ms_type master_slave;
e1000_ms_type original_master_slave;
e1000_ffe_config ffe_config_state;
- uint32_t asf_firmware_present;
- uint32_t eeprom_semaphore_present;
- uint32_t swfw_sync_present;
- uint32_t swfwhw_semaphore_present;
+ u32 asf_firmware_present;
+ u32 eeprom_semaphore_present;
+ u32 swfw_sync_present;
+ u32 swfwhw_semaphore_present;
unsigned long io_base;
- uint32_t phy_id;
- uint32_t phy_revision;
- uint32_t phy_addr;
- uint32_t original_fc;
- uint32_t txcw;
- uint32_t autoneg_failed;
- uint32_t max_frame_size;
- uint32_t min_frame_size;
- uint32_t mc_filter_type;
- uint32_t num_mc_addrs;
- uint32_t collision_delta;
- uint32_t tx_packet_delta;
- uint32_t ledctl_default;
- uint32_t ledctl_mode1;
- uint32_t ledctl_mode2;
+ u32 phy_id;
+ u32 phy_revision;
+ u32 phy_addr;
+ u32 original_fc;
+ u32 txcw;
+ u32 autoneg_failed;
+ u32 max_frame_size;
+ u32 min_frame_size;
+ u32 mc_filter_type;
+ u32 num_mc_addrs;
+ u32 collision_delta;
+ u32 tx_packet_delta;
+ u32 ledctl_default;
+ u32 ledctl_mode1;
+ u32 ledctl_mode2;
bool tx_pkt_filtering;
struct e1000_host_mng_dhcp_cookie mng_cookie;
- uint16_t phy_spd_default;
- uint16_t autoneg_advertised;
- uint16_t pci_cmd_word;
- uint16_t fc_high_water;
- uint16_t fc_low_water;
- uint16_t fc_pause_time;
- uint16_t current_ifs_val;
- uint16_t ifs_min_val;
- uint16_t ifs_max_val;
- uint16_t ifs_step_size;
- uint16_t ifs_ratio;
- uint16_t device_id;
- uint16_t vendor_id;
- uint16_t subsystem_id;
- uint16_t subsystem_vendor_id;
- uint8_t revision_id;
- uint8_t autoneg;
- uint8_t mdix;
- uint8_t forced_speed_duplex;
- uint8_t wait_autoneg_complete;
- uint8_t dma_fairness;
- uint8_t mac_addr[NODE_ADDRESS_SIZE];
- uint8_t perm_mac_addr[NODE_ADDRESS_SIZE];
+ u16 phy_spd_default;
+ u16 autoneg_advertised;
+ u16 pci_cmd_word;
+ u16 fc_high_water;
+ u16 fc_low_water;
+ u16 fc_pause_time;
+ u16 current_ifs_val;
+ u16 ifs_min_val;
+ u16 ifs_max_val;
+ u16 ifs_step_size;
+ u16 ifs_ratio;
+ u16 device_id;
+ u16 vendor_id;
+ u16 subsystem_id;
+ u16 subsystem_vendor_id;
+ u8 revision_id;
+ u8 autoneg;
+ u8 mdix;
+ u8 forced_speed_duplex;
+ u8 wait_autoneg_complete;
+ u8 dma_fairness;
+ u8 mac_addr[NODE_ADDRESS_SIZE];
+ u8 perm_mac_addr[NODE_ADDRESS_SIZE];
bool disable_polarity_correction;
bool speed_downgraded;
e1000_smart_speed smart_speed;
@@ -2165,14 +2165,14 @@
#define E1000_HI_COMMAND_TIMEOUT 500 /* Time in ms to process HI command */
struct e1000_host_command_header {
- uint8_t command_id;
- uint8_t command_length;
- uint8_t command_options; /* I/F bits for command, status for return */
- uint8_t checksum;
+ u8 command_id;
+ u8 command_length;
+ u8 command_options; /* I/F bits for command, status for return */
+ u8 checksum;
};
struct e1000_host_command_info {
struct e1000_host_command_header command_header; /* Command Head/Command Result Head has 4 bytes */
- uint8_t command_data[E1000_HI_MAX_DATA_LENGTH]; /* Command data can length 0..252 */
+ u8 command_data[E1000_HI_MAX_DATA_LENGTH]; /* Command data can length 0..252 */
};
/* Host SMB register #0 */
@@ -2495,7 +2495,7 @@
/* Number of milliseconds we wait for PHY configuration done after MAC reset */
#define PHY_CFG_TIMEOUT 100
-#define E1000_TX_BUFFER_SIZE ((uint32_t)1514)
+#define E1000_TX_BUFFER_SIZE ((u32)1514)
/* The carrier extension symbol, as received by the NIC. */
#define CARRIER_EXTENSION 0x0F
@@ -3312,68 +3312,68 @@
/* Offset 04h HSFSTS */
union ich8_hws_flash_status {
struct ich8_hsfsts {
-#ifdef E1000_BIG_ENDIAN
- uint16_t reserved2 :6;
- uint16_t fldesvalid :1;
- uint16_t flockdn :1;
- uint16_t flcdone :1;
- uint16_t flcerr :1;
- uint16_t dael :1;
- uint16_t berasesz :2;
- uint16_t flcinprog :1;
- uint16_t reserved1 :2;
+#ifdef __BIG_ENDIAN
+ u16 reserved2 :6;
+ u16 fldesvalid :1;
+ u16 flockdn :1;
+ u16 flcdone :1;
+ u16 flcerr :1;
+ u16 dael :1;
+ u16 berasesz :2;
+ u16 flcinprog :1;
+ u16 reserved1 :2;
#else
- uint16_t flcdone :1; /* bit 0 Flash Cycle Done */
- uint16_t flcerr :1; /* bit 1 Flash Cycle Error */
- uint16_t dael :1; /* bit 2 Direct Access error Log */
- uint16_t berasesz :2; /* bit 4:3 Block/Sector Erase Size */
- uint16_t flcinprog :1; /* bit 5 flash SPI cycle in Progress */
- uint16_t reserved1 :2; /* bit 13:6 Reserved */
- uint16_t reserved2 :6; /* bit 13:6 Reserved */
- uint16_t fldesvalid :1; /* bit 14 Flash Descriptor Valid */
- uint16_t flockdn :1; /* bit 15 Flash Configuration Lock-Down */
+ u16 flcdone :1; /* bit 0 Flash Cycle Done */
+ u16 flcerr :1; /* bit 1 Flash Cycle Error */
+ u16 dael :1; /* bit 2 Direct Access error Log */
+ u16 berasesz :2; /* bit 4:3 Block/Sector Erase Size */
+ u16 flcinprog :1; /* bit 5 flash SPI cycle in Progress */
+ u16 reserved1 :2; /* bit 13:6 Reserved */
+ u16 reserved2 :6; /* bit 13:6 Reserved */
+ u16 fldesvalid :1; /* bit 14 Flash Descriptor Valid */
+ u16 flockdn :1; /* bit 15 Flash Configuration Lock-Down */
#endif
} hsf_status;
- uint16_t regval;
+ u16 regval;
};
/* ICH8 GbE Flash Hardware Sequencing Flash control Register bit breakdown */
/* Offset 06h FLCTL */
union ich8_hws_flash_ctrl {
struct ich8_hsflctl {
-#ifdef E1000_BIG_ENDIAN
- uint16_t fldbcount :2;
- uint16_t flockdn :6;
- uint16_t flcgo :1;
- uint16_t flcycle :2;
- uint16_t reserved :5;
+#ifdef __BIG_ENDIAN
+ u16 fldbcount :2;
+ u16 flockdn :6;
+ u16 flcgo :1;
+ u16 flcycle :2;
+ u16 reserved :5;
#else
- uint16_t flcgo :1; /* 0 Flash Cycle Go */
- uint16_t flcycle :2; /* 2:1 Flash Cycle */
- uint16_t reserved :5; /* 7:3 Reserved */
- uint16_t fldbcount :2; /* 9:8 Flash Data Byte Count */
- uint16_t flockdn :6; /* 15:10 Reserved */
+ u16 flcgo :1; /* 0 Flash Cycle Go */
+ u16 flcycle :2; /* 2:1 Flash Cycle */
+ u16 reserved :5; /* 7:3 Reserved */
+ u16 fldbcount :2; /* 9:8 Flash Data Byte Count */
+ u16 flockdn :6; /* 15:10 Reserved */
#endif
} hsf_ctrl;
- uint16_t regval;
+ u16 regval;
};
/* ICH8 Flash Region Access Permissions */
union ich8_hws_flash_regacc {
struct ich8_flracc {
-#ifdef E1000_BIG_ENDIAN
- uint32_t gmwag :8;
- uint32_t gmrag :8;
- uint32_t grwa :8;
- uint32_t grra :8;
+#ifdef __BIG_ENDIAN
+ u32 gmwag :8;
+ u32 gmrag :8;
+ u32 grwa :8;
+ u32 grra :8;
#else
- uint32_t grra :8; /* 0:7 GbE region Read Access */
- uint32_t grwa :8; /* 8:15 GbE region Write Access */
- uint32_t gmrag :8; /* 23:16 GbE Master Read Access Grant */
- uint32_t gmwag :8; /* 31:24 GbE Master Write Access Grant */
+ u32 grra :8; /* 0:7 GbE region Read Access */
+ u32 grwa :8; /* 8:15 GbE region Write Access */
+ u32 gmrag :8; /* 23:16 GbE Master Read Access Grant */
+ u32 gmwag :8; /* 31:24 GbE Master Write Access Grant */
#endif
} hsf_flregacc;
- uint16_t regval;
+ u16 regval;
};
/* Miscellaneous PHY bit definitions. */
diff --git a/drivers/net/e1000/e1000_main.c b/drivers/net/e1000/e1000_main.c
index 757d02f..59579b1 100644
--- a/drivers/net/e1000/e1000_main.c
+++ b/drivers/net/e1000/e1000_main.c
@@ -127,7 +127,7 @@
void e1000_down(struct e1000_adapter *adapter);
void e1000_reinit_locked(struct e1000_adapter *adapter);
void e1000_reset(struct e1000_adapter *adapter);
-int e1000_set_spd_dplx(struct e1000_adapter *adapter, uint16_t spddplx);
+int e1000_set_spd_dplx(struct e1000_adapter *adapter, u16 spddplx);
int e1000_setup_all_tx_resources(struct e1000_adapter *adapter);
int e1000_setup_all_rx_resources(struct e1000_adapter *adapter);
void e1000_free_all_tx_resources(struct e1000_adapter *adapter);
@@ -203,8 +203,8 @@
struct sk_buff *skb);
static void e1000_vlan_rx_register(struct net_device *netdev, struct vlan_group *grp);
-static void e1000_vlan_rx_add_vid(struct net_device *netdev, uint16_t vid);
-static void e1000_vlan_rx_kill_vid(struct net_device *netdev, uint16_t vid);
+static void e1000_vlan_rx_add_vid(struct net_device *netdev, u16 vid);
+static void e1000_vlan_rx_kill_vid(struct net_device *netdev, u16 vid);
static void e1000_restore_vlan(struct e1000_adapter *adapter);
static int e1000_suspend(struct pci_dev *pdev, pm_message_t state);
@@ -368,8 +368,8 @@
e1000_update_mng_vlan(struct e1000_adapter *adapter)
{
struct net_device *netdev = adapter->netdev;
- uint16_t vid = adapter->hw.mng_cookie.vlan_id;
- uint16_t old_vid = adapter->mng_vlan_id;
+ u16 vid = adapter->hw.mng_cookie.vlan_id;
+ u16 old_vid = adapter->mng_vlan_id;
if (adapter->vlgrp) {
if (!vlan_group_get_device(adapter->vlgrp, vid)) {
if (adapter->hw.mng_cookie.status &
@@ -379,7 +379,7 @@
} else
adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
- if ((old_vid != (uint16_t)E1000_MNG_VLAN_NONE) &&
+ if ((old_vid != (u16)E1000_MNG_VLAN_NONE) &&
(vid != old_vid) &&
!vlan_group_get_device(adapter->vlgrp, old_vid))
e1000_vlan_rx_kill_vid(netdev, old_vid);
@@ -402,8 +402,8 @@
static void
e1000_release_hw_control(struct e1000_adapter *adapter)
{
- uint32_t ctrl_ext;
- uint32_t swsm;
+ u32 ctrl_ext;
+ u32 swsm;
/* Let firmware taken over control of h/w */
switch (adapter->hw.mac_type) {
@@ -439,8 +439,8 @@
static void
e1000_get_hw_control(struct e1000_adapter *adapter)
{
- uint32_t ctrl_ext;
- uint32_t swsm;
+ u32 ctrl_ext;
+ u32 swsm;
/* Let firmware know the driver has taken over */
switch (adapter->hw.mac_type) {
@@ -466,7 +466,7 @@
e1000_init_manageability(struct e1000_adapter *adapter)
{
if (adapter->en_mng_pt) {
- uint32_t manc = E1000_READ_REG(&adapter->hw, MANC);
+ u32 manc = E1000_READ_REG(&adapter->hw, MANC);
/* disable hardware interception of ARP */
manc &= ~(E1000_MANC_ARP_EN);
@@ -475,7 +475,7 @@
/* this will probably generate destination unreachable messages
* from the host OS, but the packets will be handled on SMBUS */
if (adapter->hw.has_manc2h) {
- uint32_t manc2h = E1000_READ_REG(&adapter->hw, MANC2H);
+ u32 manc2h = E1000_READ_REG(&adapter->hw, MANC2H);
manc |= E1000_MANC_EN_MNG2HOST;
#define E1000_MNG2HOST_PORT_623 (1 << 5)
@@ -493,7 +493,7 @@
e1000_release_manageability(struct e1000_adapter *adapter)
{
if (adapter->en_mng_pt) {
- uint32_t manc = E1000_READ_REG(&adapter->hw, MANC);
+ u32 manc = E1000_READ_REG(&adapter->hw, MANC);
/* re-enable hardware interception of ARP */
manc |= E1000_MANC_ARP_EN;
@@ -566,7 +566,7 @@
void e1000_power_up_phy(struct e1000_adapter *adapter)
{
- uint16_t mii_reg = 0;
+ u16 mii_reg = 0;
/* Just clear the power down bit to wake the phy back up */
if (adapter->hw.media_type == e1000_media_type_copper) {
@@ -587,7 +587,7 @@
* (c) SoL/IDER session is active */
if (!adapter->wol && adapter->hw.mac_type >= e1000_82540 &&
adapter->hw.media_type == e1000_media_type_copper) {
- uint16_t mii_reg = 0;
+ u16 mii_reg = 0;
switch (adapter->hw.mac_type) {
case e1000_82540:
@@ -667,8 +667,8 @@
void
e1000_reset(struct e1000_adapter *adapter)
{
- uint32_t pba = 0, tx_space, min_tx_space, min_rx_space;
- uint16_t fc_high_water_mark = E1000_FC_HIGH_DIFF;
+ u32 pba = 0, tx_space, min_tx_space, min_rx_space;
+ u16 fc_high_water_mark = E1000_FC_HIGH_DIFF;
bool legacy_pba_adjust = false;
/* Repartition Pba for greater than 9k mtu
@@ -815,7 +815,7 @@
adapter->hw.mac_type <= e1000_82547_rev_2 &&
adapter->hw.autoneg == 1 &&
adapter->hw.autoneg_advertised == ADVERTISE_1000_FULL) {
- uint32_t ctrl = E1000_READ_REG(&adapter->hw, CTRL);
+ u32 ctrl = E1000_READ_REG(&adapter->hw, CTRL);
/* clear phy power management bit if we are in gig only mode,
* which if enabled will attempt negotiation to 100Mb, which
* can cause a loss of link at power off or driver unload */
@@ -832,7 +832,7 @@
if (!adapter->smart_power_down &&
(adapter->hw.mac_type == e1000_82571 ||
adapter->hw.mac_type == e1000_82572)) {
- uint16_t phy_data = 0;
+ u16 phy_data = 0;
/* speed up time to link by disabling smart power down, ignore
* the return value of this function because there is nothing
* different we would do if it failed */
@@ -926,8 +926,8 @@
static int cards_found = 0;
static int global_quad_port_a = 0; /* global ksp3 port a indication */
int i, err, pci_using_dac;
- uint16_t eeprom_data = 0;
- uint16_t eeprom_apme_mask = E1000_EEPROM_APME;
+ u16 eeprom_data = 0;
+ u16 eeprom_apme_mask = E1000_EEPROM_APME;
DECLARE_MAC_BUF(mac);
if ((err = pci_enable_device(pdev)))
@@ -1702,10 +1702,10 @@
static void
e1000_configure_tx(struct e1000_adapter *adapter)
{
- uint64_t tdba;
+ u64 tdba;
struct e1000_hw *hw = &adapter->hw;
- uint32_t tdlen, tctl, tipg, tarc;
- uint32_t ipgr1, ipgr2;
+ u32 tdlen, tctl, tipg, tarc;
+ u32 ipgr1, ipgr2;
/* Setup the HW Tx Head and Tail descriptor pointers */
@@ -1947,10 +1947,10 @@
static void
e1000_setup_rctl(struct e1000_adapter *adapter)
{
- uint32_t rctl, rfctl;
- uint32_t psrctl = 0;
+ u32 rctl, rfctl;
+ u32 psrctl = 0;
#ifndef CONFIG_E1000_DISABLE_PACKET_SPLIT
- uint32_t pages = 0;
+ u32 pages = 0;
#endif
rctl = E1000_READ_REG(&adapter->hw, RCTL);
@@ -2065,9 +2065,9 @@
static void
e1000_configure_rx(struct e1000_adapter *adapter)
{
- uint64_t rdba;
+ u64 rdba;
struct e1000_hw *hw = &adapter->hw;
- uint32_t rdlen, rctl, rxcsum, ctrl_ext;
+ u32 rdlen, rctl, rxcsum, ctrl_ext;
if (adapter->rx_ps_pages) {
/* this is a 32 byte descriptor */
@@ -2387,7 +2387,7 @@
e1000_enter_82542_rst(struct e1000_adapter *adapter)
{
struct net_device *netdev = adapter->netdev;
- uint32_t rctl;
+ u32 rctl;
e1000_pci_clear_mwi(&adapter->hw);
@@ -2405,7 +2405,7 @@
e1000_leave_82542_rst(struct e1000_adapter *adapter)
{
struct net_device *netdev = adapter->netdev;
- uint32_t rctl;
+ u32 rctl;
rctl = E1000_READ_REG(&adapter->hw, RCTL);
rctl &= ~E1000_RCTL_RST;
@@ -2490,8 +2490,8 @@
struct e1000_hw *hw = &adapter->hw;
struct dev_addr_list *uc_ptr;
struct dev_addr_list *mc_ptr;
- uint32_t rctl;
- uint32_t hash_value;
+ u32 rctl;
+ u32 hash_value;
int i, rar_entries = E1000_RAR_ENTRIES;
int mta_reg_count = (hw->mac_type == e1000_ich8lan) ?
E1000_NUM_MTA_REGISTERS_ICH8LAN :
@@ -2595,7 +2595,7 @@
{
struct e1000_adapter *adapter = (struct e1000_adapter *) data;
struct net_device *netdev = adapter->netdev;
- uint32_t tctl;
+ u32 tctl;
if (atomic_read(&adapter->tx_fifo_stall)) {
if ((E1000_READ_REG(&adapter->hw, TDT) ==
@@ -2637,8 +2637,8 @@
struct e1000_adapter *adapter = (struct e1000_adapter *) data;
struct net_device *netdev = adapter->netdev;
struct e1000_tx_ring *txdr = adapter->tx_ring;
- uint32_t link, tctl;
- int32_t ret_val;
+ u32 link, tctl;
+ s32 ret_val;
ret_val = e1000_check_for_link(&adapter->hw);
if ((ret_val == E1000_ERR_PHY) &&
@@ -2663,7 +2663,7 @@
if (link) {
if (!netif_carrier_ok(netdev)) {
- uint32_t ctrl;
+ u32 ctrl;
bool txb2b = true;
e1000_get_speed_and_duplex(&adapter->hw,
&adapter->link_speed,
@@ -2700,7 +2700,7 @@
if ((adapter->hw.mac_type == e1000_82571 ||
adapter->hw.mac_type == e1000_82572) &&
!txb2b) {
- uint32_t tarc0;
+ u32 tarc0;
tarc0 = E1000_READ_REG(&adapter->hw, TARC0);
tarc0 &= ~(1 << 21);
E1000_WRITE_REG(&adapter->hw, TARC0, tarc0);
@@ -2742,7 +2742,7 @@
/* make sure the receive unit is started */
if (adapter->hw.rx_needs_kicking) {
struct e1000_hw *hw = &adapter->hw;
- uint32_t rctl = E1000_READ_REG(hw, RCTL);
+ u32 rctl = E1000_READ_REG(hw, RCTL);
E1000_WRITE_REG(hw, RCTL, rctl | E1000_RCTL_EN);
}
}
@@ -2832,7 +2832,7 @@
* @bytes: the number of bytes during this measurement interval
**/
static unsigned int e1000_update_itr(struct e1000_adapter *adapter,
- uint16_t itr_setting,
+ u16 itr_setting,
int packets,
int bytes)
{
@@ -2884,8 +2884,8 @@
static void e1000_set_itr(struct e1000_adapter *adapter)
{
struct e1000_hw *hw = &adapter->hw;
- uint16_t current_itr;
- uint32_t new_itr = adapter->itr;
+ u16 current_itr;
+ u32 new_itr = adapter->itr;
if (unlikely(hw->mac_type < e1000_82540))
return;
@@ -2959,9 +2959,9 @@
struct e1000_context_desc *context_desc;
struct e1000_buffer *buffer_info;
unsigned int i;
- uint32_t cmd_length = 0;
- uint16_t ipcse = 0, tucse, mss;
- uint8_t ipcss, ipcso, tucss, tucso, hdr_len;
+ u32 cmd_length = 0;
+ u16 ipcse = 0, tucse, mss;
+ u8 ipcss, ipcso, tucss, tucso, hdr_len;
int err;
if (skb_is_gso(skb)) {
@@ -3032,7 +3032,7 @@
struct e1000_context_desc *context_desc;
struct e1000_buffer *buffer_info;
unsigned int i;
- uint8_t css;
+ u8 css;
if (likely(skb->ip_summed == CHECKSUM_PARTIAL)) {
css = skb_transport_offset(skb);
@@ -3177,7 +3177,7 @@
{
struct e1000_tx_desc *tx_desc = NULL;
struct e1000_buffer *buffer_info;
- uint32_t txd_upper = 0, txd_lower = E1000_TXD_CMD_IFCS;
+ u32 txd_upper = 0, txd_lower = E1000_TXD_CMD_IFCS;
unsigned int i;
if (likely(tx_flags & E1000_TX_FLAGS_TSO)) {
@@ -3241,8 +3241,8 @@
static int
e1000_82547_fifo_workaround(struct e1000_adapter *adapter, struct sk_buff *skb)
{
- uint32_t fifo_space = adapter->tx_fifo_size - adapter->tx_fifo_head;
- uint32_t skb_fifo_len = skb->len + E1000_FIFO_HDR;
+ u32 fifo_space = adapter->tx_fifo_size - adapter->tx_fifo_head;
+ u32 skb_fifo_len = skb->len + E1000_FIFO_HDR;
skb_fifo_len = ALIGN(skb_fifo_len, E1000_FIFO_HDR);
@@ -3269,7 +3269,7 @@
e1000_transfer_dhcp_info(struct e1000_adapter *adapter, struct sk_buff *skb)
{
struct e1000_hw *hw = &adapter->hw;
- uint16_t length, offset;
+ u16 length, offset;
if (vlan_tx_tag_present(skb)) {
if (!((vlan_tx_tag_get(skb) == adapter->hw.mng_cookie.vlan_id) &&
( adapter->hw.mng_cookie.status &
@@ -3280,17 +3280,17 @@
struct ethhdr *eth = (struct ethhdr *) skb->data;
if ((htons(ETH_P_IP) == eth->h_proto)) {
const struct iphdr *ip =
- (struct iphdr *)((uint8_t *)skb->data+14);
+ (struct iphdr *)((u8 *)skb->data+14);
if (IPPROTO_UDP == ip->protocol) {
struct udphdr *udp =
- (struct udphdr *)((uint8_t *)ip +
+ (struct udphdr *)((u8 *)ip +
(ip->ihl << 2));
if (ntohs(udp->dest) == 67) {
- offset = (uint8_t *)udp + 8 - skb->data;
+ offset = (u8 *)udp + 8 - skb->data;
length = skb->len - offset;
return e1000_mng_write_dhcp_info(hw,
- (uint8_t *)udp + 8,
+ (u8 *)udp + 8,
length);
}
}
@@ -3370,7 +3370,7 @@
* overrun the FIFO, adjust the max buffer len if mss
* drops. */
if (mss) {
- uint8_t hdr_len;
+ u8 hdr_len;
max_per_txd = min(mss << 2, max_per_txd);
max_txd_pwr = fls(max_per_txd) - 1;
@@ -3557,7 +3557,7 @@
{
struct e1000_adapter *adapter = netdev_priv(netdev);
int max_frame = new_mtu + ENET_HEADER_SIZE + ETHERNET_FCS_SIZE;
- uint16_t eeprom_data = 0;
+ u16 eeprom_data = 0;
if ((max_frame < MINIMUM_ETHERNET_FRAME_SIZE) ||
(max_frame > MAX_JUMBO_FRAME_SIZE)) {
@@ -3652,7 +3652,7 @@
struct e1000_hw *hw = &adapter->hw;
struct pci_dev *pdev = adapter->pdev;
unsigned long flags;
- uint16_t phy_tmp;
+ u16 phy_tmp;
#define PHY_IDLE_ERROR_COUNT_MASK 0x00FF
@@ -3829,7 +3829,7 @@
#ifndef CONFIG_E1000_NAPI
int i;
#endif
- uint32_t icr = E1000_READ_REG(hw, ICR);
+ u32 icr = E1000_READ_REG(hw, ICR);
/* in NAPI mode read ICR disables interrupts using IAM */
@@ -3841,7 +3841,7 @@
if (netif_carrier_ok(netdev) &&
(adapter->hw.mac_type == e1000_80003es2lan)) {
/* disable receives */
- uint32_t rctl = E1000_READ_REG(hw, RCTL);
+ u32 rctl = E1000_READ_REG(hw, RCTL);
E1000_WRITE_REG(hw, RCTL, rctl & ~E1000_RCTL_EN);
}
/* guard against interrupt when we're going down */
@@ -3888,7 +3888,7 @@
struct net_device *netdev = data;
struct e1000_adapter *adapter = netdev_priv(netdev);
struct e1000_hw *hw = &adapter->hw;
- uint32_t rctl, icr = E1000_READ_REG(hw, ICR);
+ u32 rctl, icr = E1000_READ_REG(hw, ICR);
#ifndef CONFIG_E1000_NAPI
int i;
#endif
@@ -4139,11 +4139,11 @@
static void
e1000_rx_checksum(struct e1000_adapter *adapter,
- uint32_t status_err, uint32_t csum,
+ u32 status_err, u32 csum,
struct sk_buff *skb)
{
- uint16_t status = (uint16_t)status_err;
- uint8_t errors = (uint8_t)(status_err >> 24);
+ u16 status = (u16)status_err;
+ u8 errors = (u8)(status_err >> 24);
skb->ip_summed = CHECKSUM_NONE;
/* 82543 or newer only */
@@ -4200,8 +4200,8 @@
struct e1000_rx_desc *rx_desc, *next_rxd;
struct e1000_buffer *buffer_info, *next_buffer;
unsigned long flags;
- uint32_t length;
- uint8_t last_byte;
+ u32 length;
+ u8 last_byte;
unsigned int i;
int cleaned_count = 0;
bool cleaned = false;
@@ -4301,8 +4301,8 @@
/* Receive Checksum Offload */
e1000_rx_checksum(adapter,
- (uint32_t)(status) |
- ((uint32_t)(rx_desc->errors) << 24),
+ (u32)(status) |
+ ((u32)(rx_desc->errors) << 24),
le16_to_cpu(rx_desc->csum), skb);
skb->protocol = eth_type_trans(skb, netdev);
@@ -4376,7 +4376,7 @@
struct e1000_ps_page_dma *ps_page_dma;
struct sk_buff *skb;
unsigned int i, j;
- uint32_t length, staterr;
+ u32 length, staterr;
int cleaned_count = 0;
bool cleaned = false;
unsigned int total_rx_bytes=0, total_rx_packets=0;
@@ -4759,8 +4759,8 @@
static void
e1000_smartspeed(struct e1000_adapter *adapter)
{
- uint16_t phy_status;
- uint16_t phy_ctrl;
+ u16 phy_status;
+ u16 phy_ctrl;
if ((adapter->hw.phy_type != e1000_phy_igp) || !adapter->hw.autoneg ||
!(adapter->hw.autoneg_advertised & ADVERTISE_1000_FULL))
@@ -4839,8 +4839,8 @@
struct e1000_adapter *adapter = netdev_priv(netdev);
struct mii_ioctl_data *data = if_mii(ifr);
int retval;
- uint16_t mii_reg;
- uint16_t spddplx;
+ u16 mii_reg;
+ u16 spddplx;
unsigned long flags;
if (adapter->hw.media_type != e1000_media_type_copper)
@@ -4959,11 +4959,11 @@
pcix_set_mmrbc(adapter->pdev, mmrbc);
}
-int32_t
-e1000_read_pcie_cap_reg(struct e1000_hw *hw, uint32_t reg, uint16_t *value)
+s32
+e1000_read_pcie_cap_reg(struct e1000_hw *hw, u32 reg, u16 *value)
{
struct e1000_adapter *adapter = hw->back;
- uint16_t cap_offset;
+ u16 cap_offset;
cap_offset = pci_find_capability(adapter->pdev, PCI_CAP_ID_EXP);
if (!cap_offset)
@@ -4975,7 +4975,7 @@
}
void
-e1000_io_write(struct e1000_hw *hw, unsigned long port, uint32_t value)
+e1000_io_write(struct e1000_hw *hw, unsigned long port, u32 value)
{
outl(value, port);
}
@@ -4984,7 +4984,7 @@
e1000_vlan_rx_register(struct net_device *netdev, struct vlan_group *grp)
{
struct e1000_adapter *adapter = netdev_priv(netdev);
- uint32_t ctrl, rctl;
+ u32 ctrl, rctl;
if (!test_bit(__E1000_DOWN, &adapter->flags))
e1000_irq_disable(adapter);
@@ -5016,7 +5016,7 @@
rctl &= ~E1000_RCTL_VFE;
E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
if (adapter->mng_vlan_id !=
- (uint16_t)E1000_MNG_VLAN_NONE) {
+ (u16)E1000_MNG_VLAN_NONE) {
e1000_vlan_rx_kill_vid(netdev,
adapter->mng_vlan_id);
adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
@@ -5029,10 +5029,10 @@
}
static void
-e1000_vlan_rx_add_vid(struct net_device *netdev, uint16_t vid)
+e1000_vlan_rx_add_vid(struct net_device *netdev, u16 vid)
{
struct e1000_adapter *adapter = netdev_priv(netdev);
- uint32_t vfta, index;
+ u32 vfta, index;
if ((adapter->hw.mng_cookie.status &
E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT) &&
@@ -5046,10 +5046,10 @@
}
static void
-e1000_vlan_rx_kill_vid(struct net_device *netdev, uint16_t vid)
+e1000_vlan_rx_kill_vid(struct net_device *netdev, u16 vid)
{
struct e1000_adapter *adapter = netdev_priv(netdev);
- uint32_t vfta, index;
+ u32 vfta, index;
if (!test_bit(__E1000_DOWN, &adapter->flags))
e1000_irq_disable(adapter);
@@ -5078,7 +5078,7 @@
e1000_vlan_rx_register(adapter->netdev, adapter->vlgrp);
if (adapter->vlgrp) {
- uint16_t vid;
+ u16 vid;
for (vid = 0; vid < VLAN_GROUP_ARRAY_LEN; vid++) {
if (!vlan_group_get_device(adapter->vlgrp, vid))
continue;
@@ -5088,7 +5088,7 @@
}
int
-e1000_set_spd_dplx(struct e1000_adapter *adapter, uint16_t spddplx)
+e1000_set_spd_dplx(struct e1000_adapter *adapter, u16 spddplx)
{
adapter->hw.autoneg = 0;
@@ -5129,8 +5129,8 @@
{
struct net_device *netdev = pci_get_drvdata(pdev);
struct e1000_adapter *adapter = netdev_priv(netdev);
- uint32_t ctrl, ctrl_ext, rctl, status;
- uint32_t wufc = adapter->wol;
+ u32 ctrl, ctrl_ext, rctl, status;
+ u32 wufc = adapter->wol;
#ifdef CONFIG_PM
int retval = 0;
#endif
@@ -5227,7 +5227,7 @@
{
struct net_device *netdev = pci_get_drvdata(pdev);
struct e1000_adapter *adapter = netdev_priv(netdev);
- uint32_t err;
+ u32 err;
pci_set_power_state(pdev, PCI_D0);
pci_restore_state(pdev);
diff --git a/drivers/net/e1000e/82571.c b/drivers/net/e1000e/82571.c
index f7e1619..01c8866 100644
--- a/drivers/net/e1000e/82571.c
+++ b/drivers/net/e1000e/82571.c
@@ -171,6 +171,10 @@
* for setting word_size.
*/
size += NVM_WORD_SIZE_BASE_SHIFT;
+
+ /* EEPROM access above 16k is unsupported */
+ if (size > 14)
+ size = 14;
nvm->word_size = 1 << size;
break;
}
@@ -244,7 +248,7 @@
return 0;
}
-static s32 e1000_get_invariants_82571(struct e1000_adapter *adapter)
+static s32 e1000_get_variants_82571(struct e1000_adapter *adapter)
{
struct e1000_hw *hw = &adapter->hw;
static int global_quad_port_a; /* global port a indication */
@@ -832,19 +836,19 @@
ret_val = e1000_setup_link_82571(hw);
/* Set the transmit descriptor write-back policy */
- reg_data = er32(TXDCTL);
+ reg_data = er32(TXDCTL(0));
reg_data = (reg_data & ~E1000_TXDCTL_WTHRESH) |
E1000_TXDCTL_FULL_TX_DESC_WB |
E1000_TXDCTL_COUNT_DESC;
- ew32(TXDCTL, reg_data);
+ ew32(TXDCTL(0), reg_data);
/* ...for both queues. */
if (mac->type != e1000_82573) {
- reg_data = er32(TXDCTL1);
+ reg_data = er32(TXDCTL(1));
reg_data = (reg_data & ~E1000_TXDCTL_WTHRESH) |
E1000_TXDCTL_FULL_TX_DESC_WB |
E1000_TXDCTL_COUNT_DESC;
- ew32(TXDCTL1, reg_data);
+ ew32(TXDCTL(1), reg_data);
} else {
e1000e_enable_tx_pkt_filtering(hw);
reg_data = er32(GCR);
@@ -874,17 +878,17 @@
u32 reg;
/* Transmit Descriptor Control 0 */
- reg = er32(TXDCTL);
+ reg = er32(TXDCTL(0));
reg |= (1 << 22);
- ew32(TXDCTL, reg);
+ ew32(TXDCTL(0), reg);
/* Transmit Descriptor Control 1 */
- reg = er32(TXDCTL1);
+ reg = er32(TXDCTL(1));
reg |= (1 << 22);
- ew32(TXDCTL1, reg);
+ ew32(TXDCTL(1), reg);
/* Transmit Arbitration Control 0 */
- reg = er32(TARC0);
+ reg = er32(TARC(0));
reg &= ~(0xF << 27); /* 30:27 */
switch (hw->mac.type) {
case e1000_82571:
@@ -894,10 +898,10 @@
default:
break;
}
- ew32(TARC0, reg);
+ ew32(TARC(0), reg);
/* Transmit Arbitration Control 1 */
- reg = er32(TARC1);
+ reg = er32(TARC(1));
switch (hw->mac.type) {
case e1000_82571:
case e1000_82572:
@@ -907,7 +911,7 @@
reg &= ~(1 << 28);
else
reg |= (1 << 28);
- ew32(TARC1, reg);
+ ew32(TARC(1), reg);
break;
default:
break;
@@ -1333,7 +1337,7 @@
| FLAG_TARC_SPEED_MODE_BIT /* errata */
| FLAG_APME_CHECK_PORT_B,
.pba = 38,
- .get_invariants = e1000_get_invariants_82571,
+ .get_variants = e1000_get_variants_82571,
.mac_ops = &e82571_mac_ops,
.phy_ops = &e82_phy_ops_igp,
.nvm_ops = &e82571_nvm_ops,
@@ -1351,7 +1355,7 @@
| FLAG_HAS_STATS_ICR_ICT
| FLAG_TARC_SPEED_MODE_BIT, /* errata */
.pba = 38,
- .get_invariants = e1000_get_invariants_82571,
+ .get_variants = e1000_get_variants_82571,
.mac_ops = &e82571_mac_ops,
.phy_ops = &e82_phy_ops_igp,
.nvm_ops = &e82571_nvm_ops,
@@ -1371,7 +1375,7 @@
| FLAG_HAS_ERT
| FLAG_HAS_SWSM_ON_LOAD,
.pba = 20,
- .get_invariants = e1000_get_invariants_82571,
+ .get_variants = e1000_get_variants_82571,
.mac_ops = &e82571_mac_ops,
.phy_ops = &e82_phy_ops_m88,
.nvm_ops = &e82571_nvm_ops,
diff --git a/drivers/net/e1000e/e1000.h b/drivers/net/e1000e/e1000.h
index b941a6b..5a89dff 100644
--- a/drivers/net/e1000e/e1000.h
+++ b/drivers/net/e1000e/e1000.h
@@ -271,7 +271,7 @@
enum e1000_mac_type mac;
unsigned int flags;
u32 pba;
- s32 (*get_invariants)(struct e1000_adapter *);
+ s32 (*get_variants)(struct e1000_adapter *);
struct e1000_mac_operations *mac_ops;
struct e1000_phy_operations *phy_ops;
struct e1000_nvm_operations *nvm_ops;
@@ -357,7 +357,7 @@
extern struct e1000_info e1000_ich9_info;
extern struct e1000_info e1000_es2_info;
-extern s32 e1000e_read_part_num(struct e1000_hw *hw, u32 *part_num);
+extern s32 e1000e_read_pba_num(struct e1000_hw *hw, u32 *pba_num);
extern s32 e1000e_commit_phy(struct e1000_hw *hw);
diff --git a/drivers/net/e1000e/es2lan.c b/drivers/net/e1000e/es2lan.c
index e3f4aee..d59a99a 100644
--- a/drivers/net/e1000e/es2lan.c
+++ b/drivers/net/e1000e/es2lan.c
@@ -178,6 +178,10 @@
* for setting word_size.
*/
size += NVM_WORD_SIZE_BASE_SHIFT;
+
+ /* EEPROM access above 16k is unsupported */
+ if (size > 14)
+ size = 14;
nvm->word_size = 1 << size;
return 0;
@@ -234,7 +238,7 @@
return 0;
}
-static s32 e1000_get_invariants_80003es2lan(struct e1000_adapter *adapter)
+static s32 e1000_get_variants_80003es2lan(struct e1000_adapter *adapter)
{
struct e1000_hw *hw = &adapter->hw;
s32 rc;
@@ -788,16 +792,16 @@
ret_val = e1000e_setup_link(hw);
/* Set the transmit descriptor write-back policy */
- reg_data = er32(TXDCTL);
+ reg_data = er32(TXDCTL(0));
reg_data = (reg_data & ~E1000_TXDCTL_WTHRESH) |
E1000_TXDCTL_FULL_TX_DESC_WB | E1000_TXDCTL_COUNT_DESC;
- ew32(TXDCTL, reg_data);
+ ew32(TXDCTL(0), reg_data);
/* ...for both queues. */
- reg_data = er32(TXDCTL1);
+ reg_data = er32(TXDCTL(1));
reg_data = (reg_data & ~E1000_TXDCTL_WTHRESH) |
E1000_TXDCTL_FULL_TX_DESC_WB | E1000_TXDCTL_COUNT_DESC;
- ew32(TXDCTL1, reg_data);
+ ew32(TXDCTL(1), reg_data);
/* Enable retransmit on late collisions */
reg_data = er32(TCTL);
@@ -842,29 +846,29 @@
u32 reg;
/* Transmit Descriptor Control 0 */
- reg = er32(TXDCTL);
+ reg = er32(TXDCTL(0));
reg |= (1 << 22);
- ew32(TXDCTL, reg);
+ ew32(TXDCTL(0), reg);
/* Transmit Descriptor Control 1 */
- reg = er32(TXDCTL1);
+ reg = er32(TXDCTL(1));
reg |= (1 << 22);
- ew32(TXDCTL1, reg);
+ ew32(TXDCTL(1), reg);
/* Transmit Arbitration Control 0 */
- reg = er32(TARC0);
+ reg = er32(TARC(0));
reg &= ~(0xF << 27); /* 30:27 */
if (hw->phy.media_type != e1000_media_type_copper)
reg &= ~(1 << 20);
- ew32(TARC0, reg);
+ ew32(TARC(0), reg);
/* Transmit Arbitration Control 1 */
- reg = er32(TARC1);
+ reg = er32(TARC(1));
if (er32(TCTL) & E1000_TCTL_MULR)
reg &= ~(1 << 28);
else
reg |= (1 << 28);
- ew32(TARC1, reg);
+ ew32(TARC(1), reg);
}
/**
@@ -1239,7 +1243,7 @@
| FLAG_DISABLE_FC_PAUSE_TIME /* errata */
| FLAG_TIPG_MEDIUM_FOR_80003ESLAN,
.pba = 38,
- .get_invariants = e1000_get_invariants_80003es2lan,
+ .get_variants = e1000_get_variants_80003es2lan,
.mac_ops = &es2_mac_ops,
.phy_ops = &es2_phy_ops,
.nvm_ops = &es2_nvm_ops,
diff --git a/drivers/net/e1000e/ethtool.c b/drivers/net/e1000e/ethtool.c
index 4ae0056..6d1b257 100644
--- a/drivers/net/e1000e/ethtool.c
+++ b/drivers/net/e1000e/ethtool.c
@@ -641,10 +641,17 @@
tx_ring = kzalloc(sizeof(struct e1000_ring), GFP_KERNEL);
if (!tx_ring)
goto err_alloc_tx;
+ /*
+ * use a memcpy to save any previously configured
+ * items like napi structs from having to be
+ * reinitialized
+ */
+ memcpy(tx_ring, tx_old, sizeof(struct e1000_ring));
rx_ring = kzalloc(sizeof(struct e1000_ring), GFP_KERNEL);
if (!rx_ring)
goto err_alloc_rx;
+ memcpy(rx_ring, rx_old, sizeof(struct e1000_ring));
adapter->tx_ring = tx_ring;
adapter->rx_ring = rx_ring;
@@ -700,61 +707,55 @@
return err;
}
-static bool reg_pattern_test_array(struct e1000_adapter *adapter, u64 *data,
- int reg, int offset, u32 mask, u32 write)
+static bool reg_pattern_test(struct e1000_adapter *adapter, u64 *data,
+ int reg, int offset, u32 mask, u32 write)
{
- int i;
- u32 read;
+ u32 pat, val;
static const u32 test[] =
{0x5A5A5A5A, 0xA5A5A5A5, 0x00000000, 0xFFFFFFFF};
- for (i = 0; i < ARRAY_SIZE(test); i++) {
+ for (pat = 0; pat < ARRAY_SIZE(test); pat++) {
E1000_WRITE_REG_ARRAY(&adapter->hw, reg, offset,
- (test[i] & write));
- read = E1000_READ_REG_ARRAY(&adapter->hw, reg, offset);
- if (read != (test[i] & write & mask)) {
+ (test[pat] & write));
+ val = E1000_READ_REG_ARRAY(&adapter->hw, reg, offset);
+ if (val != (test[pat] & write & mask)) {
ndev_err(adapter->netdev, "pattern test reg %04X "
"failed: got 0x%08X expected 0x%08X\n",
reg + offset,
- read, (test[i] & write & mask));
+ val, (test[pat] & write & mask));
*data = reg;
- return true;
+ return 1;
}
}
- return false;
+ return 0;
}
static bool reg_set_and_check(struct e1000_adapter *adapter, u64 *data,
int reg, u32 mask, u32 write)
{
- u32 read;
+ u32 val;
__ew32(&adapter->hw, reg, write & mask);
- read = __er32(&adapter->hw, reg);
- if ((write & mask) != (read & mask)) {
+ val = __er32(&adapter->hw, reg);
+ if ((write & mask) != (val & mask)) {
ndev_err(adapter->netdev, "set/check reg %04X test failed: "
- "got 0x%08X expected 0x%08X\n", reg, (read & mask),
+ "got 0x%08X expected 0x%08X\n", reg, (val & mask),
(write & mask));
*data = reg;
- return true;
+ return 1;
}
- return false;
+ return 0;
}
-
-#define REG_PATTERN_TEST(R, M, W) \
- do { \
- if (reg_pattern_test_array(adapter, data, R, 0, M, W)) \
- return 1; \
+#define REG_PATTERN_TEST_ARRAY(reg, offset, mask, write) \
+ do { \
+ if (reg_pattern_test(adapter, data, reg, offset, mask, write)) \
+ return 1; \
} while (0)
+#define REG_PATTERN_TEST(reg, mask, write) \
+ REG_PATTERN_TEST_ARRAY(reg, 0, mask, write)
-#define REG_PATTERN_TEST_ARRAY(R, offset, M, W) \
- do { \
- if (reg_pattern_test_array(adapter, data, R, offset, M, W)) \
- return 1; \
- } while (0)
-
-#define REG_SET_AND_CHECK(R, M, W) \
- do { \
- if (reg_set_and_check(adapter, data, R, M, W)) \
- return 1; \
+#define REG_SET_AND_CHECK(reg, mask, write) \
+ do { \
+ if (reg_set_and_check(adapter, data, reg, mask, write)) \
+ return 1; \
} while (0)
static int e1000_reg_test(struct e1000_adapter *adapter, u64 *data)
@@ -1038,7 +1039,6 @@
struct pci_dev *pdev = adapter->pdev;
struct e1000_hw *hw = &adapter->hw;
u32 rctl;
- int size;
int i;
int ret_val;
@@ -1047,13 +1047,13 @@
if (!tx_ring->count)
tx_ring->count = E1000_DEFAULT_TXD;
- size = tx_ring->count * sizeof(struct e1000_buffer);
- tx_ring->buffer_info = kmalloc(size, GFP_KERNEL);
- if (!tx_ring->buffer_info) {
+ tx_ring->buffer_info = kcalloc(tx_ring->count,
+ sizeof(struct e1000_buffer),
+ GFP_KERNEL);
+ if (!(tx_ring->buffer_info)) {
ret_val = 1;
goto err_nomem;
}
- memset(tx_ring->buffer_info, 0, size);
tx_ring->size = tx_ring->count * sizeof(struct e1000_tx_desc);
tx_ring->size = ALIGN(tx_ring->size, 4096);
@@ -1063,21 +1063,17 @@
ret_val = 2;
goto err_nomem;
}
- memset(tx_ring->desc, 0, tx_ring->size);
tx_ring->next_to_use = 0;
tx_ring->next_to_clean = 0;
- ew32(TDBAL,
- ((u64) tx_ring->dma & 0x00000000FFFFFFFF));
+ ew32(TDBAL, ((u64) tx_ring->dma & 0x00000000FFFFFFFF));
ew32(TDBAH, ((u64) tx_ring->dma >> 32));
- ew32(TDLEN,
- tx_ring->count * sizeof(struct e1000_tx_desc));
+ ew32(TDLEN, tx_ring->count * sizeof(struct e1000_tx_desc));
ew32(TDH, 0);
ew32(TDT, 0);
- ew32(TCTL,
- E1000_TCTL_PSP | E1000_TCTL_EN |
- E1000_COLLISION_THRESHOLD << E1000_CT_SHIFT |
- E1000_COLLISION_DISTANCE << E1000_COLD_SHIFT);
+ ew32(TCTL, E1000_TCTL_PSP | E1000_TCTL_EN | E1000_TCTL_MULR |
+ E1000_COLLISION_THRESHOLD << E1000_CT_SHIFT |
+ E1000_COLLISION_DISTANCE << E1000_COLD_SHIFT);
for (i = 0; i < tx_ring->count; i++) {
struct e1000_tx_desc *tx_desc = E1000_TX_DESC(*tx_ring, i);
@@ -1099,12 +1095,11 @@
ret_val = 4;
goto err_nomem;
}
- tx_desc->buffer_addr = cpu_to_le64(
- tx_ring->buffer_info[i].dma);
+ tx_desc->buffer_addr = cpu_to_le64(tx_ring->buffer_info[i].dma);
tx_desc->lower.data = cpu_to_le32(skb->len);
tx_desc->lower.data |= cpu_to_le32(E1000_TXD_CMD_EOP |
E1000_TXD_CMD_IFCS |
- E1000_TXD_CMD_RPS);
+ E1000_TXD_CMD_RS);
tx_desc->upper.data = 0;
}
@@ -1113,13 +1108,13 @@
if (!rx_ring->count)
rx_ring->count = E1000_DEFAULT_RXD;
- size = rx_ring->count * sizeof(struct e1000_buffer);
- rx_ring->buffer_info = kmalloc(size, GFP_KERNEL);
- if (!rx_ring->buffer_info) {
+ rx_ring->buffer_info = kcalloc(rx_ring->count,
+ sizeof(struct e1000_buffer),
+ GFP_KERNEL);
+ if (!(rx_ring->buffer_info)) {
ret_val = 5;
goto err_nomem;
}
- memset(rx_ring->buffer_info, 0, size);
rx_ring->size = rx_ring->count * sizeof(struct e1000_rx_desc);
rx_ring->desc = dma_alloc_coherent(&pdev->dev, rx_ring->size,
@@ -1128,7 +1123,6 @@
ret_val = 6;
goto err_nomem;
}
- memset(rx_ring->desc, 0, rx_ring->size);
rx_ring->next_to_use = 0;
rx_ring->next_to_clean = 0;
@@ -1140,6 +1134,8 @@
ew32(RDH, 0);
ew32(RDT, 0);
rctl = E1000_RCTL_EN | E1000_RCTL_BAM | E1000_RCTL_SZ_2048 |
+ E1000_RCTL_UPE | E1000_RCTL_MPE | E1000_RCTL_LPE |
+ E1000_RCTL_SBP | E1000_RCTL_SECRC |
E1000_RCTL_LBM_NO | E1000_RCTL_RDMTS_HALF |
(adapter->hw.mac.mc_filter_type << E1000_RCTL_MO_SHIFT);
ew32(RCTL, rctl);
@@ -1203,7 +1199,8 @@
ctrl_reg = er32(CTRL);
- if (hw->phy.type == e1000_phy_ife) {
+ switch (hw->phy.type) {
+ case e1000_phy_ife:
/* force 100, set loopback */
e1e_wphy(hw, PHY_CONTROL, 0x6100);
@@ -1213,9 +1210,11 @@
E1000_CTRL_FRCDPX | /* Set the Force Duplex Bit */
E1000_CTRL_SPD_100 |/* Force Speed to 100 */
E1000_CTRL_FD); /* Force Duplex to FULL */
- } else {
+ break;
+ default:
/* force 1000, set loopback */
e1e_wphy(hw, PHY_CONTROL, 0x4140);
+ mdelay(250);
/* Now set up the MAC to the same speed/duplex as the PHY. */
ctrl_reg = er32(CTRL);
@@ -1224,6 +1223,10 @@
E1000_CTRL_FRCDPX | /* Set the Force Duplex Bit */
E1000_CTRL_SPD_1000 |/* Force Speed to 1000 */
E1000_CTRL_FD); /* Force Duplex to FULL */
+
+ if ((adapter->hw.mac.type == e1000_ich8lan) ||
+ (adapter->hw.mac.type == e1000_ich9lan))
+ ctrl_reg |= E1000_CTRL_SLU; /* Set Link Up */
}
if (hw->phy.media_type == e1000_media_type_copper &&
@@ -1325,7 +1328,7 @@
#define KMRNCTRLSTA_OPMODE (0x1F << 16)
#define KMRNCTRLSTA_OPMODE_1GB_FD_GMII 0x0582
ew32(KMRNCTRLSTA,
- (KMRNCTRLSTA_OPMODE | KMRNCTRLSTA_OPMODE_1GB_FD_GMII));
+ (KMRNCTRLSTA_OPMODE | KMRNCTRLSTA_OPMODE_1GB_FD_GMII));
return 0;
}
@@ -1451,8 +1454,8 @@
l = 0;
for (j = 0; j <= lc; j++) { /* loop count loop */
for (i = 0; i < 64; i++) { /* send the packets */
- e1000_create_lbtest_frame(
- tx_ring->buffer_info[i].skb, 1024);
+ e1000_create_lbtest_frame(tx_ring->buffer_info[k].skb,
+ 1024);
pci_dma_sync_single_for_device(pdev,
tx_ring->buffer_info[k].dma,
tx_ring->buffer_info[k].length,
@@ -1487,7 +1490,7 @@
ret_val = 13; /* ret_val is the same as mis-compare */
break;
}
- if (jiffies >= (time + 2)) {
+ if (jiffies >= (time + 20)) {
ret_val = 14; /* error code for time out error */
break;
}
diff --git a/drivers/net/e1000e/hw.h b/drivers/net/e1000e/hw.h
index 0b4145a..53f1ac6 100644
--- a/drivers/net/e1000e/hw.h
+++ b/drivers/net/e1000e/hw.h
@@ -93,6 +93,8 @@
E1000_RDH = 0x02810, /* Rx Descriptor Head - RW */
E1000_RDT = 0x02818, /* Rx Descriptor Tail - RW */
E1000_RDTR = 0x02820, /* Rx Delay Timer - RW */
+ E1000_RXDCTL_BASE = 0x02828, /* Rx Descriptor Control - RW */
+#define E1000_RXDCTL(_n) (E1000_RXDCTL_BASE + (_n << 8))
E1000_RADV = 0x0282C, /* RX Interrupt Absolute Delay Timer - RW */
/* Convenience macros
@@ -111,11 +113,11 @@
E1000_TDH = 0x03810, /* Tx Descriptor Head - RW */
E1000_TDT = 0x03818, /* Tx Descriptor Tail - RW */
E1000_TIDV = 0x03820, /* Tx Interrupt Delay Value - RW */
- E1000_TXDCTL = 0x03828, /* Tx Descriptor Control - RW */
+ E1000_TXDCTL_BASE = 0x03828, /* Tx Descriptor Control - RW */
+#define E1000_TXDCTL(_n) (E1000_TXDCTL_BASE + (_n << 8))
E1000_TADV = 0x0382C, /* Tx Interrupt Absolute Delay Val - RW */
- E1000_TARC0 = 0x03840, /* Tx Arbitration Count (0) */
- E1000_TXDCTL1 = 0x03928, /* Tx Descriptor Control (1) - RW */
- E1000_TARC1 = 0x03940, /* Tx Arbitration Count (1) */
+ E1000_TARC_BASE = 0x03840, /* Tx Arbitration Count (0) */
+#define E1000_TARC(_n) (E1000_TARC_BASE + (_n << 8))
E1000_CRCERRS = 0x04000, /* CRC Error Count - R/clr */
E1000_ALGNERRC = 0x04004, /* Alignment Error Count - R/clr */
E1000_SYMERRS = 0x04008, /* Symbol Error Count - R/clr */
diff --git a/drivers/net/e1000e/ich8lan.c b/drivers/net/e1000e/ich8lan.c
index e358a77..768485d 100644
--- a/drivers/net/e1000e/ich8lan.c
+++ b/drivers/net/e1000e/ich8lan.c
@@ -316,7 +316,7 @@
return 0;
}
-static s32 e1000_get_invariants_ich8lan(struct e1000_adapter *adapter)
+static s32 e1000_get_variants_ich8lan(struct e1000_adapter *adapter)
{
struct e1000_hw *hw = &adapter->hw;
s32 rc;
@@ -1753,18 +1753,18 @@
ret_val = e1000_setup_link_ich8lan(hw);
/* Set the transmit descriptor write-back policy for both queues */
- txdctl = er32(TXDCTL);
+ txdctl = er32(TXDCTL(0));
txdctl = (txdctl & ~E1000_TXDCTL_WTHRESH) |
E1000_TXDCTL_FULL_TX_DESC_WB;
txdctl = (txdctl & ~E1000_TXDCTL_PTHRESH) |
E1000_TXDCTL_MAX_TX_DESC_PREFETCH;
- ew32(TXDCTL, txdctl);
- txdctl = er32(TXDCTL1);
+ ew32(TXDCTL(0), txdctl);
+ txdctl = er32(TXDCTL(1));
txdctl = (txdctl & ~E1000_TXDCTL_WTHRESH) |
E1000_TXDCTL_FULL_TX_DESC_WB;
txdctl = (txdctl & ~E1000_TXDCTL_PTHRESH) |
E1000_TXDCTL_MAX_TX_DESC_PREFETCH;
- ew32(TXDCTL1, txdctl);
+ ew32(TXDCTL(1), txdctl);
/*
* ICH8 has opposite polarity of no_snoop bits.
@@ -1807,30 +1807,30 @@
ew32(CTRL_EXT, reg);
/* Transmit Descriptor Control 0 */
- reg = er32(TXDCTL);
+ reg = er32(TXDCTL(0));
reg |= (1 << 22);
- ew32(TXDCTL, reg);
+ ew32(TXDCTL(0), reg);
/* Transmit Descriptor Control 1 */
- reg = er32(TXDCTL1);
+ reg = er32(TXDCTL(1));
reg |= (1 << 22);
- ew32(TXDCTL1, reg);
+ ew32(TXDCTL(1), reg);
/* Transmit Arbitration Control 0 */
- reg = er32(TARC0);
+ reg = er32(TARC(0));
if (hw->mac.type == e1000_ich8lan)
reg |= (1 << 28) | (1 << 29);
reg |= (1 << 23) | (1 << 24) | (1 << 26) | (1 << 27);
- ew32(TARC0, reg);
+ ew32(TARC(0), reg);
/* Transmit Arbitration Control 1 */
- reg = er32(TARC1);
+ reg = er32(TARC(1));
if (er32(TCTL) & E1000_TCTL_MULR)
reg &= ~(1 << 28);
else
reg |= (1 << 28);
reg |= (1 << 24) | (1 << 26) | (1 << 30);
- ew32(TARC1, reg);
+ ew32(TARC(1), reg);
/* Device Status */
if (hw->mac.type == e1000_ich8lan) {
@@ -2253,7 +2253,7 @@
| FLAG_HAS_FLASH
| FLAG_APME_IN_WUC,
.pba = 8,
- .get_invariants = e1000_get_invariants_ich8lan,
+ .get_variants = e1000_get_variants_ich8lan,
.mac_ops = &ich8_mac_ops,
.phy_ops = &ich8_phy_ops,
.nvm_ops = &ich8_nvm_ops,
@@ -2270,7 +2270,7 @@
| FLAG_HAS_FLASH
| FLAG_APME_IN_WUC,
.pba = 10,
- .get_invariants = e1000_get_invariants_ich8lan,
+ .get_variants = e1000_get_variants_ich8lan,
.mac_ops = &ich8_mac_ops,
.phy_ops = &ich8_phy_ops,
.nvm_ops = &ich8_nvm_ops,
diff --git a/drivers/net/e1000e/lib.c b/drivers/net/e1000e/lib.c
index ea3ff63..f1f4e9d 100644
--- a/drivers/net/e1000e/lib.c
+++ b/drivers/net/e1000e/lib.c
@@ -2477,7 +2477,7 @@
return ret_val;
}
-s32 e1000e_read_part_num(struct e1000_hw *hw, u32 *part_num)
+s32 e1000e_read_pba_num(struct e1000_hw *hw, u32 *pba_num)
{
s32 ret_val;
u16 nvm_data;
@@ -2487,14 +2487,14 @@
hw_dbg(hw, "NVM Read Error\n");
return ret_val;
}
- *part_num = (u32)(nvm_data << 16);
+ *pba_num = (u32)(nvm_data << 16);
ret_val = e1000_read_nvm(hw, NVM_PBA_OFFSET_1, 1, &nvm_data);
if (ret_val) {
hw_dbg(hw, "NVM Read Error\n");
return ret_val;
}
- *part_num |= nvm_data;
+ *pba_num |= nvm_data;
return 0;
}
diff --git a/drivers/net/e1000e/netdev.c b/drivers/net/e1000e/netdev.c
index d70bde0..c8dc47f 100644
--- a/drivers/net/e1000e/netdev.c
+++ b/drivers/net/e1000e/netdev.c
@@ -1639,24 +1639,24 @@
(E1000_COLLISION_THRESHOLD << E1000_CT_SHIFT);
if (adapter->flags & FLAG_TARC_SPEED_MODE_BIT) {
- tarc = er32(TARC0);
+ tarc = er32(TARC(0));
/*
* set the speed mode bit, we'll clear it if we're not at
* gigabit link later
*/
#define SPEED_MODE_BIT (1 << 21)
tarc |= SPEED_MODE_BIT;
- ew32(TARC0, tarc);
+ ew32(TARC(0), tarc);
}
/* errata: program both queues to unweighted RR */
if (adapter->flags & FLAG_TARC_SET_BIT_ZERO) {
- tarc = er32(TARC0);
+ tarc = er32(TARC(0));
tarc |= 1;
- ew32(TARC0, tarc);
- tarc = er32(TARC1);
+ ew32(TARC(0), tarc);
+ tarc = er32(TARC(1));
tarc |= 1;
- ew32(TARC1, tarc);
+ ew32(TARC(1), tarc);
}
e1000e_config_collision_dist(hw);
@@ -2775,9 +2775,9 @@
if ((adapter->flags & FLAG_TARC_SPEED_MODE_BIT) &&
!txb2b) {
u32 tarc0;
- tarc0 = er32(TARC0);
+ tarc0 = er32(TARC(0));
tarc0 &= ~SPEED_MODE_BIT;
- ew32(TARC0, tarc0);
+ ew32(TARC(0), tarc0);
}
/*
@@ -3824,7 +3824,7 @@
{
struct e1000_hw *hw = &adapter->hw;
struct net_device *netdev = adapter->netdev;
- u32 part_num;
+ u32 pba_num;
/* print bus type/speed/width info */
ndev_info(netdev, "(PCI Express:2.5GB/s:%s) "
@@ -3839,10 +3839,10 @@
ndev_info(netdev, "Intel(R) PRO/%s Network Connection\n",
(hw->phy.type == e1000_phy_ife)
? "10/100" : "1000");
- e1000e_read_part_num(hw, &part_num);
+ e1000e_read_pba_num(hw, &pba_num);
ndev_info(netdev, "MAC: %d, PHY: %d, PBA No: %06x-%03x\n",
hw->mac.type, hw->phy.type,
- (part_num >> 8), (part_num & 0xff));
+ (pba_num >> 8), (pba_num & 0xff));
}
/**
@@ -3974,7 +3974,7 @@
memcpy(&hw->nvm.ops, ei->nvm_ops, sizeof(hw->nvm.ops));
memcpy(&hw->phy.ops, ei->phy_ops, sizeof(hw->phy.ops));
- err = ei->get_invariants(adapter);
+ err = ei->get_variants(adapter);
if (err)
goto err_hw_init;
diff --git a/drivers/net/fec_mpc52xx.c b/drivers/net/fec_mpc52xx.c
index 58b71e6..43b5f30 100644
--- a/drivers/net/fec_mpc52xx.c
+++ b/drivers/net/fec_mpc52xx.c
@@ -198,7 +198,7 @@
struct phy_device *phydev;
char phy_id[BUS_ID_SIZE];
- snprintf(phy_id, BUS_ID_SIZE, PHY_ID_FMT,
+ snprintf(phy_id, BUS_ID_SIZE, "%x:%02x",
(unsigned int)dev->base_addr, priv->phy_addr);
priv->link = PHY_DOWN;
diff --git a/drivers/net/fec_mpc52xx_phy.c b/drivers/net/fec_mpc52xx_phy.c
index 6a3ac4e..956836f 100644
--- a/drivers/net/fec_mpc52xx_phy.c
+++ b/drivers/net/fec_mpc52xx_phy.c
@@ -124,7 +124,7 @@
goto out_free;
}
- bus->id = res.start;
+ snprintf(bus->id, MII_BUS_ID_SIZE, "%x", res.start);
bus->priv = priv;
bus->dev = dev;
diff --git a/drivers/net/forcedeth.c b/drivers/net/forcedeth.c
index 3338b11..8c4214b 100644
--- a/drivers/net/forcedeth.c
+++ b/drivers/net/forcedeth.c
@@ -29,90 +29,6 @@
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
*
- * Changelog:
- * 0.01: 05 Oct 2003: First release that compiles without warnings.
- * 0.02: 05 Oct 2003: Fix bug for nv_drain_tx: do not try to free NULL skbs.
- * Check all PCI BARs for the register window.
- * udelay added to mii_rw.
- * 0.03: 06 Oct 2003: Initialize dev->irq.
- * 0.04: 07 Oct 2003: Initialize np->lock, reduce handled irqs, add printks.
- * 0.05: 09 Oct 2003: printk removed again, irq status print tx_timeout.
- * 0.06: 10 Oct 2003: MAC Address read updated, pff flag generation updated,
- * irq mask updated
- * 0.07: 14 Oct 2003: Further irq mask updates.
- * 0.08: 20 Oct 2003: rx_desc.Length initialization added, nv_alloc_rx refill
- * added into irq handler, NULL check for drain_ring.
- * 0.09: 20 Oct 2003: Basic link speed irq implementation. Only handle the
- * requested interrupt sources.
- * 0.10: 20 Oct 2003: First cleanup for release.
- * 0.11: 21 Oct 2003: hexdump for tx added, rx buffer sizes increased.
- * MAC Address init fix, set_multicast cleanup.
- * 0.12: 23 Oct 2003: Cleanups for release.
- * 0.13: 25 Oct 2003: Limit for concurrent tx packets increased to 10.
- * Set link speed correctly. start rx before starting
- * tx (nv_start_rx sets the link speed).
- * 0.14: 25 Oct 2003: Nic dependant irq mask.
- * 0.15: 08 Nov 2003: fix smp deadlock with set_multicast_list during
- * open.
- * 0.16: 15 Nov 2003: include file cleanup for ppc64, rx buffer size
- * increased to 1628 bytes.
- * 0.17: 16 Nov 2003: undo rx buffer size increase. Substract 1 from
- * the tx length.
- * 0.18: 17 Nov 2003: fix oops due to late initialization of dev_stats
- * 0.19: 29 Nov 2003: Handle RxNoBuf, detect & handle invalid mac
- * addresses, really stop rx if already running
- * in nv_start_rx, clean up a bit.
- * 0.20: 07 Dec 2003: alloc fixes
- * 0.21: 12 Jan 2004: additional alloc fix, nic polling fix.
- * 0.22: 19 Jan 2004: reprogram timer to a sane rate, avoid lockup
- * on close.
- * 0.23: 26 Jan 2004: various small cleanups
- * 0.24: 27 Feb 2004: make driver even less anonymous in backtraces
- * 0.25: 09 Mar 2004: wol support
- * 0.26: 03 Jun 2004: netdriver specific annotation, sparse-related fixes
- * 0.27: 19 Jun 2004: Gigabit support, new descriptor rings,
- * added CK804/MCP04 device IDs, code fixes
- * for registers, link status and other minor fixes.
- * 0.28: 21 Jun 2004: Big cleanup, making driver mostly endian safe
- * 0.29: 31 Aug 2004: Add backup timer for link change notification.
- * 0.30: 25 Sep 2004: rx checksum support for nf 250 Gb. Add rx reset
- * into nv_close, otherwise reenabling for wol can
- * cause DMA to kfree'd memory.
- * 0.31: 14 Nov 2004: ethtool support for getting/setting link
- * capabilities.
- * 0.32: 16 Apr 2005: RX_ERROR4 handling added.
- * 0.33: 16 May 2005: Support for MCP51 added.
- * 0.34: 18 Jun 2005: Add DEV_NEED_LINKTIMER to all nForce nics.
- * 0.35: 26 Jun 2005: Support for MCP55 added.
- * 0.36: 28 Jun 2005: Add jumbo frame support.
- * 0.37: 10 Jul 2005: Additional ethtool support, cleanup of pci id list
- * 0.38: 16 Jul 2005: tx irq rewrite: Use global flags instead of
- * per-packet flags.
- * 0.39: 18 Jul 2005: Add 64bit descriptor support.
- * 0.40: 19 Jul 2005: Add support for mac address change.
- * 0.41: 30 Jul 2005: Write back original MAC in nv_close instead
- * of nv_remove
- * 0.42: 06 Aug 2005: Fix lack of link speed initialization
- * in the second (and later) nv_open call
- * 0.43: 10 Aug 2005: Add support for tx checksum.
- * 0.44: 20 Aug 2005: Add support for scatter gather and segmentation.
- * 0.45: 18 Sep 2005: Remove nv_stop/start_rx from every link check
- * 0.46: 20 Oct 2005: Add irq optimization modes.
- * 0.47: 26 Oct 2005: Add phyaddr 0 in phy scan.
- * 0.48: 24 Dec 2005: Disable TSO, bugfix for pci_map_single
- * 0.49: 10 Dec 2005: Fix tso for large buffers.
- * 0.50: 20 Jan 2006: Add 8021pq tagging support.
- * 0.51: 20 Jan 2006: Add 64bit consistent memory allocation for rings.
- * 0.52: 20 Jan 2006: Add MSI/MSIX support.
- * 0.53: 19 Mar 2006: Fix init from low power mode and add hw reset.
- * 0.54: 21 Mar 2006: Fix spin locks for multi irqs and cleanup.
- * 0.55: 22 Mar 2006: Add flow control (pause frame).
- * 0.56: 22 Mar 2006: Additional ethtool config and moduleparam support.
- * 0.57: 14 May 2006: Mac address set in probe/remove and order corrections.
- * 0.58: 30 Oct 2006: Added support for sideband management unit.
- * 0.59: 30 Oct 2006: Added support for recoverable error.
- * 0.60: 20 Jan 2007: Code optimizations for rings, rx & tx data paths, and stats.
- *
* Known bugs:
* We suspect that on some hardware no TX done interrupts are generated.
* This means recovery from netif_stop_queue only happens if the hw timer
@@ -123,11 +39,6 @@
* DEV_NEED_TIMERIRQ will not harm you on sane hardware, only generating a few
* superfluous timer interrupts from the nic.
*/
-#ifdef CONFIG_FORCEDETH_NAPI
-#define DRIVERNAPI "-NAPI"
-#else
-#define DRIVERNAPI
-#endif
#define FORCEDETH_VERSION "0.61"
#define DRV_NAME "forcedeth"
@@ -930,6 +841,13 @@
return le32_to_cpu(prd->flaglen) & LEN_MASK_V2;
}
+static bool nv_optimized(struct fe_priv *np)
+{
+ if (np->desc_ver == DESC_VER_1 || np->desc_ver == DESC_VER_2)
+ return false;
+ return true;
+}
+
static int reg_delay(struct net_device *dev, int offset, u32 mask, u32 target,
int delay, int delaymax, const char *msg)
{
@@ -966,7 +884,7 @@
struct fe_priv *np = get_nvpriv(dev);
u8 __iomem *base = get_hwbase(dev);
- if (np->desc_ver == DESC_VER_1 || np->desc_ver == DESC_VER_2) {
+ if (!nv_optimized(np)) {
if (rxtx_flags & NV_SETUP_RX_RING) {
writel(dma_low(np->ring_addr), base + NvRegRxRingPhysAddr);
}
@@ -989,7 +907,7 @@
{
struct fe_priv *np = get_nvpriv(dev);
- if (np->desc_ver == DESC_VER_1 || np->desc_ver == DESC_VER_2) {
+ if (!nv_optimized(np)) {
if (np->rx_ring.orig)
pci_free_consistent(np->pci_dev, sizeof(struct ring_desc) * (np->rx_ring_size + np->tx_ring_size),
np->rx_ring.orig, np->ring_addr);
@@ -1435,6 +1353,18 @@
base + NvRegTransmitPoll);
}
+static void nv_start_rxtx(struct net_device *dev)
+{
+ nv_start_rx(dev);
+ nv_start_tx(dev);
+}
+
+static void nv_stop_rxtx(struct net_device *dev)
+{
+ nv_stop_rx(dev);
+ nv_stop_tx(dev);
+}
+
static void nv_txrx_reset(struct net_device *dev)
{
struct fe_priv *np = netdev_priv(dev);
@@ -1657,7 +1587,7 @@
} else {
disable_irq(np->msi_x_entry[NV_MSI_X_VECTOR_RX].vector);
}
- if (np->desc_ver == DESC_VER_1 || np->desc_ver == DESC_VER_2)
+ if (!nv_optimized(np))
retcode = nv_alloc_rx(dev);
else
retcode = nv_alloc_rx_optimized(dev);
@@ -1682,8 +1612,10 @@
{
struct fe_priv *np = netdev_priv(dev);
int i;
+
np->get_rx = np->put_rx = np->first_rx = np->rx_ring;
- if (np->desc_ver == DESC_VER_1 || np->desc_ver == DESC_VER_2)
+
+ if (!nv_optimized(np))
np->last_rx.orig = &np->rx_ring.orig[np->rx_ring_size-1];
else
np->last_rx.ex = &np->rx_ring.ex[np->rx_ring_size-1];
@@ -1691,7 +1623,7 @@
np->last_rx_ctx = &np->rx_skb[np->rx_ring_size-1];
for (i = 0; i < np->rx_ring_size; i++) {
- if (np->desc_ver == DESC_VER_1 || np->desc_ver == DESC_VER_2) {
+ if (!nv_optimized(np)) {
np->rx_ring.orig[i].flaglen = 0;
np->rx_ring.orig[i].buf = 0;
} else {
@@ -1709,8 +1641,10 @@
{
struct fe_priv *np = netdev_priv(dev);
int i;
+
np->get_tx = np->put_tx = np->first_tx = np->tx_ring;
- if (np->desc_ver == DESC_VER_1 || np->desc_ver == DESC_VER_2)
+
+ if (!nv_optimized(np))
np->last_tx.orig = &np->tx_ring.orig[np->tx_ring_size-1];
else
np->last_tx.ex = &np->tx_ring.ex[np->tx_ring_size-1];
@@ -1721,7 +1655,7 @@
np->tx_end_flip = NULL;
for (i = 0; i < np->tx_ring_size; i++) {
- if (np->desc_ver == DESC_VER_1 || np->desc_ver == DESC_VER_2) {
+ if (!nv_optimized(np)) {
np->tx_ring.orig[i].flaglen = 0;
np->tx_ring.orig[i].buf = 0;
} else {
@@ -1744,7 +1678,8 @@
nv_init_tx(dev);
nv_init_rx(dev);
- if (np->desc_ver == DESC_VER_1 || np->desc_ver == DESC_VER_2)
+
+ if (!nv_optimized(np))
return nv_alloc_rx(dev);
else
return nv_alloc_rx_optimized(dev);
@@ -1775,7 +1710,7 @@
unsigned int i;
for (i = 0; i < np->tx_ring_size; i++) {
- if (np->desc_ver == DESC_VER_1 || np->desc_ver == DESC_VER_2) {
+ if (!nv_optimized(np)) {
np->tx_ring.orig[i].flaglen = 0;
np->tx_ring.orig[i].buf = 0;
} else {
@@ -1802,7 +1737,7 @@
int i;
for (i = 0; i < np->rx_ring_size; i++) {
- if (np->desc_ver == DESC_VER_1 || np->desc_ver == DESC_VER_2) {
+ if (!nv_optimized(np)) {
np->rx_ring.orig[i].flaglen = 0;
np->rx_ring.orig[i].buf = 0;
} else {
@@ -1823,7 +1758,7 @@
}
}
-static void drain_ring(struct net_device *dev)
+static void nv_drain_rxtx(struct net_device *dev)
{
nv_drain_tx(dev);
nv_drain_rx(dev);
@@ -2260,7 +2195,7 @@
}
printk(KERN_INFO "%s: Dumping tx ring\n", dev->name);
for (i=0;i<np->tx_ring_size;i+= 4) {
- if (np->desc_ver == DESC_VER_1 || np->desc_ver == DESC_VER_2) {
+ if (!nv_optimized(np)) {
printk(KERN_INFO "%03x: %08x %08x // %08x %08x // %08x %08x // %08x %08x\n",
i,
le32_to_cpu(np->tx_ring.orig[i].buf),
@@ -2296,7 +2231,7 @@
nv_stop_tx(dev);
/* 2) check that the packets were not sent already: */
- if (np->desc_ver == DESC_VER_1 || np->desc_ver == DESC_VER_2)
+ if (!nv_optimized(np))
nv_tx_done(dev);
else
nv_tx_done_optimized(dev, np->tx_ring_size);
@@ -2663,12 +2598,10 @@
netif_tx_lock_bh(dev);
spin_lock(&np->lock);
/* stop engines */
- nv_stop_rx(dev);
- nv_stop_tx(dev);
+ nv_stop_rxtx(dev);
nv_txrx_reset(dev);
/* drain rx queue */
- nv_drain_rx(dev);
- nv_drain_tx(dev);
+ nv_drain_rxtx(dev);
/* reinit driver view of the rx queue */
set_bufsize(dev);
if (nv_init_ring(dev)) {
@@ -2685,8 +2618,7 @@
pci_push(base);
/* restart rx engine */
- nv_start_rx(dev);
- nv_start_tx(dev);
+ nv_start_rxtx(dev);
spin_unlock(&np->lock);
netif_tx_unlock_bh(dev);
nv_enable_irq(dev);
@@ -3393,7 +3325,7 @@
unsigned long flags;
int pkts, retcode;
- if (np->desc_ver == DESC_VER_1 || np->desc_ver == DESC_VER_2) {
+ if (!nv_optimized(np)) {
pkts = nv_rx_process(dev, budget);
retcode = nv_alloc_rx(dev);
} else {
@@ -3634,7 +3566,7 @@
if (intr_test) {
handler = nv_nic_irq_test;
} else {
- if (np->desc_ver == DESC_VER_3)
+ if (nv_optimized(np))
handler = nv_nic_irq_optimized;
else
handler = nv_nic_irq;
@@ -3787,12 +3719,10 @@
netif_tx_lock_bh(dev);
spin_lock(&np->lock);
/* stop engines */
- nv_stop_rx(dev);
- nv_stop_tx(dev);
+ nv_stop_rxtx(dev);
nv_txrx_reset(dev);
/* drain rx queue */
- nv_drain_rx(dev);
- nv_drain_tx(dev);
+ nv_drain_rxtx(dev);
/* reinit driver view of the rx queue */
set_bufsize(dev);
if (nv_init_ring(dev)) {
@@ -3809,8 +3739,7 @@
pci_push(base);
/* restart rx engine */
- nv_start_rx(dev);
- nv_start_tx(dev);
+ nv_start_rxtx(dev);
spin_unlock(&np->lock);
netif_tx_unlock_bh(dev);
}
@@ -3821,7 +3750,7 @@
pci_push(base);
if (!using_multi_irqs(dev)) {
- if (np->desc_ver == DESC_VER_3)
+ if (nv_optimized(np))
nv_nic_irq_optimized(0, dev);
else
nv_nic_irq(0, dev);
@@ -4019,8 +3948,7 @@
netif_tx_lock_bh(dev);
spin_lock(&np->lock);
/* stop engines */
- nv_stop_rx(dev);
- nv_stop_tx(dev);
+ nv_stop_rxtx(dev);
spin_unlock(&np->lock);
netif_tx_unlock_bh(dev);
}
@@ -4126,8 +4054,7 @@
}
if (netif_running(dev)) {
- nv_start_rx(dev);
- nv_start_tx(dev);
+ nv_start_rxtx(dev);
nv_enable_irq(dev);
}
@@ -4170,8 +4097,7 @@
netif_tx_lock_bh(dev);
spin_lock(&np->lock);
/* stop engines */
- nv_stop_rx(dev);
- nv_stop_tx(dev);
+ nv_stop_rxtx(dev);
spin_unlock(&np->lock);
netif_tx_unlock_bh(dev);
printk(KERN_INFO "%s: link down.\n", dev->name);
@@ -4191,8 +4117,7 @@
}
if (netif_running(dev)) {
- nv_start_rx(dev);
- nv_start_tx(dev);
+ nv_start_rxtx(dev);
nv_enable_irq(dev);
}
ret = 0;
@@ -4249,7 +4174,7 @@
}
/* allocate new rings */
- if (np->desc_ver == DESC_VER_1 || np->desc_ver == DESC_VER_2) {
+ if (!nv_optimized(np)) {
rxtx_ring = pci_alloc_consistent(np->pci_dev,
sizeof(struct ring_desc) * (ring->rx_pending + ring->tx_pending),
&ring_addr);
@@ -4262,7 +4187,7 @@
tx_skbuff = kmalloc(sizeof(struct nv_skb_map) * ring->tx_pending, GFP_KERNEL);
if (!rxtx_ring || !rx_skbuff || !tx_skbuff) {
/* fall back to old rings */
- if (np->desc_ver == DESC_VER_1 || np->desc_ver == DESC_VER_2) {
+ if (!nv_optimized(np)) {
if (rxtx_ring)
pci_free_consistent(np->pci_dev, sizeof(struct ring_desc) * (ring->rx_pending + ring->tx_pending),
rxtx_ring, ring_addr);
@@ -4283,12 +4208,10 @@
netif_tx_lock_bh(dev);
spin_lock(&np->lock);
/* stop engines */
- nv_stop_rx(dev);
- nv_stop_tx(dev);
+ nv_stop_rxtx(dev);
nv_txrx_reset(dev);
/* drain queues */
- nv_drain_rx(dev);
- nv_drain_tx(dev);
+ nv_drain_rxtx(dev);
/* delete queues */
free_rings(dev);
}
@@ -4296,7 +4219,8 @@
/* set new values */
np->rx_ring_size = ring->rx_pending;
np->tx_ring_size = ring->tx_pending;
- if (np->desc_ver == DESC_VER_1 || np->desc_ver == DESC_VER_2) {
+
+ if (!nv_optimized(np)) {
np->rx_ring.orig = (struct ring_desc*)rxtx_ring;
np->tx_ring.orig = &np->rx_ring.orig[np->rx_ring_size];
} else {
@@ -4328,8 +4252,7 @@
pci_push(base);
/* restart engines */
- nv_start_rx(dev);
- nv_start_tx(dev);
+ nv_start_rxtx(dev);
spin_unlock(&np->lock);
netif_tx_unlock_bh(dev);
nv_enable_irq(dev);
@@ -4370,8 +4293,7 @@
netif_tx_lock_bh(dev);
spin_lock(&np->lock);
/* stop engines */
- nv_stop_rx(dev);
- nv_stop_tx(dev);
+ nv_stop_rxtx(dev);
spin_unlock(&np->lock);
netif_tx_unlock_bh(dev);
}
@@ -4412,8 +4334,7 @@
}
if (netif_running(dev)) {
- nv_start_rx(dev);
- nv_start_tx(dev);
+ nv_start_rxtx(dev);
nv_enable_irq(dev);
}
return 0;
@@ -4649,8 +4570,7 @@
pci_push(base);
/* restart rx engine */
- nv_start_rx(dev);
- nv_start_tx(dev);
+ nv_start_rxtx(dev);
/* setup packet for tx */
pkt_len = ETH_DATA_LEN;
@@ -4668,7 +4588,7 @@
for (i = 0; i < pkt_len; i++)
pkt_data[i] = (u8)(i & 0xff);
- if (np->desc_ver == DESC_VER_1 || np->desc_ver == DESC_VER_2) {
+ if (!nv_optimized(np)) {
np->tx_ring.orig[0].buf = cpu_to_le32(test_dma_addr);
np->tx_ring.orig[0].flaglen = cpu_to_le32((pkt_len-1) | np->tx_flags | tx_flags_extra);
} else {
@@ -4682,7 +4602,7 @@
msleep(500);
/* check for rx of the packet */
- if (np->desc_ver == DESC_VER_1 || np->desc_ver == DESC_VER_2) {
+ if (!nv_optimized(np)) {
flags = le32_to_cpu(np->rx_ring.orig[0].flaglen);
len = nv_descr_getlength(&np->rx_ring.orig[0], np->desc_ver);
@@ -4728,12 +4648,10 @@
dev_kfree_skb_any(tx_skb);
out:
/* stop engines */
- nv_stop_rx(dev);
- nv_stop_tx(dev);
+ nv_stop_rxtx(dev);
nv_txrx_reset(dev);
/* drain rx queue */
- nv_drain_rx(dev);
- nv_drain_tx(dev);
+ nv_drain_rxtx(dev);
if (netif_running(dev)) {
writel(misc1_flags, base + NvRegMisc1);
@@ -4771,12 +4689,10 @@
writel(NVREG_IRQSTAT_MASK, base + NvRegMSIXIrqStatus);
}
/* stop engines */
- nv_stop_rx(dev);
- nv_stop_tx(dev);
+ nv_stop_rxtx(dev);
nv_txrx_reset(dev);
/* drain rx queue */
- nv_drain_rx(dev);
- nv_drain_tx(dev);
+ nv_drain_rxtx(dev);
spin_unlock_irq(&np->lock);
netif_tx_unlock_bh(dev);
}
@@ -4817,8 +4733,7 @@
writel(NVREG_TXRXCTL_KICK|np->txrxctl_bits, get_hwbase(dev) + NvRegTxRxControl);
pci_push(base);
/* restart rx engine */
- nv_start_rx(dev);
- nv_start_tx(dev);
+ nv_start_rxtx(dev);
netif_start_queue(dev);
#ifdef CONFIG_FORCEDETH_NAPI
napi_enable(&np->napi);
@@ -5047,8 +4962,7 @@
* to init hw */
np->linkspeed = 0;
ret = nv_update_linkspeed(dev);
- nv_start_rx(dev);
- nv_start_tx(dev);
+ nv_start_rxtx(dev);
netif_start_queue(dev);
#ifdef CONFIG_FORCEDETH_NAPI
napi_enable(&np->napi);
@@ -5072,7 +4986,7 @@
return 0;
out_drain:
- drain_ring(dev);
+ nv_drain_rxtx(dev);
return ret;
}
@@ -5095,8 +5009,7 @@
netif_stop_queue(dev);
spin_lock_irq(&np->lock);
- nv_stop_tx(dev);
- nv_stop_rx(dev);
+ nv_stop_rxtx(dev);
nv_txrx_reset(dev);
/* disable interrupts on the nic or we will lock up */
@@ -5109,7 +5022,7 @@
nv_free_irq(dev);
- drain_ring(dev);
+ nv_drain_rxtx(dev);
if (np->wolenabled) {
writel(NVREG_PFF_ALWAYS|NVREG_PFF_MYADDR, base + NvRegPacketFilterFlags);
@@ -5269,7 +5182,7 @@
np->rx_ring_size = RX_RING_DEFAULT;
np->tx_ring_size = TX_RING_DEFAULT;
- if (np->desc_ver == DESC_VER_1 || np->desc_ver == DESC_VER_2) {
+ if (!nv_optimized(np)) {
np->rx_ring.orig = pci_alloc_consistent(pci_dev,
sizeof(struct ring_desc) * (np->rx_ring_size + np->tx_ring_size),
&np->ring_addr);
@@ -5291,7 +5204,8 @@
dev->open = nv_open;
dev->stop = nv_close;
- if (np->desc_ver == DESC_VER_1 || np->desc_ver == DESC_VER_2)
+
+ if (!nv_optimized(np))
dev->hard_start_xmit = nv_start_xmit;
else
dev->hard_start_xmit = nv_start_xmit_optimized;
diff --git a/drivers/net/fs_enet/fs_enet-main.c b/drivers/net/fs_enet/fs_enet-main.c
index 940e204..67b4b07 100644
--- a/drivers/net/fs_enet/fs_enet-main.c
+++ b/drivers/net/fs_enet/fs_enet-main.c
@@ -1178,7 +1178,7 @@
data = of_get_property(np, "fixed-link", NULL);
if (data) {
- snprintf(fpi->bus_id, 16, PHY_ID_FMT, 0, *data);
+ snprintf(fpi->bus_id, 16, "%x:%02x", 0, *data);
return 0;
}
@@ -1202,7 +1202,7 @@
if (!data || len != 4)
goto out_put_mdio;
- snprintf(fpi->bus_id, 16, PHY_ID_FMT, res.start, *data);
+ snprintf(fpi->bus_id, 16, "%x:%02x", res.start, *data);
out_put_mdio:
of_node_put(mdionode);
diff --git a/drivers/net/fs_enet/mii-bitbang.c b/drivers/net/fs_enet/mii-bitbang.c
index b8e4a73..1620030 100644
--- a/drivers/net/fs_enet/mii-bitbang.c
+++ b/drivers/net/fs_enet/mii-bitbang.c
@@ -130,7 +130,7 @@
* we get is an int, and the odds of multiple bitbang mdio buses
* is low enough that it's not worth going too crazy.
*/
- bus->id = res.start;
+ snprintf(bus->id, MII_BUS_ID_SIZE, "%x", res.start);
data = of_get_property(np, "fsl,mdio-pin", &len);
if (!data || len != 4)
@@ -307,7 +307,7 @@
return -ENOMEM;
new_bus->name = "BB MII Bus",
- new_bus->id = pdev->id;
+ snprintf(new_bus->id, MII_BUS_ID_SIZE, "%x", pdev->id);
new_bus->phy_mask = ~0x9;
pdata = (struct fs_mii_bb_platform_info *)pdev->dev.platform_data;
diff --git a/drivers/net/fs_enet/mii-fec.c b/drivers/net/fs_enet/mii-fec.c
index a89cf15..ba75efc 100644
--- a/drivers/net/fs_enet/mii-fec.c
+++ b/drivers/net/fs_enet/mii-fec.c
@@ -196,7 +196,7 @@
if (ret)
return ret;
- new_bus->id = res.start;
+ snprintf(new_bus->id, MII_BUS_ID_SIZE, "%x", res.start);
fec->fecp = ioremap(res.start, res.end - res.start + 1);
if (!fec->fecp)
@@ -309,7 +309,7 @@
new_bus->read = &fs_enet_fec_mii_read,
new_bus->write = &fs_enet_fec_mii_write,
new_bus->reset = &fs_enet_fec_mii_reset,
- new_bus->id = pdev->id;
+ snprintf(new_bus->id, MII_BUS_ID_SIZE, "%x", pdev->id);
pdata = (struct fs_mii_fec_platform_info *)pdev->dev.platform_data;
diff --git a/drivers/net/gianfar.c b/drivers/net/gianfar.c
index 601f93e..c8c3df7 100644
--- a/drivers/net/gianfar.c
+++ b/drivers/net/gianfar.c
@@ -1250,17 +1250,12 @@
}
/* Interrupt Handler for Transmit complete */
-static irqreturn_t gfar_transmit(int irq, void *dev_id)
+int gfar_clean_tx_ring(struct net_device *dev)
{
- struct net_device *dev = (struct net_device *) dev_id;
- struct gfar_private *priv = netdev_priv(dev);
struct txbd8 *bdp;
+ struct gfar_private *priv = netdev_priv(dev);
+ int howmany = 0;
- /* Clear IEVENT */
- gfar_write(&priv->regs->ievent, IEVENT_TX_MASK);
-
- /* Lock priv */
- spin_lock(&priv->txlock);
bdp = priv->dirty_tx;
while ((bdp->status & TXBD_READY) == 0) {
/* If dirty_tx and cur_tx are the same, then either the */
@@ -1269,7 +1264,7 @@
if ((bdp == priv->cur_tx) && (netif_queue_stopped(dev) == 0))
break;
- dev->stats.tx_packets++;
+ howmany++;
/* Deferred means some collisions occurred during transmit, */
/* but we eventually sent the packet. */
@@ -1278,11 +1273,15 @@
/* Free the sk buffer associated with this TxBD */
dev_kfree_skb_irq(priv->tx_skbuff[priv->skb_dirtytx]);
+
priv->tx_skbuff[priv->skb_dirtytx] = NULL;
priv->skb_dirtytx =
(priv->skb_dirtytx +
1) & TX_RING_MOD_MASK(priv->tx_ring_size);
+ /* Clean BD length for empty detection */
+ bdp->length = 0;
+
/* update bdp to point at next bd in the ring (wrapping if necessary) */
if (bdp->status & TXBD_WRAP)
bdp = priv->tx_bd_base;
@@ -1297,6 +1296,25 @@
netif_wake_queue(dev);
} /* while ((bdp->status & TXBD_READY) == 0) */
+ dev->stats.tx_packets += howmany;
+
+ return howmany;
+}
+
+/* Interrupt Handler for Transmit complete */
+static irqreturn_t gfar_transmit(int irq, void *dev_id)
+{
+ struct net_device *dev = (struct net_device *) dev_id;
+ struct gfar_private *priv = netdev_priv(dev);
+
+ /* Clear IEVENT */
+ gfar_write(&priv->regs->ievent, IEVENT_TX_MASK);
+
+ /* Lock priv */
+ spin_lock(&priv->txlock);
+
+ gfar_clean_tx_ring(dev);
+
/* If we are coalescing the interrupts, reset the timer */
/* Otherwise, clear it */
if (likely(priv->txcoalescing)) {
@@ -1392,15 +1410,15 @@
unsigned long flags;
#endif
- /* Clear IEVENT, so rx interrupt isn't called again
- * because of this interrupt */
- gfar_write(&priv->regs->ievent, IEVENT_RX_MASK);
-
/* support NAPI */
#ifdef CONFIG_GFAR_NAPI
+ /* Clear IEVENT, so interrupts aren't called again
+ * because of the packets that have already arrived */
+ gfar_write(&priv->regs->ievent, IEVENT_RTX_MASK);
+
if (netif_rx_schedule_prep(dev, &priv->napi)) {
tempval = gfar_read(&priv->regs->imask);
- tempval &= IMASK_RX_DISABLED;
+ tempval &= IMASK_RTX_DISABLED;
gfar_write(&priv->regs->imask, tempval);
__netif_rx_schedule(dev, &priv->napi);
@@ -1411,6 +1429,9 @@
gfar_read(&priv->regs->imask));
}
#else
+ /* Clear IEVENT, so rx interrupt isn't called again
+ * because of this interrupt */
+ gfar_write(&priv->regs->ievent, IEVENT_RX_MASK);
spin_lock_irqsave(&priv->rxlock, flags);
gfar_clean_rx_ring(dev, priv->rx_ring_size);
@@ -1580,6 +1601,13 @@
struct gfar_private *priv = container_of(napi, struct gfar_private, napi);
struct net_device *dev = priv->dev;
int howmany;
+ unsigned long flags;
+
+ /* If we fail to get the lock, don't bother with the TX BDs */
+ if (spin_trylock_irqsave(&priv->txlock, flags)) {
+ gfar_clean_tx_ring(dev);
+ spin_unlock_irqrestore(&priv->txlock, flags);
+ }
howmany = gfar_clean_rx_ring(dev, budget);
diff --git a/drivers/net/gianfar.h b/drivers/net/gianfar.h
index ea8671f..0d08836 100644
--- a/drivers/net/gianfar.h
+++ b/drivers/net/gianfar.h
@@ -126,9 +126,16 @@
#define DEFAULT_TXCOUNT 16
#define DEFAULT_TXTIME 21
+#define DEFAULT_RXTIME 21
+
+/* Non NAPI Case */
+#ifndef CONFIG_GFAR_NAPI
#define DEFAULT_RX_COALESCE 1
#define DEFAULT_RXCOUNT 16
-#define DEFAULT_RXTIME 21
+#else
+#define DEFAULT_RX_COALESCE 0
+#define DEFAULT_RXCOUNT 0
+#endif /* CONFIG_GFAR_NAPI */
#define TBIPA_VALUE 0x1f
#define MIIMCFG_INIT_VALUE 0x00000007
@@ -242,6 +249,7 @@
#define IEVENT_PERR 0x00000001
#define IEVENT_RX_MASK (IEVENT_RXB0 | IEVENT_RXF0)
#define IEVENT_TX_MASK (IEVENT_TXB | IEVENT_TXF)
+#define IEVENT_RTX_MASK (IEVENT_RX_MASK | IEVENT_TX_MASK)
#define IEVENT_ERR_MASK \
(IEVENT_RXC | IEVENT_BSY | IEVENT_EBERR | IEVENT_MSRO | \
IEVENT_BABT | IEVENT_TXC | IEVENT_TXE | IEVENT_LC \
@@ -269,11 +277,12 @@
#define IMASK_FIQ 0x00000004
#define IMASK_DPE 0x00000002
#define IMASK_PERR 0x00000001
-#define IMASK_RX_DISABLED ~(IMASK_RXFEN0 | IMASK_BSY)
#define IMASK_DEFAULT (IMASK_TXEEN | IMASK_TXFEN | IMASK_TXBEN | \
IMASK_RXFEN0 | IMASK_BSY | IMASK_EBERR | IMASK_BABR | \
IMASK_XFUN | IMASK_RXC | IMASK_BABT | IMASK_DPE \
| IMASK_PERR)
+#define IMASK_RTX_DISABLED ((~(IMASK_RXFEN0 | IMASK_TXFEN | IMASK_BSY)) \
+ & IMASK_DEFAULT)
/* Fifo management */
#define FIFO_TX_THR_MASK 0x01ff
diff --git a/drivers/net/gianfar_mii.c b/drivers/net/gianfar_mii.c
index 2432762..b889892 100644
--- a/drivers/net/gianfar_mii.c
+++ b/drivers/net/gianfar_mii.c
@@ -173,7 +173,7 @@
new_bus->read = &gfar_mdio_read,
new_bus->write = &gfar_mdio_write,
new_bus->reset = &gfar_mdio_reset,
- new_bus->id = pdev->id;
+ snprintf(new_bus->id, MII_BUS_ID_SIZE, "%x", pdev->id);
pdata = (struct gianfar_mdio_data *)pdev->dev.platform_data;
diff --git a/drivers/net/ixgb/ixgb.h b/drivers/net/ixgb/ixgb.h
index f2fff90..16f9c75 100644
--- a/drivers/net/ixgb/ixgb.h
+++ b/drivers/net/ixgb/ixgb.h
@@ -117,8 +117,8 @@
struct sk_buff *skb;
dma_addr_t dma;
unsigned long time_stamp;
- uint16_t length;
- uint16_t next_to_watch;
+ u16 length;
+ u16 next_to_watch;
};
struct ixgb_desc_ring {
@@ -152,11 +152,11 @@
struct ixgb_adapter {
struct timer_list watchdog_timer;
struct vlan_group *vlgrp;
- uint32_t bd_number;
- uint32_t rx_buffer_len;
- uint32_t part_num;
- uint16_t link_speed;
- uint16_t link_duplex;
+ u32 bd_number;
+ u32 rx_buffer_len;
+ u32 part_num;
+ u16 link_speed;
+ u16 link_duplex;
spinlock_t tx_lock;
struct work_struct tx_timeout_task;
@@ -167,19 +167,19 @@
struct ixgb_desc_ring tx_ring ____cacheline_aligned_in_smp;
unsigned int restart_queue;
unsigned long timeo_start;
- uint32_t tx_cmd_type;
- uint64_t hw_csum_tx_good;
- uint64_t hw_csum_tx_error;
- uint32_t tx_int_delay;
- uint32_t tx_timeout_count;
+ u32 tx_cmd_type;
+ u64 hw_csum_tx_good;
+ u64 hw_csum_tx_error;
+ u32 tx_int_delay;
+ u32 tx_timeout_count;
bool tx_int_delay_enable;
bool detect_tx_hung;
/* RX */
struct ixgb_desc_ring rx_ring;
- uint64_t hw_csum_rx_error;
- uint64_t hw_csum_rx_good;
- uint32_t rx_int_delay;
+ u64 hw_csum_rx_error;
+ u64 hw_csum_rx_good;
+ u32 rx_int_delay;
bool rx_csum;
/* OS defined structs */
@@ -192,7 +192,7 @@
struct ixgb_hw hw;
u16 msg_enable;
struct ixgb_hw_stats stats;
- uint32_t alloc_rx_buff_failed;
+ u32 alloc_rx_buff_failed;
bool have_msi;
unsigned long flags;
};
diff --git a/drivers/net/ixgb/ixgb_ee.c b/drivers/net/ixgb/ixgb_ee.c
index 8e9302f..2f7ed52 100644
--- a/drivers/net/ixgb/ixgb_ee.c
+++ b/drivers/net/ixgb/ixgb_ee.c
@@ -29,11 +29,11 @@
#include "ixgb_hw.h"
#include "ixgb_ee.h"
/* Local prototypes */
-static uint16_t ixgb_shift_in_bits(struct ixgb_hw *hw);
+static u16 ixgb_shift_in_bits(struct ixgb_hw *hw);
static void ixgb_shift_out_bits(struct ixgb_hw *hw,
- uint16_t data,
- uint16_t count);
+ u16 data,
+ u16 count);
static void ixgb_standby_eeprom(struct ixgb_hw *hw);
static bool ixgb_wait_eeprom_command(struct ixgb_hw *hw);
@@ -48,7 +48,7 @@
*****************************************************************************/
static void
ixgb_raise_clock(struct ixgb_hw *hw,
- uint32_t *eecd_reg)
+ u32 *eecd_reg)
{
/* Raise the clock input to the EEPROM (by setting the SK bit), and then
* wait 50 microseconds.
@@ -67,7 +67,7 @@
*****************************************************************************/
static void
ixgb_lower_clock(struct ixgb_hw *hw,
- uint32_t *eecd_reg)
+ u32 *eecd_reg)
{
/* Lower the clock input to the EEPROM (by clearing the SK bit), and then
* wait 50 microseconds.
@@ -87,11 +87,11 @@
*****************************************************************************/
static void
ixgb_shift_out_bits(struct ixgb_hw *hw,
- uint16_t data,
- uint16_t count)
+ u16 data,
+ u16 count)
{
- uint32_t eecd_reg;
- uint32_t mask;
+ u32 eecd_reg;
+ u32 mask;
/* We need to shift "count" bits out to the EEPROM. So, value in the
* "data" parameter will be shifted out to the EEPROM one bit at a time.
@@ -133,12 +133,12 @@
*
* hw - Struct containing variables accessed by shared code
*****************************************************************************/
-static uint16_t
+static u16
ixgb_shift_in_bits(struct ixgb_hw *hw)
{
- uint32_t eecd_reg;
- uint32_t i;
- uint16_t data;
+ u32 eecd_reg;
+ u32 i;
+ u16 data;
/* In order to read a register from the EEPROM, we need to shift 16 bits
* in from the EEPROM. Bits are "shifted in" by raising the clock input to
@@ -179,7 +179,7 @@
static void
ixgb_setup_eeprom(struct ixgb_hw *hw)
{
- uint32_t eecd_reg;
+ u32 eecd_reg;
eecd_reg = IXGB_READ_REG(hw, EECD);
@@ -201,7 +201,7 @@
static void
ixgb_standby_eeprom(struct ixgb_hw *hw)
{
- uint32_t eecd_reg;
+ u32 eecd_reg;
eecd_reg = IXGB_READ_REG(hw, EECD);
@@ -235,7 +235,7 @@
static void
ixgb_clock_eeprom(struct ixgb_hw *hw)
{
- uint32_t eecd_reg;
+ u32 eecd_reg;
eecd_reg = IXGB_READ_REG(hw, EECD);
@@ -259,7 +259,7 @@
static void
ixgb_cleanup_eeprom(struct ixgb_hw *hw)
{
- uint32_t eecd_reg;
+ u32 eecd_reg;
eecd_reg = IXGB_READ_REG(hw, EECD);
@@ -285,8 +285,8 @@
static bool
ixgb_wait_eeprom_command(struct ixgb_hw *hw)
{
- uint32_t eecd_reg;
- uint32_t i;
+ u32 eecd_reg;
+ u32 i;
/* Toggle the CS line. This in effect tells to EEPROM to actually execute
* the command in question.
@@ -325,13 +325,13 @@
bool
ixgb_validate_eeprom_checksum(struct ixgb_hw *hw)
{
- uint16_t checksum = 0;
- uint16_t i;
+ u16 checksum = 0;
+ u16 i;
for(i = 0; i < (EEPROM_CHECKSUM_REG + 1); i++)
checksum += ixgb_read_eeprom(hw, i);
- if(checksum == (uint16_t) EEPROM_SUM)
+ if(checksum == (u16) EEPROM_SUM)
return (true);
else
return (false);
@@ -348,13 +348,13 @@
void
ixgb_update_eeprom_checksum(struct ixgb_hw *hw)
{
- uint16_t checksum = 0;
- uint16_t i;
+ u16 checksum = 0;
+ u16 i;
for(i = 0; i < EEPROM_CHECKSUM_REG; i++)
checksum += ixgb_read_eeprom(hw, i);
- checksum = (uint16_t) EEPROM_SUM - checksum;
+ checksum = (u16) EEPROM_SUM - checksum;
ixgb_write_eeprom(hw, EEPROM_CHECKSUM_REG, checksum);
return;
@@ -372,7 +372,7 @@
*
*****************************************************************************/
void
-ixgb_write_eeprom(struct ixgb_hw *hw, uint16_t offset, uint16_t data)
+ixgb_write_eeprom(struct ixgb_hw *hw, u16 offset, u16 data)
{
struct ixgb_ee_map_type *ee_map = (struct ixgb_ee_map_type *)hw->eeprom;
@@ -425,11 +425,11 @@
* Returns:
* The 16-bit value read from the eeprom
*****************************************************************************/
-uint16_t
+u16
ixgb_read_eeprom(struct ixgb_hw *hw,
- uint16_t offset)
+ u16 offset)
{
- uint16_t data;
+ u16 data;
/* Prepare the EEPROM for reading */
ixgb_setup_eeprom(hw);
@@ -463,8 +463,8 @@
bool
ixgb_get_eeprom_data(struct ixgb_hw *hw)
{
- uint16_t i;
- uint16_t checksum = 0;
+ u16 i;
+ u16 checksum = 0;
struct ixgb_ee_map_type *ee_map;
DEBUGFUNC("ixgb_get_eeprom_data");
@@ -473,13 +473,13 @@
DEBUGOUT("ixgb_ee: Reading eeprom data\n");
for(i = 0; i < IXGB_EEPROM_SIZE ; i++) {
- uint16_t ee_data;
+ u16 ee_data;
ee_data = ixgb_read_eeprom(hw, i);
checksum += ee_data;
hw->eeprom[i] = cpu_to_le16(ee_data);
}
- if (checksum != (uint16_t) EEPROM_SUM) {
+ if (checksum != (u16) EEPROM_SUM) {
DEBUGOUT("ixgb_ee: Checksum invalid.\n");
/* clear the init_ctrl_reg_1 to signify that the cache is
* invalidated */
@@ -529,7 +529,7 @@
* Word at indexed offset in eeprom, if valid, 0 otherwise.
******************************************************************************/
__le16
-ixgb_get_eeprom_word(struct ixgb_hw *hw, uint16_t index)
+ixgb_get_eeprom_word(struct ixgb_hw *hw, u16 index)
{
if ((index < IXGB_EEPROM_SIZE) &&
@@ -550,7 +550,7 @@
******************************************************************************/
void
ixgb_get_ee_mac_addr(struct ixgb_hw *hw,
- uint8_t *mac_addr)
+ u8 *mac_addr)
{
int i;
struct ixgb_ee_map_type *ee_map = (struct ixgb_ee_map_type *)hw->eeprom;
@@ -574,7 +574,7 @@
* Returns:
* PBA number if EEPROM contents are valid, 0 otherwise
******************************************************************************/
-uint32_t
+u32
ixgb_get_ee_pba_number(struct ixgb_hw *hw)
{
if (ixgb_check_and_get_eeprom_data(hw) == true)
@@ -593,7 +593,7 @@
* Returns:
* Device Id if EEPROM contents are valid, 0 otherwise
******************************************************************************/
-uint16_t
+u16
ixgb_get_ee_device_id(struct ixgb_hw *hw)
{
struct ixgb_ee_map_type *ee_map = (struct ixgb_ee_map_type *)hw->eeprom;
diff --git a/drivers/net/ixgb/ixgb_ee.h b/drivers/net/ixgb/ixgb_ee.h
index da62f58..4b7bd0d 100644
--- a/drivers/net/ixgb/ixgb_ee.h
+++ b/drivers/net/ixgb/ixgb_ee.h
@@ -75,7 +75,7 @@
/* EEPROM structure */
struct ixgb_ee_map_type {
- uint8_t mac_addr[IXGB_ETH_LENGTH_OF_ADDRESS];
+ u8 mac_addr[IXGB_ETH_LENGTH_OF_ADDRESS];
__le16 compatibility;
__le16 reserved1[4];
__le32 pba_number;
@@ -88,19 +88,19 @@
__le16 oem_reserved[16];
__le16 swdpins_reg;
__le16 circuit_ctrl_reg;
- uint8_t d3_power;
- uint8_t d0_power;
+ u8 d3_power;
+ u8 d0_power;
__le16 reserved2[28];
__le16 checksum;
};
/* EEPROM Functions */
-uint16_t ixgb_read_eeprom(struct ixgb_hw *hw, uint16_t reg);
+u16 ixgb_read_eeprom(struct ixgb_hw *hw, u16 reg);
bool ixgb_validate_eeprom_checksum(struct ixgb_hw *hw);
void ixgb_update_eeprom_checksum(struct ixgb_hw *hw);
-void ixgb_write_eeprom(struct ixgb_hw *hw, uint16_t reg, uint16_t data);
+void ixgb_write_eeprom(struct ixgb_hw *hw, u16 reg, u16 data);
#endif /* IXGB_EE_H */
diff --git a/drivers/net/ixgb/ixgb_ethtool.c b/drivers/net/ixgb/ixgb_ethtool.c
index 45ddf80..8464d8a 100644
--- a/drivers/net/ixgb/ixgb_ethtool.c
+++ b/drivers/net/ixgb/ixgb_ethtool.c
@@ -185,7 +185,7 @@
return 0;
}
-static uint32_t
+static u32
ixgb_get_rx_csum(struct net_device *netdev)
{
struct ixgb_adapter *adapter = netdev_priv(netdev);
@@ -194,7 +194,7 @@
}
static int
-ixgb_set_rx_csum(struct net_device *netdev, uint32_t data)
+ixgb_set_rx_csum(struct net_device *netdev, u32 data)
{
struct ixgb_adapter *adapter = netdev_priv(netdev);
@@ -209,14 +209,14 @@
return 0;
}
-static uint32_t
+static u32
ixgb_get_tx_csum(struct net_device *netdev)
{
return (netdev->features & NETIF_F_HW_CSUM) != 0;
}
static int
-ixgb_set_tx_csum(struct net_device *netdev, uint32_t data)
+ixgb_set_tx_csum(struct net_device *netdev, u32 data)
{
if (data)
netdev->features |= NETIF_F_HW_CSUM;
@@ -227,7 +227,7 @@
}
static int
-ixgb_set_tso(struct net_device *netdev, uint32_t data)
+ixgb_set_tso(struct net_device *netdev, u32 data)
{
if(data)
netdev->features |= NETIF_F_TSO;
@@ -236,7 +236,7 @@
return 0;
}
-static uint32_t
+static u32
ixgb_get_msglevel(struct net_device *netdev)
{
struct ixgb_adapter *adapter = netdev_priv(netdev);
@@ -244,7 +244,7 @@
}
static void
-ixgb_set_msglevel(struct net_device *netdev, uint32_t data)
+ixgb_set_msglevel(struct net_device *netdev, u32 data)
{
struct ixgb_adapter *adapter = netdev_priv(netdev);
adapter->msg_enable = data;
@@ -254,7 +254,7 @@
static int
ixgb_get_regs_len(struct net_device *netdev)
{
-#define IXGB_REG_DUMP_LEN 136*sizeof(uint32_t)
+#define IXGB_REG_DUMP_LEN 136*sizeof(u32)
return IXGB_REG_DUMP_LEN;
}
@@ -264,9 +264,9 @@
{
struct ixgb_adapter *adapter = netdev_priv(netdev);
struct ixgb_hw *hw = &adapter->hw;
- uint32_t *reg = p;
- uint32_t *reg_start = reg;
- uint8_t i;
+ u32 *reg = p;
+ u32 *reg_start = reg;
+ u8 i;
/* the 1 (one) below indicates an attempt at versioning, if the
* interface in ethtool or the driver changes, this 1 should be
@@ -395,7 +395,7 @@
*reg++ = IXGB_GET_STAT(adapter, xofftxc); /* 134 */
*reg++ = IXGB_GET_STAT(adapter, rjc); /* 135 */
- regs->len = (reg - reg_start) * sizeof(uint32_t);
+ regs->len = (reg - reg_start) * sizeof(u32);
}
static int
@@ -407,7 +407,7 @@
static int
ixgb_get_eeprom(struct net_device *netdev,
- struct ethtool_eeprom *eeprom, uint8_t *bytes)
+ struct ethtool_eeprom *eeprom, u8 *bytes)
{
struct ixgb_adapter *adapter = netdev_priv(netdev);
struct ixgb_hw *hw = &adapter->hw;
@@ -445,7 +445,7 @@
eeprom_buff[i] = ixgb_get_eeprom_word(hw, (first_word + i));
}
- memcpy(bytes, (uint8_t *)eeprom_buff + (eeprom->offset & 1),
+ memcpy(bytes, (u8 *)eeprom_buff + (eeprom->offset & 1),
eeprom->len);
kfree(eeprom_buff);
@@ -455,14 +455,14 @@
static int
ixgb_set_eeprom(struct net_device *netdev,
- struct ethtool_eeprom *eeprom, uint8_t *bytes)
+ struct ethtool_eeprom *eeprom, u8 *bytes)
{
struct ixgb_adapter *adapter = netdev_priv(netdev);
struct ixgb_hw *hw = &adapter->hw;
- uint16_t *eeprom_buff;
+ u16 *eeprom_buff;
void *ptr;
int max_len, first_word, last_word;
- uint16_t i;
+ u16 i;
if(eeprom->len == 0)
return -EINVAL;
@@ -563,12 +563,12 @@
if(netif_running(adapter->netdev))
ixgb_down(adapter, true);
- rxdr->count = max(ring->rx_pending,(uint32_t)MIN_RXD);
- rxdr->count = min(rxdr->count,(uint32_t)MAX_RXD);
+ rxdr->count = max(ring->rx_pending,(u32)MIN_RXD);
+ rxdr->count = min(rxdr->count,(u32)MAX_RXD);
rxdr->count = ALIGN(rxdr->count, IXGB_REQ_RX_DESCRIPTOR_MULTIPLE);
- txdr->count = max(ring->tx_pending,(uint32_t)MIN_TXD);
- txdr->count = min(txdr->count,(uint32_t)MAX_TXD);
+ txdr->count = max(ring->tx_pending,(u32)MIN_TXD);
+ txdr->count = min(txdr->count,(u32)MAX_TXD);
txdr->count = ALIGN(txdr->count, IXGB_REQ_TX_DESCRIPTOR_MULTIPLE);
if(netif_running(adapter->netdev)) {
@@ -624,7 +624,7 @@
}
static int
-ixgb_phys_id(struct net_device *netdev, uint32_t data)
+ixgb_phys_id(struct net_device *netdev, u32 data)
{
struct ixgb_adapter *adapter = netdev_priv(netdev);
@@ -660,7 +660,7 @@
static void
ixgb_get_ethtool_stats(struct net_device *netdev,
- struct ethtool_stats *stats, uint64_t *data)
+ struct ethtool_stats *stats, u64 *data)
{
struct ixgb_adapter *adapter = netdev_priv(netdev);
int i;
@@ -669,12 +669,12 @@
for(i = 0; i < IXGB_STATS_LEN; i++) {
char *p = (char *)adapter+ixgb_gstrings_stats[i].stat_offset;
data[i] = (ixgb_gstrings_stats[i].sizeof_stat ==
- sizeof(uint64_t)) ? *(uint64_t *)p : *(uint32_t *)p;
+ sizeof(u64)) ? *(u64 *)p : *(u32 *)p;
}
}
static void
-ixgb_get_strings(struct net_device *netdev, uint32_t stringset, uint8_t *data)
+ixgb_get_strings(struct net_device *netdev, u32 stringset, u8 *data)
{
int i;
diff --git a/drivers/net/ixgb/ixgb_hw.c b/drivers/net/ixgb/ixgb_hw.c
index 8a04bbd..04d2003 100644
--- a/drivers/net/ixgb/ixgb_hw.c
+++ b/drivers/net/ixgb/ixgb_hw.c
@@ -35,9 +35,9 @@
/* Local function prototypes */
-static uint32_t ixgb_hash_mc_addr(struct ixgb_hw *hw, uint8_t * mc_addr);
+static u32 ixgb_hash_mc_addr(struct ixgb_hw *hw, u8 * mc_addr);
-static void ixgb_mta_set(struct ixgb_hw *hw, uint32_t hash_value);
+static void ixgb_mta_set(struct ixgb_hw *hw, u32 hash_value);
static void ixgb_get_bus_info(struct ixgb_hw *hw);
@@ -55,18 +55,18 @@
static void ixgb_init_rx_addrs(struct ixgb_hw *hw);
-static uint16_t ixgb_read_phy_reg(struct ixgb_hw *hw,
- uint32_t reg_address,
- uint32_t phy_address,
- uint32_t device_type);
+static u16 ixgb_read_phy_reg(struct ixgb_hw *hw,
+ u32 reg_address,
+ u32 phy_address,
+ u32 device_type);
static bool ixgb_setup_fc(struct ixgb_hw *hw);
-static bool mac_addr_valid(uint8_t *mac_addr);
+static bool mac_addr_valid(u8 *mac_addr);
-static uint32_t ixgb_mac_reset(struct ixgb_hw *hw)
+static u32 ixgb_mac_reset(struct ixgb_hw *hw)
{
- uint32_t ctrl_reg;
+ u32 ctrl_reg;
ctrl_reg = IXGB_CTRL0_RST |
IXGB_CTRL0_SDP3_DIR | /* All pins are Output=1 */
@@ -117,8 +117,8 @@
bool
ixgb_adapter_stop(struct ixgb_hw *hw)
{
- uint32_t ctrl_reg;
- uint32_t icr_reg;
+ u32 ctrl_reg;
+ u32 icr_reg;
DEBUGFUNC("ixgb_adapter_stop");
@@ -179,8 +179,8 @@
static ixgb_xpak_vendor
ixgb_identify_xpak_vendor(struct ixgb_hw *hw)
{
- uint32_t i;
- uint16_t vendor_name[5];
+ u32 i;
+ u16 vendor_name[5];
ixgb_xpak_vendor xpak_vendor;
DEBUGFUNC("ixgb_identify_xpak_vendor");
@@ -292,8 +292,8 @@
bool
ixgb_init_hw(struct ixgb_hw *hw)
{
- uint32_t i;
- uint32_t ctrl_reg;
+ u32 i;
+ u32 ctrl_reg;
bool status;
DEBUGFUNC("ixgb_init_hw");
@@ -377,7 +377,7 @@
static void
ixgb_init_rx_addrs(struct ixgb_hw *hw)
{
- uint32_t i;
+ u32 i;
DEBUGFUNC("ixgb_init_rx_addrs");
@@ -437,13 +437,13 @@
*****************************************************************************/
void
ixgb_mc_addr_list_update(struct ixgb_hw *hw,
- uint8_t *mc_addr_list,
- uint32_t mc_addr_count,
- uint32_t pad)
+ u8 *mc_addr_list,
+ u32 mc_addr_count,
+ u32 pad)
{
- uint32_t hash_value;
- uint32_t i;
- uint32_t rar_used_count = 1; /* RAR[0] is used for our MAC address */
+ u32 hash_value;
+ u32 i;
+ u32 rar_used_count = 1; /* RAR[0] is used for our MAC address */
DEBUGFUNC("ixgb_mc_addr_list_update");
@@ -515,11 +515,11 @@
* Returns:
* The hash value
*****************************************************************************/
-static uint32_t
+static u32
ixgb_hash_mc_addr(struct ixgb_hw *hw,
- uint8_t *mc_addr)
+ u8 *mc_addr)
{
- uint32_t hash_value = 0;
+ u32 hash_value = 0;
DEBUGFUNC("ixgb_hash_mc_addr");
@@ -533,18 +533,18 @@
case 0:
/* [47:36] i.e. 0x563 for above example address */
hash_value =
- ((mc_addr[4] >> 4) | (((uint16_t) mc_addr[5]) << 4));
+ ((mc_addr[4] >> 4) | (((u16) mc_addr[5]) << 4));
break;
case 1: /* [46:35] i.e. 0xAC6 for above example address */
hash_value =
- ((mc_addr[4] >> 3) | (((uint16_t) mc_addr[5]) << 5));
+ ((mc_addr[4] >> 3) | (((u16) mc_addr[5]) << 5));
break;
case 2: /* [45:34] i.e. 0x5D8 for above example address */
hash_value =
- ((mc_addr[4] >> 2) | (((uint16_t) mc_addr[5]) << 6));
+ ((mc_addr[4] >> 2) | (((u16) mc_addr[5]) << 6));
break;
case 3: /* [43:32] i.e. 0x634 for above example address */
- hash_value = ((mc_addr[4]) | (((uint16_t) mc_addr[5]) << 8));
+ hash_value = ((mc_addr[4]) | (((u16) mc_addr[5]) << 8));
break;
default:
/* Invalid mc_filter_type, what should we do? */
@@ -565,10 +565,10 @@
*****************************************************************************/
static void
ixgb_mta_set(struct ixgb_hw *hw,
- uint32_t hash_value)
+ u32 hash_value)
{
- uint32_t hash_bit, hash_reg;
- uint32_t mta_reg;
+ u32 hash_bit, hash_reg;
+ u32 mta_reg;
/* The MTA is a register array of 128 32-bit registers.
* It is treated like an array of 4096 bits. We want to set
@@ -599,23 +599,23 @@
*****************************************************************************/
void
ixgb_rar_set(struct ixgb_hw *hw,
- uint8_t *addr,
- uint32_t index)
+ u8 *addr,
+ u32 index)
{
- uint32_t rar_low, rar_high;
+ u32 rar_low, rar_high;
DEBUGFUNC("ixgb_rar_set");
/* HW expects these in little endian so we reverse the byte order
* from network order (big endian) to little endian
*/
- rar_low = ((uint32_t) addr[0] |
- ((uint32_t)addr[1] << 8) |
- ((uint32_t)addr[2] << 16) |
- ((uint32_t)addr[3] << 24));
+ rar_low = ((u32) addr[0] |
+ ((u32)addr[1] << 8) |
+ ((u32)addr[2] << 16) |
+ ((u32)addr[3] << 24));
- rar_high = ((uint32_t) addr[4] |
- ((uint32_t)addr[5] << 8) |
+ rar_high = ((u32) addr[4] |
+ ((u32)addr[5] << 8) |
IXGB_RAH_AV);
IXGB_WRITE_REG_ARRAY(hw, RA, (index << 1), rar_low);
@@ -632,8 +632,8 @@
*****************************************************************************/
void
ixgb_write_vfta(struct ixgb_hw *hw,
- uint32_t offset,
- uint32_t value)
+ u32 offset,
+ u32 value)
{
IXGB_WRITE_REG_ARRAY(hw, VFTA, offset, value);
return;
@@ -647,7 +647,7 @@
static void
ixgb_clear_vfta(struct ixgb_hw *hw)
{
- uint32_t offset;
+ u32 offset;
for(offset = 0; offset < IXGB_VLAN_FILTER_TBL_SIZE; offset++)
IXGB_WRITE_REG_ARRAY(hw, VFTA, offset, 0);
@@ -663,8 +663,8 @@
static bool
ixgb_setup_fc(struct ixgb_hw *hw)
{
- uint32_t ctrl_reg;
- uint32_t pap_reg = 0; /* by default, assume no pause time */
+ u32 ctrl_reg;
+ u32 pap_reg = 0; /* by default, assume no pause time */
bool status = true;
DEBUGFUNC("ixgb_setup_fc");
@@ -762,15 +762,15 @@
* This requires that first an address cycle command is sent, followed by a
* read command.
*****************************************************************************/
-static uint16_t
+static u16
ixgb_read_phy_reg(struct ixgb_hw *hw,
- uint32_t reg_address,
- uint32_t phy_address,
- uint32_t device_type)
+ u32 reg_address,
+ u32 phy_address,
+ u32 device_type)
{
- uint32_t i;
- uint32_t data;
- uint32_t command = 0;
+ u32 i;
+ u32 data;
+ u32 command = 0;
ASSERT(reg_address <= IXGB_MAX_PHY_REG_ADDRESS);
ASSERT(phy_address <= IXGB_MAX_PHY_ADDRESS);
@@ -835,7 +835,7 @@
*/
data = IXGB_READ_REG(hw, MSRWD);
data >>= IXGB_MSRWD_READ_DATA_SHIFT;
- return((uint16_t) data);
+ return((u16) data);
}
/******************************************************************************
@@ -857,20 +857,20 @@
*****************************************************************************/
static void
ixgb_write_phy_reg(struct ixgb_hw *hw,
- uint32_t reg_address,
- uint32_t phy_address,
- uint32_t device_type,
- uint16_t data)
+ u32 reg_address,
+ u32 phy_address,
+ u32 device_type,
+ u16 data)
{
- uint32_t i;
- uint32_t command = 0;
+ u32 i;
+ u32 command = 0;
ASSERT(reg_address <= IXGB_MAX_PHY_REG_ADDRESS);
ASSERT(phy_address <= IXGB_MAX_PHY_ADDRESS);
ASSERT(device_type <= IXGB_MAX_PHY_DEV_TYPE);
/* Put the data in the MDIO Read/Write Data register */
- IXGB_WRITE_REG(hw, MSRWD, (uint32_t)data);
+ IXGB_WRITE_REG(hw, MSRWD, (u32)data);
/* Setup and write the address cycle command */
command = ((reg_address << IXGB_MSCA_NP_ADDR_SHIFT) |
@@ -939,8 +939,8 @@
void
ixgb_check_for_link(struct ixgb_hw *hw)
{
- uint32_t status_reg;
- uint32_t xpcss_reg;
+ u32 status_reg;
+ u32 xpcss_reg;
DEBUGFUNC("ixgb_check_for_link");
@@ -975,7 +975,7 @@
*****************************************************************************/
bool ixgb_check_for_bad_link(struct ixgb_hw *hw)
{
- uint32_t newLFC, newRFC;
+ u32 newLFC, newRFC;
bool bad_link_returncode = false;
if (hw->phy_type == ixgb_phy_type_txn17401) {
@@ -1002,7 +1002,7 @@
static void
ixgb_clear_hw_cntrs(struct ixgb_hw *hw)
{
- volatile uint32_t temp_reg;
+ volatile u32 temp_reg;
DEBUGFUNC("ixgb_clear_hw_cntrs");
@@ -1083,7 +1083,7 @@
void
ixgb_led_on(struct ixgb_hw *hw)
{
- uint32_t ctrl0_reg = IXGB_READ_REG(hw, CTRL0);
+ u32 ctrl0_reg = IXGB_READ_REG(hw, CTRL0);
/* To turn on the LED, clear software-definable pin 0 (SDP0). */
ctrl0_reg &= ~IXGB_CTRL0_SDP0;
@@ -1099,7 +1099,7 @@
void
ixgb_led_off(struct ixgb_hw *hw)
{
- uint32_t ctrl0_reg = IXGB_READ_REG(hw, CTRL0);
+ u32 ctrl0_reg = IXGB_READ_REG(hw, CTRL0);
/* To turn off the LED, set software-definable pin 0 (SDP0). */
ctrl0_reg |= IXGB_CTRL0_SDP0;
@@ -1115,7 +1115,7 @@
static void
ixgb_get_bus_info(struct ixgb_hw *hw)
{
- uint32_t status_reg;
+ u32 status_reg;
status_reg = IXGB_READ_REG(hw, STATUS);
@@ -1155,7 +1155,7 @@
*
*****************************************************************************/
static bool
-mac_addr_valid(uint8_t *mac_addr)
+mac_addr_valid(u8 *mac_addr)
{
bool is_valid = true;
DEBUGFUNC("mac_addr_valid");
@@ -1193,8 +1193,8 @@
ixgb_link_reset(struct ixgb_hw *hw)
{
bool link_status = false;
- uint8_t wait_retries = MAX_RESET_ITERATIONS;
- uint8_t lrst_retries = MAX_RESET_ITERATIONS;
+ u8 wait_retries = MAX_RESET_ITERATIONS;
+ u8 lrst_retries = MAX_RESET_ITERATIONS;
do {
/* Reset the link */
@@ -1224,7 +1224,7 @@
ixgb_optics_reset(struct ixgb_hw *hw)
{
if (hw->phy_type == ixgb_phy_type_txn17401) {
- uint16_t mdio_reg;
+ u16 mdio_reg;
ixgb_write_phy_reg(hw,
MDIO_PMA_PMD_CR1,
diff --git a/drivers/net/ixgb/ixgb_hw.h b/drivers/net/ixgb/ixgb_hw.h
index d4e9566..39cfa47 100644
--- a/drivers/net/ixgb/ixgb_hw.h
+++ b/drivers/net/ixgb/ixgb_hw.h
@@ -538,8 +538,8 @@
__le64 buff_addr;
__le16 length;
__le16 reserved;
- uint8_t status;
- uint8_t errors;
+ u8 status;
+ u8 errors;
__le16 special;
};
@@ -570,8 +570,8 @@
struct ixgb_tx_desc {
__le64 buff_addr;
__le32 cmd_type_len;
- uint8_t status;
- uint8_t popts;
+ u8 status;
+ u8 popts;
__le16 vlan;
};
@@ -595,15 +595,15 @@
#define IXGB_TX_DESC_SPECIAL_PRI_SHIFT IXGB_RX_DESC_SPECIAL_PRI_SHIFT /* Priority is in upper 3 of 16 */
struct ixgb_context_desc {
- uint8_t ipcss;
- uint8_t ipcso;
+ u8 ipcss;
+ u8 ipcso;
__le16 ipcse;
- uint8_t tucss;
- uint8_t tucso;
+ u8 tucss;
+ u8 tucso;
__le16 tucse;
__le32 cmd_type_len;
- uint8_t status;
- uint8_t hdr_len;
+ u8 status;
+ u8 hdr_len;
__le16 mss;
};
@@ -637,32 +637,32 @@
/* This structure takes a 64k flash and maps it for identification commands */
struct ixgb_flash_buffer {
- uint8_t manufacturer_id;
- uint8_t device_id;
- uint8_t filler1[0x2AA8];
- uint8_t cmd2;
- uint8_t filler2[0x2AAA];
- uint8_t cmd1;
- uint8_t filler3[0xAAAA];
+ u8 manufacturer_id;
+ u8 device_id;
+ u8 filler1[0x2AA8];
+ u8 cmd2;
+ u8 filler2[0x2AAA];
+ u8 cmd1;
+ u8 filler3[0xAAAA];
};
/*
* This is a little-endian specific check.
*/
#define IS_MULTICAST(Address) \
- (bool)(((uint8_t *)(Address))[0] & ((uint8_t)0x01))
+ (bool)(((u8 *)(Address))[0] & ((u8)0x01))
/*
* Check whether an address is broadcast.
*/
#define IS_BROADCAST(Address) \
- ((((uint8_t *)(Address))[0] == ((uint8_t)0xff)) && (((uint8_t *)(Address))[1] == ((uint8_t)0xff)))
+ ((((u8 *)(Address))[0] == ((u8)0xff)) && (((u8 *)(Address))[1] == ((u8)0xff)))
/* Flow control parameters */
struct ixgb_fc {
- uint32_t high_water; /* Flow Control High-water */
- uint32_t low_water; /* Flow Control Low-water */
- uint16_t pause_time; /* Flow Control Pause timer */
+ u32 high_water; /* Flow Control High-water */
+ u32 low_water; /* Flow Control Low-water */
+ u16 pause_time; /* Flow Control Pause timer */
bool send_xon; /* Flow control send XON */
ixgb_fc_type type; /* Type of flow control */
};
@@ -685,101 +685,101 @@
};
struct ixgb_hw {
- uint8_t __iomem *hw_addr;/* Base Address of the hardware */
+ u8 __iomem *hw_addr;/* Base Address of the hardware */
void *back; /* Pointer to OS-dependent struct */
struct ixgb_fc fc; /* Flow control parameters */
struct ixgb_bus bus; /* Bus parameters */
- uint32_t phy_id; /* Phy Identifier */
- uint32_t phy_addr; /* XGMII address of Phy */
+ u32 phy_id; /* Phy Identifier */
+ u32 phy_addr; /* XGMII address of Phy */
ixgb_mac_type mac_type; /* Identifier for MAC controller */
ixgb_phy_type phy_type; /* Transceiver/phy identifier */
- uint32_t max_frame_size; /* Maximum frame size supported */
- uint32_t mc_filter_type; /* Multicast filter hash type */
- uint32_t num_mc_addrs; /* Number of current Multicast addrs */
- uint8_t curr_mac_addr[IXGB_ETH_LENGTH_OF_ADDRESS]; /* Individual address currently programmed in MAC */
- uint32_t num_tx_desc; /* Number of Transmit descriptors */
- uint32_t num_rx_desc; /* Number of Receive descriptors */
- uint32_t rx_buffer_size; /* Size of Receive buffer */
+ u32 max_frame_size; /* Maximum frame size supported */
+ u32 mc_filter_type; /* Multicast filter hash type */
+ u32 num_mc_addrs; /* Number of current Multicast addrs */
+ u8 curr_mac_addr[IXGB_ETH_LENGTH_OF_ADDRESS]; /* Individual address currently programmed in MAC */
+ u32 num_tx_desc; /* Number of Transmit descriptors */
+ u32 num_rx_desc; /* Number of Receive descriptors */
+ u32 rx_buffer_size; /* Size of Receive buffer */
bool link_up; /* true if link is valid */
bool adapter_stopped; /* State of adapter */
- uint16_t device_id; /* device id from PCI configuration space */
- uint16_t vendor_id; /* vendor id from PCI configuration space */
- uint8_t revision_id; /* revision id from PCI configuration space */
- uint16_t subsystem_vendor_id; /* subsystem vendor id from PCI configuration space */
- uint16_t subsystem_id; /* subsystem id from PCI configuration space */
- uint32_t bar0; /* Base Address registers */
- uint32_t bar1;
- uint32_t bar2;
- uint32_t bar3;
- uint16_t pci_cmd_word; /* PCI command register id from PCI configuration space */
+ u16 device_id; /* device id from PCI configuration space */
+ u16 vendor_id; /* vendor id from PCI configuration space */
+ u8 revision_id; /* revision id from PCI configuration space */
+ u16 subsystem_vendor_id; /* subsystem vendor id from PCI configuration space */
+ u16 subsystem_id; /* subsystem id from PCI configuration space */
+ u32 bar0; /* Base Address registers */
+ u32 bar1;
+ u32 bar2;
+ u32 bar3;
+ u16 pci_cmd_word; /* PCI command register id from PCI configuration space */
__le16 eeprom[IXGB_EEPROM_SIZE]; /* EEPROM contents read at init time */
unsigned long io_base; /* Our I/O mapped location */
- uint32_t lastLFC;
- uint32_t lastRFC;
+ u32 lastLFC;
+ u32 lastRFC;
};
/* Statistics reported by the hardware */
struct ixgb_hw_stats {
- uint64_t tprl;
- uint64_t tprh;
- uint64_t gprcl;
- uint64_t gprch;
- uint64_t bprcl;
- uint64_t bprch;
- uint64_t mprcl;
- uint64_t mprch;
- uint64_t uprcl;
- uint64_t uprch;
- uint64_t vprcl;
- uint64_t vprch;
- uint64_t jprcl;
- uint64_t jprch;
- uint64_t gorcl;
- uint64_t gorch;
- uint64_t torl;
- uint64_t torh;
- uint64_t rnbc;
- uint64_t ruc;
- uint64_t roc;
- uint64_t rlec;
- uint64_t crcerrs;
- uint64_t icbc;
- uint64_t ecbc;
- uint64_t mpc;
- uint64_t tptl;
- uint64_t tpth;
- uint64_t gptcl;
- uint64_t gptch;
- uint64_t bptcl;
- uint64_t bptch;
- uint64_t mptcl;
- uint64_t mptch;
- uint64_t uptcl;
- uint64_t uptch;
- uint64_t vptcl;
- uint64_t vptch;
- uint64_t jptcl;
- uint64_t jptch;
- uint64_t gotcl;
- uint64_t gotch;
- uint64_t totl;
- uint64_t toth;
- uint64_t dc;
- uint64_t plt64c;
- uint64_t tsctc;
- uint64_t tsctfc;
- uint64_t ibic;
- uint64_t rfc;
- uint64_t lfc;
- uint64_t pfrc;
- uint64_t pftc;
- uint64_t mcfrc;
- uint64_t mcftc;
- uint64_t xonrxc;
- uint64_t xontxc;
- uint64_t xoffrxc;
- uint64_t xofftxc;
- uint64_t rjc;
+ u64 tprl;
+ u64 tprh;
+ u64 gprcl;
+ u64 gprch;
+ u64 bprcl;
+ u64 bprch;
+ u64 mprcl;
+ u64 mprch;
+ u64 uprcl;
+ u64 uprch;
+ u64 vprcl;
+ u64 vprch;
+ u64 jprcl;
+ u64 jprch;
+ u64 gorcl;
+ u64 gorch;
+ u64 torl;
+ u64 torh;
+ u64 rnbc;
+ u64 ruc;
+ u64 roc;
+ u64 rlec;
+ u64 crcerrs;
+ u64 icbc;
+ u64 ecbc;
+ u64 mpc;
+ u64 tptl;
+ u64 tpth;
+ u64 gptcl;
+ u64 gptch;
+ u64 bptcl;
+ u64 bptch;
+ u64 mptcl;
+ u64 mptch;
+ u64 uptcl;
+ u64 uptch;
+ u64 vptcl;
+ u64 vptch;
+ u64 jptcl;
+ u64 jptch;
+ u64 gotcl;
+ u64 gotch;
+ u64 totl;
+ u64 toth;
+ u64 dc;
+ u64 plt64c;
+ u64 tsctc;
+ u64 tsctfc;
+ u64 ibic;
+ u64 rfc;
+ u64 lfc;
+ u64 pfrc;
+ u64 pftc;
+ u64 mcfrc;
+ u64 mcftc;
+ u64 xonrxc;
+ u64 xontxc;
+ u64 xoffrxc;
+ u64 xofftxc;
+ u64 rjc;
};
/* Function Prototypes */
@@ -790,34 +790,34 @@
extern bool ixgb_check_for_bad_link(struct ixgb_hw *hw);
extern void ixgb_rar_set(struct ixgb_hw *hw,
- uint8_t *addr,
- uint32_t index);
+ u8 *addr,
+ u32 index);
/* Filters (multicast, vlan, receive) */
extern void ixgb_mc_addr_list_update(struct ixgb_hw *hw,
- uint8_t *mc_addr_list,
- uint32_t mc_addr_count,
- uint32_t pad);
+ u8 *mc_addr_list,
+ u32 mc_addr_count,
+ u32 pad);
/* Vfta functions */
extern void ixgb_write_vfta(struct ixgb_hw *hw,
- uint32_t offset,
- uint32_t value);
+ u32 offset,
+ u32 value);
/* Access functions to eeprom data */
-void ixgb_get_ee_mac_addr(struct ixgb_hw *hw, uint8_t *mac_addr);
-uint32_t ixgb_get_ee_pba_number(struct ixgb_hw *hw);
-uint16_t ixgb_get_ee_device_id(struct ixgb_hw *hw);
+void ixgb_get_ee_mac_addr(struct ixgb_hw *hw, u8 *mac_addr);
+u32 ixgb_get_ee_pba_number(struct ixgb_hw *hw);
+u16 ixgb_get_ee_device_id(struct ixgb_hw *hw);
bool ixgb_get_eeprom_data(struct ixgb_hw *hw);
-__le16 ixgb_get_eeprom_word(struct ixgb_hw *hw, uint16_t index);
+__le16 ixgb_get_eeprom_word(struct ixgb_hw *hw, u16 index);
/* Everything else */
void ixgb_led_on(struct ixgb_hw *hw);
void ixgb_led_off(struct ixgb_hw *hw);
void ixgb_write_pci_cfg(struct ixgb_hw *hw,
- uint32_t reg,
- uint16_t * value);
+ u32 reg,
+ u16 * value);
#endif /* _IXGB_HW_H_ */
diff --git a/drivers/net/ixgb/ixgb_main.c b/drivers/net/ixgb/ixgb_main.c
index c68b182..cb8dadd 100644
--- a/drivers/net/ixgb/ixgb_main.c
+++ b/drivers/net/ixgb/ixgb_main.c
@@ -108,8 +108,8 @@
static void ixgb_tx_timeout_task(struct work_struct *work);
static void ixgb_vlan_rx_register(struct net_device *netdev,
struct vlan_group *grp);
-static void ixgb_vlan_rx_add_vid(struct net_device *netdev, uint16_t vid);
-static void ixgb_vlan_rx_kill_vid(struct net_device *netdev, uint16_t vid);
+static void ixgb_vlan_rx_add_vid(struct net_device *netdev, u16 vid);
+static void ixgb_vlan_rx_kill_vid(struct net_device *netdev, u16 vid);
static void ixgb_restore_vlan(struct ixgb_adapter *adapter);
#ifdef CONFIG_NET_POLL_CONTROLLER
@@ -271,7 +271,7 @@
if(hw->max_frame_size >
IXGB_MAX_ENET_FRAME_SIZE_WITHOUT_FCS + ENET_FCS_LENGTH) {
- uint32_t ctrl0 = IXGB_READ_REG(hw, CTRL0);
+ u32 ctrl0 = IXGB_READ_REG(hw, CTRL0);
if(!(ctrl0 & IXGB_CTRL0_JFE)) {
ctrl0 |= IXGB_CTRL0_JFE;
@@ -718,9 +718,9 @@
static void
ixgb_configure_tx(struct ixgb_adapter *adapter)
{
- uint64_t tdba = adapter->tx_ring.dma;
- uint32_t tdlen = adapter->tx_ring.count * sizeof(struct ixgb_tx_desc);
- uint32_t tctl;
+ u64 tdba = adapter->tx_ring.dma;
+ u32 tdlen = adapter->tx_ring.count * sizeof(struct ixgb_tx_desc);
+ u32 tctl;
struct ixgb_hw *hw = &adapter->hw;
/* Setup the Base and Length of the Tx Descriptor Ring
@@ -806,7 +806,7 @@
static void
ixgb_setup_rctl(struct ixgb_adapter *adapter)
{
- uint32_t rctl;
+ u32 rctl;
rctl = IXGB_READ_REG(&adapter->hw, RCTL);
@@ -841,12 +841,12 @@
static void
ixgb_configure_rx(struct ixgb_adapter *adapter)
{
- uint64_t rdba = adapter->rx_ring.dma;
- uint32_t rdlen = adapter->rx_ring.count * sizeof(struct ixgb_rx_desc);
+ u64 rdba = adapter->rx_ring.dma;
+ u32 rdlen = adapter->rx_ring.count * sizeof(struct ixgb_rx_desc);
struct ixgb_hw *hw = &adapter->hw;
- uint32_t rctl;
- uint32_t rxcsum;
- uint32_t rxdctl;
+ u32 rctl;
+ u32 rxcsum;
+ u32 rxdctl;
/* make sure receives are disabled while setting up the descriptors */
@@ -1079,7 +1079,7 @@
struct ixgb_adapter *adapter = netdev_priv(netdev);
struct ixgb_hw *hw = &adapter->hw;
struct dev_mc_list *mc_ptr;
- uint32_t rctl;
+ u32 rctl;
int i;
/* Check for Promiscuous and All Multicast modes */
@@ -1099,7 +1099,7 @@
rctl |= IXGB_RCTL_MPE;
IXGB_WRITE_REG(hw, RCTL, rctl);
} else {
- uint8_t mta[IXGB_MAX_NUM_MULTICAST_ADDRESSES *
+ u8 mta[IXGB_MAX_NUM_MULTICAST_ADDRESSES *
IXGB_ETH_LENGTH_OF_ADDRESS];
IXGB_WRITE_REG(hw, RCTL, rctl);
@@ -1183,8 +1183,8 @@
{
struct ixgb_context_desc *context_desc;
unsigned int i;
- uint8_t ipcss, ipcso, tucss, tucso, hdr_len;
- uint16_t ipcse, tucse, mss;
+ u8 ipcss, ipcso, tucss, tucso, hdr_len;
+ u16 ipcse, tucse, mss;
int err;
if (likely(skb_is_gso(skb))) {
@@ -1249,7 +1249,7 @@
{
struct ixgb_context_desc *context_desc;
unsigned int i;
- uint8_t css, cso;
+ u8 css, cso;
if(likely(skb->ip_summed == CHECKSUM_PARTIAL)) {
struct ixgb_buffer *buffer_info;
@@ -1265,7 +1265,7 @@
context_desc->tucso = cso;
context_desc->tucse = 0;
/* zero out any previously existing data in one instruction */
- *(uint32_t *)&(context_desc->ipcss) = 0;
+ *(u32 *)&(context_desc->ipcss) = 0;
context_desc->status = 0;
context_desc->hdr_len = 0;
context_desc->mss = 0;
@@ -1372,9 +1372,9 @@
struct ixgb_desc_ring *tx_ring = &adapter->tx_ring;
struct ixgb_tx_desc *tx_desc = NULL;
struct ixgb_buffer *buffer_info;
- uint32_t cmd_type_len = adapter->tx_cmd_type;
- uint8_t status = 0;
- uint8_t popts = 0;
+ u32 cmd_type_len = adapter->tx_cmd_type;
+ u8 status = 0;
+ u8 popts = 0;
unsigned int i;
if(tx_flags & IXGB_TX_FLAGS_TSO) {
@@ -1750,7 +1750,7 @@
struct net_device *netdev = data;
struct ixgb_adapter *adapter = netdev_priv(netdev);
struct ixgb_hw *hw = &adapter->hw;
- uint32_t icr = IXGB_READ_REG(hw, ICR);
+ u32 icr = IXGB_READ_REG(hw, ICR);
#ifndef CONFIG_IXGB_NAPI
unsigned int i;
#endif
@@ -1843,7 +1843,7 @@
ixgb_unmap_and_free_tx_resource(adapter, buffer_info);
- *(uint32_t *)&(tx_desc->status) = 0;
+ *(u32 *)&(tx_desc->status) = 0;
cleaned = (i == eop);
if(++i == tx_ring->count) i = 0;
@@ -1948,7 +1948,7 @@
struct pci_dev *pdev = adapter->pdev;
struct ixgb_rx_desc *rx_desc, *next_rxd;
struct ixgb_buffer *buffer_info, *next_buffer, *next2_buffer;
- uint32_t length;
+ u32 length;
unsigned int i, j;
bool cleaned = false;
@@ -2166,7 +2166,7 @@
ixgb_vlan_rx_register(struct net_device *netdev, struct vlan_group *grp)
{
struct ixgb_adapter *adapter = netdev_priv(netdev);
- uint32_t ctrl, rctl;
+ u32 ctrl, rctl;
ixgb_irq_disable(adapter);
adapter->vlgrp = grp;
@@ -2203,10 +2203,10 @@
}
static void
-ixgb_vlan_rx_add_vid(struct net_device *netdev, uint16_t vid)
+ixgb_vlan_rx_add_vid(struct net_device *netdev, u16 vid)
{
struct ixgb_adapter *adapter = netdev_priv(netdev);
- uint32_t vfta, index;
+ u32 vfta, index;
/* add VID to filter table */
@@ -2217,10 +2217,10 @@
}
static void
-ixgb_vlan_rx_kill_vid(struct net_device *netdev, uint16_t vid)
+ixgb_vlan_rx_kill_vid(struct net_device *netdev, u16 vid)
{
struct ixgb_adapter *adapter = netdev_priv(netdev);
- uint32_t vfta, index;
+ u32 vfta, index;
ixgb_irq_disable(adapter);
@@ -2244,7 +2244,7 @@
ixgb_vlan_rx_register(adapter->netdev, adapter->vlgrp);
if(adapter->vlgrp) {
- uint16_t vid;
+ u16 vid;
for(vid = 0; vid < VLAN_GROUP_ARRAY_LEN; vid++) {
if(!vlan_group_get_device(adapter->vlgrp, vid))
continue;
diff --git a/drivers/net/macb.c b/drivers/net/macb.c
index 489c7c3..d513bb8 100644
--- a/drivers/net/macb.c
+++ b/drivers/net/macb.c
@@ -246,7 +246,7 @@
bp->mii_bus.read = &macb_mdio_read;
bp->mii_bus.write = &macb_mdio_write;
bp->mii_bus.reset = &macb_mdio_reset;
- bp->mii_bus.id = bp->pdev->id;
+ snprintf(bp->mii_bus.id, MII_BUS_ID_SIZE, "%x", bp->pdev->id);
bp->mii_bus.priv = bp;
bp->mii_bus.dev = &bp->dev->dev;
pdata = bp->pdev->dev.platform_data;
diff --git a/drivers/net/mv643xx_eth.c b/drivers/net/mv643xx_eth.c
index d65cade..601ffd6 100644
--- a/drivers/net/mv643xx_eth.c
+++ b/drivers/net/mv643xx_eth.c
@@ -3,7 +3,8 @@
* Copyright (C) 2002 Matthew Dharm <mdharm@momenco.com>
*
* Based on the 64360 driver from:
- * Copyright (C) 2002 rabeeh@galileo.co.il
+ * Copyright (C) 2002 Rabeeh Khoury <rabeeh@galileo.co.il>
+ * Rabeeh Khoury <rabeeh@marvell.com>
*
* Copyright (C) 2003 PMC-Sierra, Inc.,
* written by Manish Lachwani
@@ -16,6 +17,9 @@
* Copyright (C) 2004 Steven J. Hill <sjhill1@rockwellcollins.com>
* <sjhill@realitydiluted.com>
*
+ * Copyright (C) 2007-2008 Marvell Semiconductor
+ * Lennert Buytenhek <buytenh@marvell.com>
+ *
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License
* as published by the Free Software Foundation; either version 2
@@ -63,20 +67,6 @@
#define MV643XX_TX_FAST_REFILL
#undef MV643XX_COAL
-/*
- * Number of RX / TX descriptors on RX / TX rings.
- * Note that allocating RX descriptors is done by allocating the RX
- * ring AND a preallocated RX buffers (skb's) for each descriptor.
- * The TX descriptors only allocates the TX descriptors ring,
- * with no pre allocated TX buffers (skb's are allocated by higher layers.
- */
-
-/* Default TX ring size is 1000 descriptors */
-#define MV643XX_DEFAULT_TX_QUEUE_SIZE 1000
-
-/* Default RX ring size is 400 descriptors */
-#define MV643XX_DEFAULT_RX_QUEUE_SIZE 400
-
#define MV643XX_TX_COAL 100
#ifdef MV643XX_COAL
#define MV643XX_RX_COAL 100
@@ -434,14 +424,6 @@
ETH_QUEUE_LAST_RESOURCE /* Ring resources about to exhaust. */
} ETH_FUNC_RET_STATUS;
-typedef enum _eth_target {
- ETH_TARGET_DRAM,
- ETH_TARGET_DEVICE,
- ETH_TARGET_CBS,
- ETH_TARGET_PCI0,
- ETH_TARGET_PCI1
-} ETH_TARGET;
-
/* These are for big-endian machines. Little endian needs different
* definitions.
*/
@@ -586,43 +568,44 @@
/* Static function declarations */
static void eth_port_init(struct mv643xx_private *mp);
-static void eth_port_reset(unsigned int eth_port_num);
+static void eth_port_reset(struct mv643xx_private *mp);
static void eth_port_start(struct net_device *dev);
-static void ethernet_phy_reset(unsigned int eth_port_num);
+static void ethernet_phy_reset(struct mv643xx_private *mp);
-static void eth_port_write_smi_reg(unsigned int eth_port_num,
+static void eth_port_write_smi_reg(struct mv643xx_private *mp,
unsigned int phy_reg, unsigned int value);
-static void eth_port_read_smi_reg(unsigned int eth_port_num,
+static void eth_port_read_smi_reg(struct mv643xx_private *mp,
unsigned int phy_reg, unsigned int *value);
-static void eth_clear_mib_counters(unsigned int eth_port_num);
+static void eth_clear_mib_counters(struct mv643xx_private *mp);
static ETH_FUNC_RET_STATUS eth_port_receive(struct mv643xx_private *mp,
struct pkt_info *p_pkt_info);
static ETH_FUNC_RET_STATUS eth_rx_return_buff(struct mv643xx_private *mp,
struct pkt_info *p_pkt_info);
-static void eth_port_uc_addr_get(unsigned int port_num, unsigned char *p_addr);
-static void eth_port_uc_addr_set(unsigned int port_num, unsigned char *p_addr);
+static void eth_port_uc_addr_get(struct mv643xx_private *mp,
+ unsigned char *p_addr);
+static void eth_port_uc_addr_set(struct mv643xx_private *mp,
+ unsigned char *p_addr);
static void eth_port_set_multicast_list(struct net_device *);
-static void mv643xx_eth_port_enable_tx(unsigned int port_num,
+static void mv643xx_eth_port_enable_tx(struct mv643xx_private *mp,
unsigned int queues);
-static void mv643xx_eth_port_enable_rx(unsigned int port_num,
+static void mv643xx_eth_port_enable_rx(struct mv643xx_private *mp,
unsigned int queues);
-static unsigned int mv643xx_eth_port_disable_tx(unsigned int port_num);
-static unsigned int mv643xx_eth_port_disable_rx(unsigned int port_num);
+static unsigned int mv643xx_eth_port_disable_tx(struct mv643xx_private *mp);
+static unsigned int mv643xx_eth_port_disable_rx(struct mv643xx_private *mp);
static int mv643xx_eth_open(struct net_device *);
static int mv643xx_eth_stop(struct net_device *);
-static int mv643xx_eth_change_mtu(struct net_device *, int);
-static void eth_port_init_mac_tables(unsigned int eth_port_num);
+static void eth_port_init_mac_tables(struct mv643xx_private *mp);
#ifdef MV643XX_NAPI
static int mv643xx_poll(struct napi_struct *napi, int budget);
#endif
-static int ethernet_phy_get(unsigned int eth_port_num);
-static void ethernet_phy_set(unsigned int eth_port_num, int phy_addr);
-static int ethernet_phy_detect(unsigned int eth_port_num);
+static int ethernet_phy_get(struct mv643xx_private *mp);
+static void ethernet_phy_set(struct mv643xx_private *mp, int phy_addr);
+static int ethernet_phy_detect(struct mv643xx_private *mp);
static int mv643xx_mdio_read(struct net_device *dev, int phy_id, int location);
static void mv643xx_mdio_write(struct net_device *dev, int phy_id, int location, int val);
static int mv643xx_eth_do_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd);
@@ -636,12 +619,12 @@
/* used to protect SMI_REG, which is shared across ports */
static DEFINE_SPINLOCK(mv643xx_eth_phy_lock);
-static inline u32 mv_read(int offset)
+static inline u32 rdl(struct mv643xx_private *mp, int offset)
{
return readl(mv643xx_eth_base + offset);
}
-static inline void mv_write(int offset, u32 data)
+static inline void wrl(struct mv643xx_private *mp, int offset, u32 data)
{
writel(data, mv643xx_eth_base + offset);
}
@@ -659,18 +642,19 @@
return -EINVAL;
dev->mtu = new_mtu;
+ if (!netif_running(dev))
+ return 0;
+
/*
- * Stop then re-open the interface. This will allocate RX skb's with
- * the new MTU.
- * There is a possible danger that the open will not successed, due
- * to memory is full, which might fail the open function.
+ * Stop and then re-open the interface. This will allocate RX
+ * skbs of the new MTU.
+ * There is a possible danger that the open will not succeed,
+ * due to memory being full, which might fail the open function.
*/
- if (netif_running(dev)) {
- mv643xx_eth_stop(dev);
- if (mv643xx_eth_open(dev))
- printk(KERN_ERR
- "%s: Fatal error on opening device\n",
- dev->name);
+ mv643xx_eth_stop(dev);
+ if (mv643xx_eth_open(dev)) {
+ printk(KERN_ERR "%s: Fatal error on opening device\n",
+ dev->name);
}
return 0;
@@ -748,10 +732,9 @@
static void mv643xx_eth_update_mac_address(struct net_device *dev)
{
struct mv643xx_private *mp = netdev_priv(dev);
- unsigned int port_num = mp->port_num;
- eth_port_init_mac_tables(port_num);
- eth_port_uc_addr_set(port_num, dev->dev_addr);
+ eth_port_init_mac_tables(mp);
+ eth_port_uc_addr_set(mp, dev->dev_addr);
}
/*
@@ -767,12 +750,12 @@
struct mv643xx_private *mp = netdev_priv(dev);
u32 config_reg;
- config_reg = mv_read(PORT_CONFIG_REG(mp->port_num));
+ config_reg = rdl(mp, PORT_CONFIG_REG(mp->port_num));
if (dev->flags & IFF_PROMISC)
config_reg |= (u32) UNICAST_PROMISCUOUS_MODE;
else
config_reg &= ~(u32) UNICAST_PROMISCUOUS_MODE;
- mv_write(PORT_CONFIG_REG(mp->port_num), config_reg);
+ wrl(mp, PORT_CONFIG_REG(mp->port_num), config_reg);
eth_port_set_multicast_list(dev);
}
@@ -826,14 +809,14 @@
{
struct mv643xx_private *mp = container_of(ugly, struct mv643xx_private,
tx_timeout_task);
- struct net_device *dev = mp->mii.dev; /* yuck */
+ struct net_device *dev = mp->dev;
if (!netif_running(dev))
return;
netif_stop_queue(dev);
- eth_port_reset(mp->port_num);
+ eth_port_reset(mp);
eth_port_start(dev);
if (mp->tx_ring_size - mp->tx_desc_count >= MAX_DESCS_PER_SKB)
@@ -845,7 +828,7 @@
*
* If force is non-zero, frees uncompleted descriptors as well
*/
-int mv643xx_eth_free_tx_descs(struct net_device *dev, int force)
+static int mv643xx_eth_free_tx_descs(struct net_device *dev, int force)
{
struct mv643xx_private *mp = netdev_priv(dev);
struct eth_tx_desc *desc;
@@ -1008,7 +991,7 @@
u32 o_pscr, n_pscr;
unsigned int queues;
- o_pscr = mv_read(PORT_SERIAL_CONTROL_REG(port_num));
+ o_pscr = rdl(mp, PORT_SERIAL_CONTROL_REG(port_num));
n_pscr = o_pscr;
/* clear speed, duplex and rx buffer size fields */
@@ -1031,16 +1014,16 @@
if (n_pscr != o_pscr) {
if ((o_pscr & SERIAL_PORT_ENABLE) == 0)
- mv_write(PORT_SERIAL_CONTROL_REG(port_num), n_pscr);
+ wrl(mp, PORT_SERIAL_CONTROL_REG(port_num), n_pscr);
else {
- queues = mv643xx_eth_port_disable_tx(port_num);
+ queues = mv643xx_eth_port_disable_tx(mp);
o_pscr &= ~SERIAL_PORT_ENABLE;
- mv_write(PORT_SERIAL_CONTROL_REG(port_num), o_pscr);
- mv_write(PORT_SERIAL_CONTROL_REG(port_num), n_pscr);
- mv_write(PORT_SERIAL_CONTROL_REG(port_num), n_pscr);
+ wrl(mp, PORT_SERIAL_CONTROL_REG(port_num), o_pscr);
+ wrl(mp, PORT_SERIAL_CONTROL_REG(port_num), n_pscr);
+ wrl(mp, PORT_SERIAL_CONTROL_REG(port_num), n_pscr);
if (queues)
- mv643xx_eth_port_enable_tx(port_num, queues);
+ mv643xx_eth_port_enable_tx(mp, queues);
}
}
}
@@ -1064,13 +1047,13 @@
unsigned int port_num = mp->port_num;
/* Read interrupt cause registers */
- eth_int_cause = mv_read(INTERRUPT_CAUSE_REG(port_num)) &
+ eth_int_cause = rdl(mp, INTERRUPT_CAUSE_REG(port_num)) &
ETH_INT_UNMASK_ALL;
if (eth_int_cause & ETH_INT_CAUSE_EXT) {
- eth_int_cause_ext = mv_read(
+ eth_int_cause_ext = rdl(mp,
INTERRUPT_CAUSE_EXTEND_REG(port_num)) &
ETH_INT_UNMASK_ALL_EXT;
- mv_write(INTERRUPT_CAUSE_EXTEND_REG(port_num),
+ wrl(mp, INTERRUPT_CAUSE_EXTEND_REG(port_num),
~eth_int_cause_ext);
}
@@ -1081,8 +1064,7 @@
if (mii_link_ok(&mp->mii)) {
mii_ethtool_gset(&mp->mii, &cmd);
mv643xx_eth_update_pscr(dev, &cmd);
- mv643xx_eth_port_enable_tx(port_num,
- ETH_TX_QUEUES_ENABLED);
+ mv643xx_eth_port_enable_tx(mp, ETH_TX_QUEUES_ENABLED);
if (!netif_carrier_ok(dev)) {
netif_carrier_on(dev);
if (mp->tx_ring_size - mp->tx_desc_count >=
@@ -1098,10 +1080,10 @@
#ifdef MV643XX_NAPI
if (eth_int_cause & ETH_INT_CAUSE_RX) {
/* schedule the NAPI poll routine to maintain port */
- mv_write(INTERRUPT_MASK_REG(port_num), ETH_INT_MASK_ALL);
+ wrl(mp, INTERRUPT_MASK_REG(port_num), ETH_INT_MASK_ALL);
/* wait for previous write to complete */
- mv_read(INTERRUPT_MASK_REG(port_num));
+ rdl(mp, INTERRUPT_MASK_REG(port_num));
netif_rx_schedule(dev, &mp->napi);
}
@@ -1136,7 +1118,7 @@
* , and the required delay of the interrupt in usec.
*
* INPUT:
- * unsigned int eth_port_num Ethernet port number
+ * struct mv643xx_private *mp Ethernet port
* unsigned int t_clk t_clk of the MV-643xx chip in HZ units
* unsigned int delay Delay in usec
*
@@ -1147,15 +1129,16 @@
* The interrupt coalescing value set in the gigE port.
*
*/
-static unsigned int eth_port_set_rx_coal(unsigned int eth_port_num,
+static unsigned int eth_port_set_rx_coal(struct mv643xx_private *mp,
unsigned int t_clk, unsigned int delay)
{
+ unsigned int port_num = mp->port_num;
unsigned int coal = ((t_clk / 1000000) * delay) / 64;
/* Set RX Coalescing mechanism */
- mv_write(SDMA_CONFIG_REG(eth_port_num),
+ wrl(mp, SDMA_CONFIG_REG(port_num),
((coal & 0x3fff) << 8) |
- (mv_read(SDMA_CONFIG_REG(eth_port_num))
+ (rdl(mp, SDMA_CONFIG_REG(port_num))
& 0xffc000ff));
return coal;
@@ -1174,7 +1157,7 @@
* MV-643xx chip and the required delay in the interrupt in uSec
*
* INPUT:
- * unsigned int eth_port_num Ethernet port number
+ * struct mv643xx_private *mp Ethernet port
* unsigned int t_clk t_clk of the MV-643xx chip in HZ units
* unsigned int delay Delay in uSeconds
*
@@ -1185,13 +1168,14 @@
* The interrupt coalescing value set in the gigE port.
*
*/
-static unsigned int eth_port_set_tx_coal(unsigned int eth_port_num,
+static unsigned int eth_port_set_tx_coal(struct mv643xx_private *mp,
unsigned int t_clk, unsigned int delay)
{
- unsigned int coal;
- coal = ((t_clk / 1000000) * delay) / 64;
+ unsigned int coal = ((t_clk / 1000000) * delay) / 64;
+
/* Set TX Coalescing mechanism */
- mv_write(TX_FIFO_URGENT_THRESHOLD_REG(eth_port_num), coal << 4);
+ wrl(mp, TX_FIFO_URGENT_THRESHOLD_REG(mp->port_num), coal << 4);
+
return coal;
}
@@ -1327,16 +1311,15 @@
int err;
/* Clear any pending ethernet port interrupts */
- mv_write(INTERRUPT_CAUSE_REG(port_num), 0);
- mv_write(INTERRUPT_CAUSE_EXTEND_REG(port_num), 0);
+ wrl(mp, INTERRUPT_CAUSE_REG(port_num), 0);
+ wrl(mp, INTERRUPT_CAUSE_EXTEND_REG(port_num), 0);
/* wait for previous write to complete */
- mv_read (INTERRUPT_CAUSE_EXTEND_REG(port_num));
+ rdl(mp, INTERRUPT_CAUSE_EXTEND_REG(port_num));
err = request_irq(dev->irq, mv643xx_eth_int_handler,
IRQF_SHARED | IRQF_SAMPLE_RANDOM, dev->name, dev);
if (err) {
- printk(KERN_ERR "Can not assign IRQ number to MV643XX_eth%d\n",
- port_num);
+ printk(KERN_ERR "%s: Can not assign IRQ\n", dev->name);
return -EAGAIN;
}
@@ -1430,17 +1413,17 @@
#ifdef MV643XX_COAL
mp->rx_int_coal =
- eth_port_set_rx_coal(port_num, 133000000, MV643XX_RX_COAL);
+ eth_port_set_rx_coal(mp, 133000000, MV643XX_RX_COAL);
#endif
mp->tx_int_coal =
- eth_port_set_tx_coal(port_num, 133000000, MV643XX_TX_COAL);
+ eth_port_set_tx_coal(mp, 133000000, MV643XX_TX_COAL);
/* Unmask phy and link status changes interrupts */
- mv_write(INTERRUPT_EXTEND_MASK_REG(port_num), ETH_INT_UNMASK_ALL_EXT);
+ wrl(mp, INTERRUPT_EXTEND_MASK_REG(port_num), ETH_INT_UNMASK_ALL_EXT);
/* Unmask RX buffer and TX end interrupt */
- mv_write(INTERRUPT_MASK_REG(port_num), ETH_INT_UNMASK_ALL);
+ wrl(mp, INTERRUPT_MASK_REG(port_num), ETH_INT_UNMASK_ALL);
return 0;
@@ -1459,7 +1442,7 @@
struct mv643xx_private *mp = netdev_priv(dev);
/* Stop Tx Queues */
- mv643xx_eth_port_disable_tx(mp->port_num);
+ mv643xx_eth_port_disable_tx(mp);
/* Free outstanding skb's on TX ring */
mv643xx_eth_free_all_tx_descs(dev);
@@ -1477,11 +1460,10 @@
static void mv643xx_eth_free_rx_rings(struct net_device *dev)
{
struct mv643xx_private *mp = netdev_priv(dev);
- unsigned int port_num = mp->port_num;
int curr;
/* Stop RX Queues */
- mv643xx_eth_port_disable_rx(port_num);
+ mv643xx_eth_port_disable_rx(mp);
/* Free preallocated skb's on RX rings */
for (curr = 0; mp->rx_desc_count && curr < mp->rx_ring_size; curr++) {
@@ -1520,9 +1502,9 @@
unsigned int port_num = mp->port_num;
/* Mask all interrupts on ethernet port */
- mv_write(INTERRUPT_MASK_REG(port_num), ETH_INT_MASK_ALL);
+ wrl(mp, INTERRUPT_MASK_REG(port_num), ETH_INT_MASK_ALL);
/* wait for previous write to complete */
- mv_read(INTERRUPT_MASK_REG(port_num));
+ rdl(mp, INTERRUPT_MASK_REG(port_num));
#ifdef MV643XX_NAPI
napi_disable(&mp->napi);
@@ -1530,7 +1512,7 @@
netif_carrier_off(dev);
netif_stop_queue(dev);
- eth_port_reset(mp->port_num);
+ eth_port_reset(mp);
mv643xx_eth_free_tx_rings(dev);
mv643xx_eth_free_rx_rings(dev);
@@ -1561,15 +1543,15 @@
#endif
work_done = 0;
- if ((mv_read(RX_CURRENT_QUEUE_DESC_PTR_0(port_num)))
+ if ((rdl(mp, RX_CURRENT_QUEUE_DESC_PTR_0(port_num)))
!= (u32) mp->rx_used_desc_q)
work_done = mv643xx_eth_receive_queue(dev, budget);
if (work_done < budget) {
netif_rx_complete(dev, napi);
- mv_write(INTERRUPT_CAUSE_REG(port_num), 0);
- mv_write(INTERRUPT_CAUSE_EXTEND_REG(port_num), 0);
- mv_write(INTERRUPT_MASK_REG(port_num), ETH_INT_UNMASK_ALL);
+ wrl(mp, INTERRUPT_CAUSE_REG(port_num), 0);
+ wrl(mp, INTERRUPT_CAUSE_EXTEND_REG(port_num), 0);
+ wrl(mp, INTERRUPT_MASK_REG(port_num), ETH_INT_UNMASK_ALL);
}
return work_done;
@@ -1723,7 +1705,7 @@
/* ensure all descriptors are written before poking hardware */
wmb();
- mv643xx_eth_port_enable_tx(mp->port_num, ETH_TX_QUEUES_ENABLED);
+ mv643xx_eth_port_enable_tx(mp, ETH_TX_QUEUES_ENABLED);
mp->tx_desc_count += nr_frags + 1;
}
@@ -1739,25 +1721,23 @@
unsigned long flags;
BUG_ON(netif_queue_stopped(dev));
- BUG_ON(skb == NULL);
+
+ if (has_tiny_unaligned_frags(skb) && __skb_linearize(skb)) {
+ stats->tx_dropped++;
+ printk(KERN_DEBUG "%s: failed to linearize tiny "
+ "unaligned fragment\n", dev->name);
+ return NETDEV_TX_BUSY;
+ }
+
+ spin_lock_irqsave(&mp->lock, flags);
if (mp->tx_ring_size - mp->tx_desc_count < MAX_DESCS_PER_SKB) {
printk(KERN_ERR "%s: transmit with queue full\n", dev->name);
netif_stop_queue(dev);
- return 1;
+ spin_unlock_irqrestore(&mp->lock, flags);
+ return NETDEV_TX_BUSY;
}
- if (has_tiny_unaligned_frags(skb)) {
- if (__skb_linearize(skb)) {
- stats->tx_dropped++;
- printk(KERN_DEBUG "%s: failed to linearize tiny "
- "unaligned fragment\n", dev->name);
- return 1;
- }
- }
-
- spin_lock_irqsave(&mp->lock, flags);
-
eth_tx_submit_descs_for_skb(mp, skb);
stats->tx_bytes += skb->len;
stats->tx_packets++;
@@ -1768,7 +1748,7 @@
spin_unlock_irqrestore(&mp->lock, flags);
- return 0; /* success */
+ return NETDEV_TX_OK;
}
#ifdef CONFIG_NET_POLL_CONTROLLER
@@ -1777,13 +1757,13 @@
struct mv643xx_private *mp = netdev_priv(netdev);
int port_num = mp->port_num;
- mv_write(INTERRUPT_MASK_REG(port_num), ETH_INT_MASK_ALL);
+ wrl(mp, INTERRUPT_MASK_REG(port_num), ETH_INT_MASK_ALL);
/* wait for previous write to complete */
- mv_read(INTERRUPT_MASK_REG(port_num));
+ rdl(mp, INTERRUPT_MASK_REG(port_num));
mv643xx_eth_int_handler(netdev->irq, netdev);
- mv_write(INTERRUPT_MASK_REG(port_num), ETH_INT_UNMASK_ALL);
+ wrl(mp, INTERRUPT_MASK_REG(port_num), ETH_INT_UNMASK_ALL);
}
#endif
@@ -1900,7 +1880,7 @@
port_num = mp->port_num = pd->port_number;
/* set default config values */
- eth_port_uc_addr_get(port_num, dev->dev_addr);
+ eth_port_uc_addr_get(mp, dev->dev_addr);
mp->rx_ring_size = PORT_DEFAULT_RECEIVE_QUEUE_SIZE;
mp->tx_ring_size = PORT_DEFAULT_TRANSMIT_QUEUE_SIZE;
@@ -1908,7 +1888,7 @@
memcpy(dev->dev_addr, pd->mac_addr, 6);
if (pd->phy_addr || pd->force_phy_addr)
- ethernet_phy_set(port_num, pd->phy_addr);
+ ethernet_phy_set(mp, pd->phy_addr);
if (pd->rx_queue_size)
mp->rx_ring_size = pd->rx_queue_size;
@@ -1933,19 +1913,18 @@
mp->mii.dev = dev;
mp->mii.mdio_read = mv643xx_mdio_read;
mp->mii.mdio_write = mv643xx_mdio_write;
- mp->mii.phy_id = ethernet_phy_get(port_num);
+ mp->mii.phy_id = ethernet_phy_get(mp);
mp->mii.phy_id_mask = 0x3f;
mp->mii.reg_num_mask = 0x1f;
- err = ethernet_phy_detect(port_num);
+ err = ethernet_phy_detect(mp);
if (err) {
- pr_debug("MV643xx ethernet port %d: "
- "No PHY detected at addr %d\n",
- port_num, ethernet_phy_get(port_num));
+ pr_debug("%s: No PHY detected at addr %d\n",
+ dev->name, ethernet_phy_get(mp));
goto out;
}
- ethernet_phy_reset(port_num);
+ ethernet_phy_reset(mp);
mp->mii.supports_gmii = mii_check_gmii_support(&mp->mii);
mv643xx_init_ethtool_cmd(dev, mp->mii.phy_id, speed, duplex, &cmd);
mv643xx_eth_update_pscr(dev, &cmd);
@@ -2006,9 +1985,11 @@
static int mv643xx_eth_shared_probe(struct platform_device *pdev)
{
+ static int mv643xx_version_printed = 0;
struct resource *res;
- printk(KERN_NOTICE "MV-643xx 10/100/1000 Ethernet Driver\n");
+ if (!mv643xx_version_printed++)
+ printk(KERN_NOTICE "MV-643xx 10/100/1000 Ethernet Driver\n");
res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
if (res == NULL)
@@ -2037,10 +2018,10 @@
unsigned int port_num = mp->port_num;
/* Mask all interrupts on ethernet port */
- mv_write(INTERRUPT_MASK_REG(port_num), 0);
- mv_read (INTERRUPT_MASK_REG(port_num));
+ wrl(mp, INTERRUPT_MASK_REG(port_num), 0);
+ rdl(mp, INTERRUPT_MASK_REG(port_num));
- eth_port_reset(port_num);
+ eth_port_reset(mp);
}
static struct platform_driver mv643xx_eth_driver = {
@@ -2229,12 +2210,9 @@
* return_info Tx/Rx user resource return information.
*/
-/* PHY routines */
-static int ethernet_phy_get(unsigned int eth_port_num);
-static void ethernet_phy_set(unsigned int eth_port_num, int phy_addr);
-
/* Ethernet Port routines */
-static void eth_port_set_filter_table_entry(int table, unsigned char entry);
+static void eth_port_set_filter_table_entry(struct mv643xx_private *mp,
+ int table, unsigned char entry);
/*
* eth_port_init - Initialize the Ethernet port driver
@@ -2264,9 +2242,9 @@
{
mp->rx_resource_err = 0;
- eth_port_reset(mp->port_num);
+ eth_port_reset(mp);
- eth_port_init_mac_tables(mp->port_num);
+ eth_port_init_mac_tables(mp);
}
/*
@@ -2306,28 +2284,28 @@
/* Assignment of Tx CTRP of given queue */
tx_curr_desc = mp->tx_curr_desc_q;
- mv_write(TX_CURRENT_QUEUE_DESC_PTR_0(port_num),
+ wrl(mp, TX_CURRENT_QUEUE_DESC_PTR_0(port_num),
(u32)((struct eth_tx_desc *)mp->tx_desc_dma + tx_curr_desc));
/* Assignment of Rx CRDP of given queue */
rx_curr_desc = mp->rx_curr_desc_q;
- mv_write(RX_CURRENT_QUEUE_DESC_PTR_0(port_num),
+ wrl(mp, RX_CURRENT_QUEUE_DESC_PTR_0(port_num),
(u32)((struct eth_rx_desc *)mp->rx_desc_dma + rx_curr_desc));
/* Add the assigned Ethernet address to the port's address table */
- eth_port_uc_addr_set(port_num, dev->dev_addr);
+ eth_port_uc_addr_set(mp, dev->dev_addr);
/* Assign port configuration and command. */
- mv_write(PORT_CONFIG_REG(port_num),
+ wrl(mp, PORT_CONFIG_REG(port_num),
PORT_CONFIG_DEFAULT_VALUE);
- mv_write(PORT_CONFIG_EXTEND_REG(port_num),
+ wrl(mp, PORT_CONFIG_EXTEND_REG(port_num),
PORT_CONFIG_EXTEND_DEFAULT_VALUE);
- pscr = mv_read(PORT_SERIAL_CONTROL_REG(port_num));
+ pscr = rdl(mp, PORT_SERIAL_CONTROL_REG(port_num));
pscr &= ~(SERIAL_PORT_ENABLE | FORCE_LINK_PASS);
- mv_write(PORT_SERIAL_CONTROL_REG(port_num), pscr);
+ wrl(mp, PORT_SERIAL_CONTROL_REG(port_num), pscr);
pscr |= DISABLE_AUTO_NEG_FOR_FLOW_CTRL |
DISABLE_AUTO_NEG_SPEED_GMII |
@@ -2335,32 +2313,34 @@
DO_NOT_FORCE_LINK_FAIL |
SERIAL_PORT_CONTROL_RESERVED;
- mv_write(PORT_SERIAL_CONTROL_REG(port_num), pscr);
+ wrl(mp, PORT_SERIAL_CONTROL_REG(port_num), pscr);
pscr |= SERIAL_PORT_ENABLE;
- mv_write(PORT_SERIAL_CONTROL_REG(port_num), pscr);
+ wrl(mp, PORT_SERIAL_CONTROL_REG(port_num), pscr);
/* Assign port SDMA configuration */
- mv_write(SDMA_CONFIG_REG(port_num),
+ wrl(mp, SDMA_CONFIG_REG(port_num),
PORT_SDMA_CONFIG_DEFAULT_VALUE);
/* Enable port Rx. */
- mv643xx_eth_port_enable_rx(port_num, ETH_RX_QUEUES_ENABLED);
+ mv643xx_eth_port_enable_rx(mp, ETH_RX_QUEUES_ENABLED);
/* Disable port bandwidth limits by clearing MTU register */
- mv_write(MAXIMUM_TRANSMIT_UNIT(port_num), 0);
+ wrl(mp, MAXIMUM_TRANSMIT_UNIT(port_num), 0);
/* save phy settings across reset */
mv643xx_get_settings(dev, ðtool_cmd);
- ethernet_phy_reset(mp->port_num);
+ ethernet_phy_reset(mp);
mv643xx_set_settings(dev, ðtool_cmd);
}
/*
* eth_port_uc_addr_set - Write a MAC address into the port's hw registers
*/
-static void eth_port_uc_addr_set(unsigned int port_num, unsigned char *p_addr)
+static void eth_port_uc_addr_set(struct mv643xx_private *mp,
+ unsigned char *p_addr)
{
+ unsigned int port_num = mp->port_num;
unsigned int mac_h;
unsigned int mac_l;
int table;
@@ -2369,24 +2349,26 @@
mac_h = (p_addr[0] << 24) | (p_addr[1] << 16) | (p_addr[2] << 8) |
(p_addr[3] << 0);
- mv_write(MAC_ADDR_LOW(port_num), mac_l);
- mv_write(MAC_ADDR_HIGH(port_num), mac_h);
+ wrl(mp, MAC_ADDR_LOW(port_num), mac_l);
+ wrl(mp, MAC_ADDR_HIGH(port_num), mac_h);
/* Accept frames with this address */
table = DA_FILTER_UNICAST_TABLE_BASE(port_num);
- eth_port_set_filter_table_entry(table, p_addr[5] & 0x0f);
+ eth_port_set_filter_table_entry(mp, table, p_addr[5] & 0x0f);
}
/*
* eth_port_uc_addr_get - Read the MAC address from the port's hw registers
*/
-static void eth_port_uc_addr_get(unsigned int port_num, unsigned char *p_addr)
+static void eth_port_uc_addr_get(struct mv643xx_private *mp,
+ unsigned char *p_addr)
{
+ unsigned int port_num = mp->port_num;
unsigned int mac_h;
unsigned int mac_l;
- mac_h = mv_read(MAC_ADDR_HIGH(port_num));
- mac_l = mv_read(MAC_ADDR_LOW(port_num));
+ mac_h = rdl(mp, MAC_ADDR_HIGH(port_num));
+ mac_l = rdl(mp, MAC_ADDR_LOW(port_num));
p_addr[0] = (mac_h >> 24) & 0xff;
p_addr[1] = (mac_h >> 16) & 0xff;
@@ -2405,7 +2387,8 @@
* 3-1 Queue (ETH_Q0=0)
* 7-4 Reserved = 0;
*/
-static void eth_port_set_filter_table_entry(int table, unsigned char entry)
+static void eth_port_set_filter_table_entry(struct mv643xx_private *mp,
+ int table, unsigned char entry)
{
unsigned int table_reg;
unsigned int tbl_offset;
@@ -2415,9 +2398,9 @@
reg_offset = entry % 4; /* Entry offset within the register */
/* Set "accepts frame bit" at specified table entry */
- table_reg = mv_read(table + tbl_offset);
+ table_reg = rdl(mp, table + tbl_offset);
table_reg |= 0x01 << (8 * reg_offset);
- mv_write(table + tbl_offset, table_reg);
+ wrl(mp, table + tbl_offset, table_reg);
}
/*
@@ -2434,8 +2417,9 @@
* In either case, eth_port_set_filter_table_entry() is then called
* to set to set the actual table entry.
*/
-static void eth_port_mc_addr(unsigned int eth_port_num, unsigned char *p_addr)
+static void eth_port_mc_addr(struct mv643xx_private *mp, unsigned char *p_addr)
{
+ unsigned int port_num = mp->port_num;
unsigned int mac_h;
unsigned int mac_l;
unsigned char crc_result = 0;
@@ -2446,9 +2430,8 @@
if ((p_addr[0] == 0x01) && (p_addr[1] == 0x00) &&
(p_addr[2] == 0x5E) && (p_addr[3] == 0x00) && (p_addr[4] == 0x00)) {
- table = DA_FILTER_SPECIAL_MULTICAST_TABLE_BASE
- (eth_port_num);
- eth_port_set_filter_table_entry(table, p_addr[5]);
+ table = DA_FILTER_SPECIAL_MULTICAST_TABLE_BASE(port_num);
+ eth_port_set_filter_table_entry(mp, table, p_addr[5]);
return;
}
@@ -2520,8 +2503,8 @@
for (i = 0; i < 8; i++)
crc_result = crc_result | (crc[i] << i);
- table = DA_FILTER_OTHER_MULTICAST_TABLE_BASE(eth_port_num);
- eth_port_set_filter_table_entry(table, crc_result);
+ table = DA_FILTER_OTHER_MULTICAST_TABLE_BASE(port_num);
+ eth_port_set_filter_table_entry(mp, table, crc_result);
}
/*
@@ -2550,7 +2533,7 @@
* 3-1 Queue ETH_Q0=0
* 7-4 Reserved = 0;
*/
- mv_write(DA_FILTER_SPECIAL_MULTICAST_TABLE_BASE(eth_port_num) + table_index, 0x01010101);
+ wrl(mp, DA_FILTER_SPECIAL_MULTICAST_TABLE_BASE(eth_port_num) + table_index, 0x01010101);
/* Set all entries in DA filter other multicast
* table (Ex_dFOMT)
@@ -2560,7 +2543,7 @@
* 3-1 Queue ETH_Q0=0
* 7-4 Reserved = 0;
*/
- mv_write(DA_FILTER_OTHER_MULTICAST_TABLE_BASE(eth_port_num) + table_index, 0x01010101);
+ wrl(mp, DA_FILTER_OTHER_MULTICAST_TABLE_BASE(eth_port_num) + table_index, 0x01010101);
}
return;
}
@@ -2570,11 +2553,11 @@
*/
for (table_index = 0; table_index <= 0xFC; table_index += 4) {
/* Clear DA filter special multicast table (Ex_dFSMT) */
- mv_write(DA_FILTER_SPECIAL_MULTICAST_TABLE_BASE
+ wrl(mp, DA_FILTER_SPECIAL_MULTICAST_TABLE_BASE
(eth_port_num) + table_index, 0);
/* Clear DA filter other multicast table (Ex_dFOMT) */
- mv_write(DA_FILTER_OTHER_MULTICAST_TABLE_BASE
+ wrl(mp, DA_FILTER_OTHER_MULTICAST_TABLE_BASE
(eth_port_num) + table_index, 0);
}
@@ -2583,7 +2566,7 @@
(i < 256) && (mc_list != NULL) && (i < dev->mc_count);
i++, mc_list = mc_list->next)
if (mc_list->dmi_addrlen == 6)
- eth_port_mc_addr(eth_port_num, mc_list->dmi_addr);
+ eth_port_mc_addr(mp, mc_list->dmi_addr);
}
/*
@@ -2594,7 +2577,7 @@
* Other Multicast) and set each entry to 0.
*
* INPUT:
- * unsigned int eth_port_num Ethernet Port number.
+ * struct mv643xx_private *mp Ethernet Port.
*
* OUTPUT:
* Multicast and Unicast packets are rejected.
@@ -2602,22 +2585,23 @@
* RETURN:
* None.
*/
-static void eth_port_init_mac_tables(unsigned int eth_port_num)
+static void eth_port_init_mac_tables(struct mv643xx_private *mp)
{
+ unsigned int port_num = mp->port_num;
int table_index;
/* Clear DA filter unicast table (Ex_dFUT) */
for (table_index = 0; table_index <= 0xC; table_index += 4)
- mv_write(DA_FILTER_UNICAST_TABLE_BASE
- (eth_port_num) + table_index, 0);
+ wrl(mp, DA_FILTER_UNICAST_TABLE_BASE(port_num) +
+ table_index, 0);
for (table_index = 0; table_index <= 0xFC; table_index += 4) {
/* Clear DA filter special multicast table (Ex_dFSMT) */
- mv_write(DA_FILTER_SPECIAL_MULTICAST_TABLE_BASE
- (eth_port_num) + table_index, 0);
+ wrl(mp, DA_FILTER_SPECIAL_MULTICAST_TABLE_BASE(port_num) +
+ table_index, 0);
/* Clear DA filter other multicast table (Ex_dFOMT) */
- mv_write(DA_FILTER_OTHER_MULTICAST_TABLE_BASE
- (eth_port_num) + table_index, 0);
+ wrl(mp, DA_FILTER_OTHER_MULTICAST_TABLE_BASE(port_num) +
+ table_index, 0);
}
}
@@ -2629,7 +2613,7 @@
* A read from the MIB counter will reset the counter.
*
* INPUT:
- * unsigned int eth_port_num Ethernet Port number.
+ * struct mv643xx_private *mp Ethernet Port.
*
* OUTPUT:
* After reading all MIB counters, the counters resets.
@@ -2638,19 +2622,20 @@
* MIB counter value.
*
*/
-static void eth_clear_mib_counters(unsigned int eth_port_num)
+static void eth_clear_mib_counters(struct mv643xx_private *mp)
{
+ unsigned int port_num = mp->port_num;
int i;
/* Perform dummy reads from MIB counters */
for (i = ETH_MIB_GOOD_OCTETS_RECEIVED_LOW; i < ETH_MIB_LATE_COLLISION;
i += 4)
- mv_read(MIB_COUNTERS_BASE(eth_port_num) + i);
+ rdl(mp, MIB_COUNTERS_BASE(port_num) + i);
}
static inline u32 read_mib(struct mv643xx_private *mp, int offset)
{
- return mv_read(MIB_COUNTERS_BASE(mp->port_num) + offset);
+ return rdl(mp, MIB_COUNTERS_BASE(mp->port_num) + offset);
}
static void eth_update_mib_counters(struct mv643xx_private *mp)
@@ -2686,7 +2671,7 @@
* the specified port.
*
* INPUT:
- * unsigned int eth_port_num Ethernet Port number.
+ * struct mv643xx_private *mp Ethernet Port.
*
* OUTPUT:
* None
@@ -2696,22 +2681,22 @@
* -ENODEV on failure
*
*/
-static int ethernet_phy_detect(unsigned int port_num)
+static int ethernet_phy_detect(struct mv643xx_private *mp)
{
unsigned int phy_reg_data0;
int auto_neg;
- eth_port_read_smi_reg(port_num, 0, &phy_reg_data0);
+ eth_port_read_smi_reg(mp, 0, &phy_reg_data0);
auto_neg = phy_reg_data0 & 0x1000;
phy_reg_data0 ^= 0x1000; /* invert auto_neg */
- eth_port_write_smi_reg(port_num, 0, phy_reg_data0);
+ eth_port_write_smi_reg(mp, 0, phy_reg_data0);
- eth_port_read_smi_reg(port_num, 0, &phy_reg_data0);
+ eth_port_read_smi_reg(mp, 0, &phy_reg_data0);
if ((phy_reg_data0 & 0x1000) == auto_neg)
return -ENODEV; /* change didn't take */
phy_reg_data0 ^= 0x1000;
- eth_port_write_smi_reg(port_num, 0, phy_reg_data0);
+ eth_port_write_smi_reg(mp, 0, phy_reg_data0);
return 0;
}
@@ -2722,7 +2707,7 @@
* This routine returns the given ethernet port PHY address.
*
* INPUT:
- * unsigned int eth_port_num Ethernet Port number.
+ * struct mv643xx_private *mp Ethernet Port.
*
* OUTPUT:
* None.
@@ -2731,13 +2716,13 @@
* PHY address.
*
*/
-static int ethernet_phy_get(unsigned int eth_port_num)
+static int ethernet_phy_get(struct mv643xx_private *mp)
{
unsigned int reg_data;
- reg_data = mv_read(PHY_ADDR_REG);
+ reg_data = rdl(mp, PHY_ADDR_REG);
- return ((reg_data >> (5 * eth_port_num)) & 0x1f);
+ return ((reg_data >> (5 * mp->port_num)) & 0x1f);
}
/*
@@ -2747,7 +2732,7 @@
* This routine sets the given ethernet port PHY address.
*
* INPUT:
- * unsigned int eth_port_num Ethernet Port number.
+ * struct mv643xx_private *mp Ethernet Port.
* int phy_addr PHY address.
*
* OUTPUT:
@@ -2757,15 +2742,15 @@
* None.
*
*/
-static void ethernet_phy_set(unsigned int eth_port_num, int phy_addr)
+static void ethernet_phy_set(struct mv643xx_private *mp, int phy_addr)
{
u32 reg_data;
- int addr_shift = 5 * eth_port_num;
+ int addr_shift = 5 * mp->port_num;
- reg_data = mv_read(PHY_ADDR_REG);
+ reg_data = rdl(mp, PHY_ADDR_REG);
reg_data &= ~(0x1f << addr_shift);
reg_data |= (phy_addr & 0x1f) << addr_shift;
- mv_write(PHY_ADDR_REG, reg_data);
+ wrl(mp, PHY_ADDR_REG, reg_data);
}
/*
@@ -2775,7 +2760,7 @@
* This routine utilizes the SMI interface to reset the ethernet port PHY.
*
* INPUT:
- * unsigned int eth_port_num Ethernet Port number.
+ * struct mv643xx_private *mp Ethernet Port.
*
* OUTPUT:
* The PHY is reset.
@@ -2784,51 +2769,52 @@
* None.
*
*/
-static void ethernet_phy_reset(unsigned int eth_port_num)
+static void ethernet_phy_reset(struct mv643xx_private *mp)
{
unsigned int phy_reg_data;
/* Reset the PHY */
- eth_port_read_smi_reg(eth_port_num, 0, &phy_reg_data);
+ eth_port_read_smi_reg(mp, 0, &phy_reg_data);
phy_reg_data |= 0x8000; /* Set bit 15 to reset the PHY */
- eth_port_write_smi_reg(eth_port_num, 0, phy_reg_data);
+ eth_port_write_smi_reg(mp, 0, phy_reg_data);
/* wait for PHY to come out of reset */
do {
udelay(1);
- eth_port_read_smi_reg(eth_port_num, 0, &phy_reg_data);
+ eth_port_read_smi_reg(mp, 0, &phy_reg_data);
} while (phy_reg_data & 0x8000);
}
-static void mv643xx_eth_port_enable_tx(unsigned int port_num,
+static void mv643xx_eth_port_enable_tx(struct mv643xx_private *mp,
unsigned int queues)
{
- mv_write(TRANSMIT_QUEUE_COMMAND_REG(port_num), queues);
+ wrl(mp, TRANSMIT_QUEUE_COMMAND_REG(mp->port_num), queues);
}
-static void mv643xx_eth_port_enable_rx(unsigned int port_num,
+static void mv643xx_eth_port_enable_rx(struct mv643xx_private *mp,
unsigned int queues)
{
- mv_write(RECEIVE_QUEUE_COMMAND_REG(port_num), queues);
+ wrl(mp, RECEIVE_QUEUE_COMMAND_REG(mp->port_num), queues);
}
-static unsigned int mv643xx_eth_port_disable_tx(unsigned int port_num)
+static unsigned int mv643xx_eth_port_disable_tx(struct mv643xx_private *mp)
{
+ unsigned int port_num = mp->port_num;
u32 queues;
/* Stop Tx port activity. Check port Tx activity. */
- queues = mv_read(TRANSMIT_QUEUE_COMMAND_REG(port_num)) & 0xFF;
+ queues = rdl(mp, TRANSMIT_QUEUE_COMMAND_REG(port_num)) & 0xFF;
if (queues) {
/* Issue stop command for active queues only */
- mv_write(TRANSMIT_QUEUE_COMMAND_REG(port_num), (queues << 8));
+ wrl(mp, TRANSMIT_QUEUE_COMMAND_REG(port_num), (queues << 8));
/* Wait for all Tx activity to terminate. */
/* Check port cause register that all Tx queues are stopped */
- while (mv_read(TRANSMIT_QUEUE_COMMAND_REG(port_num)) & 0xFF)
+ while (rdl(mp, TRANSMIT_QUEUE_COMMAND_REG(port_num)) & 0xFF)
udelay(PHY_WAIT_MICRO_SECONDS);
/* Wait for Tx FIFO to empty */
- while (mv_read(PORT_STATUS_REG(port_num)) &
+ while (rdl(mp, PORT_STATUS_REG(port_num)) &
ETH_PORT_TX_FIFO_EMPTY)
udelay(PHY_WAIT_MICRO_SECONDS);
}
@@ -2836,19 +2822,20 @@
return queues;
}
-static unsigned int mv643xx_eth_port_disable_rx(unsigned int port_num)
+static unsigned int mv643xx_eth_port_disable_rx(struct mv643xx_private *mp)
{
+ unsigned int port_num = mp->port_num;
u32 queues;
/* Stop Rx port activity. Check port Rx activity. */
- queues = mv_read(RECEIVE_QUEUE_COMMAND_REG(port_num)) & 0xFF;
+ queues = rdl(mp, RECEIVE_QUEUE_COMMAND_REG(port_num)) & 0xFF;
if (queues) {
/* Issue stop command for active queues only */
- mv_write(RECEIVE_QUEUE_COMMAND_REG(port_num), (queues << 8));
+ wrl(mp, RECEIVE_QUEUE_COMMAND_REG(port_num), (queues << 8));
/* Wait for all Rx activity to terminate. */
/* Check port cause register that all Rx queues are stopped */
- while (mv_read(RECEIVE_QUEUE_COMMAND_REG(port_num)) & 0xFF)
+ while (rdl(mp, RECEIVE_QUEUE_COMMAND_REG(port_num)) & 0xFF)
udelay(PHY_WAIT_MICRO_SECONDS);
}
@@ -2864,7 +2851,7 @@
* idle state after this command is performed and the port is disabled.
*
* INPUT:
- * unsigned int eth_port_num Ethernet Port number.
+ * struct mv643xx_private *mp Ethernet Port.
*
* OUTPUT:
* Channel activity is halted.
@@ -2873,22 +2860,23 @@
* None.
*
*/
-static void eth_port_reset(unsigned int port_num)
+static void eth_port_reset(struct mv643xx_private *mp)
{
+ unsigned int port_num = mp->port_num;
unsigned int reg_data;
- mv643xx_eth_port_disable_tx(port_num);
- mv643xx_eth_port_disable_rx(port_num);
+ mv643xx_eth_port_disable_tx(mp);
+ mv643xx_eth_port_disable_rx(mp);
/* Clear all MIB counters */
- eth_clear_mib_counters(port_num);
+ eth_clear_mib_counters(mp);
/* Reset the Enable bit in the Configuration Register */
- reg_data = mv_read(PORT_SERIAL_CONTROL_REG(port_num));
+ reg_data = rdl(mp, PORT_SERIAL_CONTROL_REG(port_num));
reg_data &= ~(SERIAL_PORT_ENABLE |
DO_NOT_FORCE_LINK_FAIL |
FORCE_LINK_PASS);
- mv_write(PORT_SERIAL_CONTROL_REG(port_num), reg_data);
+ wrl(mp, PORT_SERIAL_CONTROL_REG(port_num), reg_data);
}
@@ -2900,7 +2888,7 @@
* order to perform PHY register read.
*
* INPUT:
- * unsigned int port_num Ethernet Port number.
+ * struct mv643xx_private *mp Ethernet Port.
* unsigned int phy_reg PHY register address offset.
* unsigned int *value Register value buffer.
*
@@ -2912,10 +2900,10 @@
* true otherwise.
*
*/
-static void eth_port_read_smi_reg(unsigned int port_num,
+static void eth_port_read_smi_reg(struct mv643xx_private *mp,
unsigned int phy_reg, unsigned int *value)
{
- int phy_addr = ethernet_phy_get(port_num);
+ int phy_addr = ethernet_phy_get(mp);
unsigned long flags;
int i;
@@ -2923,27 +2911,27 @@
spin_lock_irqsave(&mv643xx_eth_phy_lock, flags);
/* wait for the SMI register to become available */
- for (i = 0; mv_read(SMI_REG) & ETH_SMI_BUSY; i++) {
+ for (i = 0; rdl(mp, SMI_REG) & ETH_SMI_BUSY; i++) {
if (i == PHY_WAIT_ITERATIONS) {
- printk("mv643xx PHY busy timeout, port %d\n", port_num);
+ printk("%s: PHY busy timeout\n", mp->dev->name);
goto out;
}
udelay(PHY_WAIT_MICRO_SECONDS);
}
- mv_write(SMI_REG,
+ wrl(mp, SMI_REG,
(phy_addr << 16) | (phy_reg << 21) | ETH_SMI_OPCODE_READ);
/* now wait for the data to be valid */
- for (i = 0; !(mv_read(SMI_REG) & ETH_SMI_READ_VALID); i++) {
+ for (i = 0; !(rdl(mp, SMI_REG) & ETH_SMI_READ_VALID); i++) {
if (i == PHY_WAIT_ITERATIONS) {
- printk("mv643xx PHY read timeout, port %d\n", port_num);
+ printk("%s: PHY read timeout\n", mp->dev->name);
goto out;
}
udelay(PHY_WAIT_MICRO_SECONDS);
}
- *value = mv_read(SMI_REG) & 0xffff;
+ *value = rdl(mp, SMI_REG) & 0xffff;
out:
spin_unlock_irqrestore(&mv643xx_eth_phy_lock, flags);
}
@@ -2956,7 +2944,7 @@
* order to perform writes to PHY registers.
*
* INPUT:
- * unsigned int eth_port_num Ethernet Port number.
+ * struct mv643xx_private *mp Ethernet Port.
* unsigned int phy_reg PHY register address offset.
* unsigned int value Register value.
*
@@ -2968,29 +2956,28 @@
* true otherwise.
*
*/
-static void eth_port_write_smi_reg(unsigned int eth_port_num,
+static void eth_port_write_smi_reg(struct mv643xx_private *mp,
unsigned int phy_reg, unsigned int value)
{
int phy_addr;
int i;
unsigned long flags;
- phy_addr = ethernet_phy_get(eth_port_num);
+ phy_addr = ethernet_phy_get(mp);
/* the SMI register is a shared resource */
spin_lock_irqsave(&mv643xx_eth_phy_lock, flags);
/* wait for the SMI register to become available */
- for (i = 0; mv_read(SMI_REG) & ETH_SMI_BUSY; i++) {
+ for (i = 0; rdl(mp, SMI_REG) & ETH_SMI_BUSY; i++) {
if (i == PHY_WAIT_ITERATIONS) {
- printk("mv643xx PHY busy timeout, port %d\n",
- eth_port_num);
+ printk("%s: PHY busy timeout\n", mp->dev->name);
goto out;
}
udelay(PHY_WAIT_MICRO_SECONDS);
}
- mv_write(SMI_REG, (phy_addr << 16) | (phy_reg << 21) |
+ wrl(mp, SMI_REG, (phy_addr << 16) | (phy_reg << 21) |
ETH_SMI_OPCODE_WRITE | (value & 0xffff));
out:
spin_unlock_irqrestore(&mv643xx_eth_phy_lock, flags);
@@ -3001,17 +2988,17 @@
*/
static int mv643xx_mdio_read(struct net_device *dev, int phy_id, int location)
{
- int val;
struct mv643xx_private *mp = netdev_priv(dev);
+ int val;
- eth_port_read_smi_reg(mp->port_num, location, &val);
+ eth_port_read_smi_reg(mp, location, &val);
return val;
}
static void mv643xx_mdio_write(struct net_device *dev, int phy_id, int location, int val)
{
struct mv643xx_private *mp = netdev_priv(dev);
- eth_port_write_smi_reg(mp->port_num, location, val);
+ eth_port_write_smi_reg(mp, location, val);
}
/*
diff --git a/drivers/net/natsemi.c b/drivers/net/natsemi.c
index 900ab5d..46119bb 100644
--- a/drivers/net/natsemi.c
+++ b/drivers/net/natsemi.c
@@ -786,7 +786,8 @@
struct netdev_private *np;
int i, option, irq, chip_idx = ent->driver_data;
static int find_cnt = -1;
- unsigned long iostart, iosize;
+ resource_size_t iostart;
+ unsigned long iosize;
void __iomem *ioaddr;
const int pcibar = 1; /* PCI base address register */
int prev_eedata;
@@ -946,10 +947,11 @@
goto err_create_file;
if (netif_msg_drv(np)) {
- printk(KERN_INFO "natsemi %s: %s at %#08lx "
+ printk(KERN_INFO "natsemi %s: %s at %#08llx "
"(%s), %s, IRQ %d",
- dev->name, natsemi_pci_info[chip_idx].name, iostart,
- pci_name(np->pci_dev), print_mac(mac, dev->dev_addr), irq);
+ dev->name, natsemi_pci_info[chip_idx].name,
+ (unsigned long long)iostart, pci_name(np->pci_dev),
+ print_mac(mac, dev->dev_addr), irq);
if (dev->if_port == PORT_TP)
printk(", port TP.\n");
else if (np->ignore_phy)
diff --git a/drivers/net/netxen/netxen_nic.h b/drivers/net/netxen/netxen_nic.h
index 7f20a03..8cb29f5 100644
--- a/drivers/net/netxen/netxen_nic.h
+++ b/drivers/net/netxen/netxen_nic.h
@@ -95,23 +95,6 @@
#define ADDR_IN_WINDOW1(off) \
((off > NETXEN_CRB_PCIX_HOST2) && (off < NETXEN_CRB_MAX)) ? 1 : 0
-/*
- * In netxen_nic_down(), we must wait for any pending callback requests into
- * netxen_watchdog_task() to complete; eg otherwise the watchdog_timer could be
- * reenabled right after it is deleted in netxen_nic_down(). FLUSH_SCHEDULED_WORK()
- * does this synchronization.
- *
- * Normally, schedule_work()/flush_scheduled_work() could have worked, but
- * netxen_nic_close() is invoked with kernel rtnl lock held. netif_carrier_off()
- * call in netxen_nic_close() triggers a schedule_work(&linkwatch_work), and a
- * subsequent call to flush_scheduled_work() in netxen_nic_down() would cause
- * linkwatch_event() to be executed which also attempts to acquire the rtnl
- * lock thus causing a deadlock.
- */
-
-#define SCHEDULE_WORK(tp) queue_work(netxen_workq, tp)
-#define FLUSH_SCHEDULED_WORK() flush_workqueue(netxen_workq)
-extern struct workqueue_struct *netxen_workq;
/*
* normalize a 64MB crb address to 32MB PCI window
@@ -1050,7 +1033,6 @@
int netxen_rom_se(struct netxen_adapter *adapter, int addr);
/* Functions from netxen_nic_isr.c */
-int netxen_nic_link_ok(struct netxen_adapter *adapter);
void netxen_initialize_adapter_sw(struct netxen_adapter *adapter);
void netxen_initialize_adapter_hw(struct netxen_adapter *adapter);
void *netxen_alloc(struct pci_dev *pdev, size_t sz, dma_addr_t * ptr,
diff --git a/drivers/net/netxen/netxen_nic_isr.c b/drivers/net/netxen/netxen_nic_isr.c
index c81313b..f487615 100644
--- a/drivers/net/netxen/netxen_nic_isr.c
+++ b/drivers/net/netxen/netxen_nic_isr.c
@@ -172,6 +172,7 @@
netxen_nic_isr_other(adapter);
}
+#if 0
int netxen_nic_link_ok(struct netxen_adapter *adapter)
{
switch (adapter->ahw.board_type) {
@@ -189,6 +190,7 @@
return 0;
}
+#endif /* 0 */
void netxen_nic_xgbe_handle_phy_intr(struct netxen_adapter *adapter)
{
diff --git a/drivers/net/netxen/netxen_nic_main.c b/drivers/net/netxen/netxen_nic_main.c
index a8fb439..7144c25 100644
--- a/drivers/net/netxen/netxen_nic_main.c
+++ b/drivers/net/netxen/netxen_nic_main.c
@@ -86,7 +86,24 @@
MODULE_DEVICE_TABLE(pci, netxen_pci_tbl);
-struct workqueue_struct *netxen_workq;
+/*
+ * In netxen_nic_down(), we must wait for any pending callback requests into
+ * netxen_watchdog_task() to complete; eg otherwise the watchdog_timer could be
+ * reenabled right after it is deleted in netxen_nic_down().
+ * FLUSH_SCHEDULED_WORK() does this synchronization.
+ *
+ * Normally, schedule_work()/flush_scheduled_work() could have worked, but
+ * netxen_nic_close() is invoked with kernel rtnl lock held. netif_carrier_off()
+ * call in netxen_nic_close() triggers a schedule_work(&linkwatch_work), and a
+ * subsequent call to flush_scheduled_work() in netxen_nic_down() would cause
+ * linkwatch_event() to be executed which also attempts to acquire the rtnl
+ * lock thus causing a deadlock.
+ */
+
+static struct workqueue_struct *netxen_workq;
+#define SCHEDULE_WORK(tp) queue_work(netxen_workq, tp)
+#define FLUSH_SCHEDULED_WORK() flush_workqueue(netxen_workq)
+
static void netxen_watchdog(unsigned long);
static void netxen_nic_update_cmd_producer(struct netxen_adapter *adapter,
diff --git a/drivers/net/pasemi_mac.c b/drivers/net/pasemi_mac.c
index 2e39e028..bcd7f98 100644
--- a/drivers/net/pasemi_mac.c
+++ b/drivers/net/pasemi_mac.c
@@ -1012,7 +1012,7 @@
goto err;
phy_id = *prop;
- snprintf(mac->phy_id, BUS_ID_SIZE, PHY_ID_FMT, (int)r.start, phy_id);
+ snprintf(mac->phy_id, BUS_ID_SIZE, "%x:%02x", (int)r.start, phy_id);
of_node_put(phy_dn);
diff --git a/drivers/net/phy/broadcom.c b/drivers/net/phy/broadcom.c
index f5310ed..60c5cfe 100644
--- a/drivers/net/phy/broadcom.c
+++ b/drivers/net/phy/broadcom.c
@@ -176,6 +176,20 @@
.driver = { .owner = THIS_MODULE },
};
+static struct phy_driver bcm5464_driver = {
+ .phy_id = 0x002060b0,
+ .phy_id_mask = 0xfffffff0,
+ .name = "Broadcom BCM5464",
+ .features = PHY_GBIT_FEATURES,
+ .flags = PHY_HAS_MAGICANEG | PHY_HAS_INTERRUPT,
+ .config_init = bcm54xx_config_init,
+ .config_aneg = genphy_config_aneg,
+ .read_status = genphy_read_status,
+ .ack_interrupt = bcm54xx_ack_interrupt,
+ .config_intr = bcm54xx_config_intr,
+ .driver = { .owner = THIS_MODULE },
+};
+
static struct phy_driver bcm5481_driver = {
.phy_id = 0x0143bca0,
.phy_id_mask = 0xfffffff0,
@@ -217,6 +231,9 @@
ret = phy_driver_register(&bcm5461_driver);
if (ret)
goto out_5461;
+ ret = phy_driver_register(&bcm5464_driver);
+ if (ret)
+ goto out_5464;
ret = phy_driver_register(&bcm5481_driver);
if (ret)
goto out_5481;
@@ -228,6 +245,8 @@
out_5482:
phy_driver_unregister(&bcm5481_driver);
out_5481:
+ phy_driver_unregister(&bcm5464_driver);
+out_5464:
phy_driver_unregister(&bcm5461_driver);
out_5461:
phy_driver_unregister(&bcm5421_driver);
@@ -241,6 +260,7 @@
{
phy_driver_unregister(&bcm5482_driver);
phy_driver_unregister(&bcm5481_driver);
+ phy_driver_unregister(&bcm5464_driver);
phy_driver_unregister(&bcm5461_driver);
phy_driver_unregister(&bcm5421_driver);
phy_driver_unregister(&bcm5411_driver);
diff --git a/drivers/net/phy/fixed.c b/drivers/net/phy/fixed.c
index ca9b040..4e07956 100644
--- a/drivers/net/phy/fixed.c
+++ b/drivers/net/phy/fixed.c
@@ -213,7 +213,7 @@
goto err_pdev;
}
- fmb->mii_bus.id = 0;
+ snprintf(fmb->mii_bus.id, MII_BUS_ID_SIZE, "0");
fmb->mii_bus.name = "Fixed MDIO Bus";
fmb->mii_bus.dev = &pdev->dev;
fmb->mii_bus.read = &fixed_mdio_read;
diff --git a/drivers/net/phy/phy_device.c b/drivers/net/phy/phy_device.c
index f4c4fd8..8b1121b 100644
--- a/drivers/net/phy/phy_device.c
+++ b/drivers/net/phy/phy_device.c
@@ -86,6 +86,39 @@
EXPORT_SYMBOL(phy_device_create);
/**
+ * get_phy_id - reads the specified addr for its ID.
+ * @bus: the target MII bus
+ * @addr: PHY address on the MII bus
+ * @phy_id: where to store the ID retrieved.
+ *
+ * Description: Reads the ID registers of the PHY at @addr on the
+ * @bus, stores it in @phy_id and returns zero on success.
+ */
+int get_phy_id(struct mii_bus *bus, int addr, u32 *phy_id)
+{
+ int phy_reg;
+
+ /* Grab the bits from PHYIR1, and put them
+ * in the upper half */
+ phy_reg = bus->read(bus, addr, MII_PHYSID1);
+
+ if (phy_reg < 0)
+ return -EIO;
+
+ *phy_id = (phy_reg & 0xffff) << 16;
+
+ /* Grab the bits from PHYIR2, and put them in the lower half */
+ phy_reg = bus->read(bus, addr, MII_PHYSID2);
+
+ if (phy_reg < 0)
+ return -EIO;
+
+ *phy_id |= (phy_reg & 0xffff);
+
+ return 0;
+}
+
+/**
* get_phy_device - reads the specified PHY device and returns its @phy_device struct
* @bus: the target MII bus
* @addr: PHY address on the MII bus
@@ -95,26 +128,13 @@
*/
struct phy_device * get_phy_device(struct mii_bus *bus, int addr)
{
- int phy_reg;
- u32 phy_id;
struct phy_device *dev = NULL;
+ u32 phy_id;
+ int r;
- /* Grab the bits from PHYIR1, and put them
- * in the upper half */
- phy_reg = bus->read(bus, addr, MII_PHYSID1);
-
- if (phy_reg < 0)
- return ERR_PTR(phy_reg);
-
- phy_id = (phy_reg & 0xffff) << 16;
-
- /* Grab the bits from PHYIR2, and put them in the lower half */
- phy_reg = bus->read(bus, addr, MII_PHYSID2);
-
- if (phy_reg < 0)
- return ERR_PTR(phy_reg);
-
- phy_id |= (phy_reg & 0xffff);
+ r = get_phy_id(bus, addr, &phy_id);
+ if (r)
+ return ERR_PTR(r);
/* If the phy_id is all Fs, there is no device there */
if (0xffffffff == phy_id)
diff --git a/drivers/net/sb1000.c b/drivers/net/sb1000.c
index 487f9d2..5986cec 100644
--- a/drivers/net/sb1000.c
+++ b/drivers/net/sb1000.c
@@ -88,31 +88,31 @@
/* SB1000 hardware routines to be used during open/configuration phases */
-static inline int card_wait_for_busy_clear(const int ioaddr[],
+static int card_wait_for_busy_clear(const int ioaddr[],
const char* name);
-static inline int card_wait_for_ready(const int ioaddr[], const char* name,
+static int card_wait_for_ready(const int ioaddr[], const char* name,
unsigned char in[]);
static int card_send_command(const int ioaddr[], const char* name,
const unsigned char out[], unsigned char in[]);
/* SB1000 hardware routines to be used during frame rx interrupt */
-static inline int sb1000_wait_for_ready(const int ioaddr[], const char* name);
-static inline int sb1000_wait_for_ready_clear(const int ioaddr[],
+static int sb1000_wait_for_ready(const int ioaddr[], const char* name);
+static int sb1000_wait_for_ready_clear(const int ioaddr[],
const char* name);
-static inline void sb1000_send_command(const int ioaddr[], const char* name,
+static void sb1000_send_command(const int ioaddr[], const char* name,
const unsigned char out[]);
-static inline void sb1000_read_status(const int ioaddr[], unsigned char in[]);
-static inline void sb1000_issue_read_command(const int ioaddr[],
+static void sb1000_read_status(const int ioaddr[], unsigned char in[]);
+static void sb1000_issue_read_command(const int ioaddr[],
const char* name);
/* SB1000 commands for open/configuration */
-static inline int sb1000_reset(const int ioaddr[], const char* name);
-static inline int sb1000_check_CRC(const int ioaddr[], const char* name);
+static int sb1000_reset(const int ioaddr[], const char* name);
+static int sb1000_check_CRC(const int ioaddr[], const char* name);
static inline int sb1000_start_get_set_command(const int ioaddr[],
const char* name);
-static inline int sb1000_end_get_set_command(const int ioaddr[],
+static int sb1000_end_get_set_command(const int ioaddr[],
const char* name);
-static inline int sb1000_activate(const int ioaddr[], const char* name);
+static int sb1000_activate(const int ioaddr[], const char* name);
static int sb1000_get_firmware_version(const int ioaddr[],
const char* name, unsigned char version[], int do_end);
static int sb1000_get_frequency(const int ioaddr[], const char* name,
@@ -125,8 +125,8 @@
const short PID[]);
/* SB1000 commands for frame rx interrupt */
-static inline int sb1000_rx(struct net_device *dev);
-static inline void sb1000_error_dpc(struct net_device *dev);
+static int sb1000_rx(struct net_device *dev);
+static void sb1000_error_dpc(struct net_device *dev);
static const struct pnp_device_id sb1000_pnp_ids[] = {
{ "GIC1000", 0 },
@@ -250,7 +250,7 @@
static const int TimeOutJiffies = (875 * HZ) / 100;
/* Card Wait For Busy Clear (cannot be used during an interrupt) */
-static inline int
+static int
card_wait_for_busy_clear(const int ioaddr[], const char* name)
{
unsigned char a;
@@ -274,7 +274,7 @@
}
/* Card Wait For Ready (cannot be used during an interrupt) */
-static inline int
+static int
card_wait_for_ready(const int ioaddr[], const char* name, unsigned char in[])
{
unsigned char a;
@@ -354,7 +354,7 @@
static const int Sb1000TimeOutJiffies = 7 * HZ;
/* Card Wait For Ready (to be used during frame rx) */
-static inline int
+static int
sb1000_wait_for_ready(const int ioaddr[], const char* name)
{
unsigned long timeout;
@@ -380,7 +380,7 @@
}
/* Card Wait For Ready Clear (to be used during frame rx) */
-static inline int
+static int
sb1000_wait_for_ready_clear(const int ioaddr[], const char* name)
{
unsigned long timeout;
@@ -405,7 +405,7 @@
}
/* Card Send Command (to be used during frame rx) */
-static inline void
+static void
sb1000_send_command(const int ioaddr[], const char* name,
const unsigned char out[])
{
@@ -422,7 +422,7 @@
}
/* Card Read Status (to be used during frame rx) */
-static inline void
+static void
sb1000_read_status(const int ioaddr[], unsigned char in[])
{
in[1] = inb(ioaddr[0] + 1);
@@ -434,10 +434,10 @@
}
/* Issue Read Command (to be used during frame rx) */
-static inline void
+static void
sb1000_issue_read_command(const int ioaddr[], const char* name)
{
- const unsigned char Command0[6] = {0x20, 0x00, 0x00, 0x01, 0x00, 0x00};
+ static const unsigned char Command0[6] = {0x20, 0x00, 0x00, 0x01, 0x00, 0x00};
sb1000_wait_for_ready_clear(ioaddr, name);
outb(0xa0, ioaddr[0] + 6);
@@ -450,12 +450,13 @@
* SB1000 commands for open/configuration
*/
/* reset SB1000 card */
-static inline int
+static int
sb1000_reset(const int ioaddr[], const char* name)
{
+ static const unsigned char Command0[6] = {0x80, 0x16, 0x00, 0x00, 0x00, 0x00};
+
unsigned char st[7];
int port, status;
- const unsigned char Command0[6] = {0x80, 0x16, 0x00, 0x00, 0x00, 0x00};
port = ioaddr[1] + 6;
outb(0x4, port);
@@ -479,12 +480,13 @@
}
/* check SB1000 firmware CRC */
-static inline int
+static int
sb1000_check_CRC(const int ioaddr[], const char* name)
{
+ static const unsigned char Command0[6] = {0x80, 0x1f, 0x00, 0x00, 0x00, 0x00};
+
unsigned char st[7];
int crc, status;
- const unsigned char Command0[6] = {0x80, 0x1f, 0x00, 0x00, 0x00, 0x00};
/* check CRC */
if ((status = card_send_command(ioaddr, name, Command0, st)))
@@ -498,32 +500,35 @@
static inline int
sb1000_start_get_set_command(const int ioaddr[], const char* name)
{
+ static const unsigned char Command0[6] = {0x80, 0x1b, 0x00, 0x00, 0x00, 0x00};
+
unsigned char st[7];
- const unsigned char Command0[6] = {0x80, 0x1b, 0x00, 0x00, 0x00, 0x00};
return card_send_command(ioaddr, name, Command0, st);
}
-static inline int
+static int
sb1000_end_get_set_command(const int ioaddr[], const char* name)
{
+ static const unsigned char Command0[6] = {0x80, 0x1b, 0x02, 0x00, 0x00, 0x00};
+ static const unsigned char Command1[6] = {0x20, 0x00, 0x00, 0x00, 0x00, 0x00};
+
unsigned char st[7];
int status;
- const unsigned char Command0[6] = {0x80, 0x1b, 0x02, 0x00, 0x00, 0x00};
- const unsigned char Command1[6] = {0x20, 0x00, 0x00, 0x00, 0x00, 0x00};
if ((status = card_send_command(ioaddr, name, Command0, st)))
return status;
return card_send_command(ioaddr, name, Command1, st);
}
-static inline int
+static int
sb1000_activate(const int ioaddr[], const char* name)
{
+ static const unsigned char Command0[6] = {0x80, 0x11, 0x00, 0x00, 0x00, 0x00};
+ static const unsigned char Command1[6] = {0x80, 0x16, 0x00, 0x00, 0x00, 0x00};
+
unsigned char st[7];
int status;
- const unsigned char Command0[6] = {0x80, 0x11, 0x00, 0x00, 0x00, 0x00};
- const unsigned char Command1[6] = {0x80, 0x16, 0x00, 0x00, 0x00, 0x00};
ssleep(1);
if ((status = card_send_command(ioaddr, name, Command0, st)))
@@ -544,9 +549,10 @@
sb1000_get_firmware_version(const int ioaddr[], const char* name,
unsigned char version[], int do_end)
{
+ static const unsigned char Command0[6] = {0x80, 0x23, 0x00, 0x00, 0x00, 0x00};
+
unsigned char st[7];
int status;
- const unsigned char Command0[6] = {0x80, 0x23, 0x00, 0x00, 0x00, 0x00};
if ((status = sb1000_start_get_set_command(ioaddr, name)))
return status;
@@ -566,9 +572,10 @@
static int
sb1000_get_frequency(const int ioaddr[], const char* name, int* frequency)
{
+ static const unsigned char Command0[6] = {0x80, 0x44, 0x00, 0x00, 0x00, 0x00};
+
unsigned char st[7];
int status;
- const unsigned char Command0[6] = {0x80, 0x44, 0x00, 0x00, 0x00, 0x00};
udelay(1000);
if ((status = sb1000_start_get_set_command(ioaddr, name)))
@@ -613,12 +620,13 @@
static int
sb1000_get_PIDs(const int ioaddr[], const char* name, short PID[])
{
+ static const unsigned char Command0[6] = {0x80, 0x40, 0x00, 0x00, 0x00, 0x00};
+ static const unsigned char Command1[6] = {0x80, 0x41, 0x00, 0x00, 0x00, 0x00};
+ static const unsigned char Command2[6] = {0x80, 0x42, 0x00, 0x00, 0x00, 0x00};
+ static const unsigned char Command3[6] = {0x80, 0x43, 0x00, 0x00, 0x00, 0x00};
+
unsigned char st[7];
int status;
- const unsigned char Command0[6] = {0x80, 0x40, 0x00, 0x00, 0x00, 0x00};
- const unsigned char Command1[6] = {0x80, 0x41, 0x00, 0x00, 0x00, 0x00};
- const unsigned char Command2[6] = {0x80, 0x42, 0x00, 0x00, 0x00, 0x00};
- const unsigned char Command3[6] = {0x80, 0x43, 0x00, 0x00, 0x00, 0x00};
udelay(1000);
if ((status = sb1000_start_get_set_command(ioaddr, name)))
@@ -647,6 +655,8 @@
static int
sb1000_set_PIDs(const int ioaddr[], const char* name, const short PID[])
{
+ static const unsigned char Command4[6] = {0x80, 0x2e, 0x00, 0x00, 0x00, 0x00};
+
unsigned char st[7];
short p;
int status;
@@ -654,7 +664,6 @@
unsigned char Command1[6] = {0x80, 0x32, 0x00, 0x00, 0x00, 0x00};
unsigned char Command2[6] = {0x80, 0x33, 0x00, 0x00, 0x00, 0x00};
unsigned char Command3[6] = {0x80, 0x34, 0x00, 0x00, 0x00, 0x00};
- const unsigned char Command4[6] = {0x80, 0x2e, 0x00, 0x00, 0x00, 0x00};
udelay(1000);
if ((status = sb1000_start_get_set_command(ioaddr, name)))
@@ -694,7 +703,7 @@
}
-static inline void
+static void
sb1000_print_status_buffer(const char* name, unsigned char st[],
unsigned char buffer[], int size)
{
@@ -725,7 +734,7 @@
/* receive a single frame and assemble datagram
* (this is the heart of the interrupt routine)
*/
-static inline int
+static int
sb1000_rx(struct net_device *dev)
{
@@ -888,14 +897,15 @@
return -1;
}
-static inline void
+static void
sb1000_error_dpc(struct net_device *dev)
{
+ static const unsigned char Command0[6] = {0x80, 0x26, 0x00, 0x00, 0x00, 0x00};
+
char *name;
unsigned char st[5];
int ioaddr[2];
struct sb1000_private *lp = netdev_priv(dev);
- const unsigned char Command0[6] = {0x80, 0x26, 0x00, 0x00, 0x00, 0x00};
const int ErrorDpcCounterInitialize = 200;
ioaddr[0] = dev->base_addr;
@@ -1077,14 +1087,15 @@
/* SB1000 interrupt handler. */
static irqreturn_t sb1000_interrupt(int irq, void *dev_id)
{
+ static const unsigned char Command0[6] = {0x80, 0x2c, 0x00, 0x00, 0x00, 0x00};
+ static const unsigned char Command1[6] = {0x80, 0x2e, 0x00, 0x00, 0x00, 0x00};
+
char *name;
unsigned char st;
int ioaddr[2];
struct net_device *dev = dev_id;
struct sb1000_private *lp = netdev_priv(dev);
- const unsigned char Command0[6] = {0x80, 0x2c, 0x00, 0x00, 0x00, 0x00};
- const unsigned char Command1[6] = {0x80, 0x2e, 0x00, 0x00, 0x00, 0x00};
const int MaxRxErrorCount = 6;
ioaddr[0] = dev->base_addr;
diff --git a/drivers/net/sb1250-mac.c b/drivers/net/sb1250-mac.c
index 7b53d65..888b7de 100644
--- a/drivers/net/sb1250-mac.c
+++ b/drivers/net/sb1250-mac.c
@@ -2374,7 +2374,7 @@
dev->name, base, print_mac(mac, eaddr));
sc->mii_bus.name = sbmac_mdio_string;
- sc->mii_bus.id = idx;
+ snprintf(sc->mii_bus.id, MII_BUS_ID_SIZE, "%x", idx);
sc->mii_bus.priv = sc;
sc->mii_bus.read = sbmac_mii_read;
sc->mii_bus.write = sbmac_mii_write;
diff --git a/drivers/net/sc92031.c b/drivers/net/sc92031.c
index 15fcee5..f64a860 100644
--- a/drivers/net/sc92031.c
+++ b/drivers/net/sc92031.c
@@ -311,7 +311,6 @@
/* for dev->get_stats */
long rx_value;
- struct net_device_stats stats;
};
/* I don't know which registers can be safely read; however, I can guess
@@ -421,7 +420,7 @@
while (priv->tx_head - priv->tx_tail > 0) {
priv->tx_tail++;
- priv->stats.tx_dropped++;
+ dev->stats.tx_dropped++;
}
priv->tx_head = priv->tx_tail = 0;
}
@@ -676,27 +675,27 @@
priv->tx_tail++;
if (tx_status & TxStatOK) {
- priv->stats.tx_bytes += tx_status & 0x1fff;
- priv->stats.tx_packets++;
+ dev->stats.tx_bytes += tx_status & 0x1fff;
+ dev->stats.tx_packets++;
/* Note: TxCarrierLost is always asserted at 100mbps. */
- priv->stats.collisions += (tx_status >> 22) & 0xf;
+ dev->stats.collisions += (tx_status >> 22) & 0xf;
}
if (tx_status & (TxOutOfWindow | TxAborted)) {
- priv->stats.tx_errors++;
+ dev->stats.tx_errors++;
if (tx_status & TxAborted)
- priv->stats.tx_aborted_errors++;
+ dev->stats.tx_aborted_errors++;
if (tx_status & TxCarrierLost)
- priv->stats.tx_carrier_errors++;
+ dev->stats.tx_carrier_errors++;
if (tx_status & TxOutOfWindow)
- priv->stats.tx_window_errors++;
+ dev->stats.tx_window_errors++;
}
if (tx_status & TxUnderrun)
- priv->stats.tx_fifo_errors++;
+ dev->stats.tx_fifo_errors++;
}
if (priv->tx_tail != old_tx_tail)
@@ -704,27 +703,29 @@
netif_wake_queue(dev);
}
-static void _sc92031_rx_tasklet_error(u32 rx_status,
- struct sc92031_priv *priv, unsigned rx_size)
+static void _sc92031_rx_tasklet_error(struct net_device *dev,
+ u32 rx_status, unsigned rx_size)
{
if(rx_size > (MAX_ETH_FRAME_SIZE + 4) || rx_size < 16) {
- priv->stats.rx_errors++;
- priv->stats.rx_length_errors++;
+ dev->stats.rx_errors++;
+ dev->stats.rx_length_errors++;
}
if (!(rx_status & RxStatesOK)) {
- priv->stats.rx_errors++;
+ dev->stats.rx_errors++;
if (rx_status & (RxHugeFrame | RxSmallFrame))
- priv->stats.rx_length_errors++;
+ dev->stats.rx_length_errors++;
if (rx_status & RxBadAlign)
- priv->stats.rx_frame_errors++;
+ dev->stats.rx_frame_errors++;
if (!(rx_status & RxCRCOK))
- priv->stats.rx_crc_errors++;
- } else
+ dev->stats.rx_crc_errors++;
+ } else {
+ struct sc92031_priv *priv = netdev_priv(dev);
priv->rx_loss++;
+ }
}
static void _sc92031_rx_tasklet(struct net_device *dev)
@@ -783,7 +784,7 @@
|| rx_size > (MAX_ETH_FRAME_SIZE + 4)
|| rx_size < 16
|| !(rx_status & RxStatesOK))) {
- _sc92031_rx_tasklet_error(rx_status, priv, rx_size);
+ _sc92031_rx_tasklet_error(dev, rx_status, rx_size);
break;
}
@@ -795,7 +796,7 @@
rx_len -= rx_size_align + 4;
- skb = dev_alloc_skb(pkt_size + NET_IP_ALIGN);
+ skb = netdev_alloc_skb(dev, pkt_size + NET_IP_ALIGN);
if (unlikely(!skb)) {
if (printk_ratelimit())
printk(KERN_ERR "%s: Couldn't allocate a skb_buff for a packet of size %u\n",
@@ -818,11 +819,11 @@
dev->last_rx = jiffies;
netif_rx(skb);
- priv->stats.rx_bytes += pkt_size;
- priv->stats.rx_packets++;
+ dev->stats.rx_bytes += pkt_size;
+ dev->stats.rx_packets++;
if (rx_status & Rx_Multicast)
- priv->stats.multicast++;
+ dev->stats.multicast++;
next:
rx_ring_offset = (rx_ring_offset + rx_size_align) % RX_BUF_LEN;
@@ -835,13 +836,11 @@
static void _sc92031_link_tasklet(struct net_device *dev)
{
- struct sc92031_priv *priv = netdev_priv(dev);
-
if (_sc92031_check_media(dev))
netif_wake_queue(dev);
else {
netif_stop_queue(dev);
- priv->stats.tx_carrier_errors++;
+ dev->stats.tx_carrier_errors++;
}
}
@@ -866,11 +865,11 @@
_sc92031_rx_tasklet(dev);
if (intr_status & RxOverflow)
- priv->stats.rx_errors++;
+ dev->stats.rx_errors++;
if (intr_status & TimeOut) {
- priv->stats.rx_errors++;
- priv->stats.rx_length_errors++;
+ dev->stats.rx_errors++;
+ dev->stats.rx_length_errors++;
}
if (intr_status & (LinkFail | LinkOK))
@@ -936,38 +935,36 @@
if (temp == 0xffff) {
priv->rx_value += temp;
- priv->stats.rx_fifo_errors = priv->rx_value;
- } else {
- priv->stats.rx_fifo_errors = temp + priv->rx_value;
- }
+ dev->stats.rx_fifo_errors = priv->rx_value;
+ } else
+ dev->stats.rx_fifo_errors = temp + priv->rx_value;
spin_unlock_bh(&priv->lock);
}
- return &priv->stats;
+ return &dev->stats;
}
static int sc92031_start_xmit(struct sk_buff *skb, struct net_device *dev)
{
- int err = 0;
struct sc92031_priv *priv = netdev_priv(dev);
void __iomem *port_base = priv->port_base;
-
unsigned len;
unsigned entry;
u32 tx_status;
+ if (skb_padto(skb, ETH_ZLEN))
+ return NETDEV_TX_OK;
+
if (unlikely(skb->len > TX_BUF_SIZE)) {
- err = -EMSGSIZE;
- priv->stats.tx_dropped++;
+ dev->stats.tx_dropped++;
goto out;
}
spin_lock(&priv->lock);
if (unlikely(!netif_carrier_ok(dev))) {
- err = -ENOLINK;
- priv->stats.tx_dropped++;
+ dev->stats.tx_dropped++;
goto out_unlock;
}
@@ -978,11 +975,6 @@
skb_copy_and_csum_dev(skb, priv->tx_bufs + entry * TX_BUF_SIZE);
len = skb->len;
- if (unlikely(len < ETH_ZLEN)) {
- memset(priv->tx_bufs + entry * TX_BUF_SIZE + len,
- 0, ETH_ZLEN - len);
- len = ETH_ZLEN;
- }
wmb();
@@ -1009,7 +1001,7 @@
out:
dev_kfree_skb(skb);
- return err;
+ return NETDEV_TX_OK;
}
static int sc92031_open(struct net_device *dev)
diff --git a/drivers/net/spider_net.c b/drivers/net/spider_net.c
index bccae7e..4776716 100644
--- a/drivers/net/spider_net.c
+++ b/drivers/net/spider_net.c
@@ -1399,6 +1399,8 @@
spider_net_write_reg(card, SPIDER_NET_GMACINTEN, 0);
/* reset phy and setup aneg */
+ card->aneg_count = 0;
+ card->medium = BCM54XX_COPPER;
spider_net_setup_aneg(card);
mod_timer(&card->aneg_timer, jiffies + SPIDER_NET_ANEG_TIMER);
@@ -1413,18 +1415,12 @@
* found when an interrupt is presented
*/
static void
-spider_net_handle_error_irq(struct spider_net_card *card, u32 status_reg)
+spider_net_handle_error_irq(struct spider_net_card *card, u32 status_reg,
+ u32 error_reg1, u32 error_reg2)
{
- u32 error_reg1, error_reg2;
u32 i;
int show_error = 1;
- error_reg1 = spider_net_read_reg(card, SPIDER_NET_GHIINT1STS);
- error_reg2 = spider_net_read_reg(card, SPIDER_NET_GHIINT2STS);
-
- error_reg1 &= SPIDER_NET_INT1_MASK_VALUE;
- error_reg2 &= SPIDER_NET_INT2_MASK_VALUE;
-
/* check GHIINT0STS ************************************/
if (status_reg)
for (i = 0; i < 32; i++)
@@ -1654,12 +1650,15 @@
{
struct net_device *netdev = ptr;
struct spider_net_card *card = netdev_priv(netdev);
- u32 status_reg;
+ u32 status_reg, error_reg1, error_reg2;
status_reg = spider_net_read_reg(card, SPIDER_NET_GHIINT0STS);
- status_reg &= SPIDER_NET_INT0_MASK_VALUE;
+ error_reg1 = spider_net_read_reg(card, SPIDER_NET_GHIINT1STS);
+ error_reg2 = spider_net_read_reg(card, SPIDER_NET_GHIINT2STS);
- if (!status_reg)
+ if (!(status_reg & SPIDER_NET_INT0_MASK_VALUE) &&
+ !(error_reg1 & SPIDER_NET_INT1_MASK_VALUE) &&
+ !(error_reg2 & SPIDER_NET_INT2_MASK_VALUE))
return IRQ_NONE;
if (status_reg & SPIDER_NET_RXINT ) {
@@ -1674,7 +1673,8 @@
spider_net_link_reset(netdev);
if (status_reg & SPIDER_NET_ERRINT )
- spider_net_handle_error_irq(card, status_reg);
+ spider_net_handle_error_irq(card, status_reg,
+ error_reg1, error_reg2);
/* clear interrupt sources */
spider_net_write_reg(card, SPIDER_NET_GHIINT0STS, status_reg);
@@ -1982,6 +1982,8 @@
goto init_firmware_failed;
/* start probing with copper */
+ card->aneg_count = 0;
+ card->medium = BCM54XX_COPPER;
spider_net_setup_aneg(card);
if (card->phy.def->phy_id)
mod_timer(&card->aneg_timer, jiffies + SPIDER_NET_ANEG_TIMER);
@@ -2043,7 +2045,8 @@
/* if link didn't come up after SPIDER_NET_ANEG_TIMEOUT tries, setup phy again */
if (card->aneg_count > SPIDER_NET_ANEG_TIMEOUT) {
- pr_info("%s: link is down trying to bring it up\n", card->netdev->name);
+ pr_debug("%s: link is down trying to bring it up\n",
+ card->netdev->name);
switch (card->medium) {
case BCM54XX_COPPER:
@@ -2094,9 +2097,10 @@
card->aneg_count = 0;
- pr_debug("Found %s with %i Mbps, %s-duplex %sautoneg.\n",
- phy->def->name, phy->speed, phy->duplex==1 ? "Full" : "Half",
- phy->autoneg==1 ? "" : "no ");
+ pr_info("%s: link up, %i Mbps, %s-duplex %sautoneg.\n",
+ card->netdev->name, phy->speed,
+ phy->duplex == 1 ? "Full" : "Half",
+ phy->autoneg == 1 ? "" : "no ");
return;
}
diff --git a/drivers/net/spider_net.h b/drivers/net/spider_net.h
index e1d05c0..05f74cb 100644
--- a/drivers/net/spider_net.h
+++ b/drivers/net/spider_net.h
@@ -52,7 +52,7 @@
#define SPIDER_NET_TX_TIMER (HZ/5)
#define SPIDER_NET_ANEG_TIMER (HZ)
-#define SPIDER_NET_ANEG_TIMEOUT 2
+#define SPIDER_NET_ANEG_TIMEOUT 5
#define SPIDER_NET_RX_CSUM_DEFAULT 1
@@ -159,9 +159,8 @@
/** interrupt mask registers */
#define SPIDER_NET_INT0_MASK_VALUE 0x3f7fe2c7
-#define SPIDER_NET_INT1_MASK_VALUE 0xffff7ff7
-/* no MAC aborts -> auto retransmission */
-#define SPIDER_NET_INT2_MASK_VALUE 0xffef7ff1
+#define SPIDER_NET_INT1_MASK_VALUE 0x0000fff2
+#define SPIDER_NET_INT2_MASK_VALUE 0x000003f1
/* we rely on flagged descriptor interrupts */
#define SPIDER_NET_FRAMENUM_VALUE 0x00000000
diff --git a/drivers/net/tc35815.c b/drivers/net/tc35815.c
index 370d329..10e4e85 100644
--- a/drivers/net/tc35815.c
+++ b/drivers/net/tc35815.c
@@ -23,9 +23,9 @@
*/
#ifdef TC35815_NAPI
-#define DRV_VERSION "1.36-NAPI"
+#define DRV_VERSION "1.37-NAPI"
#else
-#define DRV_VERSION "1.36"
+#define DRV_VERSION "1.37"
#endif
static const char *version = "tc35815.c:v" DRV_VERSION "\n";
#define MODNAME "tc35815"
@@ -47,8 +47,8 @@
#include <linux/skbuff.h>
#include <linux/delay.h>
#include <linux/pci.h>
-#include <linux/mii.h>
-#include <linux/ethtool.h>
+#include <linux/phy.h>
+#include <linux/workqueue.h>
#include <linux/platform_device.h>
#include <asm/io.h>
#include <asm/byteorder.h>
@@ -60,16 +60,16 @@
#define WORKAROUND_100HALF_PROMISC
/* #define TC35815_USE_PACKEDBUFFER */
-typedef enum {
+enum tc35815_chiptype {
TC35815CF = 0,
TC35815_NWU,
TC35815_TX4939,
-} board_t;
+};
-/* indexed by board_t, above */
+/* indexed by tc35815_chiptype, above */
static const struct {
const char *name;
-} board_info[] __devinitdata = {
+} chip_info[] __devinitdata = {
{ "TOSHIBA TC35815CF 10/100BaseTX" },
{ "TOSHIBA TC35815 with Wake on LAN" },
{ "TOSHIBA TC35815/TX4939" },
@@ -81,209 +81,208 @@
{PCI_DEVICE(PCI_VENDOR_ID_TOSHIBA_2, PCI_DEVICE_ID_TOSHIBA_TC35815_TX4939), .driver_data = TC35815_TX4939 },
{0,}
};
-MODULE_DEVICE_TABLE (pci, tc35815_pci_tbl);
+MODULE_DEVICE_TABLE(pci, tc35815_pci_tbl);
/* see MODULE_PARM_DESC */
static struct tc35815_options {
int speed;
int duplex;
- int doforce;
} options;
/*
* Registers
*/
struct tc35815_regs {
- volatile __u32 DMA_Ctl; /* 0x00 */
- volatile __u32 TxFrmPtr;
- volatile __u32 TxThrsh;
- volatile __u32 TxPollCtr;
- volatile __u32 BLFrmPtr;
- volatile __u32 RxFragSize;
- volatile __u32 Int_En;
- volatile __u32 FDA_Bas;
- volatile __u32 FDA_Lim; /* 0x20 */
- volatile __u32 Int_Src;
- volatile __u32 unused0[2];
- volatile __u32 PauseCnt;
- volatile __u32 RemPauCnt;
- volatile __u32 TxCtlFrmStat;
- volatile __u32 unused1;
- volatile __u32 MAC_Ctl; /* 0x40 */
- volatile __u32 CAM_Ctl;
- volatile __u32 Tx_Ctl;
- volatile __u32 Tx_Stat;
- volatile __u32 Rx_Ctl;
- volatile __u32 Rx_Stat;
- volatile __u32 MD_Data;
- volatile __u32 MD_CA;
- volatile __u32 CAM_Adr; /* 0x60 */
- volatile __u32 CAM_Data;
- volatile __u32 CAM_Ena;
- volatile __u32 PROM_Ctl;
- volatile __u32 PROM_Data;
- volatile __u32 Algn_Cnt;
- volatile __u32 CRC_Cnt;
- volatile __u32 Miss_Cnt;
+ __u32 DMA_Ctl; /* 0x00 */
+ __u32 TxFrmPtr;
+ __u32 TxThrsh;
+ __u32 TxPollCtr;
+ __u32 BLFrmPtr;
+ __u32 RxFragSize;
+ __u32 Int_En;
+ __u32 FDA_Bas;
+ __u32 FDA_Lim; /* 0x20 */
+ __u32 Int_Src;
+ __u32 unused0[2];
+ __u32 PauseCnt;
+ __u32 RemPauCnt;
+ __u32 TxCtlFrmStat;
+ __u32 unused1;
+ __u32 MAC_Ctl; /* 0x40 */
+ __u32 CAM_Ctl;
+ __u32 Tx_Ctl;
+ __u32 Tx_Stat;
+ __u32 Rx_Ctl;
+ __u32 Rx_Stat;
+ __u32 MD_Data;
+ __u32 MD_CA;
+ __u32 CAM_Adr; /* 0x60 */
+ __u32 CAM_Data;
+ __u32 CAM_Ena;
+ __u32 PROM_Ctl;
+ __u32 PROM_Data;
+ __u32 Algn_Cnt;
+ __u32 CRC_Cnt;
+ __u32 Miss_Cnt;
};
/*
* Bit assignments
*/
/* DMA_Ctl bit asign ------------------------------------------------------- */
-#define DMA_RxAlign 0x00c00000 /* 1:Reception Alignment */
-#define DMA_RxAlign_1 0x00400000
-#define DMA_RxAlign_2 0x00800000
-#define DMA_RxAlign_3 0x00c00000
-#define DMA_M66EnStat 0x00080000 /* 1:66MHz Enable State */
-#define DMA_IntMask 0x00040000 /* 1:Interupt mask */
-#define DMA_SWIntReq 0x00020000 /* 1:Software Interrupt request */
-#define DMA_TxWakeUp 0x00010000 /* 1:Transmit Wake Up */
-#define DMA_RxBigE 0x00008000 /* 1:Receive Big Endian */
-#define DMA_TxBigE 0x00004000 /* 1:Transmit Big Endian */
-#define DMA_TestMode 0x00002000 /* 1:Test Mode */
-#define DMA_PowrMgmnt 0x00001000 /* 1:Power Management */
-#define DMA_DmBurst_Mask 0x000001fc /* DMA Burst size */
+#define DMA_RxAlign 0x00c00000 /* 1:Reception Alignment */
+#define DMA_RxAlign_1 0x00400000
+#define DMA_RxAlign_2 0x00800000
+#define DMA_RxAlign_3 0x00c00000
+#define DMA_M66EnStat 0x00080000 /* 1:66MHz Enable State */
+#define DMA_IntMask 0x00040000 /* 1:Interupt mask */
+#define DMA_SWIntReq 0x00020000 /* 1:Software Interrupt request */
+#define DMA_TxWakeUp 0x00010000 /* 1:Transmit Wake Up */
+#define DMA_RxBigE 0x00008000 /* 1:Receive Big Endian */
+#define DMA_TxBigE 0x00004000 /* 1:Transmit Big Endian */
+#define DMA_TestMode 0x00002000 /* 1:Test Mode */
+#define DMA_PowrMgmnt 0x00001000 /* 1:Power Management */
+#define DMA_DmBurst_Mask 0x000001fc /* DMA Burst size */
/* RxFragSize bit asign ---------------------------------------------------- */
-#define RxFrag_EnPack 0x00008000 /* 1:Enable Packing */
-#define RxFrag_MinFragMask 0x00000ffc /* Minimum Fragment */
+#define RxFrag_EnPack 0x00008000 /* 1:Enable Packing */
+#define RxFrag_MinFragMask 0x00000ffc /* Minimum Fragment */
/* MAC_Ctl bit asign ------------------------------------------------------- */
-#define MAC_Link10 0x00008000 /* 1:Link Status 10Mbits */
-#define MAC_EnMissRoll 0x00002000 /* 1:Enable Missed Roll */
-#define MAC_MissRoll 0x00000400 /* 1:Missed Roll */
-#define MAC_Loop10 0x00000080 /* 1:Loop 10 Mbps */
-#define MAC_Conn_Auto 0x00000000 /*00:Connection mode (Automatic) */
-#define MAC_Conn_10M 0x00000020 /*01: (10Mbps endec)*/
-#define MAC_Conn_Mll 0x00000040 /*10: (Mll clock) */
-#define MAC_MacLoop 0x00000010 /* 1:MAC Loopback */
-#define MAC_FullDup 0x00000008 /* 1:Full Duplex 0:Half Duplex */
-#define MAC_Reset 0x00000004 /* 1:Software Reset */
-#define MAC_HaltImm 0x00000002 /* 1:Halt Immediate */
-#define MAC_HaltReq 0x00000001 /* 1:Halt request */
+#define MAC_Link10 0x00008000 /* 1:Link Status 10Mbits */
+#define MAC_EnMissRoll 0x00002000 /* 1:Enable Missed Roll */
+#define MAC_MissRoll 0x00000400 /* 1:Missed Roll */
+#define MAC_Loop10 0x00000080 /* 1:Loop 10 Mbps */
+#define MAC_Conn_Auto 0x00000000 /*00:Connection mode (Automatic) */
+#define MAC_Conn_10M 0x00000020 /*01: (10Mbps endec)*/
+#define MAC_Conn_Mll 0x00000040 /*10: (Mll clock) */
+#define MAC_MacLoop 0x00000010 /* 1:MAC Loopback */
+#define MAC_FullDup 0x00000008 /* 1:Full Duplex 0:Half Duplex */
+#define MAC_Reset 0x00000004 /* 1:Software Reset */
+#define MAC_HaltImm 0x00000002 /* 1:Halt Immediate */
+#define MAC_HaltReq 0x00000001 /* 1:Halt request */
/* PROM_Ctl bit asign ------------------------------------------------------ */
-#define PROM_Busy 0x00008000 /* 1:Busy (Start Operation) */
-#define PROM_Read 0x00004000 /*10:Read operation */
-#define PROM_Write 0x00002000 /*01:Write operation */
-#define PROM_Erase 0x00006000 /*11:Erase operation */
- /*00:Enable or Disable Writting, */
- /* as specified in PROM_Addr. */
-#define PROM_Addr_Ena 0x00000030 /*11xxxx:PROM Write enable */
- /*00xxxx: disable */
+#define PROM_Busy 0x00008000 /* 1:Busy (Start Operation) */
+#define PROM_Read 0x00004000 /*10:Read operation */
+#define PROM_Write 0x00002000 /*01:Write operation */
+#define PROM_Erase 0x00006000 /*11:Erase operation */
+ /*00:Enable or Disable Writting, */
+ /* as specified in PROM_Addr. */
+#define PROM_Addr_Ena 0x00000030 /*11xxxx:PROM Write enable */
+ /*00xxxx: disable */
/* CAM_Ctl bit asign ------------------------------------------------------- */
-#define CAM_CompEn 0x00000010 /* 1:CAM Compare Enable */
-#define CAM_NegCAM 0x00000008 /* 1:Reject packets CAM recognizes,*/
- /* accept other */
-#define CAM_BroadAcc 0x00000004 /* 1:Broadcast assept */
-#define CAM_GroupAcc 0x00000002 /* 1:Multicast assept */
-#define CAM_StationAcc 0x00000001 /* 1:unicast accept */
+#define CAM_CompEn 0x00000010 /* 1:CAM Compare Enable */
+#define CAM_NegCAM 0x00000008 /* 1:Reject packets CAM recognizes,*/
+ /* accept other */
+#define CAM_BroadAcc 0x00000004 /* 1:Broadcast assept */
+#define CAM_GroupAcc 0x00000002 /* 1:Multicast assept */
+#define CAM_StationAcc 0x00000001 /* 1:unicast accept */
/* CAM_Ena bit asign ------------------------------------------------------- */
-#define CAM_ENTRY_MAX 21 /* CAM Data entry max count */
+#define CAM_ENTRY_MAX 21 /* CAM Data entry max count */
#define CAM_Ena_Mask ((1<<CAM_ENTRY_MAX)-1) /* CAM Enable bits (Max 21bits) */
-#define CAM_Ena_Bit(index) (1<<(index))
+#define CAM_Ena_Bit(index) (1 << (index))
#define CAM_ENTRY_DESTINATION 0
#define CAM_ENTRY_SOURCE 1
#define CAM_ENTRY_MACCTL 20
/* Tx_Ctl bit asign -------------------------------------------------------- */
-#define Tx_En 0x00000001 /* 1:Transmit enable */
-#define Tx_TxHalt 0x00000002 /* 1:Transmit Halt Request */
-#define Tx_NoPad 0x00000004 /* 1:Suppress Padding */
-#define Tx_NoCRC 0x00000008 /* 1:Suppress Padding */
-#define Tx_FBack 0x00000010 /* 1:Fast Back-off */
-#define Tx_EnUnder 0x00000100 /* 1:Enable Underrun */
-#define Tx_EnExDefer 0x00000200 /* 1:Enable Excessive Deferral */
-#define Tx_EnLCarr 0x00000400 /* 1:Enable Lost Carrier */
-#define Tx_EnExColl 0x00000800 /* 1:Enable Excessive Collision */
-#define Tx_EnLateColl 0x00001000 /* 1:Enable Late Collision */
-#define Tx_EnTxPar 0x00002000 /* 1:Enable Transmit Parity */
-#define Tx_EnComp 0x00004000 /* 1:Enable Completion */
+#define Tx_En 0x00000001 /* 1:Transmit enable */
+#define Tx_TxHalt 0x00000002 /* 1:Transmit Halt Request */
+#define Tx_NoPad 0x00000004 /* 1:Suppress Padding */
+#define Tx_NoCRC 0x00000008 /* 1:Suppress Padding */
+#define Tx_FBack 0x00000010 /* 1:Fast Back-off */
+#define Tx_EnUnder 0x00000100 /* 1:Enable Underrun */
+#define Tx_EnExDefer 0x00000200 /* 1:Enable Excessive Deferral */
+#define Tx_EnLCarr 0x00000400 /* 1:Enable Lost Carrier */
+#define Tx_EnExColl 0x00000800 /* 1:Enable Excessive Collision */
+#define Tx_EnLateColl 0x00001000 /* 1:Enable Late Collision */
+#define Tx_EnTxPar 0x00002000 /* 1:Enable Transmit Parity */
+#define Tx_EnComp 0x00004000 /* 1:Enable Completion */
/* Tx_Stat bit asign ------------------------------------------------------- */
-#define Tx_TxColl_MASK 0x0000000F /* Tx Collision Count */
-#define Tx_ExColl 0x00000010 /* Excessive Collision */
-#define Tx_TXDefer 0x00000020 /* Transmit Defered */
-#define Tx_Paused 0x00000040 /* Transmit Paused */
-#define Tx_IntTx 0x00000080 /* Interrupt on Tx */
-#define Tx_Under 0x00000100 /* Underrun */
-#define Tx_Defer 0x00000200 /* Deferral */
-#define Tx_NCarr 0x00000400 /* No Carrier */
-#define Tx_10Stat 0x00000800 /* 10Mbps Status */
-#define Tx_LateColl 0x00001000 /* Late Collision */
-#define Tx_TxPar 0x00002000 /* Tx Parity Error */
-#define Tx_Comp 0x00004000 /* Completion */
-#define Tx_Halted 0x00008000 /* Tx Halted */
-#define Tx_SQErr 0x00010000 /* Signal Quality Error(SQE) */
+#define Tx_TxColl_MASK 0x0000000F /* Tx Collision Count */
+#define Tx_ExColl 0x00000010 /* Excessive Collision */
+#define Tx_TXDefer 0x00000020 /* Transmit Defered */
+#define Tx_Paused 0x00000040 /* Transmit Paused */
+#define Tx_IntTx 0x00000080 /* Interrupt on Tx */
+#define Tx_Under 0x00000100 /* Underrun */
+#define Tx_Defer 0x00000200 /* Deferral */
+#define Tx_NCarr 0x00000400 /* No Carrier */
+#define Tx_10Stat 0x00000800 /* 10Mbps Status */
+#define Tx_LateColl 0x00001000 /* Late Collision */
+#define Tx_TxPar 0x00002000 /* Tx Parity Error */
+#define Tx_Comp 0x00004000 /* Completion */
+#define Tx_Halted 0x00008000 /* Tx Halted */
+#define Tx_SQErr 0x00010000 /* Signal Quality Error(SQE) */
/* Rx_Ctl bit asign -------------------------------------------------------- */
-#define Rx_EnGood 0x00004000 /* 1:Enable Good */
-#define Rx_EnRxPar 0x00002000 /* 1:Enable Receive Parity */
-#define Rx_EnLongErr 0x00000800 /* 1:Enable Long Error */
-#define Rx_EnOver 0x00000400 /* 1:Enable OverFlow */
-#define Rx_EnCRCErr 0x00000200 /* 1:Enable CRC Error */
-#define Rx_EnAlign 0x00000100 /* 1:Enable Alignment */
-#define Rx_IgnoreCRC 0x00000040 /* 1:Ignore CRC Value */
-#define Rx_StripCRC 0x00000010 /* 1:Strip CRC Value */
-#define Rx_ShortEn 0x00000008 /* 1:Short Enable */
-#define Rx_LongEn 0x00000004 /* 1:Long Enable */
-#define Rx_RxHalt 0x00000002 /* 1:Receive Halt Request */
-#define Rx_RxEn 0x00000001 /* 1:Receive Intrrupt Enable */
+#define Rx_EnGood 0x00004000 /* 1:Enable Good */
+#define Rx_EnRxPar 0x00002000 /* 1:Enable Receive Parity */
+#define Rx_EnLongErr 0x00000800 /* 1:Enable Long Error */
+#define Rx_EnOver 0x00000400 /* 1:Enable OverFlow */
+#define Rx_EnCRCErr 0x00000200 /* 1:Enable CRC Error */
+#define Rx_EnAlign 0x00000100 /* 1:Enable Alignment */
+#define Rx_IgnoreCRC 0x00000040 /* 1:Ignore CRC Value */
+#define Rx_StripCRC 0x00000010 /* 1:Strip CRC Value */
+#define Rx_ShortEn 0x00000008 /* 1:Short Enable */
+#define Rx_LongEn 0x00000004 /* 1:Long Enable */
+#define Rx_RxHalt 0x00000002 /* 1:Receive Halt Request */
+#define Rx_RxEn 0x00000001 /* 1:Receive Intrrupt Enable */
/* Rx_Stat bit asign ------------------------------------------------------- */
-#define Rx_Halted 0x00008000 /* Rx Halted */
-#define Rx_Good 0x00004000 /* Rx Good */
-#define Rx_RxPar 0x00002000 /* Rx Parity Error */
- /* 0x00001000 not use */
-#define Rx_LongErr 0x00000800 /* Rx Long Error */
-#define Rx_Over 0x00000400 /* Rx Overflow */
-#define Rx_CRCErr 0x00000200 /* Rx CRC Error */
-#define Rx_Align 0x00000100 /* Rx Alignment Error */
-#define Rx_10Stat 0x00000080 /* Rx 10Mbps Status */
-#define Rx_IntRx 0x00000040 /* Rx Interrupt */
-#define Rx_CtlRecd 0x00000020 /* Rx Control Receive */
+#define Rx_Halted 0x00008000 /* Rx Halted */
+#define Rx_Good 0x00004000 /* Rx Good */
+#define Rx_RxPar 0x00002000 /* Rx Parity Error */
+ /* 0x00001000 not use */
+#define Rx_LongErr 0x00000800 /* Rx Long Error */
+#define Rx_Over 0x00000400 /* Rx Overflow */
+#define Rx_CRCErr 0x00000200 /* Rx CRC Error */
+#define Rx_Align 0x00000100 /* Rx Alignment Error */
+#define Rx_10Stat 0x00000080 /* Rx 10Mbps Status */
+#define Rx_IntRx 0x00000040 /* Rx Interrupt */
+#define Rx_CtlRecd 0x00000020 /* Rx Control Receive */
-#define Rx_Stat_Mask 0x0000EFC0 /* Rx All Status Mask */
+#define Rx_Stat_Mask 0x0000EFC0 /* Rx All Status Mask */
/* Int_En bit asign -------------------------------------------------------- */
-#define Int_NRAbtEn 0x00000800 /* 1:Non-recoverable Abort Enable */
-#define Int_TxCtlCmpEn 0x00000400 /* 1:Transmit Control Complete Enable */
-#define Int_DmParErrEn 0x00000200 /* 1:DMA Parity Error Enable */
-#define Int_DParDEn 0x00000100 /* 1:Data Parity Error Enable */
-#define Int_EarNotEn 0x00000080 /* 1:Early Notify Enable */
-#define Int_DParErrEn 0x00000040 /* 1:Detected Parity Error Enable */
-#define Int_SSysErrEn 0x00000020 /* 1:Signalled System Error Enable */
-#define Int_RMasAbtEn 0x00000010 /* 1:Received Master Abort Enable */
-#define Int_RTargAbtEn 0x00000008 /* 1:Received Target Abort Enable */
-#define Int_STargAbtEn 0x00000004 /* 1:Signalled Target Abort Enable */
-#define Int_BLExEn 0x00000002 /* 1:Buffer List Exhausted Enable */
-#define Int_FDAExEn 0x00000001 /* 1:Free Descriptor Area */
- /* Exhausted Enable */
+#define Int_NRAbtEn 0x00000800 /* 1:Non-recoverable Abort Enable */
+#define Int_TxCtlCmpEn 0x00000400 /* 1:Transmit Ctl Complete Enable */
+#define Int_DmParErrEn 0x00000200 /* 1:DMA Parity Error Enable */
+#define Int_DParDEn 0x00000100 /* 1:Data Parity Error Enable */
+#define Int_EarNotEn 0x00000080 /* 1:Early Notify Enable */
+#define Int_DParErrEn 0x00000040 /* 1:Detected Parity Error Enable */
+#define Int_SSysErrEn 0x00000020 /* 1:Signalled System Error Enable */
+#define Int_RMasAbtEn 0x00000010 /* 1:Received Master Abort Enable */
+#define Int_RTargAbtEn 0x00000008 /* 1:Received Target Abort Enable */
+#define Int_STargAbtEn 0x00000004 /* 1:Signalled Target Abort Enable */
+#define Int_BLExEn 0x00000002 /* 1:Buffer List Exhausted Enable */
+#define Int_FDAExEn 0x00000001 /* 1:Free Descriptor Area */
+ /* Exhausted Enable */
/* Int_Src bit asign ------------------------------------------------------- */
-#define Int_NRabt 0x00004000 /* 1:Non Recoverable error */
-#define Int_DmParErrStat 0x00002000 /* 1:DMA Parity Error & Clear */
-#define Int_BLEx 0x00001000 /* 1:Buffer List Empty & Clear */
-#define Int_FDAEx 0x00000800 /* 1:FDA Empty & Clear */
-#define Int_IntNRAbt 0x00000400 /* 1:Non Recoverable Abort */
-#define Int_IntCmp 0x00000200 /* 1:MAC control packet complete */
-#define Int_IntExBD 0x00000100 /* 1:Interrupt Extra BD & Clear */
-#define Int_DmParErr 0x00000080 /* 1:DMA Parity Error & Clear */
-#define Int_IntEarNot 0x00000040 /* 1:Receive Data write & Clear */
-#define Int_SWInt 0x00000020 /* 1:Software request & Clear */
-#define Int_IntBLEx 0x00000010 /* 1:Buffer List Empty & Clear */
-#define Int_IntFDAEx 0x00000008 /* 1:FDA Empty & Clear */
-#define Int_IntPCI 0x00000004 /* 1:PCI controller & Clear */
-#define Int_IntMacRx 0x00000002 /* 1:Rx controller & Clear */
-#define Int_IntMacTx 0x00000001 /* 1:Tx controller & Clear */
+#define Int_NRabt 0x00004000 /* 1:Non Recoverable error */
+#define Int_DmParErrStat 0x00002000 /* 1:DMA Parity Error & Clear */
+#define Int_BLEx 0x00001000 /* 1:Buffer List Empty & Clear */
+#define Int_FDAEx 0x00000800 /* 1:FDA Empty & Clear */
+#define Int_IntNRAbt 0x00000400 /* 1:Non Recoverable Abort */
+#define Int_IntCmp 0x00000200 /* 1:MAC control packet complete */
+#define Int_IntExBD 0x00000100 /* 1:Interrupt Extra BD & Clear */
+#define Int_DmParErr 0x00000080 /* 1:DMA Parity Error & Clear */
+#define Int_IntEarNot 0x00000040 /* 1:Receive Data write & Clear */
+#define Int_SWInt 0x00000020 /* 1:Software request & Clear */
+#define Int_IntBLEx 0x00000010 /* 1:Buffer List Empty & Clear */
+#define Int_IntFDAEx 0x00000008 /* 1:FDA Empty & Clear */
+#define Int_IntPCI 0x00000004 /* 1:PCI controller & Clear */
+#define Int_IntMacRx 0x00000002 /* 1:Rx controller & Clear */
+#define Int_IntMacTx 0x00000001 /* 1:Tx controller & Clear */
/* MD_CA bit asign --------------------------------------------------------- */
-#define MD_CA_PreSup 0x00001000 /* 1:Preamble Supress */
-#define MD_CA_Busy 0x00000800 /* 1:Busy (Start Operation) */
-#define MD_CA_Wr 0x00000400 /* 1:Write 0:Read */
+#define MD_CA_PreSup 0x00001000 /* 1:Preamble Supress */
+#define MD_CA_Busy 0x00000800 /* 1:Busy (Start Operation) */
+#define MD_CA_Wr 0x00000400 /* 1:Write 0:Read */
/*
@@ -307,24 +306,24 @@
#define FD_ALIGN 16
/* Frame Descripter bit asign ---------------------------------------------- */
-#define FD_FDLength_MASK 0x0000FFFF /* Length MASK */
-#define FD_BDCnt_MASK 0x001F0000 /* BD count MASK in FD */
-#define FD_FrmOpt_MASK 0x7C000000 /* Frame option MASK */
+#define FD_FDLength_MASK 0x0000FFFF /* Length MASK */
+#define FD_BDCnt_MASK 0x001F0000 /* BD count MASK in FD */
+#define FD_FrmOpt_MASK 0x7C000000 /* Frame option MASK */
#define FD_FrmOpt_BigEndian 0x40000000 /* Tx/Rx */
-#define FD_FrmOpt_IntTx 0x20000000 /* Tx only */
-#define FD_FrmOpt_NoCRC 0x10000000 /* Tx only */
+#define FD_FrmOpt_IntTx 0x20000000 /* Tx only */
+#define FD_FrmOpt_NoCRC 0x10000000 /* Tx only */
#define FD_FrmOpt_NoPadding 0x08000000 /* Tx only */
#define FD_FrmOpt_Packing 0x04000000 /* Rx only */
-#define FD_CownsFD 0x80000000 /* FD Controller owner bit */
-#define FD_Next_EOL 0x00000001 /* FD EOL indicator */
-#define FD_BDCnt_SHIFT 16
+#define FD_CownsFD 0x80000000 /* FD Controller owner bit */
+#define FD_Next_EOL 0x00000001 /* FD EOL indicator */
+#define FD_BDCnt_SHIFT 16
/* Buffer Descripter bit asign --------------------------------------------- */
-#define BD_BuffLength_MASK 0x0000FFFF /* Recieve Data Size */
-#define BD_RxBDID_MASK 0x00FF0000 /* BD ID Number MASK */
-#define BD_RxBDSeqN_MASK 0x7F000000 /* Rx BD Sequence Number */
-#define BD_CownsBD 0x80000000 /* BD Controller owner bit */
-#define BD_RxBDID_SHIFT 16
+#define BD_BuffLength_MASK 0x0000FFFF /* Recieve Data Size */
+#define BD_RxBDID_MASK 0x00FF0000 /* BD ID Number MASK */
+#define BD_RxBDSeqN_MASK 0x7F000000 /* Rx BD Sequence Number */
+#define BD_CownsBD 0x80000000 /* BD Controller owner bit */
+#define BD_RxBDID_SHIFT 16
#define BD_RxBDSeqN_SHIFT 24
@@ -348,13 +347,15 @@
Int_STargAbtEn | \
Int_BLExEn | Int_FDAExEn) /* maybe 0xb7f*/
#define DMA_CTL_CMD DMA_BURST_SIZE
-#define HAVE_DMA_RXALIGN(lp) likely((lp)->boardtype != TC35815CF)
+#define HAVE_DMA_RXALIGN(lp) likely((lp)->chiptype != TC35815CF)
/* Tuning parameters */
#define DMA_BURST_SIZE 32
#define TX_THRESHOLD 1024
-#define TX_THRESHOLD_MAX 1536 /* used threshold with packet max byte for low pci transfer ability.*/
-#define TX_THRESHOLD_KEEP_LIMIT 10 /* setting threshold max value when overrun error occured this count. */
+/* used threshold with packet max byte for low pci transfer ability.*/
+#define TX_THRESHOLD_MAX 1536
+/* setting threshold max value when overrun error occured this count. */
+#define TX_THRESHOLD_KEEP_LIMIT 10
/* 16 + RX_BUF_NUM * 8 + RX_FD_NUM * 16 + TX_FD_NUM * 32 <= PAGE_SIZE*FD_PAGE_NUM */
#ifdef TC35815_USE_PACKEDBUFFER
@@ -396,21 +397,12 @@
};
-#define tc_readl(addr) readl(addr)
-#define tc_writel(d, addr) writel(d, addr)
+#define tc_readl(addr) ioread32(addr)
+#define tc_writel(d, addr) iowrite32(d, addr)
#define TC35815_TX_TIMEOUT msecs_to_jiffies(400)
-/* Timer state engine. */
-enum tc35815_timer_state {
- arbwait = 0, /* Waiting for auto negotiation to complete. */
- lupwait = 1, /* Auto-neg complete, awaiting link-up status. */
- ltrywait = 2, /* Forcing try of all modes, from fastest to slowest. */
- asleep = 3, /* Time inactive. */
- lcheck = 4, /* Check link status. */
-};
-
-/* Information that need to be kept for each board. */
+/* Information that need to be kept for each controller. */
struct tc35815_local {
struct pci_dev *pci_dev;
@@ -418,12 +410,11 @@
struct napi_struct napi;
/* statistics */
- struct net_device_stats stats;
struct {
int max_tx_qlen;
int tx_ints;
int rx_ints;
- int tx_underrun;
+ int tx_underrun;
} lstats;
/* Tx control lock. This protects the transmit buffer ring
@@ -433,12 +424,12 @@
*/
spinlock_t lock;
- int phy_addr;
- int fullduplex;
- unsigned short saved_lpa;
- struct timer_list timer;
- enum tc35815_timer_state timer_state; /* State of auto-neg timer. */
- unsigned int timer_ticks; /* Number of clicks at each state */
+ struct mii_bus mii_bus;
+ struct phy_device *phy_dev;
+ int duplex;
+ int speed;
+ int link;
+ struct work_struct restart_work;
/*
* Transmitting: Batch Mode.
@@ -452,7 +443,7 @@
* RX_BUF_NUM BD in Free Buffer FD.
* One Free Buffer BD has ETH_FRAME_LEN data buffer.
*/
- void * fd_buf; /* for TxFD, RxFD, FrFD */
+ void *fd_buf; /* for TxFD, RxFD, FrFD */
dma_addr_t fd_buf_dma;
struct TxFD *tfd_base;
unsigned int tfd_start;
@@ -463,7 +454,7 @@
struct FrFD *fbl_ptr;
#ifdef TC35815_USE_PACKEDBUFFER
unsigned char fbl_curid;
- void * data_buf[RX_BUF_NUM]; /* packing */
+ void *data_buf[RX_BUF_NUM]; /* packing */
dma_addr_t data_buf_dma[RX_BUF_NUM];
struct {
struct sk_buff *skb;
@@ -476,10 +467,8 @@
dma_addr_t skb_dma;
} tx_skbs[TX_FD_NUM], rx_skbs[RX_BUF_NUM];
#endif
- struct mii_if_info mii;
- unsigned short mii_id[2];
u32 msg_enable;
- board_t boardtype;
+ enum tc35815_chiptype chiptype;
};
static inline dma_addr_t fd_virt_to_bus(struct tc35815_local *lp, void *virt)
@@ -506,13 +495,14 @@
}
#define TC35815_DMA_SYNC_ONDEMAND
-static void* alloc_rxbuf_page(struct pci_dev *hwdev, dma_addr_t *dma_handle)
+static void *alloc_rxbuf_page(struct pci_dev *hwdev, dma_addr_t *dma_handle)
{
#ifdef TC35815_DMA_SYNC_ONDEMAND
void *buf;
/* pci_map + pci_dma_sync will be more effective than
* pci_alloc_consistent on some archs. */
- if ((buf = (void *)__get_free_page(GFP_ATOMIC)) == NULL)
+ buf = (void *)__get_free_page(GFP_ATOMIC);
+ if (!buf)
return NULL;
*dma_handle = pci_map_single(hwdev, buf, PAGE_SIZE,
PCI_DMA_FROMDEVICE);
@@ -577,7 +567,7 @@
static int tc35815_close(struct net_device *dev);
static struct net_device_stats *tc35815_get_stats(struct net_device *dev);
static void tc35815_set_multicast_list(struct net_device *dev);
-static void tc35815_tx_timeout(struct net_device *dev);
+static void tc35815_tx_timeout(struct net_device *dev);
static int tc35815_ioctl(struct net_device *dev, struct ifreq *rq, int cmd);
#ifdef CONFIG_NET_POLL_CONTROLLER
static void tc35815_poll_controller(struct net_device *dev);
@@ -585,21 +575,225 @@
static const struct ethtool_ops tc35815_ethtool_ops;
/* Example routines you must write ;->. */
-static void tc35815_chip_reset(struct net_device *dev);
-static void tc35815_chip_init(struct net_device *dev);
-static void tc35815_find_phy(struct net_device *dev);
-static void tc35815_phy_chip_init(struct net_device *dev);
+static void tc35815_chip_reset(struct net_device *dev);
+static void tc35815_chip_init(struct net_device *dev);
#ifdef DEBUG
static void panic_queues(struct net_device *dev);
#endif
-static void tc35815_timer(unsigned long data);
-static void tc35815_start_auto_negotiation(struct net_device *dev,
- struct ethtool_cmd *ep);
-static int tc_mdio_read(struct net_device *dev, int phy_id, int location);
-static void tc_mdio_write(struct net_device *dev, int phy_id, int location,
- int val);
+static void tc35815_restart_work(struct work_struct *work);
+
+static int tc_mdio_read(struct mii_bus *bus, int mii_id, int regnum)
+{
+ struct net_device *dev = bus->priv;
+ struct tc35815_regs __iomem *tr =
+ (struct tc35815_regs __iomem *)dev->base_addr;
+ unsigned long timeout = jiffies + 10;
+
+ tc_writel(MD_CA_Busy | (mii_id << 5) | (regnum & 0x1f), &tr->MD_CA);
+ while (tc_readl(&tr->MD_CA) & MD_CA_Busy) {
+ if (time_after(jiffies, timeout))
+ return -EIO;
+ cpu_relax();
+ }
+ return tc_readl(&tr->MD_Data) & 0xffff;
+}
+
+static int tc_mdio_write(struct mii_bus *bus, int mii_id, int regnum, u16 val)
+{
+ struct net_device *dev = bus->priv;
+ struct tc35815_regs __iomem *tr =
+ (struct tc35815_regs __iomem *)dev->base_addr;
+ unsigned long timeout = jiffies + 10;
+
+ tc_writel(val, &tr->MD_Data);
+ tc_writel(MD_CA_Busy | MD_CA_Wr | (mii_id << 5) | (regnum & 0x1f),
+ &tr->MD_CA);
+ while (tc_readl(&tr->MD_CA) & MD_CA_Busy) {
+ if (time_after(jiffies, timeout))
+ return -EIO;
+ cpu_relax();
+ }
+ return 0;
+}
+
+static void tc_handle_link_change(struct net_device *dev)
+{
+ struct tc35815_local *lp = netdev_priv(dev);
+ struct phy_device *phydev = lp->phy_dev;
+ unsigned long flags;
+ int status_change = 0;
+
+ spin_lock_irqsave(&lp->lock, flags);
+ if (phydev->link &&
+ (lp->speed != phydev->speed || lp->duplex != phydev->duplex)) {
+ struct tc35815_regs __iomem *tr =
+ (struct tc35815_regs __iomem *)dev->base_addr;
+ u32 reg;
+
+ reg = tc_readl(&tr->MAC_Ctl);
+ reg |= MAC_HaltReq;
+ tc_writel(reg, &tr->MAC_Ctl);
+ if (phydev->duplex == DUPLEX_FULL)
+ reg |= MAC_FullDup;
+ else
+ reg &= ~MAC_FullDup;
+ tc_writel(reg, &tr->MAC_Ctl);
+ reg &= ~MAC_HaltReq;
+ tc_writel(reg, &tr->MAC_Ctl);
+
+ /*
+ * TX4939 PCFG.SPEEDn bit will be changed on
+ * NETDEV_CHANGE event.
+ */
+
+#if !defined(NO_CHECK_CARRIER) && defined(WORKAROUND_LOSTCAR)
+ /*
+ * WORKAROUND: enable LostCrS only if half duplex
+ * operation.
+ * (TX4939 does not have EnLCarr)
+ */
+ if (phydev->duplex == DUPLEX_HALF &&
+ lp->chiptype != TC35815_TX4939)
+ tc_writel(tc_readl(&tr->Tx_Ctl) | Tx_EnLCarr,
+ &tr->Tx_Ctl);
+#endif
+
+ lp->speed = phydev->speed;
+ lp->duplex = phydev->duplex;
+ status_change = 1;
+ }
+
+ if (phydev->link != lp->link) {
+ if (phydev->link) {
+#ifdef WORKAROUND_100HALF_PROMISC
+ /* delayed promiscuous enabling */
+ if (dev->flags & IFF_PROMISC)
+ tc35815_set_multicast_list(dev);
+#endif
+ netif_schedule(dev);
+ } else {
+ lp->speed = 0;
+ lp->duplex = -1;
+ }
+ lp->link = phydev->link;
+
+ status_change = 1;
+ }
+ spin_unlock_irqrestore(&lp->lock, flags);
+
+ if (status_change && netif_msg_link(lp)) {
+ phy_print_status(phydev);
+#ifdef DEBUG
+ printk(KERN_DEBUG
+ "%s: MII BMCR %04x BMSR %04x LPA %04x\n",
+ dev->name,
+ phy_read(phydev, MII_BMCR),
+ phy_read(phydev, MII_BMSR),
+ phy_read(phydev, MII_LPA));
+#endif
+ }
+}
+
+static int tc_mii_probe(struct net_device *dev)
+{
+ struct tc35815_local *lp = netdev_priv(dev);
+ struct phy_device *phydev = NULL;
+ int phy_addr;
+ u32 dropmask;
+
+ /* find the first phy */
+ for (phy_addr = 0; phy_addr < PHY_MAX_ADDR; phy_addr++) {
+ if (lp->mii_bus.phy_map[phy_addr]) {
+ if (phydev) {
+ printk(KERN_ERR "%s: multiple PHYs found\n",
+ dev->name);
+ return -EINVAL;
+ }
+ phydev = lp->mii_bus.phy_map[phy_addr];
+ break;
+ }
+ }
+
+ if (!phydev) {
+ printk(KERN_ERR "%s: no PHY found\n", dev->name);
+ return -ENODEV;
+ }
+
+ /* attach the mac to the phy */
+ phydev = phy_connect(dev, phydev->dev.bus_id,
+ &tc_handle_link_change, 0,
+ lp->chiptype == TC35815_TX4939 ?
+ PHY_INTERFACE_MODE_RMII : PHY_INTERFACE_MODE_MII);
+ if (IS_ERR(phydev)) {
+ printk(KERN_ERR "%s: Could not attach to PHY\n", dev->name);
+ return PTR_ERR(phydev);
+ }
+ printk(KERN_INFO "%s: attached PHY driver [%s] "
+ "(mii_bus:phy_addr=%s, id=%x)\n",
+ dev->name, phydev->drv->name, phydev->dev.bus_id,
+ phydev->phy_id);
+
+ /* mask with MAC supported features */
+ phydev->supported &= PHY_BASIC_FEATURES;
+ dropmask = 0;
+ if (options.speed == 10)
+ dropmask |= SUPPORTED_100baseT_Half | SUPPORTED_100baseT_Full;
+ else if (options.speed == 100)
+ dropmask |= SUPPORTED_10baseT_Half | SUPPORTED_10baseT_Full;
+ if (options.duplex == 1)
+ dropmask |= SUPPORTED_10baseT_Full | SUPPORTED_100baseT_Full;
+ else if (options.duplex == 2)
+ dropmask |= SUPPORTED_10baseT_Half | SUPPORTED_100baseT_Half;
+ phydev->supported &= ~dropmask;
+ phydev->advertising = phydev->supported;
+
+ lp->link = 0;
+ lp->speed = 0;
+ lp->duplex = -1;
+ lp->phy_dev = phydev;
+
+ return 0;
+}
+
+static int tc_mii_init(struct net_device *dev)
+{
+ struct tc35815_local *lp = netdev_priv(dev);
+ int err;
+ int i;
+
+ lp->mii_bus.name = "tc35815_mii_bus";
+ lp->mii_bus.read = tc_mdio_read;
+ lp->mii_bus.write = tc_mdio_write;
+ snprintf(lp->mii_bus.id, MII_BUS_ID_SIZE, "%x",
+ (lp->pci_dev->bus->number << 8) | lp->pci_dev->devfn);
+ lp->mii_bus.priv = dev;
+ lp->mii_bus.dev = &lp->pci_dev->dev;
+ lp->mii_bus.irq = kmalloc(sizeof(int) * PHY_MAX_ADDR, GFP_KERNEL);
+ if (!lp->mii_bus.irq) {
+ err = -ENOMEM;
+ goto err_out;
+ }
+
+ for (i = 0; i < PHY_MAX_ADDR; i++)
+ lp->mii_bus.irq[i] = PHY_POLL;
+
+ err = mdiobus_register(&lp->mii_bus);
+ if (err)
+ goto err_out_free_mdio_irq;
+ err = tc_mii_probe(dev);
+ if (err)
+ goto err_out_unregister_bus;
+ return 0;
+
+err_out_unregister_bus:
+ mdiobus_unregister(&lp->mii_bus);
+err_out_free_mdio_irq:
+ kfree(lp->mii_bus.irq);
+err_out:
+ return err;
+}
#ifdef CONFIG_CPU_TX49XX
/*
@@ -617,7 +811,7 @@
static int __devinit tc35815_read_plat_dev_addr(struct net_device *dev)
{
- struct tc35815_local *lp = dev->priv;
+ struct tc35815_local *lp = netdev_priv(dev);
struct device *pd = bus_find_device(&platform_bus_type, NULL,
lp->pci_dev, tc35815_mac_match);
if (pd) {
@@ -635,7 +829,7 @@
}
#endif
-static int __devinit tc35815_init_dev_addr (struct net_device *dev)
+static int __devinit tc35815_init_dev_addr(struct net_device *dev)
{
struct tc35815_regs __iomem *tr =
(struct tc35815_regs __iomem *)dev->base_addr;
@@ -657,21 +851,21 @@
return 0;
}
-static int __devinit tc35815_init_one (struct pci_dev *pdev,
- const struct pci_device_id *ent)
+static int __devinit tc35815_init_one(struct pci_dev *pdev,
+ const struct pci_device_id *ent)
{
void __iomem *ioaddr = NULL;
struct net_device *dev;
struct tc35815_local *lp;
int rc;
- unsigned long mmio_start, mmio_end, mmio_flags, mmio_len;
+ DECLARE_MAC_BUF(mac);
static int printed_version;
if (!printed_version++) {
printk(version);
dev_printk(KERN_DEBUG, &pdev->dev,
- "speed:%d duplex:%d doforce:%d\n",
- options.speed, options.duplex, options.doforce);
+ "speed:%d duplex:%d\n",
+ options.speed, options.duplex);
}
if (!pdev->irq) {
@@ -680,55 +874,24 @@
}
/* dev zeroed in alloc_etherdev */
- dev = alloc_etherdev (sizeof (*lp));
+ dev = alloc_etherdev(sizeof(*lp));
if (dev == NULL) {
dev_err(&pdev->dev, "unable to alloc new ethernet\n");
return -ENOMEM;
}
SET_NETDEV_DEV(dev, &pdev->dev);
- lp = dev->priv;
+ lp = netdev_priv(dev);
lp->dev = dev;
/* enable device (incl. PCI PM wakeup), and bus-mastering */
- rc = pci_enable_device (pdev);
+ rc = pcim_enable_device(pdev);
if (rc)
goto err_out;
-
- mmio_start = pci_resource_start (pdev, 1);
- mmio_end = pci_resource_end (pdev, 1);
- mmio_flags = pci_resource_flags (pdev, 1);
- mmio_len = pci_resource_len (pdev, 1);
-
- /* set this immediately, we need to know before
- * we talk to the chip directly */
-
- /* make sure PCI base addr 1 is MMIO */
- if (!(mmio_flags & IORESOURCE_MEM)) {
- dev_err(&pdev->dev, "region #1 not an MMIO resource, aborting\n");
- rc = -ENODEV;
- goto err_out;
- }
-
- /* check for weird/broken PCI region reporting */
- if ((mmio_len < sizeof(struct tc35815_regs))) {
- dev_err(&pdev->dev, "Invalid PCI region size(s), aborting\n");
- rc = -ENODEV;
- goto err_out;
- }
-
- rc = pci_request_regions (pdev, MODNAME);
+ rc = pcim_iomap_regions(pdev, 1 << 1, MODNAME);
if (rc)
goto err_out;
-
- pci_set_master (pdev);
-
- /* ioremap MMIO region */
- ioaddr = ioremap (mmio_start, mmio_len);
- if (ioaddr == NULL) {
- dev_err(&pdev->dev, "cannot remap MMIO, aborting\n");
- rc = -EIO;
- goto err_out_free_res;
- }
+ pci_set_master(pdev);
+ ioaddr = pcim_iomap_table(pdev)[1];
/* Initialize the device structure. */
dev->open = tc35815_open;
@@ -748,11 +911,12 @@
#endif
dev->irq = pdev->irq;
- dev->base_addr = (unsigned long) ioaddr;
+ dev->base_addr = (unsigned long)ioaddr;
+ INIT_WORK(&lp->restart_work, tc35815_restart_work);
spin_lock_init(&lp->lock);
lp->pci_dev = pdev;
- lp->boardtype = ent->driver_data;
+ lp->chiptype = ent->driver_data;
lp->msg_enable = NETIF_MSG_TX_ERR | NETIF_MSG_HW | NETIF_MSG_DRV | NETIF_MSG_LINK;
pci_set_drvdata(pdev, dev);
@@ -766,68 +930,49 @@
random_ether_addr(dev->dev_addr);
}
- rc = register_netdev (dev);
+ rc = register_netdev(dev);
if (rc)
- goto err_out_unmap;
+ goto err_out;
memcpy(dev->perm_addr, dev->dev_addr, dev->addr_len);
- printk(KERN_INFO "%s: %s at 0x%lx, "
- "%2.2x:%2.2x:%2.2x:%2.2x:%2.2x:%2.2x, "
- "IRQ %d\n",
+ printk(KERN_INFO "%s: %s at 0x%lx, %s, IRQ %d\n",
dev->name,
- board_info[ent->driver_data].name,
+ chip_info[ent->driver_data].name,
dev->base_addr,
- dev->dev_addr[0], dev->dev_addr[1],
- dev->dev_addr[2], dev->dev_addr[3],
- dev->dev_addr[4], dev->dev_addr[5],
+ print_mac(mac, dev->dev_addr),
dev->irq);
- setup_timer(&lp->timer, tc35815_timer, (unsigned long) dev);
- lp->mii.dev = dev;
- lp->mii.mdio_read = tc_mdio_read;
- lp->mii.mdio_write = tc_mdio_write;
- lp->mii.phy_id_mask = 0x1f;
- lp->mii.reg_num_mask = 0x1f;
- tc35815_find_phy(dev);
- lp->mii.phy_id = lp->phy_addr;
- lp->mii.full_duplex = 0;
- lp->mii.force_media = 0;
+ rc = tc_mii_init(dev);
+ if (rc)
+ goto err_out_unregister;
return 0;
-err_out_unmap:
- iounmap(ioaddr);
-err_out_free_res:
- pci_release_regions (pdev);
+err_out_unregister:
+ unregister_netdev(dev);
err_out:
- free_netdev (dev);
+ free_netdev(dev);
return rc;
}
-static void __devexit tc35815_remove_one (struct pci_dev *pdev)
+static void __devexit tc35815_remove_one(struct pci_dev *pdev)
{
- struct net_device *dev = pci_get_drvdata (pdev);
- unsigned long mmio_addr;
+ struct net_device *dev = pci_get_drvdata(pdev);
+ struct tc35815_local *lp = netdev_priv(dev);
- mmio_addr = dev->base_addr;
-
- unregister_netdev (dev);
-
- if (mmio_addr) {
- iounmap ((void __iomem *)mmio_addr);
- pci_release_regions (pdev);
- }
-
- free_netdev (dev);
-
- pci_set_drvdata (pdev, NULL);
+ phy_disconnect(lp->phy_dev);
+ mdiobus_unregister(&lp->mii_bus);
+ kfree(lp->mii_bus.irq);
+ unregister_netdev(dev);
+ free_netdev(dev);
+ pci_set_drvdata(pdev, NULL);
}
static int
tc35815_init_queues(struct net_device *dev)
{
- struct tc35815_local *lp = dev->priv;
+ struct tc35815_local *lp = netdev_priv(dev);
int i;
unsigned long fd_addr;
@@ -838,11 +983,17 @@
sizeof(struct TxFD) * TX_FD_NUM >
PAGE_SIZE * FD_PAGE_NUM);
- if ((lp->fd_buf = pci_alloc_consistent(lp->pci_dev, PAGE_SIZE * FD_PAGE_NUM, &lp->fd_buf_dma)) == 0)
+ lp->fd_buf = pci_alloc_consistent(lp->pci_dev,
+ PAGE_SIZE * FD_PAGE_NUM,
+ &lp->fd_buf_dma);
+ if (!lp->fd_buf)
return -ENOMEM;
for (i = 0; i < RX_BUF_NUM; i++) {
#ifdef TC35815_USE_PACKEDBUFFER
- if ((lp->data_buf[i] = alloc_rxbuf_page(lp->pci_dev, &lp->data_buf_dma[i])) == NULL) {
+ lp->data_buf[i] =
+ alloc_rxbuf_page(lp->pci_dev,
+ &lp->data_buf_dma[i]);
+ if (!lp->data_buf[i]) {
while (--i >= 0) {
free_rxbuf_page(lp->pci_dev,
lp->data_buf[i],
@@ -885,18 +1036,17 @@
#endif
printk("\n");
} else {
- for (i = 0; i < FD_PAGE_NUM; i++) {
- clear_page((void *)((unsigned long)lp->fd_buf + i * PAGE_SIZE));
- }
+ for (i = 0; i < FD_PAGE_NUM; i++)
+ clear_page((void *)((unsigned long)lp->fd_buf +
+ i * PAGE_SIZE));
}
fd_addr = (unsigned long)lp->fd_buf;
/* Free Descriptors (for Receive) */
lp->rfd_base = (struct RxFD *)fd_addr;
fd_addr += sizeof(struct RxFD) * RX_FD_NUM;
- for (i = 0; i < RX_FD_NUM; i++) {
+ for (i = 0; i < RX_FD_NUM; i++)
lp->rfd_base[i].fd.FDCtl = cpu_to_le32(FD_CownsFD);
- }
lp->rfd_cur = lp->rfd_base;
lp->rfd_limit = (struct RxFD *)fd_addr - (RX_FD_RESERVE + 1);
@@ -964,7 +1114,7 @@
static void
tc35815_clear_queues(struct net_device *dev)
{
- struct tc35815_local *lp = dev->priv;
+ struct tc35815_local *lp = netdev_priv(dev);
int i;
for (i = 0; i < TX_FD_NUM; i++) {
@@ -995,7 +1145,7 @@
static void
tc35815_free_queues(struct net_device *dev)
{
- struct tc35815_local *lp = dev->priv;
+ struct tc35815_local *lp = netdev_priv(dev);
int i;
if (lp->tfd_base) {
@@ -1076,7 +1226,7 @@
le32_to_cpu(fd->fd.FDStat),
le32_to_cpu(fd->fd.FDCtl));
if (le32_to_cpu(fd->fd.FDCtl) & FD_CownsFD)
- return 0;
+ return 0;
printk("BD: ");
for (i = 0; i < bd_count; i++)
printk(" %08x %08x",
@@ -1109,7 +1259,7 @@
static void
panic_queues(struct net_device *dev)
{
- struct tc35815_local *lp = dev->priv;
+ struct tc35815_local *lp = netdev_priv(dev);
int i;
printk("TxFD base %p, start %u, end %u\n",
@@ -1128,42 +1278,33 @@
}
#endif
-static void print_eth(char *add)
+static void print_eth(const u8 *add)
{
- int i;
+ DECLARE_MAC_BUF(mac);
- printk("print_eth(%p)\n", add);
- for (i = 0; i < 6; i++)
- printk(" %2.2X", (unsigned char) add[i + 6]);
- printk(" =>");
- for (i = 0; i < 6; i++)
- printk(" %2.2X", (unsigned char) add[i]);
- printk(" : %2.2X%2.2X\n", (unsigned char) add[12], (unsigned char) add[13]);
+ printk(KERN_DEBUG "print_eth(%p)\n", add);
+ printk(KERN_DEBUG " %s =>", print_mac(mac, add + 6));
+ printk(KERN_CONT " %s : %02x%02x\n",
+ print_mac(mac, add), add[12], add[13]);
}
static int tc35815_tx_full(struct net_device *dev)
{
- struct tc35815_local *lp = dev->priv;
+ struct tc35815_local *lp = netdev_priv(dev);
return ((lp->tfd_start + 1) % TX_FD_NUM == lp->tfd_end);
}
static void tc35815_restart(struct net_device *dev)
{
- struct tc35815_local *lp = dev->priv;
- int pid = lp->phy_addr;
- int do_phy_reset = 1;
- del_timer(&lp->timer); /* Kill if running */
+ struct tc35815_local *lp = netdev_priv(dev);
- if (lp->mii_id[0] == 0x0016 && (lp->mii_id[1] & 0xfc00) == 0xf800) {
- /* Resetting PHY cause problem on some chip... (SEEQ 80221) */
- do_phy_reset = 0;
- }
- if (do_phy_reset) {
+ if (lp->phy_dev) {
int timeout;
- tc_mdio_write(dev, pid, MII_BMCR, BMCR_RESET);
+
+ phy_write(lp->phy_dev, MII_BMCR, BMCR_RESET);
timeout = 100;
while (--timeout) {
- if (!(tc_mdio_read(dev, pid, MII_BMCR) & BMCR_RESET))
+ if (!(phy_read(lp->phy_dev, MII_BMCR) & BMCR_RESET))
break;
udelay(1);
}
@@ -1171,16 +1312,40 @@
printk(KERN_ERR "%s: BMCR reset failed.\n", dev->name);
}
+ spin_lock_irq(&lp->lock);
tc35815_chip_reset(dev);
tc35815_clear_queues(dev);
tc35815_chip_init(dev);
/* Reconfigure CAM again since tc35815_chip_init() initialize it. */
tc35815_set_multicast_list(dev);
+ spin_unlock_irq(&lp->lock);
+
+ netif_wake_queue(dev);
+}
+
+static void tc35815_restart_work(struct work_struct *work)
+{
+ struct tc35815_local *lp =
+ container_of(work, struct tc35815_local, restart_work);
+ struct net_device *dev = lp->dev;
+
+ tc35815_restart(dev);
+}
+
+static void tc35815_schedule_restart(struct net_device *dev)
+{
+ struct tc35815_local *lp = netdev_priv(dev);
+ struct tc35815_regs __iomem *tr =
+ (struct tc35815_regs __iomem *)dev->base_addr;
+
+ /* disable interrupts */
+ tc_writel(0, &tr->Int_En);
+ tc_writel(tc_readl(&tr->DMA_Ctl) | DMA_IntMask, &tr->DMA_Ctl);
+ schedule_work(&lp->restart_work);
}
static void tc35815_tx_timeout(struct net_device *dev)
{
- struct tc35815_local *lp = dev->priv;
struct tc35815_regs __iomem *tr =
(struct tc35815_regs __iomem *)dev->base_addr;
@@ -1188,28 +1353,12 @@
dev->name, tc_readl(&tr->Tx_Stat));
/* Try to restart the adaptor. */
- spin_lock_irq(&lp->lock);
- tc35815_restart(dev);
- spin_unlock_irq(&lp->lock);
-
- lp->stats.tx_errors++;
-
- /* If we have space available to accept new transmit
- * requests, wake up the queueing layer. This would
- * be the case if the chipset_init() call above just
- * flushes out the tx queue and empties it.
- *
- * If instead, the tx queue is retained then the
- * netif_wake_queue() call should be placed in the
- * TX completion interrupt handler of the driver instead
- * of here.
- */
- if (!tc35815_tx_full(dev))
- netif_wake_queue(dev);
+ tc35815_schedule_restart(dev);
+ dev->stats.tx_errors++;
}
/*
- * Open/initialize the board. This is called (in the current kernel)
+ * Open/initialize the controller. This is called (in the current kernel)
* sometime after booting when the 'ifconfig' program is run.
*
* This routine should set everything up anew at each open, even
@@ -1219,17 +1368,16 @@
static int
tc35815_open(struct net_device *dev)
{
- struct tc35815_local *lp = dev->priv;
+ struct tc35815_local *lp = netdev_priv(dev);
/*
* This is used if the interrupt line can turned off (shared).
* See 3c503.c for an example of selecting the IRQ at config-time.
*/
- if (request_irq(dev->irq, &tc35815_interrupt, IRQF_SHARED, dev->name, dev)) {
+ if (request_irq(dev->irq, &tc35815_interrupt, IRQF_SHARED,
+ dev->name, dev))
return -EAGAIN;
- }
- del_timer(&lp->timer); /* Kill if running */
tc35815_chip_reset(dev);
if (tc35815_init_queues(dev) != 0) {
@@ -1246,6 +1394,9 @@
tc35815_chip_init(dev);
spin_unlock_irq(&lp->lock);
+ /* schedule a link state check */
+ phy_start(lp->phy_dev);
+
/* We are now ready to accept transmit requeusts from
* the queueing layer of the networking.
*/
@@ -1261,7 +1412,7 @@
*/
static int tc35815_send_packet(struct sk_buff *skb, struct net_device *dev)
{
- struct tc35815_local *lp = dev->priv;
+ struct tc35815_local *lp = netdev_priv(dev);
struct TxFD *txfd;
unsigned long flags;
@@ -1366,7 +1517,7 @@
panic("%s: Too many fatal errors.", dev->name);
printk(KERN_WARNING "%s: Resetting ...\n", dev->name);
/* Try to restart the adaptor. */
- tc35815_restart(dev);
+ tc35815_schedule_restart(dev);
}
#ifdef TC35815_NAPI
@@ -1375,7 +1526,7 @@
static int tc35815_do_interrupt(struct net_device *dev, u32 status)
#endif
{
- struct tc35815_local *lp = dev->priv;
+ struct tc35815_local *lp = netdev_priv(dev);
struct tc35815_regs __iomem *tr =
(struct tc35815_regs __iomem *)dev->base_addr;
int ret = -1;
@@ -1392,7 +1543,7 @@
printk(KERN_WARNING
"%s: Free Descriptor Area Exhausted (%#x).\n",
dev->name, status);
- lp->stats.rx_dropped++;
+ dev->stats.rx_dropped++;
ret = 0;
}
if (status & Int_IntBLEx) {
@@ -1401,14 +1552,14 @@
printk(KERN_WARNING
"%s: Buffer List Exhausted (%#x).\n",
dev->name, status);
- lp->stats.rx_dropped++;
+ dev->stats.rx_dropped++;
ret = 0;
}
if (status & Int_IntExBD) {
printk(KERN_WARNING
"%s: Excessive Buffer Descriptiors (%#x).\n",
dev->name, status);
- lp->stats.rx_length_errors++;
+ dev->stats.rx_length_errors++;
ret = 0;
}
@@ -1492,7 +1643,7 @@
tc35815_rx(struct net_device *dev)
#endif
{
- struct tc35815_local *lp = dev->priv;
+ struct tc35815_local *lp = netdev_priv(dev);
unsigned int fdctl;
int i;
int buf_free_count = 0;
@@ -1532,7 +1683,7 @@
if (skb == NULL) {
printk(KERN_NOTICE "%s: Memory squeeze, dropping packet.\n",
dev->name);
- lp->stats.rx_dropped++;
+ dev->stats.rx_dropped++;
break;
}
skb_reserve(skb, 2); /* 16 bit alignment */
@@ -1602,10 +1753,10 @@
netif_rx(skb);
#endif
dev->last_rx = jiffies;
- lp->stats.rx_packets++;
- lp->stats.rx_bytes += pkt_len;
+ dev->stats.rx_packets++;
+ dev->stats.rx_bytes += pkt_len;
} else {
- lp->stats.rx_errors++;
+ dev->stats.rx_errors++;
printk(KERN_DEBUG "%s: Rx error (status %x)\n",
dev->name, status & Rx_Stat_Mask);
/* WORKAROUND: LongErr and CRCErr means Overflow. */
@@ -1613,10 +1764,14 @@
status &= ~(Rx_LongErr|Rx_CRCErr);
status |= Rx_Over;
}
- if (status & Rx_LongErr) lp->stats.rx_length_errors++;
- if (status & Rx_Over) lp->stats.rx_fifo_errors++;
- if (status & Rx_CRCErr) lp->stats.rx_crc_errors++;
- if (status & Rx_Align) lp->stats.rx_frame_errors++;
+ if (status & Rx_LongErr)
+ dev->stats.rx_length_errors++;
+ if (status & Rx_Over)
+ dev->stats.rx_fifo_errors++;
+ if (status & Rx_CRCErr)
+ dev->stats.rx_crc_errors++;
+ if (status & Rx_Align)
+ dev->stats.rx_frame_errors++;
}
if (bd_count > 0) {
@@ -1772,40 +1927,39 @@
static void
tc35815_check_tx_stat(struct net_device *dev, int status)
{
- struct tc35815_local *lp = dev->priv;
+ struct tc35815_local *lp = netdev_priv(dev);
const char *msg = NULL;
/* count collisions */
if (status & Tx_ExColl)
- lp->stats.collisions += 16;
+ dev->stats.collisions += 16;
if (status & Tx_TxColl_MASK)
- lp->stats.collisions += status & Tx_TxColl_MASK;
+ dev->stats.collisions += status & Tx_TxColl_MASK;
#ifndef NO_CHECK_CARRIER
/* TX4939 does not have NCarr */
- if (lp->boardtype == TC35815_TX4939)
+ if (lp->chiptype == TC35815_TX4939)
status &= ~Tx_NCarr;
#ifdef WORKAROUND_LOSTCAR
/* WORKAROUND: ignore LostCrS in full duplex operation */
- if ((lp->timer_state != asleep && lp->timer_state != lcheck)
- || lp->fullduplex)
+ if (!lp->link || lp->duplex == DUPLEX_FULL)
status &= ~Tx_NCarr;
#endif
#endif
if (!(status & TX_STA_ERR)) {
/* no error. */
- lp->stats.tx_packets++;
+ dev->stats.tx_packets++;
return;
}
- lp->stats.tx_errors++;
+ dev->stats.tx_errors++;
if (status & Tx_ExColl) {
- lp->stats.tx_aborted_errors++;
+ dev->stats.tx_aborted_errors++;
msg = "Excessive Collision.";
}
if (status & Tx_Under) {
- lp->stats.tx_fifo_errors++;
+ dev->stats.tx_fifo_errors++;
msg = "Tx FIFO Underrun.";
if (lp->lstats.tx_underrun < TX_THRESHOLD_KEEP_LIMIT) {
lp->lstats.tx_underrun++;
@@ -1818,25 +1972,25 @@
}
}
if (status & Tx_Defer) {
- lp->stats.tx_fifo_errors++;
+ dev->stats.tx_fifo_errors++;
msg = "Excessive Deferral.";
}
#ifndef NO_CHECK_CARRIER
if (status & Tx_NCarr) {
- lp->stats.tx_carrier_errors++;
+ dev->stats.tx_carrier_errors++;
msg = "Lost Carrier Sense.";
}
#endif
if (status & Tx_LateColl) {
- lp->stats.tx_aborted_errors++;
+ dev->stats.tx_aborted_errors++;
msg = "Late Collision.";
}
if (status & Tx_TxPar) {
- lp->stats.tx_fifo_errors++;
+ dev->stats.tx_fifo_errors++;
msg = "Transmit Parity Error.";
}
if (status & Tx_SQErr) {
- lp->stats.tx_heartbeat_errors++;
+ dev->stats.tx_heartbeat_errors++;
msg = "Signal Quality Error.";
}
if (msg && netif_msg_tx_err(lp))
@@ -1849,7 +2003,7 @@
static void
tc35815_txdone(struct net_device *dev)
{
- struct tc35815_local *lp = dev->priv;
+ struct tc35815_local *lp = netdev_priv(dev);
struct TxFD *txfd;
unsigned int fdctl;
@@ -1878,7 +2032,7 @@
BUG_ON(lp->tx_skbs[lp->tfd_end].skb != skb);
#endif
if (skb) {
- lp->stats.tx_bytes += skb->len;
+ dev->stats.tx_bytes += skb->len;
pci_unmap_single(lp->pci_dev, lp->tx_skbs[lp->tfd_end].skb_dma, skb->len, PCI_DMA_TODEVICE);
lp->tx_skbs[lp->tfd_end].skb = NULL;
lp->tx_skbs[lp->tfd_end].skb_dma = 0;
@@ -1904,7 +2058,7 @@
struct tc35815_regs __iomem *tr =
(struct tc35815_regs __iomem *)dev->base_addr;
int head = (lp->tfd_start + TX_FD_NUM - 1) % TX_FD_NUM;
- struct TxFD* txhead = &lp->tfd_base[head];
+ struct TxFD *txhead = &lp->tfd_base[head];
int qlen = (lp->tfd_start + TX_FD_NUM
- lp->tfd_end) % TX_FD_NUM;
@@ -1939,7 +2093,7 @@
* condition, and space has now been made available,
* wake up the queue.
*/
- if (netif_queue_stopped(dev) && ! tc35815_tx_full(dev))
+ if (netif_queue_stopped(dev) && !tc35815_tx_full(dev))
netif_wake_queue(dev);
}
@@ -1947,16 +2101,17 @@
static int
tc35815_close(struct net_device *dev)
{
- struct tc35815_local *lp = dev->priv;
+ struct tc35815_local *lp = netdev_priv(dev);
netif_stop_queue(dev);
#ifdef TC35815_NAPI
napi_disable(&lp->napi);
#endif
+ if (lp->phy_dev)
+ phy_stop(lp->phy_dev);
+ cancel_work_sync(&lp->restart_work);
/* Flush the Tx and disable Rx here. */
-
- del_timer(&lp->timer); /* Kill if running */
tc35815_chip_reset(dev);
free_irq(dev->irq, dev);
@@ -1972,34 +2127,30 @@
*/
static struct net_device_stats *tc35815_get_stats(struct net_device *dev)
{
- struct tc35815_local *lp = dev->priv;
struct tc35815_regs __iomem *tr =
(struct tc35815_regs __iomem *)dev->base_addr;
- if (netif_running(dev)) {
+ if (netif_running(dev))
/* Update the statistics from the device registers. */
- lp->stats.rx_missed_errors = tc_readl(&tr->Miss_Cnt);
- }
+ dev->stats.rx_missed_errors = tc_readl(&tr->Miss_Cnt);
- return &lp->stats;
+ return &dev->stats;
}
static void tc35815_set_cam_entry(struct net_device *dev, int index, unsigned char *addr)
{
- struct tc35815_local *lp = dev->priv;
+ struct tc35815_local *lp = netdev_priv(dev);
struct tc35815_regs __iomem *tr =
(struct tc35815_regs __iomem *)dev->base_addr;
int cam_index = index * 6;
u32 cam_data;
u32 saved_addr;
+ DECLARE_MAC_BUF(mac);
+
saved_addr = tc_readl(&tr->CAM_Adr);
- if (netif_msg_hw(lp)) {
- int i;
- printk(KERN_DEBUG "%s: CAM %d:", dev->name, index);
- for (i = 0; i < 6; i++)
- printk(" %02x", addr[i]);
- printk("\n");
- }
+ if (netif_msg_hw(lp))
+ printk(KERN_DEBUG "%s: CAM %d: %s\n",
+ dev->name, index, print_mac(mac, addr));
if (index & 1) {
/* read modify write */
tc_writel(cam_index - 2, &tr->CAM_Adr);
@@ -2039,28 +2190,24 @@
struct tc35815_regs __iomem *tr =
(struct tc35815_regs __iomem *)dev->base_addr;
- if (dev->flags&IFF_PROMISC)
- {
+ if (dev->flags & IFF_PROMISC) {
#ifdef WORKAROUND_100HALF_PROMISC
/* With some (all?) 100MHalf HUB, controller will hang
* if we enabled promiscuous mode before linkup... */
- struct tc35815_local *lp = dev->priv;
- int pid = lp->phy_addr;
- if (!(tc_mdio_read(dev, pid, MII_BMSR) & BMSR_LSTATUS))
+ struct tc35815_local *lp = netdev_priv(dev);
+
+ if (!lp->link)
return;
#endif
/* Enable promiscuous mode */
tc_writel(CAM_CompEn | CAM_BroadAcc | CAM_GroupAcc | CAM_StationAcc, &tr->CAM_Ctl);
- }
- else if((dev->flags&IFF_ALLMULTI) || dev->mc_count > CAM_ENTRY_MAX - 3)
- {
+ } else if ((dev->flags & IFF_ALLMULTI) ||
+ dev->mc_count > CAM_ENTRY_MAX - 3) {
/* CAM 0, 1, 20 are reserved. */
/* Disable promiscuous mode, use normal mode. */
tc_writel(CAM_CompEn | CAM_BroadAcc | CAM_GroupAcc, &tr->CAM_Ctl);
- }
- else if(dev->mc_count)
- {
- struct dev_mc_list* cur_addr = dev->mc_list;
+ } else if (dev->mc_count) {
+ struct dev_mc_list *cur_addr = dev->mc_list;
int i;
int ena_bits = CAM_Ena_Bit(CAM_ENTRY_SOURCE);
@@ -2075,8 +2222,7 @@
}
tc_writel(ena_bits, &tr->CAM_Ena);
tc_writel(CAM_CompEn | CAM_BroadAcc, &tr->CAM_Ctl);
- }
- else {
+ } else {
tc_writel(CAM_Ena_Bit(CAM_ENTRY_SOURCE), &tr->CAM_Ena);
tc_writel(CAM_CompEn | CAM_BroadAcc, &tr->CAM_Ctl);
}
@@ -2084,7 +2230,7 @@
static void tc35815_get_drvinfo(struct net_device *dev, struct ethtool_drvinfo *info)
{
- struct tc35815_local *lp = dev->priv;
+ struct tc35815_local *lp = netdev_priv(dev);
strcpy(info->driver, MODNAME);
strcpy(info->version, DRV_VERSION);
strcpy(info->bus_info, pci_name(lp->pci_dev));
@@ -2092,78 +2238,37 @@
static int tc35815_get_settings(struct net_device *dev, struct ethtool_cmd *cmd)
{
- struct tc35815_local *lp = dev->priv;
- spin_lock_irq(&lp->lock);
- mii_ethtool_gset(&lp->mii, cmd);
- spin_unlock_irq(&lp->lock);
- return 0;
+ struct tc35815_local *lp = netdev_priv(dev);
+
+ if (!lp->phy_dev)
+ return -ENODEV;
+ return phy_ethtool_gset(lp->phy_dev, cmd);
}
static int tc35815_set_settings(struct net_device *dev, struct ethtool_cmd *cmd)
{
- struct tc35815_local *lp = dev->priv;
- int rc;
-#if 1 /* use our negotiation method... */
- /* Verify the settings we care about. */
- if (cmd->autoneg != AUTONEG_ENABLE &&
- cmd->autoneg != AUTONEG_DISABLE)
- return -EINVAL;
- if (cmd->autoneg == AUTONEG_DISABLE &&
- ((cmd->speed != SPEED_100 &&
- cmd->speed != SPEED_10) ||
- (cmd->duplex != DUPLEX_HALF &&
- cmd->duplex != DUPLEX_FULL)))
- return -EINVAL;
+ struct tc35815_local *lp = netdev_priv(dev);
- /* Ok, do it to it. */
- spin_lock_irq(&lp->lock);
- del_timer(&lp->timer);
- tc35815_start_auto_negotiation(dev, cmd);
- spin_unlock_irq(&lp->lock);
- rc = 0;
-#else
- spin_lock_irq(&lp->lock);
- rc = mii_ethtool_sset(&lp->mii, cmd);
- spin_unlock_irq(&lp->lock);
-#endif
- return rc;
-}
-
-static int tc35815_nway_reset(struct net_device *dev)
-{
- struct tc35815_local *lp = dev->priv;
- int rc;
- spin_lock_irq(&lp->lock);
- rc = mii_nway_restart(&lp->mii);
- spin_unlock_irq(&lp->lock);
- return rc;
-}
-
-static u32 tc35815_get_link(struct net_device *dev)
-{
- struct tc35815_local *lp = dev->priv;
- int rc;
- spin_lock_irq(&lp->lock);
- rc = mii_link_ok(&lp->mii);
- spin_unlock_irq(&lp->lock);
- return rc;
+ if (!lp->phy_dev)
+ return -ENODEV;
+ return phy_ethtool_sset(lp->phy_dev, cmd);
}
static u32 tc35815_get_msglevel(struct net_device *dev)
{
- struct tc35815_local *lp = dev->priv;
+ struct tc35815_local *lp = netdev_priv(dev);
return lp->msg_enable;
}
static void tc35815_set_msglevel(struct net_device *dev, u32 datum)
{
- struct tc35815_local *lp = dev->priv;
+ struct tc35815_local *lp = netdev_priv(dev);
lp->msg_enable = datum;
}
static int tc35815_get_sset_count(struct net_device *dev, int sset)
{
- struct tc35815_local *lp = dev->priv;
+ struct tc35815_local *lp = netdev_priv(dev);
switch (sset) {
case ETH_SS_STATS:
@@ -2175,7 +2280,7 @@
static void tc35815_get_ethtool_stats(struct net_device *dev, struct ethtool_stats *stats, u64 *data)
{
- struct tc35815_local *lp = dev->priv;
+ struct tc35815_local *lp = netdev_priv(dev);
data[0] = lp->lstats.max_tx_qlen;
data[1] = lp->lstats.tx_ints;
data[2] = lp->lstats.rx_ints;
@@ -2200,8 +2305,7 @@
.get_drvinfo = tc35815_get_drvinfo,
.get_settings = tc35815_get_settings,
.set_settings = tc35815_set_settings,
- .nway_reset = tc35815_nway_reset,
- .get_link = tc35815_get_link,
+ .get_link = ethtool_op_get_link,
.get_msglevel = tc35815_get_msglevel,
.set_msglevel = tc35815_set_msglevel,
.get_strings = tc35815_get_strings,
@@ -2211,611 +2315,13 @@
static int tc35815_ioctl(struct net_device *dev, struct ifreq *rq, int cmd)
{
- struct tc35815_local *lp = dev->priv;
- int rc;
+ struct tc35815_local *lp = netdev_priv(dev);
if (!netif_running(dev))
return -EINVAL;
-
- spin_lock_irq(&lp->lock);
- rc = generic_mii_ioctl(&lp->mii, if_mii(rq), cmd, NULL);
- spin_unlock_irq(&lp->lock);
-
- return rc;
-}
-
-static int tc_mdio_read(struct net_device *dev, int phy_id, int location)
-{
- struct tc35815_regs __iomem *tr =
- (struct tc35815_regs __iomem *)dev->base_addr;
- u32 data;
- tc_writel(MD_CA_Busy | (phy_id << 5) | location, &tr->MD_CA);
- while (tc_readl(&tr->MD_CA) & MD_CA_Busy)
- ;
- data = tc_readl(&tr->MD_Data);
- return data & 0xffff;
-}
-
-static void tc_mdio_write(struct net_device *dev, int phy_id, int location,
- int val)
-{
- struct tc35815_regs __iomem *tr =
- (struct tc35815_regs __iomem *)dev->base_addr;
- tc_writel(val, &tr->MD_Data);
- tc_writel(MD_CA_Busy | MD_CA_Wr | (phy_id << 5) | location, &tr->MD_CA);
- while (tc_readl(&tr->MD_CA) & MD_CA_Busy)
- ;
-}
-
-/* Auto negotiation. The scheme is very simple. We have a timer routine
- * that keeps watching the auto negotiation process as it progresses.
- * The DP83840 is first told to start doing it's thing, we set up the time
- * and place the timer state machine in it's initial state.
- *
- * Here the timer peeks at the DP83840 status registers at each click to see
- * if the auto negotiation has completed, we assume here that the DP83840 PHY
- * will time out at some point and just tell us what (didn't) happen. For
- * complete coverage we only allow so many of the ticks at this level to run,
- * when this has expired we print a warning message and try another strategy.
- * This "other" strategy is to force the interface into various speed/duplex
- * configurations and we stop when we see a link-up condition before the
- * maximum number of "peek" ticks have occurred.
- *
- * Once a valid link status has been detected we configure the BigMAC and
- * the rest of the Happy Meal to speak the most efficient protocol we could
- * get a clean link for. The priority for link configurations, highest first
- * is:
- * 100 Base-T Full Duplex
- * 100 Base-T Half Duplex
- * 10 Base-T Full Duplex
- * 10 Base-T Half Duplex
- *
- * We start a new timer now, after a successful auto negotiation status has
- * been detected. This timer just waits for the link-up bit to get set in
- * the BMCR of the DP83840. When this occurs we print a kernel log message
- * describing the link type in use and the fact that it is up.
- *
- * If a fatal error of some sort is signalled and detected in the interrupt
- * service routine, and the chip is reset, or the link is ifconfig'd down
- * and then back up, this entire process repeats itself all over again.
- */
-/* Note: Above comments are come from sunhme driver. */
-
-static int tc35815_try_next_permutation(struct net_device *dev)
-{
- struct tc35815_local *lp = dev->priv;
- int pid = lp->phy_addr;
- unsigned short bmcr;
-
- bmcr = tc_mdio_read(dev, pid, MII_BMCR);
-
- /* Downgrade from full to half duplex. Only possible via ethtool. */
- if (bmcr & BMCR_FULLDPLX) {
- bmcr &= ~BMCR_FULLDPLX;
- printk(KERN_DEBUG "%s: try next permutation (BMCR %x)\n", dev->name, bmcr);
- tc_mdio_write(dev, pid, MII_BMCR, bmcr);
- return 0;
- }
-
- /* Downgrade from 100 to 10. */
- if (bmcr & BMCR_SPEED100) {
- bmcr &= ~BMCR_SPEED100;
- printk(KERN_DEBUG "%s: try next permutation (BMCR %x)\n", dev->name, bmcr);
- tc_mdio_write(dev, pid, MII_BMCR, bmcr);
- return 0;
- }
-
- /* We've tried everything. */
- return -1;
-}
-
-static void
-tc35815_display_link_mode(struct net_device *dev)
-{
- struct tc35815_local *lp = dev->priv;
- int pid = lp->phy_addr;
- unsigned short lpa, bmcr;
- char *speed = "", *duplex = "";
-
- lpa = tc_mdio_read(dev, pid, MII_LPA);
- bmcr = tc_mdio_read(dev, pid, MII_BMCR);
- if (options.speed ? (bmcr & BMCR_SPEED100) : (lpa & (LPA_100HALF | LPA_100FULL)))
- speed = "100Mb/s";
- else
- speed = "10Mb/s";
- if (options.duplex ? (bmcr & BMCR_FULLDPLX) : (lpa & (LPA_100FULL | LPA_10FULL)))
- duplex = "Full Duplex";
- else
- duplex = "Half Duplex";
-
- if (netif_msg_link(lp))
- printk(KERN_INFO "%s: Link is up at %s, %s.\n",
- dev->name, speed, duplex);
- printk(KERN_DEBUG "%s: MII BMCR %04x BMSR %04x LPA %04x\n",
- dev->name,
- bmcr, tc_mdio_read(dev, pid, MII_BMSR), lpa);
-}
-
-static void tc35815_display_forced_link_mode(struct net_device *dev)
-{
- struct tc35815_local *lp = dev->priv;
- int pid = lp->phy_addr;
- unsigned short bmcr;
- char *speed = "", *duplex = "";
-
- bmcr = tc_mdio_read(dev, pid, MII_BMCR);
- if (bmcr & BMCR_SPEED100)
- speed = "100Mb/s";
- else
- speed = "10Mb/s";
- if (bmcr & BMCR_FULLDPLX)
- duplex = "Full Duplex.\n";
- else
- duplex = "Half Duplex.\n";
-
- if (netif_msg_link(lp))
- printk(KERN_INFO "%s: Link has been forced up at %s, %s",
- dev->name, speed, duplex);
-}
-
-static void tc35815_set_link_modes(struct net_device *dev)
-{
- struct tc35815_local *lp = dev->priv;
- struct tc35815_regs __iomem *tr =
- (struct tc35815_regs __iomem *)dev->base_addr;
- int pid = lp->phy_addr;
- unsigned short bmcr, lpa;
- int speed;
-
- if (lp->timer_state == arbwait) {
- lpa = tc_mdio_read(dev, pid, MII_LPA);
- bmcr = tc_mdio_read(dev, pid, MII_BMCR);
- printk(KERN_DEBUG "%s: MII BMCR %04x BMSR %04x LPA %04x\n",
- dev->name,
- bmcr, tc_mdio_read(dev, pid, MII_BMSR), lpa);
- if (!(lpa & (LPA_10HALF | LPA_10FULL |
- LPA_100HALF | LPA_100FULL))) {
- /* fall back to 10HALF */
- printk(KERN_INFO "%s: bad ability %04x - falling back to 10HD.\n",
- dev->name, lpa);
- lpa = LPA_10HALF;
- }
- if (options.duplex ? (bmcr & BMCR_FULLDPLX) : (lpa & (LPA_100FULL | LPA_10FULL)))
- lp->fullduplex = 1;
- else
- lp->fullduplex = 0;
- if (options.speed ? (bmcr & BMCR_SPEED100) : (lpa & (LPA_100HALF | LPA_100FULL)))
- speed = 100;
- else
- speed = 10;
- } else {
- /* Forcing a link mode. */
- bmcr = tc_mdio_read(dev, pid, MII_BMCR);
- if (bmcr & BMCR_FULLDPLX)
- lp->fullduplex = 1;
- else
- lp->fullduplex = 0;
- if (bmcr & BMCR_SPEED100)
- speed = 100;
- else
- speed = 10;
- }
-
- tc_writel(tc_readl(&tr->MAC_Ctl) | MAC_HaltReq, &tr->MAC_Ctl);
- if (lp->fullduplex) {
- tc_writel(tc_readl(&tr->MAC_Ctl) | MAC_FullDup, &tr->MAC_Ctl);
- } else {
- tc_writel(tc_readl(&tr->MAC_Ctl) & ~MAC_FullDup, &tr->MAC_Ctl);
- }
- tc_writel(tc_readl(&tr->MAC_Ctl) & ~MAC_HaltReq, &tr->MAC_Ctl);
-
- /* TX4939 PCFG.SPEEDn bit will be changed on NETDEV_CHANGE event. */
-
-#ifndef NO_CHECK_CARRIER
- /* TX4939 does not have EnLCarr */
- if (lp->boardtype != TC35815_TX4939) {
-#ifdef WORKAROUND_LOSTCAR
- /* WORKAROUND: enable LostCrS only if half duplex operation */
- if (!lp->fullduplex && lp->boardtype != TC35815_TX4939)
- tc_writel(tc_readl(&tr->Tx_Ctl) | Tx_EnLCarr, &tr->Tx_Ctl);
-#endif
- }
-#endif
- lp->mii.full_duplex = lp->fullduplex;
-}
-
-static void tc35815_timer(unsigned long data)
-{
- struct net_device *dev = (struct net_device *)data;
- struct tc35815_local *lp = dev->priv;
- int pid = lp->phy_addr;
- unsigned short bmsr, bmcr, lpa;
- int restart_timer = 0;
-
- spin_lock_irq(&lp->lock);
-
- lp->timer_ticks++;
- switch (lp->timer_state) {
- case arbwait:
- /*
- * Only allow for 5 ticks, thats 10 seconds and much too
- * long to wait for arbitration to complete.
- */
- /* TC35815 need more times... */
- if (lp->timer_ticks >= 10) {
- /* Enter force mode. */
- if (!options.doforce) {
- printk(KERN_NOTICE "%s: Auto-Negotiation unsuccessful,"
- " cable probblem?\n", dev->name);
- /* Try to restart the adaptor. */
- tc35815_restart(dev);
- goto out;
- }
- printk(KERN_NOTICE "%s: Auto-Negotiation unsuccessful,"
- " trying force link mode\n", dev->name);
- printk(KERN_DEBUG "%s: BMCR %x BMSR %x\n", dev->name,
- tc_mdio_read(dev, pid, MII_BMCR),
- tc_mdio_read(dev, pid, MII_BMSR));
- bmcr = BMCR_SPEED100;
- tc_mdio_write(dev, pid, MII_BMCR, bmcr);
-
- /*
- * OK, seems we need do disable the transceiver
- * for the first tick to make sure we get an
- * accurate link state at the second tick.
- */
-
- lp->timer_state = ltrywait;
- lp->timer_ticks = 0;
- restart_timer = 1;
- } else {
- /* Anything interesting happen? */
- bmsr = tc_mdio_read(dev, pid, MII_BMSR);
- if (bmsr & BMSR_ANEGCOMPLETE) {
- /* Just what we've been waiting for... */
- tc35815_set_link_modes(dev);
-
- /*
- * Success, at least so far, advance our state
- * engine.
- */
- lp->timer_state = lupwait;
- restart_timer = 1;
- } else {
- restart_timer = 1;
- }
- }
- break;
-
- case lupwait:
- /*
- * Auto negotiation was successful and we are awaiting a
- * link up status. I have decided to let this timer run
- * forever until some sort of error is signalled, reporting
- * a message to the user at 10 second intervals.
- */
- bmsr = tc_mdio_read(dev, pid, MII_BMSR);
- if (bmsr & BMSR_LSTATUS) {
- /*
- * Wheee, it's up, display the link mode in use and put
- * the timer to sleep.
- */
- tc35815_display_link_mode(dev);
- netif_carrier_on(dev);
-#ifdef WORKAROUND_100HALF_PROMISC
- /* delayed promiscuous enabling */
- if (dev->flags & IFF_PROMISC)
- tc35815_set_multicast_list(dev);
-#endif
-#if 1
- lp->saved_lpa = tc_mdio_read(dev, pid, MII_LPA);
- lp->timer_state = lcheck;
- restart_timer = 1;
-#else
- lp->timer_state = asleep;
- restart_timer = 0;
-#endif
- } else {
- if (lp->timer_ticks >= 10) {
- printk(KERN_NOTICE "%s: Auto negotiation successful, link still "
- "not completely up.\n", dev->name);
- lp->timer_ticks = 0;
- restart_timer = 1;
- } else {
- restart_timer = 1;
- }
- }
- break;
-
- case ltrywait:
- /*
- * Making the timeout here too long can make it take
- * annoyingly long to attempt all of the link mode
- * permutations, but then again this is essentially
- * error recovery code for the most part.
- */
- bmsr = tc_mdio_read(dev, pid, MII_BMSR);
- bmcr = tc_mdio_read(dev, pid, MII_BMCR);
- if (lp->timer_ticks == 1) {
- /*
- * Re-enable transceiver, we'll re-enable the
- * transceiver next tick, then check link state
- * on the following tick.
- */
- restart_timer = 1;
- break;
- }
- if (lp->timer_ticks == 2) {
- restart_timer = 1;
- break;
- }
- if (bmsr & BMSR_LSTATUS) {
- /* Force mode selection success. */
- tc35815_display_forced_link_mode(dev);
- netif_carrier_on(dev);
- tc35815_set_link_modes(dev);
-#ifdef WORKAROUND_100HALF_PROMISC
- /* delayed promiscuous enabling */
- if (dev->flags & IFF_PROMISC)
- tc35815_set_multicast_list(dev);
-#endif
-#if 1
- lp->saved_lpa = tc_mdio_read(dev, pid, MII_LPA);
- lp->timer_state = lcheck;
- restart_timer = 1;
-#else
- lp->timer_state = asleep;
- restart_timer = 0;
-#endif
- } else {
- if (lp->timer_ticks >= 4) { /* 6 seconds or so... */
- int ret;
-
- ret = tc35815_try_next_permutation(dev);
- if (ret == -1) {
- /*
- * Aieee, tried them all, reset the
- * chip and try all over again.
- */
- printk(KERN_NOTICE "%s: Link down, "
- "cable problem?\n",
- dev->name);
-
- /* Try to restart the adaptor. */
- tc35815_restart(dev);
- goto out;
- }
- lp->timer_ticks = 0;
- restart_timer = 1;
- } else {
- restart_timer = 1;
- }
- }
- break;
-
- case lcheck:
- bmcr = tc_mdio_read(dev, pid, MII_BMCR);
- lpa = tc_mdio_read(dev, pid, MII_LPA);
- if (bmcr & (BMCR_PDOWN | BMCR_ISOLATE | BMCR_RESET)) {
- printk(KERN_ERR "%s: PHY down? (BMCR %x)\n", dev->name,
- bmcr);
- } else if ((lp->saved_lpa ^ lpa) &
- (LPA_100FULL|LPA_100HALF|LPA_10FULL|LPA_10HALF)) {
- printk(KERN_NOTICE "%s: link status changed"
- " (BMCR %x LPA %x->%x)\n", dev->name,
- bmcr, lp->saved_lpa, lpa);
- } else {
- /* go on */
- restart_timer = 1;
- break;
- }
- /* Try to restart the adaptor. */
- tc35815_restart(dev);
- goto out;
-
- case asleep:
- default:
- /* Can't happens.... */
- printk(KERN_ERR "%s: Aieee, link timer is asleep but we got "
- "one anyways!\n", dev->name);
- restart_timer = 0;
- lp->timer_ticks = 0;
- lp->timer_state = asleep; /* foo on you */
- break;
- }
-
- if (restart_timer) {
- lp->timer.expires = jiffies + msecs_to_jiffies(1200);
- add_timer(&lp->timer);
- }
-out:
- spin_unlock_irq(&lp->lock);
-}
-
-static void tc35815_start_auto_negotiation(struct net_device *dev,
- struct ethtool_cmd *ep)
-{
- struct tc35815_local *lp = dev->priv;
- int pid = lp->phy_addr;
- unsigned short bmsr, bmcr, advertize;
- int timeout;
-
- netif_carrier_off(dev);
- bmsr = tc_mdio_read(dev, pid, MII_BMSR);
- bmcr = tc_mdio_read(dev, pid, MII_BMCR);
- advertize = tc_mdio_read(dev, pid, MII_ADVERTISE);
-
- if (ep == NULL || ep->autoneg == AUTONEG_ENABLE) {
- if (options.speed || options.duplex) {
- /* Advertise only specified configuration. */
- advertize &= ~(ADVERTISE_10HALF |
- ADVERTISE_10FULL |
- ADVERTISE_100HALF |
- ADVERTISE_100FULL);
- if (options.speed != 10) {
- if (options.duplex != 1)
- advertize |= ADVERTISE_100FULL;
- if (options.duplex != 2)
- advertize |= ADVERTISE_100HALF;
- }
- if (options.speed != 100) {
- if (options.duplex != 1)
- advertize |= ADVERTISE_10FULL;
- if (options.duplex != 2)
- advertize |= ADVERTISE_10HALF;
- }
- if (options.speed == 100)
- bmcr |= BMCR_SPEED100;
- else if (options.speed == 10)
- bmcr &= ~BMCR_SPEED100;
- if (options.duplex == 2)
- bmcr |= BMCR_FULLDPLX;
- else if (options.duplex == 1)
- bmcr &= ~BMCR_FULLDPLX;
- } else {
- /* Advertise everything we can support. */
- if (bmsr & BMSR_10HALF)
- advertize |= ADVERTISE_10HALF;
- else
- advertize &= ~ADVERTISE_10HALF;
- if (bmsr & BMSR_10FULL)
- advertize |= ADVERTISE_10FULL;
- else
- advertize &= ~ADVERTISE_10FULL;
- if (bmsr & BMSR_100HALF)
- advertize |= ADVERTISE_100HALF;
- else
- advertize &= ~ADVERTISE_100HALF;
- if (bmsr & BMSR_100FULL)
- advertize |= ADVERTISE_100FULL;
- else
- advertize &= ~ADVERTISE_100FULL;
- }
-
- tc_mdio_write(dev, pid, MII_ADVERTISE, advertize);
-
- /* Enable Auto-Negotiation, this is usually on already... */
- bmcr |= BMCR_ANENABLE;
- tc_mdio_write(dev, pid, MII_BMCR, bmcr);
-
- /* Restart it to make sure it is going. */
- bmcr |= BMCR_ANRESTART;
- tc_mdio_write(dev, pid, MII_BMCR, bmcr);
- printk(KERN_DEBUG "%s: ADVERTISE %x BMCR %x\n", dev->name, advertize, bmcr);
-
- /* BMCR_ANRESTART self clears when the process has begun. */
- timeout = 64; /* More than enough. */
- while (--timeout) {
- bmcr = tc_mdio_read(dev, pid, MII_BMCR);
- if (!(bmcr & BMCR_ANRESTART))
- break; /* got it. */
- udelay(10);
- }
- if (!timeout) {
- printk(KERN_ERR "%s: TC35815 would not start auto "
- "negotiation BMCR=0x%04x\n",
- dev->name, bmcr);
- printk(KERN_NOTICE "%s: Performing force link "
- "detection.\n", dev->name);
- goto force_link;
- } else {
- printk(KERN_DEBUG "%s: auto negotiation started.\n", dev->name);
- lp->timer_state = arbwait;
- }
- } else {
-force_link:
- /* Force the link up, trying first a particular mode.
- * Either we are here at the request of ethtool or
- * because the Happy Meal would not start to autoneg.
- */
-
- /* Disable auto-negotiation in BMCR, enable the duplex and
- * speed setting, init the timer state machine, and fire it off.
- */
- if (ep == NULL || ep->autoneg == AUTONEG_ENABLE) {
- bmcr = BMCR_SPEED100;
- } else {
- if (ep->speed == SPEED_100)
- bmcr = BMCR_SPEED100;
- else
- bmcr = 0;
- if (ep->duplex == DUPLEX_FULL)
- bmcr |= BMCR_FULLDPLX;
- }
- tc_mdio_write(dev, pid, MII_BMCR, bmcr);
-
- /* OK, seems we need do disable the transceiver for the first
- * tick to make sure we get an accurate link state at the
- * second tick.
- */
- lp->timer_state = ltrywait;
- }
-
- del_timer(&lp->timer);
- lp->timer_ticks = 0;
- lp->timer.expires = jiffies + msecs_to_jiffies(1200);
- add_timer(&lp->timer);
-}
-
-static void tc35815_find_phy(struct net_device *dev)
-{
- struct tc35815_local *lp = dev->priv;
- int pid = lp->phy_addr;
- unsigned short id0;
-
- /* find MII phy */
- for (pid = 31; pid >= 0; pid--) {
- id0 = tc_mdio_read(dev, pid, MII_BMSR);
- if (id0 != 0xffff && id0 != 0x0000 &&
- (id0 & BMSR_RESV) != (0xffff & BMSR_RESV) /* paranoia? */
- ) {
- lp->phy_addr = pid;
- break;
- }
- }
- if (pid < 0) {
- printk(KERN_ERR "%s: No MII Phy found.\n",
- dev->name);
- lp->phy_addr = pid = 0;
- }
-
- lp->mii_id[0] = tc_mdio_read(dev, pid, MII_PHYSID1);
- lp->mii_id[1] = tc_mdio_read(dev, pid, MII_PHYSID2);
- if (netif_msg_hw(lp))
- printk(KERN_INFO "%s: PHY(%02x) ID %04x %04x\n", dev->name,
- pid, lp->mii_id[0], lp->mii_id[1]);
-}
-
-static void tc35815_phy_chip_init(struct net_device *dev)
-{
- struct tc35815_local *lp = dev->priv;
- int pid = lp->phy_addr;
- unsigned short bmcr;
- struct ethtool_cmd ecmd, *ep;
-
- /* dis-isolate if needed. */
- bmcr = tc_mdio_read(dev, pid, MII_BMCR);
- if (bmcr & BMCR_ISOLATE) {
- int count = 32;
- printk(KERN_DEBUG "%s: unisolating...", dev->name);
- tc_mdio_write(dev, pid, MII_BMCR, bmcr & ~BMCR_ISOLATE);
- while (--count) {
- if (!(tc_mdio_read(dev, pid, MII_BMCR) & BMCR_ISOLATE))
- break;
- udelay(20);
- }
- printk(" %s.\n", count ? "done" : "failed");
- }
-
- if (options.speed && options.duplex) {
- ecmd.autoneg = AUTONEG_DISABLE;
- ecmd.speed = options.speed == 10 ? SPEED_10 : SPEED_100;
- ecmd.duplex = options.duplex == 1 ? DUPLEX_HALF : DUPLEX_FULL;
- ep = &ecmd;
- } else {
- ep = NULL;
- }
- tc35815_start_auto_negotiation(dev, ep);
+ if (!lp->phy_dev)
+ return -ENODEV;
+ return phy_mii_ioctl(lp->phy_dev, if_mii(rq), cmd);
}
static void tc35815_chip_reset(struct net_device *dev)
@@ -2862,13 +2368,11 @@
static void tc35815_chip_init(struct net_device *dev)
{
- struct tc35815_local *lp = dev->priv;
+ struct tc35815_local *lp = netdev_priv(dev);
struct tc35815_regs __iomem *tr =
(struct tc35815_regs __iomem *)dev->base_addr;
unsigned long txctl = TX_CTL_CMD;
- tc35815_phy_chip_init(dev);
-
/* load station address to CAM */
tc35815_set_cam_entry(dev, CAM_ENTRY_SOURCE, dev->dev_addr);
@@ -2905,12 +2409,11 @@
/* start MAC transmitter */
#ifndef NO_CHECK_CARRIER
/* TX4939 does not have EnLCarr */
- if (lp->boardtype == TC35815_TX4939)
+ if (lp->chiptype == TC35815_TX4939)
txctl &= ~Tx_EnLCarr;
#ifdef WORKAROUND_LOSTCAR
/* WORKAROUND: ignore LostCrS in full duplex operation */
- if ((lp->timer_state != asleep && lp->timer_state != lcheck) ||
- lp->fullduplex)
+ if (!lp->phy_dev || !lp->link || lp->duplex == DUPLEX_FULL)
txctl &= ~Tx_EnLCarr;
#endif
#endif /* !NO_CHECK_CARRIER */
@@ -2924,15 +2427,16 @@
static int tc35815_suspend(struct pci_dev *pdev, pm_message_t state)
{
struct net_device *dev = pci_get_drvdata(pdev);
- struct tc35815_local *lp = dev->priv;
+ struct tc35815_local *lp = netdev_priv(dev);
unsigned long flags;
pci_save_state(pdev);
if (!netif_running(dev))
return 0;
netif_device_detach(dev);
+ if (lp->phy_dev)
+ phy_stop(lp->phy_dev);
spin_lock_irqsave(&lp->lock, flags);
- del_timer(&lp->timer); /* Kill if running */
tc35815_chip_reset(dev);
spin_unlock_irqrestore(&lp->lock, flags);
pci_set_power_state(pdev, PCI_D3hot);
@@ -2942,16 +2446,15 @@
static int tc35815_resume(struct pci_dev *pdev)
{
struct net_device *dev = pci_get_drvdata(pdev);
- struct tc35815_local *lp = dev->priv;
- unsigned long flags;
+ struct tc35815_local *lp = netdev_priv(dev);
pci_restore_state(pdev);
if (!netif_running(dev))
return 0;
pci_set_power_state(pdev, PCI_D0);
- spin_lock_irqsave(&lp->lock, flags);
tc35815_restart(dev);
- spin_unlock_irqrestore(&lp->lock, flags);
+ if (lp->phy_dev)
+ phy_start(lp->phy_dev);
netif_device_attach(dev);
return 0;
}
@@ -2972,8 +2475,6 @@
MODULE_PARM_DESC(speed, "0:auto, 10:10Mbps, 100:100Mbps");
module_param_named(duplex, options.duplex, int, 0);
MODULE_PARM_DESC(duplex, "0:auto, 1:half, 2:full");
-module_param_named(doforce, options.doforce, int, 0);
-MODULE_PARM_DESC(doforce, "try force link mode if auto-negotiation failed");
static int __init tc35815_init_module(void)
{
diff --git a/drivers/net/tulip/tulip.h b/drivers/net/tulip/tulip.h
index 3f69f53..908422f 100644
--- a/drivers/net/tulip/tulip.h
+++ b/drivers/net/tulip/tulip.h
@@ -268,7 +268,12 @@
#define RX_RING_SIZE 128
#define MEDIA_MASK 31
-#define PKT_BUF_SZ 1536 /* Size of each temporary Rx buffer. */
+/* The receiver on the DC21143 rev 65 can fail to close the last
+ * receive descriptor in certain circumstances (see errata) when
+ * using MWI. This can only occur if the receive buffer ends on
+ * a cache line boundary, so the "+ 4" below ensures it doesn't.
+ */
+#define PKT_BUF_SZ (1536 + 4) /* Size of each temporary Rx buffer. */
#define TULIP_MIN_CACHE_LINE 8 /* in units of 32-bit words */
diff --git a/drivers/net/tulip/tulip_core.c b/drivers/net/tulip/tulip_core.c
index 82f404b..fa1c1c3 100644
--- a/drivers/net/tulip/tulip_core.c
+++ b/drivers/net/tulip/tulip_core.c
@@ -1154,18 +1154,13 @@
tp->csr0 = csr0 = 0;
- /* if we have any cache line size at all, we can do MRM */
- csr0 |= MRM;
+ /* if we have any cache line size at all, we can do MRM and MWI */
+ csr0 |= MRM | MWI;
- /* ...and barring hardware bugs, MWI */
- if (!(tp->chip_id == DC21143 && tp->revision == 65))
- csr0 |= MWI;
-
- /* set or disable MWI in the standard PCI command bit.
- * Check for the case where mwi is desired but not available
+ /* Enable MWI in the standard PCI command bit.
+ * Check for the case where MWI is desired but not available
*/
- if (csr0 & MWI) pci_try_set_mwi(pdev);
- else pci_clear_mwi(pdev);
+ pci_try_set_mwi(pdev);
/* read result from hardware (in case bit refused to enable) */
pci_read_config_word(pdev, PCI_COMMAND, &pci_command);
@@ -1401,10 +1396,6 @@
#ifdef CONFIG_TULIP_MWI
if (!force_csr0 && (tp->flags & HAS_PCI_MWI))
tulip_mwi_config (pdev, dev);
-#else
- /* MWI is broken for DC21143 rev 65... */
- if (chip_idx == DC21143 && pdev->revision == 65)
- tp->csr0 &= ~MWI;
#endif
/* Stop the chip's Tx and Rx processes. */
diff --git a/drivers/net/tulip/winbond-840.c b/drivers/net/tulip/winbond-840.c
index 35d0cfc..5006819 100644
--- a/drivers/net/tulip/winbond-840.c
+++ b/drivers/net/tulip/winbond-840.c
@@ -107,8 +107,6 @@
/* Time in jiffies before concluding the transmitter is hung. */
#define TX_TIMEOUT (2*HZ)
-#define PKT_BUF_SZ 1536 /* Size of each temporary Rx buffer.*/
-
/* Include files, designed to support most kernel versions 2.0.0 and later. */
#include <linux/module.h>
#include <linux/kernel.h>
@@ -137,6 +135,9 @@
#include "tulip.h"
+#undef PKT_BUF_SZ /* tulip.h also defines this */
+#define PKT_BUF_SZ 1536 /* Size of each temporary Rx buffer.*/
+
/* These identify the driver base version and may not be removed. */
static char version[] =
KERN_INFO DRV_NAME ".c:v" DRV_VERSION " (2.4 port) " DRV_RELDATE " Donald Becker <becker@scyld.com>\n"
diff --git a/drivers/net/ucc_geth.c b/drivers/net/ucc_geth.c
index 0ee4c16..29a4d65 100644
--- a/drivers/net/ucc_geth.c
+++ b/drivers/net/ucc_geth.c
@@ -3954,7 +3954,7 @@
if (err)
return -1;
- ug_info->mdio_bus = res.start;
+ snprintf(ug_info->mdio_bus, MII_BUS_ID_SIZE, "%x", res.start);
}
/* get the phy interface type, or default to MII */
diff --git a/drivers/net/ucc_geth.h b/drivers/net/ucc_geth.h
index 4fb95b3..9f8b758 100644
--- a/drivers/net/ucc_geth.h
+++ b/drivers/net/ucc_geth.h
@@ -1156,7 +1156,7 @@
u16 pausePeriod;
u16 extensionField;
u8 phy_address;
- u32 mdio_bus;
+ char mdio_bus[MII_BUS_ID_SIZE];
u8 weightfactor[NUM_TX_QUEUES];
u8 interruptcoalescingmaxvalue[NUM_RX_QUEUES];
u8 l2qt[UCC_GETH_VLAN_PRIORITY_MAX];
diff --git a/drivers/net/ucc_geth_mii.c b/drivers/net/ucc_geth_mii.c
index c69e654..e4d3f33 100644
--- a/drivers/net/ucc_geth_mii.c
+++ b/drivers/net/ucc_geth_mii.c
@@ -157,7 +157,7 @@
if (err)
goto reg_map_fail;
- new_bus->id = res.start;
+ snprintf(new_bus->id, MII_BUS_ID_SIZE, "%x", res.start);
new_bus->irq = kmalloc(32 * sizeof(int), GFP_KERNEL);
diff --git a/drivers/s390/net/qeth_core.h b/drivers/s390/net/qeth_core.h
index 9485e36..66f4f12 100644
--- a/drivers/s390/net/qeth_core.h
+++ b/drivers/s390/net/qeth_core.h
@@ -34,59 +34,53 @@
#include "qeth_core_mpc.h"
+#define KMSG_COMPONENT "qeth"
+
/**
* Debug Facility stuff
*/
-#define QETH_DBF_SETUP_NAME "qeth_setup"
-#define QETH_DBF_SETUP_LEN 8
-#define QETH_DBF_SETUP_PAGES 8
-#define QETH_DBF_SETUP_NR_AREAS 1
-#define QETH_DBF_SETUP_LEVEL 5
+enum qeth_dbf_names {
+ QETH_DBF_SETUP,
+ QETH_DBF_QERR,
+ QETH_DBF_TRACE,
+ QETH_DBF_MSG,
+ QETH_DBF_SENSE,
+ QETH_DBF_MISC,
+ QETH_DBF_CTRL,
+ QETH_DBF_INFOS /* must be last element */
+};
-#define QETH_DBF_MISC_NAME "qeth_misc"
-#define QETH_DBF_MISC_LEN 128
-#define QETH_DBF_MISC_PAGES 2
-#define QETH_DBF_MISC_NR_AREAS 1
-#define QETH_DBF_MISC_LEVEL 2
+struct qeth_dbf_info {
+ char name[DEBUG_MAX_NAME_LEN];
+ int pages;
+ int areas;
+ int len;
+ int level;
+ struct debug_view *view;
+ debug_info_t *id;
+};
-#define QETH_DBF_DATA_NAME "qeth_data"
-#define QETH_DBF_DATA_LEN 96
-#define QETH_DBF_DATA_PAGES 8
-#define QETH_DBF_DATA_NR_AREAS 1
-#define QETH_DBF_DATA_LEVEL 2
-
-#define QETH_DBF_CONTROL_NAME "qeth_control"
-#define QETH_DBF_CONTROL_LEN 256
-#define QETH_DBF_CONTROL_PAGES 8
-#define QETH_DBF_CONTROL_NR_AREAS 1
-#define QETH_DBF_CONTROL_LEVEL 5
-
-#define QETH_DBF_TRACE_NAME "qeth_trace"
-#define QETH_DBF_TRACE_LEN 8
-#define QETH_DBF_TRACE_PAGES 4
-#define QETH_DBF_TRACE_NR_AREAS 1
-#define QETH_DBF_TRACE_LEVEL 3
-
-#define QETH_DBF_SENSE_NAME "qeth_sense"
-#define QETH_DBF_SENSE_LEN 64
-#define QETH_DBF_SENSE_PAGES 2
-#define QETH_DBF_SENSE_NR_AREAS 1
-#define QETH_DBF_SENSE_LEVEL 2
-
-#define QETH_DBF_QERR_NAME "qeth_qerr"
-#define QETH_DBF_QERR_LEN 8
-#define QETH_DBF_QERR_PAGES 2
-#define QETH_DBF_QERR_NR_AREAS 1
-#define QETH_DBF_QERR_LEVEL 2
+#define QETH_DBF_CTRL_LEN 256
#define QETH_DBF_TEXT(name, level, text) \
- do { \
- debug_text_event(qeth_dbf_##name, level, text); \
- } while (0)
+ debug_text_event(qeth_dbf[QETH_DBF_##name].id, level, text)
#define QETH_DBF_HEX(name, level, addr, len) \
+ debug_event(qeth_dbf[QETH_DBF_##name].id, level, (void *)(addr), len)
+
+#define QETH_DBF_MESSAGE(level, text...) \
+ debug_sprintf_event(qeth_dbf[QETH_DBF_MSG].id, level, text)
+
+#define QETH_DBF_TEXT_(name, level, text...) \
do { \
- debug_event(qeth_dbf_##name, level, (void *)(addr), len); \
+ if (qeth_dbf_passes(qeth_dbf[QETH_DBF_##name].id, level)) { \
+ char *dbf_txt_buf = \
+ get_cpu_var(QETH_DBF_TXT_BUF); \
+ sprintf(dbf_txt_buf, text); \
+ debug_text_event(qeth_dbf[QETH_DBF_##name].id, \
+ level, dbf_txt_buf); \
+ put_cpu_var(QETH_DBF_TXT_BUF); \
+ } \
} while (0)
/* Allow to sort out low debug levels early to avoid wasted sprints */
@@ -826,13 +820,8 @@
/* exports for qeth discipline device drivers */
extern struct qeth_card_list_struct qeth_core_card_list;
-extern debug_info_t *qeth_dbf_setup;
-extern debug_info_t *qeth_dbf_data;
-extern debug_info_t *qeth_dbf_misc;
-extern debug_info_t *qeth_dbf_control;
-extern debug_info_t *qeth_dbf_trace;
-extern debug_info_t *qeth_dbf_sense;
-extern debug_info_t *qeth_dbf_qerr;
+
+extern struct qeth_dbf_info qeth_dbf[QETH_DBF_INFOS];
void qeth_set_allowed_threads(struct qeth_card *, unsigned long , int);
int qeth_threads_running(struct qeth_card *, unsigned long);
diff --git a/drivers/s390/net/qeth_core_main.c b/drivers/s390/net/qeth_core_main.c
index 95c6fcf..055f5c3 100644
--- a/drivers/s390/net/qeth_core_main.c
+++ b/drivers/s390/net/qeth_core_main.c
@@ -26,38 +26,35 @@
#include "qeth_core.h"
#include "qeth_core_offl.h"
-#define QETH_DBF_TEXT_(name, level, text...) \
- do { \
- if (qeth_dbf_passes(qeth_dbf_##name, level)) { \
- char *dbf_txt_buf = \
- get_cpu_var(qeth_core_dbf_txt_buf); \
- sprintf(dbf_txt_buf, text); \
- debug_text_event(qeth_dbf_##name, level, dbf_txt_buf); \
- put_cpu_var(qeth_core_dbf_txt_buf); \
- } \
- } while (0)
+static DEFINE_PER_CPU(char[256], qeth_core_dbf_txt_buf);
+#define QETH_DBF_TXT_BUF qeth_core_dbf_txt_buf
+
+struct qeth_dbf_info qeth_dbf[QETH_DBF_INFOS] = {
+ /* define dbf - Name, Pages, Areas, Maxlen, Level, View, Handle */
+ /* N P A M L V H */
+ [QETH_DBF_SETUP] = {"qeth_setup",
+ 8, 1, 8, 5, &debug_hex_ascii_view, NULL},
+ [QETH_DBF_QERR] = {"qeth_qerr",
+ 2, 1, 8, 2, &debug_hex_ascii_view, NULL},
+ [QETH_DBF_TRACE] = {"qeth_trace",
+ 4, 1, 8, 3, &debug_hex_ascii_view, NULL},
+ [QETH_DBF_MSG] = {"qeth_msg",
+ 8, 1, 128, 3, &debug_sprintf_view, NULL},
+ [QETH_DBF_SENSE] = {"qeth_sense",
+ 2, 1, 64, 2, &debug_hex_ascii_view, NULL},
+ [QETH_DBF_MISC] = {"qeth_misc",
+ 2, 1, 256, 2, &debug_hex_ascii_view, NULL},
+ [QETH_DBF_CTRL] = {"qeth_control",
+ 8, 1, QETH_DBF_CTRL_LEN, 5, &debug_hex_ascii_view, NULL},
+};
+EXPORT_SYMBOL_GPL(qeth_dbf);
struct qeth_card_list_struct qeth_core_card_list;
EXPORT_SYMBOL_GPL(qeth_core_card_list);
-debug_info_t *qeth_dbf_setup;
-EXPORT_SYMBOL_GPL(qeth_dbf_setup);
-debug_info_t *qeth_dbf_data;
-EXPORT_SYMBOL_GPL(qeth_dbf_data);
-debug_info_t *qeth_dbf_misc;
-EXPORT_SYMBOL_GPL(qeth_dbf_misc);
-debug_info_t *qeth_dbf_control;
-EXPORT_SYMBOL_GPL(qeth_dbf_control);
-debug_info_t *qeth_dbf_trace;
-EXPORT_SYMBOL_GPL(qeth_dbf_trace);
-debug_info_t *qeth_dbf_sense;
-EXPORT_SYMBOL_GPL(qeth_dbf_sense);
-debug_info_t *qeth_dbf_qerr;
-EXPORT_SYMBOL_GPL(qeth_dbf_qerr);
static struct device *qeth_core_root_dev;
static unsigned int known_devices[][10] = QETH_MODELLIST_ARRAY;
static struct lock_class_key qdio_out_skb_queue_key;
-static DEFINE_PER_CPU(char[256], qeth_core_dbf_txt_buf);
static void qeth_send_control_data_cb(struct qeth_channel *,
struct qeth_cmd_buffer *);
@@ -219,7 +216,7 @@
{
struct qeth_buffer_pool_entry *pool_entry, *tmp;
- QETH_DBF_TEXT(trace, 5, "clwrklst");
+ QETH_DBF_TEXT(TRACE, 5, "clwrklst");
list_for_each_entry_safe(pool_entry, tmp,
&card->qdio.in_buf_pool.entry_list, list){
list_del(&pool_entry->list);
@@ -233,7 +230,7 @@
void *ptr;
int i, j;
- QETH_DBF_TEXT(trace, 5, "alocpool");
+ QETH_DBF_TEXT(TRACE, 5, "alocpool");
for (i = 0; i < card->qdio.init_pool.buf_count; ++i) {
pool_entry = kmalloc(sizeof(*pool_entry), GFP_KERNEL);
if (!pool_entry) {
@@ -241,7 +238,7 @@
return -ENOMEM;
}
for (j = 0; j < QETH_MAX_BUFFER_ELEMENTS(card); ++j) {
- ptr = (void *) __get_free_page(GFP_KERNEL|GFP_DMA);
+ ptr = (void *) __get_free_page(GFP_KERNEL);
if (!ptr) {
while (j > 0)
free_page((unsigned long)
@@ -260,7 +257,7 @@
int qeth_realloc_buffer_pool(struct qeth_card *card, int bufcnt)
{
- QETH_DBF_TEXT(trace, 2, "realcbp");
+ QETH_DBF_TEXT(TRACE, 2, "realcbp");
if ((card->state != CARD_STATE_DOWN) &&
(card->state != CARD_STATE_RECOVER))
@@ -321,7 +318,7 @@
int rc;
struct qeth_cmd_buffer *iob;
- QETH_DBF_TEXT(trace, 5, "issnxrd");
+ QETH_DBF_TEXT(TRACE, 5, "issnxrd");
if (card->read.state != CH_STATE_UP)
return -EIO;
iob = qeth_get_buffer(&card->read);
@@ -330,7 +327,7 @@
return -ENOMEM;
}
qeth_setup_ccw(&card->read, iob->data, QETH_BUFSIZE);
- QETH_DBF_TEXT(trace, 6, "noirqpnd");
+ QETH_DBF_TEXT(TRACE, 6, "noirqpnd");
rc = ccw_device_start(card->read.ccwdev, &card->read.ccw,
(addr_t) iob, 0, 0);
if (rc) {
@@ -368,19 +365,19 @@
kfree(reply);
}
-static void qeth_issue_ipa_msg(struct qeth_ipa_cmd *cmd,
+static void qeth_issue_ipa_msg(struct qeth_ipa_cmd *cmd, int rc,
struct qeth_card *card)
{
- int rc;
- int com;
char *ipa_name;
-
- com = cmd->hdr.command;
- rc = cmd->hdr.return_code;
+ int com = cmd->hdr.command;
ipa_name = qeth_get_ipa_cmd_name(com);
-
- PRINT_ERR("%s(x%X) for %s returned x%X \"%s\"\n", ipa_name, com,
- QETH_CARD_IFNAME(card), rc, qeth_get_ipa_msg(rc));
+ if (rc)
+ QETH_DBF_MESSAGE(2, "IPA: %s(x%X) for %s returned x%X \"%s\"\n",
+ ipa_name, com, QETH_CARD_IFNAME(card),
+ rc, qeth_get_ipa_msg(rc));
+ else
+ QETH_DBF_MESSAGE(5, "IPA: %s(x%X) for %s succeeded\n",
+ ipa_name, com, QETH_CARD_IFNAME(card));
}
static struct qeth_ipa_cmd *qeth_check_ipa_data(struct qeth_card *card,
@@ -388,14 +385,14 @@
{
struct qeth_ipa_cmd *cmd = NULL;
- QETH_DBF_TEXT(trace, 5, "chkipad");
+ QETH_DBF_TEXT(TRACE, 5, "chkipad");
if (IS_IPA(iob->data)) {
cmd = (struct qeth_ipa_cmd *) PDU_ENCAPSULATION(iob->data);
if (IS_IPA_REPLY(cmd)) {
- if (cmd->hdr.return_code &&
- (cmd->hdr.command < IPA_CMD_SETCCID ||
- cmd->hdr.command > IPA_CMD_MODCCID))
- qeth_issue_ipa_msg(cmd, card);
+ if (cmd->hdr.command < IPA_CMD_SETCCID ||
+ cmd->hdr.command > IPA_CMD_MODCCID)
+ qeth_issue_ipa_msg(cmd,
+ cmd->hdr.return_code, card);
return cmd;
} else {
switch (cmd->hdr.command) {
@@ -417,15 +414,16 @@
QETH_CARD_IFNAME(card),
card->info.chpid);
netif_carrier_on(card->dev);
+ card->lan_online = 1;
qeth_schedule_recovery(card);
return NULL;
case IPA_CMD_MODCCID:
return cmd;
case IPA_CMD_REGISTER_LOCAL_ADDR:
- QETH_DBF_TEXT(trace, 3, "irla");
+ QETH_DBF_TEXT(TRACE, 3, "irla");
break;
case IPA_CMD_UNREGISTER_LOCAL_ADDR:
- QETH_DBF_TEXT(trace, 3, "urla");
+ QETH_DBF_TEXT(TRACE, 3, "urla");
break;
default:
PRINT_WARN("Received data is IPA "
@@ -442,7 +440,7 @@
struct qeth_reply *reply, *r;
unsigned long flags;
- QETH_DBF_TEXT(trace, 4, "clipalst");
+ QETH_DBF_TEXT(TRACE, 4, "clipalst");
spin_lock_irqsave(&card->lock, flags);
list_for_each_entry_safe(reply, r, &card->cmd_waiter_list, list) {
@@ -462,16 +460,16 @@
if (!buffer)
return 0;
- QETH_DBF_HEX(control, 2, buffer, QETH_DBF_CONTROL_LEN);
+ QETH_DBF_HEX(CTRL, 2, buffer, QETH_DBF_CTRL_LEN);
if ((buffer[2] & 0xc0) == 0xc0) {
PRINT_WARN("received an IDX TERMINATE "
"with cause code 0x%02x%s\n",
buffer[4],
((buffer[4] == 0x22) ?
" -- try another portname" : ""));
- QETH_DBF_TEXT(trace, 2, "ckidxres");
- QETH_DBF_TEXT(trace, 2, " idxterm");
- QETH_DBF_TEXT_(trace, 2, " rc%d", -EIO);
+ QETH_DBF_TEXT(TRACE, 2, "ckidxres");
+ QETH_DBF_TEXT(TRACE, 2, " idxterm");
+ QETH_DBF_TEXT_(TRACE, 2, " rc%d", -EIO);
return -EIO;
}
return 0;
@@ -482,7 +480,7 @@
{
struct qeth_card *card;
- QETH_DBF_TEXT(trace, 4, "setupccw");
+ QETH_DBF_TEXT(TRACE, 4, "setupccw");
card = CARD_FROM_CDEV(channel->ccwdev);
if (channel == &card->read)
memcpy(&channel->ccw, READ_CCW, sizeof(struct ccw1));
@@ -496,7 +494,7 @@
{
__u8 index;
- QETH_DBF_TEXT(trace, 6, "getbuff");
+ QETH_DBF_TEXT(TRACE, 6, "getbuff");
index = channel->io_buf_no;
do {
if (channel->iob[index].state == BUF_STATE_FREE) {
@@ -517,7 +515,7 @@
{
unsigned long flags;
- QETH_DBF_TEXT(trace, 6, "relbuff");
+ QETH_DBF_TEXT(TRACE, 6, "relbuff");
spin_lock_irqsave(&channel->iob_lock, flags);
memset(iob->data, 0, QETH_BUFSIZE);
iob->state = BUF_STATE_FREE;
@@ -567,7 +565,7 @@
unsigned long flags;
int keep_reply;
- QETH_DBF_TEXT(trace, 4, "sndctlcb");
+ QETH_DBF_TEXT(TRACE, 4, "sndctlcb");
card = CARD_FROM_CDEV(channel->ccwdev);
if (qeth_check_idx_response(iob->data)) {
@@ -637,7 +635,7 @@
{
int cnt;
- QETH_DBF_TEXT(setup, 2, "setupch");
+ QETH_DBF_TEXT(SETUP, 2, "setupch");
for (cnt = 0; cnt < QETH_CMD_BUFFER_NO; cnt++) {
channel->iob[cnt].data = (char *)
kmalloc(QETH_BUFSIZE, GFP_DMA|GFP_KERNEL);
@@ -731,7 +729,7 @@
void qeth_schedule_recovery(struct qeth_card *card)
{
- QETH_DBF_TEXT(trace, 2, "startrec");
+ QETH_DBF_TEXT(TRACE, 2, "startrec");
if (qeth_set_thread_start_bit(card, QETH_RECOVER_THREAD) == 0)
schedule_work(&card->kernel_thread_starter);
}
@@ -749,7 +747,7 @@
if (cstat & (SCHN_STAT_CHN_CTRL_CHK | SCHN_STAT_INTF_CTRL_CHK |
SCHN_STAT_CHN_DATA_CHK | SCHN_STAT_CHAIN_CHECK |
SCHN_STAT_PROT_CHECK | SCHN_STAT_PROG_CHECK)) {
- QETH_DBF_TEXT(trace, 2, "CGENCHK");
+ QETH_DBF_TEXT(TRACE, 2, "CGENCHK");
PRINT_WARN("check on device %s, dstat=x%x, cstat=x%x ",
cdev->dev.bus_id, dstat, cstat);
print_hex_dump(KERN_WARNING, "qeth: irb ", DUMP_PREFIX_OFFSET,
@@ -760,23 +758,23 @@
if (dstat & DEV_STAT_UNIT_CHECK) {
if (sense[SENSE_RESETTING_EVENT_BYTE] &
SENSE_RESETTING_EVENT_FLAG) {
- QETH_DBF_TEXT(trace, 2, "REVIND");
+ QETH_DBF_TEXT(TRACE, 2, "REVIND");
return 1;
}
if (sense[SENSE_COMMAND_REJECT_BYTE] &
SENSE_COMMAND_REJECT_FLAG) {
- QETH_DBF_TEXT(trace, 2, "CMDREJi");
+ QETH_DBF_TEXT(TRACE, 2, "CMDREJi");
return 0;
}
if ((sense[2] == 0xaf) && (sense[3] == 0xfe)) {
- QETH_DBF_TEXT(trace, 2, "AFFE");
+ QETH_DBF_TEXT(TRACE, 2, "AFFE");
return 1;
}
if ((!sense[0]) && (!sense[1]) && (!sense[2]) && (!sense[3])) {
- QETH_DBF_TEXT(trace, 2, "ZEROSEN");
+ QETH_DBF_TEXT(TRACE, 2, "ZEROSEN");
return 0;
}
- QETH_DBF_TEXT(trace, 2, "DGENCHK");
+ QETH_DBF_TEXT(TRACE, 2, "DGENCHK");
return 1;
}
return 0;
@@ -791,13 +789,13 @@
switch (PTR_ERR(irb)) {
case -EIO:
PRINT_WARN("i/o-error on device %s\n", cdev->dev.bus_id);
- QETH_DBF_TEXT(trace, 2, "ckirberr");
- QETH_DBF_TEXT_(trace, 2, " rc%d", -EIO);
+ QETH_DBF_TEXT(TRACE, 2, "ckirberr");
+ QETH_DBF_TEXT_(TRACE, 2, " rc%d", -EIO);
break;
case -ETIMEDOUT:
PRINT_WARN("timeout on device %s\n", cdev->dev.bus_id);
- QETH_DBF_TEXT(trace, 2, "ckirberr");
- QETH_DBF_TEXT_(trace, 2, " rc%d", -ETIMEDOUT);
+ QETH_DBF_TEXT(TRACE, 2, "ckirberr");
+ QETH_DBF_TEXT_(TRACE, 2, " rc%d", -ETIMEDOUT);
if (intparm == QETH_RCD_PARM) {
struct qeth_card *card = CARD_FROM_CDEV(cdev);
@@ -810,8 +808,8 @@
default:
PRINT_WARN("unknown error %ld on device %s\n", PTR_ERR(irb),
cdev->dev.bus_id);
- QETH_DBF_TEXT(trace, 2, "ckirberr");
- QETH_DBF_TEXT(trace, 2, " rc???");
+ QETH_DBF_TEXT(TRACE, 2, "ckirberr");
+ QETH_DBF_TEXT(TRACE, 2, " rc???");
}
return PTR_ERR(irb);
}
@@ -827,7 +825,7 @@
struct qeth_cmd_buffer *iob;
__u8 index;
- QETH_DBF_TEXT(trace, 5, "irq");
+ QETH_DBF_TEXT(TRACE, 5, "irq");
if (__qeth_check_irb_error(cdev, intparm, irb))
return;
@@ -840,13 +838,13 @@
if (card->read.ccwdev == cdev) {
channel = &card->read;
- QETH_DBF_TEXT(trace, 5, "read");
+ QETH_DBF_TEXT(TRACE, 5, "read");
} else if (card->write.ccwdev == cdev) {
channel = &card->write;
- QETH_DBF_TEXT(trace, 5, "write");
+ QETH_DBF_TEXT(TRACE, 5, "write");
} else {
channel = &card->data;
- QETH_DBF_TEXT(trace, 5, "data");
+ QETH_DBF_TEXT(TRACE, 5, "data");
}
atomic_set(&channel->irq_pending, 0);
@@ -862,12 +860,12 @@
goto out;
if (intparm == QETH_CLEAR_CHANNEL_PARM) {
- QETH_DBF_TEXT(trace, 6, "clrchpar");
+ QETH_DBF_TEXT(TRACE, 6, "clrchpar");
/* we don't have to handle this further */
intparm = 0;
}
if (intparm == QETH_HALT_CHANNEL_PARM) {
- QETH_DBF_TEXT(trace, 6, "hltchpar");
+ QETH_DBF_TEXT(TRACE, 6, "hltchpar");
/* we don't have to handle this further */
intparm = 0;
}
@@ -953,7 +951,7 @@
{
int i, j;
- QETH_DBF_TEXT(trace, 2, "clearqdbf");
+ QETH_DBF_TEXT(TRACE, 2, "clearqdbf");
/* clear outbound buffers to free skbs */
for (i = 0; i < card->qdio.no_out_queues; ++i)
if (card->qdio.out_qs[i]) {
@@ -968,7 +966,7 @@
{
struct qeth_buffer_pool_entry *pool_entry, *tmp;
int i = 0;
- QETH_DBF_TEXT(trace, 5, "freepool");
+ QETH_DBF_TEXT(TRACE, 5, "freepool");
list_for_each_entry_safe(pool_entry, tmp,
&card->qdio.init_pool.entry_list, init_list){
for (i = 0; i < QETH_MAX_BUFFER_ELEMENTS(card); ++i)
@@ -982,7 +980,7 @@
{
int i, j;
- QETH_DBF_TEXT(trace, 2, "freeqdbf");
+ QETH_DBF_TEXT(TRACE, 2, "freeqdbf");
if (atomic_xchg(&card->qdio.state, QETH_QDIO_UNINITIALIZED) ==
QETH_QDIO_UNINITIALIZED)
return;
@@ -1007,7 +1005,7 @@
{
int cnt;
- QETH_DBF_TEXT(setup, 2, "freech");
+ QETH_DBF_TEXT(SETUP, 2, "freech");
for (cnt = 0; cnt < QETH_CMD_BUFFER_NO; cnt++)
kfree(channel->iob[cnt].data);
}
@@ -1027,7 +1025,7 @@
u8 chpp;
} *chp_dsc;
- QETH_DBF_TEXT(setup, 2, "chk_1920");
+ QETH_DBF_TEXT(SETUP, 2, "chk_1920");
ccwdev = card->data.ccwdev;
chp_dsc = (struct channelPath_dsc *)ccw_device_get_chp_desc(ccwdev, 0);
@@ -1036,13 +1034,13 @@
single_queue = ((chp_dsc->chpp & 0x02) == 0x02);
kfree(chp_dsc);
}
- QETH_DBF_TEXT_(setup, 2, "rc:%x", single_queue);
+ QETH_DBF_TEXT_(SETUP, 2, "rc:%x", single_queue);
return single_queue;
}
static void qeth_init_qdio_info(struct qeth_card *card)
{
- QETH_DBF_TEXT(setup, 4, "intqdinf");
+ QETH_DBF_TEXT(SETUP, 4, "intqdinf");
atomic_set(&card->qdio.state, QETH_QDIO_UNINITIALIZED);
/* inbound */
card->qdio.in_buf_size = QETH_IN_BUF_SIZE_DEFAULT;
@@ -1072,7 +1070,7 @@
int rc = 0;
spin_lock_irqsave(&card->thread_mask_lock, flags);
- QETH_DBF_TEXT_(trace, 4, " %02x%02x%02x",
+ QETH_DBF_TEXT_(TRACE, 4, " %02x%02x%02x",
(u8) card->thread_start_mask,
(u8) card->thread_allowed_mask,
(u8) card->thread_running_mask);
@@ -1085,7 +1083,7 @@
{
struct qeth_card *card = container_of(work, struct qeth_card,
kernel_thread_starter);
- QETH_DBF_TEXT(trace , 2, "strthrd");
+ QETH_DBF_TEXT(TRACE , 2, "strthrd");
if (card->read.state != CH_STATE_UP &&
card->write.state != CH_STATE_UP)
@@ -1098,8 +1096,8 @@
static int qeth_setup_card(struct qeth_card *card)
{
- QETH_DBF_TEXT(setup, 2, "setupcrd");
- QETH_DBF_HEX(setup, 2, &card, sizeof(void *));
+ QETH_DBF_TEXT(SETUP, 2, "setupcrd");
+ QETH_DBF_HEX(SETUP, 2, &card, sizeof(void *));
card->read.state = CH_STATE_DOWN;
card->write.state = CH_STATE_DOWN;
@@ -1121,7 +1119,7 @@
INIT_LIST_HEAD(&card->ip_list);
card->ip_tbd_list = kmalloc(sizeof(struct list_head), GFP_KERNEL);
if (!card->ip_tbd_list) {
- QETH_DBF_TEXT(setup, 0, "iptbdnom");
+ QETH_DBF_TEXT(SETUP, 0, "iptbdnom");
return -ENOMEM;
}
INIT_LIST_HEAD(card->ip_tbd_list);
@@ -1143,11 +1141,11 @@
{
struct qeth_card *card;
- QETH_DBF_TEXT(setup, 2, "alloccrd");
+ QETH_DBF_TEXT(SETUP, 2, "alloccrd");
card = kzalloc(sizeof(struct qeth_card), GFP_DMA|GFP_KERNEL);
if (!card)
return NULL;
- QETH_DBF_HEX(setup, 2, &card, sizeof(void *));
+ QETH_DBF_HEX(SETUP, 2, &card, sizeof(void *));
if (qeth_setup_channel(&card->read)) {
kfree(card);
return NULL;
@@ -1165,7 +1163,7 @@
{
int i = 0;
- QETH_DBF_TEXT(setup, 2, "detcdtyp");
+ QETH_DBF_TEXT(SETUP, 2, "detcdtyp");
card->qdio.do_prio_queueing = QETH_PRIOQ_DEFAULT;
card->qdio.default_out_queue = QETH_DEFAULT_QUEUE;
@@ -1196,7 +1194,7 @@
struct qeth_card *card;
int rc;
- QETH_DBF_TEXT(trace, 3, "clearch");
+ QETH_DBF_TEXT(TRACE, 3, "clearch");
card = CARD_FROM_CDEV(channel->ccwdev);
spin_lock_irqsave(get_ccwdev_lock(channel->ccwdev), flags);
rc = ccw_device_clear(channel->ccwdev, QETH_CLEAR_CHANNEL_PARM);
@@ -1220,7 +1218,7 @@
struct qeth_card *card;
int rc;
- QETH_DBF_TEXT(trace, 3, "haltch");
+ QETH_DBF_TEXT(TRACE, 3, "haltch");
card = CARD_FROM_CDEV(channel->ccwdev);
spin_lock_irqsave(get_ccwdev_lock(channel->ccwdev), flags);
rc = ccw_device_halt(channel->ccwdev, QETH_HALT_CHANNEL_PARM);
@@ -1241,7 +1239,7 @@
{
int rc1 = 0, rc2 = 0, rc3 = 0;
- QETH_DBF_TEXT(trace, 3, "haltchs");
+ QETH_DBF_TEXT(TRACE, 3, "haltchs");
rc1 = qeth_halt_channel(&card->read);
rc2 = qeth_halt_channel(&card->write);
rc3 = qeth_halt_channel(&card->data);
@@ -1256,7 +1254,7 @@
{
int rc1 = 0, rc2 = 0, rc3 = 0;
- QETH_DBF_TEXT(trace, 3, "clearchs");
+ QETH_DBF_TEXT(TRACE, 3, "clearchs");
rc1 = qeth_clear_channel(&card->read);
rc2 = qeth_clear_channel(&card->write);
rc3 = qeth_clear_channel(&card->data);
@@ -1271,8 +1269,8 @@
{
int rc = 0;
- QETH_DBF_TEXT(trace, 3, "clhacrd");
- QETH_DBF_HEX(trace, 3, &card, sizeof(void *));
+ QETH_DBF_TEXT(TRACE, 3, "clhacrd");
+ QETH_DBF_HEX(TRACE, 3, &card, sizeof(void *));
if (halt)
rc = qeth_halt_channels(card);
@@ -1285,7 +1283,7 @@
{
int rc = 0;
- QETH_DBF_TEXT(trace, 3, "qdioclr");
+ QETH_DBF_TEXT(TRACE, 3, "qdioclr");
switch (atomic_cmpxchg(&card->qdio.state, QETH_QDIO_ESTABLISHED,
QETH_QDIO_CLEANING)) {
case QETH_QDIO_ESTABLISHED:
@@ -1296,7 +1294,7 @@
rc = qdio_cleanup(CARD_DDEV(card),
QDIO_FLAG_CLEANUP_USING_CLEAR);
if (rc)
- QETH_DBF_TEXT_(trace, 3, "1err%d", rc);
+ QETH_DBF_TEXT_(TRACE, 3, "1err%d", rc);
atomic_set(&card->qdio.state, QETH_QDIO_ALLOCATED);
break;
case QETH_QDIO_CLEANING:
@@ -1306,7 +1304,7 @@
}
rc = qeth_clear_halt_card(card, use_halt);
if (rc)
- QETH_DBF_TEXT_(trace, 3, "2err%d", rc);
+ QETH_DBF_TEXT_(TRACE, 3, "2err%d", rc);
card->state = CARD_STATE_DOWN;
return rc;
}
@@ -1366,7 +1364,7 @@
char *prcd;
int rc;
- QETH_DBF_TEXT(setup, 2, "getunit");
+ QETH_DBF_TEXT(SETUP, 2, "getunit");
rc = qeth_read_conf_data(card, (void **) &prcd, &length);
if (rc) {
PRINT_ERR("qeth_read_conf_data for device %s returned %i\n",
@@ -1427,7 +1425,7 @@
int rc;
struct qeth_card *card;
- QETH_DBF_TEXT(setup, 2, "idxanswr");
+ QETH_DBF_TEXT(SETUP, 2, "idxanswr");
card = CARD_FROM_CDEV(channel->ccwdev);
iob = qeth_get_buffer(channel);
iob->callback = idx_reply_cb;
@@ -1437,7 +1435,7 @@
wait_event(card->wait_q,
atomic_cmpxchg(&channel->irq_pending, 0, 1) == 0);
- QETH_DBF_TEXT(setup, 6, "noirqpnd");
+ QETH_DBF_TEXT(SETUP, 6, "noirqpnd");
spin_lock_irqsave(get_ccwdev_lock(channel->ccwdev), flags);
rc = ccw_device_start(channel->ccwdev,
&channel->ccw, (addr_t) iob, 0, 0);
@@ -1445,7 +1443,7 @@
if (rc) {
PRINT_ERR("Error2 in activating channel rc=%d\n", rc);
- QETH_DBF_TEXT_(setup, 2, "2err%d", rc);
+ QETH_DBF_TEXT_(SETUP, 2, "2err%d", rc);
atomic_set(&channel->irq_pending, 0);
wake_up(&card->wait_q);
return rc;
@@ -1456,7 +1454,7 @@
return rc;
if (channel->state != CH_STATE_UP) {
rc = -ETIME;
- QETH_DBF_TEXT_(setup, 2, "3err%d", rc);
+ QETH_DBF_TEXT_(SETUP, 2, "3err%d", rc);
qeth_clear_cmd_buffers(channel);
} else
rc = 0;
@@ -1476,7 +1474,7 @@
card = CARD_FROM_CDEV(channel->ccwdev);
- QETH_DBF_TEXT(setup, 2, "idxactch");
+ QETH_DBF_TEXT(SETUP, 2, "idxactch");
iob = qeth_get_buffer(channel);
iob->callback = idx_reply_cb;
@@ -1506,7 +1504,7 @@
wait_event(card->wait_q,
atomic_cmpxchg(&channel->irq_pending, 0, 1) == 0);
- QETH_DBF_TEXT(setup, 6, "noirqpnd");
+ QETH_DBF_TEXT(SETUP, 6, "noirqpnd");
spin_lock_irqsave(get_ccwdev_lock(channel->ccwdev), flags);
rc = ccw_device_start(channel->ccwdev,
&channel->ccw, (addr_t) iob, 0, 0);
@@ -1514,7 +1512,7 @@
if (rc) {
PRINT_ERR("Error1 in activating channel. rc=%d\n", rc);
- QETH_DBF_TEXT_(setup, 2, "1err%d", rc);
+ QETH_DBF_TEXT_(SETUP, 2, "1err%d", rc);
atomic_set(&channel->irq_pending, 0);
wake_up(&card->wait_q);
return rc;
@@ -1525,7 +1523,7 @@
return rc;
if (channel->state != CH_STATE_ACTIVATING) {
PRINT_WARN("IDX activate timed out!\n");
- QETH_DBF_TEXT_(setup, 2, "2err%d", -ETIME);
+ QETH_DBF_TEXT_(SETUP, 2, "2err%d", -ETIME);
qeth_clear_cmd_buffers(channel);
return -ETIME;
}
@@ -1547,7 +1545,7 @@
struct qeth_card *card;
__u16 temp;
- QETH_DBF_TEXT(setup , 2, "idxwrcb");
+ QETH_DBF_TEXT(SETUP , 2, "idxwrcb");
if (channel->state == CH_STATE_DOWN) {
channel->state = CH_STATE_ACTIVATING;
@@ -1584,7 +1582,7 @@
struct qeth_card *card;
__u16 temp;
- QETH_DBF_TEXT(setup , 2, "idxrdcb");
+ QETH_DBF_TEXT(SETUP , 2, "idxrdcb");
if (channel->state == CH_STATE_DOWN) {
channel->state = CH_STATE_ACTIVATING;
goto out;
@@ -1644,7 +1642,7 @@
card->seqno.pdu_hdr++;
memcpy(QETH_PDU_HEADER_ACK_SEQ_NO(iob->data),
&card->seqno.pdu_hdr_ack, QETH_SEQ_NO_LENGTH);
- QETH_DBF_HEX(control, 2, iob->data, QETH_DBF_CONTROL_LEN);
+ QETH_DBF_HEX(CTRL, 2, iob->data, QETH_DBF_CTRL_LEN);
}
EXPORT_SYMBOL_GPL(qeth_prepare_control_data);
@@ -1659,11 +1657,11 @@
struct qeth_reply *reply = NULL;
unsigned long timeout;
- QETH_DBF_TEXT(trace, 2, "sendctl");
+ QETH_DBF_TEXT(TRACE, 2, "sendctl");
reply = qeth_alloc_reply(card);
if (!reply) {
- PRINT_WARN("Could no alloc qeth_reply!\n");
+ PRINT_WARN("Could not alloc qeth_reply!\n");
return -ENOMEM;
}
reply->callback = reply_cb;
@@ -1676,7 +1674,7 @@
spin_lock_irqsave(&card->lock, flags);
list_add_tail(&reply->list, &card->cmd_waiter_list);
spin_unlock_irqrestore(&card->lock, flags);
- QETH_DBF_HEX(control, 2, iob->data, QETH_DBF_CONTROL_LEN);
+ QETH_DBF_HEX(CTRL, 2, iob->data, QETH_DBF_CTRL_LEN);
while (atomic_cmpxchg(&card->write.irq_pending, 0, 1)) ;
qeth_prepare_control_data(card, len, iob);
@@ -1686,7 +1684,7 @@
else
timeout = jiffies + QETH_TIMEOUT;
- QETH_DBF_TEXT(trace, 6, "noirqpnd");
+ QETH_DBF_TEXT(TRACE, 6, "noirqpnd");
spin_lock_irqsave(get_ccwdev_lock(card->write.ccwdev), flags);
rc = ccw_device_start(card->write.ccwdev, &card->write.ccw,
(addr_t) iob, 0, 0);
@@ -1694,7 +1692,7 @@
if (rc) {
PRINT_WARN("qeth_send_control_data: "
"ccw_device_start rc = %i\n", rc);
- QETH_DBF_TEXT_(trace, 2, " err%d", rc);
+ QETH_DBF_TEXT_(TRACE, 2, " err%d", rc);
spin_lock_irqsave(&card->lock, flags);
list_del_init(&reply->list);
qeth_put_reply(reply);
@@ -1726,13 +1724,13 @@
{
struct qeth_cmd_buffer *iob;
- QETH_DBF_TEXT(setup, 2, "cmenblcb");
+ QETH_DBF_TEXT(SETUP, 2, "cmenblcb");
iob = (struct qeth_cmd_buffer *) data;
memcpy(&card->token.cm_filter_r,
QETH_CM_ENABLE_RESP_FILTER_TOKEN(iob->data),
QETH_MPC_TOKEN_LENGTH);
- QETH_DBF_TEXT_(setup, 2, " rc%d", iob->rc);
+ QETH_DBF_TEXT_(SETUP, 2, " rc%d", iob->rc);
return 0;
}
@@ -1741,7 +1739,7 @@
int rc;
struct qeth_cmd_buffer *iob;
- QETH_DBF_TEXT(setup, 2, "cmenable");
+ QETH_DBF_TEXT(SETUP, 2, "cmenable");
iob = qeth_wait_for_buffer(&card->write);
memcpy(iob->data, CM_ENABLE, CM_ENABLE_SIZE);
@@ -1761,13 +1759,13 @@
struct qeth_cmd_buffer *iob;
- QETH_DBF_TEXT(setup, 2, "cmsetpcb");
+ QETH_DBF_TEXT(SETUP, 2, "cmsetpcb");
iob = (struct qeth_cmd_buffer *) data;
memcpy(&card->token.cm_connection_r,
QETH_CM_SETUP_RESP_DEST_ADDR(iob->data),
QETH_MPC_TOKEN_LENGTH);
- QETH_DBF_TEXT_(setup, 2, " rc%d", iob->rc);
+ QETH_DBF_TEXT_(SETUP, 2, " rc%d", iob->rc);
return 0;
}
@@ -1776,7 +1774,7 @@
int rc;
struct qeth_cmd_buffer *iob;
- QETH_DBF_TEXT(setup, 2, "cmsetup");
+ QETH_DBF_TEXT(SETUP, 2, "cmsetup");
iob = qeth_wait_for_buffer(&card->write);
memcpy(iob->data, CM_SETUP, CM_SETUP_SIZE);
@@ -1877,7 +1875,7 @@
__u8 link_type;
struct qeth_cmd_buffer *iob;
- QETH_DBF_TEXT(setup, 2, "ulpenacb");
+ QETH_DBF_TEXT(SETUP, 2, "ulpenacb");
iob = (struct qeth_cmd_buffer *) data;
memcpy(&card->token.ulp_filter_r,
@@ -1888,7 +1886,7 @@
mtu = qeth_get_mtu_outof_framesize(framesize);
if (!mtu) {
iob->rc = -EINVAL;
- QETH_DBF_TEXT_(setup, 2, " rc%d", iob->rc);
+ QETH_DBF_TEXT_(SETUP, 2, " rc%d", iob->rc);
return 0;
}
card->info.max_mtu = mtu;
@@ -1907,7 +1905,7 @@
card->info.link_type = link_type;
} else
card->info.link_type = 0;
- QETH_DBF_TEXT_(setup, 2, " rc%d", iob->rc);
+ QETH_DBF_TEXT_(SETUP, 2, " rc%d", iob->rc);
return 0;
}
@@ -1918,7 +1916,7 @@
struct qeth_cmd_buffer *iob;
/*FIXME: trace view callbacks*/
- QETH_DBF_TEXT(setup, 2, "ulpenabl");
+ QETH_DBF_TEXT(SETUP, 2, "ulpenabl");
iob = qeth_wait_for_buffer(&card->write);
memcpy(iob->data, ULP_ENABLE, ULP_ENABLE_SIZE);
@@ -1951,13 +1949,13 @@
{
struct qeth_cmd_buffer *iob;
- QETH_DBF_TEXT(setup, 2, "ulpstpcb");
+ QETH_DBF_TEXT(SETUP, 2, "ulpstpcb");
iob = (struct qeth_cmd_buffer *) data;
memcpy(&card->token.ulp_connection_r,
QETH_ULP_SETUP_RESP_CONNECTION_TOKEN(iob->data),
QETH_MPC_TOKEN_LENGTH);
- QETH_DBF_TEXT_(setup, 2, " rc%d", iob->rc);
+ QETH_DBF_TEXT_(SETUP, 2, " rc%d", iob->rc);
return 0;
}
@@ -1968,7 +1966,7 @@
struct qeth_cmd_buffer *iob;
struct ccw_dev_id dev_id;
- QETH_DBF_TEXT(setup, 2, "ulpsetup");
+ QETH_DBF_TEXT(SETUP, 2, "ulpsetup");
iob = qeth_wait_for_buffer(&card->write);
memcpy(iob->data, ULP_SETUP, ULP_SETUP_SIZE);
@@ -1993,18 +1991,18 @@
{
int i, j;
- QETH_DBF_TEXT(setup, 2, "allcqdbf");
+ QETH_DBF_TEXT(SETUP, 2, "allcqdbf");
if (atomic_cmpxchg(&card->qdio.state, QETH_QDIO_UNINITIALIZED,
QETH_QDIO_ALLOCATED) != QETH_QDIO_UNINITIALIZED)
return 0;
card->qdio.in_q = kmalloc(sizeof(struct qeth_qdio_q),
- GFP_KERNEL|GFP_DMA);
+ GFP_KERNEL);
if (!card->qdio.in_q)
goto out_nomem;
- QETH_DBF_TEXT(setup, 2, "inq");
- QETH_DBF_HEX(setup, 2, &card->qdio.in_q, sizeof(void *));
+ QETH_DBF_TEXT(SETUP, 2, "inq");
+ QETH_DBF_HEX(SETUP, 2, &card->qdio.in_q, sizeof(void *));
memset(card->qdio.in_q, 0, sizeof(struct qeth_qdio_q));
/* give inbound qeth_qdio_buffers their qdio_buffers */
for (i = 0; i < QDIO_MAX_BUFFERS_PER_Q; ++i)
@@ -2021,11 +2019,11 @@
goto out_freepool;
for (i = 0; i < card->qdio.no_out_queues; ++i) {
card->qdio.out_qs[i] = kmalloc(sizeof(struct qeth_qdio_out_q),
- GFP_KERNEL|GFP_DMA);
+ GFP_KERNEL);
if (!card->qdio.out_qs[i])
goto out_freeoutq;
- QETH_DBF_TEXT_(setup, 2, "outq %i", i);
- QETH_DBF_HEX(setup, 2, &card->qdio.out_qs[i], sizeof(void *));
+ QETH_DBF_TEXT_(SETUP, 2, "outq %i", i);
+ QETH_DBF_HEX(SETUP, 2, &card->qdio.out_qs[i], sizeof(void *));
memset(card->qdio.out_qs[i], 0, sizeof(struct qeth_qdio_out_q));
card->qdio.out_qs[i]->queue_no = i;
/* give outbound qeth_qdio_buffers their qdio_buffers */
@@ -2085,7 +2083,7 @@
static int qeth_qdio_activate(struct qeth_card *card)
{
- QETH_DBF_TEXT(setup, 3, "qdioact");
+ QETH_DBF_TEXT(SETUP, 3, "qdioact");
return qdio_activate(CARD_DDEV(card), 0);
}
@@ -2094,7 +2092,7 @@
int rc;
struct qeth_cmd_buffer *iob;
- QETH_DBF_TEXT(setup, 2, "dmact");
+ QETH_DBF_TEXT(SETUP, 2, "dmact");
iob = qeth_wait_for_buffer(&card->write);
memcpy(iob->data, DM_ACT, DM_ACT_SIZE);
@@ -2111,52 +2109,52 @@
{
int rc;
- QETH_DBF_TEXT(setup, 2, "mpcinit");
+ QETH_DBF_TEXT(SETUP, 2, "mpcinit");
rc = qeth_issue_next_read(card);
if (rc) {
- QETH_DBF_TEXT_(setup, 2, "1err%d", rc);
+ QETH_DBF_TEXT_(SETUP, 2, "1err%d", rc);
return rc;
}
rc = qeth_cm_enable(card);
if (rc) {
- QETH_DBF_TEXT_(setup, 2, "2err%d", rc);
+ QETH_DBF_TEXT_(SETUP, 2, "2err%d", rc);
goto out_qdio;
}
rc = qeth_cm_setup(card);
if (rc) {
- QETH_DBF_TEXT_(setup, 2, "3err%d", rc);
+ QETH_DBF_TEXT_(SETUP, 2, "3err%d", rc);
goto out_qdio;
}
rc = qeth_ulp_enable(card);
if (rc) {
- QETH_DBF_TEXT_(setup, 2, "4err%d", rc);
+ QETH_DBF_TEXT_(SETUP, 2, "4err%d", rc);
goto out_qdio;
}
rc = qeth_ulp_setup(card);
if (rc) {
- QETH_DBF_TEXT_(setup, 2, "5err%d", rc);
+ QETH_DBF_TEXT_(SETUP, 2, "5err%d", rc);
goto out_qdio;
}
rc = qeth_alloc_qdio_buffers(card);
if (rc) {
- QETH_DBF_TEXT_(setup, 2, "5err%d", rc);
+ QETH_DBF_TEXT_(SETUP, 2, "5err%d", rc);
goto out_qdio;
}
rc = qeth_qdio_establish(card);
if (rc) {
- QETH_DBF_TEXT_(setup, 2, "6err%d", rc);
+ QETH_DBF_TEXT_(SETUP, 2, "6err%d", rc);
qeth_free_qdio_buffers(card);
goto out_qdio;
}
rc = qeth_qdio_activate(card);
if (rc) {
- QETH_DBF_TEXT_(setup, 2, "7err%d", rc);
+ QETH_DBF_TEXT_(SETUP, 2, "7err%d", rc);
goto out_qdio;
}
rc = qeth_dm_act(card);
if (rc) {
- QETH_DBF_TEXT_(setup, 2, "8err%d", rc);
+ QETH_DBF_TEXT_(SETUP, 2, "8err%d", rc);
goto out_qdio;
}
@@ -2260,7 +2258,7 @@
void qeth_put_buffer_pool_entry(struct qeth_card *card,
struct qeth_buffer_pool_entry *entry)
{
- QETH_DBF_TEXT(trace, 6, "ptbfplen");
+ QETH_DBF_TEXT(TRACE, 6, "ptbfplen");
list_add_tail(&entry->list, &card->qdio.in_buf_pool.entry_list);
}
EXPORT_SYMBOL_GPL(qeth_put_buffer_pool_entry);
@@ -2269,7 +2267,7 @@
{
struct qeth_buffer_pool_entry *entry;
- QETH_DBF_TEXT(trace, 5, "inwrklst");
+ QETH_DBF_TEXT(TRACE, 5, "inwrklst");
list_for_each_entry(entry,
&card->qdio.init_pool.entry_list, init_list) {
@@ -2308,7 +2306,7 @@
struct qeth_buffer_pool_entry, list);
for (i = 0; i < QETH_MAX_BUFFER_ELEMENTS(card); ++i) {
if (page_count(virt_to_page(entry->elements[i])) > 1) {
- page = alloc_page(GFP_ATOMIC|GFP_DMA);
+ page = alloc_page(GFP_ATOMIC);
if (!page) {
return NULL;
} else {
@@ -2358,7 +2356,7 @@
int i, j;
int rc;
- QETH_DBF_TEXT(setup, 2, "initqdqs");
+ QETH_DBF_TEXT(SETUP, 2, "initqdqs");
/* inbound queue */
memset(card->qdio.in_q->qdio_bufs, 0,
@@ -2372,12 +2370,12 @@
rc = do_QDIO(CARD_DDEV(card), QDIO_FLAG_SYNC_INPUT, 0, 0,
card->qdio.in_buf_pool.buf_count - 1, NULL);
if (rc) {
- QETH_DBF_TEXT_(setup, 2, "1err%d", rc);
+ QETH_DBF_TEXT_(SETUP, 2, "1err%d", rc);
return rc;
}
rc = qdio_synchronize(CARD_DDEV(card), QDIO_FLAG_SYNC_INPUT, 0);
if (rc) {
- QETH_DBF_TEXT_(setup, 2, "2err%d", rc);
+ QETH_DBF_TEXT_(SETUP, 2, "2err%d", rc);
return rc;
}
/* outbound queue */
@@ -2461,11 +2459,8 @@
{
int rc;
char prot_type;
- int cmd;
- cmd = ((struct qeth_ipa_cmd *)
- (iob->data+IPA_PDU_HEADER_SIZE))->hdr.command;
- QETH_DBF_TEXT(trace, 4, "sendipa");
+ QETH_DBF_TEXT(TRACE, 4, "sendipa");
if (card->options.layer2)
if (card->info.type == QETH_CARD_TYPE_OSN)
@@ -2475,14 +2470,8 @@
else
prot_type = QETH_PROT_TCPIP;
qeth_prepare_ipa_cmd(card, iob, prot_type);
- rc = qeth_send_control_data(card, IPA_CMD_LENGTH, iob,
- reply_cb, reply_param);
- if (rc != 0) {
- char *ipa_cmd_name;
- ipa_cmd_name = qeth_get_ipa_cmd_name(cmd);
- PRINT_ERR("%s %s(%x) returned %s(%x)\n", __FUNCTION__,
- ipa_cmd_name, cmd, qeth_get_ipa_msg(rc), rc);
- }
+ rc = qeth_send_control_data(card, IPA_CMD_LENGTH,
+ iob, reply_cb, reply_param);
return rc;
}
EXPORT_SYMBOL_GPL(qeth_send_ipa_cmd);
@@ -2503,7 +2492,7 @@
{
int rc;
- QETH_DBF_TEXT(setup, 2, "strtlan");
+ QETH_DBF_TEXT(SETUP, 2, "strtlan");
rc = qeth_send_startstoplan(card, IPA_CMD_STARTLAN, 0);
return rc;
@@ -2519,7 +2508,7 @@
* TCP/IP (we!) never issue a STOPLAN
* is this right ?!?
*/
- QETH_DBF_TEXT(setup, 2, "stoplan");
+ QETH_DBF_TEXT(SETUP, 2, "stoplan");
rc = qeth_send_startstoplan(card, IPA_CMD_STOPLAN, 0);
return rc;
@@ -2531,7 +2520,7 @@
{
struct qeth_ipa_cmd *cmd;
- QETH_DBF_TEXT(trace, 4, "defadpcb");
+ QETH_DBF_TEXT(TRACE, 4, "defadpcb");
cmd = (struct qeth_ipa_cmd *) data;
if (cmd->hdr.return_code == 0)
@@ -2546,7 +2535,7 @@
{
struct qeth_ipa_cmd *cmd;
- QETH_DBF_TEXT(trace, 3, "quyadpcb");
+ QETH_DBF_TEXT(TRACE, 3, "quyadpcb");
cmd = (struct qeth_ipa_cmd *) data;
if (cmd->data.setadapterparms.data.query_cmds_supp.lan_type & 0x7f)
@@ -2580,7 +2569,7 @@
int rc;
struct qeth_cmd_buffer *iob;
- QETH_DBF_TEXT(trace, 3, "queryadp");
+ QETH_DBF_TEXT(TRACE, 3, "queryadp");
iob = qeth_get_adapter_cmd(card, IPA_SETADP_QUERY_COMMANDS_SUPPORTED,
sizeof(struct qeth_ipacmd_setadpparms));
rc = qeth_send_ipa_cmd(card, iob, qeth_query_setadapterparms_cb, NULL);
@@ -2592,14 +2581,14 @@
unsigned int siga_error, const char *dbftext)
{
if (qdio_error || siga_error) {
- QETH_DBF_TEXT(trace, 2, dbftext);
- QETH_DBF_TEXT(qerr, 2, dbftext);
- QETH_DBF_TEXT_(qerr, 2, " F15=%02X",
+ QETH_DBF_TEXT(TRACE, 2, dbftext);
+ QETH_DBF_TEXT(QERR, 2, dbftext);
+ QETH_DBF_TEXT_(QERR, 2, " F15=%02X",
buf->element[15].flags & 0xff);
- QETH_DBF_TEXT_(qerr, 2, " F14=%02X",
+ QETH_DBF_TEXT_(QERR, 2, " F14=%02X",
buf->element[14].flags & 0xff);
- QETH_DBF_TEXT_(qerr, 2, " qerr=%X", qdio_error);
- QETH_DBF_TEXT_(qerr, 2, " serr=%X", siga_error);
+ QETH_DBF_TEXT_(QERR, 2, " qerr=%X", qdio_error);
+ QETH_DBF_TEXT_(QERR, 2, " serr=%X", siga_error);
return 1;
}
return 0;
@@ -2614,7 +2603,7 @@
int rc;
int newcount = 0;
- QETH_DBF_TEXT(trace, 6, "queinbuf");
+ QETH_DBF_TEXT(TRACE, 6, "queinbuf");
count = (index < queue->next_buf_to_init)?
card->qdio.in_buf_pool.buf_count -
(queue->next_buf_to_init - index) :
@@ -2670,8 +2659,8 @@
PRINT_WARN("qeth_queue_input_buffer's do_QDIO "
"return %i (device %s).\n",
rc, CARD_DDEV_ID(card));
- QETH_DBF_TEXT(trace, 2, "qinberr");
- QETH_DBF_TEXT_(trace, 2, "%s", CARD_BUS_ID(card));
+ QETH_DBF_TEXT(TRACE, 2, "qinberr");
+ QETH_DBF_TEXT_(TRACE, 2, "%s", CARD_BUS_ID(card));
}
queue->next_buf_to_init = (queue->next_buf_to_init + count) %
QDIO_MAX_BUFFERS_PER_Q;
@@ -2686,22 +2675,22 @@
int sbalf15 = buffer->buffer->element[15].flags & 0xff;
int cc = siga_err & 3;
- QETH_DBF_TEXT(trace, 6, "hdsnderr");
+ QETH_DBF_TEXT(TRACE, 6, "hdsnderr");
qeth_check_qdio_errors(buffer->buffer, qdio_err, siga_err, "qouterr");
switch (cc) {
case 0:
if (qdio_err) {
- QETH_DBF_TEXT(trace, 1, "lnkfail");
- QETH_DBF_TEXT_(trace, 1, "%s", CARD_BUS_ID(card));
- QETH_DBF_TEXT_(trace, 1, "%04x %02x",
+ QETH_DBF_TEXT(TRACE, 1, "lnkfail");
+ QETH_DBF_TEXT_(TRACE, 1, "%s", CARD_BUS_ID(card));
+ QETH_DBF_TEXT_(TRACE, 1, "%04x %02x",
(u16)qdio_err, (u8)sbalf15);
return QETH_SEND_ERROR_LINK_FAILURE;
}
return QETH_SEND_ERROR_NONE;
case 2:
if (siga_err & QDIO_SIGA_ERROR_B_BIT_SET) {
- QETH_DBF_TEXT(trace, 1, "SIGAcc2B");
- QETH_DBF_TEXT_(trace, 1, "%s", CARD_BUS_ID(card));
+ QETH_DBF_TEXT(TRACE, 1, "SIGAcc2B");
+ QETH_DBF_TEXT_(TRACE, 1, "%s", CARD_BUS_ID(card));
return QETH_SEND_ERROR_KICK_IT;
}
if ((sbalf15 >= 15) && (sbalf15 <= 31))
@@ -2709,13 +2698,13 @@
return QETH_SEND_ERROR_LINK_FAILURE;
/* look at qdio_error and sbalf 15 */
case 1:
- QETH_DBF_TEXT(trace, 1, "SIGAcc1");
- QETH_DBF_TEXT_(trace, 1, "%s", CARD_BUS_ID(card));
+ QETH_DBF_TEXT(TRACE, 1, "SIGAcc1");
+ QETH_DBF_TEXT_(TRACE, 1, "%s", CARD_BUS_ID(card));
return QETH_SEND_ERROR_LINK_FAILURE;
case 3:
default:
- QETH_DBF_TEXT(trace, 1, "SIGAcc3");
- QETH_DBF_TEXT_(trace, 1, "%s", CARD_BUS_ID(card));
+ QETH_DBF_TEXT(TRACE, 1, "SIGAcc3");
+ QETH_DBF_TEXT_(TRACE, 1, "%s", CARD_BUS_ID(card));
return QETH_SEND_ERROR_KICK_IT;
}
}
@@ -2730,7 +2719,7 @@
if (atomic_read(&queue->used_buffers)
>= QETH_HIGH_WATERMARK_PACK){
/* switch non-PACKING -> PACKING */
- QETH_DBF_TEXT(trace, 6, "np->pack");
+ QETH_DBF_TEXT(TRACE, 6, "np->pack");
if (queue->card->options.performance_stats)
queue->card->perf_stats.sc_dp_p++;
queue->do_pack = 1;
@@ -2753,7 +2742,7 @@
if (atomic_read(&queue->used_buffers)
<= QETH_LOW_WATERMARK_PACK) {
/* switch PACKING -> non-PACKING */
- QETH_DBF_TEXT(trace, 6, "pack->np");
+ QETH_DBF_TEXT(TRACE, 6, "pack->np");
if (queue->card->options.performance_stats)
queue->card->perf_stats.sc_p_dp++;
queue->do_pack = 0;
@@ -2803,7 +2792,7 @@
int i;
unsigned int qdio_flags;
- QETH_DBF_TEXT(trace, 6, "flushbuf");
+ QETH_DBF_TEXT(TRACE, 6, "flushbuf");
for (i = index; i < index + count; ++i) {
buf = &queue->bufs[i % QDIO_MAX_BUFFERS_PER_Q];
@@ -2857,9 +2846,9 @@
qeth_get_micros() -
queue->card->perf_stats.outbound_do_qdio_start_time;
if (rc) {
- QETH_DBF_TEXT(trace, 2, "flushbuf");
- QETH_DBF_TEXT_(trace, 2, " err%d", rc);
- QETH_DBF_TEXT_(trace, 2, "%s", CARD_DDEV_ID(queue->card));
+ QETH_DBF_TEXT(TRACE, 2, "flushbuf");
+ QETH_DBF_TEXT_(TRACE, 2, " err%d", rc);
+ QETH_DBF_TEXT_(TRACE, 2, "%s", CARD_DDEV_ID(queue->card));
queue->card->stats.tx_errors += count;
/* this must not happen under normal circumstances. if it
* happens something is really wrong -> recover */
@@ -2921,12 +2910,12 @@
struct qeth_qdio_out_buffer *buffer;
int i;
- QETH_DBF_TEXT(trace, 6, "qdouhdl");
+ QETH_DBF_TEXT(TRACE, 6, "qdouhdl");
if (status & QDIO_STATUS_LOOK_FOR_ERROR) {
if (status & QDIO_STATUS_ACTIVATE_CHECK_CONDITION) {
- QETH_DBF_TEXT(trace, 2, "achkcond");
- QETH_DBF_TEXT_(trace, 2, "%s", CARD_BUS_ID(card));
- QETH_DBF_TEXT_(trace, 2, "%08x", status);
+ QETH_DBF_TEXT(TRACE, 2, "achkcond");
+ QETH_DBF_TEXT_(TRACE, 2, "%s", CARD_BUS_ID(card));
+ QETH_DBF_TEXT_(TRACE, 2, "%08x", status);
netif_stop_queue(card->dev);
qeth_schedule_recovery(card);
return;
@@ -3074,7 +3063,7 @@
{
struct sk_buff *new_skb;
- QETH_DBF_TEXT(trace, 6, "prepskb");
+ QETH_DBF_TEXT(TRACE, 6, "prepskb");
new_skb = qeth_realloc_headroom(card, skb,
sizeof(struct qeth_hdr));
@@ -3161,7 +3150,7 @@
struct qeth_hdr_tso *hdr;
int flush_cnt = 0, hdr_len, large_send = 0;
- QETH_DBF_TEXT(trace, 6, "qdfillbf");
+ QETH_DBF_TEXT(TRACE, 6, "qdfillbf");
buffer = buf->buffer;
atomic_inc(&skb->users);
@@ -3190,12 +3179,12 @@
(int *)&buf->next_element_to_fill);
if (!queue->do_pack) {
- QETH_DBF_TEXT(trace, 6, "fillbfnp");
+ QETH_DBF_TEXT(TRACE, 6, "fillbfnp");
/* set state to PRIMED -> will be flushed */
atomic_set(&buf->state, QETH_QDIO_BUF_PRIMED);
flush_cnt = 1;
} else {
- QETH_DBF_TEXT(trace, 6, "fillbfpa");
+ QETH_DBF_TEXT(TRACE, 6, "fillbfpa");
if (queue->card->options.performance_stats)
queue->card->perf_stats.skbs_sent_pack++;
if (buf->next_element_to_fill >=
@@ -3221,7 +3210,7 @@
int flush_cnt = 0;
int index;
- QETH_DBF_TEXT(trace, 6, "dosndpfa");
+ QETH_DBF_TEXT(TRACE, 6, "dosndpfa");
/* spin until we get the queue ... */
while (atomic_cmpxchg(&queue->state, QETH_OUT_Q_UNLOCKED,
@@ -3274,7 +3263,7 @@
int tmp;
int rc = 0;
- QETH_DBF_TEXT(trace, 6, "dosndpkt");
+ QETH_DBF_TEXT(TRACE, 6, "dosndpkt");
/* spin until we get the queue ... */
while (atomic_cmpxchg(&queue->state, QETH_OUT_Q_UNLOCKED,
@@ -3381,14 +3370,14 @@
struct qeth_ipa_cmd *cmd;
struct qeth_ipacmd_setadpparms *setparms;
- QETH_DBF_TEXT(trace, 4, "prmadpcb");
+ QETH_DBF_TEXT(TRACE, 4, "prmadpcb");
cmd = (struct qeth_ipa_cmd *) data;
setparms = &(cmd->data.setadapterparms);
qeth_default_setadapterparms_cb(card, reply, (unsigned long)cmd);
if (cmd->hdr.return_code) {
- QETH_DBF_TEXT_(trace, 4, "prmrc%2.2x", cmd->hdr.return_code);
+ QETH_DBF_TEXT_(TRACE, 4, "prmrc%2.2x", cmd->hdr.return_code);
setparms->data.mode = SET_PROMISC_MODE_OFF;
}
card->info.promisc_mode = setparms->data.mode;
@@ -3402,7 +3391,7 @@
struct qeth_cmd_buffer *iob;
struct qeth_ipa_cmd *cmd;
- QETH_DBF_TEXT(trace, 4, "setprom");
+ QETH_DBF_TEXT(TRACE, 4, "setprom");
if (((dev->flags & IFF_PROMISC) &&
(card->info.promisc_mode == SET_PROMISC_MODE_ON)) ||
@@ -3412,7 +3401,7 @@
mode = SET_PROMISC_MODE_OFF;
if (dev->flags & IFF_PROMISC)
mode = SET_PROMISC_MODE_ON;
- QETH_DBF_TEXT_(trace, 4, "mode:%x", mode);
+ QETH_DBF_TEXT_(TRACE, 4, "mode:%x", mode);
iob = qeth_get_adapter_cmd(card, IPA_SETADP_SET_PROMISC_MODE,
sizeof(struct qeth_ipacmd_setadpparms));
@@ -3429,9 +3418,9 @@
card = netdev_priv(dev);
- QETH_DBF_TEXT(trace, 4, "chgmtu");
+ QETH_DBF_TEXT(TRACE, 4, "chgmtu");
sprintf(dbf_text, "%8x", new_mtu);
- QETH_DBF_TEXT(trace, 4, dbf_text);
+ QETH_DBF_TEXT(TRACE, 4, dbf_text);
if (new_mtu < 64)
return -EINVAL;
@@ -3451,7 +3440,7 @@
card = netdev_priv(dev);
- QETH_DBF_TEXT(trace, 5, "getstat");
+ QETH_DBF_TEXT(TRACE, 5, "getstat");
return &card->stats;
}
@@ -3462,7 +3451,7 @@
{
struct qeth_ipa_cmd *cmd;
- QETH_DBF_TEXT(trace, 4, "chgmaccb");
+ QETH_DBF_TEXT(TRACE, 4, "chgmaccb");
cmd = (struct qeth_ipa_cmd *) data;
if (!card->options.layer2 ||
@@ -3482,7 +3471,7 @@
struct qeth_cmd_buffer *iob;
struct qeth_ipa_cmd *cmd;
- QETH_DBF_TEXT(trace, 4, "chgmac");
+ QETH_DBF_TEXT(TRACE, 4, "chgmac");
iob = qeth_get_adapter_cmd(card, IPA_SETADP_ALTER_MAC_ADDRESS,
sizeof(struct qeth_ipacmd_setadpparms));
@@ -3580,7 +3569,7 @@
{
u16 s1, s2;
- QETH_DBF_TEXT(trace, 4, "sendsnmp");
+ QETH_DBF_TEXT(TRACE, 4, "sendsnmp");
memcpy(iob->data, IPA_PDU_HEADER, IPA_PDU_HEADER_SIZE);
memcpy(QETH_IPA_CMD_DEST_ADDR(iob->data),
@@ -3605,7 +3594,7 @@
unsigned char *data;
__u16 data_len;
- QETH_DBF_TEXT(trace, 3, "snpcmdcb");
+ QETH_DBF_TEXT(TRACE, 3, "snpcmdcb");
cmd = (struct qeth_ipa_cmd *) sdata;
data = (unsigned char *)((char *)cmd - reply->offset);
@@ -3613,13 +3602,13 @@
snmp = &cmd->data.setadapterparms.data.snmp;
if (cmd->hdr.return_code) {
- QETH_DBF_TEXT_(trace, 4, "scer1%i", cmd->hdr.return_code);
+ QETH_DBF_TEXT_(TRACE, 4, "scer1%i", cmd->hdr.return_code);
return 0;
}
if (cmd->data.setadapterparms.hdr.return_code) {
cmd->hdr.return_code =
cmd->data.setadapterparms.hdr.return_code;
- QETH_DBF_TEXT_(trace, 4, "scer2%i", cmd->hdr.return_code);
+ QETH_DBF_TEXT_(TRACE, 4, "scer2%i", cmd->hdr.return_code);
return 0;
}
data_len = *((__u16 *)QETH_IPA_PDU_LEN_PDU1(data));
@@ -3630,13 +3619,13 @@
/* check if there is enough room in userspace */
if ((qinfo->udata_len - qinfo->udata_offset) < data_len) {
- QETH_DBF_TEXT_(trace, 4, "scer3%i", -ENOMEM);
+ QETH_DBF_TEXT_(TRACE, 4, "scer3%i", -ENOMEM);
cmd->hdr.return_code = -ENOMEM;
return 0;
}
- QETH_DBF_TEXT_(trace, 4, "snore%i",
+ QETH_DBF_TEXT_(TRACE, 4, "snore%i",
cmd->data.setadapterparms.hdr.used_total);
- QETH_DBF_TEXT_(trace, 4, "sseqn%i",
+ QETH_DBF_TEXT_(TRACE, 4, "sseqn%i",
cmd->data.setadapterparms.hdr.seq_no);
/*copy entries to user buffer*/
if (cmd->data.setadapterparms.hdr.seq_no == 1) {
@@ -3650,9 +3639,9 @@
}
qinfo->udata_offset += data_len;
/* check if all replies received ... */
- QETH_DBF_TEXT_(trace, 4, "srtot%i",
+ QETH_DBF_TEXT_(TRACE, 4, "srtot%i",
cmd->data.setadapterparms.hdr.used_total);
- QETH_DBF_TEXT_(trace, 4, "srseq%i",
+ QETH_DBF_TEXT_(TRACE, 4, "srseq%i",
cmd->data.setadapterparms.hdr.seq_no);
if (cmd->data.setadapterparms.hdr.seq_no <
cmd->data.setadapterparms.hdr.used_total)
@@ -3669,7 +3658,7 @@
struct qeth_arp_query_info qinfo = {0, };
int rc = 0;
- QETH_DBF_TEXT(trace, 3, "snmpcmd");
+ QETH_DBF_TEXT(TRACE, 3, "snmpcmd");
if (card->info.guestlan)
return -EOPNOTSUPP;
@@ -3685,7 +3674,7 @@
return -EFAULT;
ureq = kmalloc(req_len+sizeof(struct qeth_snmp_ureq_hdr), GFP_KERNEL);
if (!ureq) {
- QETH_DBF_TEXT(trace, 2, "snmpnome");
+ QETH_DBF_TEXT(TRACE, 2, "snmpnome");
return -ENOMEM;
}
if (copy_from_user(ureq, udata,
@@ -3740,7 +3729,7 @@
int i, j, k;
int rc = 0;
- QETH_DBF_TEXT(setup, 2, "qdioest");
+ QETH_DBF_TEXT(SETUP, 2, "qdioest");
qib_param_field = kzalloc(QDIO_MAX_BUFFERS_PER_Q * sizeof(char),
GFP_KERNEL);
@@ -3809,8 +3798,8 @@
static void qeth_core_free_card(struct qeth_card *card)
{
- QETH_DBF_TEXT(setup, 2, "freecrd");
- QETH_DBF_HEX(setup, 2, &card, sizeof(void *));
+ QETH_DBF_TEXT(SETUP, 2, "freecrd");
+ QETH_DBF_HEX(SETUP, 2, &card, sizeof(void *));
qeth_clean_channel(&card->read);
qeth_clean_channel(&card->write);
if (card->dev)
@@ -3867,7 +3856,7 @@
int mpno;
int rc;
- QETH_DBF_TEXT(setup, 2, "hrdsetup");
+ QETH_DBF_TEXT(SETUP, 2, "hrdsetup");
atomic_set(&card->force_alloc_skb, 0);
retry:
if (retries < 3) {
@@ -3881,10 +3870,10 @@
}
rc = qeth_qdio_clear_card(card, card->info.type != QETH_CARD_TYPE_IQD);
if (rc == -ERESTARTSYS) {
- QETH_DBF_TEXT(setup, 2, "break1");
+ QETH_DBF_TEXT(SETUP, 2, "break1");
return rc;
} else if (rc) {
- QETH_DBF_TEXT_(setup, 2, "1err%d", rc);
+ QETH_DBF_TEXT_(SETUP, 2, "1err%d", rc);
if (--retries < 0)
goto out;
else
@@ -3893,7 +3882,7 @@
rc = qeth_get_unitaddr(card);
if (rc) {
- QETH_DBF_TEXT_(setup, 2, "2err%d", rc);
+ QETH_DBF_TEXT_(SETUP, 2, "2err%d", rc);
return rc;
}
@@ -3908,10 +3897,10 @@
qeth_init_func_level(card);
rc = qeth_idx_activate_channel(&card->read, qeth_idx_read_cb);
if (rc == -ERESTARTSYS) {
- QETH_DBF_TEXT(setup, 2, "break2");
+ QETH_DBF_TEXT(SETUP, 2, "break2");
return rc;
} else if (rc) {
- QETH_DBF_TEXT_(setup, 2, "3err%d", rc);
+ QETH_DBF_TEXT_(SETUP, 2, "3err%d", rc);
if (--retries < 0)
goto out;
else
@@ -3919,10 +3908,10 @@
}
rc = qeth_idx_activate_channel(&card->write, qeth_idx_write_cb);
if (rc == -ERESTARTSYS) {
- QETH_DBF_TEXT(setup, 2, "break3");
+ QETH_DBF_TEXT(SETUP, 2, "break3");
return rc;
} else if (rc) {
- QETH_DBF_TEXT_(setup, 2, "4err%d", rc);
+ QETH_DBF_TEXT_(SETUP, 2, "4err%d", rc);
if (--retries < 0)
goto out;
else
@@ -3930,7 +3919,7 @@
}
rc = qeth_mpc_initialize(card);
if (rc) {
- QETH_DBF_TEXT_(setup, 2, "5err%d", rc);
+ QETH_DBF_TEXT_(SETUP, 2, "5err%d", rc);
goto out;
}
return 0;
@@ -3991,7 +3980,7 @@
int use_rx_sg = 0;
int frag = 0;
- QETH_DBF_TEXT(trace, 6, "nextskb");
+ QETH_DBF_TEXT(TRACE, 6, "nextskb");
/* qeth_hdr must not cross element boundaries */
if (element->length < offset + sizeof(struct qeth_hdr)) {
if (qeth_is_last_sbale(element))
@@ -4013,7 +4002,11 @@
}
} else {
skb_len = (*hdr)->hdr.l3.length;
- headroom = max((int)ETH_HLEN, (int)TR_HLEN);
+ if ((card->info.link_type == QETH_LINK_TYPE_LANE_TR) ||
+ (card->info.link_type == QETH_LINK_TYPE_HSTR))
+ headroom = TR_HLEN;
+ else
+ headroom = ETH_HLEN;
}
if (!skb_len)
@@ -4047,13 +4040,13 @@
skb_len -= data_len;
if (skb_len) {
if (qeth_is_last_sbale(element)) {
- QETH_DBF_TEXT(trace, 4, "unexeob");
- QETH_DBF_TEXT_(trace, 4, "%s",
+ QETH_DBF_TEXT(TRACE, 4, "unexeob");
+ QETH_DBF_TEXT_(TRACE, 4, "%s",
CARD_BUS_ID(card));
- QETH_DBF_TEXT(qerr, 2, "unexeob");
- QETH_DBF_TEXT_(qerr, 2, "%s",
+ QETH_DBF_TEXT(QERR, 2, "unexeob");
+ QETH_DBF_TEXT_(QERR, 2, "%s",
CARD_BUS_ID(card));
- QETH_DBF_HEX(misc, 4, buffer, sizeof(*buffer));
+ QETH_DBF_HEX(MISC, 4, buffer, sizeof(*buffer));
dev_kfree_skb_any(skb);
card->stats.rx_errors++;
return NULL;
@@ -4076,8 +4069,8 @@
if (net_ratelimit()) {
PRINT_WARN("No memory for packet received on %s.\n",
QETH_CARD_IFNAME(card));
- QETH_DBF_TEXT(trace, 2, "noskbmem");
- QETH_DBF_TEXT_(trace, 2, "%s", CARD_BUS_ID(card));
+ QETH_DBF_TEXT(TRACE, 2, "noskbmem");
+ QETH_DBF_TEXT_(TRACE, 2, "%s", CARD_BUS_ID(card));
}
card->stats.rx_dropped++;
return NULL;
@@ -4086,80 +4079,39 @@
static void qeth_unregister_dbf_views(void)
{
- if (qeth_dbf_setup)
- debug_unregister(qeth_dbf_setup);
- if (qeth_dbf_qerr)
- debug_unregister(qeth_dbf_qerr);
- if (qeth_dbf_sense)
- debug_unregister(qeth_dbf_sense);
- if (qeth_dbf_misc)
- debug_unregister(qeth_dbf_misc);
- if (qeth_dbf_data)
- debug_unregister(qeth_dbf_data);
- if (qeth_dbf_control)
- debug_unregister(qeth_dbf_control);
- if (qeth_dbf_trace)
- debug_unregister(qeth_dbf_trace);
+ int x;
+ for (x = 0; x < QETH_DBF_INFOS; x++) {
+ debug_unregister(qeth_dbf[x].id);
+ qeth_dbf[x].id = NULL;
+ }
}
static int qeth_register_dbf_views(void)
{
- qeth_dbf_setup = debug_register(QETH_DBF_SETUP_NAME,
- QETH_DBF_SETUP_PAGES,
- QETH_DBF_SETUP_NR_AREAS,
- QETH_DBF_SETUP_LEN);
- qeth_dbf_misc = debug_register(QETH_DBF_MISC_NAME,
- QETH_DBF_MISC_PAGES,
- QETH_DBF_MISC_NR_AREAS,
- QETH_DBF_MISC_LEN);
- qeth_dbf_data = debug_register(QETH_DBF_DATA_NAME,
- QETH_DBF_DATA_PAGES,
- QETH_DBF_DATA_NR_AREAS,
- QETH_DBF_DATA_LEN);
- qeth_dbf_control = debug_register(QETH_DBF_CONTROL_NAME,
- QETH_DBF_CONTROL_PAGES,
- QETH_DBF_CONTROL_NR_AREAS,
- QETH_DBF_CONTROL_LEN);
- qeth_dbf_sense = debug_register(QETH_DBF_SENSE_NAME,
- QETH_DBF_SENSE_PAGES,
- QETH_DBF_SENSE_NR_AREAS,
- QETH_DBF_SENSE_LEN);
- qeth_dbf_qerr = debug_register(QETH_DBF_QERR_NAME,
- QETH_DBF_QERR_PAGES,
- QETH_DBF_QERR_NR_AREAS,
- QETH_DBF_QERR_LEN);
- qeth_dbf_trace = debug_register(QETH_DBF_TRACE_NAME,
- QETH_DBF_TRACE_PAGES,
- QETH_DBF_TRACE_NR_AREAS,
- QETH_DBF_TRACE_LEN);
+ int ret;
+ int x;
- if ((qeth_dbf_setup == NULL) || (qeth_dbf_misc == NULL) ||
- (qeth_dbf_data == NULL) || (qeth_dbf_control == NULL) ||
- (qeth_dbf_sense == NULL) || (qeth_dbf_qerr == NULL) ||
- (qeth_dbf_trace == NULL)) {
- qeth_unregister_dbf_views();
- return -ENOMEM;
+ for (x = 0; x < QETH_DBF_INFOS; x++) {
+ /* register the areas */
+ qeth_dbf[x].id = debug_register(qeth_dbf[x].name,
+ qeth_dbf[x].pages,
+ qeth_dbf[x].areas,
+ qeth_dbf[x].len);
+ if (qeth_dbf[x].id == NULL) {
+ qeth_unregister_dbf_views();
+ return -ENOMEM;
+ }
+
+ /* register a view */
+ ret = debug_register_view(qeth_dbf[x].id, qeth_dbf[x].view);
+ if (ret) {
+ qeth_unregister_dbf_views();
+ return ret;
+ }
+
+ /* set a passing level */
+ debug_set_level(qeth_dbf[x].id, qeth_dbf[x].level);
}
- debug_register_view(qeth_dbf_setup, &debug_hex_ascii_view);
- debug_set_level(qeth_dbf_setup, QETH_DBF_SETUP_LEVEL);
-
- debug_register_view(qeth_dbf_misc, &debug_hex_ascii_view);
- debug_set_level(qeth_dbf_misc, QETH_DBF_MISC_LEVEL);
-
- debug_register_view(qeth_dbf_data, &debug_hex_ascii_view);
- debug_set_level(qeth_dbf_data, QETH_DBF_DATA_LEVEL);
-
- debug_register_view(qeth_dbf_control, &debug_hex_ascii_view);
- debug_set_level(qeth_dbf_control, QETH_DBF_CONTROL_LEVEL);
-
- debug_register_view(qeth_dbf_sense, &debug_hex_ascii_view);
- debug_set_level(qeth_dbf_sense, QETH_DBF_SENSE_LEVEL);
-
- debug_register_view(qeth_dbf_qerr, &debug_hex_ascii_view);
- debug_set_level(qeth_dbf_qerr, QETH_DBF_QERR_LEVEL);
-
- debug_register_view(qeth_dbf_trace, &debug_hex_ascii_view);
- debug_set_level(qeth_dbf_trace, QETH_DBF_TRACE_LEVEL);
return 0;
}
@@ -4204,17 +4156,17 @@
int rc;
unsigned long flags;
- QETH_DBF_TEXT(setup, 2, "probedev");
+ QETH_DBF_TEXT(SETUP, 2, "probedev");
dev = &gdev->dev;
if (!get_device(dev))
return -ENODEV;
- QETH_DBF_TEXT_(setup, 2, "%s", gdev->dev.bus_id);
+ QETH_DBF_TEXT_(SETUP, 2, "%s", gdev->dev.bus_id);
card = qeth_alloc_card();
if (!card) {
- QETH_DBF_TEXT_(setup, 2, "1err%d", -ENOMEM);
+ QETH_DBF_TEXT_(SETUP, 2, "1err%d", -ENOMEM);
rc = -ENOMEM;
goto err_dev;
}
@@ -4230,12 +4182,12 @@
rc = qeth_determine_card_type(card);
if (rc) {
PRINT_WARN("%s: not a valid card type\n", __func__);
- QETH_DBF_TEXT_(setup, 2, "3err%d", rc);
+ QETH_DBF_TEXT_(SETUP, 2, "3err%d", rc);
goto err_card;
}
rc = qeth_setup_card(card);
if (rc) {
- QETH_DBF_TEXT_(setup, 2, "2err%d", rc);
+ QETH_DBF_TEXT_(SETUP, 2, "2err%d", rc);
goto err_card;
}
diff --git a/drivers/s390/net/qeth_core_mpc.c b/drivers/s390/net/qeth_core_mpc.c
index 8653b73..06f4de1 100644
--- a/drivers/s390/net/qeth_core_mpc.c
+++ b/drivers/s390/net/qeth_core_mpc.c
@@ -195,7 +195,7 @@
{IPA_RC_SETIP_NO_STARTLAN, "Setip no startlan received"},
{IPA_RC_SETIP_ALREADY_RECEIVED, "Setip already received"},
{IPA_RC_IP_ADDR_ALREADY_USED, "IP address already in use on LAN"},
- {IPA_RC_MULTICAST_FULL, "No task available, multicast full"},
+ {IPA_RC_MC_ADDR_NOT_FOUND, "Multicast address not found"},
{IPA_RC_SETIP_INVALID_VERSION, "SETIP invalid IP version"},
{IPA_RC_UNSUPPORTED_SUBCMD, "Unsupported assist subcommand"},
{IPA_RC_ARP_ASSIST_NO_ENABLE, "Only partial success, no enable"},
@@ -230,7 +230,7 @@
{IPA_CMD_STARTLAN, "startlan"},
{IPA_CMD_STOPLAN, "stoplan"},
{IPA_CMD_SETVMAC, "setvmac"},
- {IPA_CMD_DELVMAC, "delvmca"},
+ {IPA_CMD_DELVMAC, "delvmac"},
{IPA_CMD_SETGMAC, "setgmac"},
{IPA_CMD_DELGMAC, "delgmac"},
{IPA_CMD_SETVLAN, "setvlan"},
diff --git a/drivers/s390/net/qeth_core_mpc.h b/drivers/s390/net/qeth_core_mpc.h
index de22193..1854882 100644
--- a/drivers/s390/net/qeth_core_mpc.h
+++ b/drivers/s390/net/qeth_core_mpc.h
@@ -182,7 +182,7 @@
IPA_RC_SETIP_NO_STARTLAN = 0xe008,
IPA_RC_SETIP_ALREADY_RECEIVED = 0xe009,
IPA_RC_IP_ADDR_ALREADY_USED = 0xe00a,
- IPA_RC_MULTICAST_FULL = 0xe00b,
+ IPA_RC_MC_ADDR_NOT_FOUND = 0xe00b,
IPA_RC_SETIP_INVALID_VERSION = 0xe00d,
IPA_RC_UNSUPPORTED_SUBCMD = 0xe00e,
IPA_RC_ARP_ASSIST_NO_ENABLE = 0xe00f,
diff --git a/drivers/s390/net/qeth_core_offl.c b/drivers/s390/net/qeth_core_offl.c
index 8b407d6..822df83 100644
--- a/drivers/s390/net/qeth_core_offl.c
+++ b/drivers/s390/net/qeth_core_offl.c
@@ -31,7 +31,7 @@
int skbs_in_buffer;
int buffers_needed = 0;
- QETH_DBF_TEXT(trace, 5, "eddpcbfc");
+ QETH_DBF_TEXT(TRACE, 5, "eddpcbfc");
while (elements_needed > 0) {
buffers_needed++;
if (atomic_read(&queue->bufs[index].state) !=
@@ -51,7 +51,7 @@
{
int i;
- QETH_DBF_TEXT(trace, 5, "eddpfctx");
+ QETH_DBF_TEXT(TRACE, 5, "eddpfctx");
for (i = 0; i < ctx->num_pages; ++i)
free_page((unsigned long)ctx->pages[i]);
kfree(ctx->pages);
@@ -76,7 +76,7 @@
{
struct qeth_eddp_context_reference *ref;
- QETH_DBF_TEXT(trace, 6, "eddprctx");
+ QETH_DBF_TEXT(TRACE, 6, "eddprctx");
while (!list_empty(&buf->ctx_list)) {
ref = list_entry(buf->ctx_list.next,
struct qeth_eddp_context_reference, list);
@@ -91,7 +91,7 @@
{
struct qeth_eddp_context_reference *ref;
- QETH_DBF_TEXT(trace, 6, "eddprfcx");
+ QETH_DBF_TEXT(TRACE, 6, "eddprfcx");
ref = kmalloc(sizeof(struct qeth_eddp_context_reference), GFP_ATOMIC);
if (ref == NULL)
return -ENOMEM;
@@ -112,7 +112,7 @@
int must_refcnt = 1;
int i;
- QETH_DBF_TEXT(trace, 5, "eddpfibu");
+ QETH_DBF_TEXT(TRACE, 5, "eddpfibu");
while (elements > 0) {
buf = &queue->bufs[index];
if (atomic_read(&buf->state) != QETH_QDIO_BUF_EMPTY) {
@@ -166,7 +166,7 @@
}
out_check:
if (!queue->do_pack) {
- QETH_DBF_TEXT(trace, 6, "fillbfnp");
+ QETH_DBF_TEXT(TRACE, 6, "fillbfnp");
/* set state to PRIMED -> will be flushed */
if (buf->next_element_to_fill > 0) {
atomic_set(&buf->state, QETH_QDIO_BUF_PRIMED);
@@ -175,7 +175,7 @@
} else {
if (queue->card->options.performance_stats)
queue->card->perf_stats.skbs_sent_pack++;
- QETH_DBF_TEXT(trace, 6, "fillbfpa");
+ QETH_DBF_TEXT(TRACE, 6, "fillbfpa");
if (buf->next_element_to_fill >=
QETH_MAX_BUFFER_ELEMENTS(queue->card)) {
/*
@@ -199,7 +199,7 @@
int pkt_len;
struct qeth_eddp_element *element;
- QETH_DBF_TEXT(trace, 5, "eddpcrsh");
+ QETH_DBF_TEXT(TRACE, 5, "eddpcrsh");
page = ctx->pages[ctx->offset >> PAGE_SHIFT];
page_offset = ctx->offset % PAGE_SIZE;
element = &ctx->elements[ctx->num_elements];
@@ -257,7 +257,7 @@
int copy_len;
u8 *src;
- QETH_DBF_TEXT(trace, 5, "eddpcdtc");
+ QETH_DBF_TEXT(TRACE, 5, "eddpcdtc");
if (skb_shinfo(eddp->skb)->nr_frags == 0) {
skb_copy_from_linear_data_offset(eddp->skb, eddp->skb_offset,
dst, len);
@@ -305,7 +305,7 @@
struct qeth_eddp_element *element;
int first_lap = 1;
- QETH_DBF_TEXT(trace, 5, "eddpcsdt");
+ QETH_DBF_TEXT(TRACE, 5, "eddpcsdt");
page = ctx->pages[ctx->offset >> PAGE_SHIFT];
page_offset = ctx->offset % PAGE_SIZE;
element = &ctx->elements[ctx->num_elements];
@@ -346,7 +346,7 @@
{
__wsum phcsum; /* pseudo header checksum */
- QETH_DBF_TEXT(trace, 5, "eddpckt4");
+ QETH_DBF_TEXT(TRACE, 5, "eddpckt4");
eddp->th.tcp.h.check = 0;
/* compute pseudo header checksum */
phcsum = csum_tcpudp_nofold(eddp->nh.ip4.h.saddr, eddp->nh.ip4.h.daddr,
@@ -361,7 +361,7 @@
__be32 proto;
__wsum phcsum; /* pseudo header checksum */
- QETH_DBF_TEXT(trace, 5, "eddpckt6");
+ QETH_DBF_TEXT(TRACE, 5, "eddpckt6");
eddp->th.tcp.h.check = 0;
/* compute pseudo header checksum */
phcsum = csum_partial((u8 *)&eddp->nh.ip6.h.saddr,
@@ -378,7 +378,7 @@
{
struct qeth_eddp_data *eddp;
- QETH_DBF_TEXT(trace, 5, "eddpcrda");
+ QETH_DBF_TEXT(TRACE, 5, "eddpcrda");
eddp = kzalloc(sizeof(struct qeth_eddp_data), GFP_ATOMIC);
if (eddp) {
eddp->nhl = nhl;
@@ -398,7 +398,7 @@
int data_len;
__wsum hcsum;
- QETH_DBF_TEXT(trace, 5, "eddpftcp");
+ QETH_DBF_TEXT(TRACE, 5, "eddpftcp");
eddp->skb_offset = sizeof(struct qeth_hdr) + eddp->nhl + eddp->thl;
if (eddp->qh.hdr.l2.id == QETH_HEADER_TYPE_LAYER2) {
eddp->skb_offset += sizeof(struct ethhdr);
@@ -457,7 +457,7 @@
{
struct qeth_eddp_data *eddp = NULL;
- QETH_DBF_TEXT(trace, 5, "eddpficx");
+ QETH_DBF_TEXT(TRACE, 5, "eddpficx");
/* create our segmentation headers and copy original headers */
if (skb->protocol == htons(ETH_P_IP))
eddp = qeth_eddp_create_eddp_data(qhdr,
@@ -473,7 +473,7 @@
tcp_hdrlen(skb));
if (eddp == NULL) {
- QETH_DBF_TEXT(trace, 2, "eddpfcnm");
+ QETH_DBF_TEXT(TRACE, 2, "eddpfcnm");
return -ENOMEM;
}
if (qhdr->hdr.l2.id == QETH_HEADER_TYPE_LAYER2) {
@@ -499,7 +499,7 @@
{
int skbs_per_page;
- QETH_DBF_TEXT(trace, 5, "eddpcanp");
+ QETH_DBF_TEXT(TRACE, 5, "eddpcanp");
/* can we put multiple skbs in one page? */
skbs_per_page = PAGE_SIZE / (skb_shinfo(skb)->gso_size + hdr_len);
if (skbs_per_page > 1) {
@@ -524,30 +524,30 @@
u8 *addr;
int i;
- QETH_DBF_TEXT(trace, 5, "creddpcg");
+ QETH_DBF_TEXT(TRACE, 5, "creddpcg");
/* create the context and allocate pages */
ctx = kzalloc(sizeof(struct qeth_eddp_context), GFP_ATOMIC);
if (ctx == NULL) {
- QETH_DBF_TEXT(trace, 2, "ceddpcn1");
+ QETH_DBF_TEXT(TRACE, 2, "ceddpcn1");
return NULL;
}
ctx->type = QETH_LARGE_SEND_EDDP;
qeth_eddp_calc_num_pages(ctx, skb, hdr_len);
if (ctx->elements_per_skb > QETH_MAX_BUFFER_ELEMENTS(card)) {
- QETH_DBF_TEXT(trace, 2, "ceddpcis");
+ QETH_DBF_TEXT(TRACE, 2, "ceddpcis");
kfree(ctx);
return NULL;
}
ctx->pages = kcalloc(ctx->num_pages, sizeof(u8 *), GFP_ATOMIC);
if (ctx->pages == NULL) {
- QETH_DBF_TEXT(trace, 2, "ceddpcn2");
+ QETH_DBF_TEXT(TRACE, 2, "ceddpcn2");
kfree(ctx);
return NULL;
}
for (i = 0; i < ctx->num_pages; ++i) {
addr = (u8 *)get_zeroed_page(GFP_ATOMIC);
if (addr == NULL) {
- QETH_DBF_TEXT(trace, 2, "ceddpcn3");
+ QETH_DBF_TEXT(TRACE, 2, "ceddpcn3");
ctx->num_pages = i;
qeth_eddp_free_context(ctx);
return NULL;
@@ -557,7 +557,7 @@
ctx->elements = kcalloc(ctx->num_elements,
sizeof(struct qeth_eddp_element), GFP_ATOMIC);
if (ctx->elements == NULL) {
- QETH_DBF_TEXT(trace, 2, "ceddpcn4");
+ QETH_DBF_TEXT(TRACE, 2, "ceddpcn4");
qeth_eddp_free_context(ctx);
return NULL;
}
@@ -573,7 +573,7 @@
{
struct qeth_eddp_context *ctx = NULL;
- QETH_DBF_TEXT(trace, 5, "creddpct");
+ QETH_DBF_TEXT(TRACE, 5, "creddpct");
if (skb->protocol == htons(ETH_P_IP))
ctx = qeth_eddp_create_context_generic(card, skb,
(sizeof(struct qeth_hdr) +
@@ -584,14 +584,14 @@
sizeof(struct qeth_hdr) + sizeof(struct ipv6hdr) +
tcp_hdrlen(skb));
else
- QETH_DBF_TEXT(trace, 2, "cetcpinv");
+ QETH_DBF_TEXT(TRACE, 2, "cetcpinv");
if (ctx == NULL) {
- QETH_DBF_TEXT(trace, 2, "creddpnl");
+ QETH_DBF_TEXT(TRACE, 2, "creddpnl");
return NULL;
}
if (qeth_eddp_fill_context_tcp(ctx, skb, qhdr)) {
- QETH_DBF_TEXT(trace, 2, "ceddptfe");
+ QETH_DBF_TEXT(TRACE, 2, "ceddptfe");
qeth_eddp_free_context(ctx);
return NULL;
}
@@ -603,12 +603,12 @@
struct sk_buff *skb, struct qeth_hdr *qhdr,
unsigned char sk_protocol)
{
- QETH_DBF_TEXT(trace, 5, "creddpc");
+ QETH_DBF_TEXT(TRACE, 5, "creddpc");
switch (sk_protocol) {
case IPPROTO_TCP:
return qeth_eddp_create_context_tcp(card, skb, qhdr);
default:
- QETH_DBF_TEXT(trace, 2, "eddpinvp");
+ QETH_DBF_TEXT(TRACE, 2, "eddpinvp");
}
return NULL;
}
@@ -622,7 +622,7 @@
struct iphdr *iph = ip_hdr(skb);
struct ipv6hdr *ip6h = ipv6_hdr(skb);
- QETH_DBF_TEXT(trace, 5, "tsofhdr");
+ QETH_DBF_TEXT(TRACE, 5, "tsofhdr");
/*fix header to TSO values ...*/
hdr->hdr.hdr.l3.id = QETH_HEADER_TYPE_TSO;
diff --git a/drivers/s390/net/qeth_l2_main.c b/drivers/s390/net/qeth_l2_main.c
index 4417a36..3921d16 100644
--- a/drivers/s390/net/qeth_l2_main.c
+++ b/drivers/s390/net/qeth_l2_main.c
@@ -22,16 +22,7 @@
#include "qeth_core.h"
#include "qeth_core_offl.h"
-#define QETH_DBF_TEXT_(name, level, text...) \
- do { \
- if (qeth_dbf_passes(qeth_dbf_##name, level)) { \
- char *dbf_txt_buf = get_cpu_var(qeth_l2_dbf_txt_buf); \
- sprintf(dbf_txt_buf, text); \
- debug_text_event(qeth_dbf_##name, level, dbf_txt_buf); \
- put_cpu_var(qeth_l2_dbf_txt_buf); \
- } \
- } while (0)
-
+#define QETH_DBF_TXT_BUF qeth_l2_dbf_txt_buf
static DEFINE_PER_CPU(char[256], qeth_l2_dbf_txt_buf);
static int qeth_l2_set_offline(struct ccwgroup_device *);
@@ -87,7 +78,7 @@
rc = -EOPNOTSUPP;
}
if (rc)
- QETH_DBF_TEXT_(trace, 2, "ioce%d", rc);
+ QETH_DBF_TEXT_(TRACE, 2, "ioce%d", rc);
return rc;
}
@@ -141,7 +132,7 @@
struct qeth_ipa_cmd *cmd;
__u8 *mac;
- QETH_DBF_TEXT(trace, 2, "L2Sgmacb");
+ QETH_DBF_TEXT(TRACE, 2, "L2Sgmacb");
cmd = (struct qeth_ipa_cmd *) data;
mac = &cmd->data.setdelmac.mac[0];
/* MAC already registered, needed in couple/uncouple case */
@@ -162,7 +153,7 @@
static int qeth_l2_send_setgroupmac(struct qeth_card *card, __u8 *mac)
{
- QETH_DBF_TEXT(trace, 2, "L2Sgmac");
+ QETH_DBF_TEXT(TRACE, 2, "L2Sgmac");
return qeth_l2_send_setdelmac(card, mac, IPA_CMD_SETGMAC,
qeth_l2_send_setgroupmac_cb);
}
@@ -174,7 +165,7 @@
struct qeth_ipa_cmd *cmd;
__u8 *mac;
- QETH_DBF_TEXT(trace, 2, "L2Dgmacb");
+ QETH_DBF_TEXT(TRACE, 2, "L2Dgmacb");
cmd = (struct qeth_ipa_cmd *) data;
mac = &cmd->data.setdelmac.mac[0];
if (cmd->hdr.return_code)
@@ -187,7 +178,7 @@
static int qeth_l2_send_delgroupmac(struct qeth_card *card, __u8 *mac)
{
- QETH_DBF_TEXT(trace, 2, "L2Dgmac");
+ QETH_DBF_TEXT(TRACE, 2, "L2Dgmac");
return qeth_l2_send_setdelmac(card, mac, IPA_CMD_DELGMAC,
qeth_l2_send_delgroupmac_cb);
}
@@ -289,15 +280,15 @@
{
struct qeth_ipa_cmd *cmd;
- QETH_DBF_TEXT(trace, 2, "L2sdvcb");
+ QETH_DBF_TEXT(TRACE, 2, "L2sdvcb");
cmd = (struct qeth_ipa_cmd *) data;
if (cmd->hdr.return_code) {
PRINT_ERR("Error in processing VLAN %i on %s: 0x%x. "
"Continuing\n", cmd->data.setdelvlan.vlan_id,
QETH_CARD_IFNAME(card), cmd->hdr.return_code);
- QETH_DBF_TEXT_(trace, 2, "L2VL%4x", cmd->hdr.command);
- QETH_DBF_TEXT_(trace, 2, "L2%s", CARD_BUS_ID(card));
- QETH_DBF_TEXT_(trace, 2, "err%d", cmd->hdr.return_code);
+ QETH_DBF_TEXT_(TRACE, 2, "L2VL%4x", cmd->hdr.command);
+ QETH_DBF_TEXT_(TRACE, 2, "L2%s", CARD_BUS_ID(card));
+ QETH_DBF_TEXT_(TRACE, 2, "err%d", cmd->hdr.return_code);
}
return 0;
}
@@ -308,7 +299,7 @@
struct qeth_ipa_cmd *cmd;
struct qeth_cmd_buffer *iob;
- QETH_DBF_TEXT_(trace, 4, "L2sdv%x", ipacmd);
+ QETH_DBF_TEXT_(TRACE, 4, "L2sdv%x", ipacmd);
iob = qeth_get_ipacmd_buffer(card, ipacmd, QETH_PROT_IPV4);
cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
cmd->data.setdelvlan.vlan_id = i;
@@ -319,7 +310,7 @@
static void qeth_l2_process_vlans(struct qeth_card *card, int clear)
{
struct qeth_vlan_vid *id;
- QETH_DBF_TEXT(trace, 3, "L2prcvln");
+ QETH_DBF_TEXT(TRACE, 3, "L2prcvln");
spin_lock_bh(&card->vlanlock);
list_for_each_entry(id, &card->vid_list, list) {
if (clear)
@@ -337,7 +328,7 @@
struct qeth_card *card = netdev_priv(dev);
struct qeth_vlan_vid *id;
- QETH_DBF_TEXT_(trace, 4, "aid:%d", vid);
+ QETH_DBF_TEXT_(TRACE, 4, "aid:%d", vid);
id = kmalloc(sizeof(struct qeth_vlan_vid), GFP_ATOMIC);
if (id) {
id->vid = vid;
@@ -355,7 +346,7 @@
struct qeth_vlan_vid *id, *tmpid = NULL;
struct qeth_card *card = netdev_priv(dev);
- QETH_DBF_TEXT_(trace, 4, "kid:%d", vid);
+ QETH_DBF_TEXT_(TRACE, 4, "kid:%d", vid);
spin_lock_bh(&card->vlanlock);
list_for_each_entry(id, &card->vid_list, list) {
if (id->vid == vid) {
@@ -376,8 +367,8 @@
{
int rc = 0;
- QETH_DBF_TEXT(setup , 2, "stopcard");
- QETH_DBF_HEX(setup, 2, &card, sizeof(void *));
+ QETH_DBF_TEXT(SETUP , 2, "stopcard");
+ QETH_DBF_HEX(SETUP, 2, &card, sizeof(void *));
qeth_set_allowed_threads(card, 0, 1);
if (qeth_wait_for_threads(card, ~QETH_RECOVER_THREAD))
@@ -396,7 +387,7 @@
if (!card->use_hard_stop) {
__u8 *mac = &card->dev->dev_addr[0];
rc = qeth_l2_send_delmac(card, mac);
- QETH_DBF_TEXT_(setup, 2, "Lerr%d", rc);
+ QETH_DBF_TEXT_(SETUP, 2, "Lerr%d", rc);
}
card->state = CARD_STATE_SOFTSETUP;
}
@@ -451,7 +442,8 @@
skb->ip_summed = CHECKSUM_UNNECESSARY;
else
skb->ip_summed = CHECKSUM_NONE;
- *((__u32 *)skb->cb) = ++card->seqno.pkt_seqno;
+ if (skb->protocol == htons(ETH_P_802_2))
+ *((__u32 *)skb->cb) = ++card->seqno.pkt_seqno;
len = skb->len;
netif_rx(skb);
break;
@@ -464,8 +456,8 @@
break;
default:
dev_kfree_skb_any(skb);
- QETH_DBF_TEXT(trace, 3, "inbunkno");
- QETH_DBF_HEX(control, 3, hdr, QETH_DBF_CONTROL_LEN);
+ QETH_DBF_TEXT(TRACE, 3, "inbunkno");
+ QETH_DBF_HEX(CTRL, 3, hdr, QETH_DBF_CTRL_LEN);
continue;
}
card->dev->last_rx = jiffies;
@@ -483,7 +475,7 @@
struct qeth_ipa_cmd *cmd;
struct qeth_cmd_buffer *iob;
- QETH_DBF_TEXT(trace, 2, "L2sdmac");
+ QETH_DBF_TEXT(TRACE, 2, "L2sdmac");
iob = qeth_get_ipacmd_buffer(card, ipacmd, QETH_PROT_IPV4);
cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
cmd->data.setdelmac.mac_length = OSA_ADDR_LEN;
@@ -497,10 +489,10 @@
{
struct qeth_ipa_cmd *cmd;
- QETH_DBF_TEXT(trace, 2, "L2Smaccb");
+ QETH_DBF_TEXT(TRACE, 2, "L2Smaccb");
cmd = (struct qeth_ipa_cmd *) data;
if (cmd->hdr.return_code) {
- QETH_DBF_TEXT_(trace, 2, "L2er%x", cmd->hdr.return_code);
+ QETH_DBF_TEXT_(TRACE, 2, "L2er%x", cmd->hdr.return_code);
card->info.mac_bits &= ~QETH_LAYER2_MAC_REGISTERED;
cmd->hdr.return_code = -EIO;
} else {
@@ -519,7 +511,7 @@
static int qeth_l2_send_setmac(struct qeth_card *card, __u8 *mac)
{
- QETH_DBF_TEXT(trace, 2, "L2Setmac");
+ QETH_DBF_TEXT(TRACE, 2, "L2Setmac");
return qeth_l2_send_setdelmac(card, mac, IPA_CMD_SETVMAC,
qeth_l2_send_setmac_cb);
}
@@ -530,10 +522,10 @@
{
struct qeth_ipa_cmd *cmd;
- QETH_DBF_TEXT(trace, 2, "L2Dmaccb");
+ QETH_DBF_TEXT(TRACE, 2, "L2Dmaccb");
cmd = (struct qeth_ipa_cmd *) data;
if (cmd->hdr.return_code) {
- QETH_DBF_TEXT_(trace, 2, "err%d", cmd->hdr.return_code);
+ QETH_DBF_TEXT_(TRACE, 2, "err%d", cmd->hdr.return_code);
cmd->hdr.return_code = -EIO;
return 0;
}
@@ -544,7 +536,7 @@
static int qeth_l2_send_delmac(struct qeth_card *card, __u8 *mac)
{
- QETH_DBF_TEXT(trace, 2, "L2Delmac");
+ QETH_DBF_TEXT(TRACE, 2, "L2Delmac");
if (!(card->info.mac_bits & QETH_LAYER2_MAC_REGISTERED))
return 0;
return qeth_l2_send_setdelmac(card, mac, IPA_CMD_DELVMAC,
@@ -556,8 +548,8 @@
int rc = 0;
char vendor_pre[] = {0x02, 0x00, 0x00};
- QETH_DBF_TEXT(setup, 2, "doL2init");
- QETH_DBF_TEXT_(setup, 2, "doL2%s", CARD_BUS_ID(card));
+ QETH_DBF_TEXT(SETUP, 2, "doL2init");
+ QETH_DBF_TEXT_(SETUP, 2, "doL2%s", CARD_BUS_ID(card));
rc = qeth_query_setadapterparms(card);
if (rc) {
@@ -571,10 +563,10 @@
PRINT_WARN("couldn't get MAC address on "
"device %s: x%x\n",
CARD_BUS_ID(card), rc);
- QETH_DBF_TEXT_(setup, 2, "1err%d", rc);
+ QETH_DBF_TEXT_(SETUP, 2, "1err%d", rc);
return rc;
}
- QETH_DBF_HEX(setup, 2, card->dev->dev_addr, OSA_ADDR_LEN);
+ QETH_DBF_HEX(SETUP, 2, card->dev->dev_addr, OSA_ADDR_LEN);
} else {
random_ether_addr(card->dev->dev_addr);
memcpy(card->dev->dev_addr, vendor_pre, 3);
@@ -588,21 +580,21 @@
struct qeth_card *card = netdev_priv(dev);
int rc = 0;
- QETH_DBF_TEXT(trace, 3, "setmac");
+ QETH_DBF_TEXT(TRACE, 3, "setmac");
if (qeth_l2_verify_dev(dev) != QETH_REAL_CARD) {
- QETH_DBF_TEXT(trace, 3, "setmcINV");
+ QETH_DBF_TEXT(TRACE, 3, "setmcINV");
return -EOPNOTSUPP;
}
if (card->info.type == QETH_CARD_TYPE_OSN) {
PRINT_WARN("Setting MAC address on %s is not supported.\n",
dev->name);
- QETH_DBF_TEXT(trace, 3, "setmcOSN");
+ QETH_DBF_TEXT(TRACE, 3, "setmcOSN");
return -EOPNOTSUPP;
}
- QETH_DBF_TEXT_(trace, 3, "%s", CARD_BUS_ID(card));
- QETH_DBF_HEX(trace, 3, addr->sa_data, OSA_ADDR_LEN);
+ QETH_DBF_TEXT_(TRACE, 3, "%s", CARD_BUS_ID(card));
+ QETH_DBF_HEX(TRACE, 3, addr->sa_data, OSA_ADDR_LEN);
rc = qeth_l2_send_delmac(card, &card->dev->dev_addr[0]);
if (!rc)
rc = qeth_l2_send_setmac(card, addr->sa_data);
@@ -617,7 +609,7 @@
if (card->info.type == QETH_CARD_TYPE_OSN)
return ;
- QETH_DBF_TEXT(trace, 3, "setmulti");
+ QETH_DBF_TEXT(TRACE, 3, "setmulti");
qeth_l2_del_all_mc(card);
spin_lock_bh(&card->mclock);
for (dm = dev->mc_list; dm; dm = dm->next)
@@ -643,7 +635,7 @@
enum qeth_large_send_types large_send = QETH_LARGE_SEND_NO;
struct qeth_eddp_context *ctx = NULL;
- QETH_DBF_TEXT(trace, 6, "l2xmit");
+ QETH_DBF_TEXT(TRACE, 6, "l2xmit");
if ((card->state != CARD_STATE_UP) || !card->lan_online) {
card->stats.tx_carrier_errors++;
@@ -755,7 +747,7 @@
int index;
int i;
- QETH_DBF_TEXT(trace, 6, "qdinput");
+ QETH_DBF_TEXT(TRACE, 6, "qdinput");
card = (struct qeth_card *) card_ptr;
net_dev = card->dev;
if (card->options.performance_stats) {
@@ -764,11 +756,11 @@
}
if (status & QDIO_STATUS_LOOK_FOR_ERROR) {
if (status & QDIO_STATUS_ACTIVATE_CHECK_CONDITION) {
- QETH_DBF_TEXT(trace, 1, "qdinchk");
- QETH_DBF_TEXT_(trace, 1, "%s", CARD_BUS_ID(card));
- QETH_DBF_TEXT_(trace, 1, "%04X%04X", first_element,
+ QETH_DBF_TEXT(TRACE, 1, "qdinchk");
+ QETH_DBF_TEXT_(TRACE, 1, "%s", CARD_BUS_ID(card));
+ QETH_DBF_TEXT_(TRACE, 1, "%04X%04X", first_element,
count);
- QETH_DBF_TEXT_(trace, 1, "%04X%04X", queue, status);
+ QETH_DBF_TEXT_(TRACE, 1, "%04X%04X", queue, status);
qeth_schedule_recovery(card);
return;
}
@@ -793,13 +785,13 @@
{
struct qeth_card *card = netdev_priv(dev);
- QETH_DBF_TEXT(trace, 4, "qethopen");
+ QETH_DBF_TEXT(TRACE, 4, "qethopen");
if (card->state != CARD_STATE_SOFTSETUP)
return -ENODEV;
if ((card->info.type != QETH_CARD_TYPE_OSN) &&
(!(card->info.mac_bits & QETH_LAYER2_MAC_REGISTERED))) {
- QETH_DBF_TEXT(trace, 4, "nomacadr");
+ QETH_DBF_TEXT(TRACE, 4, "nomacadr");
return -EPERM;
}
card->data.state = CH_STATE_UP;
@@ -817,7 +809,7 @@
{
struct qeth_card *card = netdev_priv(dev);
- QETH_DBF_TEXT(trace, 4, "qethstop");
+ QETH_DBF_TEXT(TRACE, 4, "qethstop");
netif_tx_disable(dev);
card->dev->flags &= ~IFF_UP;
if (card->state == CARD_STATE_UP)
@@ -933,8 +925,8 @@
enum qeth_card_states recover_flag;
BUG_ON(!card);
- QETH_DBF_TEXT(setup, 2, "setonlin");
- QETH_DBF_HEX(setup, 2, &card, sizeof(void *));
+ QETH_DBF_TEXT(SETUP, 2, "setonlin");
+ QETH_DBF_HEX(SETUP, 2, &card, sizeof(void *));
qeth_set_allowed_threads(card, QETH_RECOVER_THREAD, 1);
if (qeth_wait_for_threads(card, ~QETH_RECOVER_THREAD)) {
@@ -946,23 +938,23 @@
recover_flag = card->state;
rc = ccw_device_set_online(CARD_RDEV(card));
if (rc) {
- QETH_DBF_TEXT_(setup, 2, "1err%d", rc);
+ QETH_DBF_TEXT_(SETUP, 2, "1err%d", rc);
return -EIO;
}
rc = ccw_device_set_online(CARD_WDEV(card));
if (rc) {
- QETH_DBF_TEXT_(setup, 2, "1err%d", rc);
+ QETH_DBF_TEXT_(SETUP, 2, "1err%d", rc);
return -EIO;
}
rc = ccw_device_set_online(CARD_DDEV(card));
if (rc) {
- QETH_DBF_TEXT_(setup, 2, "1err%d", rc);
+ QETH_DBF_TEXT_(SETUP, 2, "1err%d", rc);
return -EIO;
}
rc = qeth_core_hardsetup_card(card);
if (rc) {
- QETH_DBF_TEXT_(setup, 2, "2err%d", rc);
+ QETH_DBF_TEXT_(SETUP, 2, "2err%d", rc);
goto out_remove;
}
@@ -976,11 +968,11 @@
qeth_print_status_message(card);
/* softsetup */
- QETH_DBF_TEXT(setup, 2, "softsetp");
+ QETH_DBF_TEXT(SETUP, 2, "softsetp");
rc = qeth_send_startlan(card);
if (rc) {
- QETH_DBF_TEXT_(setup, 2, "1err%d", rc);
+ QETH_DBF_TEXT_(SETUP, 2, "1err%d", rc);
if (rc == 0xe080) {
PRINT_WARN("LAN on card %s if offline! "
"Waiting for STARTLAN from card.\n",
@@ -1000,7 +992,7 @@
rc = qeth_init_qdio_queues(card);
if (rc) {
- QETH_DBF_TEXT_(setup, 2, "6err%d", rc);
+ QETH_DBF_TEXT_(SETUP, 2, "6err%d", rc);
goto out_remove;
}
card->state = CARD_STATE_SOFTSETUP;
@@ -1047,8 +1039,8 @@
int rc = 0, rc2 = 0, rc3 = 0;
enum qeth_card_states recover_flag;
- QETH_DBF_TEXT(setup, 3, "setoffl");
- QETH_DBF_HEX(setup, 3, &card, sizeof(void *));
+ QETH_DBF_TEXT(SETUP, 3, "setoffl");
+ QETH_DBF_HEX(SETUP, 3, &card, sizeof(void *));
if (card->dev && netif_carrier_ok(card->dev))
netif_carrier_off(card->dev);
@@ -1064,7 +1056,7 @@
if (!rc)
rc = (rc2) ? rc2 : rc3;
if (rc)
- QETH_DBF_TEXT_(setup, 2, "1err%d", rc);
+ QETH_DBF_TEXT_(SETUP, 2, "1err%d", rc);
if (recover_flag == CARD_STATE_UP)
card->state = CARD_STATE_RECOVER;
/* let user_space know that device is offline */
@@ -1083,11 +1075,11 @@
int rc = 0;
card = (struct qeth_card *) ptr;
- QETH_DBF_TEXT(trace, 2, "recover1");
- QETH_DBF_HEX(trace, 2, &card, sizeof(void *));
+ QETH_DBF_TEXT(TRACE, 2, "recover1");
+ QETH_DBF_HEX(TRACE, 2, &card, sizeof(void *));
if (!qeth_do_run_thread(card, QETH_RECOVER_THREAD))
return 0;
- QETH_DBF_TEXT(trace, 2, "recover2");
+ QETH_DBF_TEXT(TRACE, 2, "recover2");
PRINT_WARN("Recovery of device %s started ...\n",
CARD_BUS_ID(card));
card->use_hard_stop = 1;
@@ -1138,12 +1130,12 @@
unsigned long flags;
int rc = 0;
- QETH_DBF_TEXT(trace, 5, "osndctrd");
+ QETH_DBF_TEXT(TRACE, 5, "osndctrd");
wait_event(card->wait_q,
atomic_cmpxchg(&card->write.irq_pending, 0, 1) == 0);
qeth_prepare_control_data(card, len, iob);
- QETH_DBF_TEXT(trace, 6, "osnoirqp");
+ QETH_DBF_TEXT(TRACE, 6, "osnoirqp");
spin_lock_irqsave(get_ccwdev_lock(card->write.ccwdev), flags);
rc = ccw_device_start(card->write.ccwdev, &card->write.ccw,
(addr_t) iob, 0, 0);
@@ -1151,7 +1143,7 @@
if (rc) {
PRINT_WARN("qeth_osn_send_control_data: "
"ccw_device_start rc = %i\n", rc);
- QETH_DBF_TEXT_(trace, 2, " err%d", rc);
+ QETH_DBF_TEXT_(TRACE, 2, " err%d", rc);
qeth_release_buffer(iob->channel, iob);
atomic_set(&card->write.irq_pending, 0);
wake_up(&card->wait_q);
@@ -1164,7 +1156,7 @@
{
u16 s1, s2;
- QETH_DBF_TEXT(trace, 4, "osndipa");
+ QETH_DBF_TEXT(TRACE, 4, "osndipa");
qeth_prepare_ipa_cmd(card, iob, QETH_PROT_OSN2);
s1 = (u16)(IPA_PDU_HEADER_SIZE + data_len);
@@ -1182,7 +1174,7 @@
struct qeth_card *card;
int rc;
- QETH_DBF_TEXT(trace, 2, "osnsdmc");
+ QETH_DBF_TEXT(TRACE, 2, "osnsdmc");
if (!dev)
return -ENODEV;
card = netdev_priv(dev);
@@ -1204,7 +1196,7 @@
{
struct qeth_card *card;
- QETH_DBF_TEXT(trace, 2, "osnreg");
+ QETH_DBF_TEXT(TRACE, 2, "osnreg");
*dev = qeth_l2_netdev_by_devno(read_dev_no);
if (*dev == NULL)
return -ENODEV;
@@ -1223,7 +1215,7 @@
{
struct qeth_card *card;
- QETH_DBF_TEXT(trace, 2, "osndereg");
+ QETH_DBF_TEXT(TRACE, 2, "osndereg");
if (!dev)
return;
card = netdev_priv(dev);
diff --git a/drivers/s390/net/qeth_l3.h b/drivers/s390/net/qeth_l3.h
index f639cc3..1be3535 100644
--- a/drivers/s390/net/qeth_l3.h
+++ b/drivers/s390/net/qeth_l3.h
@@ -13,16 +13,7 @@
#include "qeth_core.h"
-#define QETH_DBF_TEXT_(name, level, text...) \
- do { \
- if (qeth_dbf_passes(qeth_dbf_##name, level)) { \
- char *dbf_txt_buf = get_cpu_var(qeth_l3_dbf_txt_buf); \
- sprintf(dbf_txt_buf, text); \
- debug_text_event(qeth_dbf_##name, level, dbf_txt_buf); \
- put_cpu_var(qeth_l3_dbf_txt_buf); \
- } \
- } while (0)
-
+#define QETH_DBF_TXT_BUF qeth_l3_dbf_txt_buf
DECLARE_PER_CPU(char[256], qeth_l3_dbf_txt_buf);
struct qeth_ipaddr {
diff --git a/drivers/s390/net/qeth_l3_main.c b/drivers/s390/net/qeth_l3_main.c
index 21c4390..e1bfe56 100644
--- a/drivers/s390/net/qeth_l3_main.c
+++ b/drivers/s390/net/qeth_l3_main.c
@@ -259,7 +259,7 @@
addr->users += add ? 1 : -1;
if (add && (addr->type == QETH_IP_TYPE_NORMAL) &&
qeth_l3_is_addr_covered_by_ipato(card, addr)) {
- QETH_DBF_TEXT(trace, 2, "tkovaddr");
+ QETH_DBF_TEXT(TRACE, 2, "tkovaddr");
addr->set_flags |= QETH_IPA_SETIP_TAKEOVER_FLAG;
}
list_add_tail(&addr->entry, card->ip_tbd_list);
@@ -273,13 +273,13 @@
unsigned long flags;
int rc = 0;
- QETH_DBF_TEXT(trace, 4, "delip");
+ QETH_DBF_TEXT(TRACE, 4, "delip");
if (addr->proto == QETH_PROT_IPV4)
- QETH_DBF_HEX(trace, 4, &addr->u.a4.addr, 4);
+ QETH_DBF_HEX(TRACE, 4, &addr->u.a4.addr, 4);
else {
- QETH_DBF_HEX(trace, 4, &addr->u.a6.addr, 8);
- QETH_DBF_HEX(trace, 4, ((char *)&addr->u.a6.addr) + 8, 8);
+ QETH_DBF_HEX(TRACE, 4, &addr->u.a6.addr, 8);
+ QETH_DBF_HEX(TRACE, 4, ((char *)&addr->u.a6.addr) + 8, 8);
}
spin_lock_irqsave(&card->ip_lock, flags);
rc = __qeth_l3_insert_ip_todo(card, addr, 0);
@@ -292,12 +292,12 @@
unsigned long flags;
int rc = 0;
- QETH_DBF_TEXT(trace, 4, "addip");
+ QETH_DBF_TEXT(TRACE, 4, "addip");
if (addr->proto == QETH_PROT_IPV4)
- QETH_DBF_HEX(trace, 4, &addr->u.a4.addr, 4);
+ QETH_DBF_HEX(TRACE, 4, &addr->u.a4.addr, 4);
else {
- QETH_DBF_HEX(trace, 4, &addr->u.a6.addr, 8);
- QETH_DBF_HEX(trace, 4, ((char *)&addr->u.a6.addr) + 8, 8);
+ QETH_DBF_HEX(TRACE, 4, &addr->u.a6.addr, 8);
+ QETH_DBF_HEX(TRACE, 4, ((char *)&addr->u.a6.addr) + 8, 8);
}
spin_lock_irqsave(&card->ip_lock, flags);
rc = __qeth_l3_insert_ip_todo(card, addr, 1);
@@ -326,10 +326,10 @@
struct qeth_ipaddr *iptodo;
unsigned long flags;
- QETH_DBF_TEXT(trace, 4, "delmc");
+ QETH_DBF_TEXT(TRACE, 4, "delmc");
iptodo = qeth_l3_get_addr_buffer(QETH_PROT_IPV4);
if (!iptodo) {
- QETH_DBF_TEXT(trace, 2, "dmcnomem");
+ QETH_DBF_TEXT(TRACE, 2, "dmcnomem");
return;
}
iptodo->type = QETH_IP_TYPE_DEL_ALL_MC;
@@ -401,8 +401,11 @@
static void __qeth_l3_delete_all_mc(struct qeth_card *card,
unsigned long *flags)
{
+ struct list_head fail_list;
struct qeth_ipaddr *addr, *tmp;
int rc;
+
+ INIT_LIST_HEAD(&fail_list);
again:
list_for_each_entry_safe(addr, tmp, &card->ip_list, entry) {
if (addr->is_multicast) {
@@ -410,13 +413,14 @@
spin_unlock_irqrestore(&card->ip_lock, *flags);
rc = qeth_l3_deregister_addr_entry(card, addr);
spin_lock_irqsave(&card->ip_lock, *flags);
- if (!rc) {
+ if (!rc || (rc == IPA_RC_MC_ADDR_NOT_FOUND))
kfree(addr);
- goto again;
- } else
- list_add(&addr->entry, &card->ip_list);
+ else
+ list_add_tail(&addr->entry, &fail_list);
+ goto again;
}
}
+ list_splice(&fail_list, &card->ip_list);
}
static void qeth_l3_set_ip_addr_list(struct qeth_card *card)
@@ -426,14 +430,14 @@
unsigned long flags;
int rc;
- QETH_DBF_TEXT(trace, 2, "sdiplist");
- QETH_DBF_HEX(trace, 2, &card, sizeof(void *));
+ QETH_DBF_TEXT(TRACE, 2, "sdiplist");
+ QETH_DBF_HEX(TRACE, 2, &card, sizeof(void *));
spin_lock_irqsave(&card->ip_lock, flags);
tbd_list = card->ip_tbd_list;
card->ip_tbd_list = kmalloc(sizeof(struct list_head), GFP_ATOMIC);
if (!card->ip_tbd_list) {
- QETH_DBF_TEXT(trace, 0, "silnomem");
+ QETH_DBF_TEXT(TRACE, 0, "silnomem");
card->ip_tbd_list = tbd_list;
spin_unlock_irqrestore(&card->ip_lock, flags);
return;
@@ -457,7 +461,7 @@
spin_unlock_irqrestore(&card->ip_lock, flags);
rc = qeth_l3_register_addr_entry(card, todo);
spin_lock_irqsave(&card->ip_lock, flags);
- if (!rc)
+ if (!rc || (rc == IPA_RC_LAN_OFFLINE))
list_add_tail(&todo->entry, &card->ip_list);
else
kfree(todo);
@@ -467,7 +471,7 @@
spin_unlock_irqrestore(&card->ip_lock, flags);
rc = qeth_l3_deregister_addr_entry(card, addr);
spin_lock_irqsave(&card->ip_lock, flags);
- if (!rc)
+ if (!rc || (rc == IPA_RC_PRIMARY_ALREADY_DEFINED))
kfree(addr);
else
list_add_tail(&addr->entry, &card->ip_list);
@@ -484,7 +488,7 @@
struct qeth_ipaddr *addr, *tmp;
unsigned long flags;
- QETH_DBF_TEXT(trace, 4, "clearip");
+ QETH_DBF_TEXT(TRACE, 4, "clearip");
spin_lock_irqsave(&card->ip_lock, flags);
/* clear todo list */
list_for_each_entry_safe(addr, tmp, card->ip_tbd_list, entry) {
@@ -542,7 +546,7 @@
struct qeth_cmd_buffer *iob;
struct qeth_ipa_cmd *cmd;
- QETH_DBF_TEXT(trace, 4, "setdelmc");
+ QETH_DBF_TEXT(TRACE, 4, "setdelmc");
iob = qeth_get_ipacmd_buffer(card, ipacmd, addr->proto);
cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
@@ -580,8 +584,8 @@
struct qeth_ipa_cmd *cmd;
__u8 netmask[16];
- QETH_DBF_TEXT(trace, 4, "setdelip");
- QETH_DBF_TEXT_(trace, 4, "flags%02X", flags);
+ QETH_DBF_TEXT(TRACE, 4, "setdelip");
+ QETH_DBF_TEXT_(TRACE, 4, "flags%02X", flags);
iob = qeth_get_ipacmd_buffer(card, ipacmd, addr->proto);
cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
@@ -610,7 +614,7 @@
struct qeth_ipa_cmd *cmd;
struct qeth_cmd_buffer *iob;
- QETH_DBF_TEXT(trace, 4, "setroutg");
+ QETH_DBF_TEXT(TRACE, 4, "setroutg");
iob = qeth_get_ipacmd_buffer(card, IPA_CMD_SETRTG, prot);
cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
cmd->data.setrtg.type = (type);
@@ -663,7 +667,7 @@
{
int rc;
- QETH_DBF_TEXT(trace, 3, "setrtg4");
+ QETH_DBF_TEXT(TRACE, 3, "setrtg4");
qeth_l3_correct_routing_type(card, &card->options.route4.type,
QETH_PROT_IPV4);
@@ -683,7 +687,7 @@
{
int rc = 0;
- QETH_DBF_TEXT(trace, 3, "setrtg6");
+ QETH_DBF_TEXT(TRACE, 3, "setrtg6");
#ifdef CONFIG_QETH_IPV6
if (!qeth_is_supported(card, IPA_IPV6))
@@ -727,7 +731,7 @@
unsigned long flags;
int rc = 0;
- QETH_DBF_TEXT(trace, 2, "addipato");
+ QETH_DBF_TEXT(TRACE, 2, "addipato");
spin_lock_irqsave(&card->ip_lock, flags);
list_for_each_entry(ipatoe, &card->ipato.entries, entry) {
if (ipatoe->proto != new->proto)
@@ -753,7 +757,7 @@
struct qeth_ipato_entry *ipatoe, *tmp;
unsigned long flags;
- QETH_DBF_TEXT(trace, 2, "delipato");
+ QETH_DBF_TEXT(TRACE, 2, "delipato");
spin_lock_irqsave(&card->ip_lock, flags);
list_for_each_entry_safe(ipatoe, tmp, &card->ipato.entries, entry) {
if (ipatoe->proto != proto)
@@ -781,11 +785,11 @@
ipaddr = qeth_l3_get_addr_buffer(proto);
if (ipaddr) {
if (proto == QETH_PROT_IPV4) {
- QETH_DBF_TEXT(trace, 2, "addvipa4");
+ QETH_DBF_TEXT(TRACE, 2, "addvipa4");
memcpy(&ipaddr->u.a4.addr, addr, 4);
ipaddr->u.a4.mask = 0;
} else if (proto == QETH_PROT_IPV6) {
- QETH_DBF_TEXT(trace, 2, "addvipa6");
+ QETH_DBF_TEXT(TRACE, 2, "addvipa6");
memcpy(&ipaddr->u.a6.addr, addr, 16);
ipaddr->u.a6.pfxlen = 0;
}
@@ -817,11 +821,11 @@
ipaddr = qeth_l3_get_addr_buffer(proto);
if (ipaddr) {
if (proto == QETH_PROT_IPV4) {
- QETH_DBF_TEXT(trace, 2, "delvipa4");
+ QETH_DBF_TEXT(TRACE, 2, "delvipa4");
memcpy(&ipaddr->u.a4.addr, addr, 4);
ipaddr->u.a4.mask = 0;
} else if (proto == QETH_PROT_IPV6) {
- QETH_DBF_TEXT(trace, 2, "delvipa6");
+ QETH_DBF_TEXT(TRACE, 2, "delvipa6");
memcpy(&ipaddr->u.a6.addr, addr, 16);
ipaddr->u.a6.pfxlen = 0;
}
@@ -846,11 +850,11 @@
ipaddr = qeth_l3_get_addr_buffer(proto);
if (ipaddr) {
if (proto == QETH_PROT_IPV4) {
- QETH_DBF_TEXT(trace, 2, "addrxip4");
+ QETH_DBF_TEXT(TRACE, 2, "addrxip4");
memcpy(&ipaddr->u.a4.addr, addr, 4);
ipaddr->u.a4.mask = 0;
} else if (proto == QETH_PROT_IPV6) {
- QETH_DBF_TEXT(trace, 2, "addrxip6");
+ QETH_DBF_TEXT(TRACE, 2, "addrxip6");
memcpy(&ipaddr->u.a6.addr, addr, 16);
ipaddr->u.a6.pfxlen = 0;
}
@@ -882,11 +886,11 @@
ipaddr = qeth_l3_get_addr_buffer(proto);
if (ipaddr) {
if (proto == QETH_PROT_IPV4) {
- QETH_DBF_TEXT(trace, 2, "addrxip4");
+ QETH_DBF_TEXT(TRACE, 2, "addrxip4");
memcpy(&ipaddr->u.a4.addr, addr, 4);
ipaddr->u.a4.mask = 0;
} else if (proto == QETH_PROT_IPV6) {
- QETH_DBF_TEXT(trace, 2, "addrxip6");
+ QETH_DBF_TEXT(TRACE, 2, "addrxip6");
memcpy(&ipaddr->u.a6.addr, addr, 16);
ipaddr->u.a6.pfxlen = 0;
}
@@ -906,15 +910,15 @@
int cnt = 3;
if (addr->proto == QETH_PROT_IPV4) {
- QETH_DBF_TEXT(trace, 2, "setaddr4");
- QETH_DBF_HEX(trace, 3, &addr->u.a4.addr, sizeof(int));
+ QETH_DBF_TEXT(TRACE, 2, "setaddr4");
+ QETH_DBF_HEX(TRACE, 3, &addr->u.a4.addr, sizeof(int));
} else if (addr->proto == QETH_PROT_IPV6) {
- QETH_DBF_TEXT(trace, 2, "setaddr6");
- QETH_DBF_HEX(trace, 3, &addr->u.a6.addr, 8);
- QETH_DBF_HEX(trace, 3, ((char *)&addr->u.a6.addr) + 8, 8);
+ QETH_DBF_TEXT(TRACE, 2, "setaddr6");
+ QETH_DBF_HEX(TRACE, 3, &addr->u.a6.addr, 8);
+ QETH_DBF_HEX(TRACE, 3, ((char *)&addr->u.a6.addr) + 8, 8);
} else {
- QETH_DBF_TEXT(trace, 2, "setaddr?");
- QETH_DBF_HEX(trace, 3, addr, sizeof(struct qeth_ipaddr));
+ QETH_DBF_TEXT(TRACE, 2, "setaddr?");
+ QETH_DBF_HEX(TRACE, 3, addr, sizeof(struct qeth_ipaddr));
}
do {
if (addr->is_multicast)
@@ -923,10 +927,10 @@
rc = qeth_l3_send_setdelip(card, addr, IPA_CMD_SETIP,
addr->set_flags);
if (rc)
- QETH_DBF_TEXT(trace, 2, "failed");
+ QETH_DBF_TEXT(TRACE, 2, "failed");
} while ((--cnt > 0) && rc);
if (rc) {
- QETH_DBF_TEXT(trace, 2, "FAILED");
+ QETH_DBF_TEXT(TRACE, 2, "FAILED");
qeth_l3_ipaddr_to_string(addr->proto, (u8 *)&addr->u, buf);
PRINT_WARN("Could not register IP address %s (rc=0x%x/%d)\n",
buf, rc, rc);
@@ -940,15 +944,15 @@
int rc = 0;
if (addr->proto == QETH_PROT_IPV4) {
- QETH_DBF_TEXT(trace, 2, "deladdr4");
- QETH_DBF_HEX(trace, 3, &addr->u.a4.addr, sizeof(int));
+ QETH_DBF_TEXT(TRACE, 2, "deladdr4");
+ QETH_DBF_HEX(TRACE, 3, &addr->u.a4.addr, sizeof(int));
} else if (addr->proto == QETH_PROT_IPV6) {
- QETH_DBF_TEXT(trace, 2, "deladdr6");
- QETH_DBF_HEX(trace, 3, &addr->u.a6.addr, 8);
- QETH_DBF_HEX(trace, 3, ((char *)&addr->u.a6.addr) + 8, 8);
+ QETH_DBF_TEXT(TRACE, 2, "deladdr6");
+ QETH_DBF_HEX(TRACE, 3, &addr->u.a6.addr, 8);
+ QETH_DBF_HEX(TRACE, 3, ((char *)&addr->u.a6.addr) + 8, 8);
} else {
- QETH_DBF_TEXT(trace, 2, "deladdr?");
- QETH_DBF_HEX(trace, 3, addr, sizeof(struct qeth_ipaddr));
+ QETH_DBF_TEXT(TRACE, 2, "deladdr?");
+ QETH_DBF_HEX(TRACE, 3, addr, sizeof(struct qeth_ipaddr));
}
if (addr->is_multicast)
rc = qeth_l3_send_setdelmc(card, addr, IPA_CMD_DELIPM);
@@ -956,7 +960,7 @@
rc = qeth_l3_send_setdelip(card, addr, IPA_CMD_DELIP,
addr->del_flags);
if (rc) {
- QETH_DBF_TEXT(trace, 2, "failed");
+ QETH_DBF_TEXT(TRACE, 2, "failed");
/* TODO: re-activate this warning as soon as we have a
* clean mirco code
qeth_ipaddr_to_string(addr->proto, (u8 *)&addr->u, buf);
@@ -996,7 +1000,7 @@
struct qeth_cmd_buffer *iob;
struct qeth_ipa_cmd *cmd;
- QETH_DBF_TEXT(trace, 4, "adpmode");
+ QETH_DBF_TEXT(TRACE, 4, "adpmode");
iob = qeth_get_adapter_cmd(card, command,
sizeof(struct qeth_ipacmd_setadpparms));
@@ -1011,7 +1015,7 @@
{
int rc;
- QETH_DBF_TEXT(trace, 4, "adphstr");
+ QETH_DBF_TEXT(TRACE, 4, "adphstr");
if (qeth_adp_supported(card, IPA_SETADP_SET_BROADCAST_MODE)) {
rc = qeth_l3_send_setadp_mode(card,
@@ -1044,13 +1048,13 @@
{
int rc;
- QETH_DBF_TEXT(setup, 2, "setadprm");
+ QETH_DBF_TEXT(SETUP, 2, "setadprm");
if (!qeth_is_supported(card, IPA_SETADAPTERPARMS)) {
PRINT_WARN("set adapter parameters not supported "
"on device %s.\n",
CARD_BUS_ID(card));
- QETH_DBF_TEXT(setup, 2, " notsupp");
+ QETH_DBF_TEXT(SETUP, 2, " notsupp");
return 0;
}
rc = qeth_query_setadapterparms(card);
@@ -1079,7 +1083,7 @@
{
struct qeth_ipa_cmd *cmd;
- QETH_DBF_TEXT(trace, 4, "defadpcb");
+ QETH_DBF_TEXT(TRACE, 4, "defadpcb");
cmd = (struct qeth_ipa_cmd *) data;
if (cmd->hdr.return_code == 0) {
@@ -1092,7 +1096,7 @@
if (cmd->data.setassparms.hdr.assist_no == IPA_INBOUND_CHECKSUM &&
cmd->data.setassparms.hdr.command_code == IPA_CMD_ASS_START) {
card->info.csum_mask = cmd->data.setassparms.data.flags_32bit;
- QETH_DBF_TEXT_(trace, 3, "csum:%d", card->info.csum_mask);
+ QETH_DBF_TEXT_(TRACE, 3, "csum:%d", card->info.csum_mask);
}
return 0;
}
@@ -1104,7 +1108,7 @@
struct qeth_cmd_buffer *iob;
struct qeth_ipa_cmd *cmd;
- QETH_DBF_TEXT(trace, 4, "getasscm");
+ QETH_DBF_TEXT(TRACE, 4, "getasscm");
iob = qeth_get_ipacmd_buffer(card, IPA_CMD_SETASSPARMS, prot);
cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
@@ -1126,7 +1130,7 @@
int rc;
struct qeth_ipa_cmd *cmd;
- QETH_DBF_TEXT(trace, 4, "sendassp");
+ QETH_DBF_TEXT(TRACE, 4, "sendassp");
cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
if (len <= sizeof(__u32))
@@ -1145,7 +1149,7 @@
int rc;
struct qeth_cmd_buffer *iob;
- QETH_DBF_TEXT(trace, 4, "simassp6");
+ QETH_DBF_TEXT(TRACE, 4, "simassp6");
iob = qeth_l3_get_setassparms_cmd(card, ipa_func, cmd_code,
0, QETH_PROT_IPV6);
rc = qeth_l3_send_setassparms(card, iob, 0, 0,
@@ -1161,7 +1165,7 @@
int length = 0;
struct qeth_cmd_buffer *iob;
- QETH_DBF_TEXT(trace, 4, "simassp4");
+ QETH_DBF_TEXT(TRACE, 4, "simassp4");
if (data)
length = sizeof(__u32);
iob = qeth_l3_get_setassparms_cmd(card, ipa_func, cmd_code,
@@ -1175,7 +1179,7 @@
{
int rc;
- QETH_DBF_TEXT(trace, 3, "ipaarp");
+ QETH_DBF_TEXT(TRACE, 3, "ipaarp");
if (!qeth_is_supported(card, IPA_ARP_PROCESSING)) {
PRINT_WARN("ARP processing not supported "
@@ -1196,7 +1200,7 @@
{
int rc;
- QETH_DBF_TEXT(trace, 3, "ipaipfrg");
+ QETH_DBF_TEXT(TRACE, 3, "ipaipfrg");
if (!qeth_is_supported(card, IPA_IP_FRAGMENTATION)) {
PRINT_INFO("Hardware IP fragmentation not supported on %s\n",
@@ -1219,7 +1223,7 @@
{
int rc;
- QETH_DBF_TEXT(trace, 3, "stsrcmac");
+ QETH_DBF_TEXT(TRACE, 3, "stsrcmac");
if (!card->options.fake_ll)
return -EOPNOTSUPP;
@@ -1243,7 +1247,7 @@
{
int rc = 0;
- QETH_DBF_TEXT(trace, 3, "strtvlan");
+ QETH_DBF_TEXT(TRACE, 3, "strtvlan");
if (!qeth_is_supported(card, IPA_FULL_VLAN)) {
PRINT_WARN("VLAN not supported on %s\n",
@@ -1267,7 +1271,7 @@
{
int rc;
- QETH_DBF_TEXT(trace, 3, "stmcast");
+ QETH_DBF_TEXT(TRACE, 3, "stmcast");
if (!qeth_is_supported(card, IPA_MULTICASTING)) {
PRINT_WARN("Multicast not supported on %s\n",
@@ -1293,7 +1297,7 @@
{
struct qeth_ipa_cmd *cmd;
- QETH_DBF_TEXT(setup, 2, "qipasscb");
+ QETH_DBF_TEXT(SETUP, 2, "qipasscb");
cmd = (struct qeth_ipa_cmd *) data;
if (cmd->hdr.prot_version == QETH_PROT_IPV4) {
@@ -1303,9 +1307,9 @@
card->options.ipa6.supported_funcs = cmd->hdr.ipa_supported;
card->options.ipa6.enabled_funcs = cmd->hdr.ipa_enabled;
}
- QETH_DBF_TEXT(setup, 2, "suppenbl");
- QETH_DBF_TEXT_(setup, 2, "%x", cmd->hdr.ipa_supported);
- QETH_DBF_TEXT_(setup, 2, "%x", cmd->hdr.ipa_enabled);
+ QETH_DBF_TEXT(SETUP, 2, "suppenbl");
+ QETH_DBF_TEXT_(SETUP, 2, "%x", cmd->hdr.ipa_supported);
+ QETH_DBF_TEXT_(SETUP, 2, "%x", cmd->hdr.ipa_enabled);
return 0;
}
@@ -1315,7 +1319,7 @@
int rc;
struct qeth_cmd_buffer *iob;
- QETH_DBF_TEXT_(setup, 2, "qipassi%i", prot);
+ QETH_DBF_TEXT_(SETUP, 2, "qipassi%i", prot);
iob = qeth_get_ipacmd_buffer(card, IPA_CMD_QIPASSIST, prot);
rc = qeth_send_ipa_cmd(card, iob, qeth_l3_query_ipassists_cb, NULL);
return rc;
@@ -1326,7 +1330,7 @@
{
int rc;
- QETH_DBF_TEXT(trace, 3, "softipv6");
+ QETH_DBF_TEXT(TRACE, 3, "softipv6");
if (card->info.type == QETH_CARD_TYPE_IQD)
goto out;
@@ -1371,7 +1375,7 @@
{
int rc = 0;
- QETH_DBF_TEXT(trace, 3, "strtipv6");
+ QETH_DBF_TEXT(TRACE, 3, "strtipv6");
if (!qeth_is_supported(card, IPA_IPV6)) {
PRINT_WARN("IPv6 not supported on %s\n",
@@ -1388,7 +1392,7 @@
{
int rc;
- QETH_DBF_TEXT(trace, 3, "stbrdcst");
+ QETH_DBF_TEXT(TRACE, 3, "stbrdcst");
card->info.broadcast_capable = 0;
if (!qeth_is_supported(card, IPA_FILTERING)) {
PRINT_WARN("Broadcast not supported on %s\n",
@@ -1458,7 +1462,7 @@
{
int rc = 0;
- QETH_DBF_TEXT(trace, 3, "strtcsum");
+ QETH_DBF_TEXT(TRACE, 3, "strtcsum");
if (card->options.checksum_type == NO_CHECKSUMMING) {
PRINT_WARN("Using no checksumming on %s.\n",
@@ -1489,7 +1493,7 @@
{
int rc;
- QETH_DBF_TEXT(trace, 3, "sttso");
+ QETH_DBF_TEXT(TRACE, 3, "sttso");
if (!qeth_is_supported(card, IPA_OUTBOUND_TSO)) {
PRINT_WARN("Outbound TSO not supported on %s\n",
@@ -1514,7 +1518,7 @@
static int qeth_l3_start_ipassists(struct qeth_card *card)
{
- QETH_DBF_TEXT(trace, 3, "strtipas");
+ QETH_DBF_TEXT(TRACE, 3, "strtipas");
qeth_l3_start_ipa_arp_processing(card); /* go on*/
qeth_l3_start_ipa_ip_fragmentation(card); /* go on*/
qeth_l3_start_ipa_source_mac(card); /* go on*/
@@ -1534,7 +1538,7 @@
struct qeth_cmd_buffer *iob;
struct qeth_ipa_cmd *cmd;
- QETH_DBF_TEXT(trace, 2, "puniqeid");
+ QETH_DBF_TEXT(TRACE, 2, "puniqeid");
if ((card->info.unique_id & UNIQUE_ID_NOT_BY_CARD) ==
UNIQUE_ID_NOT_BY_CARD)
@@ -1571,7 +1575,7 @@
struct qeth_cmd_buffer *iob;
struct qeth_ipa_cmd *cmd;
- QETH_DBF_TEXT(setup, 2, "hsrmac");
+ QETH_DBF_TEXT(SETUP, 2, "hsrmac");
iob = qeth_get_ipacmd_buffer(card, IPA_CMD_CREATE_ADDR,
QETH_PROT_IPV6);
@@ -1612,7 +1616,7 @@
struct qeth_cmd_buffer *iob;
struct qeth_ipa_cmd *cmd;
- QETH_DBF_TEXT(setup, 2, "guniqeid");
+ QETH_DBF_TEXT(SETUP, 2, "guniqeid");
if (!qeth_is_supported(card, IPA_IPV6)) {
card->info.unique_id = UNIQUE_ID_IF_CREATE_ADDR_FAILED |
@@ -1645,7 +1649,7 @@
struct ip_mc_list *im4;
char buf[MAX_ADDR_LEN];
- QETH_DBF_TEXT(trace, 4, "addmc");
+ QETH_DBF_TEXT(TRACE, 4, "addmc");
for (im4 = in4_dev->mc_list; im4; im4 = im4->next) {
qeth_l3_get_mac_for_ipm(im4->multiaddr, buf, in4_dev->dev);
ipm = qeth_l3_get_addr_buffer(QETH_PROT_IPV4);
@@ -1665,7 +1669,7 @@
struct vlan_group *vg;
int i;
- QETH_DBF_TEXT(trace, 4, "addmcvl");
+ QETH_DBF_TEXT(TRACE, 4, "addmcvl");
if (!qeth_is_supported(card, IPA_FULL_VLAN) || (card->vlangrp == NULL))
return;
@@ -1689,7 +1693,7 @@
{
struct in_device *in4_dev;
- QETH_DBF_TEXT(trace, 4, "chkmcv4");
+ QETH_DBF_TEXT(TRACE, 4, "chkmcv4");
in4_dev = in_dev_get(card->dev);
if (in4_dev == NULL)
return;
@@ -1707,7 +1711,7 @@
struct ifmcaddr6 *im6;
char buf[MAX_ADDR_LEN];
- QETH_DBF_TEXT(trace, 4, "addmc6");
+ QETH_DBF_TEXT(TRACE, 4, "addmc6");
for (im6 = in6_dev->mc_list; im6 != NULL; im6 = im6->next) {
ndisc_mc_map(&im6->mca_addr, buf, in6_dev->dev, 0);
ipm = qeth_l3_get_addr_buffer(QETH_PROT_IPV6);
@@ -1728,7 +1732,7 @@
struct vlan_group *vg;
int i;
- QETH_DBF_TEXT(trace, 4, "admc6vl");
+ QETH_DBF_TEXT(TRACE, 4, "admc6vl");
if (!qeth_is_supported(card, IPA_FULL_VLAN) || (card->vlangrp == NULL))
return;
@@ -1752,7 +1756,7 @@
{
struct inet6_dev *in6_dev;
- QETH_DBF_TEXT(trace, 4, "chkmcv6");
+ QETH_DBF_TEXT(TRACE, 4, "chkmcv6");
if (!qeth_is_supported(card, IPA_IPV6))
return ;
in6_dev = in6_dev_get(card->dev);
@@ -1773,7 +1777,7 @@
struct in_ifaddr *ifa;
struct qeth_ipaddr *addr;
- QETH_DBF_TEXT(trace, 4, "frvaddr4");
+ QETH_DBF_TEXT(TRACE, 4, "frvaddr4");
in_dev = in_dev_get(vlan_group_get_device(card->vlangrp, vid));
if (!in_dev)
@@ -1799,7 +1803,7 @@
struct inet6_ifaddr *ifa;
struct qeth_ipaddr *addr;
- QETH_DBF_TEXT(trace, 4, "frvaddr6");
+ QETH_DBF_TEXT(TRACE, 4, "frvaddr6");
in6_dev = in6_dev_get(vlan_group_get_device(card->vlangrp, vid));
if (!in6_dev)
@@ -1834,7 +1838,7 @@
struct qeth_card *card = netdev_priv(dev);
unsigned long flags;
- QETH_DBF_TEXT(trace, 4, "vlanreg");
+ QETH_DBF_TEXT(TRACE, 4, "vlanreg");
spin_lock_irqsave(&card->vlanlock, flags);
card->vlangrp = grp;
spin_unlock_irqrestore(&card->vlanlock, flags);
@@ -1872,7 +1876,7 @@
struct qeth_card *card = netdev_priv(dev);
unsigned long flags;
- QETH_DBF_TEXT_(trace, 4, "kid:%d", vid);
+ QETH_DBF_TEXT_(TRACE, 4, "kid:%d", vid);
spin_lock_irqsave(&card->vlanlock, flags);
/* unregister IP addresses of vlan device */
qeth_l3_free_vlan_addresses(card, vid);
@@ -2002,8 +2006,8 @@
break;
default:
dev_kfree_skb_any(skb);
- QETH_DBF_TEXT(trace, 3, "inbunkno");
- QETH_DBF_HEX(control, 3, hdr, QETH_DBF_CONTROL_LEN);
+ QETH_DBF_TEXT(TRACE, 3, "inbunkno");
+ QETH_DBF_HEX(CTRL, 3, hdr, QETH_DBF_CTRL_LEN);
continue;
}
@@ -2070,7 +2074,7 @@
card = netdev_priv(vlan_dev_info(dev)->real_dev);
if (card->options.layer2)
card = NULL;
- QETH_DBF_TEXT_(trace, 4, "%d", rc);
+ QETH_DBF_TEXT_(TRACE, 4, "%d", rc);
return card ;
}
@@ -2078,8 +2082,8 @@
{
int rc = 0;
- QETH_DBF_TEXT(setup, 2, "stopcard");
- QETH_DBF_HEX(setup, 2, &card, sizeof(void *));
+ QETH_DBF_TEXT(SETUP, 2, "stopcard");
+ QETH_DBF_HEX(SETUP, 2, &card, sizeof(void *));
qeth_set_allowed_threads(card, 0, 1);
if (qeth_wait_for_threads(card, ~QETH_RECOVER_THREAD))
@@ -2092,7 +2096,7 @@
if (!card->use_hard_stop) {
rc = qeth_send_stoplan(card);
if (rc)
- QETH_DBF_TEXT_(setup, 2, "1err%d", rc);
+ QETH_DBF_TEXT_(SETUP, 2, "1err%d", rc);
}
card->state = CARD_STATE_SOFTSETUP;
}
@@ -2106,7 +2110,7 @@
(card->info.type != QETH_CARD_TYPE_IQD)) {
rc = qeth_l3_put_unique_id(card);
if (rc)
- QETH_DBF_TEXT_(setup, 2, "2err%d", rc);
+ QETH_DBF_TEXT_(SETUP, 2, "2err%d", rc);
}
qeth_qdio_clear_card(card, 0);
qeth_clear_qdio_buffers(card);
@@ -2125,7 +2129,7 @@
{
struct qeth_card *card = netdev_priv(dev);
- QETH_DBF_TEXT(trace, 3, "setmulti");
+ QETH_DBF_TEXT(TRACE, 3, "setmulti");
qeth_l3_delete_mc_addresses(card);
qeth_l3_add_multicast_ipv4(card);
#ifdef CONFIG_QETH_IPV6
@@ -2165,7 +2169,7 @@
int tmp;
int rc;
- QETH_DBF_TEXT(trace, 3, "arpstnoe");
+ QETH_DBF_TEXT(TRACE, 3, "arpstnoe");
/*
* currently GuestLAN only supports the ARP assist function
@@ -2219,17 +2223,17 @@
int uentry_size;
int i;
- QETH_DBF_TEXT(trace, 4, "arpquecb");
+ QETH_DBF_TEXT(TRACE, 4, "arpquecb");
qinfo = (struct qeth_arp_query_info *) reply->param;
cmd = (struct qeth_ipa_cmd *) data;
if (cmd->hdr.return_code) {
- QETH_DBF_TEXT_(trace, 4, "qaer1%i", cmd->hdr.return_code);
+ QETH_DBF_TEXT_(TRACE, 4, "qaer1%i", cmd->hdr.return_code);
return 0;
}
if (cmd->data.setassparms.hdr.return_code) {
cmd->hdr.return_code = cmd->data.setassparms.hdr.return_code;
- QETH_DBF_TEXT_(trace, 4, "qaer2%i", cmd->hdr.return_code);
+ QETH_DBF_TEXT_(TRACE, 4, "qaer2%i", cmd->hdr.return_code);
return 0;
}
qdata = &cmd->data.setassparms.data.query_arp;
@@ -2251,17 +2255,17 @@
/* check if there is enough room in userspace */
if ((qinfo->udata_len - qinfo->udata_offset) <
qdata->no_entries * uentry_size){
- QETH_DBF_TEXT_(trace, 4, "qaer3%i", -ENOMEM);
+ QETH_DBF_TEXT_(TRACE, 4, "qaer3%i", -ENOMEM);
cmd->hdr.return_code = -ENOMEM;
PRINT_WARN("query ARP user space buffer is too small for "
"the returned number of ARP entries. "
"Aborting query!\n");
goto out_error;
}
- QETH_DBF_TEXT_(trace, 4, "anore%i",
+ QETH_DBF_TEXT_(TRACE, 4, "anore%i",
cmd->data.setassparms.hdr.number_of_replies);
- QETH_DBF_TEXT_(trace, 4, "aseqn%i", cmd->data.setassparms.hdr.seq_no);
- QETH_DBF_TEXT_(trace, 4, "anoen%i", qdata->no_entries);
+ QETH_DBF_TEXT_(TRACE, 4, "aseqn%i", cmd->data.setassparms.hdr.seq_no);
+ QETH_DBF_TEXT_(TRACE, 4, "anoen%i", qdata->no_entries);
if (qinfo->mask_bits & QETH_QARP_STRIP_ENTRIES) {
/* strip off "media specific information" */
@@ -2297,7 +2301,7 @@
unsigned long),
void *reply_param)
{
- QETH_DBF_TEXT(trace, 4, "sendarp");
+ QETH_DBF_TEXT(TRACE, 4, "sendarp");
memcpy(iob->data, IPA_PDU_HEADER, IPA_PDU_HEADER_SIZE);
memcpy(QETH_IPA_CMD_DEST_ADDR(iob->data),
@@ -2313,7 +2317,7 @@
int tmp;
int rc;
- QETH_DBF_TEXT(trace, 3, "arpquery");
+ QETH_DBF_TEXT(TRACE, 3, "arpquery");
if (!qeth_is_supported(card,/*IPA_QUERY_ARP_ADDR_INFO*/
IPA_ARP_PROCESSING)) {
@@ -2358,7 +2362,7 @@
int tmp;
int rc;
- QETH_DBF_TEXT(trace, 3, "arpadent");
+ QETH_DBF_TEXT(TRACE, 3, "arpadent");
/*
* currently GuestLAN only supports the ARP assist function
@@ -2400,7 +2404,7 @@
int tmp;
int rc;
- QETH_DBF_TEXT(trace, 3, "arprment");
+ QETH_DBF_TEXT(TRACE, 3, "arprment");
/*
* currently GuestLAN only supports the ARP assist function
@@ -2439,7 +2443,7 @@
int rc;
int tmp;
- QETH_DBF_TEXT(trace, 3, "arpflush");
+ QETH_DBF_TEXT(TRACE, 3, "arpflush");
/*
* currently GuestLAN only supports the ARP assist function
@@ -2548,14 +2552,14 @@
rc = -EOPNOTSUPP;
}
if (rc)
- QETH_DBF_TEXT_(trace, 2, "ioce%d", rc);
+ QETH_DBF_TEXT_(TRACE, 2, "ioce%d", rc);
return rc;
}
static void qeth_l3_fill_header(struct qeth_card *card, struct qeth_hdr *hdr,
struct sk_buff *skb, int ipv, int cast_type)
{
- QETH_DBF_TEXT(trace, 6, "fillhdr");
+ QETH_DBF_TEXT(TRACE, 6, "fillhdr");
memset(hdr, 0, sizeof(struct qeth_hdr));
hdr->hdr.l3.id = QETH_HEADER_TYPE_LAYER3;
@@ -2634,7 +2638,7 @@
enum qeth_large_send_types large_send = QETH_LARGE_SEND_NO;
struct qeth_eddp_context *ctx = NULL;
- QETH_DBF_TEXT(trace, 6, "l3xmit");
+ QETH_DBF_TEXT(TRACE, 6, "l3xmit");
if ((card->info.type == QETH_CARD_TYPE_IQD) &&
(skb->protocol != htons(ETH_P_IPV6)) &&
@@ -2795,7 +2799,7 @@
{
struct qeth_card *card = netdev_priv(dev);
- QETH_DBF_TEXT(trace, 4, "qethopen");
+ QETH_DBF_TEXT(TRACE, 4, "qethopen");
if (card->state != CARD_STATE_SOFTSETUP)
return -ENODEV;
card->data.state = CH_STATE_UP;
@@ -2812,7 +2816,7 @@
{
struct qeth_card *card = netdev_priv(dev);
- QETH_DBF_TEXT(trace, 4, "qethstop");
+ QETH_DBF_TEXT(TRACE, 4, "qethstop");
netif_tx_disable(dev);
card->dev->flags &= ~IFF_UP;
if (card->state == CARD_STATE_UP)
@@ -2957,6 +2961,7 @@
card->dev->vlan_rx_add_vid = qeth_l3_vlan_rx_add_vid;
card->dev->vlan_rx_kill_vid = qeth_l3_vlan_rx_kill_vid;
card->dev->mtu = card->info.initial_mtu;
+ card->dev->set_mac_address = NULL;
SET_ETHTOOL_OPS(card->dev, &qeth_l3_ethtool_ops);
card->dev->features |= NETIF_F_HW_VLAN_TX |
NETIF_F_HW_VLAN_RX |
@@ -2977,7 +2982,7 @@
int index;
int i;
- QETH_DBF_TEXT(trace, 6, "qdinput");
+ QETH_DBF_TEXT(TRACE, 6, "qdinput");
card = (struct qeth_card *) card_ptr;
net_dev = card->dev;
if (card->options.performance_stats) {
@@ -2986,11 +2991,11 @@
}
if (status & QDIO_STATUS_LOOK_FOR_ERROR) {
if (status & QDIO_STATUS_ACTIVATE_CHECK_CONDITION) {
- QETH_DBF_TEXT(trace, 1, "qdinchk");
- QETH_DBF_TEXT_(trace, 1, "%s", CARD_BUS_ID(card));
- QETH_DBF_TEXT_(trace, 1, "%04X%04X",
+ QETH_DBF_TEXT(TRACE, 1, "qdinchk");
+ QETH_DBF_TEXT_(TRACE, 1, "%s", CARD_BUS_ID(card));
+ QETH_DBF_TEXT_(TRACE, 1, "%04X%04X",
first_element, count);
- QETH_DBF_TEXT_(trace, 1, "%04X%04X", queue, status);
+ QETH_DBF_TEXT_(TRACE, 1, "%04X%04X", queue, status);
qeth_schedule_recovery(card);
return;
}
@@ -3054,8 +3059,8 @@
enum qeth_card_states recover_flag;
BUG_ON(!card);
- QETH_DBF_TEXT(setup, 2, "setonlin");
- QETH_DBF_HEX(setup, 2, &card, sizeof(void *));
+ QETH_DBF_TEXT(SETUP, 2, "setonlin");
+ QETH_DBF_HEX(SETUP, 2, &card, sizeof(void *));
qeth_set_allowed_threads(card, QETH_RECOVER_THREAD, 1);
if (qeth_wait_for_threads(card, ~QETH_RECOVER_THREAD)) {
@@ -3067,23 +3072,23 @@
recover_flag = card->state;
rc = ccw_device_set_online(CARD_RDEV(card));
if (rc) {
- QETH_DBF_TEXT_(setup, 2, "1err%d", rc);
+ QETH_DBF_TEXT_(SETUP, 2, "1err%d", rc);
return -EIO;
}
rc = ccw_device_set_online(CARD_WDEV(card));
if (rc) {
- QETH_DBF_TEXT_(setup, 2, "1err%d", rc);
+ QETH_DBF_TEXT_(SETUP, 2, "1err%d", rc);
return -EIO;
}
rc = ccw_device_set_online(CARD_DDEV(card));
if (rc) {
- QETH_DBF_TEXT_(setup, 2, "1err%d", rc);
+ QETH_DBF_TEXT_(SETUP, 2, "1err%d", rc);
return -EIO;
}
rc = qeth_core_hardsetup_card(card);
if (rc) {
- QETH_DBF_TEXT_(setup, 2, "2err%d", rc);
+ QETH_DBF_TEXT_(SETUP, 2, "2err%d", rc);
goto out_remove;
}
@@ -3096,11 +3101,11 @@
qeth_print_status_message(card);
/* softsetup */
- QETH_DBF_TEXT(setup, 2, "softsetp");
+ QETH_DBF_TEXT(SETUP, 2, "softsetp");
rc = qeth_send_startlan(card);
if (rc) {
- QETH_DBF_TEXT_(setup, 2, "1err%d", rc);
+ QETH_DBF_TEXT_(SETUP, 2, "1err%d", rc);
if (rc == 0xe080) {
PRINT_WARN("LAN on card %s if offline! "
"Waiting for STARTLAN from card.\n",
@@ -3114,21 +3119,21 @@
rc = qeth_l3_setadapter_parms(card);
if (rc)
- QETH_DBF_TEXT_(setup, 2, "2err%d", rc);
+ QETH_DBF_TEXT_(SETUP, 2, "2err%d", rc);
rc = qeth_l3_start_ipassists(card);
if (rc)
- QETH_DBF_TEXT_(setup, 2, "3err%d", rc);
+ QETH_DBF_TEXT_(SETUP, 2, "3err%d", rc);
rc = qeth_l3_setrouting_v4(card);
if (rc)
- QETH_DBF_TEXT_(setup, 2, "4err%d", rc);
+ QETH_DBF_TEXT_(SETUP, 2, "4err%d", rc);
rc = qeth_l3_setrouting_v6(card);
if (rc)
- QETH_DBF_TEXT_(setup, 2, "5err%d", rc);
+ QETH_DBF_TEXT_(SETUP, 2, "5err%d", rc);
netif_tx_disable(card->dev);
rc = qeth_init_qdio_queues(card);
if (rc) {
- QETH_DBF_TEXT_(setup, 2, "6err%d", rc);
+ QETH_DBF_TEXT_(SETUP, 2, "6err%d", rc);
goto out_remove;
}
card->state = CARD_STATE_SOFTSETUP;
@@ -3167,8 +3172,8 @@
int rc = 0, rc2 = 0, rc3 = 0;
enum qeth_card_states recover_flag;
- QETH_DBF_TEXT(setup, 3, "setoffl");
- QETH_DBF_HEX(setup, 3, &card, sizeof(void *));
+ QETH_DBF_TEXT(SETUP, 3, "setoffl");
+ QETH_DBF_HEX(SETUP, 3, &card, sizeof(void *));
if (card->dev && netif_carrier_ok(card->dev))
netif_carrier_off(card->dev);
@@ -3184,7 +3189,7 @@
if (!rc)
rc = (rc2) ? rc2 : rc3;
if (rc)
- QETH_DBF_TEXT_(setup, 2, "1err%d", rc);
+ QETH_DBF_TEXT_(SETUP, 2, "1err%d", rc);
if (recover_flag == CARD_STATE_UP)
card->state = CARD_STATE_RECOVER;
/* let user_space know that device is offline */
@@ -3203,11 +3208,11 @@
int rc = 0;
card = (struct qeth_card *) ptr;
- QETH_DBF_TEXT(trace, 2, "recover1");
- QETH_DBF_HEX(trace, 2, &card, sizeof(void *));
+ QETH_DBF_TEXT(TRACE, 2, "recover1");
+ QETH_DBF_HEX(TRACE, 2, &card, sizeof(void *));
if (!qeth_do_run_thread(card, QETH_RECOVER_THREAD))
return 0;
- QETH_DBF_TEXT(trace, 2, "recover2");
+ QETH_DBF_TEXT(TRACE, 2, "recover2");
PRINT_WARN("Recovery of device %s started ...\n",
CARD_BUS_ID(card));
card->use_hard_stop = 1;
@@ -3253,7 +3258,7 @@
if (dev_net(dev) != &init_net)
return NOTIFY_DONE;
- QETH_DBF_TEXT(trace, 3, "ipevent");
+ QETH_DBF_TEXT(TRACE, 3, "ipevent");
card = qeth_l3_get_card_from_dev(dev);
if (!card)
return NOTIFY_DONE;
@@ -3300,7 +3305,7 @@
struct qeth_ipaddr *addr;
struct qeth_card *card;
- QETH_DBF_TEXT(trace, 3, "ip6event");
+ QETH_DBF_TEXT(TRACE, 3, "ip6event");
card = qeth_l3_get_card_from_dev(dev);
if (!card)
@@ -3343,7 +3348,7 @@
{
int rc;
- QETH_DBF_TEXT(trace, 5, "regnotif");
+ QETH_DBF_TEXT(TRACE, 5, "regnotif");
rc = register_inetaddr_notifier(&qeth_l3_ip_notifier);
if (rc)
return rc;
@@ -3362,7 +3367,7 @@
static void qeth_l3_unregister_notifiers(void)
{
- QETH_DBF_TEXT(trace, 5, "unregnot");
+ QETH_DBF_TEXT(TRACE, 5, "unregnot");
BUG_ON(unregister_inetaddr_notifier(&qeth_l3_ip_notifier));
#ifdef CONFIG_QETH_IPV6
BUG_ON(unregister_inet6addr_notifier(&qeth_l3_ip6_notifier));
diff --git a/include/linux/fsl_devices.h b/include/linux/fsl_devices.h
index 1831b19..2cad5c6 100644
--- a/include/linux/fsl_devices.h
+++ b/include/linux/fsl_devices.h
@@ -50,7 +50,7 @@
u32 device_flags;
/* board specific information */
u32 board_flags;
- u32 bus_id;
+ char bus_id[MII_BUS_ID_SIZE];
u32 phy_id;
u8 mac_addr[6];
phy_interface_t interface;
diff --git a/include/linux/phy.h b/include/linux/phy.h
index 5e43ae7..779cbcd 100644
--- a/include/linux/phy.h
+++ b/include/linux/phy.h
@@ -39,7 +39,8 @@
SUPPORTED_1000baseT_Half | \
SUPPORTED_1000baseT_Full)
-/* Set phydev->irq to PHY_POLL if interrupts are not supported,
+/*
+ * Set phydev->irq to PHY_POLL if interrupts are not supported,
* or not desired for this PHY. Set to PHY_IGNORE_INTERRUPT if
* the attached driver handles the interrupt
*/
@@ -63,8 +64,6 @@
PHY_INTERFACE_MODE_RTBI
} phy_interface_t;
-#define MII_BUS_MAX 4
-
#define PHY_INIT_TIMEOUT 100000
#define PHY_STATE_TIME 1
@@ -74,20 +73,30 @@
#define PHY_MAX_ADDR 32
/* Used when trying to connect to a specific phy (mii bus id:phy device id) */
-#define PHY_ID_FMT "%x:%02x"
+#define PHY_ID_FMT "%s:%02x"
-/* The Bus class for PHYs. Devices which provide access to
- * PHYs should register using this structure */
+/*
+ * Need to be a little smaller than phydev->dev.bus_id to leave room
+ * for the ":%02x"
+ */
+#define MII_BUS_ID_SIZE (BUS_ID_SIZE - 3)
+
+/*
+ * The Bus class for PHYs. Devices which provide access to
+ * PHYs should register using this structure
+ */
struct mii_bus {
const char *name;
- int id;
+ char id[MII_BUS_ID_SIZE];
void *priv;
int (*read)(struct mii_bus *bus, int phy_id, int regnum);
int (*write)(struct mii_bus *bus, int phy_id, int regnum, u16 val);
int (*reset)(struct mii_bus *bus);
- /* A lock to ensure that only one thing can read/write
- * the MDIO bus at a time */
+ /*
+ * A lock to ensure that only one thing can read/write
+ * the MDIO bus at a time
+ */
struct mutex mdio_lock;
struct device *dev;
@@ -98,8 +107,10 @@
/* Phy addresses to be ignored when probing */
u32 phy_mask;
- /* Pointer to an array of interrupts, each PHY's
- * interrupt at the index matching its address */
+ /*
+ * Pointer to an array of interrupts, each PHY's
+ * interrupt at the index matching its address
+ */
int *irq;
};
@@ -251,7 +262,8 @@
/* Bus address of the PHY (0-32) */
int addr;
- /* forced speed & duplex (no autoneg)
+ /*
+ * forced speed & duplex (no autoneg)
* partner speed & duplex & pause (autoneg)
*/
int speed;
@@ -274,8 +286,10 @@
int link_timeout;
- /* Interrupt number for this PHY
- * -1 means no interrupt */
+ /*
+ * Interrupt number for this PHY
+ * -1 means no interrupt
+ */
int irq;
/* private data pointer */
@@ -325,22 +339,28 @@
u32 features;
u32 flags;
- /* Called to initialize the PHY,
- * including after a reset */
+ /*
+ * Called to initialize the PHY,
+ * including after a reset
+ */
int (*config_init)(struct phy_device *phydev);
- /* Called during discovery. Used to set
- * up device-specific structures, if any */
+ /*
+ * Called during discovery. Used to set
+ * up device-specific structures, if any
+ */
int (*probe)(struct phy_device *phydev);
/* PHY Power Management */
int (*suspend)(struct phy_device *phydev);
int (*resume)(struct phy_device *phydev);
- /* Configures the advertisement and resets
+ /*
+ * Configures the advertisement and resets
* autonegotiation if phydev->autoneg is on,
* forces the speed to the current settings in phydev
- * if phydev->autoneg is off */
+ * if phydev->autoneg is off
+ */
int (*config_aneg)(struct phy_device *phydev);
/* Determines the negotiated speed and duplex */
@@ -361,6 +381,7 @@
int phy_read(struct phy_device *phydev, u16 regnum);
int phy_write(struct phy_device *phydev, u16 regnum, u16 val);
+int get_phy_id(struct mii_bus *bus, int addr, u32 *phy_id);
struct phy_device* get_phy_device(struct mii_bus *bus, int addr);
int phy_clear_interrupt(struct phy_device *phydev);
int phy_config_interrupt(struct phy_device *phydev, u32 interrupts);