coresight: change STM ATID to allow concurrent trace sources
Change STM traceid from 3 to 16 so that ETM and STM can be used
concurrently if required. ATIDs 0 to 15 are reserved for ETM - one
for each core.
Change-Id: Ic51cf3b8baa9c22be69c952a20281b238750de5d
Signed-off-by: Pratik Patel <pratikp@codeaurora.org>
diff --git a/drivers/coresight/coresight-stm.c b/drivers/coresight/coresight-stm.c
index 4c69334..70b2c43 100644
--- a/drivers/coresight/coresight-stm.c
+++ b/drivers/coresight/coresight-stm.c
@@ -219,7 +219,7 @@
stm_writel(drvdata, 0xFFF, STMSYNCR);
/* SYNCEN is read-only and HWTEN is not implemented */
- stm_writel(drvdata, 0x30003, STMTCSR);
+ stm_writel(drvdata, 0x100003, STMTCSR);
STM_LOCK(drvdata);
}
@@ -283,7 +283,7 @@
{
STM_UNLOCK(drvdata);
- stm_writel(drvdata, 0x30000, STMTCSR);
+ stm_writel(drvdata, 0x100000, STMTCSR);
STM_LOCK(drvdata);