Merge "msm: mdss: keep reference of rotator output buffer"
diff --git a/Documentation/devicetree/bindings/arm/msm/acpuclock/acpuclock-a7.txt b/Documentation/devicetree/bindings/arm/msm/acpuclock/acpuclock-a7.txt
index a77d435..6c7a7d8 100644
--- a/Documentation/devicetree/bindings/arm/msm/acpuclock/acpuclock-a7.txt
+++ b/Documentation/devicetree/bindings/arm/msm/acpuclock/acpuclock-a7.txt
@@ -11,6 +11,9 @@
is expected.
- a7_cpu-supply: regulator to supply a7 cpu
+Optional properties:
+- reg-names: "pte_efuse". Registers indicate maximum cpu speed.
+
Example:
qcom,acpuclk@f9011050 {
compatible = "qcom,acpuclk-a7";
diff --git a/Documentation/devicetree/bindings/arm/msm/core_sleep_status.txt b/Documentation/devicetree/bindings/arm/msm/core_sleep_status.txt
index 6ac80f1..b6fc45a 100644
--- a/Documentation/devicetree/bindings/arm/msm/core_sleep_status.txt
+++ b/Documentation/devicetree/bindings/arm/msm/core_sleep_status.txt
@@ -6,11 +6,6 @@
devices require that the offlined core is power collapsed before turning off
the resources that are used by the offlined core.
-This device is dependent on the pm-8x60 device, which configures the low power
-mode of respective cores. The sleep status is only valid when the core enters
-a low power mode. The device is a child node to pm-8x60 node which is documented
-in Documentation/devicetree/bindings/arm/msm/pm-8x60.txt
-
The required properties of sleep status device are:
- compatible: qcom,cpu-sleep-status
diff --git a/Documentation/devicetree/bindings/arm/msm/rpm-rbcpr-stats.txt b/Documentation/devicetree/bindings/arm/msm/rpm-rbcpr-stats.txt
new file mode 100644
index 0000000..9b69037
--- /dev/null
+++ b/Documentation/devicetree/bindings/arm/msm/rpm-rbcpr-stats.txt
@@ -0,0 +1,26 @@
+* RPM RBCPR
+
+The RBCPR(Rapid Bridge Core Power Reduction) is module on RPM that controls
+the voltage level on the chip based on feedback received through various
+sensors on the chip that allow compensation of the chip process variation,
+temperature etc.
+RPM maintains RBCPR (Rapid Bridge Core Power Reduction) related stats in
+data memory. This module allows users to read those stats.
+
+The required properties for rpm-stats are:
+
+- compatible: "qcom,rpmrbcpr-stats"
+- reg: Pointer to the start of the RPM Data Memory. The size of the memory
+ is inclusive of the entire RPM data memory.
+- qcom,start_offset: The offset at which the RBCPR stats are maintained. The
+ driver module reads this parameter to get another offset
+ that contain the rbcpr stats.
+
+
+Example:
+
+qcom,rpm-rbcpr-stats@fc000000 {
+ compatible = "qcom,rpmrbcpr-stats";
+ reg = <0xfc000000 0x1a0000>;
+ qcom,start-offset = <0x190010>;
+};
diff --git a/Documentation/devicetree/bindings/coresight/coresight.txt b/Documentation/devicetree/bindings/coresight/coresight.txt
index ce797d3..8d1d46d 100644
--- a/Documentation/devicetree/bindings/coresight/coresight.txt
+++ b/Documentation/devicetree/bindings/coresight/coresight.txt
@@ -226,8 +226,9 @@
compatible = "qcom,coresight-hwevent";
reg = <0xfdf30018 0x80>,
<0xf9011080 0x80>,
- <0xfd4ab160 0x80>;
- reg-names = "mmss-mux", "apcs-mux", "ppss-mux";
+ <0xfd4ab160 0x80>,
+ <0xfc401600 0x80>;
+ reg-names = "mmss-mux", "apcs-mux", "ppss-mux", "gcc-mux";
coresight-id = <29>;
coresight-name = "coresight-hwevent";
diff --git a/Documentation/devicetree/bindings/dma/sps/sps.txt b/Documentation/devicetree/bindings/dma/sps/sps.txt
index 094acb1..a979c56 100644
--- a/Documentation/devicetree/bindings/dma/sps/sps.txt
+++ b/Documentation/devicetree/bindings/dma/sps/sps.txt
@@ -14,6 +14,9 @@
1 - With BAM DMA and without pipe memory
2 - With BAM DMA and with pipe memory
3 - Without BAM DMA and without pipe memory
+ - qcom,pipe-attr-ee: BAM pipes are attributed to a specific EE, with
+ which we can know the pipes belong to apps side and can have the
+ error interrupts at the pipe level.
Example:
@@ -24,4 +27,5 @@
<0xfe803000 0x4800>;
interrupts = <0 94 0>;
qcom,device-type = <2>;
+ qcom,pipe-attr-ee;
};
diff --git a/Documentation/devicetree/bindings/fb/mdss-dsi-panel.txt b/Documentation/devicetree/bindings/fb/mdss-dsi-panel.txt
index 7ed873f..8c87eac 100644
--- a/Documentation/devicetree/bindings/fb/mdss-dsi-panel.txt
+++ b/Documentation/devicetree/bindings/fb/mdss-dsi-panel.txt
@@ -4,7 +4,10 @@
are compatable with MIPI display serial interface specification.
Required properties:
-- compatible: Must be "qcom,mdss-dsi-panel"
+- compatible: Specifies the version for DSI HW. that
+ this panel will be worked with
+ "qcom,mdss-dsi-panel" = DSI v6.0
+ "qcom,dsi-panel-v2" = DSI V2.0
- status: A string that has to be set to "okay/ok" to enable
the panel driver. By default this property will be
set to "disable". Will be set to "ok/okay" status
diff --git a/Documentation/devicetree/bindings/gpio/gpio.txt b/Documentation/devicetree/bindings/gpio/gpio.txt
index 4e16ba4..a336287 100644
--- a/Documentation/devicetree/bindings/gpio/gpio.txt
+++ b/Documentation/devicetree/bindings/gpio/gpio.txt
@@ -75,4 +75,40 @@
gpio-controller;
};
+2.1) gpio-controller and pinctrl subsystem
+------------------------------------------
+gpio-controller on a SOC might be tightly coupled with the pinctrl
+subsystem, in the sense that the pins can be used by other functions
+together with optional gpio feature.
+
+While the pin allocation is totally managed by the pin ctrl subsystem,
+gpio (under gpiolib) is still maintained by gpio drivers. It may happen
+that different pin ranges in a SoC is managed by different gpio drivers.
+
+This makes it logical to let gpio drivers announce their pin ranges to
+the pin ctrl subsystem and call 'pinctrl_request_gpio' in order to
+request the corresponding pin before any gpio usage.
+
+For this, the gpio controller can use a pinctrl phandle and pins to
+announce the pinrange to the pin ctrl subsystem. For example,
+
+ qe_pio_e: gpio-controller@1460 {
+ #gpio-cells = <2>;
+ compatible = "fsl,qe-pario-bank-e", "fsl,qe-pario-bank";
+ reg = <0x1460 0x18>;
+ gpio-controller;
+ gpio-ranges = <&pinctrl1 20 10>, <&pinctrl2 50 20>;
+
+ }
+
+where,
+ &pinctrl1 and &pinctrl2 is the phandle to the pinctrl DT node.
+
+ Next values specify the base pin and number of pins for the range
+ handled by 'qe_pio_e' gpio. In the given example from base pin 20 to
+ pin 29 under pinctrl1 and pin 50 to pin 69 under pinctrl2 is handled
+ by this gpio controller.
+
+The pinctrl node must have "#gpio-range-cells" property to show number of
+arguments to pass with phandle from gpio controllers node.
diff --git a/Documentation/devicetree/bindings/input/misc/kxtj9.txt b/Documentation/devicetree/bindings/input/misc/kxtj9.txt
new file mode 100644
index 0000000..250ee7a
--- /dev/null
+++ b/Documentation/devicetree/bindings/input/misc/kxtj9.txt
@@ -0,0 +1,67 @@
+Kionis KXTIK-series accelerometer driver
+
+Required properties:
+
+ - compatible : Should be "kionix,kxtj9".
+ - reg : i2c slave address of the device.
+ - interrupt-parent : Parent of interrupt.
+ - interrupts : Accelerometer sample interrupt to indicate new data ready.
+ - vdd-supply : Analog power supply needed to power device.
+ - vio-supply : Digital IO power supply needed for IO and I2C.
+ - kionix,min-interval : Minimal data polling interval in millisecond.
+ - kionix,init-interval : Initial data polling interval in millisecond.
+ - kionix,axis-map-x : Select which data will be X-axis of reading.
+ The sensor measures and reports three axis of
+ data, this property selset which data will be
+ interpretd as X-axis gravity data of phone.
+ e.g. Give "0" to this property means the first
+ measurement data will be used as X-axis data
+ - kionix,axis-map-y : Select which data will be Y-axis of reading.
+ Similar to property above, this property selet
+ Y-axis data.
+ - kionix,axis-map-z : Select which data will be Z-axis of reading.
+ Similar to property above, this property selet
+ Z-axis data.
+ - kionix,g-range : Select initial range of measurement. This define
+ the initial configuration of maxinum
+ measurement range of the sensor.Where 2 is 2G,
+ 4 is 4G, 8 is 8G, 2G will be used for any other
+ values.
+
+Optional properties:
+
+ - kionix,negate-x : Boolean to select negate of X-axis data is
+ required, if this property is defined, X-axis
+ data will be negated.
+ - kionix,negate-y : Boolean to select negate of Y-axis data is
+ required, if this property is defined, Y-axis
+ data will be negated.
+ - kionix,negate-z : Boolean to select negate of Z-axis data is
+ required, if this property is defined, Z-axis
+ data will be negated.
+ - kionix,res-12bit; : Boolean to select output data resolution, if this
+ property is defined, sensor will be configured
+ to output 12 bits of data, otherwise sensor will
+ be configured to output 8 bits data.
+
+Example:
+ i2c@f9925000 { /* BLSP-1 QUP-3 */
+ kionix@f {
+ compatible = "kionix,kxtj9";
+ reg = <0x0f>;
+ interrupt-parent = <&msmgpio>;
+ interrupts = <81 0x2>;
+ vdd-supply = <&pm8110_l19>;
+ vio-supply = <&pm8110_l14>;
+ kionix,min-interval = <5>;
+ kionix,init-interval = <200>;
+ kionix,axis-map-x = <1>;
+ kionix,axis-map-y = <0>;
+ kionix,axis-map-z = <2>;
+ kionix,g-range = <2>;
+ kionix,negate-x;
+ kionix,negate-y;
+ kionix,negate-z;
+ kionix,res-12bit;
+ };
+ };
diff --git a/Documentation/devicetree/bindings/input/touchscreen/synaptics_i2c_rmi4.txt b/Documentation/devicetree/bindings/input/touchscreen/synaptics_i2c_rmi4.txt
index d24139b..0f35e73 100644
--- a/Documentation/devicetree/bindings/input/touchscreen/synaptics_i2c_rmi4.txt
+++ b/Documentation/devicetree/bindings/input/touchscreen/synaptics_i2c_rmi4.txt
@@ -12,7 +12,6 @@
Optional property:
- vdd-supply : Analog power supply needed to power device
- - synaptics,reg-en : specify to indicate regulator is needed
- vcc_i2c-supply : Power source required to pull up i2c bus
- synaptics,i2c-pull-up : specify to indicate pull up is needed
- synaptics,button-map : virtual key code mappings to be used
@@ -48,6 +47,5 @@
synaptics,irq-gpio = <&msmgpio 17 0x00>;
synaptics,button-map = [8B 66 9E];
synaptics,i2c-pull-up;
- synaptics,reg-en;
};
};
diff --git a/Documentation/devicetree/bindings/leds/leds-qpnp.txt b/Documentation/devicetree/bindings/leds/leds-qpnp.txt
index 5a668b2..ff95d43 100644
--- a/Documentation/devicetree/bindings/leds/leds-qpnp.txt
+++ b/Documentation/devicetree/bindings/leds/leds-qpnp.txt
@@ -71,6 +71,7 @@
- linux,default-trigger: trigger the led from external modules such as display
- qcom,default-state: default state of the led, should be "on" or "off"
- qcom,turn-off-delay-ms: delay in millisecond for turning off the led when its default-state is "on". Value is being ignored in case default-state is "off".
+- qcom,use-blink: Use blink sysfs entry for switching into lpg mode. For optimal use, set default mode to pwm. All required lpg parameters must be supplied.
MPP LED is an LED controled through a Multi Purpose Pin.
@@ -80,6 +81,7 @@
- qcom,source-sel: select power source, default 1 (enabled)
- qcom,mode-ctrl: select operation mode, default 0x60 = Mode Sink
- qcom,mode: mode the led should operate in, options "pwm", "lpg" and "manual"
+- qcom,use-blink: Use blink sysfs entry for switching into lpg mode. For optimal use, set default mode to pwm. All required lpg parameters must be supplied.
Required properties for PWM mode only:
- qcom,pwm-channel: pwm channel the led will operate on
@@ -161,8 +163,19 @@
label = "rgb";
linux,name = "led:rgb_red";
qcom,mode = "pwm";
- qcom,pwm-channel = <6>;
qcom,pwm-us = <1000>;
+ qcom,pwm-channel = <6>;
+ qcom,max-current = <12>;
+ qcom,default-state = "off";
+ qcom,id = <3>;
+ linux,default-trigger =
+ "battery-charging";
+ };
+ qcom,rgb_lpg {
+ label = "rgb";
+ linux,name = "led:rgb_green";
+ qcom,mode = "lpg";
+ qcom,pwm-channel = <5>;
qcom,duty-ms = <20>;
qcom,start-idx = <1>;
qcom,idx-len = <10>;
@@ -175,10 +188,10 @@
"battery-charging";
};
- qcom,rgb_lpg {
+ qcom,rgb_blink {
label = "rgb";
linux,name = "led:rgb_blue";
- qcom,mode = "lpg";
+ qcom,mode = "pwm";
qcom,pwm-channel = <4>;
qcom,start-idx = <1>;
qcom,idx-len = <10>;
@@ -193,6 +206,8 @@
qcom,turn-off-delay-ms = <500>;
qcom,id = <5>;
linux,default-trigger = "none";
+ qcom,pwm-us = <1000>;
+ qcom,use-blink;
};
};
diff --git a/Documentation/devicetree/bindings/media/video/msm-cci.txt b/Documentation/devicetree/bindings/media/video/msm-cci.txt
index a2503cd..c01193c 100644
--- a/Documentation/devicetree/bindings/media/video/msm-cci.txt
+++ b/Documentation/devicetree/bindings/media/video/msm-cci.txt
@@ -37,8 +37,10 @@
MSM sensor node contains properties of camera sensor
Required properties:
-- compatible : should be "qcom" followed by sensor name
+- compatible : should be manufacturer name followed by sensor name
- "qcom,s5k3l1yx"
+ - "shinetech,gc0339"
+ - "shinetech,hi256"
- reg : should contain i2c slave address of the device
- qcom,slave-id : should contain i2c slave address, device id address
and expected id read value
diff --git a/Documentation/devicetree/bindings/nfc/nfc-nci.txt b/Documentation/devicetree/bindings/nfc/nfc-nci.txt
new file mode 100644
index 0000000..f70d90f
--- /dev/null
+++ b/Documentation/devicetree/bindings/nfc/nfc-nci.txt
@@ -0,0 +1,28 @@
+Qualcomm QCA199x NFC NCI device
+
+Near Field Communication (NFC) device is based on NFC Controller Interface (NCI)
+
+Required properties:
+
+- compatible: "qcom,nfc-nci"
+- reg: NCI i2c slave address.
+- qcom,dis-gpio: specific gpio for hardware reset.
+- qcom,irq-gpio: specific gpio for read interrupt.
+- interrupt-parent: Should be phandle for the interrupt controller
+ that services interrupts for this device.
+- interrupts: should contain the NFC interrupt. NFC has one read interrupt.
+- qcom,clk-gpio: pmic gpio on which bbclk2 signal is coming.
+
+Example:
+
+ i2c@f9925000 { /* BLSP1 QUP3 */
+ nfc-nci@0e {
+ compatible = "qcom,nfc-nci";
+ reg = <0x0e>;
+ qcom,irq-gpio = <&msmgpio 21 0x00>;
+ qcom,dis-gpio = <&msmgpio 20 0x00>;
+ interrupt-parent = <&msmgpio>;
+ interrupts = <21 0>;
+ qcom,clk-gpio = <&pm8226_gpios 3 0>;
+ };
+ };
diff --git a/Documentation/devicetree/bindings/platform/msm/qpnp-power-on.txt b/Documentation/devicetree/bindings/platform/msm/qpnp-power-on.txt
index adb93b8..3095b0a 100644
--- a/Documentation/devicetree/bindings/platform/msm/qpnp-power-on.txt
+++ b/Documentation/devicetree/bindings/platform/msm/qpnp-power-on.txt
@@ -12,11 +12,11 @@
- reg: Specifies the SPMI address and size for this PON (power-on) peripheral
- interrupts: Specifies the interrupt associated with PON.
- interrupt-names: Specify the interrupt names associated with interrupts. Must be
- one of "kpdpwr", "kpdpwr-bark", "resin", "resin-bark", "cblpwr".
- Bark interrupts are associated with system reset configuration
- to allow default reset configuration to be activated. If system
- reset configuration is not supported then bark interrupts are
- nops.
+ one of "kpdpwr", "kpdpwr-bark", "resin", "resin-bark", "cblpwr",
+ "kpdpwr-resin-bark". Bark interrupts are associated with system
+ reset configuration to allow default reset configuration to be
+ activated. If system reset configuration is not supported then
+ bark interrupts are nops.
Optional properties:
- qcom,pon-dbc-delay The debounce delay for the power-key interrupt
@@ -34,6 +34,8 @@
to reset the system. This property can only be
used by one device on the system. It is an error
to include it more than once.
+- qcom,s3-debounce The debounce delay for stage3 reset trigger in
+ secs. The values range from 0 to 128.
All the below properties are in the sub-node section (properties of the child
node).
@@ -82,9 +84,13 @@
reg = <0x800 0x100>;
interrupts = <0x0 0x8 0x0>,
<0x0 0x8 0x1>,
- <0x0 0x8 0x4>;
- interrupt-names = "kpdpwr", "resin", "resin-bark";
+ <0x0 0x8 0x4>,
+ <0x0 0x8 0x5>;
+ interrupt-names = "kpdpwr", "resin",
+ "resin-bark", "kpdpwr-resin-bark";
qcom,pon-dbc-delay = <15625>;
+ qcom,system-reset;
+ qcom,s3-debounce = <32>;
qcom,pon_1 {
qcom,pon-type = <0>;
@@ -96,9 +102,18 @@
qcom,pon-type = <1>;
qcom,support-reset = <1>;
qcom,pull-up = <1>;
- qcom,s1-timer = <3072>;
+ qcom,s1-timer = <0>;
qcom,s2-timer = <2000>;
qcom,s2-type = <1>;
linux,code = <114>;
};
- }
+
+ qcom,pon_3 {
+ qcom,pon-type = <3>;
+ qcom,support-reset = <1>;
+ qcom,s1-timer = <6720>;
+ qcom,s2-timer = <2000>;
+ qcom,s2-type = <7>;
+ qcom,pull-up = <1>;
+ };
+ };
diff --git a/Documentation/devicetree/bindings/power/qpnp-bms.txt b/Documentation/devicetree/bindings/power/qpnp-bms.txt
index b350e24..3cac311 100644
--- a/Documentation/devicetree/bindings/power/qpnp-bms.txt
+++ b/Documentation/devicetree/bindings/power/qpnp-bms.txt
@@ -67,6 +67,16 @@
- qcom,tm-temp-margin: if the pmic die temperature changes by more than this
value, recalibrate the ADCs. The unit of this property
is in millidegrees celsius.
+- qcom,min-fcc-learning-soc: An interger value which defines the minimum SOC
+ to start FCC learning. This is applicable only if
+ FCC learning is enabled.
+- qcom,min-fcc-ocv-pc: An interger value which defines the minimum PC-lookup(OCV)
+ to start FCC learning. This is applicable only if
+ FCC learning is enabled.
+- qcom,min-fcc-learning-samples: An interger value which defines the minimum
+ number of the FCC measurement cycles required to
+ generate an FCC update. This is applicable only
+ if the FCC learning is enabled.
Parent node optional properties:
- qcom,ignore-shutdown-soc: A boolean that controls whether BMS will
@@ -81,6 +91,8 @@
RDS of the batfet.
- qcom,use-ocv-thresholds : A boolean that controls whether BMS will take
new OCVs only between the defined thresholds.
+- qcom,enable-fcc-learning: A boolean that defines if FCC learning is enabled.
+
All sub node required properties:
- reg : offset and length of the PMIC peripheral register map.
diff --git a/Documentation/devicetree/bindings/prng/msm-rng.txt b/Documentation/devicetree/bindings/prng/msm-rng.txt
index 28dfe50..b46f159 100644
--- a/Documentation/devicetree/bindings/prng/msm-rng.txt
+++ b/Documentation/devicetree/bindings/prng/msm-rng.txt
@@ -3,6 +3,11 @@
Required properties:
- compatible : Should be "qcom,msm-rng"
- reg : Offset and length of the register set for the device
+- qcom, msm_bus,name: Should be "msm-rng-noc"
+- qcom, msm_bus,num_cases: Depends on the use cases for bus scaling
+- qcom, msm_bus,num_paths: The paths for source and destination ports
+- qcom, msm_bus,vectors: Vectors for bus topology.
+
Optional property:
- qcom,msm-rng-iface-clk : If the device uses iface-clk.
@@ -13,4 +18,10 @@
compatible = "qcom,msm-rng";
reg = <0xf9bff000 0x200>;
qcom,msm-rng-iface-clk;
+ qcom,msm-bus,name = "msm-rng-noc";
+ qcom,msm-bus,num-cases = <2>;
+ qcom,msm-bus,num-paths = <1>;
+ qcom,msm-bus,vectors-KBps =
+ <1 618 0 0>,
+ <1 618 0 800>;
};
diff --git a/Documentation/devicetree/bindings/regulator/gdsc-regulator.txt b/Documentation/devicetree/bindings/regulator/gdsc-regulator.txt
index d58fa90..37140b7 100644
--- a/Documentation/devicetree/bindings/regulator/gdsc-regulator.txt
+++ b/Documentation/devicetree/bindings/regulator/gdsc-regulator.txt
@@ -12,9 +12,12 @@
Optional properties:
- parent-supply: phandle to the parent supply/regulator node
- qcom,clock-names: List of string names for core clocks
- - qcom,retain-mems: Presence denotes a hardware requirement to leave the
- forced memory retention signals in the core's clock
- branch control register asserted.
+ - qcom,retain-mem: Presence denotes a hardware requirement to leave the
+ forced core memory retention signals in the core's clock
+ branch control registers asserted.
+ - qcom,retain-periph: Presence denotes a hardware requirement to leave the
+ forced periph memory retention signal in the core's clock
+ branch control registers asserted.
- qcom,skip-logic-collapse: Presence denotes a requirement to leave power to
the core's logic enabled.
diff --git a/Documentation/devicetree/bindings/spi/spi_qsd.txt b/Documentation/devicetree/bindings/spi/spi_qsd.txt
index 4b912f3..f16bcbc 100644
--- a/Documentation/devicetree/bindings/spi/spi_qsd.txt
+++ b/Documentation/devicetree/bindings/spi/spi_qsd.txt
@@ -23,6 +23,12 @@
- qcom,infinite-mode: When missing or set to zero, QUP uses infinite-mode. When
value is non-zero, the value is the number of words in maximum transfer
length.
+ - qcom,active-only : Vote for core clock when the application processor goes
+ to active state and remove that vote when it goes to idle state. This flag may
+ improve service time of first spi request at the expense of power consumption.
+ When this entry is not present, voting is done by the runtime-pm callbacks.
+ - qcom,master-id : Master endpoint number used for voting on clocks using the
+ bus-scaling driver.
Optional properties which are required for support of BAM-mode:
- qcom,ver-reg-exists : Boolean. When present, allows driver to verify if HW
@@ -81,4 +87,5 @@
qcom,bam-consumer-pipe-index = <12>;
qcom,bam-producer-pipe-index = <13>;
qcom,ver-reg-exists;
+ qcom,master-id = <86>;
};
diff --git a/Documentation/devicetree/bindings/usb/msm-ehci-hsic.txt b/Documentation/devicetree/bindings/usb/msm-ehci-hsic.txt
index a3a9935..70bf993 100644
--- a/Documentation/devicetree/bindings/usb/msm-ehci-hsic.txt
+++ b/Documentation/devicetree/bindings/usb/msm-ehci-hsic.txt
@@ -49,6 +49,21 @@
depend on suitable handshake with the IPA peer.
- qcom,ahb-async-bridge-bypass: if present AHB ASYNC bridge will be bypassed such that
the bridge on the slave AHB is always used.
+- hsic,log2-itc: itc (interrupt threshold control) defines rate at which usb
+ controller will issue interrupts. It represents max interrupt interval
+ measured in micro frames. In high speed USB, each micro frame is 125us.
+ Valid values are from zero to six. Zero is default. Higher ITC value will
+ result in higher interrupt latency and can impact overall data latency.
+
+ log2-itc - Max interrupt threshold
+ -------- -----------------------
+ 0 (2^0 = 1) 1 micro frame interrupt threshold aka 125us interrupt threshold
+ 1 (2^1 = 2) 2 micro frame interrupt threshold aka 250us interrupt threshold
+ 2 (2^2 = 4) 4 micro frame interrupt threshold aka 500us interrupt threshold
+ 3 (2^3 = 8) 8 micro frame interrupt threshold aka 1ms interrupt threshold
+ 4 (2^4 = 16) 16 micro frame interrupt threshold aka 2ms interrupt threshold
+ 5 (2^5 = 32) 32 micro frame interrupt threshold aka 4ms interrupt threshold
+ 6 (2^6 = 64) 64 micro frame interrupt threshold aka 8ms interrupt threshold
- Refer to "Documentation/devicetree/bindings/arm/msm/msm_bus.txt" for
below optional properties:
diff --git a/Documentation/devicetree/bindings/usb/msm-hsusb.txt b/Documentation/devicetree/bindings/usb/msm-hsusb.txt
index fbe2d25..ac314ea 100644
--- a/Documentation/devicetree/bindings/usb/msm-hsusb.txt
+++ b/Documentation/devicetree/bindings/usb/msm-hsusb.txt
@@ -50,7 +50,10 @@
- Refer to "Documentation/devicetree/bindings/arm/msm/msm_bus.txt" for
below optional properties:
- qcom,msm_bus,name
- - qcom,msm_bus,num_cases
+ - qcom,msm_bus,num_cases - There are three valid cases for this: NONE, MAX
+ and MIN bandwidth votes. Minimum two cases must be defined for
+ both NONE and MAX votes. If MIN vote is different from NONE VOTE
+ then specify third case for MIN VOTE.
- qcom,msm_bus,active_only
- qcom,msm_bus,num_paths
- qcom,msm_bus,vectors
@@ -74,6 +77,10 @@
starting controller using usbcmd run/stop bit.
- qcom,usb2-enable-hsphy2: If present then USB2 controller is connected to 2nd
HSPHY.
+- qcom,hsusb-log2-itc: value of 2^(log2_itc-1) will be used as the
+ interrupt threshold (ITC), when log2_itc is between 1 to 7.
+- qcom,hsusb-l1-supported: If present, the device supports l1 (Link power
+ management).
Example HSUSB OTG controller device node :
usb@f9690000 {
diff --git a/Documentation/devicetree/bindings/vendor-prefixes.txt b/Documentation/devicetree/bindings/vendor-prefixes.txt
index 8d41295..0ebbe63 100644
--- a/Documentation/devicetree/bindings/vendor-prefixes.txt
+++ b/Documentation/devicetree/bindings/vendor-prefixes.txt
@@ -24,6 +24,7 @@
idt Integrated Device Technologies, Inc.
intercontrol Inter Control Group
linux Linux-specific binding
+kionix Kionix Inc.
marvell Marvell Technology Group Ltd.
maxim Maxim Integrated Products
mosaixtech Mosaix Technologies, Inc.
@@ -39,6 +40,7 @@
samsung Samsung Semiconductor
sbs Smart Battery System
schindler Schindler
+shinetech Shine Tech Corporation, Ltd.
sil Silicon Image
simtek
sirf SiRF Technology, Inc.
diff --git a/Documentation/driver-model/devres.txt b/Documentation/driver-model/devres.txt
index 2a596a4..ef4fa7b 100644
--- a/Documentation/driver-model/devres.txt
+++ b/Documentation/driver-model/devres.txt
@@ -276,3 +276,7 @@
devm_regulator_get()
devm_regulator_put()
devm_regulator_bulk_get()
+
+PINCTRL
+ devm_pinctrl_get()
+ devm_pinctrl_put()
diff --git a/Documentation/gpio.txt b/Documentation/gpio.txt
index 620a078..1d5b334 100644
--- a/Documentation/gpio.txt
+++ b/Documentation/gpio.txt
@@ -436,6 +436,48 @@
signaling rate accordingly.
+GPIO controllers and the pinctrl subsystem
+------------------------------------------
+
+A GPIO controller on a SOC might be tightly coupled with the pinctrl
+subsystem, in the sense that the pins can be used by other functions
+together with an optional gpio feature. We have already covered the
+case where e.g. a GPIO controller need to reserve a pin or set the
+direction of a pin by calling any of:
+
+pinctrl_request_gpio()
+pinctrl_free_gpio()
+pinctrl_gpio_direction_input()
+pinctrl_gpio_direction_output()
+
+But how does the pin control subsystem cross-correlate the GPIO
+numbers (which are a global business) to a certain pin on a certain
+pin controller?
+
+This is done by registering "ranges" of pins, which are essentially
+cross-reference tables. These are described in
+Documentation/pinctrl.txt
+
+While the pin allocation is totally managed by the pinctrl subsystem,
+gpio (under gpiolib) is still maintained by gpio drivers. It may happen
+that different pin ranges in a SoC is managed by different gpio drivers.
+
+This makes it logical to let gpio drivers announce their pin ranges to
+the pin ctrl subsystem before it will call 'pinctrl_request_gpio' in order
+to request the corresponding pin to be prepared by the pinctrl subsystem
+before any gpio usage.
+
+For this, the gpio controller can register its pin range with pinctrl
+subsystem. There are two ways of doing it currently: with or without DT.
+
+For with DT support refer to Documentation/devicetree/bindings/gpio/gpio.txt.
+
+For non-DT support, user can call gpiochip_add_pin_range() with appropriate
+parameters to register a range of gpio pins with a pinctrl driver. For this
+exact name string of pinctrl device has to be passed as one of the
+argument to this routine.
+
+
What do these conventions omit?
===============================
One of the biggest things these conventions omit is pin multiplexing, since
diff --git a/Documentation/pinctrl.txt b/Documentation/pinctrl.txt
index d97bccf..e454a6a 100644
--- a/Documentation/pinctrl.txt
+++ b/Documentation/pinctrl.txt
@@ -152,11 +152,9 @@
};
-static int foo_list_groups(struct pinctrl_dev *pctldev, unsigned selector)
+static int foo_get_groups_count(struct pinctrl_dev *pctldev)
{
- if (selector >= ARRAY_SIZE(foo_groups))
- return -EINVAL;
- return 0;
+ return ARRAY_SIZE(foo_groups);
}
static const char *foo_get_group_name(struct pinctrl_dev *pctldev,
@@ -175,7 +173,7 @@
}
static struct pinctrl_ops foo_pctrl_ops = {
- .list_groups = foo_list_groups,
+ .get_groups_count = foo_get_groups_count,
.get_group_name = foo_get_group_name,
.get_group_pins = foo_get_group_pins,
};
@@ -186,13 +184,12 @@
.pctlops = &foo_pctrl_ops,
};
-The pin control subsystem will call the .list_groups() function repeatedly
-beginning on 0 until it returns non-zero to determine legal selectors, then
-it will call the other functions to retrieve the name and pins of the group.
-Maintaining the data structure of the groups is up to the driver, this is
-just a simple example - in practice you may need more entries in your group
-structure, for example specific register ranges associated with each group
-and so on.
+The pin control subsystem will call the .get_groups_count() function to
+determine total number of legal selectors, then it will call the other functions
+to retrieve the name and pins of the group. Maintaining the data structure of
+the groups is up to the driver, this is just a simple example - in practice you
+may need more entries in your group structure, for example specific register
+ranges associated with each group and so on.
Pin configuration
@@ -362,6 +359,10 @@
the range ID value, so that the pin controller knows which range it should
deal with.
+Calling pinctrl_add_gpio_range from pinctrl driver is DEPRECATED. Please see
+section 2.1 of Documentation/devicetree/bindings/gpio/gpio.txt on how to bind
+pinctrl and gpio drivers.
+
PINMUX interfaces
=================
@@ -606,11 +607,9 @@
};
-static int foo_list_groups(struct pinctrl_dev *pctldev, unsigned selector)
+static int foo_get_groups_count(struct pinctrl_dev *pctldev)
{
- if (selector >= ARRAY_SIZE(foo_groups))
- return -EINVAL;
- return 0;
+ return ARRAY_SIZE(foo_groups);
}
static const char *foo_get_group_name(struct pinctrl_dev *pctldev,
@@ -629,7 +628,7 @@
}
static struct pinctrl_ops foo_pctrl_ops = {
- .list_groups = foo_list_groups,
+ .get_groups_count = foo_get_groups_count,
.get_group_name = foo_get_group_name,
.get_group_pins = foo_get_group_pins,
};
@@ -663,11 +662,9 @@
},
};
-int foo_list_funcs(struct pinctrl_dev *pctldev, unsigned selector)
+int foo_get_functions_count(struct pinctrl_dev *pctldev)
{
- if (selector >= ARRAY_SIZE(foo_functions))
- return -EINVAL;
- return 0;
+ return ARRAY_SIZE(foo_functions);
}
const char *foo_get_fname(struct pinctrl_dev *pctldev, unsigned selector)
@@ -703,7 +700,7 @@
}
struct pinmux_ops foo_pmxops = {
- .list_functions = foo_list_funcs,
+ .get_functions_count = foo_get_functions_count,
.get_function_name = foo_get_fname,
.get_function_groups = foo_get_groups,
.enable = foo_enable,
@@ -952,13 +949,13 @@
The result of grabbing this mapping from the device with something like
this (see next paragraph):
- p = pinctrl_get(dev);
+ p = devm_pinctrl_get(dev);
s = pinctrl_lookup_state(p, "8bit");
ret = pinctrl_select_state(p, s);
or more simply:
- p = pinctrl_get_select(dev, "8bit");
+ p = devm_pinctrl_get_select(dev, "8bit");
Will be that you activate all the three bottom records in the mapping at
once. Since they share the same name, pin controller device, function and
@@ -970,6 +967,18 @@
Pinmux requests from drivers
============================
+When a device driver is about to probe the device core will automatically
+attempt to issue pinctrl_get_select_default() on these devices.
+This way driver writers do not need to add any of the boilerplate code
+of the type found below. However when doing fine-grained state selection
+and not using the "default" state, you may have to do some device driver
+handling of the pinctrl handles and states.
+
+So if you just want to put the pins for a certain device into the default
+state and be done with it, there is nothing you need to do besides
+providing the proper mapping table. The device core will take care of
+the rest.
+
Generally it is discouraged to let individual drivers get and enable pin
control. So if possible, handle the pin control in platform code or some other
place where you have access to all the affected struct device * pointers. In
@@ -992,7 +1001,7 @@
/* Allocate a state holder named "foo" etc */
struct foo_state *foo = ...;
- foo->p = pinctrl_get(&device);
+ foo->p = devm_pinctrl_get(&device);
if (IS_ERR(foo->p)) {
/* FIXME: clean up "foo" here */
return PTR_ERR(foo->p);
@@ -1000,24 +1009,17 @@
foo->s = pinctrl_lookup_state(foo->p, PINCTRL_STATE_DEFAULT);
if (IS_ERR(foo->s)) {
- pinctrl_put(foo->p);
/* FIXME: clean up "foo" here */
return PTR_ERR(s);
}
ret = pinctrl_select_state(foo->s);
if (ret < 0) {
- pinctrl_put(foo->p);
/* FIXME: clean up "foo" here */
return ret;
}
}
-foo_remove()
-{
- pinctrl_put(state->p);
-}
-
This get/lookup/select/put sequence can just as well be handled by bus drivers
if you don't want each and every driver to handle it and you know the
arrangement on your bus.
@@ -1029,6 +1031,11 @@
kernel memory to hold the pinmux state. All mapping table parsing or similar
slow operations take place within this API.
+- devm_pinctrl_get() is a variant of pinctrl_get() that causes pinctrl_put()
+ to be called automatically on the retrieved pointer when the associated
+ device is removed. It is recommended to use this function over plain
+ pinctrl_get().
+
- pinctrl_lookup_state() is called in process context to obtain a handle to a
specific state for a the client device. This operation may be slow too.
@@ -1041,14 +1048,75 @@
- pinctrl_put() frees all information associated with a pinctrl handle.
+- devm_pinctrl_put() is a variant of pinctrl_put() that may be used to
+ explicitly destroy a pinctrl object returned by devm_pinctrl_get().
+ However, use of this function will be rare, due to the automatic cleanup
+ that will occur even without calling it.
+
+ pinctrl_get() must be paired with a plain pinctrl_put().
+ pinctrl_get() may not be paired with devm_pinctrl_put().
+ devm_pinctrl_get() can optionally be paired with devm_pinctrl_put().
+ devm_pinctrl_get() may not be paired with plain pinctrl_put().
+
Usually the pin control core handled the get/put pair and call out to the
device drivers bookkeeping operations, like checking available functions and
the associated pins, whereas the enable/disable pass on to the pin controller
driver which takes care of activating and/or deactivating the mux setting by
quickly poking some registers.
-The pins are allocated for your device when you issue the pinctrl_get() call,
-after this you should be able to see this in the debugfs listing of all pins.
+The pins are allocated for your device when you issue the devm_pinctrl_get()
+call, after this you should be able to see this in the debugfs listing of all
+pins.
+
+NOTE: the pinctrl system will return -EPROBE_DEFER if it cannot find the
+requested pinctrl handles, for example if the pinctrl driver has not yet
+registered. Thus make sure that the error path in your driver gracefully
+cleans up and is ready to retry the probing later in the startup process.
+
+
+Drivers needing both pin control and GPIOs
+==========================================
+
+Again, it is discouraged to let drivers lookup and select pin control states
+themselves, but again sometimes this is unavoidable.
+
+So say that your driver is fetching its resources like this:
+
+#include <linux/pinctrl/consumer.h>
+#include <linux/gpio.h>
+
+struct pinctrl *pinctrl;
+int gpio;
+
+pinctrl = devm_pinctrl_get_select_default(&dev);
+gpio = devm_gpio_request(&dev, 14, "foo");
+
+Here we first request a certain pin state and then request GPIO 14 to be
+used. If you're using the subsystems orthogonally like this, you should
+nominally always get your pinctrl handle and select the desired pinctrl
+state BEFORE requesting the GPIO. This is a semantic convention to avoid
+situations that can be electrically unpleasant, you will certainly want to
+mux in and bias pins in a certain way before the GPIO subsystems starts to
+deal with them.
+
+The above can be hidden: using the device core, the pinctrl core may be
+setting up the config and muxing for the pins right before the device is
+probing, nevertheless orthogonal to the GPIO subsystem.
+
+But there are also situations where it makes sense for the GPIO subsystem
+to communicate directly with with the pinctrl subsystem, using the latter
+as a back-end. This is when the GPIO driver may call out to the functions
+described in the section "Pin control interaction with the GPIO subsystem"
+above. This only involves per-pin multiplexing, and will be completely
+hidden behind the gpio_*() function namespace. In this case, the driver
+need not interact with the pin control subsystem at all.
+
+If a pin control driver and a GPIO driver is dealing with the same pins
+and the use cases involve multiplexing, you MUST implement the pin controller
+as a back-end for the GPIO driver like this, unless your hardware design
+is such that the GPIO controller can override the pin controller's
+multiplexing state through hardware without the need to interact with the
+pin control system.
System pin control hogging
@@ -1094,13 +1162,13 @@
#include <linux/pinctrl/consumer.h>
-foo_switch()
-{
- struct pinctrl *p;
- struct pinctrl_state *s1, *s2;
+struct pinctrl *p;
+struct pinctrl_state *s1, *s2;
+foo_probe()
+{
/* Setup */
- p = pinctrl_get(&device);
+ p = devm_pinctrl_get(&device);
if (IS_ERR(p))
...
@@ -1111,7 +1179,10 @@
s2 = pinctrl_lookup_state(foo->p, "pos-B");
if (IS_ERR(s2))
...
+}
+foo_switch()
+{
/* Enable on position A */
ret = pinctrl_select_state(s1);
if (ret < 0)
@@ -1125,8 +1196,8 @@
...
...
-
- pinctrl_put(p);
}
-The above has to be done from process context.
+The above has to be done from process context. The reservation of the pins
+will be done when the state is activated, so in effect one specific pin
+can be used by different functions at different times on a running system.
diff --git a/arch/arm/Kconfig.debug b/arch/arm/Kconfig.debug
index 3a9b770..344b57e 100644
--- a/arch/arm/Kconfig.debug
+++ b/arch/arm/Kconfig.debug
@@ -304,4 +304,15 @@
additional instructions during context switch. Say Y here only if you
are planning to use hardware trace tools with this kernel.
+config DEBUG_SET_MODULE_RONX
+ bool "Set loadable kernel module data as NX and text as RO"
+ depends on MODULES
+ ---help---
+ This option helps catch unintended modifications to loadable
+ kernel module's text and read-only data. It also prevents execution
+ of module data. Such protection may interfere with run-time code
+ patching and dynamic kernel tracing - and they might also protect
+ against certain classes of kernel exploits.
+ If in doubt, say "N".
+
endmenu
diff --git a/arch/arm/boot/dts/apq8026-mtp.dts b/arch/arm/boot/dts/apq8026-mtp.dts
new file mode 100644
index 0000000..e14a6856
--- /dev/null
+++ b/arch/arm/boot/dts/apq8026-mtp.dts
@@ -0,0 +1,22 @@
+/* Copyright (c) 2013, The Linux Foundation. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 and
+ * only version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+
+/dts-v1/;
+/include/ "apq8026.dtsi"
+/include/ "msm8226-mtp.dtsi"
+
+/ {
+ model = "Qualcomm APQ 8026 MTP";
+ compatible = "qcom,apq8026-mtp", "qcom,apq8026", "qcom,mtp";
+ qcom,msm-id = <199 8 0>;
+};
diff --git a/arch/arm/boot/dts/apq8026-xpm.dts b/arch/arm/boot/dts/apq8026-xpm.dts
new file mode 100644
index 0000000..67152af
--- /dev/null
+++ b/arch/arm/boot/dts/apq8026-xpm.dts
@@ -0,0 +1,22 @@
+/* Copyright (c) 2013, The Linux Foundation. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 and
+ * only version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+
+/dts-v1/;
+/include/ "apq8026.dtsi"
+/include/ "msm8226-cdp.dtsi"
+
+/ {
+ model = "Qualcomm APQ 8026 XPM";
+ compatible = "qcom,apq8026-xpm", "qcom,apq8026", "qcom,xpm";
+ qcom,msm-id = <199 14 0>;
+};
diff --git a/arch/arm/boot/dts/apq8026.dtsi b/arch/arm/boot/dts/apq8026.dtsi
new file mode 100644
index 0000000..db6576a
--- /dev/null
+++ b/arch/arm/boot/dts/apq8026.dtsi
@@ -0,0 +1,24 @@
+/* Copyright (c) 2013, The Linux Foundation. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 and
+ * only version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+/*
+ * Only 8026-specific property overrides should be placed inside this
+ * file. Device definitions should be placed inside the msm8226.dtsi
+ * file.
+ */
+
+/include/ "msm8226.dtsi"
+
+/ {
+ model = "Qualcomm APQ 8026";
+ compatible = "qcom,apq8026";
+};
diff --git a/arch/arm/boot/dts/apq8074-dragonboard.dtsi b/arch/arm/boot/dts/apq8074-dragonboard.dtsi
index 6b4d1d3..4b20e9f 100644
--- a/arch/arm/boot/dts/apq8074-dragonboard.dtsi
+++ b/arch/arm/boot/dts/apq8074-dragonboard.dtsi
@@ -21,6 +21,7 @@
qcom,mdss_dsi_sharp_qhd_video {
status = "ok";
+ qcom,cont-splash-enabled;
};
qcom,hdmi_tx@fd922100 {
@@ -637,6 +638,9 @@
interrupt-names = "hc_irq", "pwr_irq", "status_irq";
cd-gpios = <&msmgpio 62 0x1>;
+ qcom,vdd-always-on;
+ qcom,vdd-lpm-sup;
+
vdd-supply = <&pm8941_l21>;
vdd-io-supply = <&pm8941_l13>;
diff --git a/arch/arm/boot/dts/apq8074-v2.dtsi b/arch/arm/boot/dts/apq8074-v2.dtsi
index 76eb14b..c700a5c 100644
--- a/arch/arm/boot/dts/apq8074-v2.dtsi
+++ b/arch/arm/boot/dts/apq8074-v2.dtsi
@@ -50,3 +50,8 @@
status = "disabled";
};
+&sdcc3 {
+ qcom,sup-voltages = <2000 2000>;
+ status = "ok";
+};
+
diff --git a/arch/arm/boot/dts/apq8084.dtsi b/arch/arm/boot/dts/apq8084.dtsi
index c74e59d..e5f083a 100644
--- a/arch/arm/boot/dts/apq8084.dtsi
+++ b/arch/arm/boot/dts/apq8084.dtsi
@@ -117,6 +117,14 @@
status = "disabled";
};
+ qcom,sps@f9980000 {
+ compatible = "qcom,msm_sps";
+ reg = <0xf9984000 0x15000>,
+ <0xf9999000 0xb000>;
+ interrupts = <0 94 0>;
+ qcom,pipe-attr-ee;
+ };
+
spmi_bus: qcom,spmi@fc4c0000 {
cell-index = <0>;
compatible = "qcom,spmi-pmic-arb";
@@ -136,6 +144,21 @@
#interrupt-cells = <3>;
};
+ i2c_0: i2c@f9925000 { /* BLSP1 QUP3 */
+ cell-index = <0>;
+ compatible = "qcom,i2c-qup";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg-names = "qup_phys_addr";
+ reg = <0xf9925000 0x1000>;
+ interrupt-names = "qup_err_intr";
+ interrupts = <0 97 0>;
+ qcom,i2c-bus-freq = <100000>;
+ qcom,i2c-src-freq = <50000000>;
+ qcom,sda-gpio = <&msmgpio 10 0>;
+ qcom,scl-gpio = <&msmgpio 11 0>;
+ };
+
usb3: qcom,ssusb@f9200000 {
compatible = "qcom,dwc-usb3-msm";
reg = <0xf9200000 0xfc000>,
@@ -167,6 +190,18 @@
compatible = "qcom,android-usb";
};
+ tsens: tsens@fc4a8000 {
+ compatible = "qcom,msm-tsens";
+ reg = <0xfc4a8000 0x2000>,
+ <0xfc4b8000 0x1000>;
+ reg-names = "tsens_physical", "tsens_eeprom_physical";
+ interrupts = <0 184 0>;
+ qcom,sensors = <11>;
+ qcom,slope = <3200 3200 3200 3200 3200 3200 3200 3200 3200
+ 3200 3200>;
+ qcom,calib-mode = "fuse_map1";
+ };
+
qcom,ocmem@fdd00000 {
compatible = "qcom,msm-ocmem";
reg = <0xfdd00000 0x2000>,
@@ -251,3 +286,67 @@
/include/ "msm-pma8084.dtsi"
/include/ "apq8084-regulator.dtsi"
+
+&pma8084_vadc {
+ chan@b0 {
+ label = "apq_therm";
+ reg = <0xb0>;
+ qcom,decimation = <0>;
+ qcom,pre-div-channel-scaling = <0>;
+ qcom,calibration-type = "ratiometric";
+ qcom,scale-function = <2>;
+ qcom,hw-settle-time = <2>;
+ qcom,fast-avg-setup = <0>;
+ };
+
+ chan@b3 {
+ label = "quiet_therm";
+ reg = <0xb3>;
+ qcom,decimation = <0>;
+ qcom,pre-div-channel-scaling = <0>;
+ qcom,calibration-type = "ratiometric";
+ qcom,scale-function = <2>;
+ qcom,hw-settle-time = <2>;
+ qcom,fast-avg-setup = <0>;
+ };
+};
+
+&pma8084_adc_tm {
+ chan@8 {
+ label = "die_temp";
+ reg = <8>;
+ qcom,decimation = <0>;
+ qcom,pre-div-channel-scaling = <0>;
+ qcom,calibration-type = "absolute";
+ qcom,scale-function = <3>;
+ qcom,hw-settle-time = <0>;
+ qcom,fast-avg-setup = <3>;
+ qcom,btm-channel-number = <0x48>;
+ };
+
+ chan@b0 {
+ label = "apq_therm";
+ reg = <0xb0>;
+ qcom,decimation = <0>;
+ qcom,pre-div-channel-scaling = <0>;
+ qcom,calibration-type = "ratiometric";
+ qcom,scale-function = <2>;
+ qcom,hw-settle-time = <2>;
+ qcom,fast-avg-setup = <3>;
+ qcom,btm-channel-number = <0x68>;
+ qcom,thermal-node;
+ };
+
+ chan@b3 {
+ label = "quiet_therm";
+ reg = <0xb3>;
+ qcom,decimation = <0>;
+ qcom,pre-div-channel-scaling = <0>;
+ qcom,calibration-type = "ratiometric";
+ qcom,scale-function = <2>;
+ qcom,hw-settle-time = <2>;
+ qcom,fast-avg-setup = <3>;
+ qcom,btm-channel-number = <0x70>;
+ qcom,thermal-node;
+ };
+};
diff --git a/arch/arm/boot/dts/dsi-panel-hx8394a-720p-video.dtsi b/arch/arm/boot/dts/dsi-panel-hx8394a-720p-video.dtsi
new file mode 100644
index 0000000..25c1851
--- /dev/null
+++ b/arch/arm/boot/dts/dsi-panel-hx8394a-720p-video.dtsi
@@ -0,0 +1,107 @@
+/* Copyright (c) 2013, The Linux Foundation. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 and
+ * only version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+&soc {
+ qcom,mdss_dsi_hx8394a_720p_video {
+ compatible = "qcom,mdss-dsi-panel";
+ label = "hx8394a 720p video mode dsi panel";
+ status = "disable";
+ qcom,dsi-ctrl-phandle = <&mdss_dsi0>;
+ qcom,rst-gpio = <&msmgpio 25 0>;
+ qcom,mdss-pan-res = <720 1280>;
+ qcom,mdss-pan-bpp = <24>;
+ qcom,mdss-pan-dest = "display_1";
+ qcom,mdss-pan-porch-values = <59 60 79 10 2 7>;
+ qcom,mdss-pan-underflow-clr = <0xff>;
+ qcom,mdss-pan-bl-ctrl = "bl_ctrl_wled";
+ qcom,mdss-pan-bl-levels = <1 4095>;
+ qcom,mdss-pan-dsi-mode = <0>;
+ qcom,mdss-pan-dsi-h-pulse-mode = <1>;
+ qcom,mdss-pan-dsi-h-power-stop = <0 0 0>;
+ qcom,mdss-pan-dsi-bllp-power-stop = <1 1>;
+ qcom,mdss-pan-dsi-traffic-mode = <2>;
+ qcom,mdss-pan-dsi-dst-format = <3>;
+ qcom,mdss-pan-dsi-vc = <0>;
+ qcom,mdss-pan-dsi-rgb-swap = <0>;
+ qcom,mdss-pan-dsi-data-lanes = <1 1 1 1>; /* 4 lanes */
+ qcom,mdss-pan-dsi-dlane-swap = <0>;
+ qcom,mdss-pan-dsi-t-clk = <0x2d 0x1f>;
+ qcom,mdss-pan-dsi-stream = <0>;
+ qcom,mdss-pan-dsi-mdp-tr = <0x0>;
+ qcom,mdss-pan-dsi-dma-tr = <0x04>;
+ qcom,mdss-pan-dsi-frame-rate = <60>;
+ qcom,panel-phy-regulatorSettings = [07 09 03 00 /* Regualotor settings */
+ 20 00 01];
+ qcom,panel-phy-timingSettings = [8d 24 19 00 34 34
+ 1d 26 2a 03 04 00];
+ qcom,panel-phy-strengthCtrl = [ff 06];
+ qcom,panel-phy-bistCtrl = [00 00 b1 ff /* BIST Ctrl settings */
+ 00 00];
+ qcom,panel-phy-laneConfig = [00 00 00 00 00 00 00 01 97 /* lane0 config */
+ 00 00 00 00 05 00 00 01 97 /* lane1 config */
+ 00 00 00 00 0a 00 00 01 97 /* lane2 config */
+ 00 00 00 00 0f 00 00 01 97 /* lane3 config */
+ 00 c0 00 00 00 00 00 01 bb]; /* Clk ln config */
+ qcom,panel-on-cmds = [39 01 00 00 00 00 04
+ b9 ff 83 94
+ 39 01 00 00 00 00 05
+ c7 00 10 00 10
+ 39 01 00 00 00 00 02
+ bc 07
+ 39 01 00 00 00 00 02
+ ba 13
+ 39 01 00 00 00 00 10
+ b1 01 00 07 83 01
+ 12 0f 32 38 29 29
+ 50 02 00 00
+ 39 01 00 00 00 00 07
+ b2 00 c8 09 05 00
+ 71
+ 39 01 00 00 00 00 02
+ cc 05
+ 05 01 00 00 00 00 02 00 00
+ 39 01 00 00 00 00 35
+ d5 00 00 00 00 0a
+ 00 01 00 00 00 33
+ 00 23 45 67 01 01
+ 23 88 88 88 88 88
+ 88 88 99 99 99 88
+ 88 99 88 54 32 10
+ 76 32 10 88 88 88
+ 88 88 88 88 99 99
+ 99 88 88 88 99
+ 39 01 00 00 00 00 17
+ b4 80 08 32 10 00
+ 32 15 08 32 12 20
+ 33 05 4c 05 37 05
+ 3f 1e 5f 5f 06
+ 39 01 00 00 00 00 02
+ b6 00
+ 39 01 00 00 00 00 23
+ e0 01 05 07 25 35
+ 3f 0b 32 04 09 0e
+ 10 13 10 14 16 1b
+ 01 05 07 25 35 3f
+ 0b 32 04 09 0e 10
+ 13 10 14 16 1b
+ 05 01 00 00 00 00 02 00 00
+ 39 01 00 00 00 00 04
+ bf 06 00 10
+ 05 01 00 00 c8 00 02 11 00
+ 05 01 00 00 32 00 02 29 00];
+
+ qcom,on-cmds-dsi-state = "DSI_LP_MODE";
+ qcom,panel-off-cmds = [05 01 00 00 0a 00 02 28 00
+ 05 01 00 00 96 00 02 10 00];
+ qcom,off-cmds-dsi-state = "DSI_HS_MODE";
+ };
+};
diff --git a/arch/arm/boot/dts/dsi-panel-nt35590-720p-cmd.dtsi b/arch/arm/boot/dts/dsi-panel-nt35590-720p-cmd.dtsi
index 7942567..2a6bbf9 100644
--- a/arch/arm/boot/dts/dsi-panel-nt35590-720p-cmd.dtsi
+++ b/arch/arm/boot/dts/dsi-panel-nt35590-720p-cmd.dtsi
@@ -10,7 +10,7 @@
* GNU General Public License for more details.
*/
-/ {
+&soc {
qcom,mdss_dsi_nt35590_720p_cmd {
compatible = "qcom,mdss-dsi-panel";
label = "nt35590 720p command mode dsi panel";
@@ -58,473 +58,474 @@
00 00 00 00 0a 00 00 01 97 /* lane2 config */
00 00 00 00 0f 00 00 01 97 /* lane3 config */
00 c0 00 00 00 00 00 01 bb]; /* Clk ln config */
- qcom,panel-on-cmds = [29 01 00 00 00 02 FF EE
- 29 01 00 00 00 02 26 08
- 29 01 00 00 00 02 26 00
- 29 01 00 00 10 02 FF 00
- 29 01 00 00 00 02 BA 03
- 29 01 00 00 00 02 C2 08
- 29 01 00 00 00 02 FF 01
- 29 01 00 00 00 02 FB 01
- 29 01 00 00 00 02 00 4A
- 29 01 00 00 00 02 01 33
- 29 01 00 00 00 02 02 53
- 29 01 00 00 00 02 03 55
- 29 01 00 00 00 02 04 55
- 29 01 00 00 00 02 05 33
- 29 01 00 00 00 02 06 22
- 29 01 00 00 00 02 08 56
- 29 01 00 00 00 02 09 8F
- 29 01 00 00 00 02 36 73
- 29 01 00 00 00 02 0B 9F
- 29 01 00 00 00 02 0C 9F
- 29 01 00 00 00 02 0D 2F
- 29 01 00 00 00 02 0E 24
- 29 01 00 00 00 02 11 83
- 29 01 00 00 00 02 12 03
- 29 01 00 00 00 02 71 2C
- 29 01 00 00 00 02 6F 03
- 29 01 00 00 00 02 0F 0A
- 29 01 00 00 00 02 FF 05
- 29 01 00 00 00 02 FB 01
- 29 01 00 00 00 02 01 00
- 29 01 00 00 00 02 02 8B
- 29 01 00 00 00 02 03 82
- 29 01 00 00 00 02 04 82
- 29 01 00 00 00 02 05 30
- 29 01 00 00 00 02 06 33
- 29 01 00 00 00 02 07 01
- 29 01 00 00 00 02 08 00
- 29 01 00 00 00 02 09 46
- 29 01 00 00 00 02 0A 46
- 29 01 00 00 00 02 0D 0B
- 29 01 00 00 00 02 0E 1D
- 29 01 00 00 00 02 0F 08
- 29 01 00 00 00 02 10 53
- 29 01 00 00 00 02 11 00
- 29 01 00 00 00 02 12 00
- 29 01 00 00 00 02 14 01
- 29 01 00 00 00 02 15 00
- 29 01 00 00 00 02 16 05
- 29 01 00 00 00 02 17 00
- 29 01 00 00 00 02 19 7F
- 29 01 00 00 00 02 1A FF
- 29 01 00 00 00 02 1B 0F
- 29 01 00 00 00 02 1C 00
- 29 01 00 00 00 02 1D 00
- 29 01 00 00 00 02 1E 00
- 29 01 00 00 00 02 1F 07
- 29 01 00 00 00 02 20 00
- 29 01 00 00 00 02 21 06
- 29 01 00 00 00 02 22 55
- 29 01 00 00 00 02 23 4D
- 29 01 00 00 00 02 2D 02
- 29 01 00 00 00 02 28 01
- 29 01 00 00 00 02 2F 02
- 29 01 00 00 00 02 83 01
- 29 01 00 00 00 02 9E 58
- 29 01 00 00 00 02 9F 6A
- 29 01 00 00 00 02 A0 01
- 29 01 00 00 00 02 A2 10
- 29 01 00 00 00 02 BB 0A
- 29 01 00 00 00 02 BC 0A
- 29 01 00 00 00 02 32 08
- 29 01 00 00 00 02 33 B8
- 29 01 00 00 00 02 36 01
- 29 01 00 00 00 02 37 00
- 29 01 00 00 00 02 43 00
- 29 01 00 00 00 02 4B 21
- 29 01 00 00 00 02 4C 03
- 29 01 00 00 00 02 50 21
- 29 01 00 00 00 02 51 03
- 29 01 00 00 00 02 58 21
- 29 01 00 00 00 02 59 03
- 29 01 00 00 00 02 5D 21
- 29 01 00 00 00 02 5E 03
- 29 01 00 00 00 02 6C 00
- 29 01 00 00 00 02 6D 00
- 29 01 00 00 00 02 FB 01
- 29 01 00 00 00 02 FF 01
- 29 01 00 00 00 02 FB 01
- 29 01 00 00 00 02 75 00
- 29 01 00 00 00 02 76 7D
- 29 01 00 00 00 02 77 00
- 29 01 00 00 00 02 78 8A
- 29 01 00 00 00 02 79 00
- 29 01 00 00 00 02 7A 9C
- 29 01 00 00 00 02 7B 00
- 29 01 00 00 00 02 7C B1
- 29 01 00 00 00 02 7D 00
- 29 01 00 00 00 02 7E BF
- 29 01 00 00 00 02 7F 00
- 29 01 00 00 00 02 80 CF
- 29 01 00 00 00 02 81 00
- 29 01 00 00 00 02 82 DD
- 29 01 00 00 00 02 83 00
- 29 01 00 00 00 02 84 E8
- 29 01 00 00 00 02 85 00
- 29 01 00 00 00 02 86 F2
- 29 01 00 00 00 02 87 01
- 29 01 00 00 00 02 88 1F
- 29 01 00 00 00 02 89 01
- 29 01 00 00 00 02 8A 41
- 29 01 00 00 00 02 8B 01
- 29 01 00 00 00 02 8C 78
- 29 01 00 00 00 02 8D 01
- 29 01 00 00 00 02 8E A5
- 29 01 00 00 00 02 8F 01
- 29 01 00 00 00 02 90 EE
- 29 01 00 00 00 02 91 02
- 29 01 00 00 00 02 92 29
- 29 01 00 00 00 02 93 02
- 29 01 00 00 00 02 94 2A
- 29 01 00 00 00 02 95 02
- 29 01 00 00 00 02 96 5D
- 29 01 00 00 00 02 97 02
- 29 01 00 00 00 02 98 93
- 29 01 00 00 00 02 99 02
- 29 01 00 00 00 02 9A B8
- 29 01 00 00 00 02 9B 02
- 29 01 00 00 00 02 9C E7
- 29 01 00 00 00 02 9D 03
- 29 01 00 00 00 02 9E 07
- 29 01 00 00 00 02 9F 03
- 29 01 00 00 00 02 A0 37
- 29 01 00 00 00 02 A2 03
- 29 01 00 00 00 02 A3 46
- 29 01 00 00 00 02 A4 03
- 29 01 00 00 00 02 A5 56
- 29 01 00 00 00 02 A6 03
- 29 01 00 00 00 02 A7 66
- 29 01 00 00 00 02 A9 03
- 29 01 00 00 00 02 AA 7A
- 29 01 00 00 00 02 AB 03
- 29 01 00 00 00 02 AC 93
- 29 01 00 00 00 02 AD 03
- 29 01 00 00 00 02 AE A3
- 29 01 00 00 00 02 AF 03
- 29 01 00 00 00 02 B0 B4
- 29 01 00 00 00 02 B1 03
- 29 01 00 00 00 02 B2 CB
- 29 01 00 00 00 02 B3 00
- 29 01 00 00 00 02 B4 7D
- 29 01 00 00 00 02 B5 00
- 29 01 00 00 00 02 B6 8A
- 29 01 00 00 00 02 B7 00
- 29 01 00 00 00 02 B8 9C
- 29 01 00 00 00 02 B9 00
- 29 01 00 00 00 02 BA B1
- 29 01 00 00 00 02 BB 00
- 29 01 00 00 00 02 BC BF
- 29 01 00 00 00 02 BD 00
- 29 01 00 00 00 02 BE CF
- 29 01 00 00 00 02 BF 00
- 29 01 00 00 00 02 C0 DD
- 29 01 00 00 00 02 C1 00
- 29 01 00 00 00 02 C2 E8
- 29 01 00 00 00 02 C3 00
- 29 01 00 00 00 02 C4 F2
- 29 01 00 00 00 02 C5 01
- 29 01 00 00 00 02 C6 1F
- 29 01 00 00 00 02 C7 01
- 29 01 00 00 00 02 C8 41
- 29 01 00 00 00 02 C9 01
- 29 01 00 00 00 02 CA 78
- 29 01 00 00 00 02 CB 01
- 29 01 00 00 00 02 CC A5
- 29 01 00 00 00 02 CD 01
- 29 01 00 00 00 02 CE EE
- 29 01 00 00 00 02 CF 02
- 29 01 00 00 00 02 D0 29
- 29 01 00 00 00 02 D1 02
- 29 01 00 00 00 02 D2 2A
- 29 01 00 00 00 02 D3 02
- 29 01 00 00 00 02 D4 5D
- 29 01 00 00 00 02 D5 02
- 29 01 00 00 00 02 D6 93
- 29 01 00 00 00 02 D7 02
- 29 01 00 00 00 02 D8 B8
- 29 01 00 00 00 02 D9 02
- 29 01 00 00 00 02 DA E7
- 29 01 00 00 00 02 DB 03
- 29 01 00 00 00 02 DC 07
- 29 01 00 00 00 02 DD 03
- 29 01 00 00 00 02 DE 37
- 29 01 00 00 00 02 DF 03
- 29 01 00 00 00 02 E0 46
- 29 01 00 00 00 02 E1 03
- 29 01 00 00 00 02 E2 56
- 29 01 00 00 00 02 E3 03
- 29 01 00 00 00 02 E4 66
- 29 01 00 00 00 02 E5 03
- 29 01 00 00 00 02 E6 7A
- 29 01 00 00 00 02 E7 03
- 29 01 00 00 00 02 E8 93
- 29 01 00 00 00 02 E9 03
- 29 01 00 00 00 02 EA A3
- 29 01 00 00 00 02 EB 03
- 29 01 00 00 00 02 EC B4
- 29 01 00 00 00 02 ED 03
- 29 01 00 00 00 02 EE CB
- 29 01 00 00 00 02 EF 00
- 29 01 00 00 00 02 F0 ED
- 29 01 00 00 00 02 F1 00
- 29 01 00 00 00 02 F2 F3
- 29 01 00 00 00 02 F3 00
- 29 01 00 00 00 02 F4 FE
- 29 01 00 00 00 02 F5 01
- 29 01 00 00 00 02 F6 09
- 29 01 00 00 00 02 F7 01
- 29 01 00 00 00 02 F8 13
- 29 01 00 00 00 02 F9 01
- 29 01 00 00 00 02 FA 1D
- 29 01 00 00 00 02 FF 02
- 29 01 00 00 00 02 FB 01
- 29 01 00 00 00 02 00 01
- 29 01 00 00 00 02 01 26
- 29 01 00 00 00 02 02 01
- 29 01 00 00 00 02 03 2F
- 29 01 00 00 00 02 04 01
- 29 01 00 00 00 02 05 37
- 29 01 00 00 00 02 06 01
- 29 01 00 00 00 02 07 56
- 29 01 00 00 00 02 08 01
- 29 01 00 00 00 02 09 70
- 29 01 00 00 00 02 0A 01
- 29 01 00 00 00 02 0B 9D
- 29 01 00 00 00 02 0C 01
- 29 01 00 00 00 02 0D C2
- 29 01 00 00 00 02 0E 01
- 29 01 00 00 00 02 0F FF
- 29 01 00 00 00 02 10 02
- 29 01 00 00 00 02 11 31
- 29 01 00 00 00 02 12 02
- 29 01 00 00 00 02 13 32
- 29 01 00 00 00 02 14 02
- 29 01 00 00 00 02 15 60
- 29 01 00 00 00 02 16 02
- 29 01 00 00 00 02 17 94
- 29 01 00 00 00 02 18 02
- 29 01 00 00 00 02 19 B5
- 29 01 00 00 00 02 1A 02
- 29 01 00 00 00 02 1B E3
- 29 01 00 00 00 02 1C 03
- 29 01 00 00 00 02 1D 03
- 29 01 00 00 00 02 1E 03
- 29 01 00 00 00 02 1F 2D
- 29 01 00 00 00 02 20 03
- 29 01 00 00 00 02 21 3A
- 29 01 00 00 00 02 22 03
- 29 01 00 00 00 02 23 48
- 29 01 00 00 00 02 24 03
- 29 01 00 00 00 02 25 57
- 29 01 00 00 00 02 26 03
- 29 01 00 00 00 02 27 68
- 29 01 00 00 00 02 28 03
- 29 01 00 00 00 02 29 7B
- 29 01 00 00 00 02 2A 03
- 29 01 00 00 00 02 2B 90
- 29 01 00 00 00 02 2D 03
- 29 01 00 00 00 02 2F A0
- 29 01 00 00 00 02 30 03
- 29 01 00 00 00 02 31 CB
- 29 01 00 00 00 02 32 00
- 29 01 00 00 00 02 33 ED
- 29 01 00 00 00 02 34 00
- 29 01 00 00 00 02 35 F3
- 29 01 00 00 00 02 36 00
- 29 01 00 00 00 02 37 FE
- 29 01 00 00 00 02 38 01
- 29 01 00 00 00 02 39 09
- 29 01 00 00 00 02 3A 01
- 29 01 00 00 00 02 3B 13
- 29 01 00 00 00 02 3D 01
- 29 01 00 00 00 02 3F 1D
- 29 01 00 00 00 02 40 01
- 29 01 00 00 00 02 41 26
- 29 01 00 00 00 02 42 01
- 29 01 00 00 00 02 43 2F
- 29 01 00 00 00 02 44 01
- 29 01 00 00 00 02 45 37
- 29 01 00 00 00 02 46 01
- 29 01 00 00 00 02 47 56
- 29 01 00 00 00 02 48 01
- 29 01 00 00 00 02 49 70
- 29 01 00 00 00 02 4A 01
- 29 01 00 00 00 02 4B 9D
- 29 01 00 00 00 02 4C 01
- 29 01 00 00 00 02 4D C2
- 29 01 00 00 00 02 4E 01
- 29 01 00 00 00 02 4F FF
- 29 01 00 00 00 02 50 02
- 29 01 00 00 00 02 51 31
- 29 01 00 00 00 02 52 02
- 29 01 00 00 00 02 53 32
- 29 01 00 00 00 02 54 02
- 29 01 00 00 00 02 55 60
- 29 01 00 00 00 02 56 02
- 29 01 00 00 00 02 58 94
- 29 01 00 00 00 02 59 02
- 29 01 00 00 00 02 5A B5
- 29 01 00 00 00 02 5B 02
- 29 01 00 00 00 02 5C E3
- 29 01 00 00 00 02 5D 03
- 29 01 00 00 00 02 5E 03
- 29 01 00 00 00 02 5F 03
- 29 01 00 00 00 02 60 2D
- 29 01 00 00 00 02 61 03
- 29 01 00 00 00 02 62 3A
- 29 01 00 00 00 02 63 03
- 29 01 00 00 00 02 64 48
- 29 01 00 00 00 02 65 03
- 29 01 00 00 00 02 66 57
- 29 01 00 00 00 02 67 03
- 29 01 00 00 00 02 68 68
- 29 01 00 00 00 02 69 03
- 29 01 00 00 00 02 6A 7B
- 29 01 00 00 00 02 6B 03
- 29 01 00 00 00 02 6C 90
- 29 01 00 00 00 02 6D 03
- 29 01 00 00 00 02 6E A0
- 29 01 00 00 00 02 6F 03
- 29 01 00 00 00 02 70 CB
- 29 01 00 00 00 02 71 00
- 29 01 00 00 00 02 72 19
- 29 01 00 00 00 02 73 00
- 29 01 00 00 00 02 74 36
- 29 01 00 00 00 02 75 00
- 29 01 00 00 00 02 76 55
- 29 01 00 00 00 02 77 00
- 29 01 00 00 00 02 78 70
- 29 01 00 00 00 02 79 00
- 29 01 00 00 00 02 7A 83
- 29 01 00 00 00 02 7B 00
- 29 01 00 00 00 02 7C 99
- 29 01 00 00 00 02 7D 00
- 29 01 00 00 00 02 7E A8
- 29 01 00 00 00 02 7F 00
- 29 01 00 00 00 02 80 B7
- 29 01 00 00 00 02 81 00
- 29 01 00 00 00 02 82 C5
- 29 01 00 00 00 02 83 00
- 29 01 00 00 00 02 84 F7
- 29 01 00 00 00 02 85 01
- 29 01 00 00 00 02 86 1E
- 29 01 00 00 00 02 87 01
- 29 01 00 00 00 02 88 60
- 29 01 00 00 00 02 89 01
- 29 01 00 00 00 02 8A 95
- 29 01 00 00 00 02 8B 01
- 29 01 00 00 00 02 8C E1
- 29 01 00 00 00 02 8D 02
- 29 01 00 00 00 02 8E 20
- 29 01 00 00 00 02 8F 02
- 29 01 00 00 00 02 90 23
- 29 01 00 00 00 02 91 02
- 29 01 00 00 00 02 92 59
- 29 01 00 00 00 02 93 02
- 29 01 00 00 00 02 94 94
- 29 01 00 00 00 02 95 02
- 29 01 00 00 00 02 96 B4
- 29 01 00 00 00 02 97 02
- 29 01 00 00 00 02 98 E1
- 29 01 00 00 00 02 99 03
- 29 01 00 00 00 02 9A 01
- 29 01 00 00 00 02 9B 03
- 29 01 00 00 00 02 9C 28
- 29 01 00 00 00 02 9D 03
- 29 01 00 00 00 02 9E 30
- 29 01 00 00 00 02 9F 03
- 29 01 00 00 00 02 A0 37
- 29 01 00 00 00 02 A2 03
- 29 01 00 00 00 02 A3 3B
- 29 01 00 00 00 02 A4 03
- 29 01 00 00 00 02 A5 40
- 29 01 00 00 00 02 A6 03
- 29 01 00 00 00 02 A7 50
- 29 01 00 00 00 02 A9 03
- 29 01 00 00 00 02 AA 6D
- 29 01 00 00 00 02 AB 03
- 29 01 00 00 00 02 AC 80
- 29 01 00 00 00 02 AD 03
- 29 01 00 00 00 02 AE CB
- 29 01 00 00 00 02 AF 00
- 29 01 00 00 00 02 B0 19
- 29 01 00 00 00 02 B1 00
- 29 01 00 00 00 02 B2 36
- 29 01 00 00 00 02 B3 00
- 29 01 00 00 00 02 B4 55
- 29 01 00 00 00 02 B5 00
- 29 01 00 00 00 02 B6 70
- 29 01 00 00 00 02 B7 00
- 29 01 00 00 00 02 B8 83
- 29 01 00 00 00 02 B9 00
- 29 01 00 00 00 02 BA 99
- 29 01 00 00 00 02 BB 00
- 29 01 00 00 00 02 BC A8
- 29 01 00 00 00 02 BD 00
- 29 01 00 00 00 02 BE B7
- 29 01 00 00 00 02 BF 00
- 29 01 00 00 00 02 C0 C5
- 29 01 00 00 00 02 C1 00
- 29 01 00 00 00 02 C2 F7
- 29 01 00 00 00 02 C3 01
- 29 01 00 00 00 02 C4 1E
- 29 01 00 00 00 02 C5 01
- 29 01 00 00 00 02 C6 60
- 29 01 00 00 00 02 C7 01
- 29 01 00 00 00 02 C8 95
- 29 01 00 00 00 02 C9 01
- 29 01 00 00 00 02 CA E1
- 29 01 00 00 00 02 CB 02
- 29 01 00 00 00 02 CC 20
- 29 01 00 00 00 02 CD 02
- 29 01 00 00 00 02 CE 23
- 29 01 00 00 00 02 CF 02
- 29 01 00 00 00 02 D0 59
- 29 01 00 00 00 02 D1 02
- 29 01 00 00 00 02 D2 94
- 29 01 00 00 00 02 D3 02
- 29 01 00 00 00 02 D4 B4
- 29 01 00 00 00 02 D5 02
- 29 01 00 00 00 02 D6 E1
- 29 01 00 00 00 02 D7 03
- 29 01 00 00 00 02 D8 01
- 29 01 00 00 00 02 D9 03
- 29 01 00 00 00 02 DA 28
- 29 01 00 00 00 02 DB 03
- 29 01 00 00 00 02 DC 30
- 29 01 00 00 00 02 DD 03
- 29 01 00 00 00 02 DE 37
- 29 01 00 00 00 02 DF 03
- 29 01 00 00 00 02 E0 3B
- 29 01 00 00 00 02 E1 03
- 29 01 00 00 00 02 E2 40
- 29 01 00 00 00 02 E3 03
- 29 01 00 00 00 02 E4 50
- 29 01 00 00 00 02 E5 03
- 29 01 00 00 00 02 E6 6D
- 29 01 00 00 00 02 E7 03
- 29 01 00 00 00 02 E8 80
- 29 01 00 00 00 02 E9 03
- 29 01 00 00 00 02 EA CB
- 29 01 00 00 00 02 FF 01
- 29 01 00 00 00 02 FB 01
- 29 01 00 00 00 02 FF 02
- 29 01 00 00 00 02 FB 01
- 29 01 00 00 00 02 FF 04
- 29 01 00 00 00 02 FB 01
- 29 01 00 00 00 02 FF 00
- 29 01 00 00 64 02 11 00
- 29 01 00 00 00 02 FF EE
- 29 01 00 00 00 02 12 50
- 29 01 00 00 00 02 13 02
- 29 01 00 00 00 02 6A 60
- 29 01 00 00 00 02 FF 00
- 29 01 00 00 78 02 29 00];
+ qcom,panel-on-cmds = [29 01 00 00 00 00 02 FF EE
+ 29 01 00 00 00 00 02 26 08
+ 29 01 00 00 00 00 02 26 00
+ 29 01 00 00 10 00 02 FF 00
+ 29 01 00 00 00 00 02 BA 03
+ 29 01 00 00 00 00 02 C2 08
+ 29 01 00 00 00 00 02 FF 01
+ 29 01 00 00 00 00 02 FB 01
+ 29 01 00 00 00 00 02 00 4A
+ 29 01 00 00 00 00 02 01 33
+ 29 01 00 00 00 00 02 02 53
+ 29 01 00 00 00 00 02 03 55
+ 29 01 00 00 00 00 02 04 55
+ 29 01 00 00 00 00 02 05 33
+ 29 01 00 00 00 00 02 06 22
+ 29 01 00 00 00 00 02 08 56
+ 29 01 00 00 00 00 02 09 8F
+ 29 01 00 00 00 00 02 36 73
+ 29 01 00 00 00 00 02 0B 9F
+ 29 01 00 00 00 00 02 0C 9F
+ 29 01 00 00 00 00 02 0D 2F
+ 29 01 00 00 00 00 02 0E 24
+ 29 01 00 00 00 00 02 11 83
+ 29 01 00 00 00 00 02 12 03
+ 29 01 00 00 00 00 02 71 2C
+ 29 01 00 00 00 00 02 6F 03
+ 29 01 00 00 00 00 02 0F 0A
+ 29 01 00 00 00 00 02 FF 05
+ 29 01 00 00 00 00 02 FB 01
+ 29 01 00 00 00 00 02 01 00
+ 29 01 00 00 00 00 02 02 8B
+ 29 01 00 00 00 00 02 03 82
+ 29 01 00 00 00 00 02 04 82
+ 29 01 00 00 00 00 02 05 30
+ 29 01 00 00 00 00 02 06 33
+ 29 01 00 00 00 00 02 07 01
+ 29 01 00 00 00 00 02 08 00
+ 29 01 00 00 00 00 02 09 46
+ 29 01 00 00 00 00 02 0A 46
+ 29 01 00 00 00 00 02 0D 0B
+ 29 01 00 00 00 00 02 0E 1D
+ 29 01 00 00 00 00 02 0F 08
+ 29 01 00 00 00 00 02 10 53
+ 29 01 00 00 00 00 02 11 00
+ 29 01 00 00 00 00 02 12 00
+ 29 01 00 00 00 00 02 14 01
+ 29 01 00 00 00 00 02 15 00
+ 29 01 00 00 00 00 02 16 05
+ 29 01 00 00 00 00 02 17 00
+ 29 01 00 00 00 00 02 19 7F
+ 29 01 00 00 00 00 02 1A FF
+ 29 01 00 00 00 00 02 1B 0F
+ 29 01 00 00 00 00 02 1C 00
+ 29 01 00 00 00 00 02 1D 00
+ 29 01 00 00 00 00 02 1E 00
+ 29 01 00 00 00 00 02 1F 07
+ 29 01 00 00 00 00 02 20 00
+ 29 01 00 00 00 00 02 21 06
+ 29 01 00 00 00 00 02 22 55
+ 29 01 00 00 00 00 02 23 4D
+ 29 01 00 00 00 00 02 2D 02
+ 29 01 00 00 00 00 02 28 01
+ 29 01 00 00 00 00 02 2F 02
+ 29 01 00 00 00 00 02 83 01
+ 29 01 00 00 00 00 02 9E 58
+ 29 01 00 00 00 00 02 9F 6A
+ 29 01 00 00 00 00 02 A0 01
+ 29 01 00 00 00 00 02 A2 10
+ 29 01 00 00 00 00 02 BB 0A
+ 29 01 00 00 00 00 02 BC 0A
+ 29 01 00 00 00 00 02 32 08
+ 29 01 00 00 00 00 02 33 B8
+ 29 01 00 00 00 00 02 36 01
+ 29 01 00 00 00 00 02 37 00
+ 29 01 00 00 00 00 02 43 00
+ 29 01 00 00 00 00 02 4B 21
+ 29 01 00 00 00 00 02 4C 03
+ 29 01 00 00 00 00 02 50 21
+ 29 01 00 00 00 00 02 51 03
+ 29 01 00 00 00 00 02 58 21
+ 29 01 00 00 00 00 02 59 03
+ 29 01 00 00 00 00 02 5D 21
+ 29 01 00 00 00 00 02 5E 03
+ 29 01 00 00 00 00 02 6C 00
+ 29 01 00 00 00 00 02 6D 00
+ 29 01 00 00 00 00 02 FB 01
+ 29 01 00 00 00 00 02 FF 01
+ 29 01 00 00 00 00 02 FB 01
+ 29 01 00 00 00 00 02 75 00
+ 29 01 00 00 00 00 02 76 7D
+ 29 01 00 00 00 00 02 77 00
+ 29 01 00 00 00 00 02 78 8A
+ 29 01 00 00 00 00 02 79 00
+ 29 01 00 00 00 00 02 7A 9C
+ 29 01 00 00 00 00 02 7B 00
+ 29 01 00 00 00 00 02 7C B1
+ 29 01 00 00 00 00 02 7D 00
+ 29 01 00 00 00 00 02 7E BF
+ 29 01 00 00 00 00 02 7F 00
+ 29 01 00 00 00 00 02 80 CF
+ 29 01 00 00 00 00 02 81 00
+ 29 01 00 00 00 00 02 82 DD
+ 29 01 00 00 00 00 02 83 00
+ 29 01 00 00 00 00 02 84 E8
+ 29 01 00 00 00 00 02 85 00
+ 29 01 00 00 00 00 02 86 F2
+ 29 01 00 00 00 00 02 87 01
+ 29 01 00 00 00 00 02 88 1F
+ 29 01 00 00 00 00 02 89 01
+ 29 01 00 00 00 00 02 8A 41
+ 29 01 00 00 00 00 02 8B 01
+ 29 01 00 00 00 00 02 8C 78
+ 29 01 00 00 00 00 02 8D 01
+ 29 01 00 00 00 00 02 8E A5
+ 29 01 00 00 00 00 02 8F 01
+ 29 01 00 00 00 00 02 90 EE
+ 29 01 00 00 00 00 02 91 02
+ 29 01 00 00 00 00 02 92 29
+ 29 01 00 00 00 00 02 93 02
+ 29 01 00 00 00 00 02 94 2A
+ 29 01 00 00 00 00 02 95 02
+ 29 01 00 00 00 00 02 96 5D
+ 29 01 00 00 00 00 02 97 02
+ 29 01 00 00 00 00 02 98 93
+ 29 01 00 00 00 00 02 99 02
+ 29 01 00 00 00 00 02 9A B8
+ 29 01 00 00 00 00 02 9B 02
+ 29 01 00 00 00 00 02 9C E7
+ 29 01 00 00 00 00 02 9D 03
+ 29 01 00 00 00 00 02 9E 07
+ 29 01 00 00 00 00 02 9F 03
+ 29 01 00 00 00 00 02 A0 37
+ 29 01 00 00 00 00 02 A2 03
+ 29 01 00 00 00 00 02 A3 46
+ 29 01 00 00 00 00 02 A4 03
+ 29 01 00 00 00 00 02 A5 56
+ 29 01 00 00 00 00 02 A6 03
+ 29 01 00 00 00 00 02 A7 66
+ 29 01 00 00 00 00 02 A9 03
+ 29 01 00 00 00 00 02 AA 7A
+ 29 01 00 00 00 00 02 AB 03
+ 29 01 00 00 00 00 02 AC 93
+ 29 01 00 00 00 00 02 AD 03
+ 29 01 00 00 00 00 02 AE A3
+ 29 01 00 00 00 00 02 AF 03
+ 29 01 00 00 00 00 02 B0 B4
+ 29 01 00 00 00 00 02 B1 03
+ 29 01 00 00 00 00 02 B2 CB
+ 29 01 00 00 00 00 02 B3 00
+ 29 01 00 00 00 00 02 B4 7D
+ 29 01 00 00 00 00 02 B5 00
+ 29 01 00 00 00 00 02 B6 8A
+ 29 01 00 00 00 00 02 B7 00
+ 29 01 00 00 00 00 02 B8 9C
+ 29 01 00 00 00 00 02 B9 00
+ 29 01 00 00 00 00 02 BA B1
+ 29 01 00 00 00 00 02 BB 00
+ 29 01 00 00 00 00 02 BC BF
+ 29 01 00 00 00 00 02 BD 00
+ 29 01 00 00 00 00 02 BE CF
+ 29 01 00 00 00 00 02 BF 00
+ 29 01 00 00 00 00 02 C0 DD
+ 29 01 00 00 00 00 02 C1 00
+ 29 01 00 00 00 00 02 C2 E8
+ 29 01 00 00 00 00 02 C3 00
+ 29 01 00 00 00 00 02 C4 F2
+ 29 01 00 00 00 00 02 C5 01
+ 29 01 00 00 00 00 02 C6 1F
+ 29 01 00 00 00 00 02 C7 01
+ 29 01 00 00 00 00 02 C8 41
+ 29 01 00 00 00 00 02 C9 01
+ 29 01 00 00 00 00 02 CA 78
+ 29 01 00 00 00 00 02 CB 01
+ 29 01 00 00 00 00 02 CC A5
+ 29 01 00 00 00 00 02 CD 01
+ 29 01 00 00 00 00 02 CE EE
+ 29 01 00 00 00 00 02 CF 02
+ 29 01 00 00 00 00 02 D0 29
+ 29 01 00 00 00 00 02 D1 02
+ 29 01 00 00 00 00 02 D2 2A
+ 29 01 00 00 00 00 02 D3 02
+ 29 01 00 00 00 00 02 D4 5D
+ 29 01 00 00 00 00 02 D5 02
+ 29 01 00 00 00 00 02 D6 93
+ 29 01 00 00 00 00 02 D7 02
+ 29 01 00 00 00 00 02 D8 B8
+ 29 01 00 00 00 00 02 D9 02
+ 29 01 00 00 00 00 02 DA E7
+ 29 01 00 00 00 00 02 DB 03
+ 29 01 00 00 00 00 02 DC 07
+ 29 01 00 00 00 00 02 DD 03
+ 29 01 00 00 00 00 02 DE 37
+ 29 01 00 00 00 00 02 DF 03
+ 29 01 00 00 00 00 02 E0 46
+ 29 01 00 00 00 00 02 E1 03
+ 29 01 00 00 00 00 02 E2 56
+ 29 01 00 00 00 00 02 E3 03
+ 29 01 00 00 00 00 02 E4 66
+ 29 01 00 00 00 00 02 E5 03
+ 29 01 00 00 00 00 02 E6 7A
+ 29 01 00 00 00 00 02 E7 03
+ 29 01 00 00 00 00 02 E8 93
+ 29 01 00 00 00 00 02 E9 03
+ 29 01 00 00 00 00 02 EA A3
+ 29 01 00 00 00 00 02 EB 03
+ 29 01 00 00 00 00 02 EC B4
+ 29 01 00 00 00 00 02 ED 03
+ 29 01 00 00 00 00 02 EE CB
+ 29 01 00 00 00 00 02 EF 00
+ 29 01 00 00 00 00 02 F0 ED
+ 29 01 00 00 00 00 02 F1 00
+ 29 01 00 00 00 00 02 F2 F3
+ 29 01 00 00 00 00 02 F3 00
+ 29 01 00 00 00 00 02 F4 FE
+ 29 01 00 00 00 00 02 F5 01
+ 29 01 00 00 00 00 02 F6 09
+ 29 01 00 00 00 00 02 F7 01
+ 29 01 00 00 00 00 02 F8 13
+ 29 01 00 00 00 00 02 F9 01
+ 29 01 00 00 00 00 02 FA 1D
+ 29 01 00 00 00 00 02 FF 02
+ 29 01 00 00 00 00 02 FB 01
+ 29 01 00 00 00 00 02 00 01
+ 29 01 00 00 00 00 02 01 26
+ 29 01 00 00 00 00 02 02 01
+ 29 01 00 00 00 00 02 03 2F
+ 29 01 00 00 00 00 02 04 01
+ 29 01 00 00 00 00 02 05 37
+ 29 01 00 00 00 00 02 06 01
+ 29 01 00 00 00 00 02 07 56
+ 29 01 00 00 00 00 02 08 01
+ 29 01 00 00 00 00 02 09 70
+ 29 01 00 00 00 00 02 0A 01
+ 29 01 00 00 00 00 02 0B 9D
+ 29 01 00 00 00 00 02 0C 01
+ 29 01 00 00 00 00 02 0D C2
+ 29 01 00 00 00 00 02 0E 01
+ 29 01 00 00 00 00 02 0F FF
+ 29 01 00 00 00 00 02 10 02
+ 29 01 00 00 00 00 02 11 31
+ 29 01 00 00 00 00 02 12 02
+ 29 01 00 00 00 00 02 13 32
+ 29 01 00 00 00 00 02 14 02
+ 29 01 00 00 00 00 02 15 60
+ 29 01 00 00 00 00 02 16 02
+ 29 01 00 00 00 00 02 17 94
+ 29 01 00 00 00 00 02 18 02
+ 29 01 00 00 00 00 02 19 B5
+ 29 01 00 00 00 00 02 1A 02
+ 29 01 00 00 00 00 02 1B E3
+ 29 01 00 00 00 00 02 1C 03
+ 29 01 00 00 00 00 02 1D 03
+ 29 01 00 00 00 00 02 1E 03
+ 29 01 00 00 00 00 02 1F 2D
+ 29 01 00 00 00 00 02 20 03
+ 29 01 00 00 00 00 02 21 3A
+ 29 01 00 00 00 00 02 22 03
+ 29 01 00 00 00 00 02 23 48
+ 29 01 00 00 00 00 02 24 03
+ 29 01 00 00 00 00 02 25 57
+ 29 01 00 00 00 00 02 26 03
+ 29 01 00 00 00 00 02 27 68
+ 29 01 00 00 00 00 02 28 03
+ 29 01 00 00 00 00 02 29 7B
+ 29 01 00 00 00 00 02 2A 03
+ 29 01 00 00 00 00 02 2B 90
+ 29 01 00 00 00 00 02 2D 03
+ 29 01 00 00 00 00 02 2F A0
+ 29 01 00 00 00 00 02 30 03
+ 29 01 00 00 00 00 02 31 CB
+ 29 01 00 00 00 00 02 32 00
+ 29 01 00 00 00 00 02 33 ED
+ 29 01 00 00 00 00 02 34 00
+ 29 01 00 00 00 00 02 35 F3
+ 29 01 00 00 00 00 02 36 00
+ 29 01 00 00 00 00 02 37 FE
+ 29 01 00 00 00 00 02 38 01
+ 29 01 00 00 00 00 02 39 09
+ 29 01 00 00 00 00 02 3A 01
+ 29 01 00 00 00 00 02 3B 13
+ 29 01 00 00 00 00 02 3D 01
+ 29 01 00 00 00 00 02 3F 1D
+ 29 01 00 00 00 00 02 40 01
+ 29 01 00 00 00 00 02 41 26
+ 29 01 00 00 00 00 02 42 01
+ 29 01 00 00 00 00 02 43 2F
+ 29 01 00 00 00 00 02 44 01
+ 29 01 00 00 00 00 02 45 37
+ 29 01 00 00 00 00 02 46 01
+ 29 01 00 00 00 00 02 47 56
+ 29 01 00 00 00 00 02 48 01
+ 29 01 00 00 00 00 02 49 70
+ 29 01 00 00 00 00 02 4A 01
+ 29 01 00 00 00 00 02 4B 9D
+ 29 01 00 00 00 00 02 4C 01
+ 29 01 00 00 00 00 02 4D C2
+ 29 01 00 00 00 00 02 4E 01
+ 29 01 00 00 00 00 02 4F FF
+ 29 01 00 00 00 00 02 50 02
+ 29 01 00 00 00 00 02 51 31
+ 29 01 00 00 00 00 02 52 02
+ 29 01 00 00 00 00 02 53 32
+ 29 01 00 00 00 00 02 54 02
+ 29 01 00 00 00 00 02 55 60
+ 29 01 00 00 00 00 02 56 02
+ 29 01 00 00 00 00 02 58 94
+ 29 01 00 00 00 00 02 59 02
+ 29 01 00 00 00 00 02 5A B5
+ 29 01 00 00 00 00 02 5B 02
+ 29 01 00 00 00 00 02 5C E3
+ 29 01 00 00 00 00 02 5D 03
+ 29 01 00 00 00 00 02 5E 03
+ 29 01 00 00 00 00 02 5F 03
+ 29 01 00 00 00 00 02 60 2D
+ 29 01 00 00 00 00 02 61 03
+ 29 01 00 00 00 00 02 62 3A
+ 29 01 00 00 00 00 02 63 03
+ 29 01 00 00 00 00 02 64 48
+ 29 01 00 00 00 00 02 65 03
+ 29 01 00 00 00 00 02 66 57
+ 29 01 00 00 00 00 02 67 03
+ 29 01 00 00 00 00 02 68 68
+ 29 01 00 00 00 00 02 69 03
+ 29 01 00 00 00 00 02 6A 7B
+ 29 01 00 00 00 00 02 6B 03
+ 29 01 00 00 00 00 02 6C 90
+ 29 01 00 00 00 00 02 6D 03
+ 29 01 00 00 00 00 02 6E A0
+ 29 01 00 00 00 00 02 6F 03
+ 29 01 00 00 00 00 02 70 CB
+ 29 01 00 00 00 00 02 71 00
+ 29 01 00 00 00 00 02 72 19
+ 29 01 00 00 00 00 02 73 00
+ 29 01 00 00 00 00 02 74 36
+ 29 01 00 00 00 00 02 75 00
+ 29 01 00 00 00 00 02 76 55
+ 29 01 00 00 00 00 02 77 00
+ 29 01 00 00 00 00 02 78 70
+ 29 01 00 00 00 00 02 79 00
+ 29 01 00 00 00 00 02 7A 83
+ 29 01 00 00 00 00 02 7B 00
+ 29 01 00 00 00 00 02 7C 99
+ 29 01 00 00 00 00 02 7D 00
+ 29 01 00 00 00 00 02 7E A8
+ 29 01 00 00 00 00 02 7F 00
+ 29 01 00 00 00 00 02 80 B7
+ 29 01 00 00 00 00 02 81 00
+ 29 01 00 00 00 00 02 82 C5
+ 29 01 00 00 00 00 02 83 00
+ 29 01 00 00 00 00 02 84 F7
+ 29 01 00 00 00 00 02 85 01
+ 29 01 00 00 00 00 02 86 1E
+ 29 01 00 00 00 00 02 87 01
+ 29 01 00 00 00 00 02 88 60
+ 29 01 00 00 00 00 02 89 01
+ 29 01 00 00 00 00 02 8A 95
+ 29 01 00 00 00 00 02 8B 01
+ 29 01 00 00 00 00 02 8C E1
+ 29 01 00 00 00 00 02 8D 02
+ 29 01 00 00 00 00 02 8E 20
+ 29 01 00 00 00 00 02 8F 02
+ 29 01 00 00 00 00 02 90 23
+ 29 01 00 00 00 00 02 91 02
+ 29 01 00 00 00 00 02 92 59
+ 29 01 00 00 00 00 02 93 02
+ 29 01 00 00 00 00 02 94 94
+ 29 01 00 00 00 00 02 95 02
+ 29 01 00 00 00 00 02 96 B4
+ 29 01 00 00 00 00 02 97 02
+ 29 01 00 00 00 00 02 98 E1
+ 29 01 00 00 00 00 02 99 03
+ 29 01 00 00 00 00 02 9A 01
+ 29 01 00 00 00 00 02 9B 03
+ 29 01 00 00 00 00 02 9C 28
+ 29 01 00 00 00 00 02 9D 03
+ 29 01 00 00 00 00 02 9E 30
+ 29 01 00 00 00 00 02 9F 03
+ 29 01 00 00 00 00 02 A0 37
+ 29 01 00 00 00 00 02 A2 03
+ 29 01 00 00 00 00 02 A3 3B
+ 29 01 00 00 00 00 02 A4 03
+ 29 01 00 00 00 00 02 A5 40
+ 29 01 00 00 00 00 02 A6 03
+ 29 01 00 00 00 00 02 A7 50
+ 29 01 00 00 00 00 02 A9 03
+ 29 01 00 00 00 00 02 AA 6D
+ 29 01 00 00 00 00 02 AB 03
+ 29 01 00 00 00 00 02 AC 80
+ 29 01 00 00 00 00 02 AD 03
+ 29 01 00 00 00 00 02 AE CB
+ 29 01 00 00 00 00 02 AF 00
+ 29 01 00 00 00 00 02 B0 19
+ 29 01 00 00 00 00 02 B1 00
+ 29 01 00 00 00 00 02 B2 36
+ 29 01 00 00 00 00 02 B3 00
+ 29 01 00 00 00 00 02 B4 55
+ 29 01 00 00 00 00 02 B5 00
+ 29 01 00 00 00 00 02 B6 70
+ 29 01 00 00 00 00 02 B7 00
+ 29 01 00 00 00 00 02 B8 83
+ 29 01 00 00 00 00 02 B9 00
+ 29 01 00 00 00 00 02 BA 99
+ 29 01 00 00 00 00 02 BB 00
+ 29 01 00 00 00 00 02 BC A8
+ 29 01 00 00 00 00 02 BD 00
+ 29 01 00 00 00 00 02 BE B7
+ 29 01 00 00 00 00 02 BF 00
+ 29 01 00 00 00 00 02 C0 C5
+ 29 01 00 00 00 00 02 C1 00
+ 29 01 00 00 00 00 02 C2 F7
+ 29 01 00 00 00 00 02 C3 01
+ 29 01 00 00 00 00 02 C4 1E
+ 29 01 00 00 00 00 02 C5 01
+ 29 01 00 00 00 00 02 C6 60
+ 29 01 00 00 00 00 02 C7 01
+ 29 01 00 00 00 00 02 C8 95
+ 29 01 00 00 00 00 02 C9 01
+ 29 01 00 00 00 00 02 CA E1
+ 29 01 00 00 00 00 02 CB 02
+ 29 01 00 00 00 00 02 CC 20
+ 29 01 00 00 00 00 02 CD 02
+ 29 01 00 00 00 00 02 CE 23
+ 29 01 00 00 00 00 02 CF 02
+ 29 01 00 00 00 00 02 D0 59
+ 29 01 00 00 00 00 02 D1 02
+ 29 01 00 00 00 00 02 D2 94
+ 29 01 00 00 00 00 02 D3 02
+ 29 01 00 00 00 00 02 D4 B4
+ 29 01 00 00 00 00 02 D5 02
+ 29 01 00 00 00 00 02 D6 E1
+ 29 01 00 00 00 00 02 D7 03
+ 29 01 00 00 00 00 02 D8 01
+ 29 01 00 00 00 00 02 D9 03
+ 29 01 00 00 00 00 02 DA 28
+ 29 01 00 00 00 00 02 DB 03
+ 29 01 00 00 00 00 02 DC 30
+ 29 01 00 00 00 00 02 DD 03
+ 29 01 00 00 00 00 02 DE 37
+ 29 01 00 00 00 00 02 DF 03
+ 29 01 00 00 00 00 02 E0 3B
+ 29 01 00 00 00 00 02 E1 03
+ 29 01 00 00 00 00 02 E2 40
+ 29 01 00 00 00 00 02 E3 03
+ 29 01 00 00 00 00 02 E4 50
+ 29 01 00 00 00 00 02 E5 03
+ 29 01 00 00 00 00 02 E6 6D
+ 29 01 00 00 00 00 02 E7 03
+ 29 01 00 00 00 00 02 E8 80
+ 29 01 00 00 00 00 02 E9 03
+ 29 01 00 00 00 00 02 EA CB
+ 29 01 00 00 00 00 02 FF 01
+ 29 01 00 00 00 00 02 FB 01
+ 29 01 00 00 00 00 02 FF 02
+ 29 01 00 00 00 00 02 FB 01
+ 29 01 00 00 00 00 02 FF 04
+ 29 01 00 00 00 00 02 FB 01
+ 29 01 00 00 00 00 02 FF 00
+ 29 01 00 00 64 00 02 11 00
+ 29 01 00 00 00 00 02 FF EE
+ 29 01 00 00 00 00 02 12 50
+ 29 01 00 00 00 00 02 13 02
+ 29 01 00 00 00 00 02 6A 60
+ 29 01 00 00 00 00 02 FF 00
+ 29 01 00 00 78 00 02 29 00];
+
qcom,on-cmds-dsi-state = "DSI_LP_MODE";
- qcom,panel-off-cmds = [05 01 00 00 32 02 28 00
- 05 01 00 00 78 02 10 00];
+ qcom,panel-off-cmds = [05 01 00 00 32 00 02 28 00
+ 05 01 00 00 78 00 02 10 00];
qcom,off-cmds-dsi-state = "DSI_HS_MODE";
};
};
diff --git a/arch/arm/boot/dts/dsi-panel-nt35596-1080p-video.dtsi b/arch/arm/boot/dts/dsi-panel-nt35596-1080p-video.dtsi
new file mode 100644
index 0000000..1ecad71
--- /dev/null
+++ b/arch/arm/boot/dts/dsi-panel-nt35596-1080p-video.dtsi
@@ -0,0 +1,580 @@
+/* Copyright (c) 2013, The Linux Foundation. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 and
+ * only version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+&soc {
+ qcom,mdss_dsi_nt35596_1080p_video {
+ compatible = "qcom,mdss-dsi-panel";
+ label = "nt35596 1080p video mode dsi panel";
+ status = "disable";
+ qcom,dsi-ctrl-phandle = <&mdss_dsi0>;
+ qcom,rst-gpio = <&msmgpio 25 0>;
+ qcom,mdss-pan-res = <1080 1920>;
+ qcom,mdss-pan-bpp = <24>;
+ qcom,mdss-pan-dest = "display_1";
+ qcom,mdss-pan-porch-values = <32 8 32 18 2 2>;
+ qcom,mdss-pan-underflow-clr = <0xff>;
+ qcom,mdss-pan-bl-ctrl = "bl_ctrl_wled";
+ qcom,mdss-pan-bl-levels = <1 4095>;
+ qcom,mdss-pan-dsi-mode = <0>;
+ qcom,mdss-pan-dsi-h-pulse-mode = <1>;
+ qcom,mdss-pan-dsi-h-power-stop = <0 0 0>;
+ qcom,mdss-pan-dsi-bllp-power-stop = <1 1>;
+ qcom,mdss-pan-dsi-traffic-mode = <2>;
+ qcom,mdss-pan-dsi-dst-format = <3>;
+ qcom,mdss-pan-dsi-vc = <0>;
+ qcom,mdss-pan-dsi-rgb-swap = <0>;
+ qcom,mdss-pan-dsi-data-lanes = <1 1 1 1>; /* 4 lanes */
+ qcom,mdss-pan-dsi-dlane-swap = <0>;
+ qcom,mdss-pan-dsi-t-clk = <0x38 0x1e>;
+ qcom,mdss-pan-dsi-stream = <0>;
+ qcom,mdss-pan-dsi-mdp-tr = <0x0>;
+ qcom,mdss-pan-dsi-dma-tr = <0x04>;
+ qcom,mdss-pan-dsi-frame-rate = <60>;
+ qcom,panel-phy-regulatorSettings = [07 09 03 00 /* Regualotor settings */
+ 20 00 01];
+ qcom,panel-phy-timingSettings = [f9 3d 34 00 58 4d
+ 36 3f 53 03 04 00];
+ qcom,panel-phy-strengthCtrl = [ff 06];
+ qcom,panel-phy-bistCtrl = [00 00 b1 ff /* BIST Ctrl settings */
+ 00 00];
+ qcom,panel-phy-laneConfig = [00 00 00 00 00 00 00 01 97 /* lane0 config */
+ 00 00 00 00 05 00 00 01 97 /* lane1 config */
+ 00 00 00 00 0a 00 00 01 97 /* lane2 config */
+ 00 00 00 00 0f 00 00 01 97 /* lane3 config */
+ 00 c0 00 00 00 00 00 01 bb]; /* Clk ln config */
+ qcom,panel-on-cmds = [29 01 00 00 00 00 02 FF EE
+ 29 01 00 00 00 00 02 FB 01
+ 29 01 00 00 00 00 02 1F 45
+ 29 01 00 00 00 00 02 24 4F
+ 29 01 00 00 00 00 02 38 C8
+ 29 01 00 00 00 00 02 39 2C
+ 29 01 00 00 00 00 02 1E BB
+ 29 01 00 00 00 00 02 1D 0F
+ 29 01 00 00 00 00 02 7E B1
+ 29 01 00 00 00 00 02 FF 00
+ 29 01 00 00 00 00 02 FB 01
+ 29 01 00 00 00 00 02 35 01
+ 29 01 00 00 00 00 02 BA 03
+ 29 01 00 00 00 00 02 FF 01
+ 29 01 00 00 00 00 02 FB 01
+ 29 01 00 00 00 00 02 00 01
+ 29 01 00 00 00 00 02 01 55
+ 29 01 00 00 00 00 02 02 40
+ 29 01 00 00 00 00 02 05 00
+ 29 01 00 00 00 00 02 06 1B
+ 29 01 00 00 00 00 02 07 24
+ 29 01 00 00 00 00 02 08 0C
+ 29 01 00 00 00 00 02 0B 87
+ 29 01 00 00 00 00 02 0C 87
+ 29 01 00 00 00 00 02 0E B0
+ 29 01 00 00 00 00 02 0F B3
+ 29 01 00 00 00 00 02 11 10
+ 29 01 00 00 00 00 02 12 10
+ 29 01 00 00 00 00 02 13 05
+ 29 01 00 00 00 00 02 14 4A
+ 29 01 00 00 00 00 02 15 18
+ 29 01 00 00 00 00 02 16 18
+ 29 01 00 00 00 00 02 18 00
+ 29 01 00 00 00 00 02 19 77
+ 29 01 00 00 00 00 02 1A 55
+ 29 01 00 00 00 00 02 1B 13
+ 29 01 00 00 00 00 02 1C 00
+ 29 01 00 00 00 00 02 1D 00
+ 29 01 00 00 00 00 02 1E 13
+ 29 01 00 00 00 00 02 1F 00
+ 29 01 00 00 00 00 02 23 00
+ 29 01 00 00 00 00 02 24 00
+ 29 01 00 00 00 00 02 25 00
+ 29 01 00 00 00 00 02 26 00
+ 29 01 00 00 00 00 02 27 00
+ 29 01 00 00 00 00 02 28 00
+ 29 01 00 00 00 00 02 35 00
+ 29 01 00 00 00 00 02 66 00
+ 29 01 00 00 00 00 02 58 82
+ 29 01 00 00 00 00 02 59 02
+ 29 01 00 00 00 00 02 5A 02
+ 29 01 00 00 00 00 02 5B 02
+ 29 01 00 00 00 00 02 5C 82
+ 29 01 00 00 00 00 02 5D 82
+ 29 01 00 00 00 00 02 5E 02
+ 29 01 00 00 00 00 02 5F 02
+ 29 01 00 00 00 00 02 72 31
+ 29 01 00 00 00 00 02 FF 05
+ 29 01 00 00 00 00 02 FB 01
+ 29 01 00 00 00 00 02 00 01
+ 29 01 00 00 00 00 02 01 0B
+ 29 01 00 00 00 00 02 02 0C
+ 29 01 00 00 00 00 02 03 09
+ 29 01 00 00 00 00 02 04 0A
+ 29 01 00 00 00 00 02 05 00
+ 29 01 00 00 00 00 02 06 0F
+ 29 01 00 00 00 00 02 07 10
+ 29 01 00 00 00 00 02 08 00
+ 29 01 00 00 00 00 02 09 00
+ 29 01 00 00 00 00 02 0A 00
+ 29 01 00 00 00 00 02 0B 00
+ 29 01 00 00 00 00 02 0C 00
+ 29 01 00 00 00 00 02 0D 13
+ 29 01 00 00 00 00 02 0E 15
+ 29 01 00 00 00 00 02 0F 17
+ 29 01 00 00 00 00 02 10 01
+ 29 01 00 00 00 00 02 11 0B
+ 29 01 00 00 00 00 02 12 0C
+ 29 01 00 00 00 00 02 13 09
+ 29 01 00 00 00 00 02 14 0A
+ 29 01 00 00 00 00 02 15 00
+ 29 01 00 00 00 00 02 16 0F
+ 29 01 00 00 00 00 02 17 10
+ 29 01 00 00 00 00 02 18 00
+ 29 01 00 00 00 00 02 19 00
+ 29 01 00 00 00 00 02 1A 00
+ 29 01 00 00 00 00 02 1B 00
+ 29 01 00 00 00 00 02 1C 00
+ 29 01 00 00 00 00 02 1D 13
+ 29 01 00 00 00 00 02 1E 15
+ 29 01 00 00 00 00 02 1F 17
+ 29 01 00 00 00 00 02 20 00
+ 29 01 00 00 00 00 02 21 03
+ 29 01 00 00 00 00 02 22 01
+ 29 01 00 00 00 00 02 23 40
+ 29 01 00 00 00 00 02 24 40
+ 29 01 00 00 00 00 02 25 ED
+ 29 01 00 00 00 00 02 29 58
+ 29 01 00 00 00 00 02 2A 12
+ 29 01 00 00 00 00 02 2B 01
+ 29 01 00 00 00 00 02 4B 06
+ 29 01 00 00 00 00 02 4C 11
+ 29 01 00 00 00 00 02 4D 20
+ 29 01 00 00 00 00 02 4E 02
+ 29 01 00 00 00 00 02 4F 02
+ 29 01 00 00 00 00 02 50 20
+ 29 01 00 00 00 00 02 51 61
+ 29 01 00 00 00 00 02 52 01
+ 29 01 00 00 00 00 02 53 63
+ 29 01 00 00 00 00 02 54 77
+ 29 01 00 00 00 00 02 55 ED
+ 29 01 00 00 00 00 02 5B 00
+ 29 01 00 00 00 00 02 5C 00
+ 29 01 00 00 00 00 02 5D 00
+ 29 01 00 00 00 00 02 5E 00
+ 29 01 00 00 00 00 02 5F 15
+ 29 01 00 00 00 00 02 60 75
+ 29 01 00 00 00 00 02 61 00
+ 29 01 00 00 00 00 02 62 00
+ 29 01 00 00 00 00 02 63 00
+ 29 01 00 00 00 00 02 64 00
+ 29 01 00 00 00 00 02 65 00
+ 29 01 00 00 00 00 02 66 00
+ 29 01 00 00 00 00 02 67 00
+ 29 01 00 00 00 00 02 68 04
+ 29 01 00 00 00 00 02 69 00
+ 29 01 00 00 00 00 02 6A 00
+ 29 01 00 00 00 00 02 6C 40
+ 29 01 00 00 00 00 02 75 01
+ 29 01 00 00 00 00 02 76 01
+ 29 01 00 00 00 00 02 7A 80
+ 29 01 00 00 00 00 02 7B C5
+ 29 01 00 00 00 00 02 7C D8
+ 29 01 00 00 00 00 02 7D 60
+ 29 01 00 00 00 00 02 7F 10
+ 29 01 00 00 00 00 02 80 81
+ 29 01 00 00 00 00 02 83 05
+ 29 01 00 00 00 00 02 93 08
+ 29 01 00 00 00 00 02 94 10
+ 29 01 00 00 00 00 02 8A 00
+ 29 01 00 00 00 00 02 9B 0F
+ 29 01 00 00 00 00 02 EA FF
+ 29 01 00 00 00 00 02 EC 00
+ 29 01 00 00 00 00 02 FF 01
+ 29 01 00 00 00 00 02 FB 01
+ 29 01 00 00 00 00 02 75 00
+ 29 01 00 00 00 00 02 76 8E
+ 29 01 00 00 00 00 02 77 00
+ 29 01 00 00 00 00 02 78 90
+ 29 01 00 00 00 00 02 79 00
+ 29 01 00 00 00 00 02 7A B2
+ 29 01 00 00 00 00 02 7B 00
+ 29 01 00 00 00 00 02 7C C7
+ 29 01 00 00 00 00 02 7D 00
+ 29 01 00 00 00 00 02 7E D7
+ 29 01 00 00 00 00 02 7F 00
+ 29 01 00 00 00 00 02 80 E9
+ 29 01 00 00 00 00 02 81 00
+ 29 01 00 00 00 00 02 82 F9
+ 29 01 00 00 00 00 02 83 01
+ 29 01 00 00 00 00 02 84 01
+ 29 01 00 00 00 00 02 85 01
+ 29 01 00 00 00 00 02 86 0B
+ 29 01 00 00 00 00 02 87 01
+ 29 01 00 00 00 00 02 88 3A
+ 29 01 00 00 00 00 02 89 01
+ 29 01 00 00 00 00 02 8A 5D
+ 29 01 00 00 00 00 02 8B 01
+ 29 01 00 00 00 00 02 8C 94
+ 29 01 00 00 00 00 02 8D 01
+ 29 01 00 00 00 00 02 8E BC
+ 29 01 00 00 00 00 02 8F 02
+ 29 01 00 00 00 00 02 90 00
+ 29 01 00 00 00 00 02 91 02
+ 29 01 00 00 00 00 02 92 39
+ 29 01 00 00 00 00 02 93 02
+ 29 01 00 00 00 00 02 94 3A
+ 29 01 00 00 00 00 02 95 02
+ 29 01 00 00 00 00 02 96 6B
+ 29 01 00 00 00 00 02 97 02
+ 29 01 00 00 00 00 02 98 A2
+ 29 01 00 00 00 00 02 99 02
+ 29 01 00 00 00 00 02 9A C7
+ 29 01 00 00 00 00 02 9B 02
+ 29 01 00 00 00 00 02 9C FB
+ 29 01 00 00 00 00 02 9D 03
+ 29 01 00 00 00 00 02 9E 20
+ 29 01 00 00 00 00 02 9F 03
+ 29 01 00 00 00 00 02 A0 54
+ 29 01 00 00 00 00 02 A2 03
+ 29 01 00 00 00 00 02 A3 6D
+ 29 01 00 00 00 00 02 A4 03
+ 29 01 00 00 00 00 02 A5 80
+ 29 01 00 00 00 00 02 A6 03
+ 29 01 00 00 00 00 02 A7 81
+ 29 01 00 00 00 00 02 A9 03
+ 29 01 00 00 00 00 02 AA C7
+ 29 01 00 00 00 00 02 AB 03
+ 29 01 00 00 00 00 02 AC F0
+ 29 01 00 00 00 00 02 AD 03
+ 29 01 00 00 00 00 02 AE F8
+ 29 01 00 00 00 00 02 AF 03
+ 29 01 00 00 00 00 02 B0 FD
+ 29 01 00 00 00 00 02 B1 03
+ 29 01 00 00 00 00 02 B2 FE
+ 29 01 00 00 00 00 02 B3 00
+ 29 01 00 00 00 00 02 B4 8E
+ 29 01 00 00 00 00 02 B5 00
+ 29 01 00 00 00 00 02 B6 90
+ 29 01 00 00 00 00 02 B7 00
+ 29 01 00 00 00 00 02 B8 B2
+ 29 01 00 00 00 00 02 B9 00
+ 29 01 00 00 00 00 02 BA C7
+ 29 01 00 00 00 00 02 BB 00
+ 29 01 00 00 00 00 02 BC D7
+ 29 01 00 00 00 00 02 BD 00
+ 29 01 00 00 00 00 02 BE E9
+ 29 01 00 00 00 00 02 BF 00
+ 29 01 00 00 00 00 02 C0 F9
+ 29 01 00 00 00 00 02 C1 01
+ 29 01 00 00 00 00 02 C2 01
+ 29 01 00 00 00 00 02 C3 01
+ 29 01 00 00 00 00 02 C4 0B
+ 29 01 00 00 00 00 02 C5 01
+ 29 01 00 00 00 00 02 C6 3A
+ 29 01 00 00 00 00 02 C7 01
+ 29 01 00 00 00 00 02 C8 5D
+ 29 01 00 00 00 00 02 C9 01
+ 29 01 00 00 00 00 02 CA 94
+ 29 01 00 00 00 00 02 CB 01
+ 29 01 00 00 00 00 02 CC BC
+ 29 01 00 00 00 00 02 CD 02
+ 29 01 00 00 00 00 02 CE 00
+ 29 01 00 00 00 00 02 CF 02
+ 29 01 00 00 00 00 02 D0 39
+ 29 01 00 00 00 00 02 D1 02
+ 29 01 00 00 00 00 02 D2 3A
+ 29 01 00 00 00 00 02 D3 02
+ 29 01 00 00 00 00 02 D4 6B
+ 29 01 00 00 00 00 02 D5 02
+ 29 01 00 00 00 00 02 D6 A2
+ 29 01 00 00 00 00 02 D7 02
+ 29 01 00 00 00 00 02 D8 C7
+ 29 01 00 00 00 00 02 D9 02
+ 29 01 00 00 00 00 02 DA FB
+ 29 01 00 00 00 00 02 DB 03
+ 29 01 00 00 00 00 02 DC 20
+ 29 01 00 00 00 00 02 DD 03
+ 29 01 00 00 00 00 02 DE 54
+ 29 01 00 00 00 00 02 DF 03
+ 29 01 00 00 00 00 02 E0 6D
+ 29 01 00 00 00 00 02 E1 03
+ 29 01 00 00 00 00 02 E2 80
+ 29 01 00 00 00 00 02 E3 03
+ 29 01 00 00 00 00 02 E4 81
+ 29 01 00 00 00 00 02 E5 03
+ 29 01 00 00 00 00 02 E6 C7
+ 29 01 00 00 00 00 02 E7 03
+ 29 01 00 00 00 00 02 E8 F0
+ 29 01 00 00 00 00 02 E9 03
+ 29 01 00 00 00 00 02 EA F8
+ 29 01 00 00 00 00 02 EB 03
+ 29 01 00 00 00 00 02 EC FD
+ 29 01 00 00 00 00 02 ED 03
+ 29 01 00 00 00 00 02 EE FE
+ 29 01 00 00 00 00 02 EF 00
+ 29 01 00 00 00 00 02 F0 03
+ 29 01 00 00 00 00 02 F1 00
+ 29 01 00 00 00 00 02 F2 0B
+ 29 01 00 00 00 00 02 F3 00
+ 29 01 00 00 00 00 02 F4 0D
+ 29 01 00 00 00 00 02 F5 00
+ 29 01 00 00 00 00 02 F6 4A
+ 29 01 00 00 00 00 02 F7 00
+ 29 01 00 00 00 00 02 F8 71
+ 29 01 00 00 00 00 02 F9 00
+ 29 01 00 00 00 00 02 FA 8C
+ 29 01 00 00 00 00 02 FF 02
+ 29 01 00 00 00 00 02 FB 01
+ 29 01 00 00 00 00 02 00 00
+ 29 01 00 00 00 00 02 01 A1
+ 29 01 00 00 00 00 02 02 00
+ 29 01 00 00 00 00 02 03 B6
+ 29 01 00 00 00 00 02 04 00
+ 29 01 00 00 00 00 02 05 C9
+ 29 01 00 00 00 00 02 06 00
+ 29 01 00 00 00 00 02 07 FD
+ 29 01 00 00 00 00 02 08 01
+ 29 01 00 00 00 00 02 09 29
+ 29 01 00 00 00 00 02 0A 01
+ 29 01 00 00 00 00 02 0B 6B
+ 29 01 00 00 00 00 02 0C 01
+ 29 01 00 00 00 00 02 0D 9E
+ 29 01 00 00 00 00 02 0E 01
+ 29 01 00 00 00 00 02 0F EB
+ 29 01 00 00 00 00 02 10 02
+ 29 01 00 00 00 00 02 11 25
+ 29 01 00 00 00 00 02 12 02
+ 29 01 00 00 00 00 02 13 27
+ 29 01 00 00 00 00 02 14 02
+ 29 01 00 00 00 00 02 15 5C
+ 29 01 00 00 00 00 02 16 02
+ 29 01 00 00 00 00 02 17 95
+ 29 01 00 00 00 00 02 18 02
+ 29 01 00 00 00 00 02 19 BA
+ 29 01 00 00 00 00 02 1A 02
+ 29 01 00 00 00 00 02 1B EC
+ 29 01 00 00 00 00 02 1C 03
+ 29 01 00 00 00 00 02 1D 0C
+ 29 01 00 00 00 00 02 1E 03
+ 29 01 00 00 00 00 02 1F 34
+ 29 01 00 00 00 00 02 20 03
+ 29 01 00 00 00 00 02 21 3F
+ 29 01 00 00 00 00 02 22 03
+ 29 01 00 00 00 00 02 23 48
+ 29 01 00 00 00 00 02 24 03
+ 29 01 00 00 00 00 02 25 49
+ 29 01 00 00 00 00 02 26 03
+ 29 01 00 00 00 00 02 27 6B
+ 29 01 00 00 00 00 02 28 03
+ 29 01 00 00 00 00 02 29 7E
+ 29 01 00 00 00 00 02 2A 03
+ 29 01 00 00 00 00 02 2B 8F
+ 29 01 00 00 00 00 02 2D 03
+ 29 01 00 00 00 00 02 2F 9E
+ 29 01 00 00 00 00 02 30 03
+ 29 01 00 00 00 00 02 31 A0
+ 29 01 00 00 00 00 02 32 00
+ 29 01 00 00 00 00 02 33 03
+ 29 01 00 00 00 00 02 34 00
+ 29 01 00 00 00 00 02 35 0B
+ 29 01 00 00 00 00 02 36 00
+ 29 01 00 00 00 00 02 37 0D
+ 29 01 00 00 00 00 02 38 00
+ 29 01 00 00 00 00 02 39 4A
+ 29 01 00 00 00 00 02 3A 00
+ 29 01 00 00 00 00 02 3B 71
+ 29 01 00 00 00 00 02 3D 00
+ 29 01 00 00 00 00 02 3F 8C
+ 29 01 00 00 00 00 02 40 00
+ 29 01 00 00 00 00 02 41 A1
+ 29 01 00 00 00 00 02 42 00
+ 29 01 00 00 00 00 02 43 B6
+ 29 01 00 00 00 00 02 44 00
+ 29 01 00 00 00 00 02 45 C9
+ 29 01 00 00 00 00 02 46 00
+ 29 01 00 00 00 00 02 47 FD
+ 29 01 00 00 00 00 02 48 01
+ 29 01 00 00 00 00 02 49 29
+ 29 01 00 00 00 00 02 4A 01
+ 29 01 00 00 00 00 02 4B 6B
+ 29 01 00 00 00 00 02 4C 01
+ 29 01 00 00 00 00 02 4D 9E
+ 29 01 00 00 00 00 02 4E 01
+ 29 01 00 00 00 00 02 4F EB
+ 29 01 00 00 00 00 02 50 02
+ 29 01 00 00 00 00 02 51 25
+ 29 01 00 00 00 00 02 52 02
+ 29 01 00 00 00 00 02 53 27
+ 29 01 00 00 00 00 02 54 02
+ 29 01 00 00 00 00 02 55 5C
+ 29 01 00 00 00 00 02 56 02
+ 29 01 00 00 00 00 02 58 95
+ 29 01 00 00 00 00 02 59 02
+ 29 01 00 00 00 00 02 5A BA
+ 29 01 00 00 00 00 02 5B 02
+ 29 01 00 00 00 00 02 5C EC
+ 29 01 00 00 00 00 02 5D 03
+ 29 01 00 00 00 00 02 5E 0C
+ 29 01 00 00 00 00 02 5F 03
+ 29 01 00 00 00 00 02 60 34
+ 29 01 00 00 00 00 02 61 03
+ 29 01 00 00 00 00 02 62 3F
+ 29 01 00 00 00 00 02 63 03
+ 29 01 00 00 00 00 02 64 48
+ 29 01 00 00 00 00 02 65 03
+ 29 01 00 00 00 00 02 66 49
+ 29 01 00 00 00 00 02 67 03
+ 29 01 00 00 00 00 02 68 6B
+ 29 01 00 00 00 00 02 69 03
+ 29 01 00 00 00 00 02 6A 7E
+ 29 01 00 00 00 00 02 6B 03
+ 29 01 00 00 00 00 02 6C 8F
+ 29 01 00 00 00 00 02 6D 03
+ 29 01 00 00 00 00 02 6E 9E
+ 29 01 00 00 00 00 02 6F 03
+ 29 01 00 00 00 00 02 70 A0
+ 29 01 00 00 00 00 02 71 00
+ 29 01 00 00 00 00 02 72 FB
+ 29 01 00 00 00 00 02 73 00
+ 29 01 00 00 00 00 02 74 FD
+ 29 01 00 00 00 00 02 75 01
+ 29 01 00 00 00 00 02 76 05
+ 29 01 00 00 00 00 02 77 01
+ 29 01 00 00 00 00 02 78 0D
+ 29 01 00 00 00 00 02 79 01
+ 29 01 00 00 00 00 02 7A 17
+ 29 01 00 00 00 00 02 7B 01
+ 29 01 00 00 00 00 02 7C 1F
+ 29 01 00 00 00 00 02 7D 01
+ 29 01 00 00 00 00 02 7E 28
+ 29 01 00 00 00 00 02 7F 01
+ 29 01 00 00 00 00 02 80 32
+ 29 01 00 00 00 00 02 81 01
+ 29 01 00 00 00 00 02 82 38
+ 29 01 00 00 00 00 02 83 01
+ 29 01 00 00 00 00 02 84 53
+ 29 01 00 00 00 00 02 85 01
+ 29 01 00 00 00 00 02 86 72
+ 29 01 00 00 00 00 02 87 01
+ 29 01 00 00 00 00 02 88 9B
+ 29 01 00 00 00 00 02 89 01
+ 29 01 00 00 00 00 02 8A C3
+ 29 01 00 00 00 00 02 8B 02
+ 29 01 00 00 00 00 02 8C 01
+ 29 01 00 00 00 00 02 8D 02
+ 29 01 00 00 00 00 02 8E 36
+ 29 01 00 00 00 00 02 8F 02
+ 29 01 00 00 00 00 02 90 37
+ 29 01 00 00 00 00 02 91 02
+ 29 01 00 00 00 00 02 92 69
+ 29 01 00 00 00 00 02 93 02
+ 29 01 00 00 00 00 02 94 A1
+ 29 01 00 00 00 00 02 95 02
+ 29 01 00 00 00 00 02 96 C8
+ 29 01 00 00 00 00 02 97 02
+ 29 01 00 00 00 00 02 98 FF
+ 29 01 00 00 00 00 02 99 03
+ 29 01 00 00 00 00 02 9A 26
+ 29 01 00 00 00 00 02 9B 03
+ 29 01 00 00 00 00 02 9C 69
+ 29 01 00 00 00 00 02 9D 03
+ 29 01 00 00 00 00 02 9E 88
+ 29 01 00 00 00 00 02 9F 03
+ 29 01 00 00 00 00 02 A0 F8
+ 29 01 00 00 00 00 02 A2 03
+ 29 01 00 00 00 00 02 A3 F9
+ 29 01 00 00 00 00 02 A4 03
+ 29 01 00 00 00 00 02 A5 FE
+ 29 01 00 00 00 00 02 A6 03
+ 29 01 00 00 00 00 02 A7 FE
+ 29 01 00 00 00 00 02 A9 03
+ 29 01 00 00 00 00 02 AA FE
+ 29 01 00 00 00 00 02 AB 03
+ 29 01 00 00 00 00 02 AC FE
+ 29 01 00 00 00 00 02 AD 03
+ 29 01 00 00 00 00 02 AE FE
+ 29 01 00 00 00 00 02 AF 00
+ 29 01 00 00 00 00 02 B0 FB
+ 29 01 00 00 00 00 02 B1 00
+ 29 01 00 00 00 00 02 B2 FD
+ 29 01 00 00 00 00 02 B3 01
+ 29 01 00 00 00 00 02 B4 05
+ 29 01 00 00 00 00 02 B5 01
+ 29 01 00 00 00 00 02 B6 0D
+ 29 01 00 00 00 00 02 B7 01
+ 29 01 00 00 00 00 02 B8 17
+ 29 01 00 00 00 00 02 B9 01
+ 29 01 00 00 00 00 02 BA 1F
+ 29 01 00 00 00 00 02 BB 01
+ 29 01 00 00 00 00 02 BC 28
+ 29 01 00 00 00 00 02 BD 01
+ 29 01 00 00 00 00 02 BE 32
+ 29 01 00 00 00 00 02 BF 01
+ 29 01 00 00 00 00 02 C0 38
+ 29 01 00 00 00 00 02 C1 01
+ 29 01 00 00 00 00 02 C2 53
+ 29 01 00 00 00 00 02 C3 01
+ 29 01 00 00 00 00 02 C4 72
+ 29 01 00 00 00 00 02 C5 01
+ 29 01 00 00 00 00 02 C6 9B
+ 29 01 00 00 00 00 02 C7 01
+ 29 01 00 00 00 00 02 C8 C3
+ 29 01 00 00 00 00 02 C9 02
+ 29 01 00 00 00 00 02 CA 01
+ 29 01 00 00 00 00 02 CB 02
+ 29 01 00 00 00 00 02 CC 36
+ 29 01 00 00 00 00 02 CD 02
+ 29 01 00 00 00 00 02 CE 37
+ 29 01 00 00 00 00 02 CF 02
+ 29 01 00 00 00 00 02 D0 69
+ 29 01 00 00 00 00 02 D1 02
+ 29 01 00 00 00 00 02 D2 A1
+ 29 01 00 00 00 00 02 D3 02
+ 29 01 00 00 00 00 02 D4 C8
+ 29 01 00 00 00 00 02 D5 02
+ 29 01 00 00 00 00 02 D6 FF
+ 29 01 00 00 00 00 02 D7 03
+ 29 01 00 00 00 00 02 D8 26
+ 29 01 00 00 00 00 02 D9 03
+ 29 01 00 00 00 00 02 DA 69
+ 29 01 00 00 00 00 02 DB 03
+ 29 01 00 00 00 00 02 DC 88
+ 29 01 00 00 00 00 02 DD 03
+ 29 01 00 00 00 00 02 DE F8
+ 29 01 00 00 00 00 02 DF 03
+ 29 01 00 00 00 00 02 E0 F9
+ 29 01 00 00 00 00 02 E1 03
+ 29 01 00 00 00 00 02 E2 FE
+ 29 01 00 00 00 00 02 E3 03
+ 29 01 00 00 00 00 02 E4 FE
+ 29 01 00 00 00 00 02 E5 03
+ 29 01 00 00 00 00 02 E6 FE
+ 29 01 00 00 00 00 02 E7 03
+ 29 01 00 00 00 00 02 E8 FE
+ 29 01 00 00 00 00 02 E9 03
+ 29 01 00 00 00 00 02 EA FE
+ 29 01 00 00 00 00 02 FF 01
+ 29 01 00 00 00 00 02 FB 01
+ 29 01 00 00 00 00 02 FF 02
+ 29 01 00 00 00 00 02 FB 01
+ 29 01 00 00 00 00 02 FF 04
+ 29 01 00 00 00 00 02 FB 01
+ 29 01 00 00 00 00 02 FF 00
+ 29 01 00 00 00 00 02 D3 14
+ 29 01 00 00 00 00 02 D4 14
+ 29 01 00 00 96 00 02 11 00
+ 29 01 00 00 00 00 02 FF 00
+ 29 01 00 00 00 00 02 35 00
+ 29 01 00 00 78 00 02 29 00];
+
+ qcom,on-cmds-dsi-state = "DSI_LP_MODE";
+ qcom,panel-off-cmds = [05 01 00 00 32 00 02 28 00
+ 05 01 00 00 78 00 02 10 00];
+ qcom,off-cmds-dsi-state = "DSI_HS_MODE";
+ };
+};
diff --git a/arch/arm/boot/dts/dsi-v2-panel-hx8379a-wvga-video.dtsi b/arch/arm/boot/dts/dsi-v2-panel-hx8379a-wvga-video.dtsi
new file mode 100644
index 0000000..b9ed050
--- /dev/null
+++ b/arch/arm/boot/dts/dsi-v2-panel-hx8379a-wvga-video.dtsi
@@ -0,0 +1,117 @@
+/* Copyright (c) 2013, The Linux Foundation. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 and
+ * only version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+/ {
+ qcom,dsi_v2_hx8379a_wvga_video {
+ compatible = "qcom,dsi-panel-v2";
+ label = "HX8379A WVGA video mode dsi panel";
+ qcom,dsi-ctrl-phandle = <&mdss_dsi0>;
+ qcom,rst-gpio = <&msmgpio 41 0>;
+ vdda-supply = <&pm8110_l19>;
+ vddio-supply=<&pm8110_l14>;
+ qcom,mdss-pan-res = <480 800>;
+ qcom,mdss-pan-bpp = <24>;
+ qcom,mdss-pan-dest = "display_1";
+ qcom,mdss-pan-porch-values = <90 17 90 2 3 11>;
+ qcom,mdss-pan-underflow-clr = <0xff>;
+ qcom,mdss-pan-bl-levels = <1 255>;
+ qcom,mdss-pan-bl-ctrl = "bl_ctrl_wled";
+ qcom,mdss-pan-dsi-mode = <0>;
+ qcom,mdss-pan-dsi-h-pulse-mode = <1>;
+ qcom,mdss-pan-dsi-h-power-stop = <0 0 0>;
+ qcom,mdss-pan-dsi-bllp-power-stop = <1 1>;
+ qcom,mdss-pan-dsi-traffic-mode = <2>;
+ qcom,mdss-pan-dsi-dst-format = <3>;
+ qcom,mdss-pan-dsi-vc = <0>;
+ qcom,mdss-pan-dsi-rgb-swap = <0>;
+ qcom,mdss-pan-dsi-data-lanes = <1 1 0 0>;
+ qcom,mdss-pan-dsi-dlane-swap = <1>;
+ qcom,mdss-pan-dsi-t-clk = <0x1b 0x04>;
+ qcom,mdss-pan-dsi-stream = <0>;
+ qcom,mdss-pan-dsi-mdp-tr = <0x0>;/*todo*/
+ qcom,mdss-pan-dsi-dma-tr = <0x04>;
+ qcom,mdss-pan-dsi-frame-rate = <60>;
+ qcom,panel-phy-regulatorSettings =[09 08 05 00 20 03];
+ qcom,panel-phy-timingSettings = [5D 12 0C 00 33 39
+ 10 16 15 03 04 00];
+ qcom,panel-phy-strengthCtrl = [ff 06];
+ qcom,panel-phy-bistCtrl = [03 03 00 00 0f 00];
+ qcom,panel-phy-laneConfig =
+ [80 45 00 00 01 66 /*lane0**/
+ 80 45 00 00 01 66 /*lane1*/
+ 80 45 00 00 01 66 /*lane2*/
+ 80 45 00 00 01 66 /*lane3*/
+ 40 67 00 00 01 88]; /*Clk*/
+
+ qcom,on-cmds-dsi-state = "DSI_LP_MODE";
+ qcom,panel-on-cmds = [
+ 29 01 00 00 01 04
+ B9 FF 83 79
+ 23 01 00 00 01 02
+ BA 51
+ 29 01 00 00 01 14
+ B1 00 50 44
+ EA 8D 08 11
+ 0F 0F 24 2C
+ 9A 1A 42 0B
+ 6E F1 00 E6
+ 29 01 00 00 01 0e
+ B2 00 00 3C
+ 08 04 19 22
+ 00 FF 08 04
+ 19 20
+ 29 01 00 00 01 20
+ B4 80 08 00
+ 32 10 03 32
+ 13 70 32 10
+ 08 37 01 28
+ 05 37 08 3C
+ 20 44 44 08
+ 00 40 08 28
+ 08 30 30 04
+ 23 01 00 00 01 02
+ cc 02
+ 29 01 00 00 01 30
+ D5 00 00 08
+ 00 01 05 00
+ 03 00 88 88
+ 88 88 23 01
+ 67 45 02 13
+ 88 88 88 88
+ 88 88 88 88
+ 88 88 54 76
+ 10 32 31 20
+ 88 88 88 88
+ 88 88 00 00
+ 00 00 00 00
+ 29 01 00 00 01 24
+ E0 79 00 00
+ 02 1C 1F 33
+ 28 3E 07 0E
+ 0F 15 17 16
+ 16 13 19 00
+ 00 02 1C 1F
+ 33 28 3E 07
+ 0E 0F 15 17
+ 16 16 13 19
+ 29 01 00 00 01 05
+ B6 00 A6 00 A6
+ 05 01 00 00 96 02
+ 11 00
+ 05 01 00 00 78 02
+ 29 00
+ ];
+ qcom,panel-off-cmds = [05 01 00 00 32 02 28 00
+ 05 01 00 00 78 02 10 00];
+ qcom,off-cmds-dsi-state = "DSI_LP_MODE";
+ };
+};
diff --git a/arch/arm/boot/dts/dsi-v2-panel-truly-wvga-video.dtsi b/arch/arm/boot/dts/dsi-v2-panel-truly-wvga-video.dtsi
index a3718aa..891eac3 100644
--- a/arch/arm/boot/dts/dsi-v2-panel-truly-wvga-video.dtsi
+++ b/arch/arm/boot/dts/dsi-v2-panel-truly-wvga-video.dtsi
@@ -55,62 +55,62 @@
qcom,on-cmds-dsi-state = "DSI_LP_MODE";
qcom,panel-on-cmds = [
- 05 01 00 00 01 02
+ 05 01 00 00 00 02
01 00
- 23 01 00 00 01 02
+ 23 01 00 00 00 02
b0 04
- 29 01 00 00 01 03
+ 29 01 00 00 00 03
b3 02 00
- 23 01 00 00 01 02
+ 23 01 00 00 00 02
bd 00
- 29 01 00 00 01 03
+ 29 01 00 00 00 03
c0 18 66
- 29 01 00 00 01 10
+ 29 01 00 00 00 10
c1 23 31 99 21 20 00 30 28 0c 0c
00 00 00 21 01
- 29 01 00 00 01 07
+ 29 01 00 00 00 07
c2 10 06 06 01 03 00
- 29 01 00 00 01 19
+ 29 01 00 00 00 19
c8 04 10 18 20 2e 46 3c 28 1f 18
10 04 04 10 18 20 2e 46 3c 28 1f 18 10 04
- 29 01 00 00 01 19
+ 29 01 00 00 00 19
c9 04 10 18 20 2e 46 3c 28 1f 18
10 04 04 10 18 20 2e 46 3c 28 1f 18 10 04
- 29 01 00 00 01 19
+ 29 01 00 00 00 19
ca 04 10 18 20 2e 46 3c 28 1f 18
10 04 04 10 18 20 2e 46 3c 28 1f 18 10 04
- 29 01 00 00 01 11
+ 29 01 00 00 00 11
d0 29 03 ce a6 00 43 20 10 01 00
01 01 00 03 01 00
- 29 01 00 00 01 08
+ 29 01 00 00 00 08
d1 18 0C 23 03 75 02 50
- 23 01 00 00 01 02
+ 23 01 00 00 00 02
d3 11
- 29 01 00 00 01 03
+ 29 01 00 00 00 03
d5 2a 2a
- 29 01 00 00 01 03
+ 29 01 00 00 00 03
de 01 41
- 23 01 00 00 01 02
+ 23 01 00 00 00 02
e6 51
- 23 01 00 00 01 02
+ 23 01 00 00 00 02
fa 03
23 01 00 00 64 02
d6 28
- 39 01 00 00 01 05
+ 39 01 00 00 00 05
2a 00 00 01 df
- 39 01 00 00 01 05
+ 39 01 00 00 00 05
2b 00 00 03 1f
- 15 01 00 00 01 02
+ 15 01 00 00 00 02
35 00
- 39 01 00 00 01 03
+ 39 01 00 00 00 03
44 00 50
- 15 01 00 00 01 02
+ 15 01 00 00 00 02
36 c1
- 15 01 00 00 01 02
+ 15 01 00 00 00 02
3a 77
- 05 01 00 00 96 02
+ 05 01 00 00 7D 02
11 00
- 05 01 00 00 64 02
+ 05 01 00 00 14 02
29 00
];
qcom,panel-off-cmds = [05 01 00 00 32 02 28 00
diff --git a/arch/arm/boot/dts/fsm9900.dtsi b/arch/arm/boot/dts/fsm9900.dtsi
index 766db36..b74e58f 100644
--- a/arch/arm/boot/dts/fsm9900.dtsi
+++ b/arch/arm/boot/dts/fsm9900.dtsi
@@ -91,4 +91,14 @@
reg = <30>;
};
};
+
+ qcom,wdt@f9017000 {
+ compatible = "qcom,msm-watchdog";
+ reg = <0xf9017000 0x1000>;
+ interrupts = <0 3 0>, <0 4 0>;
+ qcom,bark-time = <11000>;
+ qcom,pet-time = <10000>;
+ qcom,ipi-ping;
+ };
+
};
diff --git a/arch/arm/boot/dts/mpq8092-rumi.dts b/arch/arm/boot/dts/mpq8092-rumi.dts
new file mode 100644
index 0000000..1abaf55
--- /dev/null
+++ b/arch/arm/boot/dts/mpq8092-rumi.dts
@@ -0,0 +1,28 @@
+/* Copyright (c) 2013, The Linux Foundation. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 and
+ * only version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+/dts-v1/;
+
+/include/ "mpq8092.dtsi"
+/include/ "mpq8092-rumi.dtsi"
+
+/ {
+ model = "Qualcomm MPQ8092 RUMI";
+ compatible = "qcom,mpq8092-rumi", "qcom,mpq8092", "qcom,rumi";
+ qcom,msm-id = <146 16 0>;
+};
+
+&soc {
+ serial@f9922000 {
+ status = "ok";
+ };
+};
diff --git a/arch/arm/boot/dts/mpq8092-rumi.dtsi b/arch/arm/boot/dts/mpq8092-rumi.dtsi
new file mode 100644
index 0000000..2016998
--- /dev/null
+++ b/arch/arm/boot/dts/mpq8092-rumi.dtsi
@@ -0,0 +1,134 @@
+/* Copyright (c) 2013, The Linux Foundation. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 and
+ * only version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+&soc {
+ timer {
+ clock-frequency = <5000000>;
+ };
+
+ timer@f9020000 {
+ clock-frequency = <5000000>;
+ };
+
+ usb@f9a55000 {
+ status = "disable";
+ };
+
+ qcom,sdcc@f9824000 {
+ status = "disabled";
+ qcom,clk-rates = <400000 19200000>;
+ };
+
+ qcom,sdcc@f98a4000 {
+ status = "disabled";
+ qcom,clk-rates = <400000 19200000>;
+ };
+
+ qcom,sps@f998000 {
+ status = "disable";
+ };
+
+ spi@f9924000 {
+ status = "disable";
+ };
+
+ spi@f9923000 {
+ compatible = "qcom,spi-qup-v2";
+ reg = <0xf9923000 0x1000>;
+ interrupts = <0 95 0>;
+ spi-max-frequency = <24000000>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ gpios = <&msmgpio 3 0>, /* CLK */
+ <&msmgpio 1 0>, /* MISO */
+ <&msmgpio 0 0>; /* MOSI */
+ cs-gpios = <&msmgpio 9 0>;
+
+ ethernet-switch@2 {
+ compatible = "simtec,ks8851";
+ reg = <2>;
+ interrupt-parent = <&msmgpio>;
+ interrupts = <90 0>;
+ spi-max-frequency = <5000000>;
+ };
+ };
+
+ i2c@f9966000 {
+ status = "disable";
+ };
+
+ i2c@f9967000 {
+ status = "disable";
+ cell-index = <0>;
+ compatible = "qcom,i2c-qup";
+ reg = <0Xf9967000 0x1000>;
+ reg-names = "qup_phys_addr";
+ interrupts = <0 105 0>;
+ interrupt-names = "qup_err_intr";
+ qcom,i2c-bus-freq = <100000>;
+ qcom,i2c-src-freq = <19200000>;
+ gpios = <&msmgpio 83 0>,/* DAT */
+ <&msmgpio 84 0>;/* CLK */
+ };
+
+ slim@fe12f000 {
+ status = "disable";
+ };
+
+ qcom,mdss_dsi@fd922800 {
+ status = "disable";
+ };
+
+ qcom,spmi@fc4c0000 {
+ status = "disable";
+ };
+
+ qcom,ssusb@F9200000 {
+ status = "disable";
+ };
+
+ qcom,lpass@fe200000 {
+ status = "disable";
+ };
+
+ qcom,pronto@fb21b000 {
+ status = "disable";
+ };
+
+ qcom,mss@fc880000 {
+ status = "disable";
+ };
+
+ qcom,kgsl-3d0@fdb00000 {
+ status = "disabled";
+ };
+};
+
+&gdsc_venus {
+ status = "disabled";
+};
+
+&gdsc_jpeg {
+ status = "disabled";
+};
+
+&gdsc_oxili_gx {
+ status = "disabled";
+};
+
+&gdsc_oxili_cx {
+ status = "disabled";
+};
+
+&gdsc_usb_hsic {
+ status = "disabled";
+};
diff --git a/arch/arm/boot/dts/mpq8092.dtsi b/arch/arm/boot/dts/mpq8092.dtsi
index cc19cce..e8674a0 100644
--- a/arch/arm/boot/dts/mpq8092.dtsi
+++ b/arch/arm/boot/dts/mpq8092.dtsi
@@ -55,6 +55,65 @@
clock-frequency = <19200000>;
};
+ timer@f9020000 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges;
+ compatible = "arm,armv7-timer-mem";
+ reg = <0xf9020000 0x1000>;
+ clock-frequency = <19200000>;
+
+ frame@f9021000 {
+ frame-number = <0>;
+ interrupts = <0 8 0x4>,
+ <0 7 0x4>;
+ reg = <0xf9021000 0x1000>,
+ <0xf9022000 0x1000>;
+ };
+
+ frame@f9023000 {
+ frame-number = <1>;
+ interrupts = <0 9 0x4>;
+ reg = <0xf9023000 0x1000>;
+ status = "disabled";
+ };
+
+ frame@f9024000 {
+ frame-number = <2>;
+ interrupts = <0 10 0x4>;
+ reg = <0xf9024000 0x1000>;
+ status = "disabled";
+ };
+
+ frame@f9025000 {
+ frame-number = <3>;
+ interrupts = <0 11 0x4>;
+ reg = <0xf9025000 0x1000>;
+ status = "disabled";
+ };
+
+ frame@f9026000 {
+ frame-number = <4>;
+ interrupts = <0 12 0x4>;
+ reg = <0xf9026000 0x1000>;
+ status = "disabled";
+ };
+
+ frame@f9027000 {
+ frame-number = <5>;
+ interrupts = <0 13 0x4>;
+ reg = <0xf9027000 0x1000>;
+ status = "disabled";
+ };
+
+ frame@f9028000 {
+ frame-number = <6>;
+ interrupts = <0 14 0x4>;
+ reg = <0xf9028000 0x1000>;
+ status = "disabled";
+ };
+ };
+
serial@f991f000 {
compatible = "qcom,msm-lsuart-v14";
reg = <0xf991f000 0x1000>;
@@ -62,6 +121,13 @@
status = "disabled";
};
+ serial@f9922000 {
+ compatible = "qcom,msm-lsuart-v14";
+ reg = <0xf9922000 0x1000>;
+ interrupts = <0 112 0>;
+ status = "disabled";
+ };
+
serial@f995e000 {
compatible = "qcom,msm-lsuart-v14";
reg = <0xf995e000 0x1000>;
diff --git a/arch/arm/boot/dts/msm-iommu-v0.dtsi b/arch/arm/boot/dts/msm-iommu-v0.dtsi
index 65075e5..2cfc5cf 100644
--- a/arch/arm/boot/dts/msm-iommu-v0.dtsi
+++ b/arch/arm/boot/dts/msm-iommu-v0.dtsi
@@ -326,16 +326,8 @@
compatible = "qcom,msm-smmu-v0-ctx";
reg = <0xfd890000 0x1000>;
interrupts = <0 65 0>;
- qcom,iommu-ctx-mids = <0>;
+ qcom,iommu-ctx-mids = <0 1 2 3 4 5 6 7 8 9>;
label = "vfe0";
};
-
- qcom,iommu-ctx@fd891000 {
- compatible = "qcom,msm-smmu-v0-ctx";
- reg = <0xfd891000 0x1000>;
- interrupts = <0 65 0>;
- qcom,iommu-ctx-mids = <1>;
- label = "vfe1";
- };
};
};
diff --git a/arch/arm/boot/dts/msm-iommu-v1.dtsi b/arch/arm/boot/dts/msm-iommu-v1.dtsi
index 1b22cd5..4492077 100644
--- a/arch/arm/boot/dts/msm-iommu-v1.dtsi
+++ b/arch/arm/boot/dts/msm-iommu-v1.dtsi
@@ -22,6 +22,13 @@
qcom,needs-alt-core-clk;
label = "jpeg_iommu";
status = "disabled";
+ qcom,msm-bus,name = "jpeg_ebi";
+ qcom,msm-bus,num-cases = <2>;
+ qcom,msm-bus,active-only;
+ qcom,msm-bus,num-paths = <1>;
+ qcom,msm-bus,vectors-KBps =
+ <62 512 0 0>,
+ <62 512 0 1000>;
qcom,iommu-pmu-ngroups = <1>;
qcom,iommu-pmu-ncounters = <8>;
@@ -110,6 +117,13 @@
interrupts = <0 73 0>;
qcom,iommu-secure-id = <1>;
label = "mdp_iommu";
+ qcom,msm-bus,name = "mdp_ebi";
+ qcom,msm-bus,num-cases = <2>;
+ qcom,msm-bus,active-only;
+ qcom,msm-bus,num-paths = <1>;
+ qcom,msm-bus,vectors-KBps =
+ <22 512 0 0>,
+ <22 512 0 1000>;
status = "disabled";
qcom,iommu-pmu-ngroups = <1>;
@@ -209,6 +223,13 @@
qcom,iommu-secure-id = <0>;
qcom,needs-alt-core-clk;
label = "venus_iommu";
+ qcom,msm-bus,name = "venus_ebi";
+ qcom,msm-bus,num-cases = <2>;
+ qcom,msm-bus,active-only;
+ qcom,msm-bus,num-paths = <1>;
+ qcom,msm-bus,vectors-KBps =
+ <63 512 0 0>,
+ <63 512 0 1000>;
status = "disabled";
qcom,iommu-pmu-ngroups = <1>;
@@ -317,6 +338,13 @@
reg-names = "iommu_base";
interrupts = <0 38 0>;
label = "kgsl_iommu";
+ qcom,msm-bus,name = "kgsl_ebi";
+ qcom,msm-bus,num-cases = <2>;
+ qcom,msm-bus,active-only;
+ qcom,msm-bus,num-paths = <1>;
+ qcom,msm-bus,vectors-KBps =
+ <26 512 0 0>,
+ <26 512 0 1000>;
status = "disabled";
qcom,iommu-pmu-ngroups = <1>;
@@ -392,6 +420,13 @@
interrupts = <0 62 0>;
qcom,needs-alt-core-clk;
label = "vfe_iommu";
+ qcom,msm-bus,name = "vfe_ebi";
+ qcom,msm-bus,num-cases = <2>;
+ qcom,msm-bus,active-only;
+ qcom,msm-bus,num-paths = <1>;
+ qcom,msm-bus,vectors-KBps =
+ <29 512 0 0>,
+ <29 512 0 1000>;
status = "disabled";
qcom,iommu-pmu-ngroups = <1>;
diff --git a/arch/arm/boot/dts/msm-pm8110.dtsi b/arch/arm/boot/dts/msm-pm8110.dtsi
index 8b091c1..0e446e2 100644
--- a/arch/arm/boot/dts/msm-pm8110.dtsi
+++ b/arch/arm/boot/dts/msm-pm8110.dtsi
@@ -22,6 +22,11 @@
#address-cells = <1>;
#size-cells = <1>;
+ qcom,revid@100 {
+ compatible = "qcom,qpnp-revid";
+ reg = <0x100 0x100>;
+ };
+
qcom,power-on@800 {
compatible = "qcom,qpnp-power-on";
reg = <0x800 0x100>;
@@ -53,7 +58,7 @@
status = "disabled";
qcom,vddmax-mv = <4200>;
- qcom,vddsafe-mv = <4200>;
+ qcom,vddsafe-mv = <4230>;
qcom,vinmin-mv = <4200>;
qcom,vbatdet-mv = <4100>;
qcom,ibatmax-ma = <1500>;
diff --git a/arch/arm/boot/dts/msm-pm8226.dtsi b/arch/arm/boot/dts/msm-pm8226.dtsi
index fe0000a..2008e1e 100644
--- a/arch/arm/boot/dts/msm-pm8226.dtsi
+++ b/arch/arm/boot/dts/msm-pm8226.dtsi
@@ -22,6 +22,11 @@
#address-cells = <1>;
#size-cells = <1>;
+ qcom,revid@100 {
+ compatible = "qcom,qpnp-revid";
+ reg = <0x100 0x100>;
+ };
+
qcom,power-on@800 {
compatible = "qcom,qpnp-power-on";
reg = <0x800 0x100>;
@@ -57,7 +62,7 @@
status = "disabled";
qcom,vddmax-mv = <4200>;
- qcom,vddsafe-mv = <4200>;
+ qcom,vddsafe-mv = <4230>;
qcom,vinmin-mv = <4200>;
qcom,vbatdet-delta-mv = <150>;
qcom,ibatmax-ma = <1500>;
@@ -793,9 +798,10 @@
qcom,leds@d300 {
compatible = "qcom,leds-qpnp";
- status = "disable";
+ status = "okay";
reg = <0xd300 0x100>;
label = "flash";
+ flash_boost-supply = <&pm8226_chg_boost>;
pm8226_flash0: qcom,flash_0 {
qcom,max-current = <1000>;
qcom,default-state = "off";
diff --git a/arch/arm/boot/dts/msm-pm8941.dtsi b/arch/arm/boot/dts/msm-pm8941.dtsi
index c78a144..b801da8 100644
--- a/arch/arm/boot/dts/msm-pm8941.dtsi
+++ b/arch/arm/boot/dts/msm-pm8941.dtsi
@@ -46,10 +46,13 @@
reg = <0x800 0x100>;
interrupts = <0x0 0x8 0x0>,
<0x0 0x8 0x1>,
- <0x0 0x8 0x4>;
- interrupt-names = "kpdpwr", "resin", "resin-bark";
+ <0x0 0x8 0x4>,
+ <0x0 0x8 0x5>;
+ interrupt-names = "kpdpwr", "resin",
+ "resin-bark", "kpdpwr-resin-bark";
qcom,pon-dbc-delay = <15625>;
qcom,system-reset;
+ qcom,s3-debounce = <32>;
qcom,pon_1 {
qcom,pon-type = <0>;
@@ -66,6 +69,15 @@
qcom,s2-type = <1>;
linux,code = <114>;
};
+
+ qcom,pon_3 {
+ qcom,pon-type = <3>;
+ qcom,support-reset = <1>;
+ qcom,s1-timer = <6720>;
+ qcom,s2-timer = <2000>;
+ qcom,s2-type = <7>;
+ qcom,pull-up = <1>;
+ };
};
bif_ctrl: qcom,bsi@1b00 {
@@ -136,14 +148,15 @@
<0x0 0x40 0x6>,
<0x0 0x40 0x7>;
- interrupt-names = "vsense_for_r",
- "vsense_avg",
- "sw_cc_thr",
- "ocv_thr",
- "charge_begin",
- "good_ocv",
+ interrupt-names = "cc_thr",
"ocv_for_r",
- "cc_thr";
+ "good_ocv",
+ "charge_begin",
+ "ocv_thr",
+ "sw_cc_thr",
+ "vsense_avg",
+ "vsense_for_r";
+
};
};
@@ -173,7 +186,7 @@
status = "disabled";
qcom,vddmax-mv = <4200>;
- qcom,vddsafe-mv = <4200>;
+ qcom,vddsafe-mv = <4230>;
qcom,vinmin-mv = <4300>;
qcom,ibatmax-ma = <1500>;
qcom,ibatterm-ma = <100>;
diff --git a/arch/arm/boot/dts/msm-pma8084.dtsi b/arch/arm/boot/dts/msm-pma8084.dtsi
index 30525aa..42c48f8 100644
--- a/arch/arm/boot/dts/msm-pma8084.dtsi
+++ b/arch/arm/boot/dts/msm-pma8084.dtsi
@@ -191,6 +191,76 @@
qcom,pin-num = <8>;
};
};
+
+ pma8084_vadc: vadc@3100 {
+ compatible = "qcom,qpnp-vadc";
+ reg = <0x3100 0x100>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ interrupts = <0x0 0x31 0x0>;
+ interrupt-names = "eoc-int-en-set";
+ qcom,adc-bit-resolution = <15>;
+ qcom,adc-vdd-reference = <1800>;
+
+ chan@8 {
+ label = "die_temp";
+ reg = <8>;
+ qcom,decimation = <0>;
+ qcom,pre-div-channel-scaling = <0>;
+ qcom,calibration-type = "absolute";
+ qcom,scale-function = <3>;
+ qcom,hw-settle-time = <0>;
+ qcom,fast-avg-setup = <0>;
+ };
+
+ chan@9 {
+ label = "ref_625mv";
+ reg = <9>;
+ qcom,decimation = <0>;
+ qcom,pre-div-channel-scaling = <0>;
+ qcom,calibration-type = "absolute";
+ qcom,scale-function = <0>;
+ qcom,hw-settle-time = <0>;
+ qcom,fast-avg-setup = <0>;
+ };
+
+ chan@a {
+ label = "ref_1250v";
+ reg = <0xa>;
+ qcom,decimation = <0>;
+ qcom,pre-div-channel-scaling = <0>;
+ qcom,calibration-type = "absolute";
+ qcom,scale-function = <0>;
+ qcom,hw-settle-time = <0>;
+ qcom,fast-avg-setup = <0>;
+ };
+
+ chan@c {
+ label = "ref_buf_625mv";
+ reg = <0xc>;
+ qcom,decimation = <0>;
+ qcom,pre-div-channel-scaling = <0>;
+ qcom,calibration-type = "absolute";
+ qcom,scale-function = <0>;
+ qcom,hw-settle-time = <0>;
+ qcom,fast-avg-setup = <0>;
+ };
+ };
+
+ pma8084_adc_tm: vadc@3400 {
+ compatible = "qcom,qpnp-adc-tm";
+ reg = <0x3400 0x100>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ interrupts = <0x0 0x34 0x0>,
+ <0x0 0x34 0x3>,
+ <0x0 0x34 0x4>;
+ interrupt-names = "eoc-int-en-set",
+ "high-thr-en-set",
+ "low-thr-en-set";
+ qcom,adc-bit-resolution = <15>;
+ qcom,adc-vdd-reference = <1800>;
+ };
};
qcom,pma8084@1 {
diff --git a/arch/arm/boot/dts/msm8226-cdp.dtsi b/arch/arm/boot/dts/msm8226-cdp.dtsi
index 5c5b8b0..308a6f5 100644
--- a/arch/arm/boot/dts/msm8226-cdp.dtsi
+++ b/arch/arm/boot/dts/msm8226-cdp.dtsi
@@ -34,7 +34,6 @@
synaptics,irq-gpio = <&msmgpio 17 0x2008>;
synaptics,button-map = <139 102 158>;
synaptics,i2c-pull-up;
- synaptics,reg-en;
};
};
@@ -168,8 +167,6 @@
qcom,vdd-current-level = <9000 800000>;
vdd-io-supply = <&pm8226_l21>;
- qcom,vdd-io-always-on;
- qcom,vdd-io-lpm-sup;
qcom,vdd-io-voltage-level = <1800000 2950000>;
qcom,vdd-io-current-level = <6 22000>;
@@ -205,8 +202,6 @@
qcom,vdd-current-level = <9000 800000>;
vdd-io-supply = <&pm8226_l21>;
- qcom,vdd-io-always-on;
- qcom,vdd-io-lpm-sup;
qcom,vdd-io-voltage-level = <1800000 2950000>;
qcom,vdd-io-current-level = <6 22000>;
@@ -259,13 +254,15 @@
qcom,max-current = <40>;
qcom,current-setting = <5>;
qcom,id = <6>;
- qcom,mode = "lpg";
+ qcom,mode = "pwm";
+ qcom,pwm-us = <1000>;
qcom,source-sel = <8>;
qcom,mode-ctrl = <0x60>;
qcom,pwm-channel = <0>;
qcom,start-idx = <1>;
qcom,duty-pcts = [00 00 00 00 64
64 00 00 00 00];
+ qcom,use-blink;
};
};
@@ -279,13 +276,15 @@
qcom,max-current = <40>;
qcom,current-setting = <5>;
qcom,id = <6>;
+ qcom,mode = "pwm";
+ qcom,pwm-us = <1000>;
qcom,mode-ctrl = <0x60>;
qcom,source-sel = <10>;
- qcom,mode = "lpg";
qcom,pwm-channel = <5>;
qcom,start-idx = <1>;
qcom,duty-pcts = [00 00 00 00 64
64 00 00 00 00];
+ qcom,use-blink;
};
};
};
@@ -368,6 +367,12 @@
};
mpp@a400 { /* MPP 5 */
+ /* PA_THERM0 config */
+ qcom,mode = <4>; /* AIN input */
+ qcom,invert = <1>; /* Enable MPP */
+ qcom,ain-route = <0>; /* AMUX 5 */
+ qcom,master-en = <1>;
+ qcom,src-sel = <0>; /* Function constant */
};
mpp@a500 { /* MPP 6 */
@@ -377,14 +382,48 @@
};
mpp@a700 { /* MPP 8 */
+ /* PA_THERM1 config */
+ qcom,mode = <4>; /* AIN input */
+ qcom,invert = <1>; /* Enable MPP */
+ qcom,ain-route = <3>; /* AMUX 8 */
+ qcom,master-en = <1>;
+ qcom,src-sel = <0>; /* Function constant */
};
};
&pm8226_chg {
qcom,charging-disabled;
qcom,use-default-batt-values;
+
+ qcom,bat-if@1200 {
+ status = "disabled";
+ };
};
&usb_otg_sw {
status = "okay";
};
+
+&pm8226_vadc {
+ chan@14 {
+ label = "pa_therm0";
+ reg = <0x14>;
+ qcom,decimation = <0>;
+ qcom,pre-div-channel-scaling = <0>;
+ qcom,calibration-type = "ratiometric";
+ qcom,scale-function = <2>;
+ qcom,hw-settle-time = <2>;
+ qcom,fast-avg-setup = <0>;
+ };
+
+ chan@17 {
+ label = "pa_therm1";
+ reg = <0x17>;
+ qcom,decimation = <0>;
+ qcom,pre-div-channel-scaling = <0>;
+ qcom,calibration-type = "ratiometric";
+ qcom,scale-function = <2>;
+ qcom,hw-settle-time = <2>;
+ qcom,fast-avg-setup = <0>;
+ };
+};
diff --git a/arch/arm/boot/dts/msm8226-mtp.dtsi b/arch/arm/boot/dts/msm8226-mtp.dtsi
index baa3539..acab5e4 100644
--- a/arch/arm/boot/dts/msm8226-mtp.dtsi
+++ b/arch/arm/boot/dts/msm8226-mtp.dtsi
@@ -34,7 +34,6 @@
synaptics,irq-gpio = <&msmgpio 17 0x2008>;
synaptics,button-map = <139 102 158>;
synaptics,i2c-pull-up;
- synaptics,reg-en;
};
};
@@ -103,6 +102,21 @@
};
};
+&usb_otg {
+ #address-cells = <0>;
+ interrupt-parent = <&usb_otg>;
+ interrupts = <0 1 2>;
+ #interrupt-cells = <1>;
+ interrupt-map-mask = <0xffffffff>;
+ interrupt-map = <0 &intc 0 134 0
+ 1 &intc 0 140 0
+ 2 &spmi_bus 0x0 0x0 0x9 0x0>;
+ interrupt-names = "core_irq", "async_irq", "pmic_id_irq";
+
+ qcom,hsusb-otg-mode = <3>;
+ vbus_otg-supply = <&usb_otg_sw>;
+};
+
&sdcc1 {
vdd-supply = <&pm8226_l17>;
qcom,vdd-always-on;
@@ -159,8 +173,6 @@
qcom,vdd-current-level = <9000 800000>;
vdd-io-supply = <&pm8226_l21>;
- qcom,vdd-io-always-on;
- qcom,vdd-io-lpm-sup;
qcom,vdd-io-voltage-level = <1800000 2950000>;
qcom,vdd-io-current-level = <6 22000>;
@@ -193,8 +205,6 @@
qcom,vdd-current-level = <9000 800000>;
vdd-io-supply = <&pm8226_l21>;
- qcom,vdd-io-always-on;
- qcom,vdd-io-lpm-sup;
qcom,vdd-io-voltage-level = <1800000 2950000>;
qcom,vdd-io-current-level = <6 22000>;
@@ -247,13 +257,15 @@
qcom,max-current = <40>;
qcom,current-setting = <5>;
qcom,id = <6>;
- qcom,mode = "lpg";
+ qcom,mode = "pwm";
+ qcom,pwm-us = <1000>;
qcom,source-sel = <8>;
qcom,mode-ctrl = <0x60>;
qcom,pwm-channel = <0>;
qcom,start-idx = <1>;
qcom,duty-pcts = [00 00 00 00 64
64 00 00 00 00];
+ qcom,use-blink;
};
};
@@ -267,13 +279,15 @@
qcom,max-current = <40>;
qcom,current-setting = <5>;
qcom,id = <6>;
+ qcom,mode = "pwm";
+ qcom,pwm-us = <1000>;
qcom,mode-ctrl = <0x60>;
qcom,source-sel = <10>;
- qcom,mode = "lpg";
qcom,pwm-channel = <5>;
qcom,start-idx = <1>;
qcom,duty-pcts = [00 00 00 00 64
64 00 00 00 00];
+ qcom,use-blink;
};
};
};
diff --git a/arch/arm/boot/dts/msm8226-pm.dtsi b/arch/arm/boot/dts/msm8226-pm.dtsi
index 3240efb..d9bd5e8 100644
--- a/arch/arm/boot/dts/msm8226-pm.dtsi
+++ b/arch/arm/boot/dts/msm8226-pm.dtsi
@@ -10,8 +10,6 @@
* GNU General Public License for more details.
*/
-/include/ "skeleton.dtsi"
-
&soc {
qcom,spm@f9089000 {
compatible = "qcom,spm-v2";
@@ -20,7 +18,7 @@
reg = <0xf9089000 0x1000>;
qcom,core-id = <0>;
qcom,saw2-ver-reg = <0xfd0>;
- qcom,saw2-cfg = <0x01>;
+ qcom,saw2-cfg = <0x00>;
qcom,saw2-spm-dly= <0x3c102800>;
qcom,saw2-spm-ctl = <0x0>;
qcom,saw2-spm-cmd-wfi = [60 03 60 0b 0f];
@@ -37,7 +35,7 @@
reg = <0xf9099000 0x1000>;
qcom,core-id = <1>;
qcom,saw2-ver-reg = <0xfd0>;
- qcom,saw2-cfg = <0x01>;
+ qcom,saw2-cfg = <0x00>;
qcom,saw2-spm-dly= <0x3c102800>;
qcom,saw2-spm-ctl = <0x0>;
qcom,saw2-spm-cmd-wfi = [60 03 60 0b 0f];
@@ -54,7 +52,7 @@
reg = <0xf90a9000 0x1000>;
qcom,core-id = <2>;
qcom,saw2-ver-reg = <0xfd0>;
- qcom,saw2-cfg = <0x01>;
+ qcom,saw2-cfg = <0x00>;
qcom,saw2-spm-dly= <0x3c102800>;
qcom,saw2-spm-ctl = <0x0>;
qcom,saw2-spm-cmd-wfi = [60 03 60 0b 0f];
@@ -71,7 +69,7 @@
reg = <0xf90b9000 0x1000>;
qcom,core-id = <3>;
qcom,saw2-ver-reg = <0xfd0>;
- qcom,saw2-cfg = <0x01>;
+ qcom,saw2-cfg = <0x00>;
qcom,saw2-spm-dly= <0x3c102800>;
qcom,saw2-spm-ctl = <0x0>;
qcom,saw2-spm-cmd-wfi = [60 03 60 0b 0f];
@@ -369,6 +367,13 @@
qcom,pc-resets-timer;
};
+ qcom,cpu-sleep-status@f9088008{
+ compatible = "qcom,cpu-sleep-status";
+ reg = <0xf9088008 0x100>;
+ qcom,cpu-alias-addr = <0x10000>;
+ qcom,sleep-status-mask= <0x80000>;
+ };
+
qcom,rpm-log@fc19dc00 {
compatible = "qcom,rpm-log";
reg = <0xfc19dc00 0x4000>;
@@ -386,4 +391,10 @@
reg-names = "phys_addr_base";
qcom,sleep-stats-version = <2>;
};
+
+ qcom,rpm-rbcpr-stats@fc000000 {
+ compatible = "qcom,rpmrbcpr-stats";
+ reg = <0xfc000000 0x1a0000>;
+ qcom,start-offset = <0x190010>;
+ };
};
diff --git a/arch/arm/boot/dts/msm8226-qrd.dtsi b/arch/arm/boot/dts/msm8226-qrd.dtsi
index 2a294e7..64cbb10 100644
--- a/arch/arm/boot/dts/msm8226-qrd.dtsi
+++ b/arch/arm/boot/dts/msm8226-qrd.dtsi
@@ -34,7 +34,6 @@
synaptics,irq-gpio = <&msmgpio 17 0x2008>;
synaptics,button-map = <139 102 158>;
synaptics,i2c-pull-up;
- synaptics,reg-en;
};
};
@@ -160,8 +159,6 @@
qcom,vdd-current-level = <9000 800000>;
vdd-io-supply = <&pm8226_l21>;
- qcom,vdd-io-always-on;
- qcom,vdd-io-lpm-sup;
qcom,vdd-io-voltage-level = <1800000 2950000>;
qcom,vdd-io-current-level = <6 22000>;
@@ -197,8 +194,6 @@
qcom,vdd-current-level = <9000 800000>;
vdd-io-supply = <&pm8226_l21>;
- qcom,vdd-io-always-on;
- qcom,vdd-io-lpm-sup;
qcom,vdd-io-voltage-level = <1800000 2950000>;
qcom,vdd-io-current-level = <6 22000>;
@@ -251,13 +246,15 @@
qcom,max-current = <40>;
qcom,current-setting = <5>;
qcom,id = <6>;
- qcom,mode = "lpg";
+ qcom,mode = "pwm";
+ qcom,pwm-us = <1000>;
qcom,source-sel = <8>;
qcom,mode-ctrl = <0x60>;
qcom,pwm-channel = <0>;
qcom,start-idx = <1>;
qcom,duty-pcts = [00 00 00 00 64
64 00 00 00 00];
+ qcom,use-blink;
};
};
@@ -271,13 +268,15 @@
qcom,max-current = <40>;
qcom,current-setting = <5>;
qcom,id = <6>;
+ qcom,mode = "pwm";
+ qcom,pwm-us = <1000>;
qcom,mode-ctrl = <0x60>;
qcom,source-sel = <10>;
- qcom,mode = "lpg";
qcom,pwm-channel = <5>;
qcom,start-idx = <1>;
qcom,duty-pcts = [00 00 00 00 64
64 00 00 00 00];
+ qcom,use-blink;
};
};
};
@@ -324,8 +323,9 @@
&pm8226_chg {
status = "okay";
- qcom,chg-vddmax-mv = <4350>;
- qcom,chg-vddsafe-mv = <4350>;
+ qcom,vddmax-mv = <4350>;
+ qcom,vddsafe-mv = <4380>;
+ qcom,tchg-mins = <240>;
};
&pm8226_gpios {
diff --git a/arch/arm/boot/dts/msm8226-regulator.dtsi b/arch/arm/boot/dts/msm8226-regulator.dtsi
index 3254d17..e1a0f0b 100644
--- a/arch/arm/boot/dts/msm8226-regulator.dtsi
+++ b/arch/arm/boot/dts/msm8226-regulator.dtsi
@@ -51,17 +51,19 @@
qcom,cpr-ref-clk = <19200>;
qcom,cpr-timer-delay = <5000>;
- qcom,cpr-timer-cons-up = <1>;
+ qcom,cpr-timer-cons-up = <0>;
qcom,cpr-timer-cons-down = <2>;
qcom,cpr-irq-line = <0>;
qcom,cpr-step-quotient = <15>;
- qcom,cpr-up-threshold = <1>;
- qcom,cpr-down-threshold = <2>;
- qcom,cpr-idle-clocks = <5>;
+ qcom,cpr-up-threshold = <0>;
+ qcom,cpr-down-threshold = <10>;
+ qcom,cpr-idle-clocks = <0>;
qcom,cpr-gcnt-time = <1>;
qcom,vdd-apc-step-up-limit = <1>;
qcom,vdd-apc-step-down-limit = <1>;
qcom,cpr-apc-volt-step = <5000>;
+
+ qcom,cpr-enable;
};
};
diff --git a/arch/arm/boot/dts/msm8226-v2-cdp.dts b/arch/arm/boot/dts/msm8226-v2-cdp.dts
index 2b18491..ef14249 100644
--- a/arch/arm/boot/dts/msm8226-v2-cdp.dts
+++ b/arch/arm/boot/dts/msm8226-v2-cdp.dts
@@ -13,6 +13,7 @@
/dts-v1/;
/include/ "msm8226-v2.dtsi"
/include/ "msm8226-cdp.dtsi"
+/include/ "msm8226-camera-sensor-cdp.dtsi"
/ {
model = "Qualcomm MSM 8226v2 CDP";
diff --git a/arch/arm/boot/dts/msm8226-v2-mtp.dts b/arch/arm/boot/dts/msm8226-v2-mtp.dts
index f15dd4c..24f822b 100644
--- a/arch/arm/boot/dts/msm8226-v2-mtp.dts
+++ b/arch/arm/boot/dts/msm8226-v2-mtp.dts
@@ -13,6 +13,7 @@
/dts-v1/;
/include/ "msm8226-v2.dtsi"
/include/ "msm8226-mtp.dtsi"
+/include/ "msm8226-camera-sensor-mtp.dtsi"
/ {
model = "Qualcomm MSM 8226v2 MTP";
diff --git a/arch/arm/boot/dts/msm8226-v2-qrd.dts b/arch/arm/boot/dts/msm8226-v2-qrd.dts
index 1a89d78..ad6d154 100644
--- a/arch/arm/boot/dts/msm8226-v2-qrd.dts
+++ b/arch/arm/boot/dts/msm8226-v2-qrd.dts
@@ -13,6 +13,7 @@
/dts-v1/;
/include/ "msm8226-v2.dtsi"
/include/ "msm8226-qrd.dtsi"
+/include/ "msm8226-camera-sensor-cdp.dtsi"
/ {
model = "Qualcomm MSM 8226v2 QRD";
diff --git a/arch/arm/boot/dts/msm8226-v2.dtsi b/arch/arm/boot/dts/msm8226-v2.dtsi
index d471bec..2148e1d 100644
--- a/arch/arm/boot/dts/msm8226-v2.dtsi
+++ b/arch/arm/boot/dts/msm8226-v2.dtsi
@@ -17,3 +17,49 @@
*/
/include/ "msm8226.dtsi"
+/include/ "msm8226-camera.dtsi"
+
+&pm8226_l3 {
+ regulator-min-microvolt = <750000>;
+ regulator-max-microvolt = <1287500>;
+};
+
+&pm8226_l3_ao {
+ regulator-min-microvolt = <750000>;
+ regulator-max-microvolt = <1287500>;
+};
+
+&pm8226_l3_so {
+ regulator-min-microvolt = <750000>;
+ regulator-max-microvolt = <1287500>;
+};
+
+&pm8226_s2 {
+ regulator-min-microvolt = <900000>;
+ regulator-max-microvolt = <1280000>;
+};
+
+&apc_vreg_corner {
+ qcom,pvs-bin-process = <1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 2
+ 2 2 2 2 2 3 3 3 3 3 3 3 3 3 3 3>;
+ qcom,pvs-corner-ceiling-slow = <1160000 1160000 1280000>;
+ qcom,pvs-corner-ceiling-nom = <980000 1080000 1200000>;
+ qcom,pvs-corner-ceiling-fast = <900000 1000000 1140000>;
+ qcom,cpr-step-quotient = <30>;
+ qcom,cpr-up-threshold = <0>;
+ qcom,cpr-down-threshold = <5>;
+ qcom,cpr-apc-volt-step = <10000>;
+};
+
+&msm_gpu {
+ /* Updated chip ID */
+ qcom,chipid = <0x03000512>;
+};
+
+&soc {
+ qcom,acpuclk@f9011050 {
+ reg = <0xf9011050 0x8>,
+ <0xfc4b80b0 0x8>;
+ reg-names = "rcg_base", "pte_efuse";
+ };
+};
diff --git a/arch/arm/boot/dts/msm8226.dtsi b/arch/arm/boot/dts/msm8226.dtsi
index 3c1f45b6..b14a406 100644
--- a/arch/arm/boot/dts/msm8226.dtsi
+++ b/arch/arm/boot/dts/msm8226.dtsi
@@ -241,7 +241,7 @@
};
};
- usb@f9a55000 {
+ usb_otg: usb@f9a55000 {
compatible = "qcom,hsusb-otg";
reg = <0xf9a55000 0x400>;
interrupts = <0 134 0>, <0 140 0>;
@@ -259,7 +259,7 @@
qcom,hsusb-otg-disable-reset;
qcom,dp-manual-pullup;
- qcom,msm-bus,name = "usb2";
+ qcom,msm-bus,name = "usb";
qcom,msm-bus,num-cases = <2>;
qcom,msm-bus,num-paths = <1>;
qcom,msm-bus,vectors-KBps =
@@ -918,6 +918,12 @@
compatible = "qcom,msm-rng";
reg = <0xf9bff000 0x200>;
qcom,msm-rng-iface-clk;
+ qcom,msm-bus,name = "msm-rng-noc";
+ qcom,msm-bus,num-cases = <2>;
+ qcom,msm-bus,num-paths = <1>;
+ qcom,msm-bus,vectors-KBps =
+ <1 618 0 0>,
+ <1 618 0 800>;
};
qcom,tz-log@fe805720 {
@@ -1012,6 +1018,12 @@
<55 512 0 0>,
<55 512 3936000 393600>;
};
+
+ cpu-pmu {
+ compatible = "arm,cortex-a7-pmu";
+ qcom,irq-is-percpu;
+ interrupts = <1 7 0xf00>;
+ };
};
&gdsc_venus {
diff --git a/arch/arm/boot/dts/msm8610-camera-sensor-cdp-mtp.dtsi b/arch/arm/boot/dts/msm8610-camera-sensor-cdp-mtp.dtsi
index d057260..1b4a594 100644
--- a/arch/arm/boot/dts/msm8610-camera-sensor-cdp-mtp.dtsi
+++ b/arch/arm/boot/dts/msm8610-camera-sensor-cdp-mtp.dtsi
@@ -113,4 +113,42 @@
qcom,cci-master = <0>;
status = "ok";
};
+
+ qcom,camera@78 {
+ compatible = "qcom,sp1628";
+ reg = <0x78>;
+ qcom,slave-id = <0x78 0x0 0x1628>;
+ qcom,csiphy-sd-index = <1>;
+ qcom,csid-sd-index = <1>;
+ qcom,mount-angle = <90>;
+ qcom,sensor-name = "sp1628";
+ cam_vdig-supply = <&pm8110_l2>;
+ cam_vana-supply = <&pm8110_l19>;
+ cam_vio-supply = <&pm8110_l14>;
+ qcom,cam-vreg-name = "cam_vdig", "cam_vio", "cam_vana";
+ qcom,cam-vreg-type = <0 0 0>;
+ qcom,cam-vreg-min-voltage = <1200000 1800000 2850000>;
+ qcom,cam-vreg-max-voltage = <1200000 1800000 2850000>;
+ qcom,cam-vreg-op-mode = <200000 80000 80000>;
+ qcom,gpio-no-mux = <0>;
+ gpios = <&msmgpio 14 0>,
+ <&msmgpio 15 0>,
+ <&msmgpio 8 0>;
+ qcom,gpio-reset = <1>;
+ qcom,gpio-standby = <2>;
+ qcom,gpio-req-tbl-num = <0 1 2>;
+ qcom,gpio-req-tbl-flags = <1 0 0>;
+ qcom,gpio-req-tbl-label = "CAMIF_MCLK",
+ "CAM_RESET",
+ "CAM_STANDBY";
+ qcom,gpio-set-tbl-num = <1 1>;
+ qcom,gpio-set-tbl-flags = <0 2>;
+ qcom,gpio-set-tbl-delay = <1000 4000>;
+ qcom,csi-lane-assign = <0xe4>;
+ qcom,csi-lane-mask = <0x3>;
+ qcom,sensor-position = <1>;
+ qcom,sensor-mode = <1>;
+ qcom,cci-master = <0>;
+ };
+
};
diff --git a/arch/arm/boot/dts/msm8610-cdp.dts b/arch/arm/boot/dts/msm8610-cdp.dts
index 1868a25..6891b90 100644
--- a/arch/arm/boot/dts/msm8610-cdp.dts
+++ b/arch/arm/boot/dts/msm8610-cdp.dts
@@ -51,7 +51,7 @@
/* Object 6, Instance = 0 */
00 00 00 00 00 00
/* Object 38, Instance = 0 */
- 1D 01 00 0C 04 0D 00 00
+ 1D 02 00 0A 06 0D 00 00
/* Object 7, Instance = 0 */
20 08 32
/* Object 8, Instance = 0 */
@@ -59,7 +59,7 @@
/* Object 9, Instance = 0 */
83 00 00 13 0B 00 20 32 01 03
00 32 05 30 0A 05 0A 00 70 03
- FC 01 00 36 2F 2C 00 00 40 00
+ FC 01 00 36 2F D8 00 00 40 00
00 0A 00 00 02
/* Object 18, Instance = 0 */
00 00
@@ -132,6 +132,16 @@
debounce-interval = <15>;
};
};
+
+ sound {
+ qcom,audio-routing =
+ "RX_BIAS", "MCLK",
+ "INT_LDO_H", "MCLK",
+ "MIC BIAS External", "Handset Mic",
+ "MIC BIAS Internal2", "Headset Mic",
+ "AMIC1", "MIC BIAS External",
+ "AMIC2", "MIC BIAS Internal2";
+ };
};
&i2c_cdc {
diff --git a/arch/arm/boot/dts/msm8610-ion.dtsi b/arch/arm/boot/dts/msm8610-ion.dtsi
index 456b60c..d625b95 100644
--- a/arch/arm/boot/dts/msm8610-ion.dtsi
+++ b/arch/arm/boot/dts/msm8610-ion.dtsi
@@ -33,6 +33,21 @@
reg = <27>;
linux,contiguous-region = <&qsecom_mem>;
};
+
+ qcom,ion-heap@23 { /* OTHER PIL HEAP */
+ compatible = "qcom,msm-ion-reserve";
+ reg = <23>;
+ qcom,heap-align = <0x1000>;
+ qcom,memory-fixed = <0x0bf00000 0x1A00000>;
+ };
+
+ qcom,ion-heap@26 { /* MODEM HEAP */
+ compatible = "qcom,msm-ion-reserve";
+ reg = <26>;
+ qcom,heap-align = <0x1000>;
+ qcom,memory-fixed = <0x08000000 0x3F00000>;
+ };
+
};
};
diff --git a/arch/arm/boot/dts/msm8610-mdss.dtsi b/arch/arm/boot/dts/msm8610-mdss.dtsi
index af0e3e4..d0fc1dc 100644
--- a/arch/arm/boot/dts/msm8610-mdss.dtsi
+++ b/arch/arm/boot/dts/msm8610-mdss.dtsi
@@ -20,8 +20,6 @@
mdss_fb0: qcom,mdss_fb_primary {
cell-index = <0>;
compatible = "qcom,mdss-fb";
- qcom,memory-reservation-type = "EBI1";
- qcom,memory-reservation-size = <0x300000>;
};
};
diff --git a/arch/arm/boot/dts/msm8610-mtp.dts b/arch/arm/boot/dts/msm8610-mtp.dts
index b52bfc9..ddbe3a0 100644
--- a/arch/arm/boot/dts/msm8610-mtp.dts
+++ b/arch/arm/boot/dts/msm8610-mtp.dts
@@ -51,7 +51,7 @@
/* Object 6, Instance = 0 */
00 00 00 00 00 00
/* Object 38, Instance = 0 */
- 1D 01 00 0C 04 0D 00 00
+ 1D 02 00 0A 06 0D 00 00
/* Object 7, Instance = 0 */
20 08 32
/* Object 8, Instance = 0 */
@@ -59,7 +59,7 @@
/* Object 9, Instance = 0 */
83 00 00 13 0B 00 20 32 01 03
00 32 05 30 0A 05 0A 00 70 03
- FC 01 00 36 2F 2C 00 00 40 00
+ FC 01 00 36 2F D8 00 00 40 00
00 0A 00 00 02
/* Object 18, Instance = 0 */
00 00
@@ -132,6 +132,16 @@
debounce-interval = <15>;
};
};
+
+ sound {
+ qcom,audio-routing =
+ "RX_BIAS", "MCLK",
+ "INT_LDO_H", "MCLK",
+ "MIC BIAS External", "Handset Mic",
+ "MIC BIAS Internal2", "Headset Mic",
+ "AMIC1", "MIC BIAS External",
+ "AMIC2", "MIC BIAS Internal2";
+ };
};
&i2c_cdc {
diff --git a/arch/arm/boot/dts/msm8610-pm.dtsi b/arch/arm/boot/dts/msm8610-pm.dtsi
index 938b2aa..c48eaf7 100644
--- a/arch/arm/boot/dts/msm8610-pm.dtsi
+++ b/arch/arm/boot/dts/msm8610-pm.dtsi
@@ -10,8 +10,6 @@
* GNU General Public License for more details.
*/
-/include/ "skeleton.dtsi"
-
&soc {
qcom,spm@f9089000 {
compatible = "qcom,spm-v2";
@@ -20,7 +18,7 @@
reg = <0xf9089000 0x1000>;
qcom,core-id = <0>;
qcom,saw2-ver-reg = <0xfd0>;
- qcom,saw2-cfg = <0x01>;
+ qcom,saw2-cfg = <0x00>;
qcom,saw2-spm-dly= <0x3c102800>;
qcom,saw2-spm-ctl = <0x0>;
qcom,saw2-spm-cmd-wfi = [60 03 60 0b 0f];
@@ -37,7 +35,7 @@
reg = <0xf9099000 0x1000>;
qcom,core-id = <1>;
qcom,saw2-ver-reg = <0xfd0>;
- qcom,saw2-cfg = <0x01>;
+ qcom,saw2-cfg = <0x00>;
qcom,saw2-spm-dly= <0x3c102800>;
qcom,saw2-spm-ctl = <0x0>;
qcom,saw2-spm-cmd-wfi = [60 03 60 0b 0f];
@@ -54,7 +52,7 @@
reg = <0xf90a9000 0x1000>;
qcom,core-id = <2>;
qcom,saw2-ver-reg = <0xfd0>;
- qcom,saw2-cfg = <0x01>;
+ qcom,saw2-cfg = <0x00>;
qcom,saw2-spm-dly= <0x3c102800>;
qcom,saw2-spm-ctl = <0x0>;
qcom,saw2-spm-cmd-wfi = [60 03 60 0b 0f];
@@ -71,7 +69,7 @@
reg = <0xf90b9000 0x1000>;
qcom,core-id = <3>;
qcom,saw2-ver-reg = <0xfd0>;
- qcom,saw2-cfg = <0x01>;
+ qcom,saw2-cfg = <0x00>;
qcom,saw2-spm-dly= <0x3c102800>;
qcom,saw2-spm-ctl = <0x0>;
qcom,saw2-spm-cmd-wfi = [60 03 60 0b 0f];
@@ -371,6 +369,13 @@
qcom,pc-resets-timer;
};
+ qcom,cpu-sleep-status@f9088008{
+ compatible = "qcom,cpu-sleep-status";
+ reg = <0xf9088008 0x100>;
+ qcom,cpu-alias-addr = <0x10000>;
+ qcom,sleep-status-mask= <0x80000>;
+ };
+
qcom,rpm-log@fc19dc00 {
compatible = "qcom,rpm-log";
reg = <0xfc19dc00 0x4000>;
@@ -388,4 +393,10 @@
reg-names = "phys_addr_base";
qcom,sleep-stats-version = <2>;
};
+
+ qcom,rpm-rbcpr-stats@fc000000 {
+ compatible = "qcom,rpmrbcpr-stats";
+ reg = <0xfc000000 0x1a0000>;
+ qcom,start-offset = <0x190010>;
+ };
};
diff --git a/arch/arm/boot/dts/msm8610-qrd-camera-sensor.dtsi b/arch/arm/boot/dts/msm8610-qrd-camera-sensor.dtsi
new file mode 100644
index 0000000..e73573a
--- /dev/null
+++ b/arch/arm/boot/dts/msm8610-qrd-camera-sensor.dtsi
@@ -0,0 +1,86 @@
+/*
+ * Copyright (c) 2012-2013, The Linux Foundation. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 and
+ * only version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+&i2c {
+ qcom,camera@7d {
+ compatible = "qcom,hi256";
+ reg = <0x7d>;
+ qcom,slave-id = <0x40 0x04 0xc0>;
+ qcom,csiphy-sd-index = <0>;
+ qcom,csid-sd-index = <0>;
+ qcom,mount-angle = <270>;
+ qcom,sensor-name = "hi256";
+ cam_vdig-supply = <&pm8110_l2>;
+ cam_vana-supply = <&pm8110_l19>;
+ cam_vio-supply = <&pm8110_l14>;
+ qcom,cam-vreg-name = "cam_vdig", "cam_vio", "cam_vana";
+ qcom,cam-vreg-type = <0 0 0>;
+ qcom,cam-vreg-min-voltage = <1200000 1800000 2850000>;
+ qcom,cam-vreg-max-voltage = <1200000 1800000 2850000>;
+ qcom,cam-vreg-op-mode = <200000 8000 80000>;
+ qcom,gpio-no-mux = <0>;
+ gpios = <&msmgpio 13 0>,
+ <&msmgpio 21 0>,
+ <&msmgpio 20 0>;
+ qcom,gpio-reset = <1>;
+ qcom,gpio-standby = <2>;
+ qcom,gpio-req-tbl-num = <0 1 2>;
+ qcom,gpio-req-tbl-flags = <1 0 0>;
+ qcom,gpio-req-tbl-label = "CAMIF_MCLK",
+ "CAM_RESET1",
+ "CAM_STANDBY";
+ qcom,csi-lane-assign = <0xe4>;
+ qcom,csi-lane-mask = <0x03>;
+ qcom,sensor-position = <0>;
+ qcom,sensor-mode = <1>;
+ qcom,cci-master = <0>;
+ };
+ qcom,camera@78 {
+ compatible = "shinetech,gc0339";
+ reg = <0x78>;
+ qcom,slave-id = <0x42 0x00 0xc8>;
+ qcom,csiphy-sd-index = <1>;
+ qcom,csid-sd-index = <1>;
+ qcom,mount-angle = <180>;
+ qcom,sensor-name = "SKUAA_ST_gc0339";
+ cam_vdig-supply = <&pm8110_l14>;
+ cam_vana-supply = <&pm8110_l19>;
+ cam_vio-supply = <&pm8110_l14>;
+ qcom,cam-vreg-name = "cam_vdig", "cam_vio", "cam_vana";
+ qcom,cam-vreg-type = <0 1 0>;
+ qcom,cam-vreg-min-voltage = <1800000 1800000 2850000>;
+ qcom,cam-vreg-max-voltage = <1800000 1800000 2850000>;
+ qcom,cam-vreg-op-mode = <200000 0 80000>;
+ qcom,gpio-no-mux = <0>;
+ gpios = <&msmgpio 14 0>,
+ <&msmgpio 15 0>,
+ <&msmgpio 88 0>;
+ qcom,gpio-reset = <1>;
+ qcom,gpio-standby = <2>;
+ qcom,gpio-req-tbl-num = <0 1 2>;
+ qcom,gpio-req-tbl-flags = <1 0 0>;
+ qcom,gpio-req-tbl-label = "CAMIF_MCLK",
+ "CAM_RESET",
+ "CAM_STANDBY";
+ qcom,gpio-set-tbl-num = <1 1>;
+ qcom,gpio-set-tbl-flags = <0 2>;
+ qcom,gpio-set-tbl-delay = <1000 4000>;
+ qcom,csi-lane-assign = <0xe4>;
+ qcom,csi-lane-mask = <0x3>;
+ qcom,sensor-position = <1>;
+ qcom,sensor-mode = <1>;
+ qcom,cci-master = <0>;
+ status = "ok";
+ };
+};
+
diff --git a/arch/arm/boot/dts/msm8610-qrd.dts b/arch/arm/boot/dts/msm8610-qrd.dts
index 4bab7e4..7b45194 100644
--- a/arch/arm/boot/dts/msm8610-qrd.dts
+++ b/arch/arm/boot/dts/msm8610-qrd.dts
@@ -13,6 +13,8 @@
/dts-v1/;
/include/ "msm8610.dtsi"
+/include/ "dsi-v2-panel-hx8379a-wvga-video.dtsi"
+/include/ "msm8610-qrd-camera-sensor.dtsi"
/ {
model = "Qualcomm MSM 8610 QRD";
@@ -22,10 +24,69 @@
};
&soc {
+ i2c@f9923000{
+ focaltech@38{
+ compatible = "focaltech,5x06";
+ reg = <0x38>;
+ interrupt-parent = <&msmgpio>;
+ interrupts = <1 0x2>;
+ vdd-supply = <&pm8110_l19>;
+ vcc_i2c-supply = <&pm8110_l14>;
+ focaltech,family-id = <0x06>;
+ focaltech,reset-gpio = <&msmgpio 0 0x00>;
+ focaltech,irq-gpio = <&msmgpio 1 0x00>;
+ focaltech,display-coords = <0 0 480 800>;
+ focaltech,panel-coords = <0 0 480 800>;
+ focaltech,button-map= <139 102 158>;
+ focaltech,no-force-update;
+ focaltech,i2c-pull-up;
+ };
+ };
+
+ gen-vkeys {
+ compatible = "qcom,gen-vkeys";
+ label = "ft5x06_ts";
+ qcom,disp-maxx = <480>;
+ qcom,disp-maxy = <800>;
+ qcom,panel-maxx = <481>;
+ qcom,panel-maxy = <940>;
+ qcom,key-codes = <139 0 102 158 0 0 0>;
+ qcom,y-offset = <0>;
+ };
serial@f991e000 {
status = "ok";
};
+ i2c@f9925000 { /* BLSP-1 QUP-3 */
+ kionix@f {
+ compatible = "kionix,kxtj9";
+ reg = <0x0f>;
+ interrupt-parent = <&msmgpio>;
+ interrupts = <81 0x2>;
+ vdd-supply = <&pm8110_l19>;
+ vio-supply = <&pm8110_l14>;
+ kionix,min_interval = <5>;
+ kionix,init_interval = <200>;
+ kionix,axis_map_x = <1>;
+ kionix,axis_map_y = <0>;
+ kionix,axis_map_z = <2>;
+ kionix,g-range = <2>;
+ kionix,negate-x;
+ kionix,negate-y;
+ kionix,negate-z;
+ kionix,res-12bit;
+ };
+ };
+
+ flashlight {
+ compatible = "qcom,leds-gpio-flash";
+ status = "okay";
+ qcom,flash-en = <&msmgpio 18 0>;
+ qcom,flash-now = <&msmgpio 19 0>;
+ linux,name = "flashlight";
+ linux,default-trigger = "flashlight-trigger";
+ };
+
gpio_keys {
compatible = "gpio-keys";
input-name = "gpio-keys";
@@ -102,6 +163,16 @@
reg = <0x55>;
};
};
+
+ sound {
+ qcom,audio-routing =
+ "RX_BIAS", "MCLK",
+ "INT_LDO_H", "MCLK",
+ "MIC BIAS Internal1", "Handset Mic",
+ "MIC BIAS Internal2", "Headset Mic",
+ "AMIC1", "MIC BIAS Internal1",
+ "AMIC2", "MIC BIAS Internal2";
+ };
};
&spmi_bus {
@@ -117,6 +188,7 @@
qcom,id = <6>;
qcom,source-sel = <1>;
qcom,mode-ctrl = <0x61>;
+ qcom,mode = "manual";
};
};
@@ -131,6 +203,7 @@
qcom,id = <6>;
qcom,source-sel = <1>;
qcom,mode-ctrl = <0x10>;
+ qcom,mode = "manual";
};
};
};
@@ -204,7 +277,6 @@
&pm8110_chg {
status = "ok";
- qcom,charging-disabled;
qcom,chgr@1000 {
status = "ok";
@@ -226,3 +298,33 @@
status = "ok";
};
};
+
+&pm8110_gpios {
+ gpio@c000 { /* GPIO 1 */
+ };
+
+ gpio@c100 { /* GPIO 2 */
+ };
+
+ gpio@c200 { /* GPIO 3 */
+ };
+
+ gpio@c300 { /* GPIO 4 */
+ };
+};
+
+&pm8110_mpps {
+ mpp@a000 { /* MPP 1 */
+ };
+
+ mpp@a100 { /* MPP 2 */
+ status = "disabled";
+ };
+
+ mpp@a200 { /* MPP 3 */
+ status = "disabled";
+ };
+
+ mpp@a300 { /* MPP 4 */
+ };
+};
diff --git a/arch/arm/boot/dts/msm8610-regulator.dtsi b/arch/arm/boot/dts/msm8610-regulator.dtsi
index 2c17780..09520c5 100644
--- a/arch/arm/boot/dts/msm8610-regulator.dtsi
+++ b/arch/arm/boot/dts/msm8610-regulator.dtsi
@@ -233,8 +233,27 @@
regulator-max-microvolt = <1800000>;
qcom,init-voltage = <1800000>;
status = "okay";
+ };
+
+ pm8110_l10_ao: regulator-l10-ao {
+ compatible = "qcom,rpm-regulator-smd";
+ regulator-name = "8110_l10_ao";
+ qcom,set = <1>;
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ qcom,init-voltage = <1800000>;
qcom,consumer-supplies = "vdd_sr2_pll", "";
};
+
+ pm8110_l10_so: regulator-l10-so {
+ compatible = "qcom,rpm-regulator-smd";
+ regulator-name = "8110_l10_so";
+ qcom,set = <2>;
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ qcom,init-voltage = <1800000>;
+ qcom,init-enable = <0>;
+ };
};
rpm-regulator-ldoa12 {
diff --git a/arch/arm/boot/dts/msm8610.dtsi b/arch/arm/boot/dts/msm8610.dtsi
index f5a19fe..ad0980c 100644
--- a/arch/arm/boot/dts/msm8610.dtsi
+++ b/arch/arm/boot/dts/msm8610.dtsi
@@ -237,6 +237,7 @@
android_usb@fe8050c8 {
compatible = "qcom,android-usb";
reg = <0xfe8050c8 0xc8>;
+ qcom,android-usb-swfi-latency = <1>;
};
sdcc1: qcom,sdcc@f9824000 {
@@ -412,9 +413,13 @@
rpm-standalone;
};
+ qcom,bcl {
+ compatible = "qcom,bcl";
+ };
+
qcom,msm-mem-hole {
compatible = "qcom,msm-mem-hole";
- qcom,memblock-remove = <0x07B00000 0x6400000>; /* Address and Size of Hole */
+ qcom,memblock-remove = <0x07b00000 0x6400000>; /* Address and Size of Hole */
};
qcom,wdt@f9017000 {
@@ -764,6 +769,9 @@
qcom,temp-hysteresis = <10>;
qcom,freq-step = <2>;
qcom,freq-control-mask = <0xf>;
+ qcom,core-limit-temp = <80>;
+ qcom,core-temp-hysteresis = <10>;
+ qcom,core-control-mask = <0xe>;
};
qcom,ipc-spinlock@fd484000 {
@@ -800,6 +808,12 @@
compatible = "qcom,msm-rng";
reg = <0xf9bff000 0x200>;
qcom,msm-rng-iface-clk;
+ qcom,msm-bus,name = "msm-rng-noc";
+ qcom,msm-bus,num-cases = <2>;
+ qcom,msm-bus,num-paths = <1>;
+ qcom,msm-bus,vectors-KBps =
+ <1 618 0 0>,
+ <1 618 0 800>;
};
qcom,msm-rtb {
diff --git a/arch/arm/boot/dts/msm8926-cdp.dts b/arch/arm/boot/dts/msm8926-cdp.dts
index 7a91d40..48d3ea9 100644
--- a/arch/arm/boot/dts/msm8926-cdp.dts
+++ b/arch/arm/boot/dts/msm8926-cdp.dts
@@ -14,9 +14,21 @@
/dts-v1/;
/include/ "msm8926.dtsi"
/include/ "msm8226-cdp.dtsi"
+/include/ "msm8226-camera-sensor-cdp.dtsi"
/ {
model = "Qualcomm MSM 8926 CDP";
compatible = "qcom,msm8926-cdp", "qcom,msm8926", "qcom,cdp";
qcom,msm-id = <200 1 0>;
};
+
+&pm8226_chg {
+ status = "ok";
+ qcom,charging-disabled;
+ qcom,use-default-batt-values;
+
+ qcom,bat-if@1200 {
+ status = "disabled";
+ };
+
+};
diff --git a/arch/arm/boot/dts/msm8926-mtp.dts b/arch/arm/boot/dts/msm8926-mtp.dts
index fea925d..dc6e60e 100644
--- a/arch/arm/boot/dts/msm8926-mtp.dts
+++ b/arch/arm/boot/dts/msm8926-mtp.dts
@@ -14,6 +14,7 @@
/dts-v1/;
/include/ "msm8926.dtsi"
/include/ "msm8226-mtp.dtsi"
+/include/ "msm8226-camera-sensor-mtp.dtsi"
/ {
model = "Qualcomm MSM 8926 MTP";
diff --git a/arch/arm/boot/dts/msm8926-qrd.dts b/arch/arm/boot/dts/msm8926-qrd.dts
index e056b7e..8497ba2 100644
--- a/arch/arm/boot/dts/msm8926-qrd.dts
+++ b/arch/arm/boot/dts/msm8926-qrd.dts
@@ -13,6 +13,7 @@
/dts-v1/;
/include/ "msm8926.dtsi"
/include/ "msm8226-qrd.dtsi"
+/include/ "msm8226-camera-sensor-cdp.dtsi"
/ {
model = "Qualcomm MSM 8926 QRD";
diff --git a/arch/arm/boot/dts/msm8926.dtsi b/arch/arm/boot/dts/msm8926.dtsi
index 6f3f592..d15459c 100644
--- a/arch/arm/boot/dts/msm8926.dtsi
+++ b/arch/arm/boot/dts/msm8926.dtsi
@@ -17,6 +17,7 @@
*/
/include/ "msm8226.dtsi"
+/include/ "msm8226-camera.dtsi"
/ {
model = "Qualcomm MSM 8926";
@@ -25,6 +26,50 @@
&soc {
qcom,mss@fc880000 {
+ reg = <0xfc880000 0x100>,
+ <0xfd485000 0x400>,
+ <0xfc820000 0x20>,
+ <0xfc401680 0x4>;
+ reg-names = "qdsp6_base", "halt_base", "rmb_base",
+ "restart_reg";
vdd_mss-supply = <&pm8226_s5>;
};
+
+ qcom,acpuclk@f9011050 {
+ reg = <0xf9011050 0x8>,
+ <0xfc4b80b0 0x8>;
+ reg-names = "rcg_base", "pte_efuse";
+ };
+};
+
+&pm8226_l3 {
+ regulator-min-microvolt = <750000>;
+ regulator-max-microvolt = <1287500>;
+};
+
+&pm8226_l3_ao {
+ regulator-min-microvolt = <750000>;
+ regulator-max-microvolt = <1287500>;
+};
+
+&pm8226_l3_so {
+ regulator-min-microvolt = <750000>;
+ regulator-max-microvolt = <1287500>;
+};
+
+&pm8226_s2 {
+ regulator-min-microvolt = <900000>;
+ regulator-max-microvolt = <1280000>;
+};
+
+&apc_vreg_corner {
+ qcom,pvs-bin-process = <1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 2
+ 2 2 2 2 2 3 3 3 3 3 3 3 3 3 3 3>;
+ qcom,pvs-corner-ceiling-slow = <1160000 1160000 1280000>;
+ qcom,pvs-corner-ceiling-nom = <980000 1080000 1200000>;
+ qcom,pvs-corner-ceiling-fast = <900000 1000000 1140000>;
+ qcom,cpr-step-quotient = <30>;
+ qcom,cpr-up-threshold = <0>;
+ qcom,cpr-down-threshold = <5>;
+ qcom,cpr-apc-volt-step = <10000>;
};
diff --git a/arch/arm/boot/dts/msm8974-camera-sensor-cdp.dtsi b/arch/arm/boot/dts/msm8974-camera-sensor-cdp.dtsi
index 4a9820d..26c5b8f 100644
--- a/arch/arm/boot/dts/msm8974-camera-sensor-cdp.dtsi
+++ b/arch/arm/boot/dts/msm8974-camera-sensor-cdp.dtsi
@@ -15,7 +15,7 @@
actuator0: qcom,actuator@18 {
cell-index = <0>;
- reg = <0x18 0x0>;
+ reg = <0x18>;
compatible = "qcom,actuator";
qcom,cci-master = <0>;
};
@@ -29,7 +29,7 @@
qcom,camera@6e {
compatible = "qcom,s5k3l1yx";
- reg = <0x6e 0x0>;
+ reg = <0x6e>;
qcom,slave-id = <0x6e 0x0 0x3121>;
qcom,csiphy-sd-index = <0>;
qcom,csid-sd-index = <0>;
@@ -116,7 +116,7 @@
qcom,camera@6c {
compatible = "qcom,ov2720";
- reg = <0x6c 0x0>;
+ reg = <0x6c>;
qcom,slave-id = <0x6c 0x300A 0x2720>;
qcom,csiphy-sd-index = <2>;
qcom,csid-sd-index = <2>;
@@ -153,7 +153,7 @@
qcom,camera@90 {
compatible = "qcom,mt9m114";
- reg = <0x90 0x0>;
+ reg = <0x90>;
qcom,slave-id = <0x90 0x0 0x2481>;
qcom,csiphy-sd-index = <1>;
qcom,csid-sd-index = <0>;
diff --git a/arch/arm/boot/dts/msm8974-camera-sensor-dragonboard.dtsi b/arch/arm/boot/dts/msm8974-camera-sensor-dragonboard.dtsi
index e84a47d..31f3a90 100644
--- a/arch/arm/boot/dts/msm8974-camera-sensor-dragonboard.dtsi
+++ b/arch/arm/boot/dts/msm8974-camera-sensor-dragonboard.dtsi
@@ -15,7 +15,7 @@
actuator0: qcom,actuator@18 {
cell-index = <0>;
- reg = <0x18 0x0>;
+ reg = <0x18>;
compatible = "qcom,actuator";
qcom,cci-master = <0>;
};
@@ -29,7 +29,7 @@
qcom,camera@6e {
compatible = "qcom,s5k3l1yx";
- reg = <0x6e 0x0>;
+ reg = <0x6e>;
qcom,slave-id = <0x6e 0x0 0x3121>;
qcom,csiphy-sd-index = <0>;
qcom,csid-sd-index = <0>;
@@ -105,7 +105,7 @@
qcom,camera@6c {
compatible = "qcom,ov2720";
- reg = <0x6c 0x0>;
+ reg = <0x6c>;
qcom,slave-id = <0x6c 0x300A 0x2720>;
qcom,csiphy-sd-index = <2>;
qcom,csid-sd-index = <0>;
@@ -140,7 +140,7 @@
qcom,camera@90 {
compatible = "qcom,mt9m114";
- reg = <0x90 0x0>;
+ reg = <0x90>;
qcom,slave-id = <0x90 0x0 0x2481>;
qcom,csiphy-sd-index = <1>;
qcom,csid-sd-index = <0>;
diff --git a/arch/arm/boot/dts/msm8974-camera.dtsi b/arch/arm/boot/dts/msm8974-camera.dtsi
index 786e9e3..456b079 100644
--- a/arch/arm/boot/dts/msm8974-camera.dtsi
+++ b/arch/arm/boot/dts/msm8974-camera.dtsi
@@ -11,8 +11,6 @@
* GNU General Public License for more details.
*/
-/include/ "skeleton.dtsi"
-
&soc {
qcom,msm-cam@fd8C0000 {
compatible = "qcom,msm-cam";
diff --git a/arch/arm/boot/dts/msm8974-cdp.dtsi b/arch/arm/boot/dts/msm8974-cdp.dtsi
index 3e65b8a..2a60df4 100644
--- a/arch/arm/boot/dts/msm8974-cdp.dtsi
+++ b/arch/arm/boot/dts/msm8974-cdp.dtsi
@@ -599,6 +599,13 @@
};
gpio@e300 { /* GPIO 36 */
+ qcom,mode = <1>; /* QPNP_PIN_MODE_DIG_OUT */
+ qcom,output-type = <0>; /* QPNP_PIN_OUT_BUF_CMOS */
+ qcom,pull = <5>; /* QPNP_PIN_PULL_NO */
+ qcom,vin-sel = <2>; /* QPNP_PIN_VIN2 */
+ qcom,out-strength = <3>; /* QPNP_PIN_OUT_STRENGTH_HIGH */
+ qcom,src-sel = <3>; /* QPNP_PIN_SEL_FUNC_2 */
+ qcom,master-en = <1>;
};
};
diff --git a/arch/arm/boot/dts/msm8974-coresight.dtsi b/arch/arm/boot/dts/msm8974-coresight.dtsi
index 1610f1f..9fee2e5 100644
--- a/arch/arm/boot/dts/msm8974-coresight.dtsi
+++ b/arch/arm/boot/dts/msm8974-coresight.dtsi
@@ -369,8 +369,9 @@
compatible = "qcom,coresight-hwevent";
reg = <0xfdf30018 0x80>,
<0xf9011080 0x80>,
- <0xfd4ab160 0x80>;
- reg-names = "mmss-mux", "apcs-mux", "ppss-mux";
+ <0xfd4ab160 0x80>,
+ <0xfc401600 0x80>;
+ reg-names = "mmss-mux", "apcs-mux", "ppss-mux", "gcc-mux";
coresight-id = <29>;
coresight-name = "coresight-hwevent";
diff --git a/arch/arm/boot/dts/msm8974-fluid.dtsi b/arch/arm/boot/dts/msm8974-fluid.dtsi
index a822af5..3d2308d 100644
--- a/arch/arm/boot/dts/msm8974-fluid.dtsi
+++ b/arch/arm/boot/dts/msm8974-fluid.dtsi
@@ -403,6 +403,10 @@
};
&pm8941_bms {
+ qcom,enable-fcc-learning;
+ qcom,min-fcc-learning-soc = <20>;
+ qcom,min-fcc-ocv-pc = <30>;
+ qcom,min-fcc-learning-samples = <5>;
status = "ok";
};
diff --git a/arch/arm/boot/dts/msm8974-mtp.dtsi b/arch/arm/boot/dts/msm8974-mtp.dtsi
index e798fc0..28111fa 100644
--- a/arch/arm/boot/dts/msm8974-mtp.dtsi
+++ b/arch/arm/boot/dts/msm8974-mtp.dtsi
@@ -352,6 +352,10 @@
};
&pm8941_bms {
+ qcom,enable-fcc-learning;
+ qcom,min-fcc-learning-soc = <20>;
+ qcom,min-fcc-ocv-pc = <30>;
+ qcom,min-fcc-learning-samples = <5>;
status = "ok";
};
diff --git a/arch/arm/boot/dts/msm8974-regulator.dtsi b/arch/arm/boot/dts/msm8974-regulator.dtsi
index 2114686..7c191fc 100644
--- a/arch/arm/boot/dts/msm8974-regulator.dtsi
+++ b/arch/arm/boot/dts/msm8974-regulator.dtsi
@@ -380,7 +380,7 @@
status = "okay";
pm8941_l19: regulator-l19 {
regulator-min-microvolt = <2900000>;
- regulator-max-microvolt = <2900000>;
+ regulator-max-microvolt = <3300000>;
qcom,init-voltage = <2900000>;
status = "okay";
};
diff --git a/arch/arm/boot/dts/msm8974-v1-pm.dtsi b/arch/arm/boot/dts/msm8974-v1-pm.dtsi
index cebc99a..288a703 100644
--- a/arch/arm/boot/dts/msm8974-v1-pm.dtsi
+++ b/arch/arm/boot/dts/msm8974-v1-pm.dtsi
@@ -10,8 +10,6 @@
* GNU General Public License for more details.
*/
-/include/ "skeleton.dtsi"
-
&soc {
qcom,spm@f9089000 {
compatible = "qcom,spm-v2";
@@ -427,13 +425,13 @@
reg = <0xfe805664 0x40>;
qcom,pc-mode = "tz_l2_int";
qcom,use-sync-timer;
+ };
- qcom,cpu-sleep-status@f9088008 {
- compatible = "qcom,cpu-sleep-status";
- reg = <0xf9088008 0x4>;
- qcom,cpu-alias-addr = <0x10000>;
- qcom,sleep-status-mask= <0x80000>;
- };
+ qcom,cpu-sleep-status@f9088008 {
+ compatible = "qcom,cpu-sleep-status";
+ reg = <0xf9088008 0x4>;
+ qcom,cpu-alias-addr = <0x10000>;
+ qcom,sleep-status-mask= <0x80000>;
};
qcom,rpm-log@fc19dc00 {
diff --git a/arch/arm/boot/dts/msm8974-v2-pm.dtsi b/arch/arm/boot/dts/msm8974-v2-pm.dtsi
index d3a0bc8..686cdd8 100644
--- a/arch/arm/boot/dts/msm8974-v2-pm.dtsi
+++ b/arch/arm/boot/dts/msm8974-v2-pm.dtsi
@@ -10,8 +10,6 @@
* GNU General Public License for more details.
*/
-/include/ "skeleton.dtsi"
-
&soc {
qcom,spm@f9089000 {
compatible = "qcom,spm-v2";
@@ -28,12 +26,11 @@
qcom,saw2-spm-dly= <0x3C102800>;
qcom,saw2-spm-ctl = <0x1>;
qcom,saw2-spm-cmd-wfi = [03 0b 0f];
- qcom,saw2-spm-cmd-ret = [42 1b 00 d0 c0 a0 90 03 d0 98 a2 c0
- 0b 00 42 1b 0f];
- qcom,saw2-spm-cmd-spc = [00 20 80 10 90 a0 b0 03 3b 98 a2 b0 82
- 10 0b 30 06 26 30 0f];
- qcom,saw2-spm-cmd-pc = [00 20 80 10 90 a0 b0 07 3b 98 a2 b0 82
- 10 0b 30 06 26 30 0f];
+ qcom,saw2-spm-cmd-ret = [42 1b 00 d8 5B 03 d8 5b 0b 00 42 1b 0f];
+ qcom,saw2-spm-cmd-spc = [00 20 80 10 E8 5B 03 3B E8 5B 82 10 0B
+ 30 06 26 30 0F];
+ qcom,saw2-spm-cmd-pc = [00 20 80 10 E8 5B 07 3B E8 5B 82 10 0B
+ 30 06 26 30 0F];
};
qcom,spm@f9099000 {
@@ -51,12 +48,11 @@
qcom,saw2-spm-dly= <0x3C102800>;
qcom,saw2-spm-ctl = <0x1>;
qcom,saw2-spm-cmd-wfi = [03 0b 0f];
- qcom,saw2-spm-cmd-ret = [42 1b 00 d0 c0 a0 90 03 d0 98 a2 c0
- 0b 00 42 1b 0f];
- qcom,saw2-spm-cmd-spc = [00 20 80 10 90 a0 b0 03 3b 98 a2 b0 82
- 10 0b 30 06 26 30 0f];
- qcom,saw2-spm-cmd-pc = [00 20 80 10 90 a0 b0 07 3b 98 a2 b0 82
- 10 0b 30 06 26 30 0f];
+ qcom,saw2-spm-cmd-ret = [42 1b 00 d8 5B 03 d8 5b 0b 00 42 1b 0f];
+ qcom,saw2-spm-cmd-spc = [00 20 80 10 E8 5B 03 3B E8 5B 82 10 0B
+ 30 06 26 30 0F];
+ qcom,saw2-spm-cmd-pc = [00 20 80 10 E8 5B 07 3B E8 5B 82 10 0B
+ 30 06 26 30 0F];
};
qcom,spm@f90a9000 {
@@ -74,12 +70,11 @@
qcom,saw2-spm-dly= <0x3C102800>;
qcom,saw2-spm-ctl = <0x1>;
qcom,saw2-spm-cmd-wfi = [03 0b 0f];
- qcom,saw2-spm-cmd-ret = [42 1b 00 d0 c0 a0 90 03 d0 98 a2 c0
- 0b 00 42 1b 0f];
- qcom,saw2-spm-cmd-spc = [00 20 80 10 90 a0 b0 03 3b 98 a2 b0 82
- 10 0b 30 06 26 30 0f];
- qcom,saw2-spm-cmd-pc = [00 20 80 10 90 a0 b0 07 3b 98 a2 b0 82
- 10 0b 30 06 26 30 0f];
+ qcom,saw2-spm-cmd-ret = [42 1b 00 d8 5B 03 d8 5b 0b 00 42 1b 0f];
+ qcom,saw2-spm-cmd-spc = [00 20 80 10 E8 5B 03 3B E8 5B 82 10 0B
+ 30 06 26 30 0F];
+ qcom,saw2-spm-cmd-pc = [00 20 80 10 E8 5B 07 3B E8 5B 82 10 0B
+ 30 06 26 30 0F];
};
qcom,spm@f90b9000 {
@@ -97,12 +92,11 @@
qcom,saw2-spm-dly= <0x3C102800>;
qcom,saw2-spm-ctl = <0x1>;
qcom,saw2-spm-cmd-wfi = [03 0b 0f];
- qcom,saw2-spm-cmd-ret = [42 1b 00 d0 c0 a0 90 03 d0 98 a2 c0
- 0b 00 42 1b 0f];
- qcom,saw2-spm-cmd-spc = [00 20 80 10 90 a0 b0 03 3b 98 a2 b0 82
- 10 0b 30 06 26 30 0f];
- qcom,saw2-spm-cmd-pc = [00 20 80 10 90 a0 b0 07 3b 98 a2 b0 82
- 10 0b 30 06 26 30 0f];
+ qcom,saw2-spm-cmd-ret = [42 1b 00 d8 5B 03 d8 5b 0b 00 42 1b 0f];
+ qcom,saw2-spm-cmd-spc = [00 20 80 10 E8 5B 03 3B E8 5B 82 10 0B
+ 30 06 26 30 0F];
+ qcom,saw2-spm-cmd-pc = [00 20 80 10 E8 5B 07 3B E8 5B 82 10 0B
+ 30 06 26 30 0F];
};
qcom,spm@f9012000 {
@@ -125,8 +119,8 @@
qcom,vctl-port = <0x0>;
qcom,phase-port = <0x1>;
qcom,pfm-port = <0x2>;
- qcom,saw2-spm-cmd-ret = [1f 00 20 03 22 00 0f];
- qcom,saw2-spm-cmd-gdhs = [00 20 32 42 07 44 22 50 02 32 50 0f];
+ qcom,saw2-spm-cmd-ret = [1f 00 03 00 0f];
+ qcom,saw2-spm-cmd-gdhs = [00 32 42 07 44 50 02 32 50 0f];
qcom,saw2-spm-cmd-pc = [00 10 32 b0 11 42 07 01 b0 12 44
50 02 32 50 0f];
};
@@ -330,18 +324,23 @@
<50 172>, /* usb1_hs_async_wakeup_irq */
<53 104>, /* mdss_irq */
<62 222>, /* ee0_krait_hlos_spmi_periph_irq */
+ <0xff 56>, /* modem_watchdog */
<0xff 57>, /* mss_to_apps_irq(0) */
<0xff 58>, /* mss_to_apps_irq(1) */
<0xff 59>, /* mss_to_apps_irq(2) */
<0xff 60>, /* mss_to_apps_irq(3) */
+ <0xff 70>, /* iommu_pmon_nonsecure_irq */
+ <0xff 97>, /* iommu_nonsecure_irq */
+ <0xff 105>, /* iommu_pmon_nonsecure_irq */
<0xff 173>, /* o_wcss_apss_smd_hi */
<0xff 174>, /* o_wcss_apss_smd_med */
<0xff 175>, /* o_wcss_apss_smd_low */
<0xff 176>, /* o_wcss_apss_smsm_irq */
<0xff 177>, /* o_wcss_apss_wlan_data_xfer_done */
<0xff 178>, /* o_wcss_apss_wlan_rx_data_avail */
- <0xff 179>, /* o_wcss_apss_asic_intr
+ <0xff 179>, /* o_wcss_apss_asic_intr */
+ <0xff 181>, /* wcnss watchdog */
<0xff 188>, /* lpass_irq_out_apcs(0) */
<0xff 189>, /* lpass_irq_out_apcs(1) */
<0xff 190>, /* lpass_irq_out_apcs(2) */
@@ -360,6 +359,7 @@
<0xff 205>, /* rpm_ipc(25) */
<0xff 206>, /* rpm_ipc(26) */
<0xff 207>, /* rpm_ipc(27) */
+ <0xff 211>, /* usb_dwc3_otg */
<0xff 240>; /* summary_irq_kpss */
qcom,gpio-parent = <&msmgpio>;
@@ -423,13 +423,13 @@
<54 585 0 0>,
<54 585 0 800000>;
};
+ };
- qcom,cpu-sleep-status@f9088008{
- compatible = "qcom,cpu-sleep-status";
- reg = <0xf9088008 0x100>;
- qcom,cpu-alias-addr = <0x10000>;
- qcom,sleep-status-mask= <0x80000>;
- };
+ qcom,cpu-sleep-status@f9088008{
+ compatible = "qcom,cpu-sleep-status";
+ reg = <0xf9088008 0x100>;
+ qcom,cpu-alias-addr = <0x10000>;
+ qcom,sleep-status-mask= <0x80000>;
};
qcom,rpm-log@fc19dc00 {
@@ -449,4 +449,10 @@
reg-names = "phys_addr_base";
qcom,sleep-stats-version = <2>;
};
+
+ qcom,rpm-rbcpr-stats@fc000000 {
+ compatible = "qcom,rpmrbcpr-stats";
+ reg = <0xfc000000 0x1a0000>;
+ qcom,start-offset = <0x190010>;
+ };
};
diff --git a/arch/arm/boot/dts/msm8974-v2.dtsi b/arch/arm/boot/dts/msm8974-v2.dtsi
index 96e78ac..0240039 100644
--- a/arch/arm/boot/dts/msm8974-v2.dtsi
+++ b/arch/arm/boot/dts/msm8974-v2.dtsi
@@ -115,12 +115,12 @@
<49880000 1496000>;
qcom,dec-ddr-ab-ib = <0 0>,
<208000 303000>,
- <536000 303000>,
- <1012000 303000>,
- <2024000 606000>,
- <3240000 970000>,
- <4048000 1212000>,
- <4264000 1279000>;
+ <536000 1600000>,
+ <1012000 1600000>,
+ <2024000 1600000>,
+ <3240000 1600000>,
+ <4048000 1600000>,
+ <4264000 1600000>;
qcom,iommu-groups = <&venus_domain_ns &venus_domain_sec_bitstream
&venus_domain_sec_pixel &venus_domain_sec_non_pixel>;
qcom,iommu-group-buffer-types = <0xfff 0x91 0x42 0x120>;
diff --git a/arch/arm/boot/dts/msm8974.dtsi b/arch/arm/boot/dts/msm8974.dtsi
index 5ae8808..068f581 100644
--- a/arch/arm/boot/dts/msm8974.dtsi
+++ b/arch/arm/boot/dts/msm8974.dtsi
@@ -589,6 +589,7 @@
<&msmgpio 54 0>, /* MISO */
<&msmgpio 53 0>; /* MOSI */
cs-gpios = <&msmgpio 55 0>;
+ qcom,master-id = <84>;
};
tspp: msm_tspp@f99d8000 {
@@ -822,6 +823,7 @@
<&msmgpio 1 0>, /* MISO */
<&msmgpio 0 0>; /* MOSI */
cs-gpios = <&msmgpio 9 0>;
+ qcom,master-id = <86>;
};
qcom,acpuclk@f9000000 {
@@ -862,7 +864,7 @@
vbus_dwc3-supply = <&pm8941_mvs1>;
qcom,dwc-usb3-msm-dbm-eps = <4>;
qcom,vdd-voltage-level = <1 5 7>;
- qcom,dwc-hsphy-init = <0x00D195A4>;
+ qcom,dwc-hsphy-init = <0x00D191A4>;
qcom,msm-bus,name = "usb3";
qcom,msm-bus,num-cases = <2>;
@@ -876,7 +878,6 @@
interrupt-parent = <&intc>;
interrupts = <0 131 0>, <0 179 0>;
interrupt-names = "irq", "otg_irq";
- tx-fifo-resize;
};
};
@@ -1221,7 +1222,7 @@
qcom,iris-vddxo-supply = <&pm8941_l6>;
qcom,iris-vddrfa-supply = <&pm8941_l11>;
qcom,iris-vddpa-supply = <&pm8941_l19>;
- qcom,iris-vdddig-supply = <&pm8941_l3>;
+ qcom,iris-vdddig-supply = <&pm8941_s3>;
gpios = <&msmgpio 36 0>, <&msmgpio 37 0>, <&msmgpio 38 0>, <&msmgpio 39 0>, <&msmgpio 40 0>;
qcom,has-48mhz-xo;
@@ -1271,8 +1272,14 @@
};
qcom,msm-rng@f9bff000 {
- compatible = "qcom,msm-rng";
- reg = <0xf9bff000 0x200>;
+ compatible = "qcom,msm-rng";
+ reg = <0xf9bff000 0x200>;
+ qcom,msm-bus,name = "msm-rng-noc";
+ qcom,msm-bus,num-cases = <2>;
+ qcom,msm-bus,num-paths = <1>;
+ qcom,msm-bus,vectors-KBps =
+ <1 618 0 0>,
+ <1 618 0 800>;
};
qseecom: qcom,qseecom@7f00000 {
@@ -1628,11 +1635,16 @@
&gdsc_venus {
qcom,clock-names = "core_clk";
qcom,skip-logic-collapse;
+ qcom,retain-periph;
+ qcom,retain-mem;
status = "ok";
};
&gdsc_mdss {
qcom,clock-names = "core_clk", "lut_clk";
+ qcom,skip-logic-collapse;
+ qcom,retain-periph;
+ qcom,retain-mem;
status = "ok";
};
@@ -1649,7 +1661,8 @@
&gdsc_oxili_gx {
qcom,clock-names = "core_clk";
- qcom,retain-mems;
+ qcom,retain-mem;
+ qcom,retain-periph;
status = "ok";
};
diff --git a/arch/arm/boot/dts/msm9625-pm.dtsi b/arch/arm/boot/dts/msm9625-pm.dtsi
index 673b640..8eb1119 100644
--- a/arch/arm/boot/dts/msm9625-pm.dtsi
+++ b/arch/arm/boot/dts/msm9625-pm.dtsi
@@ -10,8 +10,6 @@
* GNU General Public License for more details.
*/
-/include/ "skeleton.dtsi"
-
&soc {
qcom,spm@f9009000 {
compatible = "qcom,spm-v2";
diff --git a/arch/arm/boot/dts/msm9625-v2.1.dtsi b/arch/arm/boot/dts/msm9625-v2.1.dtsi
index 65ff96a..5720700 100644
--- a/arch/arm/boot/dts/msm9625-v2.1.dtsi
+++ b/arch/arm/boot/dts/msm9625-v2.1.dtsi
@@ -34,3 +34,7 @@
&ipa_hw {
qcom,ipa-hw-ver = <2>; /* IPA h-w revision */
};
+
+&hsusb_otg {
+ qcom,hsusb-l1-supported;
+};
diff --git a/arch/arm/boot/dts/msm9625-v2.dtsi b/arch/arm/boot/dts/msm9625-v2.dtsi
index b078309..14105cb 100644
--- a/arch/arm/boot/dts/msm9625-v2.dtsi
+++ b/arch/arm/boot/dts/msm9625-v2.dtsi
@@ -46,3 +46,7 @@
&ldrex_spinlock {
status = "ok";
};
+
+&hsusb_otg {
+ qcom,hsusb-l1-supported;
+};
diff --git a/arch/arm/boot/dts/msm9625.dtsi b/arch/arm/boot/dts/msm9625.dtsi
index f654545..616995f 100644
--- a/arch/arm/boot/dts/msm9625.dtsi
+++ b/arch/arm/boot/dts/msm9625.dtsi
@@ -148,7 +148,7 @@
interrupts = <0 109 0>;
};
- usb@f9a55000 {
+ hsusb_otg: usb@f9a55000 {
compatible = "qcom,hsusb-otg";
reg = <0xf9a55000 0x400>;
interrupts = <0 134 0 0 140 0>;
@@ -173,6 +173,7 @@
qcom,msm-bus,vectors-KBps =
<87 512 0 0>,
<87 512 40000 640000>;
+ qcom,hsusb-log2-itc = <5>;
};
hsic_host: hsic@f9a15000 {
@@ -192,6 +193,7 @@
qcom,pool-64-bit-align;
qcom,enable-hbm;
hsic,consider-ipa-handshake;
+ hsic,log2-itc = <3>;
qcom,ahb-async-bridge-bypass;
};
@@ -244,9 +246,9 @@
qcom,dst-bam-physical-address = <0xf9a44000>;
qcom,dst-bam-pipe-index = <2>;
qcom,data-fifo-offset = <0x4100>;
- qcom,data-fifo-size = <0x400>;
+ qcom,data-fifo-size = <0x700>;
qcom,descriptor-fifo-offset = <0x4000>;
- qcom,descriptor-fifo-size = <0x400>;
+ qcom,descriptor-fifo-size = <0x100>;
};
qcom,pipe3 {
label = "hsic-ipa-in-0";
@@ -516,6 +518,25 @@
qcom,calib-mode = "fuse_map1";
};
+ qcom,msm-thermal {
+ compatible = "qcom,msm-thermal";
+ qcom,sensor-id = <0>;
+ qcom,poll-ms = <250>;
+ qcom,limit-temp = <60>;
+ qcom,temp-hysteresis = <10>;
+ qcom,freq-step = <2>;
+ qcom,freq-control-mask = <0x0>;
+ qcom,vdd-restriction-temp = <5>;
+ qcom,vdd-restriction-temp-hysteresis = <10>;
+ vdd_dig-supply = <&pm8019_l10_corner>;
+
+ qcom,vdd-dig-rstr{
+ qcom,vdd-rstr-reg = "vdd_dig";
+ qcom,levels = <5 7 7>; /* Nominal, Super Turbo, Super Turbo */
+ qcom,min-level = <1>; /* No Request */
+ };
+ };
+
qcom,msm-rng@f9bff000 {
compatible = "qcom,msm-rng";
reg = <0xf9bff000 0x200>;
diff --git a/arch/arm/boot/dts/msmkrypton-sim.dts b/arch/arm/boot/dts/msmkrypton-sim.dts
index 1872a36..29f0df4 100644
--- a/arch/arm/boot/dts/msmkrypton-sim.dts
+++ b/arch/arm/boot/dts/msmkrypton-sim.dts
@@ -23,3 +23,13 @@
&uartdm3{
status = "ok";
};
+
+&spi_6 {
+ ethernet-switch@0 {
+ compatible = "simtec,ks8851";
+ reg = <0>;
+ interrupt-parent = <&msmgpio>;
+ spi-max-frequency = <19200000>;
+ interrupts = <75 0>;
+ };
+};
diff --git a/arch/arm/boot/dts/msmkrypton.dtsi b/arch/arm/boot/dts/msmkrypton.dtsi
index 4b032d8..ba6377c 100644
--- a/arch/arm/boot/dts/msmkrypton.dtsi
+++ b/arch/arm/boot/dts/msmkrypton.dtsi
@@ -45,6 +45,11 @@
qcom,direct-connect-irqs = <8>;
};
+ qcom,msm-imem@fe805000 {
+ compatible = "qcom,msm-imem";
+ reg = <0xfe807800 0x1000>; /* Address and size of IMEM */
+ };
+
timer@f9020000 {
#address-cells = <1>;
#size-cells = <1>;
@@ -117,4 +122,19 @@
interrupts = <0 109 0>;
status = "disabled";
};
+
+ spi_6: spi@f9928000 { /* BLSP1 QUP6 */
+ cell-index = <0>;
+ compatible = "qcom,spi-qup-v2";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0xf9928000 0x1000>;
+ interrupts = <0 100 0>;
+ spi-max-frequency = <19200000>;
+
+ gpios = <&msmgpio 23 0>, /* CLK */
+ <&msmgpio 21 0>, /* MISO */
+ <&msmgpio 20 0>; /* MOSI */
+ cs-gpios = <&msmgpio 22 0>;
+ };
};
diff --git a/arch/arm/boot/dts/msmsamarium.dtsi b/arch/arm/boot/dts/msmsamarium.dtsi
index 81699b6..a9cca0b 100644
--- a/arch/arm/boot/dts/msmsamarium.dtsi
+++ b/arch/arm/boot/dts/msmsamarium.dtsi
@@ -87,4 +87,18 @@
qcom,bus-width = <4>;
status = "disabled";
};
+
+ qcom,wdt@f9017000 {
+ compatible = "qcom,msm-watchdog";
+ reg = <0xf9017000 0x1000>;
+ interrupts = <0 3 0>, <0 4 0>;
+ qcom,bark-time = <11000>;
+ qcom,pet-time = <10000>;
+ qcom,ipi-ping;
+ };
+
+ qcom,msm-mem-hole {
+ compatible = "qcom,msm-mem-hole";
+ qcom,memblock-remove = <0x07f00000 0x8000000>; /* Address and size of hole */
+ };
};
diff --git a/arch/arm/configs/apq8084_defconfig b/arch/arm/configs/apq8084_defconfig
index 78eb352..9cd37d1 100644
--- a/arch/arm/configs/apq8084_defconfig
+++ b/arch/arm/configs/apq8084_defconfig
@@ -22,7 +22,6 @@
CONFIG_CC_OPTIMIZE_FOR_SIZE=y
CONFIG_PANIC_TIMEOUT=5
CONFIG_KALLSYMS_ALL=y
-CONFIG_ASHMEM=y
CONFIG_EMBEDDED=y
CONFIG_PROFILING=y
CONFIG_KPROBES=y
@@ -50,7 +49,6 @@
CONFIG_MSM_IPC_ROUTER_SMD_XPRT=y
CONFIG_MSM_IPC_ROUTER_SECURITY=y
CONFIG_MSM_QMI_INTERFACE=y
-# CONFIG_MSM_HW3D is not set
CONFIG_MSM_RPM_REGULATOR_SMD=y
CONFIG_MSM_SUBSYSTEM_RESTART=y
CONFIG_MSM_SYSMON_COMM=y
@@ -88,7 +86,7 @@
CONFIG_PREEMPT=y
CONFIG_AEABI=y
CONFIG_HIGHMEM=y
-CONFIG_VMALLOC_RESERVE=0x19000000
+CONFIG_COMPACTION=y
CONFIG_CC_STACKPROTECTOR=y
CONFIG_CP_ACCESS=y
CONFIG_USE_OF=y
@@ -101,7 +99,6 @@
CONFIG_VFP=y
CONFIG_NEON=y
# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set
-CONFIG_WAKELOCK=y
CONFIG_PM_RUNTIME=y
CONFIG_NET=y
CONFIG_PACKET=y
@@ -210,8 +207,6 @@
CONFIG_RFKILL=y
CONFIG_GENLOCK=y
CONFIG_GENLOCK_MISCDEVICE=y
-CONFIG_SYNC=y
-CONFIG_SW_SYNC=y
CONFIG_CMA=y
CONFIG_BLK_DEV_LOOP=y
CONFIG_BLK_DEV_RAM=y
@@ -249,6 +244,7 @@
CONFIG_INPUT_UINPUT=y
CONFIG_SERIAL_MSM_HSL=y
CONFIG_SERIAL_MSM_HSL_CONSOLE=y
+CONFIG_DIAG_CHAR=y
CONFIG_HW_RANDOM=y
CONFIG_HW_RANDOM_MSM=y
CONFIG_I2C=y
@@ -315,6 +311,9 @@
CONFIG_USB_STORAGE_KARMA=y
CONFIG_USB_STORAGE_CYPRESS_ATACB=y
CONFIG_USB_STORAGE_ENE_UB6250=y
+CONFIG_USB_GADGET=y
+CONFIG_USB_DWC3_MSM=y
+CONFIG_USB_G_ANDROID=y
CONFIG_MMC=y
CONFIG_MMC_PERF_PROFILING=y
CONFIG_MMC_UNSAFE_RESUME=y
@@ -328,10 +327,6 @@
CONFIG_MMC_SDHCI_PLTFM=y
CONFIG_MMC_MSM=y
CONFIG_MMC_SDHCI_MSM=y
-CONFIG_USB_GADGET=y
-CONFIG_USB_DWC3_MSM=y
-CONFIG_USB_G_ANDROID=y
-CONFIG_DIAG_CHAR=y
CONFIG_LEDS_QPNP=y
CONFIG_LEDS_TRIGGERS=y
CONFIG_LEDS_TRIGGER_BACKLIGHT=y
@@ -343,6 +338,7 @@
CONFIG_STAGING=y
CONFIG_ANDROID=y
CONFIG_ANDROID_BINDER_IPC=y
+CONFIG_ASHMEM=y
CONFIG_ANDROID_LOGGER=y
CONFIG_ANDROID_TIMED_GPIO=y
CONFIG_ANDROID_LOW_MEMORY_KILLER=y
@@ -355,6 +351,7 @@
CONFIG_QPNP_CLKDIV=y
CONFIG_MSM_IOMMU_V1=y
CONFIG_IOMMU_PGTABLES_L2=y
+CONFIG_IOMMU_NON_SECURE=y
CONFIG_EXT2_FS=y
CONFIG_EXT2_FS_XATTR=y
CONFIG_EXT3_FS=y
diff --git a/arch/arm/configs/fsm9xxx-perf_defconfig b/arch/arm/configs/fsm9xxx-perf_defconfig
index 10414e1..37c9554 100644
--- a/arch/arm/configs/fsm9xxx-perf_defconfig
+++ b/arch/arm/configs/fsm9xxx-perf_defconfig
@@ -152,13 +152,6 @@
CONFIG_RTC_CLASS=y
CONFIG_RTC_DEBUG=y
CONFIG_STAGING=y
-CONFIG_ANDROID=y
-CONFIG_ANDROID_BINDER_IPC=y
-CONFIG_ASHMEM=y
-CONFIG_ANDROID_LOGGER=y
-CONFIG_ANDROID_RAM_CONSOLE=y
-CONFIG_ANDROID_TIMED_GPIO=y
-CONFIG_ANDROID_LOW_MEMORY_KILLER=y
CONFIG_MSM_SSBI=y
CONFIG_EXT2_FS=y
CONFIG_EXT2_FS_XATTR=y
diff --git a/arch/arm/configs/fsm9xxx_defconfig b/arch/arm/configs/fsm9xxx_defconfig
index aa3befa..f9295b2 100644
--- a/arch/arm/configs/fsm9xxx_defconfig
+++ b/arch/arm/configs/fsm9xxx_defconfig
@@ -151,13 +151,6 @@
CONFIG_RTC_CLASS=y
CONFIG_RTC_DEBUG=y
CONFIG_STAGING=y
-CONFIG_ANDROID=y
-CONFIG_ANDROID_BINDER_IPC=y
-CONFIG_ASHMEM=y
-CONFIG_ANDROID_LOGGER=y
-CONFIG_ANDROID_RAM_CONSOLE=y
-CONFIG_ANDROID_TIMED_GPIO=y
-CONFIG_ANDROID_LOW_MEMORY_KILLER=y
CONFIG_MSM_SSBI=y
CONFIG_EXT2_FS=y
CONFIG_EXT2_FS_XATTR=y
diff --git a/arch/arm/configs/msm8226-perf_defconfig b/arch/arm/configs/msm8226-perf_defconfig
index 903ca50..4a5c9a7 100644
--- a/arch/arm/configs/msm8226-perf_defconfig
+++ b/arch/arm/configs/msm8226-perf_defconfig
@@ -78,7 +78,11 @@
CONFIG_PREEMPT=y
CONFIG_AEABI=y
CONFIG_HIGHMEM=y
+CONFIG_COMPACTION=y
CONFIG_USE_OF=y
+CONFIG_CPU_FREQ_GOV_POWERSAVE=y
+CONFIG_CPU_FREQ_GOV_USERSPACE=y
+CONFIG_CPU_FREQ_GOV_ONDEMAND=y
CONFIG_CPU_IDLE=y
CONFIG_VFP=y
CONFIG_NEON=y
@@ -202,6 +206,15 @@
CONFIG_BLK_DEV_LOOP=y
CONFIG_BLK_DEV_RAM=y
CONFIG_QSEECOM=y
+CONFIG_SCSI=y
+CONFIG_SCSI_TGT=y
+CONFIG_BLK_DEV_SD=y
+CONFIG_CHR_DEV_SG=y
+CONFIG_CHR_DEV_SCH=y
+CONFIG_SCSI_MULTI_LUN=y
+CONFIG_SCSI_CONSTANTS=y
+CONFIG_SCSI_LOGGING=y
+CONFIG_SCSI_SCAN_ASYNC=y
CONFIG_MD=y
CONFIG_BLK_DEV_DM=y
CONFIG_DM_CRYPT=y
@@ -209,12 +222,21 @@
CONFIG_DUMMY=y
# CONFIG_MSM_RMNET is not set
CONFIG_MSM_RMNET_BAM=y
+CONFIG_PPP=y
+CONFIG_PPP_BSDCOMP=y
+CONFIG_PPP_DEFLATE=y
+CONFIG_PPPOE=y
+CONFIG_PPP_ASYNC=y
+CONFIG_PPP_SYNC_TTY=y
+CONFIG_USB_USBNET=y
CONFIG_WCNSS_CORE=y
CONFIG_WCNSS_CORE_PRONTO=y
CONFIG_WCNSS_MEM_PRE_ALLOC=y
CONFIG_INPUT_EVDEV=y
CONFIG_INPUT_EVBUG=m
CONFIG_KEYBOARD_GPIO=y
+CONFIG_INPUT_JOYSTICK=y
+CONFIG_JOYSTICK_XPAD=y
CONFIG_INPUT_TOUCHSCREEN=y
CONFIG_TOUCHSCREEN_ATMEL_MXT=y
CONFIG_TOUCHSCREEN_SYNAPTICS_I2C_RMI4=y
@@ -231,6 +253,7 @@
CONFIG_I2C=y
CONFIG_I2C_CHARDEV=y
CONFIG_I2C_QUP=y
+CONFIG_MSM_BUSPM_DEV=m
CONFIG_SPI=y
CONFIG_SPI_QUP=y
CONFIG_SPI_SPIDEV=m
@@ -251,6 +274,7 @@
CONFIG_THERMAL_MONITOR=y
CONFIG_THERMAL_QPNP_ADC_TM=y
CONFIG_WCD9306_CODEC=y
+CONFIG_REGULATOR_FIXED_VOLTAGE=y
CONFIG_REGULATOR_STUB=y
CONFIG_REGULATOR_QPNP=y
CONFIG_MEDIA_SUPPORT=y
@@ -272,6 +296,7 @@
CONFIG_MSM_VIDC_V4L2=y
CONFIG_MSM_WFD=y
CONFIG_VIDEOBUF2_MSM_MEM=y
+CONFIG_USB_VIDEO_CLASS=y
CONFIG_V4L_PLATFORM_DRIVERS=y
CONFIG_RADIO_IRIS=y
CONFIG_RADIO_IRIS_TRANSPORT=m
@@ -289,11 +314,34 @@
# CONFIG_BACKLIGHT_GENERIC is not set
CONFIG_SOUND=y
CONFIG_SND=y
+CONFIG_SND_USB_AUDIO=y
CONFIG_SND_SOC=y
CONFIG_SND_SOC_MSM8226=y
CONFIG_UHID=y
CONFIG_HID_APPLE=y
CONFIG_HID_MAGICMOUSE=y
+CONFIG_USB_ANNOUNCE_NEW_DEVICES=y
+CONFIG_USB_SUSPEND=y
+CONFIG_USB_MON=y
+CONFIG_USB_EHCI_HCD=y
+CONFIG_USB_EHCI_EHSET=y
+CONFIG_USB_EHCI_MSM=y
+CONFIG_USB_ACM=y
+CONFIG_USB_STORAGE=y
+CONFIG_USB_STORAGE_DATAFAB=y
+CONFIG_USB_STORAGE_FREECOM=y
+CONFIG_USB_STORAGE_ISD200=y
+CONFIG_USB_STORAGE_USBAT=y
+CONFIG_USB_STORAGE_SDDR09=y
+CONFIG_USB_STORAGE_SDDR55=y
+CONFIG_USB_STORAGE_JUMPSHOT=y
+CONFIG_USB_STORAGE_ALAUDA=y
+CONFIG_USB_STORAGE_ONETOUCH=y
+CONFIG_USB_STORAGE_KARMA=y
+CONFIG_USB_STORAGE_CYPRESS_ATACB=y
+CONFIG_USB_SERIAL=y
+CONFIG_USB_SERIAL_CSVT=y
+CONFIG_USB_EHSET_TEST_FIXTURE=y
CONFIG_USB_GADGET=y
CONFIG_USB_GADGET_DEBUG_FILES=y
CONFIG_USB_GADGET_DEBUG_FS=y
@@ -307,6 +355,7 @@
CONFIG_MMC_PARANOID_SD_INIT=y
CONFIG_MMC_BLOCK_MINORS=32
CONFIG_MMC_TEST=m
+CONFIG_MMC_BLOCK_TEST=m
CONFIG_MMC_SDHCI=y
CONFIG_MMC_SDHCI_PLTFM=y
CONFIG_MMC_MSM=y
@@ -332,16 +381,8 @@
CONFIG_QPNP_PWM=y
CONFIG_QPNP_POWER_ON=y
CONFIG_QPNP_VIBRATOR=y
+CONFIG_QPNP_REVID=y
CONFIG_MSM_IOMMU_V1=y
-CONFIG_CORESIGHT=y
-CONFIG_CORESIGHT_TMC=y
-CONFIG_CORESIGHT_TPIU=y
-CONFIG_CORESIGHT_FUNNEL=y
-CONFIG_CORESIGHT_REPLICATOR=y
-CONFIG_CORESIGHT_STM=y
-CONFIG_CORESIGHT_HWEVENT=y
-CONFIG_CORESIGHT_ETM=y
-CONFIG_CORESIGHT_EVENT=m
CONFIG_EXT2_FS=y
CONFIG_EXT2_FS_XATTR=y
CONFIG_EXT3_FS=y
@@ -374,19 +415,15 @@
CONFIG_ENABLE_DEFAULT_TRACERS=y
CONFIG_DYNAMIC_DEBUG=y
CONFIG_DEBUG_USER=y
+CONFIG_DEBUG_SET_MODULE_RONX=y
CONFIG_KEYS=y
CONFIG_CRYPTO_MD4=y
CONFIG_CRYPTO_ARC4=y
CONFIG_CRYPTO_TWOFISH=y
+CONFIG_NFC_QNCI=y
CONFIG_CRYPTO_DEV_QCRYPTO=m
CONFIG_CRYPTO_DEV_QCE=y
CONFIG_CRYPTO_DEV_QCEDEV=m
-CONFIG_CRC_CCITT=y
-CONFIG_PPP=y
-CONFIG_PPP_ASYNC=y
-CONFIG_PPP_SYNC_TTY=y
-CONFIG_PPP_DEFLATE=y
-CONFIG_PPP_BSDCOMP=y
-CONFIG_PPPOE=y
-CONFIG_N_HDLC=y
-CONFIG_UNIX98_PTYS=y
+CONFIG_MOBICORE_SUPPORT=m
+CONFIG_MOBICORE_API=m
+CONFIG_MSM_RPM_RBCPR_STATS_V2_LOG=y
diff --git a/arch/arm/configs/msm8226_defconfig b/arch/arm/configs/msm8226_defconfig
index 92be812..02d4873 100644
--- a/arch/arm/configs/msm8226_defconfig
+++ b/arch/arm/configs/msm8226_defconfig
@@ -78,7 +78,11 @@
CONFIG_PREEMPT=y
CONFIG_AEABI=y
CONFIG_HIGHMEM=y
+CONFIG_COMPACTION=y
CONFIG_USE_OF=y
+CONFIG_CPU_FREQ_GOV_POWERSAVE=y
+CONFIG_CPU_FREQ_GOV_USERSPACE=y
+CONFIG_CPU_FREQ_GOV_ONDEMAND=y
CONFIG_CPU_IDLE=y
CONFIG_VFP=y
CONFIG_NEON=y
@@ -202,6 +206,15 @@
CONFIG_BLK_DEV_LOOP=y
CONFIG_BLK_DEV_RAM=y
CONFIG_QSEECOM=y
+CONFIG_SCSI=y
+CONFIG_SCSI_TGT=y
+CONFIG_BLK_DEV_SD=y
+CONFIG_CHR_DEV_SG=y
+CONFIG_CHR_DEV_SCH=y
+CONFIG_SCSI_MULTI_LUN=y
+CONFIG_SCSI_CONSTANTS=y
+CONFIG_SCSI_LOGGING=y
+CONFIG_SCSI_SCAN_ASYNC=y
CONFIG_MD=y
CONFIG_BLK_DEV_DM=y
CONFIG_DM_CRYPT=y
@@ -210,12 +223,21 @@
CONFIG_TUN=y
# CONFIG_MSM_RMNET is not set
CONFIG_MSM_RMNET_BAM=y
+CONFIG_PPP=y
+CONFIG_PPP_BSDCOMP=y
+CONFIG_PPP_DEFLATE=y
+CONFIG_PPPOE=y
+CONFIG_PPP_ASYNC=y
+CONFIG_PPP_SYNC_TTY=y
+CONFIG_USB_USBNET=y
CONFIG_WCNSS_CORE=y
CONFIG_WCNSS_CORE_PRONTO=y
CONFIG_WCNSS_MEM_PRE_ALLOC=y
CONFIG_INPUT_EVDEV=y
CONFIG_INPUT_EVBUG=m
CONFIG_KEYBOARD_GPIO=y
+CONFIG_INPUT_JOYSTICK=y
+CONFIG_JOYSTICK_XPAD=y
CONFIG_INPUT_TOUCHSCREEN=y
CONFIG_TOUCHSCREEN_ATMEL_MXT=y
CONFIG_TOUCHSCREEN_SYNAPTICS_I2C_RMI4=y
@@ -232,6 +254,7 @@
CONFIG_I2C=y
CONFIG_I2C_CHARDEV=y
CONFIG_I2C_QUP=y
+CONFIG_MSM_BUSPM_DEV=m
CONFIG_SPI=y
CONFIG_SPI_QUP=y
CONFIG_SPI_SPIDEV=m
@@ -254,6 +277,7 @@
CONFIG_THERMAL_QPNP=y
CONFIG_THERMAL_QPNP_ADC_TM=y
CONFIG_WCD9306_CODEC=y
+CONFIG_REGULATOR_FIXED_VOLTAGE=y
CONFIG_REGULATOR_STUB=y
CONFIG_REGULATOR_QPNP=y
CONFIG_MEDIA_SUPPORT=y
@@ -297,6 +321,7 @@
# CONFIG_MEDIA_TUNER_TDA18218 is not set
# CONFIG_MEDIA_TUNER_TDA18212 is not set
CONFIG_VIDEOBUF2_MSM_MEM=y
+CONFIG_USB_VIDEO_CLASS=y
CONFIG_V4L_PLATFORM_DRIVERS=y
CONFIG_RADIO_IRIS=y
CONFIG_RADIO_IRIS_TRANSPORT=m
@@ -314,11 +339,34 @@
# CONFIG_BACKLIGHT_GENERIC is not set
CONFIG_SOUND=y
CONFIG_SND=y
+CONFIG_SND_USB_AUDIO=y
CONFIG_SND_SOC=y
CONFIG_SND_SOC_MSM8226=y
CONFIG_UHID=y
CONFIG_HID_APPLE=y
CONFIG_HID_MAGICMOUSE=y
+CONFIG_USB_ANNOUNCE_NEW_DEVICES=y
+CONFIG_USB_SUSPEND=y
+CONFIG_USB_MON=y
+CONFIG_USB_EHCI_HCD=y
+CONFIG_USB_EHCI_EHSET=y
+CONFIG_USB_EHCI_MSM=y
+CONFIG_USB_ACM=y
+CONFIG_USB_STORAGE=y
+CONFIG_USB_STORAGE_DATAFAB=y
+CONFIG_USB_STORAGE_FREECOM=y
+CONFIG_USB_STORAGE_ISD200=y
+CONFIG_USB_STORAGE_USBAT=y
+CONFIG_USB_STORAGE_SDDR09=y
+CONFIG_USB_STORAGE_SDDR55=y
+CONFIG_USB_STORAGE_JUMPSHOT=y
+CONFIG_USB_STORAGE_ALAUDA=y
+CONFIG_USB_STORAGE_ONETOUCH=y
+CONFIG_USB_STORAGE_KARMA=y
+CONFIG_USB_STORAGE_CYPRESS_ATACB=y
+CONFIG_USB_SERIAL=y
+CONFIG_USB_SERIAL_CSVT=y
+CONFIG_USB_EHSET_TEST_FIXTURE=y
CONFIG_USB_GADGET=y
CONFIG_USB_GADGET_DEBUG_FILES=y
CONFIG_USB_GADGET_DEBUG_FS=y
@@ -332,6 +380,7 @@
CONFIG_MMC_PARANOID_SD_INIT=y
CONFIG_MMC_BLOCK_MINORS=32
CONFIG_MMC_TEST=m
+CONFIG_MMC_BLOCK_TEST=m
CONFIG_MMC_SDHCI=y
CONFIG_MMC_SDHCI_PLTFM=y
CONFIG_MMC_MSM=y
@@ -357,6 +406,7 @@
CONFIG_QPNP_PWM=y
CONFIG_QPNP_POWER_ON=y
CONFIG_QPNP_VIBRATOR=y
+CONFIG_QPNP_REVID=y
CONFIG_MSM_IOMMU_V1=y
CONFIG_CORESIGHT=y
CONFIG_CORESIGHT_TMC=y
@@ -399,19 +449,17 @@
CONFIG_ENABLE_DEFAULT_TRACERS=y
CONFIG_DYNAMIC_DEBUG=y
CONFIG_DEBUG_USER=y
+CONFIG_DEBUG_LL=y
+CONFIG_EARLY_PRINTK=y
+CONFIG_DEBUG_SET_MODULE_RONX=y
CONFIG_KEYS=y
CONFIG_CRYPTO_MD4=y
CONFIG_CRYPTO_ARC4=y
CONFIG_CRYPTO_TWOFISH=y
+CONFIG_NFC_QNCI=y
CONFIG_CRYPTO_DEV_QCRYPTO=m
CONFIG_CRYPTO_DEV_QCE=y
CONFIG_CRYPTO_DEV_QCEDEV=m
-CONFIG_CRC_CCITT=y
-CONFIG_PPP=y
-CONFIG_PPP_ASYNC=y
-CONFIG_PPP_SYNC_TTY=y
-CONFIG_PPP_DEFLATE=y
-CONFIG_PPP_BSDCOMP=y
-CONFIG_PPPOE=y
-CONFIG_N_HDLC=y
-CONFIG_UNIX98_PTYS=y
+CONFIG_MOBICORE_SUPPORT=m
+CONFIG_MOBICORE_API=m
+CONFIG_MSM_RPM_RBCPR_STATS_V2_LOG=y
diff --git a/arch/arm/configs/msm8610-perf_defconfig b/arch/arm/configs/msm8610-perf_defconfig
index 9eb53d0..07f7ed9 100644
--- a/arch/arm/configs/msm8610-perf_defconfig
+++ b/arch/arm/configs/msm8610-perf_defconfig
@@ -81,7 +81,11 @@
CONFIG_PREEMPT=y
CONFIG_AEABI=y
CONFIG_HIGHMEM=y
+CONFIG_COMPACTION=y
CONFIG_USE_OF=y
+CONFIG_CPU_FREQ_GOV_POWERSAVE=y
+CONFIG_CPU_FREQ_GOV_USERSPACE=y
+CONFIG_CPU_FREQ_GOV_ONDEMAND=y
CONFIG_CPU_IDLE=y
CONFIG_VFP=y
CONFIG_NEON=y
@@ -221,6 +225,7 @@
CONFIG_KEYBOARD_GPIO=y
CONFIG_INPUT_TOUCHSCREEN=y
CONFIG_TOUCHSCREEN_ATMEL_MXT=y
+CONFIG_TOUCHSCREEN_FT5X06=y
CONFIG_TOUCHSCREEN_GEN_VKEYS=y
CONFIG_TOUCHSCREEN_SYNAPTICS_I2C_RMI4=y
CONFIG_TOUCHSCREEN_SYNAPTICS_DSX_RMI4_DEV=y
@@ -236,6 +241,7 @@
CONFIG_I2C=y
CONFIG_I2C_CHARDEV=y
CONFIG_I2C_QUP=y
+CONFIG_MSM_BUSPM_DEV=m
CONFIG_SPI=y
CONFIG_SPI_QUP=y
CONFIG_SPI_SPIDEV=m
@@ -266,16 +272,20 @@
CONFIG_VIDEO_V4L2_SUBDEV_API=y
# CONFIG_MSM_CAMERA is not set
CONFIG_OV8825=y
+CONFIG_s5k4e1=y
+CONFIG_HI256=y
CONFIG_MSM_CAMERA_SENSOR=y
-CONFIG_MSM_CPP=y
+# CONFIG_MSM_CPP is not set
CONFIG_MSM_CCI=y
-CONFIG_MSM_CSI30_HEADER=y
+CONFIG_MSM_CSI22_HEADER=y
CONFIG_MSM_CSIPHY=y
CONFIG_MSM_CSID=y
CONFIG_MSM_ISPIF=y
-# CONFIG_MSM_ISPIF_V1 is not set
+CONFIG_MSM_ISPIF_V1=y
CONFIG_MSMB_CAMERA=y
CONFIG_OV9724=y
+CONFIG_SP1628=y
+CONFIG_GC0339=y
CONFIG_MSMB_JPEG=y
CONFIG_MSM_VIDC_V4L2=y
CONFIG_MSM_WFD=y
@@ -344,6 +354,7 @@
CONFIG_QPNP_PWM=y
CONFIG_QPNP_POWER_ON=y
CONFIG_QPNP_VIBRATOR=y
+CONFIG_QPNP_REVID=y
CONFIG_MSM_IOMMU_V0=y
CONFIG_EXT2_FS=y
CONFIG_EXT2_FS_XATTR=y
@@ -364,9 +375,12 @@
CONFIG_DEBUG_MEMORY_INIT=y
CONFIG_ENABLE_DEFAULT_TRACERS=y
CONFIG_DEBUG_USER=y
+CONFIG_DEBUG_SET_MODULE_RONX=y
CONFIG_KEYS=y
CONFIG_CRYPTO_MD4=y
CONFIG_CRYPTO_ARC4=y
CONFIG_CRYPTO_TWOFISH=y
# CONFIG_CRYPTO_HW is not set
CONFIG_CRC_CCITT=y
+CONFIG_INPUT_KXTJ9=y
+CONFIG_MSM_RPM_RBCPR_STATS_V2_LOG=y
diff --git a/arch/arm/configs/msm8610_defconfig b/arch/arm/configs/msm8610_defconfig
index d7194a4..34c0905 100644
--- a/arch/arm/configs/msm8610_defconfig
+++ b/arch/arm/configs/msm8610_defconfig
@@ -79,7 +79,11 @@
CONFIG_PREEMPT=y
CONFIG_AEABI=y
CONFIG_HIGHMEM=y
+CONFIG_COMPACTION=y
CONFIG_USE_OF=y
+CONFIG_CPU_FREQ_GOV_POWERSAVE=y
+CONFIG_CPU_FREQ_GOV_USERSPACE=y
+CONFIG_CPU_FREQ_GOV_ONDEMAND=y
CONFIG_CPU_IDLE=y
CONFIG_VFP=y
CONFIG_NEON=y
@@ -219,6 +223,7 @@
CONFIG_KEYBOARD_GPIO=y
CONFIG_INPUT_TOUCHSCREEN=y
CONFIG_TOUCHSCREEN_ATMEL_MXT=y
+CONFIG_TOUCHSCREEN_FT5X06=y
CONFIG_TOUCHSCREEN_GEN_VKEYS=y
CONFIG_TOUCHSCREEN_SYNAPTICS_I2C_RMI4=y
CONFIG_TOUCHSCREEN_SYNAPTICS_DSX_RMI4_DEV=y
@@ -234,6 +239,7 @@
CONFIG_I2C=y
CONFIG_I2C_CHARDEV=y
CONFIG_I2C_QUP=y
+CONFIG_MSM_BUSPM_DEV=m
CONFIG_SPI=y
CONFIG_SPI_QUP=y
CONFIG_SPI_SPIDEV=m
@@ -264,17 +270,19 @@
CONFIG_VIDEO_V4L2_SUBDEV_API=y
# CONFIG_MSM_CAMERA is not set
CONFIG_OV8825=y
+CONFIG_s5k4e1=y
+CONFIG_HI256=y
CONFIG_MSM_CAMERA_SENSOR=y
-# CONFIG_MSM_CPP is not set
CONFIG_MSM_CCI=y
-CONFIG_MSM_CSI22_HEADER=y
-CONFIG_MSM_CSI20_HEADER=y
CONFIG_MSM_CSIPHY=y
CONFIG_MSM_CSID=y
CONFIG_MSM_ISPIF=y
-# CONFIG_MSM_ISPIF_V1 is not set
+CONFIG_MSM_ISPIF_V1=y
CONFIG_MSMB_CAMERA=y
+CONFIG_MSM_CSI22_HEADER=y
CONFIG_OV9724=y
+CONFIG_SP1628=y
+CONFIG_GC0339=y
CONFIG_MSMB_JPEG=y
CONFIG_MSM_VIDC_V4L2=y
CONFIG_MSM_WFD=y
@@ -345,6 +353,7 @@
CONFIG_MMC_SDHCI_MSM=y
CONFIG_MMC_MSM_SPS_SUPPORT=y
CONFIG_LEDS_QPNP=y
+CONFIG_LEDS_MSM_GPIO_FLASH=y
CONFIG_LEDS_TRIGGERS=y
CONFIG_SWITCH=y
CONFIG_RTC_CLASS=y
@@ -364,6 +373,7 @@
CONFIG_QPNP_PWM=y
CONFIG_QPNP_POWER_ON=y
CONFIG_QPNP_VIBRATOR=y
+CONFIG_QPNP_REVID=y
CONFIG_MSM_IOMMU_V0=y
CONFIG_CORESIGHT=y
CONFIG_CORESIGHT_TMC=y
@@ -406,6 +416,7 @@
CONFIG_ENABLE_DEFAULT_TRACERS=y
CONFIG_DYNAMIC_DEBUG=y
CONFIG_DEBUG_USER=y
+CONFIG_DEBUG_SET_MODULE_RONX=y
CONFIG_KEYS=y
CONFIG_CRYPTO_MD4=y
CONFIG_CRYPTO_ARC4=y
@@ -414,3 +425,5 @@
CONFIG_CRYPTO_DEV_QCE=y
CONFIG_CRYPTO_DEV_QCEDEV=m
CONFIG_CRC_CCITT=y
+CONFIG_INPUT_KXTJ9=y
+CONFIG_MSM_RPM_RBCPR_STATS_V2_LOG=y
diff --git a/arch/arm/configs/msm8660-perf_defconfig b/arch/arm/configs/msm8660-perf_defconfig
index 1b465af..da4de08 100644
--- a/arch/arm/configs/msm8660-perf_defconfig
+++ b/arch/arm/configs/msm8660-perf_defconfig
@@ -278,6 +278,7 @@
# CONFIG_I2C_MSM is not set
CONFIG_I2C_QUP=y
CONFIG_I2C_SSBI=y
+CONFIG_MSM_BUSPM_DEV=m
CONFIG_SPI=y
CONFIG_SPI_QUP=y
CONFIG_SPI_SPIDEV=m
diff --git a/arch/arm/configs/msm8660_defconfig b/arch/arm/configs/msm8660_defconfig
index 40fde84..e30c7d8 100644
--- a/arch/arm/configs/msm8660_defconfig
+++ b/arch/arm/configs/msm8660_defconfig
@@ -278,6 +278,7 @@
# CONFIG_I2C_MSM is not set
CONFIG_I2C_QUP=y
CONFIG_I2C_SSBI=y
+CONFIG_MSM_BUSPM_DEV=m
CONFIG_SPI=y
CONFIG_SPI_QUP=y
CONFIG_SPI_SPIDEV=m
diff --git a/arch/arm/configs/msm8960-perf_defconfig b/arch/arm/configs/msm8960-perf_defconfig
index aefc7c9..4610597 100644
--- a/arch/arm/configs/msm8960-perf_defconfig
+++ b/arch/arm/configs/msm8960-perf_defconfig
@@ -319,6 +319,7 @@
CONFIG_I2C_CHARDEV=y
# CONFIG_I2C_MSM is not set
CONFIG_I2C_QUP=y
+CONFIG_MSM_BUSPM_DEV=m
CONFIG_SPI=y
CONFIG_SPI_QUP=y
CONFIG_SPI_SPIDEV=m
diff --git a/arch/arm/configs/msm8960_defconfig b/arch/arm/configs/msm8960_defconfig
index fbad97a..9b55c3b 100644
--- a/arch/arm/configs/msm8960_defconfig
+++ b/arch/arm/configs/msm8960_defconfig
@@ -83,6 +83,7 @@
CONFIG_MSM_RPM_RBCPR_STATS_LOG=y
CONFIG_MSM_EVENT_TIMER=y
CONFIG_MSM_BUS_SCALING=y
+CONFIG_MSM_BUSPM_DEV=m
CONFIG_MSM_BUS_RPM_MULTI_TIER_ENABLED=y
CONFIG_MSM_WATCHDOG=y
CONFIG_MSM_DLOAD_MODE=y
diff --git a/arch/arm/configs/msm8974-perf_defconfig b/arch/arm/configs/msm8974-perf_defconfig
index 154a368..cdf4263 100644
--- a/arch/arm/configs/msm8974-perf_defconfig
+++ b/arch/arm/configs/msm8974-perf_defconfig
@@ -63,6 +63,7 @@
CONFIG_MSM_TZ_LOG=y
CONFIG_MSM_DIRECT_SCLK_ACCESS=y
CONFIG_MSM_EVENT_TIMER=y
+CONFIG_MSM_RPM_RBCPR_STATS_V2_LOG=y
CONFIG_MSM_BUS_SCALING=y
CONFIG_MSM_WATCHDOG_V2=y
CONFIG_MSM_MEMORY_DUMP=y
@@ -92,6 +93,7 @@
CONFIG_PREEMPT=y
CONFIG_AEABI=y
CONFIG_HIGHMEM=y
+CONFIG_COMPACTION=y
CONFIG_CC_STACKPROTECTOR=y
CONFIG_CP_ACCESS=y
CONFIG_USE_OF=y
@@ -290,6 +292,7 @@
CONFIG_I2C=y
CONFIG_I2C_CHARDEV=y
CONFIG_I2C_QUP=y
+CONFIG_MSM_BUSPM_DEV=m
CONFIG_SPI=y
CONFIG_SPI_QUP=y
CONFIG_SPI_SPIDEV=m
@@ -373,6 +376,7 @@
CONFIG_HID_APPLE=y
CONFIG_HID_MAGICMOUSE=y
CONFIG_HID_MICROSOFT=y
+CONFIG_USB_ANNOUNCE_NEW_DEVICES=y
CONFIG_USB_SUSPEND=y
CONFIG_USB_XHCI_HCD=y
CONFIG_USB_EHCI_HCD=y
@@ -468,6 +472,7 @@
CONFIG_DYNAMIC_DEBUG=y
CONFIG_DEBUG_USER=y
CONFIG_PID_IN_CONTEXTIDR=y
+CONFIG_DEBUG_SET_MODULE_RONX=y
CONFIG_KEYS=y
CONFIG_CRYPTO_NULL=y
CONFIG_CRYPTO_XCBC=y
@@ -477,3 +482,4 @@
CONFIG_CRYPTO_DEV_QCRYPTO=m
CONFIG_CRYPTO_DEV_QCE=y
CONFIG_CRYPTO_DEV_QCEDEV=y
+CONFIG_SND_SOC_MSM_HDMI_CODEC_RX=y
diff --git a/arch/arm/configs/msm8974_defconfig b/arch/arm/configs/msm8974_defconfig
index 2605234..19d428b 100644
--- a/arch/arm/configs/msm8974_defconfig
+++ b/arch/arm/configs/msm8974_defconfig
@@ -62,7 +62,9 @@
CONFIG_MSM_TZ_LOG=y
CONFIG_MSM_DIRECT_SCLK_ACCESS=y
CONFIG_MSM_EVENT_TIMER=y
+CONFIG_MSM_RPM_RBCPR_STATS_V2_LOG=y
CONFIG_MSM_BUS_SCALING=y
+CONFIG_MSM_BUSPM_DEV=m
CONFIG_MSM_WATCHDOG_V2=y
CONFIG_MSM_MEMORY_DUMP=y
CONFIG_MSM_DLOAD_MODE=y
@@ -97,6 +99,7 @@
CONFIG_PREEMPT=y
CONFIG_AEABI=y
CONFIG_HIGHMEM=y
+CONFIG_COMPACTION=y
CONFIG_CC_STACKPROTECTOR=y
CONFIG_CP_ACCESS=y
CONFIG_USE_OF=y
@@ -379,6 +382,7 @@
CONFIG_HID_APPLE=y
CONFIG_HID_MAGICMOUSE=y
CONFIG_HID_MICROSOFT=y
+CONFIG_USB_ANNOUNCE_NEW_DEVICES=y
CONFIG_USB_SUSPEND=y
CONFIG_USB_XHCI_HCD=y
CONFIG_USB_EHCI_HCD=y
@@ -500,6 +504,7 @@
CONFIG_DEBUG_LL=y
CONFIG_EARLY_PRINTK=y
CONFIG_PID_IN_CONTEXTIDR=y
+CONFIG_DEBUG_SET_MODULE_RONX=y
CONFIG_KEYS=y
CONFIG_CRYPTO_NULL=y
CONFIG_CRYPTO_XCBC=y
@@ -509,3 +514,4 @@
CONFIG_CRYPTO_DEV_QCRYPTO=m
CONFIG_CRYPTO_DEV_QCE=y
CONFIG_CRYPTO_DEV_QCEDEV=y
+CONFIG_SND_SOC_MSM_HDMI_CODEC_RX=y
diff --git a/arch/arm/configs/msm9615_defconfig b/arch/arm/configs/msm9615_defconfig
index 3b84f8f..9e8e6ac 100644
--- a/arch/arm/configs/msm9615_defconfig
+++ b/arch/arm/configs/msm9615_defconfig
@@ -53,6 +53,7 @@
CONFIG_MSM_RPM_STATS_LOG=y
CONFIG_MSM_DIRECT_SCLK_ACCESS=y
CONFIG_MSM_BUS_SCALING=y
+CONFIG_MSM_BUSPM_DEV=m
CONFIG_MSM_BUS_RPM_MULTI_TIER_ENABLED=y
CONFIG_MSM_WATCHDOG=y
CONFIG_MSM_DLOAD_MODE=y
diff --git a/arch/arm/configs/msm9625-perf_defconfig b/arch/arm/configs/msm9625-perf_defconfig
index 3f15a68..d02f5da 100644
--- a/arch/arm/configs/msm9625-perf_defconfig
+++ b/arch/arm/configs/msm9625-perf_defconfig
@@ -55,7 +55,6 @@
CONFIG_MSM_MEMORY_DUMP=y
CONFIG_MSM_DLOAD_MODE=y
CONFIG_MSM_ADSP_LOADER=m
-CONFIG_MSM_RTB=y
CONFIG_MSM_ENABLE_WDOG_DEBUG_CONTROL=y
CONFIG_MSM_UARTDM_Core_v14=y
CONFIG_MSM_BOOT_STATS=y
@@ -210,6 +209,7 @@
CONFIG_I2C=y
CONFIG_I2C_CHARDEV=y
CONFIG_I2C_QUP=y
+CONFIG_MSM_BUSPM_DEV=m
CONFIG_SPI=y
CONFIG_SPI_QUP=y
CONFIG_SPI_SPIDEV=m
@@ -225,8 +225,8 @@
CONFIG_SENSORS_QPNP_ADC_VOLTAGE=y
CONFIG_THERMAL=y
CONFIG_THERMAL_TSENS8974=y
-CONFIG_THERMAL_QPNP_ADC_TM=y
CONFIG_THERMAL_MONITOR=y
+CONFIG_THERMAL_QPNP_ADC_TM=y
CONFIG_WCD9320_CODEC=y
CONFIG_REGULATOR=y
CONFIG_REGULATOR_FIXED_VOLTAGE=y
diff --git a/arch/arm/configs/msm9625_defconfig b/arch/arm/configs/msm9625_defconfig
index c771bc4..64c8535 100644
--- a/arch/arm/configs/msm9625_defconfig
+++ b/arch/arm/configs/msm9625_defconfig
@@ -50,6 +50,7 @@
CONFIG_MSM_PIL_MSS_QDSP6V5=y
CONFIG_MSM_DIRECT_SCLK_ACCESS=y
CONFIG_MSM_BUS_SCALING=y
+CONFIG_MSM_BUSPM_DEV=m
CONFIG_MSM_WATCHDOG_V2=y
CONFIG_MSM_MEMORY_DUMP=y
CONFIG_MSM_DLOAD_MODE=y
@@ -228,8 +229,8 @@
CONFIG_SENSORS_QPNP_ADC_VOLTAGE=y
CONFIG_THERMAL=y
CONFIG_THERMAL_TSENS8974=y
-CONFIG_THERMAL_QPNP_ADC_TM=y
CONFIG_THERMAL_MONITOR=y
+CONFIG_THERMAL_QPNP_ADC_TM=y
CONFIG_WCD9320_CODEC=y
CONFIG_REGULATOR=y
CONFIG_REGULATOR_FIXED_VOLTAGE=y
diff --git a/arch/arm/configs/msmkrypton_defconfig b/arch/arm/configs/msmkrypton_defconfig
index 69bc36e..f073d2b 100644
--- a/arch/arm/configs/msmkrypton_defconfig
+++ b/arch/arm/configs/msmkrypton_defconfig
@@ -65,9 +65,28 @@
CONFIG_MTD_BLOCK=y
# CONFIG_MTD_MSM_NAND is not set
CONFIG_MTD_MSM_QPIC_NAND=y
+CONFIG_NET=y
+CONFIG_PACKET=y
+CONFIG_UNIX=y
+CONFIG_INET=y
+CONFIG_IPV6=y
+# CONFIG_WIRELESS is not set
CONFIG_BLK_DEV_LOOP=y
CONFIG_BLK_DEV_RAM=y
# CONFIG_ANDROID_PMEM is not set
+CONFIG_NETDEVICES=y
+# CONFIG_NET_VENDOR_BROADCOM is not set
+# CONFIG_NET_VENDOR_CIRRUS is not set
+# CONFIG_NET_VENDOR_FARADAY is not set
+# CONFIG_NET_VENDOR_INTEL is not set
+CONFIG_KS8851=y
+# CONFIG_NET_VENDOR_MICROCHIP is not set
+# CONFIG_MSM_RMNET is not set
+# CONFIG_NET_VENDOR_NATSEMI is not set
+# CONFIG_NET_VENDOR_SEEQ is not set
+# CONFIG_NET_VENDOR_SMSC is not set
+# CONFIG_NET_VENDOR_STMICRO is not set
+# CONFIG_WLAN is not set
# CONFIG_INPUT_MOUSEDEV is not set
CONFIG_INPUT_EVDEV=y
# CONFIG_INPUT_KEYBOARD is not set
diff --git a/arch/arm/include/asm/cacheflush.h b/arch/arm/include/asm/cacheflush.h
index 584fe0b..9ba1436 100644
--- a/arch/arm/include/asm/cacheflush.h
+++ b/arch/arm/include/asm/cacheflush.h
@@ -365,4 +365,9 @@
flush_cache_all();
}
+int set_memory_ro(unsigned long addr, int numpages);
+int set_memory_rw(unsigned long addr, int numpages);
+int set_memory_x(unsigned long addr, int numpages);
+int set_memory_nx(unsigned long addr, int numpages);
+
#endif
diff --git a/arch/arm/include/asm/pgtable.h b/arch/arm/include/asm/pgtable.h
index 7b6f42a..6bbe966 100644
--- a/arch/arm/include/asm/pgtable.h
+++ b/arch/arm/include/asm/pgtable.h
@@ -249,6 +249,8 @@
PTE_BIT_FUNC(mkdirty, |= L_PTE_DIRTY);
PTE_BIT_FUNC(mkold, &= ~L_PTE_YOUNG);
PTE_BIT_FUNC(mkyoung, |= L_PTE_YOUNG);
+PTE_BIT_FUNC(mkexec, &= ~L_PTE_XN);
+PTE_BIT_FUNC(mknexec, |= L_PTE_XN);
static inline pte_t pte_mkspecial(pte_t pte) { return pte; }
diff --git a/arch/arm/kernel/sched_clock.c b/arch/arm/kernel/sched_clock.c
index 27d186a..ad9dfb2 100644
--- a/arch/arm/kernel/sched_clock.c
+++ b/arch/arm/kernel/sched_clock.c
@@ -21,6 +21,8 @@
u32 epoch_cyc_copy;
u32 mult;
u32 shift;
+ bool suspended;
+ bool needs_suspend;
};
static void sched_clock_poll(unsigned long wrap_ticks);
@@ -49,6 +51,9 @@
u64 epoch_ns;
u32 epoch_cyc;
+ if (cd.suspended)
+ return cd.epoch_ns;
+
/*
* Load the epoch_cyc and epoch_ns atomically. We do this by
* ensuring that we always write epoch_cyc, epoch_ns and
@@ -84,11 +89,11 @@
* detectable in cyc_to_fixed_sched_clock().
*/
raw_local_irq_save(flags);
- cd.epoch_cyc = cyc;
+ cd.epoch_cyc_copy = cyc;
smp_wmb();
cd.epoch_ns = ns;
smp_wmb();
- cd.epoch_cyc_copy = cyc;
+ cd.epoch_cyc = cyc;
raw_local_irq_restore(flags);
}
@@ -169,11 +174,20 @@
static int sched_clock_suspend(void)
{
sched_clock_poll(sched_clock_timer.data);
+ cd.suspended = true;
return 0;
}
+static void sched_clock_resume(void)
+{
+ cd.epoch_cyc = read_sched_clock();
+ cd.epoch_cyc_copy = cd.epoch_cyc;
+ cd.suspended = false;
+}
+
static struct syscore_ops sched_clock_ops = {
.suspend = sched_clock_suspend,
+ .resume = sched_clock_resume,
};
static int __init sched_clock_syscore_init(void)
diff --git a/arch/arm/kernel/smp.c b/arch/arm/kernel/smp.c
index cf10056..a70b300 100644
--- a/arch/arm/kernel/smp.c
+++ b/arch/arm/kernel/smp.c
@@ -573,6 +573,8 @@
local_fiq_disable();
local_irq_disable();
+ flush_cache_all();
+
while (1)
cpu_relax();
}
diff --git a/arch/arm/mach-msm/Kconfig b/arch/arm/mach-msm/Kconfig
index 86eb7d1..e0f9e8a 100644
--- a/arch/arm/mach-msm/Kconfig
+++ b/arch/arm/mach-msm/Kconfig
@@ -458,9 +458,6 @@
select MSM_BUS_SCALING
select CPU_FREQ_MSM
select CPU_FREQ
- select CPU_FREQ_GOV_USERSPACE
- select CPU_FREQ_GOV_ONDEMAND
- select CPU_FREQ_GOV_POWERSAVE
select MSM_PIL
select MSM_RUN_QUEUE_STATS
select ARM_HAS_SG_CHAIN
@@ -500,8 +497,6 @@
select MSM_BUS_SCALING
select CPU_FREQ_MSM
select CPU_FREQ
- select CPU_FREQ_GOV_USERSPACE
- select CPU_FREQ_GOV_ONDEMAND
select MSM_PIL
select MSM_RUN_QUEUE_STATS
select ARM_HAS_SG_CHAIN
@@ -1317,6 +1312,14 @@
help
Say Y here if you want the debug print routines to direct
their output to the serial port on MSM SAMARIUM devices.
+
+ config DEBUG_MSM8226_UART
+ bool "Kernel low-level debugging messages via MSM 8226 UART"
+ depends on ARCH_MSM8226
+ select MSM_HAS_DEBUG_UART_HS_V14
+ help
+ Say Y here if you want the debug print routines to direct
+ their output to the serial port on MSM 8226 devices.
endchoice
choice
@@ -2329,8 +2332,8 @@
config MSM_BUSPM_DEV
tristate "MSM Bus Performance Monitor Kernel Module"
- depends on (ARCH_MSM8X60 || ARCH_MSM8960 || ARCH_MSM8974)
- default m
+ depends on MSM_BUS_SCALING
+ default n
help
This kernel module is used to mmap() hardware registers for the
performance monitors, counters, etc. The module can also be used to
@@ -2377,6 +2380,15 @@
RBCPR (Rapid Bridge Core Power Reduction) information . The drivers
outputs the message via a debugfs node.
+config MSM_RPM_RBCPR_STATS_V2_LOG
+ tristate "MSM Resource Power Manager RPBCPR Stat Driver"
+ depends on DEBUG_FS
+ help
+ This option enables v2 of the rpmrbcpr_stats driver which reads RPM
+ memory for statistics pertaining to RPM's RBCPR(Rapid Bridge Core
+ Power Reduction) driver. The drivers outputs the message via a
+ debugfs node.
+
config MSM_DIRECT_SCLK_ACCESS
bool "Direct access to the SCLK timer"
default n
diff --git a/arch/arm/mach-msm/Makefile b/arch/arm/mach-msm/Makefile
index 9a34d87..17db01e 100644
--- a/arch/arm/mach-msm/Makefile
+++ b/arch/arm/mach-msm/Makefile
@@ -277,7 +277,7 @@
obj-$(CONFIG_MACH_MSM8930_FLUID) += board-8930-all.o board-8930-regulator-pm8038.o board-8930-regulator-pm8917.o
obj-$(CONFIG_PM8921_BMS) += bms-batterydata.o bms-batterydata-desay.o batterydata-lib.o
obj-$(CONFIG_QPNP_BMS) += bms-batterydata.o bms-batterydata-desay.o batterydata-lib.o
-obj-$(CONFIG_QPNP_BMS) += bms-batterydata-oem.o bms-batterydata-qrd-4v35-2000mah.o
+obj-$(CONFIG_QPNP_BMS) += bms-batterydata-oem.o bms-batterydata-qrd-4v35-2000mah.o bms-batterydata-qrd-4v2-1300mah.o
obj-$(CONFIG_MACH_APQ8064_CDP) += board-8064-all.o board-8064-regulator.o
obj-$(CONFIG_MACH_APQ8064_MTP) += board-8064-all.o board-8064-regulator.o
obj-$(CONFIG_MACH_APQ8064_LIQUID) += board-8064-all.o board-8064-regulator.o
@@ -309,6 +309,7 @@
obj-$(CONFIG_ARCH_MSM8610) += board-8610.o board-8610-gpiomux.o
obj-$(CONFIG_ARCH_MSM8610) += clock-local2.o clock-pll.o clock-8610.o clock-rpm.o clock-voter.o
obj-$(CONFIG_ARCH_MSM8610) += clock-dsi-8610.o
+obj-$(CONFIG_ARCH_MSMKRYPTON) += clock-local2.o clock-pll.o clock-krypton.o clock-rpm.o clock-voter.o
obj-$(CONFIG_MACH_SAPPHIRE) += board-sapphire.o board-sapphire-gpio.o
obj-$(CONFIG_MACH_SAPPHIRE) += board-sapphire-keypad.o board-sapphire-panel.o
@@ -333,6 +334,7 @@
obj-$(CONFIG_MSM_MPM) += mpm.o
obj-$(CONFIG_MSM_RPM_STATS_LOG) += rpm_stats.o rpm_master_stat.o
obj-$(CONFIG_MSM_RPM_RBCPR_STATS_LOG) += rpm_rbcpr_stats.o
+obj-$(CONFIG_MSM_RPM_RBCPR_STATS_V2_LOG) += rpm_rbcpr_stats_v2.o
obj-$(CONFIG_MSM_RPM_LOG) += rpm_log.o
obj-$(CONFIG_MSM_TZ_LOG) += tz_log.o
obj-$(CONFIG_MSM_XO) += msm_xo.o
diff --git a/arch/arm/mach-msm/Makefile.boot b/arch/arm/mach-msm/Makefile.boot
index 3804fa0..3469c66 100644
--- a/arch/arm/mach-msm/Makefile.boot
+++ b/arch/arm/mach-msm/Makefile.boot
@@ -93,6 +93,8 @@
dtb-$(CONFIG_ARCH_MSM8226) += msm8926-cdp.dtb
dtb-$(CONFIG_ARCH_MSM8226) += msm8926-mtp.dtb
dtb-$(CONFIG_ARCH_MSM8226) += msm8926-qrd.dtb
+ dtb-$(CONFIG_ARCH_MSM8226) += apq8026-xpm.dtb
+ dtb-$(CONFIG_ARCH_MSM8226) += apq8026-mtp.dtb
# FSM9XXX
zreladdr-$(CONFIG_ARCH_FSM9XXX) := 0x10008000
diff --git a/arch/arm/mach-msm/acpuclock-8226.c b/arch/arm/mach-msm/acpuclock-8226.c
index 733c7a8..59c682f 100644
--- a/arch/arm/mach-msm/acpuclock-8226.c
+++ b/arch/arm/mach-msm/acpuclock-8226.c
@@ -59,12 +59,7 @@
.name = "acpuclock",
};
-/* TODO:
- * 1) Update MX voltage when data is avaiable
- * 2) Update bus bandwidth
- * 3) Depending on Frodo version, may need minimum of LVL_NOM
- */
-static struct clkctl_acpu_speed acpu_freq_tbl_8226[] = {
+static struct clkctl_acpu_speed acpu_freq_tbl_8226_1p1[] = {
{ 1, 300000, PLL0, 4, 2, CPR_CORNER_SVS, 0, 4 },
{ 1, 384000, ACPUPLL, 5, 2, CPR_CORNER_SVS, 0, 4 },
{ 1, 600000, PLL0, 4, 0, CPR_CORNER_NORMAL, 0, 6 },
@@ -75,6 +70,46 @@
{ 0 }
};
+static struct clkctl_acpu_speed acpu_freq_tbl_8226_1p2[] = {
+ { 1, 300000, PLL0, 4, 2, CPR_CORNER_SVS, 0, 4 },
+ { 1, 384000, ACPUPLL, 5, 2, CPR_CORNER_SVS, 0, 4 },
+ { 1, 600000, PLL0, 4, 0, CPR_CORNER_NORMAL, 0, 6 },
+ { 1, 787200, ACPUPLL, 5, 0, CPR_CORNER_NORMAL, 0, 7 },
+ { 1, 998400, ACPUPLL, 5, 0, CPR_CORNER_TURBO, 0, 7 },
+ { 1, 1094400, ACPUPLL, 5, 0, CPR_CORNER_TURBO, 0, 7 },
+ { 1, 1190400, ACPUPLL, 5, 0, CPR_CORNER_TURBO, 0, 7 },
+ { 0 }
+};
+
+static struct clkctl_acpu_speed acpu_freq_tbl_8226_1p4[] = {
+ { 1, 300000, PLL0, 4, 2, CPR_CORNER_SVS, 0, 4 },
+ { 1, 384000, ACPUPLL, 5, 2, CPR_CORNER_SVS, 0, 4 },
+ { 1, 600000, PLL0, 4, 0, CPR_CORNER_NORMAL, 0, 6 },
+ { 1, 787200, ACPUPLL, 5, 0, CPR_CORNER_NORMAL, 0, 7 },
+ { 1, 998400, ACPUPLL, 5, 0, CPR_CORNER_TURBO, 0, 7 },
+ { 1, 1094400, ACPUPLL, 5, 0, CPR_CORNER_TURBO, 0, 7 },
+ { 1, 1190400, ACPUPLL, 5, 0, CPR_CORNER_TURBO, 0, 7 },
+ { 1, 1305600, ACPUPLL, 5, 0, CPR_CORNER_TURBO, 0, 7 },
+ { 1, 1344000, ACPUPLL, 5, 0, CPR_CORNER_TURBO, 0, 7 },
+ { 1, 1401600, ACPUPLL, 5, 0, CPR_CORNER_TURBO, 0, 7 },
+ { 0 }
+};
+
+static struct clkctl_acpu_speed acpu_freq_tbl_8226_1p5[] = {
+ { 1, 300000, PLL0, 4, 2, CPR_CORNER_SVS, 0, 4 },
+ { 1, 384000, ACPUPLL, 5, 2, CPR_CORNER_SVS, 0, 4 },
+ { 1, 600000, PLL0, 4, 0, CPR_CORNER_NORMAL, 0, 6 },
+ { 1, 787200, ACPUPLL, 5, 0, CPR_CORNER_NORMAL, 0, 7 },
+ { 1, 998400, ACPUPLL, 5, 0, CPR_CORNER_TURBO, 0, 7 },
+ { 1, 1094400, ACPUPLL, 5, 0, CPR_CORNER_TURBO, 0, 7 },
+ { 1, 1190400, ACPUPLL, 5, 0, CPR_CORNER_TURBO, 0, 7 },
+ { 1, 1305600, ACPUPLL, 5, 0, CPR_CORNER_TURBO, 0, 7 },
+ { 1, 1344000, ACPUPLL, 5, 0, CPR_CORNER_TURBO, 0, 7 },
+ { 1, 1401600, ACPUPLL, 5, 0, CPR_CORNER_TURBO, 0, 7 },
+ /* No support for 1p5 GHz yet */
+ { 0 }
+};
+
static struct clkctl_acpu_speed acpu_freq_tbl_8610[] = {
{ 1, 300000, PLL0, 4, 2, CPR_CORNER_SVS, 0, 3 },
{ 1, 384000, ACPUPLL, 5, 2, CPR_CORNER_SVS, 0, 3 },
@@ -85,9 +120,18 @@
{ 0 }
};
+static struct clkctl_acpu_speed *pvs_tables_8226[NUM_SPEED_BIN] = {
+ [0] = acpu_freq_tbl_8226_1p2,
+ [6] = acpu_freq_tbl_8226_1p2,
+ [2] = acpu_freq_tbl_8226_1p4,
+ [5] = acpu_freq_tbl_8226_1p4,
+ [3] = acpu_freq_tbl_8226_1p5,
+ [4] = acpu_freq_tbl_8226_1p5,
+};
+
static struct acpuclk_drv_data drv_data = {
- .freq_tbl = acpu_freq_tbl_8226,
- .current_speed = &(struct clkctl_acpu_speed){ 0 },
+ .freq_tbl = acpu_freq_tbl_8226_1p1,
+ .pvs_tables = pvs_tables_8226,
.bus_scale = &bus_client_pdata,
.vdd_max_cpu = CPR_CORNER_TURBO,
.src_clocks = {
@@ -122,6 +166,14 @@
drv_data.apcs_rcg_config = drv_data.apcs_rcg_cmd + 4;
+ res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "pte_efuse");
+ if (res) {
+ drv_data.pte_efuse_base = devm_ioremap(&pdev->dev, res->start,
+ resource_size(res));
+ if (!drv_data.pte_efuse_base)
+ return -ENOMEM;
+ }
+
drv_data.vdd_cpu = devm_regulator_get(&pdev->dev, "a7_cpu");
if (IS_ERR(drv_data.vdd_cpu)) {
dev_err(&pdev->dev, "regulator for %s get failed\n", "a7_cpu");
diff --git a/arch/arm/mach-msm/acpuclock-8974.c b/arch/arm/mach-msm/acpuclock-8974.c
index a61f5ca..98ed2d8 100644
--- a/arch/arm/mach-msm/acpuclock-8974.c
+++ b/arch/arm/mach-msm/acpuclock-8974.c
@@ -899,6 +899,39 @@
{ 0, { 0 } }
};
+static struct acpu_level acpu_freq_tbl_v3_pvs0[] __initdata = {
+ { 1, { 300000, PLL_0, 0, 0 }, L2(0), 800000, 999 },
+ { 0, { 345600, HFPLL, 2, 36 }, L2(1), 800000, 999 },
+ { 1, { 422400, HFPLL, 2, 44 }, L2(2), 800000, 999 },
+ { 0, { 499200, HFPLL, 2, 52 }, L2(2), 805000, 999 },
+ { 0, { 576000, HFPLL, 1, 30 }, L2(3), 815000, 999 },
+ { 1, { 652800, HFPLL, 1, 34 }, L2(3), 825000, 999 },
+ { 1, { 729600, HFPLL, 1, 38 }, L2(4), 835000, 999 },
+ { 0, { 806400, HFPLL, 1, 42 }, L2(4), 845000, 999 },
+ { 1, { 883200, HFPLL, 1, 46 }, L2(4), 855000, 999 },
+ { 1, { 960000, HFPLL, 1, 50 }, L2(9), 865000, 999 },
+ { 1, { 1036800, HFPLL, 1, 54 }, L2(10), 875000, 999 },
+ { 0, { 1113600, HFPLL, 1, 58 }, L2(10), 890000, 999 },
+ { 1, { 1190400, HFPLL, 1, 62 }, L2(10), 900000, 999 },
+ { 1, { 1267200, HFPLL, 1, 66 }, L2(13), 915000, 999 },
+ { 0, { 1344000, HFPLL, 1, 70 }, L2(14), 925000, 999 },
+ { 0, { 1420800, HFPLL, 1, 74 }, L2(15), 940000, 999 },
+ { 1, { 1497600, HFPLL, 1, 78 }, L2(16), 950000, 999 },
+ { 1, { 1574400, HFPLL, 1, 82 }, L2(17), 965000, 999 },
+ { 0, { 1651200, HFPLL, 1, 86 }, L2(17), 980000, 999 },
+ { 1, { 1728000, HFPLL, 1, 90 }, L2(18), 995000, 999 },
+ { 0, { 1804800, HFPLL, 1, 94 }, L2(18), 1010000, 999 },
+ { 0, { 1881600, HFPLL, 1, 98 }, L2(18), 1025000, 999 },
+ { 1, { 1958400, HFPLL, 1, 102 }, L2(19), 1040000, 999 },
+ { 0, { 2035200, HFPLL, 1, 106 }, L2(19), 1055000, 999 },
+ { 0, { 2112000, HFPLL, 1, 110 }, L2(19), 1070000, 999 },
+ { 0, { 2188800, HFPLL, 1, 114 }, L2(19), 1085000, 999 },
+ { 1, { 2265600, HFPLL, 1, 118 }, L2(19), 1100000, 999 },
+ /* higher frequencies aren't available for bring up */
+ { 0, { 0 } }
+};
+
+
static struct pvs_table pvs_v1[NUM_SPEED_BINS][NUM_PVS] __initdata = {
/* 8974v1 1.7GHz Parts */
[0][0] = { acpu_freq_tbl_v1_pvs0, sizeof(acpu_freq_tbl_v1_pvs0) },
@@ -929,7 +962,7 @@
[1][6] = { acpu_freq_tbl_2p3g_pvs6, sizeof(acpu_freq_tbl_2p3g_pvs6) },
[1][7] = { acpu_freq_tbl_2p3g_pvs6, sizeof(acpu_freq_tbl_2p3g_pvs6) },
- /* 8974v2 2.0GHz Parts */
+ /* 8974v2 2.2GHz Parts */
[2][0] = { acpu_freq_tbl_2p2g_pvs0, sizeof(acpu_freq_tbl_2p2g_pvs0) },
[2][1] = { acpu_freq_tbl_2p2g_pvs1, sizeof(acpu_freq_tbl_2p2g_pvs1) },
[2][2] = { acpu_freq_tbl_2p2g_pvs2, sizeof(acpu_freq_tbl_2p2g_pvs2) },
@@ -939,6 +972,16 @@
[2][6] = { acpu_freq_tbl_2p2g_pvs6, sizeof(acpu_freq_tbl_2p2g_pvs6) },
[2][7] = { acpu_freq_tbl_2p2g_pvs6, sizeof(acpu_freq_tbl_2p2g_pvs6) },
+ /* 8974v3 Bringup */
+ [3][0] = { acpu_freq_tbl_v3_pvs0, sizeof(acpu_freq_tbl_v3_pvs0) },
+ [3][1] = { acpu_freq_tbl_v3_pvs0, sizeof(acpu_freq_tbl_v3_pvs0) },
+ [3][2] = { acpu_freq_tbl_v3_pvs0, sizeof(acpu_freq_tbl_v3_pvs0) },
+ [3][3] = { acpu_freq_tbl_v3_pvs0, sizeof(acpu_freq_tbl_v3_pvs0) },
+ [3][4] = { acpu_freq_tbl_v3_pvs0, sizeof(acpu_freq_tbl_v3_pvs0) },
+ [3][5] = { acpu_freq_tbl_v3_pvs0, sizeof(acpu_freq_tbl_v3_pvs0) },
+ [3][6] = { acpu_freq_tbl_v3_pvs0, sizeof(acpu_freq_tbl_v3_pvs0) },
+ [3][7] = { acpu_freq_tbl_v3_pvs0, sizeof(acpu_freq_tbl_v3_pvs0) },
+
};
static struct msm_bus_scale_pdata bus_scale_data __initdata = {
diff --git a/arch/arm/mach-msm/acpuclock-9625.c b/arch/arm/mach-msm/acpuclock-9625.c
index 42659f9..f2e7602 100644
--- a/arch/arm/mach-msm/acpuclock-9625.c
+++ b/arch/arm/mach-msm/acpuclock-9625.c
@@ -65,7 +65,6 @@
static struct acpuclk_drv_data drv_data = {
.freq_tbl = acpu_freq_tbl,
- .current_speed = &(struct clkctl_acpu_speed){ 0 },
.bus_scale = &bus_client_pdata,
.vdd_max_cpu = LVL_HIGH,
.vdd_max_mem = 1050000,
@@ -81,8 +80,8 @@
.update_mask = RCG_CONFIG_PGM_DATA_BIT | RCG_CONFIG_PGM_ENA_BIT,
.poll_mask = RCG_CONFIG_PGM_DATA_BIT,
},
- .power_collapse_khz = 19200,
- .wait_for_irq_khz = 19200,
+ .power_collapse_khz = 300000,
+ .wait_for_irq_khz = 300000,
};
static int __init acpuclk_9625_probe(struct platform_device *pdev)
@@ -138,6 +137,9 @@
regval |= GPLL0_TO_A5_ALWAYS_ENABLE;
writel_relaxed(regval, drv_data.apcs_cpu_pwr_ctl);
+ /* Enable the always on source */
+ clk_prepare_enable(drv_data.src_clocks[PLL0].clk);
+
return acpuclk_cortex_init(pdev, &drv_data);
}
diff --git a/arch/arm/mach-msm/acpuclock-cortex.c b/arch/arm/mach-msm/acpuclock-cortex.c
index afa6909..baa1c7b 100644
--- a/arch/arm/mach-msm/acpuclock-cortex.c
+++ b/arch/arm/mach-msm/acpuclock-cortex.c
@@ -138,6 +138,49 @@
pr_warn("acpu rcg didn't update its configuration\n");
}
+static struct clkctl_acpu_speed *__init find_cur_cpu_level(void)
+{
+ struct clkctl_acpu_speed *f, *max = priv->freq_tbl;
+ void __iomem *apcs_rcg_config = priv->apcs_rcg_config;
+ struct acpuclk_reg_data *r = &priv->reg_data;
+ u32 regval, div, src;
+ unsigned long rate;
+ struct clk *parent;
+
+ regval = readl_relaxed(apcs_rcg_config);
+ src = regval & r->cfg_src_mask;
+ src >>= r->cfg_src_shift;
+
+ div = regval & r->cfg_div_mask;
+ div >>= r->cfg_div_shift;
+ /* No support for half-integer dividers */
+ div = div > 1 ? (div + 1) / 2 : 0;
+
+ for (f = priv->freq_tbl; f->khz; f++) {
+ if (f->use_for_scaling)
+ max = f;
+
+ if (f->src_sel != src || f->src_div != div)
+ continue;
+
+ parent = priv->src_clocks[f->src].clk;
+ rate = parent->rate / (div ? div : 1);
+ if (f->khz * 1000 == rate)
+ break;
+ }
+
+ if (f->khz)
+ return f;
+
+ pr_err("CPUs are running at an unknown rate. Defaulting to %u KHz.\n",
+ max->khz);
+
+ /* Change to a safe frequency */
+ select_clk_source_div(priv, priv->freq_tbl);
+ /* Default to largest frequency */
+ return max;
+}
+
static int set_speed_atomic(struct clkctl_acpu_speed *tgt_s)
{
struct clkctl_acpu_speed *strt_s = priv->current_speed;
@@ -231,7 +274,7 @@
strt_s = priv->current_speed;
/* Return early if rate didn't change */
- if (rate == strt_s->khz)
+ if (rate == strt_s->khz && reason != SETRATE_INIT)
goto out;
/* Find target frequency */
@@ -244,7 +287,7 @@
}
/* Increase VDD levels if needed */
- if ((reason == SETRATE_CPUFREQ || reason == SETRATE_INIT)
+ if ((reason == SETRATE_CPUFREQ)
&& (tgt_s->khz > strt_s->khz)) {
rc = increase_vdd(tgt_s->vdd_cpu, tgt_s->vdd_mem);
if (rc)
@@ -274,7 +317,7 @@
set_bus_bw(tgt_s->bw_level);
/* Drop VDD levels if we can. */
- if (tgt_s->khz < strt_s->khz)
+ if (tgt_s->khz < strt_s->khz || reason == SETRATE_INIT)
decrease_vdd(tgt_s->vdd_cpu, tgt_s->vdd_mem);
out:
@@ -325,11 +368,45 @@
.get_rate = acpuclk_cortex_get_rate,
};
+void __init get_speed_bin(void __iomem *base, struct bin_info *bin)
+{
+ u32 pte_efuse, redundant_sel;
+
+ pte_efuse = readl_relaxed(base);
+ redundant_sel = (pte_efuse >> 24) & 0x7;
+ bin->speed = pte_efuse & 0x7;
+
+ if (redundant_sel == 1)
+ bin->speed = (pte_efuse >> 27) & 0x7;
+
+ bin->speed_valid = !!(pte_efuse & BIT(3));
+}
+
+static struct clkctl_acpu_speed *__init select_freq_plan(void)
+{
+ struct bin_info bin;
+
+ if (!priv->pte_efuse_base)
+ return priv->freq_tbl;
+
+ get_speed_bin(priv->pte_efuse_base, &bin);
+
+ if (bin.speed_valid) {
+ pr_info("SPEED BIN: %d\n", bin.speed);
+ } else {
+ bin.speed = 0;
+ pr_warn("SPEED BIN: Defaulting to %d\n",
+ bin.speed);
+ }
+
+ return priv->pvs_tables[bin.speed];
+}
+
int __init acpuclk_cortex_init(struct platform_device *pdev,
struct acpuclk_drv_data *data)
{
- unsigned long max_cpu_khz = 0;
- int i, rc;
+ int rc;
+ int parent;
priv = data;
mutex_init(&priv->lock);
@@ -337,52 +414,53 @@
acpuclk_cortex_data.power_collapse_khz = priv->wait_for_irq_khz;
acpuclk_cortex_data.wait_for_irq_khz = priv->wait_for_irq_khz;
+ priv->freq_tbl = select_freq_plan();
+ if (!priv->freq_tbl) {
+ pr_err("Invalid freq table selected\n");
+ BUG();
+ }
+
bus_perf_client = msm_bus_scale_register_client(priv->bus_scale);
if (!bus_perf_client) {
pr_err("Unable to register bus client\n");
BUG();
}
- /* Improve boot time by ramping up CPU immediately */
- for (i = 0; priv->freq_tbl[i].khz != 0; i++)
- if (priv->freq_tbl[i].use_for_scaling)
- max_cpu_khz = priv->freq_tbl[i].khz;
-
/* Initialize regulators */
rc = increase_vdd(priv->vdd_max_cpu, priv->vdd_max_mem);
if (rc)
- goto err_vdd;
+ return rc;
if (priv->vdd_mem) {
rc = regulator_enable(priv->vdd_mem);
if (rc) {
dev_err(&pdev->dev, "regulator_enable for mem failed\n");
- goto err_vdd;
+ return rc;
}
}
rc = regulator_enable(priv->vdd_cpu);
if (rc) {
dev_err(&pdev->dev, "regulator_enable for cpu failed\n");
- goto err_vdd_cpu;
+ return rc;
}
- /*
- * Select a state which is always a valid transition to align SW with
- * the HW configuration set by the bootloaders.
- */
- acpuclk_cortex_set_rate(0, acpuclk_cortex_data.power_collapse_khz,
- SETRATE_INIT);
- acpuclk_cortex_set_rate(0, max_cpu_khz, SETRATE_INIT);
+ priv->current_speed = find_cur_cpu_level();
+ parent = priv->current_speed->src;
+ rc = clk_prepare_enable(priv->src_clocks[parent].clk);
+ if (rc) {
+ dev_err(&pdev->dev, "handoff: prepare_enable failed\n");
+ return rc;
+ }
+
+ rc = acpuclk_cortex_set_rate(0, priv->current_speed->khz, SETRATE_INIT);
+ if (rc) {
+ dev_err(&pdev->dev, "handoff: set rate failed\n");
+ return rc;
+ }
acpuclk_register(&acpuclk_cortex_data);
cpufreq_table_init();
return 0;
-
-err_vdd_cpu:
- if (priv->vdd_mem)
- regulator_disable(priv->vdd_mem);
-err_vdd:
- return rc;
}
diff --git a/arch/arm/mach-msm/acpuclock-cortex.h b/arch/arm/mach-msm/acpuclock-cortex.h
index 89a0a84..00f182d 100644
--- a/arch/arm/mach-msm/acpuclock-cortex.h
+++ b/arch/arm/mach-msm/acpuclock-cortex.h
@@ -17,6 +17,8 @@
#define LVL_NOM RPM_REGULATOR_CORNER_NORMAL
#define LVL_HIGH RPM_REGULATOR_CORNER_SUPER_TURBO
+#define NUM_SPEED_BIN 8
+
enum clk_src {
CXO,
PLL0,
@@ -52,6 +54,8 @@
struct acpuclk_drv_data {
struct mutex lock;
struct clkctl_acpu_speed *freq_tbl;
+ struct clkctl_acpu_speed **pvs_tables;
+ void __iomem *pte_efuse_base;
struct clkctl_acpu_speed *current_speed;
struct msm_bus_scale_pdata *bus_scale;
void __iomem *apcs_rcg_config;
@@ -67,6 +71,11 @@
unsigned long wait_for_irq_khz;
};
+struct bin_info {
+ bool speed_valid;
+ int speed;
+};
+
/* Instantaneous bandwidth requests in MB/s. */
#define BW_MBPS(_bw) \
{ \
diff --git a/arch/arm/mach-msm/acpuclock.c b/arch/arm/mach-msm/acpuclock.c
index c722304..2c120da 100644
--- a/arch/arm/mach-msm/acpuclock.c
+++ b/arch/arm/mach-msm/acpuclock.c
@@ -44,6 +44,8 @@
uint32_t acpuclk_get_switch_time(void)
{
+ if (!acpuclk_data)
+ return 0;
return acpuclk_data->switch_time_us;
}
diff --git a/arch/arm/mach-msm/bms-batterydata-qrd-4v2-1300mah.c b/arch/arm/mach-msm/bms-batterydata-qrd-4v2-1300mah.c
new file mode 100644
index 0000000..a2c6391
--- /dev/null
+++ b/arch/arm/mach-msm/bms-batterydata-qrd-4v2-1300mah.c
@@ -0,0 +1,112 @@
+/* Copyright (c) 2013, The Linux Foundation. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 and
+ * only version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#include <linux/mfd/pm8xxx/batterydata-lib.h>
+
+static struct single_row_lut fcc_temp = {
+ .x = {-20, 0, 25, 40, 60},
+ .y = {1343, 1353, 1408, 1345, 1342},
+ .cols = 5
+};
+
+static struct single_row_lut fcc_sf = {
+ .x = {0},
+ .y = {100},
+ .cols = 1
+};
+
+static struct sf_lut rbatt_sf = {
+ .rows = 29,
+ .cols = 5,
+ .row_entries = {-20, 0, 25, 40, 60},
+ .percent = {100, 95, 90, 85, 80, 75, 70, 65, 60, 55, 50, 45, 40, 35,
+ 30, 25, 20, 15, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0},
+ .sf = {
+ {604, 192, 100, 79, 71},
+ {605, 192, 100, 79, 71},
+ {641, 205, 103, 81, 72},
+ {641, 221, 108, 84, 75},
+ {622, 238, 115, 87, 77},
+ {612, 254, 123, 92, 79},
+ {605, 252, 137, 96, 83},
+ {607, 219, 154, 104, 87},
+ {613, 202, 135, 109, 89},
+ {626, 200, 106, 90, 77},
+ {656, 201, 101, 82, 75},
+ {684, 204, 100, 84, 77},
+ {710, 211, 100, 85, 79},
+ {747, 224, 106, 89, 82},
+ {806, 241, 116, 90, 80},
+ {905, 260, 119, 87, 77},
+ {1046, 291, 113, 87, 77},
+ {1309, 329, 116, 90, 79},
+ {1476, 300, 126, 97, 83},
+ {1598, 311, 127, 98, 84},
+ {1771, 323, 130, 99, 85},
+ {1984, 342, 136, 101, 86},
+ {2438, 368, 140, 101, 86},
+ {3381, 388, 137, 100, 84},
+ {4913, 414, 141, 99, 86},
+ {6979, 468, 155, 104, 90},
+ {9968, 565, 192, 113, 98},
+ {16163, 833, 350, 140, 120},
+ {36511, 6483, 4872, 472, 1095}
+ }
+};
+
+static struct pc_temp_ocv_lut pc_temp_ocv = {
+ .rows = 29,
+ .cols = 5,
+ .temp = {-20, 0, 25, 40, 60},
+ .percent = {100, 95, 90, 85, 80, 75, 70, 65, 60, 55, 50, 45, 40, 35,
+ 30, 25, 20, 15, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0},
+ .ocv = {
+ {4177, 4174, 4199, 4167, 4162},
+ {4107, 4112, 4141, 4109, 4106},
+ {4058, 4064, 4091, 4061, 4059},
+ {3996, 4015, 4044, 4017, 4015},
+ {3947, 3975, 4001, 3978, 3976},
+ {3909, 3939, 3962, 3943, 3940},
+ {3874, 3901, 3926, 3911, 3907},
+ {3845, 3858, 3892, 3882, 3878},
+ {3821, 3826, 3851, 3849, 3846},
+ {3801, 3804, 3815, 3810, 3808},
+ {3788, 3789, 3793, 3789, 3787},
+ {3778, 3780, 3778, 3776, 3773},
+ {3769, 3776, 3770, 3767, 3764},
+ {3757, 3772, 3766, 3762, 3757},
+ {3740, 3765, 3762, 3754, 3744},
+ {3714, 3747, 3750, 3739, 3724},
+ {3668, 3706, 3717, 3710, 3697},
+ {3602, 3644, 3662, 3662, 3654},
+ {3533, 3571, 3601, 3607, 3605},
+ {3518, 3557, 3583, 3592, 3590},
+ {3500, 3543, 3565, 3576, 3574},
+ {3478, 3528, 3546, 3559, 3557},
+ {3451, 3506, 3521, 3538, 3534},
+ {3417, 3473, 3481, 3505, 3496},
+ {3377, 3423, 3424, 3454, 3444},
+ {3327, 3361, 3351, 3391, 3380},
+ {3261, 3279, 3258, 3310, 3297},
+ {3165, 3165, 3138, 3198, 3182},
+ {3000, 3000, 3000, 3000, 3000}
+ }
+};
+
+struct bms_battery_data qrd_4v2_1300mah_data = {
+ .fcc = 1300,
+ .fcc_temp_lut = &fcc_temp,
+ .fcc_sf_lut = &fcc_sf,
+ .pc_temp_ocv_lut = &pc_temp_ocv,
+ .rbatt_sf_lut = &rbatt_sf,
+ .default_rbatt_mohm = 172
+};
diff --git a/arch/arm/mach-msm/board-8064-pmic.c b/arch/arm/mach-msm/board-8064-pmic.c
index b2dcd7a..318e933 100644
--- a/arch/arm/mach-msm/board-8064-pmic.c
+++ b/arch/arm/mach-msm/board-8064-pmic.c
@@ -481,7 +481,7 @@
.enable_fcc_learning = 1,
.min_fcc_learning_soc = 20,
.min_fcc_ocv_pc = 30,
- .max_fcc_learning_samples = 5,
+ .min_fcc_learning_samples = 5,
};
static struct pm8921_platform_data
diff --git a/arch/arm/mach-msm/board-8084-gpiomux.c b/arch/arm/mach-msm/board-8084-gpiomux.c
index 8d5bb49..27f2e0d 100644
--- a/arch/arm/mach-msm/board-8084-gpiomux.c
+++ b/arch/arm/mach-msm/board-8084-gpiomux.c
@@ -17,6 +17,27 @@
#include <mach/board.h>
#include <mach/gpiomux.h>
+static struct gpiomux_setting gpio_i2c_config = {
+ .func = GPIOMUX_FUNC_3,
+ .drv = GPIOMUX_DRV_2MA,
+ .pull = GPIOMUX_PULL_NONE,
+};
+
+static struct msm_gpiomux_config msm_blsp_configs[] __initdata = {
+ {
+ .gpio = 10, /* BLSP1 QUP3 I2C_SDA */
+ .settings = {
+ [GPIOMUX_SUSPENDED] = &gpio_i2c_config,
+ },
+ },
+ {
+ .gpio = 11, /* BLSP1 QUP3 I2C_SCL */
+ .settings = {
+ [GPIOMUX_SUSPENDED] = &gpio_i2c_config,
+ },
+ },
+};
+
void __init apq8084_init_gpiomux(void)
{
int rc;
@@ -26,4 +47,6 @@
pr_err("%s failed %d\n", __func__, rc);
return;
}
+
+ msm_gpiomux_install(msm_blsp_configs, ARRAY_SIZE(msm_blsp_configs));
}
diff --git a/arch/arm/mach-msm/board-8084.c b/arch/arm/mach-msm/board-8084.c
index 67c05ba..7dc9a90 100644
--- a/arch/arm/mach-msm/board-8084.c
+++ b/arch/arm/mach-msm/board-8084.c
@@ -16,6 +16,7 @@
#include <linux/of_address.h>
#include <linux/of_platform.h>
#include <linux/memory.h>
+#include <linux/msm_tsens.h>
#include <asm/hardware/gic.h>
#include <asm/mach/map.h>
#include <asm/mach/arch.h>
@@ -86,6 +87,7 @@
msm_init_modem_notifier_list();
msm_smd_init();
msm_clock_init(&msm8084_clock_init_data);
+ tsens_tm_init_driver();
}
static void __init apq8084_map_io(void)
diff --git a/arch/arm/mach-msm/board-8092.c b/arch/arm/mach-msm/board-8092.c
index 7b81c11..56826c7 100644
--- a/arch/arm/mach-msm/board-8092.c
+++ b/arch/arm/mach-msm/board-8092.c
@@ -75,6 +75,8 @@
static struct of_dev_auxdata mpq8092_auxdata_lookup[] __initdata = {
OF_DEV_AUXDATA("qcom,msm-lsuart-v14", 0xF991F000, \
"msm_serial_hsl.0", NULL),
+ OF_DEV_AUXDATA("qcom,msm-lsuart-v14", 0xF9922000, \
+ "msm_serial_hsl.1", NULL),
OF_DEV_AUXDATA("qcom,msm-sdcc", 0xF9824000, \
"msm_sdcc.1", NULL),
OF_DEV_AUXDATA("qcom,msm-sdcc", 0xF98A4000, \
@@ -96,6 +98,8 @@
static const char *mpq8092_dt_match[] __initconst = {
"qcom,mpq8092-sim",
+ "qcom,mpq8092-rumi",
+ "qcom,mpq8092",
NULL
};
diff --git a/arch/arm/mach-msm/board-8226-gpiomux.c b/arch/arm/mach-msm/board-8226-gpiomux.c
index 6491452..a32031d 100644
--- a/arch/arm/mach-msm/board-8226-gpiomux.c
+++ b/arch/arm/mach-msm/board-8226-gpiomux.c
@@ -136,8 +136,8 @@
static struct gpiomux_setting lcd_rst_act_cfg = {
.func = GPIOMUX_FUNC_GPIO,
.drv = GPIOMUX_DRV_8MA,
- .pull = GPIOMUX_PULL_NONE,
- .dir = GPIOMUX_OUT_LOW,
+ .pull = GPIOMUX_PULL_UP,
+ .dir = GPIOMUX_OUT_HIGH,
};
static struct gpiomux_setting lcd_rst_sus_cfg = {
@@ -211,6 +211,18 @@
[GPIOMUX_SUSPENDED] = &gpio_spi_cs_eth_config,
},
},
+ { /* NFC */
+ .gpio = 10, /* BLSP1 QUP3 I2C_DAT */
+ .settings = {
+ [GPIOMUX_SUSPENDED] = &gpio_i2c_config,
+ },
+ },
+ { /* NFC */
+ .gpio = 11, /* BLSP1 QUP3 I2C_CLK */
+ .settings = {
+ [GPIOMUX_SUSPENDED] = &gpio_i2c_config,
+ },
+ },
};
static struct msm_gpiomux_config msm_synaptics_configs[] __initdata = {
@@ -485,7 +497,7 @@
msm_gpiomux_install(msm_auxpcm_configs,
ARRAY_SIZE(msm_auxpcm_configs));
- if (of_board_is_cdp() || of_board_is_mtp())
+ if (of_board_is_cdp() || of_board_is_mtp() || of_board_is_xpm())
msm_gpiomux_install(usb_otg_sw_configs,
ARRAY_SIZE(usb_otg_sw_configs));
}
diff --git a/arch/arm/mach-msm/board-8226.c b/arch/arm/mach-msm/board-8226.c
index 0205919..39efcd8 100644
--- a/arch/arm/mach-msm/board-8226.c
+++ b/arch/arm/mach-msm/board-8226.c
@@ -49,6 +49,7 @@
#include "clock.h"
#include "platsmp.h"
#include "spm.h"
+#include "pm.h"
#include "lpm_resources.h"
#include "modem_notifier.h"
@@ -111,6 +112,7 @@
msm_rpm_driver_init();
msm_lpmrs_module_init();
msm_spm_device_init();
+ msm_pm_sleep_status_init();
rpm_regulator_smd_driver_init();
qpnp_regulator_init();
if (of_board_is_rumi())
@@ -136,6 +138,7 @@
static const char *msm8226_dt_match[] __initconst = {
"qcom,msm8226",
"qcom,msm8926",
+ "qcom,apq8026",
NULL
};
diff --git a/arch/arm/mach-msm/board-8610-gpiomux.c b/arch/arm/mach-msm/board-8610-gpiomux.c
index 7096f3f..b261ce4 100644
--- a/arch/arm/mach-msm/board-8610-gpiomux.c
+++ b/arch/arm/mach-msm/board-8610-gpiomux.c
@@ -84,6 +84,20 @@
.pull = GPIOMUX_PULL_DOWN,
};
+static struct gpiomux_setting lcd_te_act_config = {
+ .func = GPIOMUX_FUNC_1,
+ .drv = GPIOMUX_DRV_2MA,
+ .pull = GPIOMUX_PULL_DOWN,
+ .dir = GPIOMUX_IN,
+};
+
+static struct gpiomux_setting lcd_te_sus_config = {
+ .func = GPIOMUX_FUNC_1,
+ .drv = GPIOMUX_DRV_2MA,
+ .pull = GPIOMUX_PULL_DOWN,
+ .dir = GPIOMUX_IN,
+};
+
static struct gpiomux_setting gpio_keys_active = {
.func = GPIOMUX_FUNC_GPIO,
.drv = GPIOMUX_DRV_2MA,
@@ -111,6 +125,13 @@
[GPIOMUX_SUSPENDED] = &lcd_en_sus_cfg,
},
},
+ {
+ .gpio = 12,
+ .settings = {
+ [GPIOMUX_ACTIVE] = &lcd_te_act_config,
+ [GPIOMUX_SUSPENDED] = &lcd_te_sus_config,
+ },
+ },
};
static struct msm_gpiomux_config msm_blsp_configs[] __initdata = {
@@ -231,6 +252,125 @@
},
};
+static struct gpiomux_setting gpio_suspend_config[] = {
+ {
+ .func = GPIOMUX_FUNC_GPIO, /* IN-NP */
+ .drv = GPIOMUX_DRV_2MA,
+ .pull = GPIOMUX_PULL_NONE,
+ },
+ {
+ .func = GPIOMUX_FUNC_GPIO, /* O-LOW */
+ .drv = GPIOMUX_DRV_2MA,
+ .pull = GPIOMUX_PULL_NONE,
+ .dir = GPIOMUX_OUT_LOW,
+ },
+};
+
+static struct gpiomux_setting cam_settings[] = {
+ {
+ .func = GPIOMUX_FUNC_1, /*active 1*/ /* 0 */
+ .drv = GPIOMUX_DRV_2MA,
+ .pull = GPIOMUX_PULL_NONE,
+ },
+
+ {
+ .func = GPIOMUX_FUNC_1, /*suspend*/ /* 1 */
+ .drv = GPIOMUX_DRV_2MA,
+ .pull = GPIOMUX_PULL_DOWN,
+ },
+
+ {
+ .func = GPIOMUX_FUNC_1, /*i2c suspend*/ /* 2 */
+ .drv = GPIOMUX_DRV_2MA,
+ .pull = GPIOMUX_PULL_KEEPER,
+ },
+
+ {
+ .func = GPIOMUX_FUNC_GPIO, /*active 0*/ /* 3 */
+ .drv = GPIOMUX_DRV_2MA,
+ .pull = GPIOMUX_PULL_NONE,
+ },
+
+ {
+ .func = GPIOMUX_FUNC_GPIO, /*suspend 0*/ /* 4 */
+ .drv = GPIOMUX_DRV_2MA,
+ .pull = GPIOMUX_PULL_DOWN,
+ },
+};
+
+static struct msm_gpiomux_config msm_sensor_configs[] __initdata = {
+ {
+ .gpio = 13, /* CAM_MCLK0 */
+ .settings = {
+ [GPIOMUX_ACTIVE] = &cam_settings[0],
+ [GPIOMUX_SUSPENDED] = &cam_settings[1],
+ },
+ },
+ {
+ .gpio = 14, /* CAM_MCLK1 */
+ .settings = {
+ [GPIOMUX_ACTIVE] = &cam_settings[0],
+ [GPIOMUX_SUSPENDED] = &cam_settings[1],
+ },
+ },
+ {
+ .gpio = 16, /* CCI_I2C_SDA */
+ .settings = {
+ [GPIOMUX_ACTIVE] = &cam_settings[0],
+ [GPIOMUX_SUSPENDED] = &gpio_suspend_config[0],
+ },
+ },
+ {
+ .gpio = 17, /* CCI_I2C_SCL */
+ .settings = {
+ [GPIOMUX_ACTIVE] = &cam_settings[0],
+ [GPIOMUX_SUSPENDED] = &gpio_suspend_config[0],
+ },
+ },
+ {
+ .gpio = 18, /* FLASH_LED_EN */
+ .settings = {
+ [GPIOMUX_ACTIVE] = &cam_settings[0],
+ [GPIOMUX_SUSPENDED] = &gpio_suspend_config[1],
+ },
+ },
+ {
+ .gpio = 19, /* FLASH_LED_NOW */
+ .settings = {
+ [GPIOMUX_ACTIVE] = &cam_settings[0],
+ [GPIOMUX_SUSPENDED] = &gpio_suspend_config[1],
+ },
+ },
+ {
+ .gpio = 8, /* CAM1_STANDBY_N */
+ .settings = {
+ [GPIOMUX_ACTIVE] = &cam_settings[3],
+ [GPIOMUX_SUSPENDED] = &gpio_suspend_config[1],
+ },
+ },
+ {
+ .gpio = 15, /* CAM1_RST_N */
+ .settings = {
+ [GPIOMUX_ACTIVE] = &cam_settings[3],
+ [GPIOMUX_SUSPENDED] = &gpio_suspend_config[1],
+ },
+ },
+ {
+ .gpio = 20, /* WEBCAM1_STANDBY */
+ .settings = {
+ [GPIOMUX_ACTIVE] = &cam_settings[3],
+ [GPIOMUX_SUSPENDED] = &gpio_suspend_config[1],
+ },
+ },
+ {
+ .gpio = 21, /* WEBCAM2_RESET_N */
+ .settings = {
+ [GPIOMUX_ACTIVE] = &cam_settings[3],
+ [GPIOMUX_SUSPENDED] = &gpio_suspend_config[1],
+ },
+ },
+};
+
static struct msm_gpiomux_config msm_keypad_configs[] __initdata = {
{
.gpio = 72,
@@ -298,4 +438,5 @@
msm_gpiomux_install(msm_keypad_configs,
ARRAY_SIZE(msm_keypad_configs));
msm_gpiomux_install(sd_card_det, ARRAY_SIZE(sd_card_det));
+ msm_gpiomux_install(msm_sensor_configs, ARRAY_SIZE(msm_sensor_configs));
}
diff --git a/arch/arm/mach-msm/board-8610.c b/arch/arm/mach-msm/board-8610.c
index 962ed65..b4d77f1 100644
--- a/arch/arm/mach-msm/board-8610.c
+++ b/arch/arm/mach-msm/board-8610.c
@@ -50,6 +50,7 @@
#include "clock.h"
#include "platsmp.h"
#include "spm.h"
+#include "pm.h"
#include "lpm_resources.h"
#include "modem_notifier.h"
@@ -106,6 +107,7 @@
msm_rpm_driver_init();
msm_lpmrs_module_init();
msm_spm_device_init();
+ msm_pm_sleep_status_init();
rpm_regulator_smd_driver_init();
qpnp_regulator_init();
tsens_tm_init_driver();
diff --git a/arch/arm/mach-msm/board-8930-pmic.c b/arch/arm/mach-msm/board-8930-pmic.c
index d7e678e..31937a0 100644
--- a/arch/arm/mach-msm/board-8930-pmic.c
+++ b/arch/arm/mach-msm/board-8930-pmic.c
@@ -484,7 +484,7 @@
.enable_fcc_learning = 1,
.min_fcc_learning_soc = 20,
.min_fcc_ocv_pc = 30,
- .max_fcc_learning_samples = 5,
+ .min_fcc_learning_samples = 5,
};
static struct pm8038_platform_data pm8038_platform_data __devinitdata = {
diff --git a/arch/arm/mach-msm/board-8960-pmic.c b/arch/arm/mach-msm/board-8960-pmic.c
index 8e758bf..7a5c74c 100644
--- a/arch/arm/mach-msm/board-8960-pmic.c
+++ b/arch/arm/mach-msm/board-8960-pmic.c
@@ -441,7 +441,7 @@
.enable_fcc_learning = 1,
.min_fcc_learning_soc = 20,
.min_fcc_ocv_pc = 30,
- .max_fcc_learning_samples = 5,
+ .min_fcc_learning_samples = 5,
};
#define PM8921_LC_LED_MAX_CURRENT 4 /* I = 4mA */
diff --git a/arch/arm/mach-msm/board-8974.c b/arch/arm/mach-msm/board-8974.c
index 35e46fc..771359c 100644
--- a/arch/arm/mach-msm/board-8974.c
+++ b/arch/arm/mach-msm/board-8974.c
@@ -95,6 +95,7 @@
msm_smd_init();
msm_rpm_driver_init();
msm_lpmrs_module_init();
+ msm_pm_sleep_status_init();
rpm_regulator_smd_driver_init();
msm_spm_device_init();
krait_power_init();
diff --git a/arch/arm/mach-msm/board-9625.c b/arch/arm/mach-msm/board-9625.c
index 6bb5655..56246dd 100644
--- a/arch/arm/mach-msm/board-9625.c
+++ b/arch/arm/mach-msm/board-9625.c
@@ -22,6 +22,7 @@
#include <linux/of_irq.h>
#include <linux/memory.h>
#include <linux/msm_tsens.h>
+#include <linux/msm_thermal.h>
#include <asm/mach/map.h>
#include <asm/hardware/gic.h>
#include <asm/mach/arch.h>
@@ -239,6 +240,7 @@
msm_clock_init(&msm9625_clock_init_data);
msm9625_init_buses();
tsens_tm_init_driver();
+ msm_thermal_device_init();
}
void __init msm9625_init(void)
diff --git a/arch/arm/mach-msm/board-krypton-gpiomux.c b/arch/arm/mach-msm/board-krypton-gpiomux.c
index 3d86ba7..ee38e5f 100644
--- a/arch/arm/mach-msm/board-krypton-gpiomux.c
+++ b/arch/arm/mach-msm/board-krypton-gpiomux.c
@@ -17,12 +17,37 @@
#include <mach/gpio.h>
#include <mach/gpiomux.h>
+#define KS8851_IRQ_GPIO 75
+
+#if defined(CONFIG_KS8851) || defined(CONFIG_KS8851_MODULE)
+static struct gpiomux_setting gpio_eth_config = {
+ .pull = GPIOMUX_PULL_UP,
+ .drv = GPIOMUX_DRV_2MA,
+ .func = GPIOMUX_FUNC_GPIO,
+};
+
+static struct msm_gpiomux_config msm_eth_config[] = {
+ {
+ .gpio = KS8851_IRQ_GPIO,
+ .settings = {
+ [GPIOMUX_SUSPENDED] = &gpio_eth_config,
+ }
+ },
+};
+#endif
+
static struct gpiomux_setting gpio_uart_config = {
.func = GPIOMUX_FUNC_1,
.drv = GPIOMUX_DRV_8MA,
.pull = GPIOMUX_PULL_NONE,
};
+static struct gpiomux_setting gpio_spi_config = {
+ .func = GPIOMUX_FUNC_2,
+ .drv = GPIOMUX_DRV_6MA,
+ .pull = GPIOMUX_PULL_NONE,
+};
+
static struct msm_gpiomux_config msm_blsp_configs[] __initdata = {
{
.gpio = 8, /* BLSP1 UART TX */
@@ -36,6 +61,30 @@
[GPIOMUX_SUSPENDED] = &gpio_uart_config,
},
},
+ {
+ .gpio = 20, /* BLSP1 QUP6 SPI_DATA_MOSI */
+ .settings = {
+ [GPIOMUX_SUSPENDED] = &gpio_spi_config,
+ },
+ },
+ {
+ .gpio = 21, /* BLSP1 QUP6 SPI_DATA_MISO */
+ .settings = {
+ [GPIOMUX_SUSPENDED] = &gpio_spi_config,
+ },
+ },
+ {
+ .gpio = 23, /* BLSP1 QUP6 SPI_CLK */
+ .settings = {
+ [GPIOMUX_SUSPENDED] = &gpio_spi_config,
+ },
+ },
+ {
+ .gpio = 22, /* BLSP1 QUP6 SPI_CS */
+ .settings = {
+ [GPIOMUX_SUSPENDED] = &gpio_spi_config,
+ },
+ },
};
void __init msmkrypton_init_gpiomux(void)
@@ -49,4 +98,7 @@
}
msm_gpiomux_install(msm_blsp_configs, ARRAY_SIZE(msm_blsp_configs));
+#if defined(CONFIG_KS8851) || defined(CONFIG_KS8851_MODULE)
+ msm_gpiomux_install(msm_eth_config, ARRAY_SIZE(msm_eth_config));
+#endif
}
diff --git a/arch/arm/mach-msm/board-krypton.c b/arch/arm/mach-msm/board-krypton.c
index 7b7b7cd..0d06b83 100644
--- a/arch/arm/mach-msm/board-krypton.c
+++ b/arch/arm/mach-msm/board-krypton.c
@@ -31,14 +31,8 @@
#include "clock.h"
#include "devices.h"
-static struct clk_lookup msm_clocks_dummy[] = {
- CLK_DUMMY("core_clk", BLSP1_UART_CLK, "f991f000.serial", OFF),
- CLK_DUMMY("iface_clk", BLSP1_UART_CLK, "f991f000.serial", OFF),
-};
-
-static struct clock_init_data msm_dummy_clock_init_data __initdata = {
- .table = msm_clocks_dummy,
- .size = ARRAY_SIZE(msm_clocks_dummy),
+static struct of_dev_auxdata msmkrypton_auxdata_lookup[] __initdata = {
+ {}
};
/*
@@ -50,7 +44,7 @@
void __init msmkrypton_add_drivers(void)
{
msm_smd_init();
- msm_clock_init(&msm_dummy_clock_init_data);
+ msm_clock_init(&msmkrypton_clock_init_data);
}
static void __init msmkrypton_map_io(void)
@@ -64,7 +58,7 @@
pr_err("%s: socinfo_init() failed\n", __func__);
msmkrypton_init_gpiomux();
- board_dt_populate(adata);
+ board_dt_populate(msmkrypton_auxdata_lookup);
msmkrypton_add_drivers();
}
diff --git a/arch/arm/mach-msm/board-samarium.c b/arch/arm/mach-msm/board-samarium.c
index a656cee..574c979 100644
--- a/arch/arm/mach-msm/board-samarium.c
+++ b/arch/arm/mach-msm/board-samarium.c
@@ -53,6 +53,40 @@
{},
};
+static struct memtype_reserve msmsamarium_reserve_table[] __initdata = {
+ [MEMTYPE_SMI] = {
+ },
+ [MEMTYPE_EBI0] = {
+ .flags = MEMTYPE_FLAGS_1M_ALIGN,
+ },
+ [MEMTYPE_EBI1] = {
+ .flags = MEMTYPE_FLAGS_1M_ALIGN,
+ },
+};
+
+static int msmsamarium_paddr_to_memtype(phys_addr_t paddr)
+{
+ return MEMTYPE_EBI1;
+}
+
+static struct reserve_info msmsamarium_reserve_info __initdata = {
+ .memtype_reserve_table = msmsamarium_reserve_table,
+ .paddr_to_memtype = msmsamarium_paddr_to_memtype,
+};
+
+void __init msmsamarium_reserve(void)
+{
+ reserve_info = &msmsamarium_reserve_info;
+ of_scan_flat_dt(dt_scan_for_memory_reserve, msmsamarium_reserve_table);
+ msm_reserve();
+}
+
+static void __init msmsamarium_early_memory(void)
+{
+ reserve_info = &msmsamarium_reserve_info;
+ of_scan_flat_dt(dt_scan_for_memory_hole, msmsamarium_reserve_table);
+}
+
/*
* Used to satisfy dependencies for devices that need to be
* run early or in a particular order. Most likely your device doesn't fall
@@ -81,6 +115,11 @@
msmsamarium_add_drivers();
}
+void __init msmsamarium_init_very_early(void)
+{
+ msmsamarium_early_memory();
+}
+
static const char *msmsamarium_dt_match[] __initconst = {
"qcom,msmsamarium",
NULL
@@ -93,6 +132,8 @@
.handle_irq = gic_handle_irq,
.timer = &msm_dt_timer,
.dt_compat = msmsamarium_dt_match,
+ .reserve = msmsamarium_reserve,
+ .init_very_early = msmsamarium_init_very_early,
.restart = msm_restart,
.smp = &msm8974_smp_ops,
MACHINE_END
diff --git a/arch/arm/mach-msm/clock-8084.c b/arch/arm/mach-msm/clock-8084.c
index 73a9de7..bec9f1b4 100644
--- a/arch/arm/mach-msm/clock-8084.c
+++ b/arch/arm/mach-msm/clock-8084.c
@@ -49,6 +49,8 @@
CLK_DUMMY("sleep_a_clk", NULL, "f9200000.qcom,ssusb", OFF),
CLK_DUMMY("utmi_clk", NULL, "f9200000.qcom,ssusb", OFF),
CLK_DUMMY("ref_clk", NULL, "f9200000.qcom,ssusb", OFF),
+ CLK_DUMMY("dfab_clk", DFAB_CLK, "msm_sps", OFF),
+ CLK_DUMMY("dma_bam_pclk", DMA_BAM_P_CLK, "msm_sps", OFF),
CLK_DUMMY("", ufs_axi_clk_src.c, "", OFF),
CLK_DUMMY("", usb30_master_clk_src.c, "", OFF),
CLK_DUMMY("", usb30_sec_master_clk_src.c, "", OFF),
@@ -73,12 +75,13 @@
CLK_DUMMY("", usb_hsic_system_clk_src.c, "", OFF),
CLK_DUMMY("", gcc_bam_dma_ahb_clk.c, "", OFF),
CLK_DUMMY("", gcc_bam_dma_inactivity_timers_clk.c, "", OFF),
- CLK_DUMMY("", gcc_blsp1_ahb_clk.c, "", OFF),
+ CLK_DUMMY("iface_clk", gcc_blsp1_ahb_clk.c, "f9925000.i2c", OFF),
CLK_DUMMY("", gcc_blsp1_qup1_i2c_apps_clk.c, "", OFF),
CLK_DUMMY("", gcc_blsp1_qup1_spi_apps_clk.c, "", OFF),
CLK_DUMMY("", gcc_blsp1_qup2_i2c_apps_clk.c, "", OFF),
CLK_DUMMY("", gcc_blsp1_qup2_spi_apps_clk.c, "", OFF),
- CLK_DUMMY("", gcc_blsp1_qup3_i2c_apps_clk.c, "", OFF),
+ CLK_DUMMY("core_clk", gcc_blsp1_qup3_i2c_apps_clk.c, "f9925000.i2c",
+ OFF),
CLK_DUMMY("", gcc_blsp1_qup3_spi_apps_clk.c, "", OFF),
CLK_DUMMY("", gcc_blsp1_qup4_i2c_apps_clk.c, "", OFF),
CLK_DUMMY("", gcc_blsp1_qup4_spi_apps_clk.c, "", OFF),
diff --git a/arch/arm/mach-msm/clock-8092.c b/arch/arm/mach-msm/clock-8092.c
index a8520e6..9de97ea 100644
--- a/arch/arm/mach-msm/clock-8092.c
+++ b/arch/arm/mach-msm/clock-8092.c
@@ -38,6 +38,8 @@
static struct clk_lookup msm_clocks_8092[] = {
CLK_DUMMY("core_clk", BLSP1_UART_CLK, "msm_serial_hsl.0", OFF),
CLK_DUMMY("iface_clk", BLSP1_UART_CLK, "msm_serial_hsl.0", OFF),
+ CLK_DUMMY("core_clk", BLSP1_UART_CLK, "msm_serial_hsl.1", OFF),
+ CLK_DUMMY("iface_clk", BLSP1_UART_CLK, "msm_serial_hsl.1", OFF),
CLK_DUMMY("core_clk", SDC1_CLK, "msm_sdcc.1", OFF),
CLK_DUMMY("iface_clk", SDC1_P_CLK, "msm_sdcc.1", OFF),
CLK_DUMMY("core_clk", SDC2_CLK, "msm_sdcc.2", OFF),
@@ -246,7 +248,9 @@
CLK_DUMMY("", mmss_mmssnoc_ahb_clk.c, "", OFF),
CLK_DUMMY("", mmss_mmssnoc_axi_clk.c, "", OFF),
CLK_DUMMY("", mmss_s0_axi_clk.c, "", OFF),
- CLK_DUMMY("", ocmemcx_ocmemnoc_clk.c, "", OFF),
+ CLK_DUMMY("core_clk", ocmemgx_core_clk.c, "fdd00000.qcom,ocmem", OFF),
+ CLK_DUMMY("iface_clk", ocmemcx_ocmemnoc_clk.c, "fdd00000.qcom.ocmem",
+ OFF),
CLK_DUMMY("", oxili_ocmemgx_clk.c, "", OFF),
CLK_DUMMY("", oxili_gfx3d_clk.c, "", OFF),
CLK_DUMMY("", oxilicx_ahb_clk.c, "", OFF),
diff --git a/arch/arm/mach-msm/clock-8226.c b/arch/arm/mach-msm/clock-8226.c
index 1477541..2a4617d 100644
--- a/arch/arm/mach-msm/clock-8226.c
+++ b/arch/arm/mach-msm/clock-8226.c
@@ -51,6 +51,7 @@
/* Mux source select values */
#define xo_source_val 0
+#define xo_a_clk_source_val 0
#define gpll0_source_val 1
#define gpll1_source_val 2
@@ -440,6 +441,7 @@
#define Q6SS_AHB_LFABIF_CBCR (0x22000)
#define Q6SS_AHBM_CBCR (0x22004)
#define Q6SS_XO_CBCR (0x26000)
+#define KPSS_AHB_CMD_RCGR (0x120C)
static unsigned int soft_vote_gpll0;
@@ -1891,7 +1893,7 @@
.c = {
.dbg_name = "vcodec0_clk_src",
.ops = &clk_ops_rcg_mnd,
- VDD_DIG_FMAX_MAP3(LOW, 66670000, NOMINAL, 133330000, HIGH,
+ VDD_DIG_FMAX_MAP3(LOW, 66700000, NOMINAL, 133330000, HIGH,
160000000),
CLK_INIT(vcodec0_clk_src.c),
},
@@ -2816,6 +2818,9 @@
F_APCS_PLL( 998400000, 52, 0x0, 0x1, 0x0, 0x0, 0x0),
F_APCS_PLL(1094400000, 57, 0x0, 0x1, 0x0, 0x0, 0x0),
F_APCS_PLL(1190400000, 62, 0x0, 0x1, 0x0, 0x0, 0x0),
+ F_APCS_PLL(1305600000, 68, 0x0, 0x1, 0x0, 0x0, 0x0),
+ F_APCS_PLL(1344000000, 70, 0x0, 0x1, 0x0, 0x0, 0x0),
+ F_APCS_PLL(1401600000, 73, 0x0, 0x1, 0x0, 0x0, 0x0),
PLL_F_END
};
@@ -2846,11 +2851,27 @@
},
.num_fmax = VDD_SR2_PLL_NUM,
CLK_INIT(a7sspll.c),
- /*
- * Need to skip handoff of the acpu pll to avoid
- * turning off the pll when the cpu is using it
- */
- .flags = CLKFLAG_SKIP_HANDOFF,
+ },
+};
+
+static struct clk_freq_tbl ftbl_kpss_ahb_clk[] = {
+ F_GCC(19200000, xo_a_clk, 0, 0, 0),
+ F_GCC(37500000, gpll0, 16, 0, 0),
+ F_GCC(75000000, gpll0, 8, 0, 0),
+ F_END
+};
+
+static struct rcg_clk kpss_ahb_clk_src = {
+ .cmd_rcgr_reg = KPSS_AHB_CMD_RCGR,
+ .set_rate = set_rate_hid,
+ .freq_tbl = ftbl_kpss_ahb_clk,
+ .current_freq = &rcg_dummy_freq,
+ .base = &virt_bases[GCC_BASE],
+ .c = {
+ .dbg_name = "kpss_ahb_clk_src",
+ .ops = &clk_ops_rcg,
+ VDD_DIG_FMAX_MAP2(LOW, 37500000, NOMINAL, 75000000),
+ CLK_INIT(kpss_ahb_clk_src.c),
},
};
@@ -2873,12 +2894,14 @@
static DEFINE_CLK_VOTER(qseecom_ce1_clk_src, &ce1_clk_src.c, 100000000);
static DEFINE_CLK_VOTER(scm_ce1_clk_src, &ce1_clk_src.c, 100000000);
+static DEFINE_CLK_VOTER(gud_ce1_clk_src, &ce1_clk_src.c, 100000000);
static DEFINE_CLK_BRANCH_VOTER(cxo_otg_clk, &xo.c);
static DEFINE_CLK_BRANCH_VOTER(cxo_pil_lpass_clk, &xo.c);
static DEFINE_CLK_BRANCH_VOTER(cxo_pil_mss_clk, &xo.c);
static DEFINE_CLK_BRANCH_VOTER(cxo_wlan_clk, &xo.c);
static DEFINE_CLK_BRANCH_VOTER(cxo_pil_pronto_clk, &xo.c);
+static DEFINE_CLK_BRANCH_VOTER(cxo_lpm_clk, &xo.c);
#ifdef CONFIG_DEBUG_FS
@@ -3047,7 +3070,8 @@
ret = (raw_count_full * clk->multiplier);
}
- writel_relaxed(0x51A00, GCC_REG_BASE(PLLTEST_PAD_CFG));
+ /* Set pin to gcc_debug_clock, enable output mode, disable input mode */
+ writel_relaxed(0x51200, GCC_REG_BASE(PLLTEST_PAD_CFG));
spin_unlock_irqrestore(&local_clock_reg_lock, flags);
clk_disable_unprepare(&xo.c);
@@ -3090,6 +3114,9 @@
CLK_LOOKUP("apc3_m_clk", apc3_m_clk, ""),
CLK_LOOKUP("l2_m_clk", l2_m_clk, ""),
+ /* LPM Resources */
+ CLK_LOOKUP("xo", cxo_lpm_clk.c, "fc4281d0.qcom,mpm"),
+
/* PIL-LPASS */
CLK_LOOKUP("xo", cxo_pil_lpass_clk.c, "fe200000.qcom,lpass"),
CLK_LOOKUP("core_clk", q6ss_xo_clk.c, "fe200000.qcom,lpass"),
@@ -3102,7 +3129,8 @@
CLK_LOOKUP("bus_clk", gcc_mss_q6_bimc_axi_clk.c, "fc880000.qcom,mss"),
CLK_LOOKUP("iface_clk", gcc_mss_cfg_ahb_clk.c, "fc880000.qcom,mss"),
CLK_LOOKUP("mem_clk", gcc_boot_rom_ahb_clk.c, "fc880000.qcom,mss"),
-
+ /* NFC */
+ CLK_LOOKUP("ref_clk", cxo_d1_a_pin.c, "2-000e"),
/* PIL-PRONTO */
CLK_LOOKUP("xo", cxo_pil_pronto_clk.c, "fb21b000.qcom,pronto"),
@@ -3117,6 +3145,7 @@
CLK_LOOKUP("xo", xo_a_clk.c, "f9011050.qcom,acpuclk"),
CLK_LOOKUP("gpll0", gpll0_ao.c, "f9011050.qcom,acpuclk"),
CLK_LOOKUP("a7sspll", a7sspll.c, "f9011050.qcom,acpuclk"),
+ CLK_LOOKUP("kpss_ahb", kpss_ahb_clk_src.c, ""),
/* WCNSS CLOCKS */
CLK_LOOKUP("xo", cxo_wlan_clk.c, "fb000000.qcom,wcnss-wlan"),
@@ -3226,6 +3255,9 @@
CLK_LOOKUP("iface_clk", gcc_blsp1_ahb_clk.c, "f9927000.i2c"),
CLK_LOOKUP("core_clk", gcc_blsp1_qup5_i2c_apps_clk.c, "f9927000.i2c"),
+ /* I2C Clocks nfc */
+ CLK_LOOKUP("iface_clk", gcc_blsp1_ahb_clk.c, "f9925000.i2c"),
+ CLK_LOOKUP("core_clk", gcc_blsp1_qup3_i2c_apps_clk.c, "f9925000.i2c"),
/* lsuart-v14 Clocks */
CLK_LOOKUP("iface_clk", gcc_blsp1_ahb_clk.c, "f991f000.serial"),
CLK_LOOKUP("core_clk", gcc_blsp1_uart3_apps_clk.c, "f991f000.serial"),
@@ -3241,6 +3273,11 @@
CLK_LOOKUP("bus_clk", gcc_ce1_axi_clk.c, "qseecom"),
CLK_LOOKUP("core_clk_src", qseecom_ce1_clk_src.c, "qseecom"),
+ CLK_LOOKUP("core_clk", gcc_ce1_clk.c, "mcd"),
+ CLK_LOOKUP("iface_clk", gcc_ce1_ahb_clk.c, "mcd"),
+ CLK_LOOKUP("bus_clk", gcc_ce1_axi_clk.c, "mcd"),
+ CLK_LOOKUP("core_clk_src", gud_ce1_clk_src.c, "mcd"),
+
CLK_LOOKUP("core_clk", gcc_ce1_clk.c, "scm"),
CLK_LOOKUP("iface_clk", gcc_ce1_ahb_clk.c, "scm"),
CLK_LOOKUP("bus_clk", gcc_ce1_axi_clk.c, "scm"),
@@ -3286,7 +3323,6 @@
CLK_LOOKUP("core_clk", gcc_blsp1_qup1_i2c_apps_clk.c, ""),
CLK_LOOKUP("core_clk", gcc_blsp1_qup2_i2c_apps_clk.c, ""),
CLK_LOOKUP("core_clk", gcc_blsp1_qup2_spi_apps_clk.c, ""),
- CLK_LOOKUP("core_clk", gcc_blsp1_qup3_i2c_apps_clk.c, ""),
CLK_LOOKUP("core_clk", gcc_blsp1_qup3_spi_apps_clk.c, ""),
CLK_LOOKUP("core_clk", gcc_blsp1_qup4_i2c_apps_clk.c, ""),
CLK_LOOKUP("core_clk", gcc_blsp1_qup4_spi_apps_clk.c, ""),
@@ -3580,6 +3616,9 @@
clk_set_rate(&mclk1_clk_src.c, mclk1_clk_src.freq_tbl[0].freq_hz);
clk_set_rate(&esc0_clk_src.c, esc0_clk_src.freq_tbl[0].freq_hz);
clk_set_rate(&vsync_clk_src.c, vsync_clk_src.freq_tbl[0].freq_hz);
+
+ clk_set_rate(&kpss_ahb_clk_src.c, 19200000);
+ clk_prepare_enable(&kpss_ahb_clk_src.c);
}
#define GCC_CC_PHYS 0xFC400000
diff --git a/arch/arm/mach-msm/clock-8610.c b/arch/arm/mach-msm/clock-8610.c
index e34b539..eb9a627 100644
--- a/arch/arm/mach-msm/clock-8610.c
+++ b/arch/arm/mach-msm/clock-8610.c
@@ -510,6 +510,15 @@
static DEFINE_CLK_VOTER(pnoc_sps_clk, &pnoc_clk.c, LONG_MAX);
static DEFINE_CLK_VOTER(pnoc_iommu_clk, &pnoc_clk.c, LONG_MAX);
+static DEFINE_CLK_BRANCH_VOTER(cxo_otg_clk, &gcc_xo_clk_src.c);
+static DEFINE_CLK_BRANCH_VOTER(cxo_lpass_pil_clk, &gcc_xo_clk_src.c);
+static DEFINE_CLK_BRANCH_VOTER(cxo_lpm_clk, &gcc_xo_clk_src.c);
+static DEFINE_CLK_BRANCH_VOTER(cxo_pil_pronto_clk, &gcc_xo_clk_src.c);
+static DEFINE_CLK_BRANCH_VOTER(cxo_mss_pil_clk, &gcc_xo_clk_src.c);
+static DEFINE_CLK_BRANCH_VOTER(cxo_pil_mba_clk, &gcc_xo_clk_src.c);
+static DEFINE_CLK_BRANCH_VOTER(cxo_wlan_clk, &gcc_xo_clk_src.c);
+static DEFINE_CLK_BRANCH_VOTER(cxo_acpu_clk, &gcc_xo_clk_src.c);
+
static DEFINE_CLK_MEASURE(apc0_m_clk);
static DEFINE_CLK_MEASURE(apc1_m_clk);
static DEFINE_CLK_MEASURE(apc2_m_clk);
@@ -577,11 +586,6 @@
},
.num_fmax = VDD_SR2_PLL_NUM,
CLK_INIT(a7sspll.c),
- /*
- * Need to skip handoff of the acpu pll to avoid
- * turning off the pll when the cpu is using it
- */
- .flags = CLKFLAG_SKIP_HANDOFF,
},
};
@@ -1833,6 +1837,7 @@
};
static struct clk_freq_tbl ftbl_mclk0_1_clk[] = {
+ F_MM(24000000, gpll0, 5, 1, 5),
F_MM(66670000, gpll0, 9, 0, 0),
F_END,
};
@@ -2495,7 +2500,7 @@
{ &gcc_ce1_axi_clk.c, GCC_BASE, 0x0139},
{ &gcc_ce1_ahb_clk.c, GCC_BASE, 0x013a},
{ &gcc_xo_clk_src.c, GCC_BASE, 0x0149},
- { &bimc_clk.c, GCC_BASE, 0x015d},
+ { &bimc_clk.c, GCC_BASE, 0x0155},
{ &gcc_bimc_smmu_clk.c, GCC_BASE, 0x015e},
{ &gcc_lpass_q6_axi_clk.c, GCC_BASE, 0x0160},
@@ -2744,17 +2749,18 @@
};
static struct clk_lookup msm_clocks_8610[] = {
- CLK_LOOKUP("xo", gcc_xo_clk_src.c, "msm_otg"),
- CLK_LOOKUP("xo", gcc_xo_clk_src.c, "fe200000.qcom,lpass"),
+ CLK_LOOKUP("xo", cxo_otg_clk.c, "msm_otg"),
+ CLK_LOOKUP("xo", cxo_lpass_pil_clk.c, "fe200000.qcom,lpass"),
+ CLK_LOOKUP("xo", cxo_lpm_clk.c, "fc4281d0.qcom,mpm"),
- CLK_LOOKUP("xo", gcc_xo_clk_src.c, "fc880000.qcom,mss"),
+ CLK_LOOKUP("xo", cxo_mss_pil_clk.c, "fc880000.qcom,mss"),
CLK_LOOKUP("bus_clk", gcc_mss_q6_bimc_axi_clk.c, "fc880000.qcom,mss"),
CLK_LOOKUP("iface_clk", gcc_mss_cfg_ahb_clk.c, "fc880000.qcom,mss"),
CLK_LOOKUP("mem_clk", gcc_boot_rom_ahb_clk.c, "fc880000.qcom,mss"),
- CLK_LOOKUP("xo", gcc_xo_clk_src.c, "pil-mba"),
- CLK_LOOKUP("xo", gcc_xo_clk_src.c, "fb000000.qcom,wcnss-wlan"),
- CLK_LOOKUP("xo", gcc_xo_clk_src.c, "fb21b000.qcom,pronto"),
+ CLK_LOOKUP("xo", cxo_pil_mba_clk.c, "pil-mba"),
+ CLK_LOOKUP("xo", cxo_wlan_clk.c, "fb000000.qcom,wcnss-wlan"),
+ CLK_LOOKUP("xo", cxo_pil_pronto_clk.c, "fb21b000.qcom,pronto"),
CLK_LOOKUP("measure", measure_clk.c, "debug"),
CLK_LOOKUP("iface_clk", gcc_blsp1_ahb_clk.c, "f991f000.serial"),
@@ -3002,12 +3008,83 @@
"fd010000.qcom,iommu"),
CLK_LOOKUP("core_clk", pnoc_iommu_clk.c, "fd010000.qcom,iommu"),
+ /* MM sensor clocks */
+ CLK_LOOKUP("cam_src_clk", mclk0_clk_src.c, "6-006f"),
+ CLK_LOOKUP("cam_src_clk", mclk0_clk_src.c, "6-007d"),
+ CLK_LOOKUP("cam_src_clk", mclk0_clk_src.c, "6-006d"),
+ CLK_LOOKUP("cam_src_clk", mclk1_clk_src.c, "6-0078"),
+ CLK_LOOKUP("cam_clk", mclk0_clk.c, "6-006f"),
+ CLK_LOOKUP("cam_clk", mclk0_clk.c, "6-007d"),
+ CLK_LOOKUP("cam_clk", mclk0_clk.c, "6-006d"),
+ CLK_LOOKUP("cam_clk", mclk1_clk.c, "6-0078"),
+
+
+ /* CSIPHY clocks */
+ CLK_LOOKUP("csiphy_timer_src_clk", csi0phytimer_clk_src.c,
+ "fda00c00.qcom,csiphy"),
+ CLK_LOOKUP("csiphy_timer_clk", csi0phytimer_clk.c,
+ "fda00c00.qcom,csiphy"),
+ CLK_LOOKUP("csiphy_timer_src_clk", csi1phytimer_clk_src.c,
+ "fda01000.qcom,csiphy"),
+ CLK_LOOKUP("csiphy_timer_clk", csi1phytimer_clk.c,
+ "fda01000.qcom,csiphy"),
+
+ /* CSID clocks */
+ CLK_LOOKUP("csi_clk", csi0_clk.c, "fda00000.qcom,csid"),
+ CLK_LOOKUP("csi_src_clk", csi0_clk_src.c, "fda00000.qcom,csid"),
+ CLK_LOOKUP("csi_ahb_clk", csi_ahb_clk.c, "fda00000.qcom,csid"),
+ CLK_LOOKUP("csi0phy_mux_clk", csi0phy_cam_mux_clk.c,
+ "fda00000.qcom,csid"),
+ CLK_LOOKUP("csi1phy_mux_clk", csi1phy_cam_mux_clk.c,
+ "fda00000.qcom,csid"),
+ CLK_LOOKUP("csi0pix_mux_clk", csi0pix_cam_mux_clk.c,
+ "fda00000.qcom,csid"),
+ CLK_LOOKUP("csi0rdi_mux_clk", rdi0_cam_mux_clk.c,
+ "fda00000.qcom,csid"),
+ CLK_LOOKUP("csi1rdi_mux_clk", rdi1_cam_mux_clk.c,
+ "fda00000.qcom,csid"),
+ CLK_LOOKUP("csi2rdi_mux_clk", rdi2_cam_mux_clk.c,
+ "fda00000.qcom,csid"),
+
+ CLK_LOOKUP("csi_clk", csi1_clk.c, "fda00400.qcom,csid"),
+ CLK_LOOKUP("csi_src_clk", csi1_clk_src.c, "fda00400.qcom,csid"),
+ CLK_LOOKUP("csi_ahb_clk", csi_ahb_clk.c, "fda00400.qcom,csid"),
+ CLK_LOOKUP("csi0phy_mux_clk", csi0phy_cam_mux_clk.c,
+ "fda00400.qcom,csid"),
+ CLK_LOOKUP("csi1phy_mux_clk", csi1phy_cam_mux_clk.c,
+ "fda00400.qcom,csid"),
+ CLK_LOOKUP("csi0pix_mux_clk", csi0pix_cam_mux_clk.c,
+ "fda00400.qcom,csid"),
+ CLK_LOOKUP("csi0rdi_mux_clk", rdi0_cam_mux_clk.c,
+ "fda00400.qcom,csid"),
+ CLK_LOOKUP("csi1rdi_mux_clk", rdi1_cam_mux_clk.c,
+ "fda00400.qcom,csid"),
+ CLK_LOOKUP("csi2rdi_mux_clk", rdi2_cam_mux_clk.c,
+ "fda00400.qcom,csid"),
+
+ CLK_LOOKUP("csi_phy_src_clk", csi0phy_clk.c, "fda00000.qcom,csid"),
+ CLK_LOOKUP("csi_phy_src_clk", csi1phy_clk.c, "fda00400.qcom,csid"),
+ CLK_LOOKUP("csi_pix_src_clk", csi0pix_clk.c, "fda00000.qcom,csid"),
+ CLK_LOOKUP("csi_pix_src_clk", csi1pix_clk.c, "fda00400.qcom,csid"),
+ CLK_LOOKUP("csi_rdi_src_clk", csi0rdi_clk.c, "fda00000.qcom,csid"),
+ CLK_LOOKUP("csi_rdi_src_clk", csi1rdi_clk.c, "fda00400.qcom,csid"),
+ /* ISPIF need no clock */
+
+ CLK_LOOKUP("vfe_clk_src", vfe_clk_src.c, "fde00000.qcom,vfe"),
+ CLK_LOOKUP("vfe_clk", vfe_clk.c, "fde00000.qcom,vfe"),
+
+ CLK_LOOKUP("csi_vfe_clk", csi_vfe_clk.c, "fde00000.qcom,vfe"),
+ CLK_LOOKUP("vfe_ahb_clk", vfe_ahb_clk.c, "fde00000.qcom,vfe"),
+
+ CLK_LOOKUP("bus_clk", vfe_axi_clk.c, "fde00000.qcom,vfe"),
+
+
CLK_LOOKUP("core_clk", q6ss_xo_clk.c, "fe200000.qcom,lpass"),
CLK_LOOKUP("bus_clk", gcc_lpass_q6_axi_clk.c, "fe200000.qcom,lpass"),
CLK_LOOKUP("iface_clk", q6ss_ahb_lfabif_clk.c, "fe200000.qcom,lpass"),
CLK_LOOKUP("reg_clk", q6ss_ahbm_clk.c, "fe200000.qcom,lpass"),
- CLK_LOOKUP("xo", gcc_xo_a_clk_src.c, "f9011050.qcom,acpuclk"),
+ CLK_LOOKUP("xo", cxo_acpu_clk.c, "f9011050.qcom,acpuclk"),
CLK_LOOKUP("gpll0", gpll0_ao_clk_src.c, "f9011050.qcom,acpuclk"),
CLK_LOOKUP("a7sspll", a7sspll.c, "f9011050.qcom,acpuclk"),
@@ -3017,7 +3094,7 @@
CLK_LOOKUP("measure_clk", apc3_m_clk, ""),
CLK_LOOKUP("measure_clk", l2_m_clk, ""),
- CLK_LOOKUP("xo", gcc_xo_clk_src.c, "fb000000.qcom,wcnss-wlan"),
+ CLK_LOOKUP("xo", cxo_wlan_clk.c, "fb000000.qcom,wcnss-wlan"),
CLK_LOOKUP("rf_clk", cxo_a1.c, "fb000000.qcom,wcnss-wlan"),
CLK_LOOKUP("iface_clk", mdp_ahb_clk.c, "fd900000.qcom,mdss_mdp"),
diff --git a/arch/arm/mach-msm/clock-8974.c b/arch/arm/mach-msm/clock-8974.c
index 3aef106..bd5a12e 100644
--- a/arch/arm/mach-msm/clock-8974.c
+++ b/arch/arm/mach-msm/clock-8974.c
@@ -66,6 +66,15 @@
#define GPLL1_TEST_CTL_REG 0x0058
#define GPLL1_STATUS_REG 0x005C
+#define GPLL4_MODE_REG 0x1DC0
+#define GPLL4_L_REG 0x1DC4
+#define GPLL4_M_REG 0x1DC8
+#define GPLL4_N_REG 0x1DCC
+#define GPLL4_USER_CTL_REG 0x1DD0
+#define GPLL4_CONFIG_CTL_REG 0x1DD4
+#define GPLL4_TEST_CTL_REG 0x1DD8
+#define GPLL4_STATUS_REG 0x1DDC
+
#define MMPLL0_MODE_REG 0x0000
#define MMPLL0_L_REG 0x0004
#define MMPLL0_M_REG 0x0008
@@ -519,6 +528,7 @@
#define cxo_source_val 0
#define gpll0_source_val 1
#define gpll1_source_val 2
+#define gpll4_source_val 5
#define gnd_source_val 5
#define mmpll0_mm_source_val 1
#define mmpll1_mm_source_val 2
@@ -736,6 +746,21 @@
},
};
+static struct pll_vote_clk gpll4_clk_src = {
+ .en_reg = (void __iomem *)APCS_GPLL_ENA_VOTE_REG,
+ .en_mask = BIT(4),
+ .status_reg = (void __iomem *)GPLL4_STATUS_REG,
+ .status_mask = BIT(17),
+ .base = &virt_bases[GCC_BASE],
+ .c = {
+ .parent = &cxo_clk_src.c,
+ .rate = 800000000,
+ .dbg_name = "gpll4_clk_src",
+ .ops = &clk_ops_pll_vote,
+ CLK_INIT(gpll4_clk_src.c),
+ },
+};
+
static struct pll_vote_clk mmpll0_clk_src = {
.en_reg = (void __iomem *)MMSS_PLL_VOTE_APCS_REG,
.en_mask = BIT(0),
@@ -806,6 +831,7 @@
static DEFINE_CLK_BRANCH_VOTER(cxo_pil_pronto_clk, &cxo_clk_src.c);
static DEFINE_CLK_BRANCH_VOTER(cxo_dwc3_clk, &cxo_clk_src.c);
static DEFINE_CLK_BRANCH_VOTER(cxo_ehci_host_clk, &cxo_clk_src.c);
+static DEFINE_CLK_BRANCH_VOTER(cxo_lpm_clk, &cxo_clk_src.c);
static struct clk_freq_tbl ftbl_gcc_usb30_master_clk[] = {
F(125000000, gpll0, 1, 5, 24),
@@ -1373,6 +1399,14 @@
F_END
};
+static struct clk_freq_tbl ftbl_gcc_ce1_v3_clk[] = {
+ F( 50000000, gpll0, 12, 0, 0),
+ F( 75000000, gpll0, 8, 0, 0),
+ F(100000000, gpll0, 6, 0, 0),
+ F(150000000, gpll0, 4, 0, 0),
+ F_END
+};
+
static struct rcg_clk ce1_clk_src = {
.cmd_rcgr_reg = CE1_CMD_RCGR,
.set_rate = set_rate_hid,
@@ -1393,6 +1427,14 @@
F_END
};
+static struct clk_freq_tbl ftbl_gcc_ce2_v3_clk[] = {
+ F( 50000000, gpll0, 12, 0, 0),
+ F( 75000000, gpll0, 8, 0, 0),
+ F(100000000, gpll0, 6, 0, 0),
+ F(150000000, gpll0, 4, 0, 0),
+ F_END
+};
+
static struct rcg_clk ce2_clk_src = {
.cmd_rcgr_reg = CE2_CMD_RCGR,
.set_rate = set_rate_hid,
@@ -1480,7 +1522,7 @@
},
};
-static struct clk_freq_tbl ftbl_gcc_sdcc1_2_apps_clk[] = {
+static struct clk_freq_tbl ftbl_gcc_sdcc1_4_apps_clk[] = {
F( 144000, cxo, 16, 3, 25),
F( 400000, cxo, 12, 1, 4),
F( 20000000, gpll0, 15, 1, 2),
@@ -1488,16 +1530,7 @@
F( 50000000, gpll0, 12, 0, 0),
F(100000000, gpll0, 6, 0, 0),
F(200000000, gpll0, 3, 0, 0),
- F_END
-};
-
-static struct clk_freq_tbl ftbl_gcc_sdcc3_4_apps_clk[] = {
- F( 144000, cxo, 16, 3, 25),
- F( 400000, cxo, 12, 1, 4),
- F( 20000000, gpll0, 15, 1, 2),
- F( 25000000, gpll0, 12, 1, 2),
- F( 50000000, gpll0, 12, 0, 0),
- F(100000000, gpll0, 6, 0, 0),
+ F(400000000, gpll4, 2, 0, 0),
F_END
};
@@ -1510,7 +1543,7 @@
static struct rcg_clk sdcc1_apps_clk_src = {
.cmd_rcgr_reg = SDCC1_APPS_CMD_RCGR,
.set_rate = set_rate_mnd,
- .freq_tbl = ftbl_gcc_sdcc1_2_apps_clk,
+ .freq_tbl = ftbl_gcc_sdcc1_4_apps_clk,
.current_freq = &rcg_dummy_freq,
.base = &virt_bases[GCC_BASE],
.c = {
@@ -1524,7 +1557,7 @@
static struct rcg_clk sdcc2_apps_clk_src = {
.cmd_rcgr_reg = SDCC2_APPS_CMD_RCGR,
.set_rate = set_rate_mnd,
- .freq_tbl = ftbl_gcc_sdcc1_2_apps_clk,
+ .freq_tbl = ftbl_gcc_sdcc1_4_apps_clk,
.current_freq = &rcg_dummy_freq,
.base = &virt_bases[GCC_BASE],
.c = {
@@ -1538,7 +1571,7 @@
static struct rcg_clk sdcc3_apps_clk_src = {
.cmd_rcgr_reg = SDCC3_APPS_CMD_RCGR,
.set_rate = set_rate_mnd,
- .freq_tbl = ftbl_gcc_sdcc3_4_apps_clk,
+ .freq_tbl = ftbl_gcc_sdcc1_4_apps_clk,
.current_freq = &rcg_dummy_freq,
.base = &virt_bases[GCC_BASE],
.c = {
@@ -1552,7 +1585,7 @@
static struct rcg_clk sdcc4_apps_clk_src = {
.cmd_rcgr_reg = SDCC4_APPS_CMD_RCGR,
.set_rate = set_rate_mnd,
- .freq_tbl = ftbl_gcc_sdcc3_4_apps_clk,
+ .freq_tbl = ftbl_gcc_sdcc1_4_apps_clk,
.current_freq = &rcg_dummy_freq,
.base = &virt_bases[GCC_BASE],
.c = {
@@ -2706,6 +2739,7 @@
F_MM(228570000, mmpll0, 3.5, 0, 0),
F_MM(266670000, mmpll0, 3, 0, 0),
F_MM(320000000, mmpll0, 2.5, 0, 0),
+ F_MM(465000000, mmpll3, 2, 0, 0),
F_END
};
@@ -2887,6 +2921,21 @@
F_END
};
+static struct clk_freq_tbl ftbl_camss_mclk0_3_v3_clk[] = {
+ F_MM( 4800000, cxo, 4, 0, 0),
+ F_MM( 6000000, gpll0, 10, 1, 10),
+ F_MM( 8000000, gpll0, 15, 1, 5),
+ F_MM( 9600000, cxo, 2, 0, 0),
+ F_MM(16000000, gpll0, 10, 1, 5),
+ F_MM(19200000, cxo, 1, 0, 0),
+ F_MM(24000000, gpll0, 5, 1, 5),
+ F_MM(32000000, mmpll0, 5, 1, 5),
+ F_MM(48000000, gpll0, 12.5, 0, 0),
+ F_MM(64000000, mmpll0, 12.5, 0, 0),
+ F_MM(66670000, gpll0, 9, 0, 0),
+ F_END
+};
+
static struct rcg_clk mclk0_clk_src = {
.cmd_rcgr_reg = MCLK0_CMD_RCGR,
.set_rate = set_rate_hid,
@@ -2995,6 +3044,7 @@
F_MM(150000000, gpll0, 4, 0, 0),
F_MM(266670000, mmpll0, 3, 0, 0),
F_MM(320000000, mmpll0, 2.5, 0, 0),
+ F_MM(465000000, mmpll3, 2, 0, 0),
F_END
};
@@ -4793,7 +4843,11 @@
CLK_DUMMY("core_clk", NULL, "fdc84000.qcom,iommu", oFF),
};
-static struct clk_lookup msm_clocks_8974[] = {
+static struct clk_lookup msm_clocks_8974ac_only[] __initdata = {
+ CLK_LOOKUP("gpll4", gpll4_clk_src.c, ""),
+};
+
+static struct clk_lookup msm_clocks_8974_common[] __initdata = {
CLK_LOOKUP("xo", cxo_otg_clk.c, "msm_otg"),
CLK_LOOKUP("xo", cxo_pil_lpass_clk.c, "fe200000.qcom,lpass"),
CLK_LOOKUP("xo", cxo_pil_mss_clk.c, "fc880000.qcom,mss"),
@@ -4802,6 +4856,7 @@
CLK_LOOKUP("xo", cxo_pil_pronto_clk.c, "fb21b000.qcom,pronto"),
CLK_LOOKUP("xo", cxo_dwc3_clk.c, "msm_dwc3"),
CLK_LOOKUP("xo", cxo_ehci_host_clk.c, "msm_ehci_host"),
+ CLK_LOOKUP("xo", cxo_lpm_clk.c, "fc4281d0.qcom,mpm"),
CLK_LOOKUP("measure", measure_clk.c, "debug"),
@@ -4881,6 +4936,11 @@
CLK_LOOKUP("ce_drv_bus_clk", gcc_ce2_axi_clk.c, "qseecom"),
CLK_LOOKUP("ce_drv_core_clk_src", ce2_clk_src.c, "qseecom"),
+ CLK_LOOKUP("core_clk", gcc_ce1_clk.c, "mcd"),
+ CLK_LOOKUP("iface_clk", gcc_ce1_ahb_clk.c, "mcd"),
+ CLK_LOOKUP("bus_clk", gcc_ce1_axi_clk.c, "mcd"),
+ CLK_LOOKUP("core_clk_src", ce1_clk_src.c, "mcd"),
+
CLK_LOOKUP("core_clk", gcc_ce1_clk.c, "scm"),
CLK_LOOKUP("iface_clk", gcc_ce1_ahb_clk.c, "scm"),
CLK_LOOKUP("bus_clk", gcc_ce1_axi_clk.c, "scm"),
@@ -5311,6 +5371,9 @@
CLK_LOOKUP("", byte_clk_src_8974.c, ""),
};
+static struct clk_lookup msm_clocks_8974[ARRAY_SIZE(msm_clocks_8974_common)
+ + ARRAY_SIZE(msm_clocks_8974ac_only)];
+
static struct pll_config_regs mmpll0_regs __initdata = {
.l_reg = (void __iomem *)MMPLL0_L_REG,
.m_reg = (void __iomem *)MMPLL0_M_REG,
@@ -5538,6 +5601,71 @@
{&gcc_blsp2_qup6_i2c_apps_clk.c, &blsp2_qup6_i2c_apps_clk_src.c,},
};
+/* v1 to v2 clock changes */
+static void __init msm8974_v2_clock_override(void)
+{
+ int i;
+
+ mmpll3_clk_src.c.rate = 930000000;
+ mmpll1_clk_src.c.rate = 1167000000;
+ mmpll1_clk_src.c.fmax[VDD_DIG_NOMINAL] = 1167000000;
+
+ ocmemnoc_clk_src.freq_tbl = ftbl_ocmemnoc_v2_clk;
+ ocmemnoc_clk_src.c.fmax[VDD_DIG_NOMINAL] = 291750000;
+
+ axi_clk_src.freq_tbl = ftbl_mmss_axi_v2_clk;
+ axi_clk_src.c.fmax[VDD_DIG_NOMINAL] = 291750000;
+ axi_clk_src.c.fmax[VDD_DIG_HIGH] = 466800000;
+
+ vcodec0_clk_src.freq_tbl = ftbl_venus0_vcodec0_v2_clk;
+ vcodec0_clk_src.c.fmax[VDD_DIG_HIGH] = 465000000;
+
+ mdp_clk_src.c.fmax[VDD_DIG_NOMINAL] = 240000000;
+
+ /* The parent of each of the QUP I2C clocks is an RCG on V2 */
+ for (i = 0; i < ARRAY_SIZE(qup_i2c_clks); i++)
+ qup_i2c_clks[i][0]->parent = qup_i2c_clks[i][1];
+}
+
+/* v2 to v3 clock changes */
+static void __init msm8974_v3_clock_override(void)
+{
+ ce1_clk_src.c.fmax[VDD_DIG_LOW] = 75000000;
+ ce1_clk_src.c.fmax[VDD_DIG_NOMINAL] = 150000000;
+ ce1_clk_src.freq_tbl = ftbl_gcc_ce1_v3_clk;
+ ce2_clk_src.c.fmax[VDD_DIG_LOW] = 75000000;
+ ce2_clk_src.c.fmax[VDD_DIG_NOMINAL] = 150000000;
+ ce2_clk_src.freq_tbl = ftbl_gcc_ce2_v3_clk;
+
+ sdcc1_apps_clk_src.c.fmax[VDD_DIG_LOW] = 200000000;
+ sdcc1_apps_clk_src.c.fmax[VDD_DIG_NOMINAL] = 400000000;
+
+ vfe0_clk_src.c.fmax[VDD_DIG_LOW] = 150000000;
+ vfe0_clk_src.c.fmax[VDD_DIG_NOMINAL] = 320000000;
+ vfe0_clk_src.c.fmax[VDD_DIG_HIGH] = 465000000;
+ vfe1_clk_src.c.fmax[VDD_DIG_LOW] = 150000000;
+ vfe1_clk_src.c.fmax[VDD_DIG_NOMINAL] = 320000000;
+ vfe1_clk_src.c.fmax[VDD_DIG_HIGH] = 465000000;
+ cpp_clk_src.c.fmax[VDD_DIG_LOW] = 150000000;
+ cpp_clk_src.c.fmax[VDD_DIG_NOMINAL] = 320000000;
+ cpp_clk_src.c.fmax[VDD_DIG_HIGH] = 465000000;
+
+ mdp_clk_src.c.fmax[VDD_DIG_NOMINAL] = 266670000;
+
+ mclk0_clk_src.freq_tbl = ftbl_camss_mclk0_3_v3_clk;
+ mclk1_clk_src.freq_tbl = ftbl_camss_mclk0_3_v3_clk;
+ mclk2_clk_src.freq_tbl = ftbl_camss_mclk0_3_v3_clk;
+ mclk3_clk_src.freq_tbl = ftbl_camss_mclk0_3_v3_clk;
+ mclk0_clk_src.set_rate = set_rate_mnd;
+ mclk1_clk_src.set_rate = set_rate_mnd;
+ mclk2_clk_src.set_rate = set_rate_mnd;
+ mclk3_clk_src.set_rate = set_rate_mnd;
+ mclk0_clk_src.c.ops = &clk_ops_rcg_mnd;
+ mclk1_clk_src.c.ops = &clk_ops_rcg_mnd;
+ mclk2_clk_src.c.ops = &clk_ops_rcg_mnd;
+ mclk3_clk_src.c.ops = &clk_ops_rcg_mnd;
+}
+
static void __init msm8974_clock_pre_init(void)
{
virt_bases[GCC_BASE] = ioremap(GCC_CC_PHYS, GCC_CC_SIZE);
@@ -5566,29 +5694,19 @@
reg_init();
- /* v2 specific changes */
- if (SOCINFO_VERSION_MAJOR(socinfo_get_version()) == 2) {
- int i;
+ memcpy(msm_clocks_8974, msm_clocks_8974_common,
+ sizeof(msm_clocks_8974_common));
+ msm8974_clock_init_data.size -= ARRAY_SIZE(msm_clocks_8974ac_only);
- mmpll3_clk_src.c.rate = 930000000;
- mmpll1_clk_src.c.rate = 1167000000;
- mmpll1_clk_src.c.fmax[VDD_DIG_NOMINAL] = 1167000000;
-
- ocmemnoc_clk_src.freq_tbl = ftbl_ocmemnoc_v2_clk;
- ocmemnoc_clk_src.c.fmax[VDD_DIG_NOMINAL] = 291750000;
-
- axi_clk_src.freq_tbl = ftbl_mmss_axi_v2_clk;
- axi_clk_src.c.fmax[VDD_DIG_NOMINAL] = 291750000;
- axi_clk_src.c.fmax[VDD_DIG_HIGH] = 466800000;
-
- vcodec0_clk_src.freq_tbl = ftbl_venus0_vcodec0_v2_clk;
- vcodec0_clk_src.c.fmax[VDD_DIG_HIGH] = 465000000;
-
- mdp_clk_src.c.fmax[VDD_DIG_NOMINAL] = 240000000;
-
- /* The parent of each of the QUP I2C clocks is an RCG on V2 */
- for (i = 0; i < ARRAY_SIZE(qup_i2c_clks); i++)
- qup_i2c_clks[i][0]->parent = qup_i2c_clks[i][1];
+ /* version specific changes */
+ if (SOCINFO_VERSION_MAJOR(socinfo_get_version()) >= 2)
+ msm8974_v2_clock_override();
+ if (SOCINFO_VERSION_MAJOR(socinfo_get_version()) == 3) {
+ msm8974_v3_clock_override();
+ memcpy(msm_clocks_8974 + ARRAY_SIZE(msm_clocks_8974_common),
+ msm_clocks_8974ac_only, sizeof(msm_clocks_8974ac_only));
+ msm8974_clock_init_data.size +=
+ ARRAY_SIZE(msm_clocks_8974ac_only);
}
clk_ops_pixel_clock = clk_ops_pixel;
diff --git a/arch/arm/mach-msm/clock-9625.c b/arch/arm/mach-msm/clock-9625.c
index 3277d75..3b07069 100644
--- a/arch/arm/mach-msm/clock-9625.c
+++ b/arch/arm/mach-msm/clock-9625.c
@@ -289,10 +289,10 @@
static DEFINE_VDD_REGULATORS(vdd_dig, VDD_DIG_NUM, 1, vdd_corner, NULL);
-/* TODO: Needs to confirm the below values */
#define RPM_MISC_CLK_TYPE 0x306b6c63
#define RPM_BUS_CLK_TYPE 0x316b6c63
#define RPM_MEM_CLK_TYPE 0x326b6c63
+#define RPM_QPIC_CLK_TYPE 0x63697071
#define RPM_SMD_KEY_ENABLE 0x62616E45
@@ -305,6 +305,8 @@
#define BIMC_ID 0x0
+#define QPIC_ID 0x0
+
#define D0_ID 1
#define D1_ID 2
#define A0_ID 3
@@ -320,6 +322,8 @@
DEFINE_CLK_RPM_SMD(bimc_clk, bimc_a_clk, RPM_MEM_CLK_TYPE, BIMC_ID, NULL);
+DEFINE_CLK_RPM_SMD(qpic_clk, qpic_a_clk, RPM_QPIC_CLK_TYPE, QPIC_ID, NULL);
+
DEFINE_CLK_RPM_SMD_QDSS(qdss_clk, qdss_a_clk, RPM_MISC_CLK_TYPE, QDSS_ID);
DEFINE_CLK_RPM_SMD_XO_BUFFER(cxo_d0, cxo_d0_a, D0_ID);
@@ -390,10 +394,6 @@
PLL_F_END
};
-/*
- * Need to skip handoff of the acpu pll to avoid handoff code
- * to turn off the pll when the acpu is running off this pll.
- */
static struct pll_clk apcspll_clk_src = {
.mode_reg = (void __iomem *)APCS_CPU_PLL_MODE_REG,
.l_reg = (void __iomem *)APCS_CPU_PLL_L_REG,
@@ -415,7 +415,6 @@
.dbg_name = "apcspll_clk_src",
.ops = &clk_ops_local_pll,
CLK_INIT(apcspll_clk_src.c),
- .flags = CLKFLAG_SKIP_HANDOFF,
},
};
@@ -431,9 +430,10 @@
static DEFINE_CLK_VOTER(pnoc_sdcc2_clk, &pnoc_clk.c, LONG_MAX);
static DEFINE_CLK_VOTER(pnoc_sdcc3_clk, &pnoc_clk.c, LONG_MAX);
-
static DEFINE_CLK_VOTER(pnoc_sps_clk, &pnoc_clk.c, LONG_MAX);
+static DEFINE_CLK_BRANCH_VOTER(cxo_lpm_clk, &cxo_clk_src.c);
+
static struct clk_freq_tbl ftbl_gcc_ipa_clk[] = {
F( 50000000, gpll0, 12, 0, 0),
F( 92310000, gpll0, 6.5, 0, 0),
@@ -829,26 +829,6 @@
},
};
-static struct clk_freq_tbl ftbl_gcc_qpic_clk[] = {
- F( 50000000, gpll0, 12, 0, 0),
- F(100000000, gpll0, 6, 0, 0),
- F_END
-};
-
-static struct rcg_clk qpic_clk_src = {
- .cmd_rcgr_reg = QPIC_CMD_RCGR,
- .set_rate = set_rate_mnd,
- .freq_tbl = ftbl_gcc_qpic_clk,
- .current_freq = &rcg_dummy_freq,
- .base = &virt_bases[GCC_BASE],
- .c = {
- .dbg_name = "qpic_clk_src",
- .ops = &clk_ops_rcg_mnd,
- VDD_DIG_FMAX_MAP2(LOW, 50000000, NOMINAL, 100000000),
- CLK_INIT(qpic_clk_src.c)
- },
-};
-
static struct clk_freq_tbl ftbl_gcc_sdcc2_apps_clk[] = {
F( 144000, cxo, 16, 3, 25),
F( 400000, cxo, 12, 1, 4),
@@ -1392,29 +1372,6 @@
},
};
-static struct branch_clk gcc_qpic_ahb_clk = {
- .cbcr_reg = QPIC_AHB_CBCR,
- .has_sibling = 1,
- .base = &virt_bases[GCC_BASE],
- .c = {
- .dbg_name = "gcc_qpic_ahb_clk",
- .ops = &clk_ops_branch,
- CLK_INIT(gcc_qpic_ahb_clk.c),
- },
-};
-
-static struct branch_clk gcc_qpic_clk = {
- .cbcr_reg = QPIC_CBCR,
- .has_sibling = 0,
- .base = &virt_bases[GCC_BASE],
- .c = {
- .parent = &qpic_clk_src.c,
- .dbg_name = "gcc_qpic_clk",
- .ops = &clk_ops_branch,
- CLK_INIT(gcc_qpic_clk.c),
- },
-};
-
static struct branch_clk gcc_sdcc2_ahb_clk = {
.cbcr_reg = SDCC2_AHB_CBCR,
.has_sibling = 1,
@@ -1579,6 +1536,10 @@
};
struct measure_mux_entry measure_mux_common[] __initdata = {
+ {&snoc_clk.c, GCC_BASE, 0x0000},
+ {&cnoc_clk.c, GCC_BASE, 0x0008},
+ {&pnoc_clk.c, GCC_BASE, 0x0010},
+ {&bimc_clk.c, GCC_BASE, 0x0155},
{&gcc_pdm_ahb_clk.c, GCC_BASE, 0x00d0},
{&gcc_usb_hsic_io_cal_sleep_clk.c, GCC_BASE, 0x005c},
{&gcc_usb_hsic_xcvr_fs_clk.c, GCC_BASE, 0x005d},
@@ -1630,8 +1591,7 @@
{&gcc_ipa_clk.c, GCC_BASE, 0x01E0},
{&gcc_ipa_cnoc_clk.c, GCC_BASE, 0x01E1},
{&gcc_ipa_sleep_clk.c, GCC_BASE, 0x01E2},
- {&gcc_qpic_clk.c, GCC_BASE, 0x01D8},
- {&gcc_qpic_ahb_clk.c, GCC_BASE, 0x01D9},
+ {&qpic_clk.c, GCC_BASE, 0x01D8},
};
struct measure_mux_entry measure_mux[ARRAY_SIZE(measure_mux_common)
@@ -1803,6 +1763,7 @@
static struct clk_lookup msm_clocks_9625[] = {
CLK_LOOKUP("xo", cxo_clk_src.c, ""),
+ CLK_LOOKUP("xo", cxo_lpm_clk.c, "fc4281d0.qcom,mpm"),
CLK_LOOKUP("measure", measure_clk.c, "debug"),
CLK_LOOKUP("pll0", gpll0_activeonly_clk_src.c, "f9010008.qcom,acpuclk"),
@@ -1889,6 +1850,8 @@
CLK_LOOKUP("bus_clk", pnoc_a_clk.c, ""),
CLK_LOOKUP("bus_clk", cnoc_a_clk.c, ""),
CLK_LOOKUP("mem_clk", bimc_a_clk.c, ""),
+ CLK_LOOKUP("core_clk", qpic_clk.c, ""),
+ CLK_LOOKUP("core_clk", qpic_a_clk.c, ""),
CLK_LOOKUP("bus_clk", cnoc_msmbus_clk.c, "msm_config_noc"),
CLK_LOOKUP("bus_a_clk", cnoc_msmbus_a_clk.c, "msm_config_noc"),
@@ -1998,12 +1961,6 @@
regval = readl_relaxed(GCC_REG_BASE(APCS_GPLL_ENA_VOTE_REG));
regval |= BIT(0);
writel_relaxed(regval, GCC_REG_BASE(APCS_GPLL_ENA_VOTE_REG));
-
- /*
- * TODO: Confirm that no clocks need to be voted on in this sleep vote
- * register.
- */
- writel_relaxed(0x0, GCC_REG_BASE(APCS_CLOCK_SLEEP_ENA_VOTE));
}
static void __init msm9625_clock_post_init(void)
diff --git a/arch/arm/mach-msm/clock-debug.c b/arch/arm/mach-msm/clock-debug.c
index fe43b72..8ec87d1 100644
--- a/arch/arm/mach-msm/clock-debug.c
+++ b/arch/arm/mach-msm/clock-debug.c
@@ -22,6 +22,8 @@
#include <linux/list.h>
#include <linux/clkdev.h>
#include <linux/uaccess.h>
+#include <linux/mutex.h>
+
#include <mach/clk-provider.h>
#include "clock.h"
@@ -351,49 +353,24 @@
debugfs_remove_recursive(clk_dir);
return -ENOMEM;
}
-
-/**
- * clock_debug_register() - Add additional clocks to clock debugfs hierarchy
- * @table: Table of clocks to create debugfs nodes for
- * @size: Size of @table
- *
- * Use this function to register additional clocks in debugfs. The clock debugfs
- * hierarchy must have already been initialized with clock_debug_init() prior to
- * calling this function. Unlike clock_debug_init(), this may be called multiple
- * times with different clock lists and can be used after the kernel has
- * finished booting.
- */
-int clock_debug_register(struct clk_lookup *table, size_t size)
-{
- struct clk_table *clk_table;
- unsigned long flags;
- int i;
-
- clk_table = kmalloc(sizeof(*clk_table), GFP_KERNEL);
- if (!clk_table)
- return -ENOMEM;
-
- clk_table->clocks = table;
- clk_table->num_clocks = size;
-
- spin_lock_irqsave(&clk_list_lock, flags);
- list_add_tail(&clk_table->node, &clk_list);
- spin_unlock_irqrestore(&clk_list_lock, flags);
-
- for (i = 0; i < size; i++)
- clock_debug_add(table[i].clk);
-
- return 0;
-}
+static DEFINE_MUTEX(clk_debug_lock);
+static int clk_debug_init_once;
/**
* clock_debug_init() - Initialize clock debugfs
+ * Lock clk_debug_lock before invoking this function.
*/
-int __init clock_debug_init(void)
+static int clock_debug_init(void)
{
+ if (clk_debug_init_once)
+ return 0;
+
+ clk_debug_init_once = 1;
+
debugfs_base = debugfs_create_dir("clk", NULL);
if (!debugfs_base)
return -ENOMEM;
+
if (!debugfs_create_u32("debug_suspend", S_IRUGO | S_IWUSR,
debugfs_base, &debug_suspend)) {
debugfs_remove_recursive(debugfs_base);
@@ -407,6 +384,45 @@
return 0;
}
+/**
+ * clock_debug_register() - Add additional clocks to clock debugfs hierarchy
+ * @table: Table of clocks to create debugfs nodes for
+ * @size: Size of @table
+ *
+ */
+int clock_debug_register(struct clk_lookup *table, size_t size)
+{
+ struct clk_table *clk_table;
+ unsigned long flags;
+ int i, ret;
+
+ mutex_lock(&clk_debug_lock);
+
+ ret = clock_debug_init();
+ if (ret)
+ goto out;
+
+ clk_table = kmalloc(sizeof(*clk_table), GFP_KERNEL);
+ if (!clk_table) {
+ ret = -ENOMEM;
+ goto out;
+ }
+
+ clk_table->clocks = table;
+ clk_table->num_clocks = size;
+
+ spin_lock_irqsave(&clk_list_lock, flags);
+ list_add_tail(&clk_table->node, &clk_list);
+ spin_unlock_irqrestore(&clk_list_lock, flags);
+
+ for (i = 0; i < size; i++)
+ clock_debug_add(table[i].clk);
+
+out:
+ mutex_unlock(&clk_debug_lock);
+ return ret;
+}
+
static int clock_debug_print_clock(struct clk *c)
{
char *start = "";
diff --git a/arch/arm/mach-msm/clock-krypton.c b/arch/arm/mach-msm/clock-krypton.c
new file mode 100644
index 0000000..aaee003
--- /dev/null
+++ b/arch/arm/mach-msm/clock-krypton.c
@@ -0,0 +1,125 @@
+/* Copyright (c) 2013, The Linux Foundation. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 and
+ * only version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <linux/err.h>
+#include <linux/ctype.h>
+#include <linux/io.h>
+#include <linux/spinlock.h>
+#include <linux/delay.h>
+#include <linux/clk.h>
+#include <linux/iopoll.h>
+#include <linux/regulator/consumer.h>
+
+#include <mach/rpm-regulator-smd.h>
+#include <mach/socinfo.h>
+#include <mach/rpm-smd.h>
+
+#include "clock-local2.h"
+#include "clock-pll.h"
+#include "clock-rpm.h"
+#include "clock-voter.h"
+#include "clock.h"
+
+static struct clk_lookup msm_clocks_dummy[] = {
+ CLK_DUMMY("core_clk", BLSP1_UART_CLK, "f991f000.serial", OFF),
+ CLK_DUMMY("iface_clk", BLSP1_UART_CLK, "f991f000.serial", OFF),
+ CLK_DUMMY("core_clk", SPI_CLK, "f9928000.spi", OFF),
+ CLK_DUMMY("iface_clk", SPI_P_CLK, "f9928000.spi", OFF),
+
+ CLK_DUMMY("bus_clk", cnoc_msmbus_clk.c, "msm_config_noc", OFF),
+ CLK_DUMMY("bus_a_clk", cnoc_msmbus_a_clk.c, "msm_config_noc", OFF),
+ CLK_DUMMY("bus_clk", snoc_msmbus_clk.c, "msm_sys_noc", OFF),
+ CLK_DUMMY("bus_a_clk", snoc_msmbus_a_clk.c, "msm_sys_noc", OFF),
+ CLK_DUMMY("bus_clk", pnoc_msmbus_clk.c, "msm_periph_noc", OFF),
+ CLK_DUMMY("bus_a_clk", pnoc_msmbus_a_clk.c, "msm_periph_noc", OFF),
+ CLK_DUMMY("mem_clk", bimc_msmbus_clk.c, "msm_bimc", OFF),
+ CLK_DUMMY("mem_a_clk", bimc_msmbus_a_clk.c, "msm_bimc", OFF),
+ CLK_DUMMY("mem_clk", bimc_acpu_a_clk.c, "", OFF),
+
+ CLK_DUMMY("clktype", gcc_imem_axi_clk , "drivername", OFF),
+ CLK_DUMMY("clktype", gcc_imem_cfg_ahb_clk , "drivername", OFF),
+ CLK_DUMMY("clktype", gcc_mss_cfg_ahb_clk , "drivername", OFF),
+ CLK_DUMMY("clktype", gcc_mss_q6_bimc_axi_clk , "drivername", OFF),
+ CLK_DUMMY("mem_clk", gcc_usb30_master_clk , "drivername", OFF),
+ CLK_DUMMY("sleep_clk", gcc_usb30_sleep_clk , "drivername", OFF),
+ CLK_DUMMY("utmi_clk", gcc_usb30_mock_utmi_clk , "drivername", OFF),
+ CLK_DUMMY("iface_clk", gcc_usb_hsic_ahb_clk , "drivername", OFF),
+ CLK_DUMMY("core_clk", gcc_usb_hsic_system_clk , "drivername", OFF),
+ CLK_DUMMY("phyclk", gcc_usb_hsic_clk , "drivername", OFF),
+ CLK_DUMMY("cal_clk", gcc_usb_hsic_io_cal_clk , "drivername", OFF),
+ CLK_DUMMY("core_clk", gcc_usb_hs_system_clk , "drivername", OFF),
+ CLK_DUMMY("iface_clk", gcc_usb_hs_ahb_clk , "drivername", OFF),
+ CLK_DUMMY("sleep_a_clk", gcc_usb2a_phy_sleep_clk , "drivername", OFF),
+ CLK_DUMMY("sleep_b_clk", gcc_usb2b_phy_sleep_clk , "drivername", OFF),
+ CLK_DUMMY("core_clk", gcc_sdcc2_apps_clk , "drivername", OFF),
+ CLK_DUMMY("iface_clk", gcc_sdcc2_ahb_clk , "drivername", OFF),
+ CLK_DUMMY("core_clk", gcc_sdcc3_apps_clk , "drivername", OFF),
+ CLK_DUMMY("iface_clk", gcc_sdcc3_ahb_clk , "drivername", OFF),
+ CLK_DUMMY("core_clk", sdcc3_apps_clk_src , "drivername", OFF),
+ CLK_DUMMY("iface_clk", gcc_blsp1_ahb_clk , "drivername", OFF),
+ CLK_DUMMY("core_clk", gcc_blsp1_qup1_spi_apps_clk, "drivername", OFF),
+ CLK_DUMMY("core_clk", gcc_blsp1_qup1_i2c_apps_clk, "drivername", OFF),
+ CLK_DUMMY("core_clk", gcc_blsp1_uart1_apps_clk , "drivername", OFF),
+ CLK_DUMMY("core_clk", gcc_blsp1_qup2_spi_apps_clk, "drivername", OFF),
+ CLK_DUMMY("core_clk", gcc_blsp1_qup2_i2c_apps_clk, "drivername", OFF),
+ CLK_DUMMY("core_clk", gcc_blsp1_uart2_apps_clk , "drivername", OFF),
+ CLK_DUMMY("core_clk", gcc_blsp1_qup3_spi_apps_clk, "drivername", OFF),
+ CLK_DUMMY("core_clk", gcc_blsp1_qup3_i2c_apps_clk, "drivername", OFF),
+ CLK_DUMMY("core_clk", gcc_blsp1_uart3_apps_clk , "drivername", OFF),
+ CLK_DUMMY("core_clk", gcc_blsp1_qup4_spi_apps_clk, "drivername", OFF),
+ CLK_DUMMY("core_clk", gcc_blsp1_qup4_i2c_apps_clk, "drivername", OFF),
+ CLK_DUMMY("core_clk", gcc_blsp1_uart4_apps_clk , "drivername", OFF),
+ CLK_DUMMY("core_clk", gcc_blsp1_qup5_spi_apps_clk, "drivername", OFF),
+ CLK_DUMMY("core_clk", gcc_blsp1_qup5_i2c_apps_clk, "drivername", OFF),
+ CLK_DUMMY("core_clk", gcc_blsp1_uart5_apps_clk , "drivername", OFF),
+ CLK_DUMMY("core_clk", gcc_blsp1_qup6_spi_apps_clk, "drivername", OFF),
+ CLK_DUMMY("core_clk", gcc_blsp1_qup6_i2c_apps_clk, "drivername", OFF),
+ CLK_DUMMY("core_clk", gcc_blsp1_uart6_apps_clk , "drivername", OFF),
+ CLK_DUMMY("core_clk", blsp1_uart6_apps_clk_src , "drivername", OFF),
+ CLK_DUMMY("iface_clk", gcc_pdm_ahb_clk , "drivername", OFF),
+ CLK_DUMMY("core_clk", gcc_pdm2_clk , "drivername", OFF),
+ CLK_DUMMY("core_clk", gcc_prng_ahb_clk , "drivername", OFF),
+ CLK_DUMMY("dma_bam_pclk", gcc_bam_dma_ahb_clk , "drivername", OFF),
+ CLK_DUMMY("mem_clk", gcc_boot_rom_ahb_clk , "drivername", OFF),
+ CLK_DUMMY("core_clk", gcc_ce1_clk , "drivername", OFF),
+ CLK_DUMMY("core_clk", gcc_ce1_axi_clk , "drivername", OFF),
+ CLK_DUMMY("core_clk", gcc_ce1_ahb_clk , "drivername", OFF),
+ CLK_DUMMY("core_clk_src", ce1_clk_src , "drivername", OFF),
+ CLK_DUMMY("bus_clk", gcc_lpass_q6_axi_clk , "drivername", OFF),
+ CLK_DUMMY("clktype", pcie_pipe_clk , "drivername", OFF),
+ CLK_DUMMY("clktype", gcc_gp1_clk , "drivername", OFF),
+ CLK_DUMMY("clktype", gp1_clk_src , "drivername", OFF),
+ CLK_DUMMY("clktype", gcc_gp2_clk , "drivername", OFF),
+ CLK_DUMMY("clktype", gp2_clk_src , "drivername", OFF),
+ CLK_DUMMY("clktype", gcc_gp3_clk , "drivername", OFF),
+ CLK_DUMMY("clktype", gp3_clk_src , "drivername", OFF),
+ CLK_DUMMY("core_clk", gcc_ipa_clk , "drivername", OFF),
+ CLK_DUMMY("iface_clk", gcc_ipa_cnoc_clk , "drivername", OFF),
+ CLK_DUMMY("inactivity_clk", gcc_ipa_sleep_clk , "drivername", OFF),
+ CLK_DUMMY("core_clk_src", ipa_clk_src , "drivername", OFF),
+ CLK_DUMMY("clktype", gcc_dcs_clk , "drivername", OFF),
+ CLK_DUMMY("clktype", dcs_clk_src , "drivername", OFF),
+ CLK_DUMMY("clktype", gcc_pcie_cfg_ahb_clk , "drivername", OFF),
+ CLK_DUMMY("clktype", gcc_pcie_pipe_clk , "drivername", OFF),
+ CLK_DUMMY("clktype", gcc_pcie_axi_clk , "drivername", OFF),
+ CLK_DUMMY("clktype", gcc_pcie_sleep_clk , "drivername", OFF),
+ CLK_DUMMY("clktype", gcc_pcie_axi_mstr_clk , "drivername", OFF),
+ CLK_DUMMY("clktype", pcie_pipe_clk_src , "drivername", OFF),
+ CLK_DUMMY("clktype", pcie_aux_clk_src , "drivername", OFF),
+};
+
+struct clock_init_data msmkrypton_clock_init_data __initdata = {
+ .table = msm_clocks_dummy,
+ .size = ARRAY_SIZE(msm_clocks_dummy),
+};
diff --git a/arch/arm/mach-msm/clock-mdss-8974.c b/arch/arm/mach-msm/clock-mdss-8974.c
index 1245287..6877b4d9 100644
--- a/arch/arm/mach-msm/clock-mdss-8974.c
+++ b/arch/arm/mach-msm/clock-mdss-8974.c
@@ -906,18 +906,19 @@
DSS_REG_W(mdss_dsi_base, DSI_0_PHY_PLL_UNIPHY_PLL_GLB_CFG, 0x0f);
udelay(1000);
- do {
+ pll_locked = dsi_pll_lock_status();
+ for (i = 0; (i < 4) && !pll_locked; i++) {
+ DSS_REG_W(mdss_dsi_base,
+ DSI_0_PHY_PLL_UNIPHY_PLL_GLB_CFG, 0x07);
+ if (i != 0)
+ DSS_REG_W(mdss_dsi_base,
+ DSI_0_PHY_PLL_UNIPHY_PLL_CAL_CFG1, 0x34);
+ udelay(1);
+ DSS_REG_W(mdss_dsi_base,
+ DSI_0_PHY_PLL_UNIPHY_PLL_GLB_CFG, 0x0f);
+ udelay(1000);
pll_locked = dsi_pll_lock_status();
- if (!pll_locked) {
- DSS_REG_W(mdss_dsi_base,
- DSI_0_PHY_PLL_UNIPHY_PLL_GLB_CFG, 0x07);
- udelay(1);
- DSS_REG_W(mdss_dsi_base,
- DSI_0_PHY_PLL_UNIPHY_PLL_GLB_CFG, 0x0f);
- udelay(1000);
- i++;
- }
- } while ((i < 3) && !pll_locked);
+ }
if (pll_locked)
pr_debug("%s: PLL Locked at attempt #%d\n", __func__, i);
@@ -940,17 +941,17 @@
* PLL to successfully lock
*/
DSS_REG_W(mdss_dsi_base, DSI_0_PHY_PLL_UNIPHY_PLL_GLB_CFG, 0x01);
- udelay(1);
+ udelay(200);
DSS_REG_W(mdss_dsi_base, DSI_0_PHY_PLL_UNIPHY_PLL_GLB_CFG, 0x05);
- udelay(1);
+ udelay(200);
DSS_REG_W(mdss_dsi_base, DSI_0_PHY_PLL_UNIPHY_PLL_GLB_CFG, 0x07);
- udelay(1);
+ udelay(200);
DSS_REG_W(mdss_dsi_base, DSI_0_PHY_PLL_UNIPHY_PLL_GLB_CFG, 0x05);
- udelay(1);
+ udelay(200);
DSS_REG_W(mdss_dsi_base, DSI_0_PHY_PLL_UNIPHY_PLL_GLB_CFG, 0x07);
- udelay(1);
+ udelay(200);
DSS_REG_W(mdss_dsi_base, DSI_0_PHY_PLL_UNIPHY_PLL_GLB_CFG, 0x0f);
- udelay(1);
+ udelay(1000);
pll_locked = dsi_pll_lock_status();
pr_debug("%s: PLL status = %s\n", __func__,
@@ -1029,6 +1030,7 @@
DSS_REG_W(mdss_dsi_base, DSI_0_PHY_PLL_UNIPHY_PLL_GLB_CFG, 0x05);
udelay(200);
DSS_REG_W(mdss_dsi_base, DSI_0_PHY_PLL_UNIPHY_PLL_GLB_CFG, 0x0d);
+ udelay(1);
DSS_REG_W(mdss_dsi_base, DSI_0_PHY_PLL_UNIPHY_PLL_GLB_CFG, 0x0f);
udelay(1000);
diff --git a/arch/arm/mach-msm/clock-pll.c b/arch/arm/mach-msm/clock-pll.c
index fcdcb29..908107e 100644
--- a/arch/arm/mach-msm/clock-pll.c
+++ b/arch/arm/mach-msm/clock-pll.c
@@ -294,13 +294,7 @@
{
struct pll_freq_tbl *nf;
struct pll_clk *pll = to_pll_clk(c);
- u32 mode;
-
- mode = readl_relaxed(PLL_MODE_REG(pll));
-
- /* Don't change PLL's rate if it is enabled */
- if ((mode & PLL_MODE_MASK) == PLL_MODE_MASK)
- return -EBUSY;
+ unsigned long flags;
for (nf = pll->freq_tbl; nf->freq_hz != PLL_FREQ_END
&& nf->freq_hz != rate; nf++)
@@ -309,12 +303,24 @@
if (nf->freq_hz == PLL_FREQ_END)
return -EINVAL;
+ /*
+ * Ensure PLL is off before changing rate. For optimization reasons,
+ * assume no downstream clock is using actively using it.
+ */
+ spin_lock_irqsave(&c->lock, flags);
+ if (c->count)
+ c->ops->disable(c);
+
writel_relaxed(nf->l_val, PLL_L_REG(pll));
writel_relaxed(nf->m_val, PLL_M_REG(pll));
writel_relaxed(nf->n_val, PLL_N_REG(pll));
__pll_config_reg(PLL_CONFIG_REG(pll), nf, &pll->masks);
+ if (c->count)
+ c->ops->enable(c);
+
+ spin_unlock_irqrestore(&c->lock, flags);
return 0;
}
diff --git a/arch/arm/mach-msm/clock-rpm.c b/arch/arm/mach-msm/clock-rpm.c
index 3870e2b..8356207 100644
--- a/arch/arm/mach-msm/clock-rpm.c
+++ b/arch/arm/mach-msm/clock-rpm.c
@@ -59,6 +59,11 @@
return 0;
}
+static int clk_rpmrs_is_enabled(struct rpm_clk *r)
+{
+ return !!clk_rpmrs_get_rate(r);
+}
+
static int clk_rpmrs_set_rate_smd(struct rpm_clk *r, uint32_t value,
uint32_t context)
{
@@ -80,10 +85,16 @@
return 0;
}
+static int clk_rpmrs_is_enabled_smd(struct rpm_clk *r)
+{
+ return !!r->c.prepare_count;
+}
+
struct clk_rpmrs_data {
int (*set_rate_fn)(struct rpm_clk *r, uint32_t value, uint32_t context);
int (*get_rate_fn)(struct rpm_clk *r);
int (*handoff_fn)(struct rpm_clk *r);
+ int (*is_enabled)(struct rpm_clk *r);
int ctx_active_id;
int ctx_sleep_id;
};
@@ -92,6 +103,7 @@
.set_rate_fn = clk_rpmrs_set_rate,
.get_rate_fn = clk_rpmrs_get_rate,
.handoff_fn = clk_rpmrs_handoff,
+ .is_enabled = clk_rpmrs_is_enabled,
.ctx_active_id = MSM_RPM_CTX_SET_0,
.ctx_sleep_id = MSM_RPM_CTX_SET_SLEEP,
};
@@ -99,6 +111,7 @@
struct clk_rpmrs_data clk_rpmrs_data_smd = {
.set_rate_fn = clk_rpmrs_set_rate_smd,
.handoff_fn = clk_rpmrs_handoff_smd,
+ .is_enabled = clk_rpmrs_is_enabled_smd,
.ctx_active_id = MSM_RPM_CTX_ACTIVE_SET,
.ctx_sleep_id = MSM_RPM_CTX_SLEEP_SET,
};
@@ -257,7 +270,8 @@
static int rpm_clk_is_enabled(struct clk *clk)
{
- return !!(rpm_clk_get_rate(clk));
+ struct rpm_clk *r = to_rpm_clk(clk);
+ return r->rpmrs_data->is_enabled(r);
}
static long rpm_clk_round_rate(struct clk *clk, unsigned long rate)
diff --git a/arch/arm/mach-msm/clock.c b/arch/arm/mach-msm/clock.c
index 582bccf..3c43223 100644
--- a/arch/arm/mach-msm/clock.c
+++ b/arch/arm/mach-msm/clock.c
@@ -23,6 +23,7 @@
#include <linux/clkdev.h>
#include <linux/list.h>
#include <linux/regulator/consumer.h>
+#include <linux/mutex.h>
#include <trace/events/power.h>
#include <mach/clk-provider.h>
#include "clock.h"
@@ -39,6 +40,8 @@
};
static LIST_HEAD(handoff_vdd_list);
+static DEFINE_MUTEX(msm_clock_init_lock);
+
/* Find the voltage level required for a given rate. */
int find_vdd_level(struct clk *clk, unsigned long rate)
{
@@ -573,7 +576,7 @@
}
EXPORT_SYMBOL(clk_set_flags);
-static struct clock_init_data *clk_init_data;
+static LIST_HEAD(initdata_list);
static void init_sibling_lists(struct clk_lookup *clock_tbl, size_t num_clocks)
{
@@ -588,33 +591,6 @@
}
}
-/**
- * msm_clock_register() - Register additional clock tables
- * @table: Table of clocks
- * @size: Size of @table
- *
- * Upon return, clock APIs may be used to control clocks registered using this
- * function. This API may only be used after msm_clock_init() has completed.
- * Unlike msm_clock_init(), this function may be called multiple times with
- * different clock lists and used after the kernel has finished booting.
- */
-int msm_clock_register(struct clk_lookup *table, size_t size)
-{
- if (!clk_init_data)
- return -ENODEV;
-
- if (!table)
- return -EINVAL;
-
- init_sibling_lists(table, size);
- clkdev_add_table(table, size);
- clock_debug_register(table, size);
-
- return 0;
-}
-EXPORT_SYMBOL(msm_clock_register);
-
-
static void vdd_class_init(struct clk_vdd_class *vdd)
{
struct handoff_vdd *v;
@@ -646,7 +622,7 @@
list_add_tail(&v->list, &handoff_vdd_list);
}
-static int __init __handoff_clk(struct clk *clk)
+static int __handoff_clk(struct clk *clk)
{
enum handoff state = HANDOFF_DISABLED_CLK;
struct handoff_clk *h = NULL;
@@ -726,29 +702,20 @@
}
/**
- * msm_clock_init() - Register and initialize a clock driver
- * @data: Driver-specific clock initialization data
+ * msm_clock_register() - Register additional clock tables
+ * @table: Table of clocks
+ * @size: Size of @table
*
- * Upon return from this call, clock APIs may be used to control
- * clocks registered with this API.
+ * Upon return, clock APIs may be used to control clocks registered using this
+ * function.
*/
-int __init msm_clock_init(struct clock_init_data *data)
+int msm_clock_register(struct clk_lookup *table, size_t size)
{
- unsigned n;
- struct clk_lookup *clock_tbl;
- size_t num_clocks;
+ int n = 0;
- if (!data)
- return -EINVAL;
+ mutex_lock(&msm_clock_init_lock);
- clk_init_data = data;
- if (clk_init_data->pre_init)
- clk_init_data->pre_init();
-
- clock_tbl = data->table;
- num_clocks = data->size;
-
- init_sibling_lists(clock_tbl, num_clocks);
+ init_sibling_lists(table, size);
/*
* Enable regulators and temporarily set them up at maximum voltage.
@@ -757,23 +724,50 @@
* late_init, by which time we assume all the clocks would have been
* handed off.
*/
- for (n = 0; n < num_clocks; n++)
- vdd_class_init(clock_tbl[n].clk->vdd_class);
+ for (n = 0; n < size; n++)
+ vdd_class_init(table[n].clk->vdd_class);
/*
* Detect and preserve initial clock state until clock_late_init() or
* a driver explicitly changes it, whichever is first.
*/
- for (n = 0; n < num_clocks; n++)
- __handoff_clk(clock_tbl[n].clk);
+ for (n = 0; n < size; n++)
+ __handoff_clk(table[n].clk);
- clkdev_add_table(clock_tbl, num_clocks);
+ clkdev_add_table(table, size);
- if (clk_init_data->post_init)
- clk_init_data->post_init();
+ clock_debug_register(table, size);
- clock_debug_init();
- clock_debug_register(clock_tbl, num_clocks);
+ mutex_unlock(&msm_clock_init_lock);
+
+ return 0;
+}
+EXPORT_SYMBOL(msm_clock_register);
+
+/**
+ * msm_clock_init() - Register and initialize a clock driver
+ * @data: Driver-specific clock initialization data
+ *
+ * Upon return from this call, clock APIs may be used to control
+ * clocks registered with this API.
+ */
+int __init msm_clock_init(struct clock_init_data *data)
+{
+ if (!data)
+ return -EINVAL;
+
+ if (data->pre_init)
+ data->pre_init();
+
+ mutex_lock(&msm_clock_init_lock);
+ if (data->late_init)
+ list_add(&data->list, &initdata_list);
+ mutex_unlock(&msm_clock_init_lock);
+
+ msm_clock_register(data->table, data->size);
+
+ if (data->post_init)
+ data->post_init();
return 0;
}
@@ -782,12 +776,21 @@
{
struct handoff_clk *h, *h_temp;
struct handoff_vdd *v, *v_temp;
+ struct clock_init_data *initdata, *initdata_temp;
int ret = 0;
- if (clk_init_data->late_init)
- ret = clk_init_data->late_init();
-
pr_info("%s: Removing enables held for handed-off clocks\n", __func__);
+
+ mutex_lock(&msm_clock_init_lock);
+
+ list_for_each_entry_safe(initdata, initdata_temp,
+ &initdata_list, list) {
+ ret = initdata->late_init();
+ if (ret)
+ pr_err("%s: %pS failed late_init.\n", __func__,
+ initdata);
+ }
+
list_for_each_entry_safe(h, h_temp, &handoff_list, list) {
clk_disable_unprepare(h->clk);
list_del(&h->list);
@@ -800,6 +803,11 @@
kfree(v);
}
+ mutex_unlock(&msm_clock_init_lock);
+
return ret;
}
-late_initcall(clock_late_init);
+/* clock_late_init should run only after all deferred probing
+ * (excluding DLKM probes) has completed.
+ */
+late_initcall_sync(clock_late_init);
diff --git a/arch/arm/mach-msm/clock.h b/arch/arm/mach-msm/clock.h
index 2a65d2f..e294f4c 100644
--- a/arch/arm/mach-msm/clock.h
+++ b/arch/arm/mach-msm/clock.h
@@ -26,6 +26,7 @@
* @late_init: called during late init
*/
struct clock_init_data {
+ struct list_head list;
struct clk_lookup *table;
size_t size;
void (*pre_init)(void);
@@ -55,16 +56,15 @@
extern struct clock_init_data msm8226_rumi_clock_init_data;
extern struct clock_init_data msm8084_clock_init_data;
extern struct clock_init_data mpq8092_clock_init_data;
+extern struct clock_init_data msmkrypton_clock_init_data;
int msm_clock_init(struct clock_init_data *data);
int find_vdd_level(struct clk *clk, unsigned long rate);
#ifdef CONFIG_DEBUG_FS
-int clock_debug_init(void);
int clock_debug_register(struct clk_lookup *t, size_t s);
void clock_debug_print_enabled(void);
#else
-static inline int clock_debug_init(void) { return 0; }
static inline int clock_debug_register(struct clk_lookup *t, size_t s)
{
return 0;
diff --git a/arch/arm/mach-msm/cpr-regulator.c b/arch/arm/mach-msm/cpr-regulator.c
index e647d1d..5550282 100644
--- a/arch/arm/mach-msm/cpr-regulator.c
+++ b/arch/arm/mach-msm/cpr-regulator.c
@@ -682,10 +682,20 @@
}
rc = regulator_enable(cpr_vreg->vdd_apc);
- if (!rc)
- cpr_vreg->vreg_enabled = true;
- else
+ if (rc) {
pr_err("regulator_enable: vdd_apc: rc=%d\n", rc);
+ return rc;
+ }
+
+ cpr_vreg->vreg_enabled = true;
+
+ mutex_lock(&cpr_vreg->cpr_mutex);
+ if (cpr_is_allowed(cpr_vreg) && cpr_vreg->corner) {
+ cpr_irq_clr(cpr_vreg);
+ cpr_corner_switch(cpr_vreg, cpr_vreg->corner);
+ cpr_ctl_enable(cpr_vreg);
+ }
+ mutex_unlock(&cpr_vreg->cpr_mutex);
return rc;
}
@@ -700,10 +710,17 @@
if (cpr_vreg->vdd_mx)
rc = regulator_disable(cpr_vreg->vdd_mx);
- if (rc)
+ if (rc) {
pr_err("regulator_disable: vdd_mx: rc=%d\n", rc);
- else
- cpr_vreg->vreg_enabled = false;
+ return rc;
+ }
+
+ cpr_vreg->vreg_enabled = false;
+
+ mutex_lock(&cpr_vreg->cpr_mutex);
+ if (cpr_is_allowed(cpr_vreg))
+ cpr_ctl_disable(cpr_vreg);
+ mutex_unlock(&cpr_vreg->cpr_mutex);
} else {
pr_err("regulator_disable: vdd_apc: rc=%d\n", rc);
}
@@ -739,7 +756,7 @@
if (rc)
goto _exit;
- if (cpr_is_allowed(cpr_vreg)) {
+ if (cpr_is_allowed(cpr_vreg) && cpr_vreg->vreg_enabled) {
cpr_irq_clr(cpr_vreg);
cpr_corner_switch(cpr_vreg, corner);
cpr_ctl_enable(cpr_vreg);
diff --git a/arch/arm/mach-msm/gdsc.c b/arch/arm/mach-msm/gdsc.c
index 0963e27..774548c 100644
--- a/arch/arm/mach-msm/gdsc.c
+++ b/arch/arm/mach-msm/gdsc.c
@@ -47,7 +47,8 @@
void __iomem *gdscr;
struct clk **clocks;
int clock_count;
- bool toggle_mems;
+ bool toggle_mem;
+ bool toggle_periph;
bool toggle_logic;
bool resets_asserted;
};
@@ -86,11 +87,11 @@
sc->resets_asserted = false;
}
- if (sc->toggle_mems) {
- for (i = 0; i < sc->clock_count; i++) {
+ for (i = 0; i < sc->clock_count; i++) {
+ if (sc->toggle_mem)
clk_set_flags(sc->clocks[i], CLKFLAG_RETAIN_MEM);
+ if (sc->toggle_periph)
clk_set_flags(sc->clocks[i], CLKFLAG_RETAIN_PERIPH);
- }
}
/*
@@ -127,11 +128,11 @@
sc->resets_asserted = true;
}
- if (sc->toggle_mems) {
- for (i = 0; i < sc->clock_count; i++) {
+ for (i = 0; i < sc->clock_count; i++) {
+ if (sc->toggle_mem)
clk_set_flags(sc->clocks[i], CLKFLAG_NORETAIN_MEM);
+ if (sc->toggle_periph)
clk_set_flags(sc->clocks[i], CLKFLAG_NORETAIN_PERIPH);
- }
}
return ret;
@@ -150,7 +151,7 @@
struct resource *res;
struct gdsc *sc;
uint32_t regval;
- bool retain_mems;
+ bool retain_mem, retain_periph;
int i, ret;
sc = devm_kzalloc(&pdev->dev, sizeof(struct gdsc), GFP_KERNEL);
@@ -222,18 +223,23 @@
regval |= EN_REST_WAIT_VAL | EN_FEW_WAIT_VAL | CLK_DIS_WAIT_VAL;
writel_relaxed(regval, sc->gdscr);
- retain_mems = of_property_read_bool(pdev->dev.of_node,
- "qcom,retain-mems");
+ retain_mem = of_property_read_bool(pdev->dev.of_node,
+ "qcom,retain-mem");
+ retain_periph = of_property_read_bool(pdev->dev.of_node,
+ "qcom,retain-periph");
for (i = 0; i < sc->clock_count; i++) {
- if (retain_mems || (regval & PWR_ON_MASK)) {
+ if (retain_mem || (regval & PWR_ON_MASK))
clk_set_flags(sc->clocks[i], CLKFLAG_RETAIN_MEM);
- clk_set_flags(sc->clocks[i], CLKFLAG_RETAIN_PERIPH);
- } else {
+ else
clk_set_flags(sc->clocks[i], CLKFLAG_NORETAIN_MEM);
+
+ if (retain_periph || (regval & PWR_ON_MASK))
+ clk_set_flags(sc->clocks[i], CLKFLAG_RETAIN_PERIPH);
+ else
clk_set_flags(sc->clocks[i], CLKFLAG_NORETAIN_PERIPH);
- }
}
- sc->toggle_mems = !retain_mems;
+ sc->toggle_mem = !retain_mem;
+ sc->toggle_periph = !retain_periph;
sc->toggle_logic = !of_property_read_bool(pdev->dev.of_node,
"qcom,skip-logic-collapse");
if (!sc->toggle_logic) {
diff --git a/arch/arm/mach-msm/hotplug.c b/arch/arm/mach-msm/hotplug.c
index e9a4af0..20e3c3b 100644
--- a/arch/arm/mach-msm/hotplug.c
+++ b/arch/arm/mach-msm/hotplug.c
@@ -24,16 +24,9 @@
extern volatile int pen_release;
-struct msm_hotplug_device {
- struct completion cpu_killed;
- unsigned int warm_boot;
-};
-
-
static cpumask_t cpu_dying_mask;
-static DEFINE_PER_CPU_SHARED_ALIGNED(struct msm_hotplug_device,
- msm_hotplug_devices);
+static DEFINE_PER_CPU(unsigned int, warm_boot_flag);
static inline void cpu_enter_lowpower(void)
{
@@ -95,7 +88,6 @@
__func__, smp_processor_id(), cpu);
BUG();
}
- complete(&__get_cpu_var(msm_hotplug_devices).cpu_killed);
/*
* we're ready for shutdown now, so do it
*/
@@ -161,11 +153,10 @@
int msm_platform_secondary_init(unsigned int cpu)
{
int ret;
- struct msm_hotplug_device *dev = &__get_cpu_var(msm_hotplug_devices);
+ unsigned int *warm_boot = &__get_cpu_var(warm_boot_flag);
- if (!dev->warm_boot) {
- dev->warm_boot = 1;
- init_completion(&dev->cpu_killed);
+ if (!(*warm_boot)) {
+ *warm_boot = 1;
return 0;
}
msm_jtag_restore_state();
@@ -179,9 +170,6 @@
static int __init init_hotplug(void)
{
-
- struct msm_hotplug_device *dev = &__get_cpu_var(msm_hotplug_devices);
- init_completion(&dev->cpu_killed);
return register_hotcpu_notifier(&hotplug_rtb_notifier);
}
early_initcall(init_hotplug);
diff --git a/arch/arm/mach-msm/idle-v7.S b/arch/arm/mach-msm/idle-v7.S
index 6840f1c..5d25134 100644
--- a/arch/arm/mach-msm/idle-v7.S
+++ b/arch/arm/mach-msm/idle-v7.S
@@ -65,6 +65,75 @@
#endif
bx lr
#endif
+ENTRY(msm_pm_pc_hotplug)
+ stmfd sp!, {lr}
+#if defined(CONFIG_MSM_FIQ_SUPPORT)
+ cpsid f
+#endif
+
+#if defined(CONFIG_MSM_JTAG) || defined(CONFIG_MSM_JTAG_MM)
+ bl msm_jtag_save_state
+#endif
+ mov r1, #0
+ mcr p15, 2, r1, c0, c0, 0 /*CCSELR*/
+ isb
+ mrc p15, 1, r1, c0, c0, 0 /*CCSIDR*/
+ mov r2, #1
+ and r1, r2, r1, ASR #30 /* Check if the cache is write back */
+ cmp r1, #1
+ bleq v7_flush_kern_cache_all
+
+ mrc p15, 0, r0, c0, c0, 5 /* MPIDR */
+ and r0, r0, #15 /* what CPU am I */
+
+ ldr r1, =msm_pc_debug_counters /*load the IMEM debug location */
+ ldr r1, [r1]
+ cmp r1, #0
+ beq skip_hp_debug1
+ add r1, r1, r0, LSL #4 /* debug location for this CPU */
+ ldr r2, [r1]
+ add r2, #1
+ str r2, [r1]
+skip_hp_debug1:
+
+#ifdef CONFIG_MSM_SCM
+ ldr r0, =SCM_SVC_BOOT
+ ldr r1, =SCM_CMD_TERMINATE_PC
+ mov r2, #0
+ bl scm_call_atomic1
+#else
+ mrc p15, 0, r3, c1, c0, 0 /* read current CR */
+ bic r0, r3, #(1 << 2) /* clear dcache bit */
+ bic r0, r0, #(1 << 12) /* clear icache bit */
+ mcr p15, 0, r0, c1, c0, 0 /* disable d/i cache */
+ isb
+ wfi
+ mcr p15, 0, r3, c1, c0, 0 /* restore d/i cache */
+ isb
+#endif
+
+#if defined(CONFIG_MSM_FIQ_SUPPORT)
+ cpsie f
+#endif
+ mrc p15, 0, r0, c0, c0, 5 /* MPIDR */
+ and r0, r0, #15 /* what CPU am I */
+
+ ldr r1, =msm_pc_debug_counters /*load the IMEM debug location */
+ ldr r1, [r1]
+ cmp r1, #0
+ beq skip_hp_debug2
+ add r1, r1, r0, LSL #4 /* debug location for this CPU */
+ add r1, #8
+ ldr r2, [r1]
+ add r2, #1
+ str r2, [r1]
+skip_hp_debug2:
+#if defined(CONFIG_MSM_JTAG) || defined(CONFIG_MSM_JTAG_MM)
+ bl msm_jtag_restore_state
+#endif
+ mov r0, #0 /* return power collapse failed */
+ ldmfd sp!, {lr}
+ bx lr
ENTRY(msm_pm_collapse)
#if defined(CONFIG_MSM_FIQ_SUPPORT)
diff --git a/arch/arm/mach-msm/idle.h b/arch/arm/mach-msm/idle.h
index ead86a1..72f1a03 100644
--- a/arch/arm/mach-msm/idle.h
+++ b/arch/arm/mach-msm/idle.h
@@ -26,6 +26,7 @@
int msm_arch_idle(void);
int msm_pm_collapse(void);
+int msm_pm_pc_hotplug(void);
void msm_pm_collapse_exit(void);
extern void *msm_saved_state;
extern void (*msm_pm_disable_l2_fn)(void);
diff --git a/arch/arm/mach-msm/include/mach/iommu.h b/arch/arm/mach-msm/include/mach/iommu.h
index 68cfb2e..541ca44 100644
--- a/arch/arm/mach-msm/include/mach/iommu.h
+++ b/arch/arm/mach-msm/include/mach/iommu.h
@@ -188,21 +188,45 @@
int attach_count;
};
-struct msm_iommu_context_regs {
- uint32_t far;
- uint32_t par;
- uint32_t fsr;
- uint32_t fsynr0;
- uint32_t fsynr1;
- uint32_t ttbr0;
- uint32_t ttbr1;
- uint32_t sctlr;
- uint32_t actlr;
- uint32_t prrr;
- uint32_t nmrr;
+enum dump_reg {
+ DUMP_REG_FIRST,
+ DUMP_REG_FAR0 = DUMP_REG_FIRST,
+ DUMP_REG_FAR1,
+ DUMP_REG_PAR0,
+ DUMP_REG_PAR1,
+ DUMP_REG_FSR,
+ DUMP_REG_FSYNR0,
+ DUMP_REG_FSYNR1,
+ DUMP_REG_TTBR0,
+ DUMP_REG_TTBR1,
+ DUMP_REG_SCTLR,
+ DUMP_REG_ACTLR,
+ DUMP_REG_PRRR,
+ DUMP_REG_MAIR0 = DUMP_REG_PRRR,
+ DUMP_REG_NMRR,
+ DUMP_REG_MAIR1 = DUMP_REG_NMRR,
+ MAX_DUMP_REGS,
};
-void print_ctx_regs(struct msm_iommu_context_regs *regs);
+struct dump_regs_tbl {
+ /*
+ * To keep things context-bank-agnostic, we only store the CB
+ * register offset in `key'
+ */
+ unsigned long key;
+ const char *name;
+ int offset;
+};
+extern struct dump_regs_tbl dump_regs_tbl[MAX_DUMP_REGS];
+
+#define COMBINE_DUMP_REG(upper, lower) (((u64) upper << 32) | lower)
+
+struct msm_iommu_context_reg {
+ uint32_t val;
+ bool valid;
+};
+
+void print_ctx_regs(struct msm_iommu_context_reg regs[]);
/*
* Interrupt handler for the IOMMU context fault interrupt. Hooking the
diff --git a/arch/arm/mach-msm/include/mach/iommu_hw-v1.h b/arch/arm/mach-msm/include/mach/iommu_hw-v1.h
index 554f7e0..04cd441 100644
--- a/arch/arm/mach-msm/include/mach/iommu_hw-v1.h
+++ b/arch/arm/mach-msm/include/mach/iommu_hw-v1.h
@@ -19,6 +19,8 @@
#define GET_GLOBAL_REG(reg, base) (readl_relaxed((base) + (reg)))
#define GET_CTX_REG(reg, base, ctx) \
(readl_relaxed((base) + CTX_OFFSET + (reg) + ((ctx) << CTX_SHIFT)))
+#define GET_CTX_REG_L(reg, base, ctx) \
+ (readll_relaxed((base) + CTX_OFFSET + (reg) + ((ctx) << CTX_SHIFT)))
#define SET_GLOBAL_REG(reg, base, val) writel_relaxed((val), ((base) + (reg)))
@@ -93,6 +95,8 @@
#define SET_NSCR0(b, v) SET_GLOBAL_REG(NSCR0, (b), (v))
#define SET_NSCR2(b, v) SET_GLOBAL_REG(NSCR2, (b), (v))
#define SET_NSACR(b, v) SET_GLOBAL_REG(NSACR, (b), (v))
+#define SET_NSGFAR(b, v) SET_GLOBAL_REG(NSGFAR, (b), (v))
+#define SET_NSGFSRRESTORE(b, v) SET_GLOBAL_REG(NSGFSRRESTORE, (b), (v))
#define SET_PMCR(b, v) SET_GLOBAL_REG(PMCR, (b), (v))
#define SET_SMR_N(b, N, v) SET_GLOBAL_REG_N(SMR, N, (b), (v))
#define SET_S2CR_N(b, N, v) SET_GLOBAL_REG_N(S2CR, N, (b), (v))
@@ -194,7 +198,7 @@
#define GET_CONTEXTIDR(b, c) GET_CTX_REG(CB_CONTEXTIDR, (b), (c))
#define GET_PRRR(b, c) GET_CTX_REG(CB_PRRR, (b), (c))
#define GET_NMRR(b, c) GET_CTX_REG(CB_NMRR, (b), (c))
-#define GET_PAR(b, c) GET_CTX_REG(CB_PAR, (b), (c))
+#define GET_PAR(b, c) GET_CTX_REG_L(CB_PAR, (b), (c))
#define GET_FSR(b, c) GET_CTX_REG(CB_FSR, (b), (c))
#define GET_FSRRESTORE(b, c) GET_CTX_REG(CB_FSRRESTORE, (b), (c))
#define GET_FAR(b, c) GET_CTX_REG(CB_FAR, (b), (c))
@@ -215,26 +219,34 @@
#define GET_ATSR(b, c) GET_CTX_REG(CB_ATSR, (b), (c))
/* Global Register field setters / getters */
-/* Configuration Register: CR0 */
+/* Configuration Register: CR0/NSCR0 */
#define SET_CR0_NSCFG(b, v) SET_GLOBAL_FIELD(b, CR0, NSCFG, v)
#define SET_CR0_WACFG(b, v) SET_GLOBAL_FIELD(b, CR0, WACFG, v)
#define SET_CR0_RACFG(b, v) SET_GLOBAL_FIELD(b, CR0, RACFG, v)
#define SET_CR0_SHCFG(b, v) SET_GLOBAL_FIELD(b, CR0, SHCFG, v)
#define SET_CR0_SMCFCFG(b, v) SET_GLOBAL_FIELD(b, CR0, SMCFCFG, v)
+#define SET_NSCR0_SMCFCFG(b, v) SET_GLOBAL_FIELD(b, NSCR0, SMCFCFG, v)
#define SET_CR0_MTCFG(b, v) SET_GLOBAL_FIELD(b, CR0, MTCFG, v)
#define SET_CR0_BSU(b, v) SET_GLOBAL_FIELD(b, CR0, BSU, v)
#define SET_CR0_FB(b, v) SET_GLOBAL_FIELD(b, CR0, FB, v)
#define SET_CR0_PTM(b, v) SET_GLOBAL_FIELD(b, CR0, PTM, v)
#define SET_CR0_VMIDPNE(b, v) SET_GLOBAL_FIELD(b, CR0, VMIDPNE, v)
#define SET_CR0_USFCFG(b, v) SET_GLOBAL_FIELD(b, CR0, USFCFG, v)
+#define SET_NSCR0_USFCFG(b, v) SET_GLOBAL_FIELD(b, NSCR0, USFCFG, v)
#define SET_CR0_GSE(b, v) SET_GLOBAL_FIELD(b, CR0, GSE, v)
#define SET_CR0_STALLD(b, v) SET_GLOBAL_FIELD(b, CR0, STALLD, v)
+#define SET_NSCR0_STALLD(b, v) SET_GLOBAL_FIELD(b, NSCR0, STALLD, v)
#define SET_CR0_TRANSIENTCFG(b, v) SET_GLOBAL_FIELD(b, CR0, TRANSIENTCFG, v)
#define SET_CR0_GCFGFIE(b, v) SET_GLOBAL_FIELD(b, CR0, GCFGFIE, v)
+#define SET_NSCR0_GCFGFIE(b, v) SET_GLOBAL_FIELD(b, NSCR0, GCFGFIE, v)
#define SET_CR0_GCFGFRE(b, v) SET_GLOBAL_FIELD(b, CR0, GCFGFRE, v)
+#define SET_NSCR0_GCFGFRE(b, v) SET_GLOBAL_FIELD(b, NSCR0, GCFGFRE, v)
#define SET_CR0_GFIE(b, v) SET_GLOBAL_FIELD(b, CR0, GFIE, v)
+#define SET_NSCR0_GFIE(b, v) SET_GLOBAL_FIELD(b, NSCR0, GFIE, v)
#define SET_CR0_GFRE(b, v) SET_GLOBAL_FIELD(b, CR0, GFRE, v)
+#define SET_NSCR0_GFRE(b, v) SET_GLOBAL_FIELD(b, NSCR0, GFRE, v)
#define SET_CR0_CLIENTPD(b, v) SET_GLOBAL_FIELD(b, CR0, CLIENTPD, v)
+#define SET_NSCR0_CLIENTPD(b, v) SET_GLOBAL_FIELD(b, NSCR0, CLIENTPD, v)
#define GET_CR0_NSCFG(b) GET_GLOBAL_FIELD(b, CR0, NSCFG)
#define GET_CR0_WACFG(b) GET_GLOBAL_FIELD(b, CR0, WACFG)
@@ -949,6 +961,8 @@
#define NSCR0 (0x0400)
#define NSCR2 (0x0408)
#define NSACR (0x0410)
+#define NSGFAR (0x0440)
+#define NSGFSRRESTORE (0x044C)
#define SMR (0x0800)
#define S2CR (0x0C00)
@@ -1295,6 +1309,7 @@
#define CB_PAR_TF (CB_PAR_TF_MASK << CB_PAR_TF_SHIFT)
#define CB_PAR_AFF (CB_PAR_AFF_MASK << CB_PAR_AFF_SHIFT)
#define CB_PAR_PF (CB_PAR_PF_MASK << CB_PAR_PF_SHIFT)
+#define CB_PAR_EF (CB_PAR_EF_MASK << CB_PAR_EF_SHIFT)
#define CB_PAR_TLBMCF (CB_PAR_TLBMCF_MASK << CB_PAR_TLBMCF_SHIFT)
#define CB_PAR_TLBLKF (CB_PAR_TLBLKF_MASK << CB_PAR_TLBLKF_SHIFT)
#define CB_PAR_ATOT (CB_PAR_ATOT_MASK << CB_PAR_ATOT_SHIFT)
@@ -1400,6 +1415,7 @@
#define CR0_RACFG_MASK 0x03
#define CR0_SHCFG_MASK 0x03
#define CR0_SMCFCFG_MASK 0x01
+#define NSCR0_SMCFCFG_MASK 0x01
#define CR0_MTCFG_MASK 0x01
#define CR0_MEMATTR_MASK 0x0F
#define CR0_BSU_MASK 0x03
@@ -1407,14 +1423,21 @@
#define CR0_PTM_MASK 0x01
#define CR0_VMIDPNE_MASK 0x01
#define CR0_USFCFG_MASK 0x01
+#define NSCR0_USFCFG_MASK 0x01
#define CR0_GSE_MASK 0x01
#define CR0_STALLD_MASK 0x01
+#define NSCR0_STALLD_MASK 0x01
#define CR0_TRANSIENTCFG_MASK 0x03
#define CR0_GCFGFIE_MASK 0x01
+#define NSCR0_GCFGFIE_MASK 0x01
#define CR0_GCFGFRE_MASK 0x01
+#define NSCR0_GCFGFRE_MASK 0x01
#define CR0_GFIE_MASK 0x01
+#define NSCR0_GFIE_MASK 0x01
#define CR0_GFRE_MASK 0x01
+#define NSCR0_GFRE_MASK 0x01
#define CR0_CLIENTPD_MASK 0x01
+#define NSCR0_CLIENTPD_MASK 0x01
/* Configuration Register 2 */
#define CR2_BPVMID_MASK 0xFF
@@ -1662,11 +1685,12 @@
#define CB_PAR_TF_MASK 0x01
#define CB_PAR_AFF_MASK 0x01
#define CB_PAR_PF_MASK 0x01
+#define CB_PAR_EF_MASK 0x01
#define CB_PAR_TLBMCF_MASK 0x01
#define CB_PAR_TLBLKF_MASK 0x01
-#define CB_PAR_ATOT_MASK 0x01
-#define CB_PAR_PLVL_MASK 0x03
-#define CB_PAR_STAGE_MASK 0x01
+#define CB_PAR_ATOT_MASK 0x01ULL
+#define CB_PAR_PLVL_MASK 0x03ULL
+#define CB_PAR_STAGE_MASK 0x01ULL
/* Primary Region Remap Register: CB_PRRR */
#define CB_PRRR_TR0_MASK 0x03
@@ -1764,6 +1788,7 @@
#define CR0_RACFG_SHIFT 24
#define CR0_SHCFG_SHIFT 22
#define CR0_SMCFCFG_SHIFT 21
+#define NSCR0_SMCFCFG_SHIFT 21
#define CR0_MTCFG_SHIFT 20
#define CR0_MEMATTR_SHIFT 16
#define CR0_BSU_SHIFT 14
@@ -1771,14 +1796,21 @@
#define CR0_PTM_SHIFT 12
#define CR0_VMIDPNE_SHIFT 11
#define CR0_USFCFG_SHIFT 10
+#define NSCR0_USFCFG_SHIFT 10
#define CR0_GSE_SHIFT 9
#define CR0_STALLD_SHIFT 8
+#define NSCR0_STALLD_SHIFT 8
#define CR0_TRANSIENTCFG_SHIFT 6
#define CR0_GCFGFIE_SHIFT 5
+#define NSCR0_GCFGFIE_SHIFT 5
#define CR0_GCFGFRE_SHIFT 4
+#define NSCR0_GCFGFRE_SHIFT 4
#define CR0_GFIE_SHIFT 2
+#define NSCR0_GFIE_SHIFT 2
#define CR0_GFRE_SHIFT 1
+#define NSCR0_GFRE_SHIFT 1
#define CR0_CLIENTPD_SHIFT 0
+#define NSCR0_CLIENTPD_SHIFT 0
/* Configuration Register: CR2 */
#define CR2_BPVMID_SHIFT 0
@@ -2024,11 +2056,12 @@
#define CB_PAR_TF_SHIFT 1
#define CB_PAR_AFF_SHIFT 2
#define CB_PAR_PF_SHIFT 3
+#define CB_PAR_EF_SHIFT 4
#define CB_PAR_TLBMCF_SHIFT 5
#define CB_PAR_TLBLKF_SHIFT 6
#define CB_PAR_ATOT_SHIFT 31
-#define CB_PAR_PLVL_SHIFT 0
-#define CB_PAR_STAGE_SHIFT 3
+#define CB_PAR_PLVL_SHIFT 32
+#define CB_PAR_STAGE_SHIFT 35
/* Primary Region Remap Register: CB_PRRR */
#define CB_PRRR_TR0_SHIFT 0
diff --git a/arch/arm/mach-msm/include/mach/msm_iomap-8226.h b/arch/arm/mach-msm/include/mach/msm_iomap-8226.h
index ac3e912..327c1ea 100644
--- a/arch/arm/mach-msm/include/mach/msm_iomap-8226.h
+++ b/arch/arm/mach-msm/include/mach/msm_iomap-8226.h
@@ -38,8 +38,8 @@
#define MSM8226_MPM2_PSHOLD_SIZE SZ_4K
#ifdef CONFIG_DEBUG_MSM8226_UART
-#define MSM_DEBUG_UART_BASE IOMEM(0xFA71E000)
-#define MSM_DEBUG_UART_PHYS 0xF991E000
+#define MSM_DEBUG_UART_BASE IOMEM(0xFA71F000)
+#define MSM_DEBUG_UART_PHYS 0xF991F000
#endif
#endif
diff --git a/arch/arm/mach-msm/include/mach/msm_ipc_router.h b/arch/arm/mach-msm/include/mach/msm_ipc_router.h
index a87380c..f5f1954 100644
--- a/arch/arm/mach-msm/include/mach/msm_ipc_router.h
+++ b/arch/arm/mach-msm/include/mach/msm_ipc_router.h
@@ -29,6 +29,7 @@
enum msm_ipc_router_event {
MSM_IPC_ROUTER_READ_CB = 0,
MSM_IPC_ROUTER_WRITE_DONE,
+ MSM_IPC_ROUTER_RESUME_TX,
};
struct comm_mode_info {
diff --git a/arch/arm/mach-msm/include/mach/msm_qmi_interface.h b/arch/arm/mach-msm/include/mach/msm_qmi_interface.h
index 11867f3..1641e8c 100644
--- a/arch/arm/mach-msm/include/mach/msm_qmi_interface.h
+++ b/arch/arm/mach-msm/include/mach/msm_qmi_interface.h
@@ -1,4 +1,4 @@
-/* Copyright (c) 2012, The Linux Foundation. All rights reserved.
+/* Copyright (c) 2012-2013, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -20,6 +20,7 @@
#include <linux/socket.h>
#include <linux/gfp.h>
#include <linux/qmi_encdec.h>
+#include <linux/workqueue.h>
#define QMI_COMMON_TLV_TYPE 0
@@ -45,6 +46,8 @@
void *ind_cb_priv;
int handle_reset;
wait_queue_head_t reset_waitq;
+ struct list_head pending_txn_list;
+ struct delayed_work resume_tx_work;
};
enum qmi_result_type_v01 {
@@ -153,7 +156,8 @@
void *resp, unsigned int resp_len,
void (*resp_cb)(struct qmi_handle *handle,
unsigned int msg_id, void *msg,
- void *resp_cb_data),
+ void *resp_cb_data,
+ int stat),
void *resp_cb_data);
/**
diff --git a/arch/arm/mach-msm/include/mach/msm_spi.h b/arch/arm/mach-msm/include/mach/msm_spi.h
index ab5271f..608927c 100644
--- a/arch/arm/mach-msm/include/mach/msm_spi.h
+++ b/arch/arm/mach-msm/include/mach/msm_spi.h
@@ -1,4 +1,4 @@
-/* Copyright (c) 2008-2009, 2012, The Linux Foundation. All rights reserved.
+/* Copyright (c) 2008-2009, 2012-2013 The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -14,8 +14,19 @@
* SPI driver for Qualcomm MSM platforms.
*/
+/**
+ * msm_spi_platform_data: msm spi-controller's configuration data
+ *
+ * @active_only when set, votes when system active and removes the vote when
+ * system goes idle (optimises for performance). When unset, voting using
+ * runtime pm (optimizes for power).
+ * @master_id master id number of the controller's wrapper (BLSP or GSBI).
+ * When zero, clock path voting is disabled.
+ */
struct msm_spi_platform_data {
u32 max_clock_speed;
+ bool active_only;
+ u32 master_id;
int (*gpio_config)(void);
void (*gpio_release)(void);
int (*dma_config)(void);
diff --git a/arch/arm/mach-msm/include/mach/qdsp6v2/apr_us.h b/arch/arm/mach-msm/include/mach/qdsp6v2/apr_us.h
index 2cfb5ac..661d496 100644
--- a/arch/arm/mach-msm/include/mach/qdsp6v2/apr_us.h
+++ b/arch/arm/mach-msm/include/mach/qdsp6v2/apr_us.h
@@ -1,4 +1,4 @@
-/* Copyright (c) 2011-2012, The Linux Foundation. All rights reserved.
+/* Copyright (c) 2011-2013, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -53,6 +53,12 @@
/* Encoder/decoder configuration block */
#define USM_PARAM_ID_ENCDEC_ENC_CFG_BLK 0x0001230D
+/* Max number of static located ports (bytes) */
+#define USM_MAX_PORT_NUMBER 8
+
+/* Max number of static located transparent data (bytes) */
+#define USM_MAX_CFG_DATA_SIZE 100
+
/* Parameter structures used in USM_STREAM_CMD_SET_ENCDEC_PARAM command */
/* common declarations */
struct usm_cfg_common {
@@ -60,26 +66,7 @@
u16 bits_per_sample;
u32 sample_rate;
u32 dev_id;
- u32 data_map;
-} __packed;
-
-/* Max number of static located transparent data (bytes) */
-#define USM_MAX_CFG_DATA_SIZE 100
-struct usm_encode_cfg_blk {
- u32 frames_per_buf;
- u32 format_id;
- /* <cfg_size> = sizeof(usm_cfg_common)+|tarnsp_data| */
- u32 cfg_size;
- struct usm_cfg_common cfg_common;
- /* Transparent configuration data for specific encoder */
- u8 transp_data[USM_MAX_CFG_DATA_SIZE];
-} __packed;
-
-struct usm_stream_cmd_encdec_cfg_blk {
- struct apr_hdr hdr;
- u32 param_id;
- u32 param_size;
- struct usm_encode_cfg_blk enc_blk;
+ u8 data_map[USM_MAX_PORT_NUMBER];
} __packed;
struct us_encdec_cfg {
@@ -89,16 +76,6 @@
u8 *params;
} __packed;
-struct usm_stream_media_format_update {
- struct apr_hdr hdr;
- u32 format_id;
- /* <cfg_size> = sizeof(usm_cfg_common)+|tarnsp_data| */
- u32 cfg_size;
- struct usm_cfg_common cfg_common;
- /* Transparent configuration data for specific encoder */
- u8 transp_data[USM_MAX_CFG_DATA_SIZE];
-} __packed;
-
/* Start/stop US signal detection */
#define USM_SESSION_CMD_SIGNAL_DETECT_MODE 0x00012719
diff --git a/arch/arm/mach-msm/include/mach/qdsp6v2/apr_us_a.h b/arch/arm/mach-msm/include/mach/qdsp6v2/apr_us_a.h
index 4008698..782f3ae 100644
--- a/arch/arm/mach-msm/include/mach/qdsp6v2/apr_us_a.h
+++ b/arch/arm/mach-msm/include/mach/qdsp6v2/apr_us_a.h
@@ -1,4 +1,4 @@
-/* Copyright (c) 2012, The Linux Foundation. All rights reserved.
+/* Copyright (c) 2012-2013, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -56,4 +56,43 @@
#define USM_DATA_EVENT_WRITE_DONE 0x00011274
+/* Max number of static located ports (bytes) */
+#define USM_MAX_PORT_NUMBER_A 4
+
+/* Parameter structures used in USM_STREAM_CMD_SET_ENCDEC_PARAM command */
+/* common declarations */
+struct usm_cfg_common_a {
+ u16 ch_cfg;
+ u16 bits_per_sample;
+ u32 sample_rate;
+ u32 dev_id;
+ u8 data_map[USM_MAX_PORT_NUMBER_A];
+} __packed;
+
+struct usm_stream_media_format_update {
+ struct apr_hdr hdr;
+ u32 format_id;
+ /* <cfg_size> = sizeof(usm_cfg_common)+|transp_data| */
+ u32 cfg_size;
+ struct usm_cfg_common_a cfg_common;
+ /* Transparent configuration data for specific encoder */
+ u8 transp_data[USM_MAX_CFG_DATA_SIZE];
+} __packed;
+
+struct usm_encode_cfg_blk {
+ u32 frames_per_buf;
+ u32 format_id;
+ /* <cfg_size> = sizeof(usm_cfg_common)+|transp_data| */
+ u32 cfg_size;
+ struct usm_cfg_common_a cfg_common;
+ /* Transparent configuration data for specific encoder */
+ u8 transp_data[USM_MAX_CFG_DATA_SIZE];
+} __packed;
+
+struct usm_stream_cmd_encdec_cfg_blk {
+ struct apr_hdr hdr;
+ u32 param_id;
+ u32 param_size;
+ struct usm_encode_cfg_blk enc_blk;
+} __packed;
#endif /* __APR_US_A_H__ */
diff --git a/arch/arm/mach-msm/include/mach/qdsp6v2/apr_us_b.h b/arch/arm/mach-msm/include/mach/qdsp6v2/apr_us_b.h
index 11de6ef..26e8369 100644
--- a/arch/arm/mach-msm/include/mach/qdsp6v2/apr_us_b.h
+++ b/arch/arm/mach-msm/include/mach/qdsp6v2/apr_us_b.h
@@ -67,4 +67,30 @@
#define USM_DATA_EVENT_WRITE_DONE 0x00012727
+struct usm_stream_media_format_update {
+ struct apr_hdr hdr;
+ u32 format_id;
+ /* <cfg_size> = sizeof(usm_cfg_common)+|transp_data| */
+ u32 cfg_size;
+ struct usm_cfg_common cfg_common;
+ /* Transparent configuration data for specific encoder */
+ u8 transp_data[USM_MAX_CFG_DATA_SIZE];
+} __packed;
+
+struct usm_encode_cfg_blk {
+ u32 frames_per_buf;
+ u32 format_id;
+ /* <cfg_size> = sizeof(usm_cfg_common)+|transp_data| */
+ u32 cfg_size;
+ struct usm_cfg_common cfg_common;
+ /* Transparent configuration data for specific encoder */
+ u8 transp_data[USM_MAX_CFG_DATA_SIZE];
+} __packed;
+
+struct usm_stream_cmd_encdec_cfg_blk {
+ struct apr_hdr hdr;
+ u32 param_id;
+ u32 param_size;
+ struct usm_encode_cfg_blk enc_blk;
+} __packed;
#endif /* __APR_US_B_H__ */
diff --git a/arch/arm/mach-msm/include/mach/qseecomi.h b/arch/arm/mach-msm/include/mach/qseecomi.h
index 3a997be..a4021d4 100644
--- a/arch/arm/mach-msm/include/mach/qseecomi.h
+++ b/arch/arm/mach-msm/include/mach/qseecomi.h
@@ -18,13 +18,13 @@
#define QSEECOM_KEY_ID_SIZE 32
-#define QSEOS_RESULT_FAIL_LOAD_KS -48
-#define QSEOS_RESULT_FAIL_SAVE_KS -49
-#define QSEOS_RESULT_FAIL_MAX_KEYS -50
-#define QSEOS_RESULT_FAIL_KEY_ID_EXISTS -51
-#define QSEOS_RESULT_FAIL_KEY_ID_DNE -52
-#define QSEOS_RESULT_FAIL_KS_OP -53
-#define QSEOS_RESULT_FAIL_CE_PIPE_INVALID -54
+#define QSEOS_RESULT_FAIL_LOAD_KS -57
+#define QSEOS_RESULT_FAIL_SAVE_KS -58
+#define QSEOS_RESULT_FAIL_MAX_KEYS -59
+#define QSEOS_RESULT_FAIL_KEY_ID_EXISTS -60
+#define QSEOS_RESULT_FAIL_KEY_ID_DNE -61
+#define QSEOS_RESULT_FAIL_KS_OP -62
+#define QSEOS_RESULT_FAIL_CE_PIPE_INVALID -63
enum qseecom_command_scm_resp_type {
QSEOS_APP_ID = 0xEE01,
diff --git a/arch/arm/mach-msm/include/mach/socinfo.h b/arch/arm/mach-msm/include/mach/socinfo.h
index 5aaab18..d52686c 100644
--- a/arch/arm/mach-msm/include/mach/socinfo.h
+++ b/arch/arm/mach-msm/include/mach/socinfo.h
@@ -41,6 +41,7 @@
#define of_board_is_cdp() of_machine_is_compatible("qcom,cdp")
#define of_board_is_mtp() of_machine_is_compatible("qcom,mtp")
#define of_board_is_qrd() of_machine_is_compatible("qcom,qrd")
+#define of_board_is_xpm() of_machine_is_compatible("qcom,xpm")
#define machine_is_msm8974() of_machine_is_compatible("qcom,msm8974")
#define machine_is_msm9625() of_machine_is_compatible("qcom,msm9625")
@@ -69,6 +70,7 @@
#define of_board_is_cdp() 0
#define of_board_is_mtp() 0
#define of_board_is_qrd() 0
+#define of_board_is_xpm() 0
#define machine_is_msm8974() 0
#define machine_is_msm9625() 0
diff --git a/arch/arm/mach-msm/include/mach/usb_bam.h b/arch/arm/mach-msm/include/mach/usb_bam.h
index bc76f56..b2dd49c 100644
--- a/arch/arm/mach-msm/include/mach/usb_bam.h
+++ b/arch/arm/mach-msm/include/mach/usb_bam.h
@@ -198,14 +198,6 @@
struct usb_bam_connect_ipa_params *ipa_params);
/**
- * Wait for Consumer granted from Resource Manager.
- *
- * @ipa_params - in/out parameters
- *
- */
-void usb_bam_wait_for_cons_granted(
- struct usb_bam_connect_ipa_params *ipa_params);
-/**
* Register a wakeup callback from peer BAM.
*
* @idx - Connection index.
@@ -298,7 +290,7 @@
* Resets the USB BAM that has A2 pipes
*
*/
-int usb_bam_a2_reset(void);
+int usb_bam_a2_reset(bool to_reconnect);
/**
* Indicates if the client of the USB BAM is ready to start
@@ -308,6 +300,14 @@
*
*/
int usb_bam_client_ready(bool ready);
+
+/**
+* Returns upon reset completion if reset is in progress
+* immediately otherwise.
+*
+*/
+void usb_bam_reset_complete(void);
+
/**
* Returns qdss index from the connections array.
*
@@ -403,7 +403,7 @@
return -ENODEV;
}
-static inline int usb_bam_a2_reset(void)
+static inline int usb_bam_a2_reset(bool to_reconnect)
{
return -ENODEV;
}
@@ -413,6 +413,11 @@
return -ENODEV;
}
+static inline void usb_bam_reset_complete(void)
+{
+ return;
+}
+
static inline int usb_bam_get_qdss_idx(u8 num)
{
return -ENODEV;
diff --git a/arch/arm/mach-msm/include/mach/usb_bridge.h b/arch/arm/mach-msm/include/mach/usb_bridge.h
index c62cf01..b3b7d71 100644
--- a/arch/arm/mach-msm/include/mach/usb_bridge.h
+++ b/arch/arm/mach-msm/include/mach/usb_bridge.h
@@ -1,4 +1,4 @@
-/* Copyright (c) 2011-2012, The Linux Foundation. All rights reserved.
+/* Copyright (c) 2011-2013, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -17,10 +17,8 @@
#include <linux/netdevice.h>
#include <linux/usb.h>
-/* bridge device 0: DUN
- * bridge device 1 : Tethered RMNET
- */
-#define MAX_BRIDGE_DEVICES 2
+#define MAX_BRIDGE_DEVICES 4
+#define BRIDGE_NAME_MAX_LEN 20
struct bridge_ops {
int (*send_pkt)(void *, void *, size_t actual);
@@ -37,11 +35,12 @@
/* context of the gadget port using bridge driver */
void *ctx;
- /* bridge device array index mapped to the gadget port array index.
- * data bridge[ch_id] <-- bridge --> gadget port[ch_id]
- */
+ /*to maps bridge driver instance*/
unsigned int ch_id;
+ /*to match against bridge xport name to get bridge driver instance*/
+ char *name;
+
/* flow control bits */
unsigned long flags;
@@ -101,7 +100,10 @@
int data_bridge_unthrottle_rx(unsigned int);
/* defined in control bridge */
-int ctrl_bridge_probe(struct usb_interface *, struct usb_host_endpoint *, int);
+int ctrl_bridge_init(void);
+void ctrl_bridge_exit(void);
+int ctrl_bridge_probe(struct usb_interface *, struct usb_host_endpoint *,
+ char *, int);
void ctrl_bridge_disconnect(unsigned int);
int ctrl_bridge_resume(unsigned int);
int ctrl_bridge_suspend(unsigned int);
diff --git a/arch/arm/mach-msm/include/mach/usb_gadget_xport.h b/arch/arm/mach-msm/include/mach/usb_gadget_xport.h
index a183f0e..634a4dc 100644
--- a/arch/arm/mach-msm/include/mach/usb_gadget_xport.h
+++ b/arch/arm/mach-msm/include/mach/usb_gadget_xport.h
@@ -89,8 +89,8 @@
USB_GADGET_RMNET,
};
-#define NUM_RMNET_HSIC_PORTS 1
-#define NUM_DUN_HSIC_PORTS 1
+#define NUM_RMNET_HSIC_PORTS 2
+#define NUM_DUN_HSIC_PORTS 2
#define NUM_PORTS (NUM_RMNET_HSIC_PORTS \
+ NUM_DUN_HSIC_PORTS)
@@ -102,9 +102,11 @@
int ghsic_ctrl_connect(void *, int);
void ghsic_ctrl_disconnect(void *, int);
int ghsic_ctrl_setup(unsigned int, enum gadget_type);
+void ghsic_ctrl_set_port_name(const char *, const char *);
int ghsic_data_connect(void *, int);
void ghsic_data_disconnect(void *, int);
int ghsic_data_setup(unsigned int, enum gadget_type);
+void ghsic_data_set_port_name(const char *, const char *);
int ghsuart_ctrl_connect(void *, int);
void ghsuart_ctrl_disconnect(void *, int);
diff --git a/arch/arm/mach-msm/ipc_router.c b/arch/arm/mach-msm/ipc_router.c
index 841ccf3..32589f1 100644
--- a/arch/arm/mach-msm/ipc_router.c
+++ b/arch/arm/mach-msm/ipc_router.c
@@ -192,8 +192,6 @@
static uint32_t next_port_id;
static DEFINE_MUTEX(next_port_id_lock_lha1);
-static atomic_t pending_close_count = ATOMIC_INIT(0);
-static wait_queue_head_t subsystem_restart_wait;
static struct workqueue_struct *msm_ipc_router_workqueue;
enum {
@@ -737,8 +735,14 @@
&rport_ptr->resume_tx_port_list, list) {
local_port =
msm_ipc_router_lookup_local_port(rtx_port->port_id);
- if (local_port)
+ if (local_port && local_port->notify)
+ local_port->notify(MSM_IPC_ROUTER_RESUME_TX,
+ local_port->priv);
+ else if (local_port)
post_pkt_to_port(local_port, pkt, 1);
+ else
+ pr_err("%s: Local Port %d not Found",
+ __func__, rtx_port->port_id);
list_del(&rtx_port->list);
kfree(rtx_port);
}
@@ -2218,6 +2222,8 @@
}
ret = msm_ipc_router_send_to(src, out_skb_head, dest);
+ if (ret == -EAGAIN)
+ return ret;
if (ret < 0) {
pr_err("%s: msm_ipc_router_send_to failed - ret: %d\n",
__func__, ret);
@@ -2258,6 +2264,29 @@
return ret;
}
+/**
+ * msm_ipc_router_recv_from() - Recieve messages destined to a local port.
+ * @port_ptr: Pointer to the local port
+ * @data : Pointer to the socket buffer head
+ * @src: Pointer to local port address
+ * @timeout: < 0 timeout indicates infinite wait till a message arrives.
+ * > 0 timeout indicates the wait time.
+ * 0 indicates that we do not wait.
+ * @return: = Number of bytes read(On successful read operation).
+ * = 0 (If there are no pending messages and timeout is 0).
+ * = -EINVAL (If either of the arguments, port_ptr or data is invalid)
+ * = -EFAULT (If there are no pending messages when timeout is > 0
+ * and the wait_event_interruptible_timeout has returned value > 0)
+ * = -ERESTARTSYS (If there are no pending messages when timeout
+ * is < 0 and wait_event_interruptible was interrupted by a signal)
+ *
+ * This function reads the messages that are destined for a local port. It
+ * is used by modules that exist with-in the kernel and use IPC Router for
+ * transport. The function checks if there are any messages that are already
+ * received. If yes, it reads them, else it waits as per the timeout value.
+ * On a successful read, the return value of the function indicates the number
+ * of bytes that are read.
+ */
int msm_ipc_router_recv_from(struct msm_ipc_port *port_ptr,
struct sk_buff_head **data,
struct msm_ipc_addr *src,
@@ -2291,7 +2320,7 @@
return -EFAULT;
}
if (timeout == 0)
- return -ETIMEDOUT;
+ return 0;
mutex_lock(&port_ptr->port_rx_q_lock_lhb3);
}
mutex_unlock(&port_ptr->port_rx_q_lock_lhb3);
@@ -2326,7 +2355,11 @@
struct sk_buff_head *in_skb_head;
int ret;
- ret = msm_ipc_router_recv_from(port_ptr, &in_skb_head, src, -1);
+ ret = msm_ipc_router_recv_from(port_ptr, &in_skb_head, src, 0);
+
+ if (ret == 0)
+ return -ENOMSG;
+
if (ret < 0) {
pr_err("%s: msm_ipc_router_recv_from failed - ret: %d\n",
__func__, ret);
@@ -2855,10 +2888,7 @@
msm_ipc_cleanup_routing_table(xprt_work->xprt->priv);
msm_ipc_router_remove_xprt(xprt_work->xprt);
-
- if (atomic_dec_return(&pending_close_count) == 0)
- wake_up(&subsystem_restart_wait);
-
+ xprt_work->xprt->sft_close_done(xprt_work->xprt);
kfree(xprt_work);
}
@@ -2897,7 +2927,6 @@
case IPC_ROUTER_XPRT_EVENT_CLOSE:
D("close event for '%s'\n", xprt->name);
- atomic_inc(&pending_close_count);
xprt_work = kmalloc(sizeof(struct msm_ipc_router_xprt_work),
GFP_ATOMIC);
if (xprt_work) {
@@ -2930,45 +2959,6 @@
queue_work(xprt_info->workqueue, &xprt_info->read_data);
}
-static int modem_restart_notifier_cb(struct notifier_block *this,
- unsigned long code,
- void *data);
-static struct notifier_block msm_ipc_router_nb = {
- .notifier_call = modem_restart_notifier_cb,
-};
-
-static int modem_restart_notifier_cb(struct notifier_block *this,
- unsigned long code,
- void *data)
-{
- switch (code) {
- case SUBSYS_BEFORE_SHUTDOWN:
- D("%s: SUBSYS_BEFORE_SHUTDOWN\n", __func__);
- break;
-
- case SUBSYS_BEFORE_POWERUP:
- D("%s: waiting for RPC restart to complete\n", __func__);
- wait_event(subsystem_restart_wait,
- atomic_read(&pending_close_count) == 0);
- D("%s: finished restart wait\n", __func__);
- break;
-
- default:
- break;
- }
-
- return NOTIFY_DONE;
-}
-
-static void *restart_notifier_handle;
-static __init int msm_ipc_router_modem_restart_late_init(void)
-{
- restart_notifier_handle = subsys_notif_register_notifier("modem",
- &msm_ipc_router_nb);
- return 0;
-}
-late_initcall(msm_ipc_router_modem_restart_late_init);
-
static int __init msm_ipc_router_init(void)
{
int i, ret;
@@ -3003,7 +2993,6 @@
}
up_write(&routing_table_lock_lha3);
- init_waitqueue_head(&subsystem_restart_wait);
ret = msm_ipc_router_init_sockets();
if (ret < 0)
pr_err("%s: Init sockets failed\n", __func__);
diff --git a/arch/arm/mach-msm/ipc_router.h b/arch/arm/mach-msm/ipc_router.h
index 32832dd..55aeade 100644
--- a/arch/arm/mach-msm/ipc_router.h
+++ b/arch/arm/mach-msm/ipc_router.h
@@ -122,6 +122,7 @@
int (*write)(void *data, uint32_t len,
struct msm_ipc_router_xprt *xprt);
int (*close)(struct msm_ipc_router_xprt *xprt);
+ void (*sft_close_done)(struct msm_ipc_router_xprt *xprt);
};
void msm_ipc_router_xprt_notify(struct msm_ipc_router_xprt *xprt,
diff --git a/arch/arm/mach-msm/ipc_router_smd_xprt.c b/arch/arm/mach-msm/ipc_router_smd_xprt.c
index b2ec816..d6a3e03 100644
--- a/arch/arm/mach-msm/ipc_router_smd_xprt.c
+++ b/arch/arm/mach-msm/ipc_router_smd_xprt.c
@@ -54,6 +54,7 @@
spinlock_t ss_reset_lock; /*Subsystem reset lock*/
int ss_reset;
void *pil;
+ struct completion sft_close_complete;
};
struct msm_ipc_router_smd_xprt_work {
@@ -217,6 +218,14 @@
return rc;
}
+static void smd_xprt_sft_close_done(struct msm_ipc_router_xprt *xprt)
+{
+ struct msm_ipc_router_smd_xprt *smd_xprtp =
+ container_of(xprt, struct msm_ipc_router_smd_xprt, xprt);
+
+ complete_all(&smd_xprtp->sft_close_complete);
+}
+
static void smd_xprt_read_data(struct work_struct *work)
{
int pkt_size, sz_read, sz;
@@ -322,7 +331,14 @@
{
struct msm_ipc_router_smd_xprt_work *xprt_work =
container_of(work, struct msm_ipc_router_smd_xprt_work, work);
+ struct msm_ipc_router_smd_xprt *smd_xprtp =
+ container_of(xprt_work->xprt,
+ struct msm_ipc_router_smd_xprt, xprt);
+ unsigned long flags;
+ spin_lock_irqsave(&smd_xprtp->ss_reset_lock, flags);
+ smd_xprtp->ss_reset = 0;
+ spin_unlock_irqrestore(&smd_xprtp->ss_reset_lock, flags);
msm_ipc_router_xprt_notify(xprt_work->xprt,
IPC_ROUTER_XPRT_EVENT_OPEN, NULL);
D("%s: Notified IPC Router of %s OPEN\n",
@@ -334,11 +350,16 @@
{
struct msm_ipc_router_smd_xprt_work *xprt_work =
container_of(work, struct msm_ipc_router_smd_xprt_work, work);
+ struct msm_ipc_router_smd_xprt *smd_xprtp =
+ container_of(xprt_work->xprt,
+ struct msm_ipc_router_smd_xprt, xprt);
+ init_completion(&smd_xprtp->sft_close_complete);
msm_ipc_router_xprt_notify(xprt_work->xprt,
IPC_ROUTER_XPRT_EVENT_CLOSE, NULL);
D("%s: Notified IPC Router of %s CLOSE\n",
__func__, xprt_work->xprt->name);
+ wait_for_completion(&smd_xprtp->sft_close_complete);
kfree(xprt_work);
}
@@ -362,9 +383,6 @@
break;
case SMD_EVENT_OPEN:
- spin_lock_irqsave(&smd_xprtp->ss_reset_lock, flags);
- smd_xprtp->ss_reset = 0;
- spin_unlock_irqrestore(&smd_xprtp->ss_reset_lock, flags);
xprt_work = kmalloc(sizeof(struct msm_ipc_router_smd_xprt_work),
GFP_ATOMIC);
if (!xprt_work) {
@@ -441,6 +459,7 @@
msm_ipc_router_smd_remote_write_avail;
smd_remote_xprt[id].xprt.write = msm_ipc_router_smd_remote_write;
smd_remote_xprt[id].xprt.close = msm_ipc_router_smd_remote_close;
+ smd_remote_xprt[id].xprt.sft_close_done = smd_xprt_sft_close_done;
smd_remote_xprt[id].xprt.priv = NULL;
init_waitqueue_head(&smd_remote_xprt[id].write_avail_wait_q);
diff --git a/arch/arm/mach-msm/krait-regulator.c b/arch/arm/mach-msm/krait-regulator.c
index 7c1b8d6..b30cba4 100644
--- a/arch/arm/mach-msm/krait-regulator.c
+++ b/arch/arm/mach-msm/krait-regulator.c
@@ -131,6 +131,15 @@
#define VREF_LDO_BIT_POS 0
#define VREF_LDO_MASK KRAIT_MASK(6, 0)
+#define PWR_GATE_SWITCH_MODE_POS 4
+#define PWR_GATE_SWITCH_MODE_MASK KRAIT_MASK(6, 4)
+
+#define PWR_GATE_SWITCH_MODE_PC 0
+#define PWR_GATE_SWITCH_MODE_LDO 1
+#define PWR_GATE_SWITCH_MODE_BHS 2
+#define PWR_GATE_SWITCH_MODE_DT 3
+#define PWR_GATE_SWITCH_MODE_RET 4
+
#define LDO_HDROOM_MIN 50000
#define LDO_HDROOM_MAX 250000
@@ -144,6 +153,10 @@
#define LDO_DELTA_MAX 100000
#define MSM_L2_SAW_PHYS 0xf9012000
+#define MSM_MDD_BASE_PHYS 0xf908a800
+
+#define KPSS_VERSION_2P0 0x20000000
+
/**
* struct pmic_gang_vreg -
* @name: the string used to represent the gang
@@ -580,35 +593,55 @@
if (kvreg->mode == HS_MODE)
return 0;
/* enable bhs */
- krait_masked_write(kvreg, APC_PWR_GATE_CTL, BHS_EN_MASK, BHS_EN_MASK);
- /* complete the above write before the delay */
- mb();
- /* wait for the bhs to settle */
- udelay(BHS_SETTLING_DELAY_US);
+ if (version > KPSS_VERSION_2P0) {
+ krait_masked_write(kvreg, APC_PWR_GATE_MODE,
+ PWR_GATE_SWITCH_MODE_MASK,
+ PWR_GATE_SWITCH_MODE_BHS << PWR_GATE_SWITCH_MODE_POS);
- /* Turn on BHS segments */
- krait_masked_write(kvreg, APC_PWR_GATE_CTL,
- BHS_SEG_EN_MASK, BHS_SEG_EN_DEFAULT << BHS_SEG_EN_BIT_POS);
+ /* complete the writes before the delay */
+ mb();
- /* complete the above write before the delay */
- mb();
+ /* wait for the bhs to settle */
+ udelay(BHS_SETTLING_DELAY_US);
+ } else {
+ /* enable bhs */
+ krait_masked_write(kvreg, APC_PWR_GATE_CTL,
+ BHS_EN_MASK, BHS_EN_MASK);
- /*
- * wait for the bhs to settle - note that
- * after the voltage has settled both BHS and LDO are supplying power
- * to the krait. This avoids glitches during switching
- */
- udelay(BHS_SETTLING_DELAY_US);
+ /* complete the above write before the delay */
+ mb();
- /*
- * enable ldo bypass - the krait is powered still by LDO since
- * LDO is enabled
- */
- krait_masked_write(kvreg, APC_PWR_GATE_CTL, LDO_BYP_MASK, LDO_BYP_MASK);
+ /* wait for the bhs to settle */
+ udelay(BHS_SETTLING_DELAY_US);
- /* disable ldo - only the BHS provides voltage to the cpu after this */
- krait_masked_write(kvreg, APC_PWR_GATE_CTL,
+ /* Turn on BHS segments */
+ krait_masked_write(kvreg, APC_PWR_GATE_CTL, BHS_SEG_EN_MASK,
+ BHS_SEG_EN_DEFAULT << BHS_SEG_EN_BIT_POS);
+
+ /* complete the above write before the delay */
+ mb();
+
+ /*
+ * wait for the bhs to settle - note that
+ * after the voltage has settled both BHS and LDO are supplying
+ * power to the krait. This avoids glitches during switching
+ */
+ udelay(BHS_SETTLING_DELAY_US);
+
+ /*
+ * enable ldo bypass - the krait is powered still by LDO since
+ * LDO is enabled
+ */
+ krait_masked_write(kvreg, APC_PWR_GATE_CTL,
+ LDO_BYP_MASK, LDO_BYP_MASK);
+
+ /*
+ * disable ldo - only the BHS provides voltage to
+ * the cpu after this
+ */
+ krait_masked_write(kvreg, APC_PWR_GATE_CTL,
LDO_PWR_DWN_MASK, LDO_PWR_DWN_MASK);
+ }
kvreg->mode = HS_MODE;
pr_debug("%s using BHS\n", kvreg->name);
@@ -629,27 +662,39 @@
switch_to_using_hs(kvreg);
set_krait_ldo_uv(kvreg, kvreg->uV - kvreg->ldo_delta_uV);
+ if (version > KPSS_VERSION_2P0) {
+ krait_masked_write(kvreg, APC_PWR_GATE_MODE,
+ PWR_GATE_SWITCH_MODE_MASK,
+ PWR_GATE_SWITCH_MODE_LDO << PWR_GATE_SWITCH_MODE_POS);
- /*
- * enable ldo - note that both LDO and BHS are are supplying voltage to
- * the cpu after this. This avoids glitches during switching from BHS
- * to LDO.
- */
- krait_masked_write(kvreg, APC_PWR_GATE_CTL, LDO_PWR_DWN_MASK, 0);
+ /* complete the writes before the delay */
+ mb();
- /* complete the writes before the delay */
- mb();
+ /* wait for the ldo to settle */
+ udelay(LDO_SETTLING_DELAY_US);
+ } else {
+ /*
+ * enable ldo - note that both LDO and BHS are are supplying
+ * voltage to the cpu after this. This avoids glitches during
+ * switching from BHS to LDO.
+ */
+ krait_masked_write(kvreg, APC_PWR_GATE_CTL,
+ LDO_PWR_DWN_MASK, 0);
- /* wait for the ldo to settle */
- udelay(LDO_SETTLING_DELAY_US);
+ /* complete the writes before the delay */
+ mb();
- /*
- * disable BHS and disable LDO bypass seperate from enabling
- * the LDO above.
- */
- krait_masked_write(kvreg, APC_PWR_GATE_CTL,
- BHS_EN_MASK | LDO_BYP_MASK, 0);
- krait_masked_write(kvreg, APC_PWR_GATE_CTL, BHS_SEG_EN_MASK, 0);
+ /* wait for the ldo to settle */
+ udelay(LDO_SETTLING_DELAY_US);
+
+ /*
+ * disable BHS and disable LDO bypass seperate from enabling
+ * the LDO above.
+ */
+ krait_masked_write(kvreg, APC_PWR_GATE_CTL,
+ BHS_EN_MASK | LDO_BYP_MASK, 0);
+ krait_masked_write(kvreg, APC_PWR_GATE_CTL, BHS_SEG_EN_MASK, 0);
+ }
kvreg->mode = LDO_MODE;
pr_debug("%s using LDO\n", kvreg->name);
@@ -993,22 +1038,34 @@
DEFINE_SIMPLE_ATTRIBUTE(retention_fops,
get_retention_dbg_uV, set_retention_dbg_uV, "%llu\n");
+static void kvreg_ldo_voltage_init(struct krait_power_vreg *kvreg)
+{
+ set_krait_retention_uv(kvreg, kvreg->retention_uV);
+ set_krait_ldo_uv(kvreg, kvreg->ldo_default_uV);
+}
+
#define CPU_PWR_CTL_ONLINE_MASK 0x80
static void kvreg_hw_init(struct krait_power_vreg *kvreg)
{
- int online;
- /*
- * bhs_cnt value sets the ramp-up time from power collapse,
- * initialize the ramp up time
- */
- set_krait_retention_uv(kvreg, kvreg->retention_uV);
- set_krait_ldo_uv(kvreg, kvreg->ldo_default_uV);
-
/* setup the bandgap that configures the reference to the LDO */
writel_relaxed(0x00000190, kvreg->mdd_base + MDD_CONFIG_CTL);
/* Enable MDD */
writel_relaxed(0x00000002, kvreg->mdd_base + MDD_MODE);
mb();
+
+ if (version > KPSS_VERSION_2P0) {
+ /* Configure hardware sequencer delays. */
+ writel_relaxed(0x30430600, kvreg->reg_base + APC_PWR_GATE_DLY);
+
+ /* Enable the hardware sequencer in BHS mode. */
+ writel_relaxed(0x00000021, kvreg->reg_base + APC_PWR_GATE_MODE);
+ }
+}
+
+static void online_at_probe(struct krait_power_vreg *kvreg)
+{
+ int online;
+
online = CPU_PWR_CTL_ONLINE_MASK
& readl_relaxed(kvreg->reg_base + CPU_PWR_CTL);
kvreg->online_at_probe
@@ -1017,11 +1074,15 @@
static void glb_init(void __iomem *apcs_gcc_base)
{
- /* configure bi-modal switch */
- writel_relaxed(0x0008736E, apcs_gcc_base + PWR_GATE_CONFIG);
/* read kpss version */
version = readl_relaxed(apcs_gcc_base + VERSION);
pr_debug("version= 0x%x\n", version);
+
+ /* configure bi-modal switch */
+ if (version > KPSS_VERSION_2P0)
+ writel_relaxed(0x0308736E, apcs_gcc_base + PWR_GATE_CONFIG);
+ else
+ writel_relaxed(0x0008736E, apcs_gcc_base + PWR_GATE_CONFIG);
}
static int __devinit krait_power_probe(struct platform_device *pdev)
@@ -1179,6 +1240,14 @@
list_add_tail(&kvreg->link, &the_gang->krait_power_vregs);
mutex_unlock(&the_gang->krait_power_vregs_lock);
+ online_at_probe(kvreg);
+ kvreg_ldo_voltage_init(kvreg);
+
+ if (kvreg->cpu_num == 0)
+ kvreg_hw_init(kvreg);
+
+ per_cpu(krait_vregs, cpu_num) = kvreg;
+
kvreg->rdev = regulator_register(&kvreg->desc, &pdev->dev, init_data,
kvreg, pdev->dev.of_node);
if (IS_ERR(kvreg->rdev)) {
@@ -1187,8 +1256,6 @@
goto out;
}
- kvreg_hw_init(kvreg);
- per_cpu(krait_vregs, cpu_num) = kvreg;
dev_dbg(&pdev->dev, "id=%d, name=%s\n", pdev->id, kvreg->name);
return 0;
@@ -1426,10 +1493,29 @@
}
module_exit(krait_power_exit);
-void secondary_cpu_hs_init(void *base_ptr)
+#define GCC_BASE 0xF9011000
+
+/**
+ * secondary_cpu_hs_init - Initialize BHS and LDO registers
+ * for nonboot cpu
+ *
+ * @base_ptr: address pointer to APC registers of a cpu
+ * @cpu: the cpu being brought out of reset
+ *
+ * seconday_cpu_hs_init() is called when a secondary cpu
+ * is being brought online for the first time. It is not
+ * called for boot cpu. It initializes power related
+ * registers and makes the core run from BHS.
+ * It also ends up turning on MDD which is required when the
+ * core switches to LDO mode
+ */
+void secondary_cpu_hs_init(void *base_ptr, int cpu)
{
uint32_t reg_val;
void *l2_saw_base;
+ void *gcc_base_ptr;
+ void *mdd_base;
+ struct krait_power_vreg *kvreg;
/* Turn on the BHS, turn off LDO Bypass and power down LDO */
reg_val = BHS_CNT_DEFAULT << BHS_CNT_BIT_POS
@@ -1438,14 +1524,23 @@
| BHS_EN_MASK;
writel_relaxed(reg_val, base_ptr + APC_PWR_GATE_CTL);
- /* complete the above write before the delay */
- mb();
- /* wait for the bhs to settle */
- udelay(BHS_SETTLING_DELAY_US);
+ if (version == 0) {
+ gcc_base_ptr = ioremap_nocache(GCC_BASE, SZ_4K);
+ version = readl_relaxed(gcc_base_ptr + VERSION);
+ iounmap(gcc_base_ptr);
+ }
- /* Turn on BHS segments */
- reg_val |= BHS_SEG_EN_DEFAULT << BHS_SEG_EN_BIT_POS;
- writel_relaxed(reg_val, base_ptr + APC_PWR_GATE_CTL);
+ /* Turn on the BHS segments only for version < 2 */
+ if (version <= KPSS_VERSION_2P0) {
+ /* complete the above write before the delay */
+ mb();
+ /* wait for the bhs to settle */
+ udelay(BHS_SETTLING_DELAY_US);
+
+ /* Turn on BHS segments */
+ reg_val |= BHS_SEG_EN_DEFAULT << BHS_SEG_EN_BIT_POS;
+ writel_relaxed(reg_val, base_ptr + APC_PWR_GATE_CTL);
+ }
/* complete the above write before the delay */
mb();
@@ -1456,23 +1551,48 @@
reg_val |= LDO_BYP_MASK;
writel_relaxed(reg_val, base_ptr + APC_PWR_GATE_CTL);
- if (the_gang && the_gang->manage_phases)
- return;
+ kvreg = per_cpu(krait_vregs, cpu);
+ if (kvreg != NULL) {
+ kvreg_hw_init(kvreg);
+ } else {
+ /*
+ * This nonboot cpu has not been probed yet. This cpu was
+ * brought out of reset as a part of maxcpus >= 2. Initialize
+ * its MDD and APC_PWR_GATE_MODE register here
+ */
+ mdd_base = ioremap_nocache(MSM_MDD_BASE_PHYS + cpu * 0x10000,
+ SZ_4K);
+ /* setup the bandgap that configures the reference to the LDO */
+ writel_relaxed(0x00000190, mdd_base + MDD_CONFIG_CTL);
+ /* Enable MDD */
+ writel_relaxed(0x00000002, mdd_base + MDD_MODE);
+ mb();
+ iounmap(mdd_base);
- /*
- * If the driver has not yet started to manage phases then enable
- * max phases.
- */
- l2_saw_base = ioremap_nocache(MSM_L2_SAW_PHYS, SZ_4K);
- if (!l2_saw_base) {
- __WARN();
- return;
+ if (version > KPSS_VERSION_2P0) {
+ writel_relaxed(0x30430600, base_ptr + APC_PWR_GATE_DLY);
+ writel_relaxed(0x00000021,
+ base_ptr + APC_PWR_GATE_MODE);
+ }
+ mb();
}
- writel_relaxed(0x10003, l2_saw_base + 0x1c);
- mb();
- udelay(PHASE_SETTLING_TIME_US);
- iounmap(l2_saw_base);
+ if (!the_gang || !the_gang->manage_phases) {
+ /*
+ * If the driver has not yet started to manage phases then
+ * enable max phases.
+ */
+ l2_saw_base = ioremap_nocache(MSM_L2_SAW_PHYS, SZ_4K);
+ if (l2_saw_base) {
+ writel_relaxed(0x10003, l2_saw_base + 0x1c);
+ mb();
+ udelay(PHASE_SETTLING_TIME_US);
+
+ iounmap(l2_saw_base);
+ } else {
+ __WARN();
+ }
+ }
}
MODULE_LICENSE("GPL v2");
diff --git a/arch/arm/mach-msm/msm_bus/msm_bus_arb.c b/arch/arm/mach-msm/msm_bus/msm_bus_arb.c
index f1c8726..3ff7530 100644
--- a/arch/arm/mach-msm/msm_bus/msm_bus_arb.c
+++ b/arch/arm/mach-msm/msm_bus/msm_bus_arb.c
@@ -59,6 +59,8 @@
return 1;
switch (w) {
+ case 0:
+ WARN(1, "AXI: Divide by 0 attempted\n");
case 1: return bw;
case 2: return (bw >> 1);
case 4: return (bw >> 2);
@@ -426,8 +428,10 @@
req_clk);
bwsum_hz = BW_TO_CLK_FREQ_HZ(hop->node_info->buswidth,
bwsum);
- /* Account for multiple channels */
- bwsum_hz = msm_bus_div64(hop->node_info->num_sports, bwsum_hz);
+ /* Account for multiple channels if any */
+ if (hop->node_info->num_sports > 1)
+ bwsum_hz = msm_bus_div64(hop->node_info->num_sports,
+ bwsum_hz);
MSM_BUS_DBG("AXI: Hop: %d, ports: %d, bwsum_hz: %llu\n",
hop->node_info->id, hop->node_info->num_sports,
bwsum_hz);
@@ -487,7 +491,7 @@
deffab = msm_bus_get_fabric_device(MSM_BUS_FAB_DEFAULT);
if (!deffab) {
MSM_BUS_ERR("Error finding default fabric\n");
- return -ENXIO;
+ return 0;
}
nfab = msm_bus_get_num_fab();
diff --git a/arch/arm/mach-msm/msm_cache_dump.c b/arch/arm/mach-msm/msm_cache_dump.c
index 7f6a9b1..86e8963 100644
--- a/arch/arm/mach-msm/msm_cache_dump.c
+++ b/arch/arm/mach-msm/msm_cache_dump.c
@@ -1,4 +1,4 @@
-/* Copyright (c) 2012, The Linux Foundation. All rights reserved.
+/* Copyright (c) 2012-2013, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -112,6 +112,8 @@
temp = ioremap(msm_cache_dump_addr, total_size);
memset(temp, 0xFF, total_size);
+ /* Clean caches before sending buffer to TZ */
+ clean_caches((unsigned long) temp, total_size, msm_cache_dump_addr);
iounmap(temp);
l1_cache_data.buf = msm_cache_dump_addr;
diff --git a/arch/arm/mach-msm/msm_dcvs_scm.c b/arch/arm/mach-msm/msm_dcvs_scm.c
index 78d62ac..e03ac64 100644
--- a/arch/arm/mach-msm/msm_dcvs_scm.c
+++ b/arch/arm/mach-msm/msm_dcvs_scm.c
@@ -1,4 +1,4 @@
-/* Copyright (c) 2012, The Linux Foundation. All rights reserved.
+/* Copyright (c) 2012-2013, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -17,6 +17,7 @@
#include <linux/slab.h>
#include <linux/mm.h>
#include <linux/memory_alloc.h>
+#include <asm/cacheflush.h>
#include <mach/memory.h>
#include <mach/scm.h>
#include <mach/msm_dcvs_scm.h>
@@ -83,6 +84,12 @@
}
EXPORT_SYMBOL(msm_dcvs_scm_init);
+static void __msm_dcvs_flush_cache(void *v, size_t size)
+{
+ __cpuc_flush_dcache_area(v, size);
+ outer_flush_range(virt_to_phys(v), virt_to_phys(v) + size);
+}
+
int msm_dcvs_scm_register_core(uint32_t core_id,
struct msm_dcvs_core_param *param)
{
@@ -99,6 +106,8 @@
reg_data.core_id = core_id;
reg_data.core_param_phy = virt_to_phys(p);
+ __msm_dcvs_flush_cache(p, sizeof(struct msm_dcvs_core_param));
+
ret = scm_call(SCM_SVC_DCVS, DCVS_CMD_REGISTER_CORE,
®_data, sizeof(reg_data), NULL, 0);
@@ -125,6 +134,8 @@
algo.core_id = core_id;
algo.algo_phy = virt_to_phys(p);
+ __msm_dcvs_flush_cache(p, sizeof(struct msm_algo_param));
+
ret = scm_call(SCM_SVC_DCVS, DCVS_CMD_SET_ALGO_PARAM,
&algo, sizeof(algo), NULL, 0);
@@ -150,6 +161,8 @@
algo.core_id = 0;
algo.algo_phy = virt_to_phys(p);
+ __msm_dcvs_flush_cache(p, sizeof(struct msm_algo_param));
+
ret = scm_call(SCM_SVC_DCVS, DCVS_CMD_SET_ALGO_PARAM,
&algo, sizeof(algo), NULL, 0);
@@ -197,6 +210,12 @@
sizeof(struct msm_dcvs_freq_entry)*pwr_param->num_freq);
memcpy(coefft, coeffs, sizeof(struct msm_dcvs_energy_curve_coeffs));
+ __msm_dcvs_flush_cache(pwrt, sizeof(struct msm_dcvs_power_params));
+ __msm_dcvs_flush_cache(freqt,
+ sizeof(struct msm_dcvs_freq_entry) * pwr_param->num_freq);
+ __msm_dcvs_flush_cache(coefft,
+ sizeof(struct msm_dcvs_energy_curve_coeffs));
+
pwr.core_id = core_id;
pwr.pwr_param_phy = virt_to_phys(pwrt);
pwr.freq_phy = virt_to_phys(freqt);
diff --git a/arch/arm/mach-msm/msm_qmi_interface.c b/arch/arm/mach-msm/msm_qmi_interface.c
index 4c4635a..8d96bd8 100644
--- a/arch/arm/mach-msm/msm_qmi_interface.c
+++ b/arch/arm/mach-msm/msm_qmi_interface.c
@@ -1,4 +1,4 @@
-/* Copyright (c) 2012, The Linux Foundation. All rights reserved.
+/* Copyright (c) 2012-2013, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -25,6 +25,8 @@
#include <linux/socket.h>
#include <linux/gfp.h>
#include <linux/qmi_encdec.h>
+#include <linux/workqueue.h>
+#include <linux/mutex.h>
#include <mach/msm_qmi_interface.h>
#include <mach/msm_ipc_router.h>
@@ -33,6 +35,8 @@
static LIST_HEAD(svc_event_nb_list);
static DEFINE_MUTEX(svc_event_nb_list_lock);
+static DEFINE_MUTEX(msm_qmi_init_lock);
+static struct workqueue_struct *msm_qmi_pending_workqueue;
struct elem_info qmi_response_type_v01_ei[] = {
{
@@ -87,12 +91,98 @@
spin_unlock_irqrestore(&handle->notify_lock, flags);
break;
+ case MSM_IPC_ROUTER_RESUME_TX:
+ queue_delayed_work(msm_qmi_pending_workqueue,
+ &handle->resume_tx_work,
+ msecs_to_jiffies(0));
+ break;
default:
break;
}
mutex_unlock(&handle->handle_lock);
}
+/**
+ * init_msm_qmi() - Init function for kernel space QMI
+ *
+ * This function is implemented to initialize the QMI resources that are common
+ * across kernel space QMI users. As it is not necessary for this init function
+ * to be module_init function it is called when the first handle of kernel space
+ * QMI gets created.
+ */
+static void init_msm_qmi(void)
+{
+ static bool msm_qmi_inited;
+
+ if (likely(msm_qmi_inited))
+ return;
+
+ mutex_lock(&msm_qmi_init_lock);
+ if (likely(msm_qmi_inited && msm_qmi_pending_workqueue)) {
+ mutex_unlock(&msm_qmi_init_lock);
+ return;
+ }
+ msm_qmi_inited = 1;
+ msm_qmi_pending_workqueue =
+ create_singlethread_workqueue("msm_qmi_rtx_q");
+ mutex_unlock(&msm_qmi_init_lock);
+}
+
+/**
+ * handle_resume_tx() - Handle the Resume_Tx event
+ * @work : Pointer to the work strcuture.
+ *
+ * This function handles the resume_tx event for any QMI client that
+ * exists in the kernel space. This function parses the pending_txn_list of
+ * the handle and attempts a send for each transaction in that list.
+ */
+static void handle_resume_tx(struct work_struct *work)
+{
+ struct delayed_work *rtx_work = to_delayed_work(work);
+ struct qmi_handle *handle =
+ container_of(rtx_work, struct qmi_handle, resume_tx_work);
+ struct qmi_txn *pend_txn, *temp_txn;
+ int ret;
+ uint16_t msg_id;
+
+ mutex_lock(&handle->handle_lock);
+ list_for_each_entry_safe(pend_txn, temp_txn,
+ &handle->pending_txn_list, list) {
+ ret = msm_ipc_router_send_msg(
+ (struct msm_ipc_port *)handle->src_port,
+ (struct msm_ipc_addr *)handle->dest_info,
+ pend_txn->enc_data, pend_txn->enc_data_len);
+
+ if (ret == -EAGAIN) {
+ mutex_unlock(&handle->handle_lock);
+ return;
+ }
+ msg_id = ((struct qmi_header *)pend_txn->enc_data)->msg_id;
+ kfree(pend_txn->enc_data);
+ if (ret < 0) {
+ if (pend_txn->type == QMI_ASYNC_TXN) {
+ pend_txn->resp_cb(pend_txn->handle,
+ msg_id, pend_txn->resp,
+ pend_txn->resp_cb_data,
+ ret);
+ list_del(&pend_txn->list);
+ kfree(pend_txn);
+ } else if (pend_txn->type == QMI_SYNC_TXN) {
+ pend_txn->send_stat = ret;
+ wake_up(&pend_txn->wait_q);
+ }
+ pr_err("%s: Sending transaction %d from port %d failed",
+ __func__, pend_txn->txn_id,
+ ((struct msm_ipc_port *)handle->src_port)->
+ this_port.port_id);
+ } else {
+ list_del(&pend_txn->list);
+ list_add_tail(&pend_txn->list, &handle->txn_list);
+ }
+ }
+ mutex_unlock(&handle->handle_lock);
+}
+
struct qmi_handle *qmi_handle_create(
void (*notify)(struct qmi_handle *handle,
enum qmi_event_type event, void *notify_priv),
@@ -118,20 +208,39 @@
temp_handle->src_port = port_ptr;
temp_handle->next_txn_id = 1;
INIT_LIST_HEAD(&temp_handle->txn_list);
+ INIT_LIST_HEAD(&temp_handle->pending_txn_list);
mutex_init(&temp_handle->handle_lock);
spin_lock_init(&temp_handle->notify_lock);
temp_handle->notify = notify;
temp_handle->notify_priv = notify_priv;
temp_handle->handle_reset = 0;
init_waitqueue_head(&temp_handle->reset_waitq);
+ INIT_DELAYED_WORK(&temp_handle->resume_tx_work, handle_resume_tx);
+ init_msm_qmi();
return temp_handle;
}
EXPORT_SYMBOL(qmi_handle_create);
static void clean_txn_info(struct qmi_handle *handle)
{
- struct qmi_txn *txn_handle, *temp_txn_handle;
+ struct qmi_txn *txn_handle, *temp_txn_handle, *pend_txn;
+ list_for_each_entry_safe(pend_txn, temp_txn_handle,
+ &handle->pending_txn_list, list) {
+ if (pend_txn->type == QMI_ASYNC_TXN) {
+ list_del(&pend_txn->list);
+ pend_txn->resp_cb(pend_txn->handle,
+ ((struct qmi_header *)
+ pend_txn->enc_data)->msg_id,
+ pend_txn->resp, pend_txn->resp_cb_data,
+ -ENETRESET);
+ kfree(pend_txn->enc_data);
+ kfree(pend_txn);
+ } else if (pend_txn->type == QMI_SYNC_TXN) {
+ kfree(pend_txn->enc_data);
+ wake_up(&pend_txn->wait_q);
+ }
+ }
list_for_each_entry_safe(txn_handle, temp_txn_handle,
&handle->txn_list, list) {
if (txn_handle->type == QMI_ASYNC_TXN) {
@@ -154,7 +263,7 @@
handle->handle_reset = 1;
clean_txn_info(handle);
mutex_unlock(&handle->handle_lock);
-
+ flush_delayed_work(&handle->resume_tx_work);
rc = wait_event_interruptible(handle->reset_waitq,
list_empty(&handle->txn_list));
@@ -194,7 +303,7 @@
struct msg_desc *resp_desc, void *resp, unsigned int resp_len,
void (*resp_cb)(struct qmi_handle *handle,
unsigned int msg_id, void *msg,
- void *resp_cb_data),
+ void *resp_cb_data, int stat),
void *resp_cb_data)
{
struct qmi_txn *txn_handle;
@@ -230,6 +339,8 @@
txn_handle->resp_received = 0;
txn_handle->resp_cb = resp_cb;
txn_handle->resp_cb_data = resp_cb_data;
+ txn_handle->enc_data = NULL;
+ txn_handle->enc_data_len = 0;
/* Encode the request msg */
encoded_req_len = req_desc->max_msg_len + QMI_HEADER_SIZE;
@@ -256,12 +367,35 @@
txn_handle->txn_id, req_desc->msg_id,
encoded_req_len);
encoded_req_len += QMI_HEADER_SIZE;
- list_add_tail(&txn_handle->list, &handle->txn_list);
+ /*
+ * Check if this port has transactions queued to its pending list
+ * and if there are any pending transactions then add the current
+ * transaction to the pending list rather than sending it. This avoids
+ * out-of-order message transfers.
+ */
+ if (!list_empty(&handle->pending_txn_list)) {
+ rc = -EAGAIN;
+ goto append_pend_txn;
+ }
+
+ list_add_tail(&txn_handle->list, &handle->txn_list);
/* Send the request */
rc = msm_ipc_router_send_msg((struct msm_ipc_port *)(handle->src_port),
(struct msm_ipc_addr *)handle->dest_info,
encoded_req, encoded_req_len);
+append_pend_txn:
+ if (rc == -EAGAIN) {
+ txn_handle->enc_data = encoded_req;
+ txn_handle->enc_data_len = encoded_req_len;
+ if (list_empty(&handle->pending_txn_list))
+ list_del(&txn_handle->list);
+ list_add_tail(&txn_handle->list, &handle->pending_txn_list);
+ if (ret_txn_handle)
+ *ret_txn_handle = txn_handle;
+ mutex_unlock(&handle->handle_lock);
+ return 0;
+ }
if (rc < 0) {
pr_err("%s: send_msg failed %d\n", __func__, rc);
goto encode_and_send_req_err3;
@@ -306,13 +440,15 @@
/* Wait for the response */
if (!timeout_ms) {
rc = wait_event_interruptible(txn_handle->wait_q,
- (txn_handle->resp_received ||
- handle->handle_reset));
+ (txn_handle->resp_received ||
+ handle->handle_reset ||
+ (txn_handle->send_stat < 0)));
} else {
rc = wait_event_interruptible_timeout(txn_handle->wait_q,
- (txn_handle->resp_received ||
- handle->handle_reset),
- msecs_to_jiffies(timeout_ms));
+ (txn_handle->resp_received ||
+ handle->handle_reset ||
+ (txn_handle->send_stat < 0)),
+ msecs_to_jiffies(timeout_ms));
if (rc == 0)
rc = -ETIMEDOUT;
}
@@ -324,6 +460,8 @@
rc = -ENETRESET;
if (rc >= 0)
rc = -EFAULT;
+ if (txn_handle->send_stat < 0)
+ rc = txn_handle->send_stat;
goto send_req_wait_err;
}
rc = 0;
@@ -344,7 +482,7 @@
void *resp, unsigned int resp_len,
void (*resp_cb)(struct qmi_handle *handle,
unsigned int msg_id, void *msg,
- void *resp_cb_data),
+ void *resp_cb_data, int stat),
void *resp_cb_data)
{
return qmi_encode_and_send_req(NULL, handle, QMI_ASYNC_TXN,
@@ -407,7 +545,7 @@
if (txn_handle->resp_cb)
txn_handle->resp_cb(txn_handle->handle, msg_id,
txn_handle->resp,
- txn_handle->resp_cb_data);
+ txn_handle->resp_cb_data, 0);
list_del(&txn_handle->list);
kfree(txn_handle);
rc = 0;
@@ -450,6 +588,11 @@
/* Read the messages */
rc = msm_ipc_router_read_msg((struct msm_ipc_port *)(handle->src_port),
&src_addr, &recv_msg, &recv_msg_len);
+ if (rc == -ENOMSG) {
+ mutex_unlock(&handle->handle_lock);
+ return rc;
+ }
+
if (rc < 0) {
pr_err("%s: Read failed %d\n", __func__, rc);
mutex_unlock(&handle->handle_lock);
diff --git a/arch/arm/mach-msm/msm_qmi_interface_priv.h b/arch/arm/mach-msm/msm_qmi_interface_priv.h
index 58f1ce3..8eba0db 100644
--- a/arch/arm/mach-msm/msm_qmi_interface_priv.h
+++ b/arch/arm/mach-msm/msm_qmi_interface_priv.h
@@ -1,4 +1,4 @@
-/* Copyright (c) 2012, The Linux Foundation. All rights reserved.
+/* Copyright (c) 2012-2013, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -34,12 +34,15 @@
uint16_t txn_id;
enum txn_type type;
struct qmi_handle *handle;
+ void *enc_data;
+ unsigned int enc_data_len;
struct msg_desc *resp_desc;
void *resp;
unsigned int resp_len;
int resp_received;
+ int send_stat;
void (*resp_cb)(struct qmi_handle *handle, unsigned int msg_id,
- void *msg, void *resp_cb_data);
+ void *msg, void *resp_cb_data, int stat);
void *resp_cb_data;
wait_queue_head_t wait_q;
};
diff --git a/arch/arm/mach-msm/perf_debug.c b/arch/arm/mach-msm/perf_debug.c
index af71cc9..70420db 100644
--- a/arch/arm/mach-msm/perf_debug.c
+++ b/arch/arm/mach-msm/perf_debug.c
@@ -31,6 +31,7 @@
"6 Perf: Add cortex A5 device tree support\n"
"7 Perf: Add L1 counters to tracepoints\n"
"8 Perf: Add cortex A7 perf support\n"
+ "9 ARM: dts: msm: add perf-events support for msm8226\n"
;
static ssize_t desc_read(struct file *fp, char __user *buf,
diff --git a/arch/arm/mach-msm/peripheral-loader.c b/arch/arm/mach-msm/peripheral-loader.c
index 475e8a1..c572291 100644
--- a/arch/arm/mach-msm/peripheral-loader.c
+++ b/arch/arm/mach-msm/peripheral-loader.c
@@ -113,6 +113,7 @@
* @region_end: address where relocatable region ends or highest address for
* non-relocatable images
* @region: region allocated for relocatable images
+ * @unvoted_flag: flag to keep track if we have unvoted or not.
*
* This struct contains data for a pil_desc that should not be exposed outside
* of this file. This structure points to the descriptor and the descriptor
@@ -132,6 +133,7 @@
struct ion_handle *region;
struct pil_image_info __iomem *info;
int id;
+ int unvoted_flag;
};
/**
@@ -184,15 +186,21 @@
}
EXPORT_SYMBOL(pil_get_entry_addr);
-static void pil_proxy_work(struct work_struct *work)
+static void __pil_proxy_unvote(struct pil_priv *priv)
{
- struct delayed_work *delayed = to_delayed_work(work);
- struct pil_priv *priv = container_of(delayed, struct pil_priv, proxy);
struct pil_desc *desc = priv->desc;
desc->ops->proxy_unvote(desc);
wake_unlock(&priv->wlock);
module_put(desc->owner);
+
+}
+
+static void pil_proxy_unvote_work(struct work_struct *work)
+{
+ struct delayed_work *delayed = to_delayed_work(work);
+ struct pil_priv *priv = container_of(delayed, struct pil_priv, proxy);
+ __pil_proxy_unvote(priv);
}
static int pil_proxy_vote(struct pil_desc *desc)
@@ -206,6 +214,10 @@
if (ret)
wake_unlock(&priv->wlock);
}
+
+ if (desc->proxy_unvote_irq)
+ enable_irq(desc->proxy_unvote_irq);
+
return ret;
}
@@ -237,8 +249,13 @@
static irqreturn_t proxy_unvote_intr_handler(int irq, void *dev_id)
{
struct pil_desc *desc = dev_id;
+ struct pil_priv *priv = desc->priv;
- schedule_delayed_work(&desc->priv->proxy, 0);
+ if (!desc->priv->unvoted_flag) {
+ desc->priv->unvoted_flag = 1;
+ __pil_proxy_unvote(priv);
+ }
+
return IRQ_HANDLED;
}
@@ -651,6 +668,7 @@
goto release_fw;
}
+ desc->priv->unvoted_flag = 0;
ret = pil_proxy_vote(desc);
if (ret) {
pil_err(desc, "Failed to proxy vote\n");
@@ -687,10 +705,19 @@
void pil_shutdown(struct pil_desc *desc)
{
struct pil_priv *priv = desc->priv;
+
if (desc->ops->shutdown)
desc->ops->shutdown(desc);
- if (proxy_timeout_ms == 0 && desc->ops->proxy_unvote)
- desc->ops->proxy_unvote(desc);
+
+ if (desc->proxy_unvote_irq) {
+ disable_irq(desc->proxy_unvote_irq);
+ if (!desc->priv->unvoted_flag)
+ pil_proxy_unvote(desc, 1);
+ return;
+ }
+
+ if (!proxy_timeout_ms)
+ pil_proxy_unvote(desc, 1);
else
flush_delayed_work(&priv->proxy);
}
@@ -741,7 +768,8 @@
__iowrite32_copy(priv->info->name, buf, sizeof(buf) / 4);
if (desc->proxy_unvote_irq > 0) {
- ret = request_irq(desc->proxy_unvote_irq,
+ ret = request_threaded_irq(desc->proxy_unvote_irq,
+ NULL,
proxy_unvote_intr_handler,
IRQF_TRIGGER_RISING|IRQF_SHARED,
desc->name, desc);
@@ -751,11 +779,12 @@
ret);
goto err;
}
+ disable_irq(desc->proxy_unvote_irq);
}
snprintf(priv->wname, sizeof(priv->wname), "pil-%s", desc->name);
wake_lock_init(&priv->wlock, WAKE_LOCK_SUSPEND, priv->wname);
- INIT_DELAYED_WORK(&priv->proxy, pil_proxy_work);
+ INIT_DELAYED_WORK(&priv->proxy, pil_proxy_unvote_work);
INIT_LIST_HEAD(&priv->segs);
return 0;
diff --git a/arch/arm/mach-msm/pil-pronto.c b/arch/arm/mach-msm/pil-pronto.c
index 098cbd5..1085408 100644
--- a/arch/arm/mach-msm/pil-pronto.c
+++ b/arch/arm/mach-msm/pil-pronto.c
@@ -348,7 +348,7 @@
struct platform_device *pdev = wcnss_get_platform_device();
struct wcnss_wlan_config *pwlanconfig = wcnss_get_wlan_config();
- wcnss_wlan_power(&pdev->dev, pwlanconfig, WCNSS_WLAN_SWITCH_OFF);
+ wcnss_wlan_power(&pdev->dev, pwlanconfig, WCNSS_WLAN_SWITCH_OFF, NULL);
}
static int wcnss_shutdown(const struct subsys_desc *subsys)
@@ -371,7 +371,7 @@
if (pdev && pwlanconfig)
ret = wcnss_wlan_power(&pdev->dev, pwlanconfig,
- WCNSS_WLAN_SWITCH_ON);
+ WCNSS_WLAN_SWITCH_ON, NULL);
if (!ret) {
msleep(1000);
ret = pil_boot(&drv->desc);
diff --git a/arch/arm/mach-msm/pil-q6v5-mss.c b/arch/arm/mach-msm/pil-q6v5-mss.c
index 8cf6011..b83202b 100644
--- a/arch/arm/mach-msm/pil-q6v5-mss.c
+++ b/arch/arm/mach-msm/pil-q6v5-mss.c
@@ -628,15 +628,8 @@
if (ret)
return ret;
ret = pil_boot(&drv->desc);
- if (ret) {
+ if (ret)
pil_shutdown(&drv->q6->desc);
- /*
- * We know now that the unvote interrupt is not coming.
- * Remove the proxy votes immediately.
- */
- if (drv->q6->desc.proxy_unvote_irq)
- pil_q6v5_mss_remove_proxy_votes(&drv->q6->desc);
- }
return ret;
}
diff --git a/arch/arm/mach-msm/pil-riva.c b/arch/arm/mach-msm/pil-riva.c
index 7fd76ab..bf7438b 100644
--- a/arch/arm/mach-msm/pil-riva.c
+++ b/arch/arm/mach-msm/pil-riva.c
@@ -362,7 +362,7 @@
struct platform_device *pdev = wcnss_get_platform_device();
struct wcnss_wlan_config *pwlanconfig = wcnss_get_wlan_config();
- wcnss_wlan_power(&pdev->dev, pwlanconfig, WCNSS_WLAN_SWITCH_OFF);
+ wcnss_wlan_power(&pdev->dev, pwlanconfig, WCNSS_WLAN_SWITCH_OFF, NULL);
}
static int riva_start(const struct subsys_desc *desc)
@@ -404,7 +404,7 @@
drv = container_of(desc, struct riva_data, subsys_desc);
if (pdev && pwlanconfig) {
ret = wcnss_wlan_power(&pdev->dev, pwlanconfig,
- WCNSS_WLAN_SWITCH_ON);
+ WCNSS_WLAN_SWITCH_ON, NULL);
if (!ret)
pil_boot(&drv->pil_desc);
}
diff --git a/arch/arm/mach-msm/platsmp.c b/arch/arm/mach-msm/platsmp.c
index f4ca4e3..796fba1 100644
--- a/arch/arm/mach-msm/platsmp.c
+++ b/arch/arm/mach-msm/platsmp.c
@@ -147,10 +147,11 @@
unsigned int cpu)
{
void *base_ptr = ioremap_nocache(base + (cpu * 0x10000), SZ_4K);
+
if (!base_ptr)
return -ENODEV;
- secondary_cpu_hs_init(base_ptr);
+ secondary_cpu_hs_init(base_ptr, cpu);
writel_relaxed(0x021, base_ptr+0x04);
mb();
diff --git a/arch/arm/mach-msm/pm-8x60.c b/arch/arm/mach-msm/pm-8x60.c
index 545723c..146dc0b 100644
--- a/arch/arm/mach-msm/pm-8x60.c
+++ b/arch/arm/mach-msm/pm-8x60.c
@@ -11,6 +11,7 @@
*
*/
+#include <linux/dma-mapping.h>
#include <linux/debugfs.h>
#include <linux/module.h>
#include <linux/kernel.h>
@@ -480,6 +481,7 @@
void *entry;
bool collapsed = 0;
int ret;
+ bool save_cpu_regs = !cpu || from_idle;
if (MSM_PM_DEBUG_POWER_COLLAPSE & msm_pm_debug_mask)
pr_info("CPU%u: %s: notify_rpm %d\n",
@@ -492,8 +494,8 @@
MSM_SPM_MODE_POWER_COLLAPSE, notify_rpm);
WARN_ON(ret);
- entry = (!cpu || from_idle) ?
- msm_pm_collapse_exit : msm_secondary_startup;
+ entry = save_cpu_regs ? msm_pm_collapse_exit : msm_secondary_startup;
+
msm_pm_boot_config_before_pc(cpu, virt_to_phys(entry));
if (MSM_PM_DEBUG_RESET_VECTOR & msm_pm_debug_mask)
@@ -502,7 +504,7 @@
if (from_idle && msm_pm_pc_reset_timer)
clockevents_notify(CLOCK_EVT_NOTIFY_BROADCAST_ENTER, &cpu);
- collapsed = msm_pm_collapse();
+ collapsed = save_cpu_regs ? msm_pm_collapse() : msm_pm_pc_hotplug();
if (from_idle && msm_pm_pc_reset_timer)
clockevents_notify(CLOCK_EVT_NOTIFY_BROADCAST_EXIT, &cpu);
@@ -965,7 +967,7 @@
if (acc_sts & msm_pm_slp_sts[cpu].mask)
return 0;
udelay(100);
- WARN(++timeout == 10, "CPU%u didn't collape within 1ms\n",
+ WARN(++timeout == 20, "CPU%u didn't collape within 2ms\n",
cpu);
}
@@ -1290,6 +1292,7 @@
pmd_t *pmd;
unsigned long pmdval;
unsigned long exit_phys;
+ dma_addr_t temp_phys;
/* Page table for cores to come back up safely. */
pc_pgd = pgd_alloc(&init_mm);
@@ -1305,17 +1308,21 @@
pmd[0] = __pmd(pmdval);
pmd[1] = __pmd(pmdval + (1 << (PGDIR_SHIFT - 1)));
- msm_saved_state_phys =
- allocate_contiguous_ebi_nomap(CPU_SAVED_STATE_SIZE *
- num_possible_cpus(), 4);
- if (!msm_saved_state_phys)
- return -ENOMEM;
- msm_saved_state = ioremap_nocache(msm_saved_state_phys,
- CPU_SAVED_STATE_SIZE *
- num_possible_cpus());
+ msm_saved_state = dma_zalloc_coherent(NULL, CPU_SAVED_STATE_SIZE *
+ num_possible_cpus(),
+ &temp_phys, 0);
+
if (!msm_saved_state)
return -ENOMEM;
+ /*
+ * Explicitly cast here since msm_saved_state_phys is defined
+ * in assembly and we want to avoid any kind of truncation
+ * or endian problems.
+ */
+ msm_saved_state_phys = (unsigned long)temp_phys;
+
+
/* It is remotely possible that the code in msm_pm_collapse_exit()
* which turns on the MMU with this mapping is in the
* next even-numbered megabyte beyond the
@@ -1330,7 +1337,7 @@
return 0;
}
-core_initcall(msm_pm_setup_saved_state);
+arch_initcall(msm_pm_setup_saved_state);
static void setup_broadcast_timer(void *arg)
{
@@ -1616,14 +1623,6 @@
{
int rc;
- rc = platform_driver_register(&msm_cpu_status_driver);
-
- if (rc) {
- pr_err("%s(): failed to register driver %s\n", __func__,
- msm_cpu_status_driver.driver.name);
- return rc;
- }
-
rc = platform_driver_register(&msm_cpu_pm_snoc_client_driver);
if (rc) {
@@ -1647,3 +1646,8 @@
return platform_driver_register(&msm_pm_8x60_driver);
}
device_initcall(msm_pm_8x60_init);
+
+void __init msm_pm_sleep_status_init(void)
+{
+ platform_driver_register(&msm_cpu_status_driver);
+}
diff --git a/arch/arm/mach-msm/pm.h b/arch/arm/mach-msm/pm.h
index 8a043d8..f2fc80b 100644
--- a/arch/arm/mach-msm/pm.h
+++ b/arch/arm/mach-msm/pm.h
@@ -136,10 +136,12 @@
void msm_pm_set_rpm_wakeup_irq(unsigned int irq);
void msm_pm_set_sleep_ops(struct msm_pm_sleep_ops *ops);
int msm_pm_wait_cpu_shutdown(unsigned int cpu);
+void __init msm_pm_sleep_status_init(void);
#else
static inline void msm_pm_set_rpm_wakeup_irq(unsigned int irq) {}
static inline void msm_pm_set_sleep_ops(struct msm_pm_sleep_ops *ops) {}
static inline int msm_pm_wait_cpu_shutdown(unsigned int cpu) { return 0; }
+static inline void msm_pm_sleep_status_init(void) {};
#endif
#ifdef CONFIG_HOTPLUG_CPU
int msm_platform_secondary_init(unsigned int cpu);
diff --git a/arch/arm/mach-msm/qdsp6v2/q6audio_v2_aio.c b/arch/arm/mach-msm/qdsp6v2/q6audio_v2_aio.c
index 4610b97..4681437 100644
--- a/arch/arm/mach-msm/qdsp6v2/q6audio_v2_aio.c
+++ b/arch/arm/mach-msm/qdsp6v2/q6audio_v2_aio.c
@@ -176,7 +176,11 @@
atomic_add(payload[9], &audio->in_samples);
spin_lock_irqsave(&audio->dsp_lock, flags);
- BUG_ON(list_empty(&audio->in_queue));
+ if (list_empty(&audio->in_queue)) {
+ spin_unlock_irqrestore(&audio->dsp_lock, flags);
+ pr_warning("%s unexpected ack from dsp\n", __func__);
+ return;
+ }
filled_buf = list_first_entry(&audio->in_queue,
struct audio_aio_buffer_node, list);
diff --git a/arch/arm/mach-msm/qdsp6v2/ultrasound/usf.c b/arch/arm/mach-msm/qdsp6v2/ultrasound/usf.c
index d37a325..1ea213a 100644
--- a/arch/arm/mach-msm/qdsp6v2/ultrasound/usf.c
+++ b/arch/arm/mach-msm/qdsp6v2/ultrasound/usf.c
@@ -456,7 +456,7 @@
__func__, config->buf_num, config->stream_format,
config->port_cnt, config->params_data_size);
- pr_debug("%s: id[0]=%d, id[1]=%d, id[2]=%d, id[3]=%d, id[4]=%d\n",
+ pr_debug("%s: id[0]=%d, id[1]=%d, id[2]=%d, id[3]=%d, id[4]=%d,\n",
__func__,
config->port_id[0],
config->port_id[1],
@@ -464,6 +464,11 @@
config->port_id[3],
config->port_id[4]);
+ pr_debug("id[5]=%d, id[6]=%d, id[7]=%d\n",
+ config->port_id[5],
+ config->port_id[6],
+ config->port_id[7]);
+
/* q6usm allocation & configuration */
usf_xx->buffer_size = config->buf_size;
usf_xx->buffer_count = config->buf_num;
diff --git a/arch/arm/mach-msm/qdsp6v2/ultrasound/version_a/q6usm_a.c b/arch/arm/mach-msm/qdsp6v2/ultrasound/version_a/q6usm_a.c
index 5d30eb1..80b1aaa 100644
--- a/arch/arm/mach-msm/qdsp6v2/ultrasound/version_a/q6usm_a.c
+++ b/arch/arm/mach-msm/qdsp6v2/ultrasound/version_a/q6usm_a.c
@@ -1,4 +1,4 @@
-/* Copyright (c) 2011-2012, The Linux Foundation. All rights reserved.
+/* Copyright (c) 2011-2013, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -652,7 +652,7 @@
sizeof(struct usm_stream_cmd_encdec_cfg_blk);
uint32_t round_params_size = 0;
uint8_t is_allocated = 0;
-
+ size_t min_common_size;
if ((usc == NULL) || (us_cfg == NULL)) {
pr_err("%s: wrong input", __func__);
@@ -692,12 +692,13 @@
round_params_size;
enc_cfg->enc_blk.frames_per_buf = 1;
enc_cfg->enc_blk.format_id = int_format;
- enc_cfg->enc_blk.cfg_size = sizeof(struct usm_cfg_common)+
+ min_common_size = min(sizeof(struct usm_cfg_common),
+ sizeof(struct usm_cfg_common_a));
+ enc_cfg->enc_blk.cfg_size = min_common_size +
USM_MAX_CFG_DATA_SIZE +
round_params_size;
memcpy(&(enc_cfg->enc_blk.cfg_common), &(us_cfg->cfg_common),
- sizeof(struct usm_cfg_common));
-
+ min_common_size);
/* Transparent data copy */
memcpy(enc_cfg->enc_blk.transp_data, us_cfg->params,
us_cfg->params_size);
@@ -716,11 +717,15 @@
enc_cfg->enc_blk.transp_data[6],
enc_cfg->enc_blk.transp_data[7]
);
- pr_debug("%s: srate:%d, ch=%d, bps= %d; dmap:0x%x; dev_id=0x%x\n",
+ pr_debug("%s: srate:%d, ch=%d, bps= %d; dmap:[0x%x,0x%x,0x%x,0x%x];\n",
__func__, enc_cfg->enc_blk.cfg_common.sample_rate,
enc_cfg->enc_blk.cfg_common.ch_cfg,
enc_cfg->enc_blk.cfg_common.bits_per_sample,
- enc_cfg->enc_blk.cfg_common.data_map,
+ enc_cfg->enc_blk.cfg_common.data_map[0],
+ enc_cfg->enc_blk.cfg_common.data_map[1],
+ enc_cfg->enc_blk.cfg_common.data_map[2],
+ enc_cfg->enc_blk.cfg_common.data_map[3]);
+ pr_debug("dev_id=0x%x\n",
enc_cfg->enc_blk.cfg_common.dev_id);
rc = apr_send_pkt(usc->apr, (uint32_t *) enc_cfg);
@@ -757,7 +762,7 @@
uint32_t total_cfg_size = sizeof(struct usm_stream_media_format_update);
uint32_t round_params_size = 0;
uint8_t is_allocated = 0;
-
+ size_t min_common_size;
if ((usc == NULL) || (us_cfg == NULL)) {
pr_err("%s: wrong input", __func__);
@@ -794,11 +799,13 @@
dec_cfg->hdr.opcode = USM_DATA_CMD_MEDIA_FORMAT_UPDATE;
dec_cfg->format_id = int_format;
- dec_cfg->cfg_size = sizeof(struct usm_cfg_common) +
+ min_common_size = min(sizeof(struct usm_cfg_common),
+ sizeof(struct usm_cfg_common_a));
+ dec_cfg->cfg_size = min_common_size +
USM_MAX_CFG_DATA_SIZE +
round_params_size;
memcpy(&(dec_cfg->cfg_common), &(us_cfg->cfg_common),
- sizeof(struct usm_cfg_common));
+ min_common_size);
/* Transparent data copy */
memcpy(dec_cfg->transp_data, us_cfg->params, us_cfg->params_size);
pr_debug("%s: cfg_size[%d], params_size[%d]; parambytes[%d,%d,%d,%d]\n",
diff --git a/arch/arm/mach-msm/qdsp6v2/ultrasound/version_b/q6usm_b.c b/arch/arm/mach-msm/qdsp6v2/ultrasound/version_b/q6usm_b.c
index a3af3e78..fe7c8c2 100644
--- a/arch/arm/mach-msm/qdsp6v2/ultrasound/version_b/q6usm_b.c
+++ b/arch/arm/mach-msm/qdsp6v2/ultrasound/version_b/q6usm_b.c
@@ -620,13 +620,13 @@
uint32_t int_format = INVALID_FORMAT;
switch (ext_format) {
case FORMAT_USPS_EPOS:
- int_format = US_POINT_EPOS_FORMAT;
+ int_format = US_POINT_EPOS_FORMAT_V2;
break;
case FORMAT_USRAW:
- int_format = US_RAW_FORMAT;
+ int_format = US_RAW_FORMAT_V2;
break;
case FORMAT_USPROX:
- int_format = US_PROX_FORMAT;
+ int_format = US_PROX_FORMAT_V2;
break;
default:
pr_err("%s: Invalid format[%d]\n", __func__, ext_format);
@@ -757,11 +757,19 @@
enc_cfg->enc_blk.transp_data[6],
enc_cfg->enc_blk.transp_data[7]
);
- pr_debug("%s: srate:%d, ch=%d, bps= %d; dmap:0x%x; dev_id=0x%x\n",
+ pr_debug("%s: srate:%d, ch=%d, bps= %d;\n",
__func__, enc_cfg->enc_blk.cfg_common.sample_rate,
enc_cfg->enc_blk.cfg_common.ch_cfg,
- enc_cfg->enc_blk.cfg_common.bits_per_sample,
- enc_cfg->enc_blk.cfg_common.data_map,
+ enc_cfg->enc_blk.cfg_common.bits_per_sample);
+ pr_debug("dmap:[0x%x,0x%x,0x%x,0x%x,0x%x,0x%x,0x%x,0x%x]; dev_id=0x%x\n",
+ enc_cfg->enc_blk.cfg_common.data_map[0],
+ enc_cfg->enc_blk.cfg_common.data_map[1],
+ enc_cfg->enc_blk.cfg_common.data_map[2],
+ enc_cfg->enc_blk.cfg_common.data_map[3],
+ enc_cfg->enc_blk.cfg_common.data_map[4],
+ enc_cfg->enc_blk.cfg_common.data_map[5],
+ enc_cfg->enc_blk.cfg_common.data_map[6],
+ enc_cfg->enc_blk.cfg_common.data_map[7],
enc_cfg->enc_blk.cfg_common.dev_id);
rc = apr_send_pkt(usc->apr, (uint32_t *) enc_cfg);
diff --git a/arch/arm/mach-msm/rpm_rbcpr_stats_v2.c b/arch/arm/mach-msm/rpm_rbcpr_stats_v2.c
new file mode 100644
index 0000000..8f0ccd4
--- /dev/null
+++ b/arch/arm/mach-msm/rpm_rbcpr_stats_v2.c
@@ -0,0 +1,430 @@
+/* Copyright (c) 2013, The Linux Foundation. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 and
+ * only version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ */
+
+#include <linux/debugfs.h>
+#include <linux/delay.h>
+#include <linux/errno.h>
+#include <linux/init.h>
+#include <linux/io.h>
+#include <linux/kernel.h>
+#include <linux/module.h>
+#include <linux/of.h>
+#include <linux/platform_device.h>
+#include <linux/sched.h>
+#include <linux/slab.h>
+#include <linux/types.h>
+#include <linux/mm.h>
+#include <linux/mutex.h>
+#include <linux/sort.h>
+#include <asm/uaccess.h>
+#include <mach/msm_iomap.h>
+
+#define RBCPR_BUF_LEN 8000
+#define RBCPR_STATS_MAX_SIZE SZ_2K
+#define RBCPR_MAX_RAILS 4
+#define RBCPR_NUM_RECMNDS 3
+#define RBCPR_NUM_CORNERS 3
+
+#define FIELD(a) ((strnstr(#a, "->", 80) + 2))
+#define PRINT(buf, pos, format, ...) \
+ ((pos < RBCPR_BUF_LEN) ? snprintf((buf + pos), (RBCPR_BUF_LEN - pos),\
+ format, ## __VA_ARGS__) : 0)
+
+enum {
+ CORNER_OFF,
+ CORNER_SVS,
+ CORNER_NOMINAL,
+ CORNER_TURBO,
+ CORNER_MAX,
+};
+
+struct rbcpr_recmnd_data_type {
+ uint32_t microvolts;
+ uint64_t timestamp;
+};
+
+struct rbcpr_corners_data_type {
+ uint32_t efuse_adjustment;
+ uint32_t programmed_voltage;
+ uint32_t isr_count;
+ uint32_t min_count;
+ uint32_t max_count;
+ struct rbcpr_recmnd_data_type rbcpr_recmnd[RBCPR_NUM_RECMNDS];
+};
+
+struct rbcpr_rail_stats_type {
+ uint32_t num_corners;
+ uint32_t num_latest_recommends;
+ struct rbcpr_corners_data_type rbcpr_corners[RBCPR_NUM_CORNERS];
+ uint32_t current_corner;
+ uint32_t railway_voltage;
+ uint32_t off_corner;
+ uint32_t margin;
+};
+
+struct rbcpr_stats_type {
+ uint32_t num_rails;
+ uint32_t status;
+ struct rbcpr_rail_stats_type *rbcpr_rail;
+};
+
+struct rbcpr_data_type {
+ void __iomem *start;
+ uint32_t len;
+ char buf[RBCPR_BUF_LEN];
+};
+
+static char *rbcpr_rail_labels[] = {
+ [0] = "VDD-CX",
+ [1] = "VDD-GFX",
+};
+
+static char *rbcpr_corner_string[] = {
+ [CORNER_OFF] = "CORNERS_OFF",
+ [CORNER_SVS] = "SVS",
+ [CORNER_NOMINAL] = "NOMINAL",
+ [CORNER_TURBO] = "TURBO",
+};
+#define CORNER_STRING(a) \
+ ((a >= CORNER_MAX) ? "INVALID Corner" : rbcpr_corner_string[a])
+
+static struct rbcpr_data_type *rbcpr_data;
+static struct rbcpr_stats_type *rbcpr_stats;
+
+static void msm_rpmrbcpr_read_rpm_data(void)
+{
+ uint32_t start_offset;
+ uint32_t stats_size;
+
+ start_offset = offsetof(struct rbcpr_stats_type, rbcpr_rail);
+ stats_size =
+ rbcpr_stats->num_rails * sizeof(struct rbcpr_rail_stats_type);
+
+ if (stats_size > RBCPR_STATS_MAX_SIZE) {
+ pr_err("%s: Max copy size exceeded. stats size %d max %d",
+ __func__, stats_size, RBCPR_STATS_MAX_SIZE);
+ return;
+ }
+
+ memcpy_fromio(rbcpr_stats->rbcpr_rail,
+ (rbcpr_data->start + start_offset), stats_size);
+}
+
+static uint32_t msm_rpmrbcpr_print_data(void)
+{
+ uint32_t pos = 0;
+ uint32_t i, j, k;
+ struct rbcpr_rail_stats_type *rail;
+ struct rbcpr_corners_data_type *corner;
+ struct rbcpr_recmnd_data_type *rbcpr_recmnd;
+ char *buf = rbcpr_data->buf;
+
+ pos += PRINT(buf, pos, ":RBCPR STATS\n");
+ pos += PRINT(buf, pos, "(%s: %d)", FIELD(rbcpr_stats->num_rails),
+ rbcpr_stats->num_rails);
+ pos += PRINT(buf, pos, "(%s: %d)\n", FIELD(rbcpr_stats->status),
+ rbcpr_stats->status);
+
+
+ for (i = 0; i < rbcpr_stats->num_rails; i++) {
+ rail = &rbcpr_stats->rbcpr_rail[i];
+ pos += PRINT(buf, pos, ":%s Rail Data\n", rbcpr_rail_labels[i]);
+ pos += PRINT(buf, pos, "(%s: %s)",
+ FIELD(rail->current_corner),
+ CORNER_STRING(rail->current_corner));
+ pos += PRINT(buf, pos, "(%s: %d)",
+ FIELD(rail->railway_voltage), rail->railway_voltage);
+ pos += PRINT(buf, pos, "(%s: %d)",
+ FIELD(rail->off_corner), rail->off_corner);
+ pos += PRINT(buf, pos, "(%s: %d)\n",
+ FIELD(rail->margin), rail->margin);
+
+ for (j = 0; j < RBCPR_NUM_CORNERS; j++) {
+ pos += PRINT(buf, pos, "\t\tCorner Data:%s ",
+ CORNER_STRING(j + 1));
+ corner = &rail->rbcpr_corners[j];
+ pos += PRINT(buf, pos, "(%s: %d)",
+ FIELD(corner->efuse_adjustment),
+ corner->efuse_adjustment);
+ pos += PRINT(buf, pos, "(%s: %d)",
+ FIELD(corner->programmed_voltage),
+ corner->programmed_voltage);
+ pos += PRINT(buf, pos, "(%s: %d)",
+ FIELD(corner->isr_count), corner->isr_count);
+ pos += PRINT(buf, pos, "(%s: %d)",
+ FIELD(corner->min_count), corner->min_count);
+ pos += PRINT(buf, pos, "(%s: %d)\n",
+ FIELD(corner->max_count), corner->max_count);
+
+
+ for (k = 0; k < RBCPR_NUM_RECMNDS; k++) {
+ rbcpr_recmnd = &corner->rbcpr_recmnd[k];
+ pos += PRINT(buf, pos,
+ "\t\t\t\tVoltage History[%d] ", k);
+ pos += PRINT(buf, pos, " (%s: %d) ",
+ FIELD(rbcpr_recmd->microvolts),
+ rbcpr_recmnd->microvolts);
+ pos += PRINT(buf, pos, " (%s: %lld)\n",
+ FIELD(rbcpr_recmd->timestamp),
+ rbcpr_recmnd->timestamp);
+ }
+ }
+ }
+
+ return pos;
+}
+
+
+static int msm_rpmrbcpr_file_read(struct file *file, char __user *bufu,
+ size_t count, loff_t *ppos)
+{
+ struct rbcpr_data_type *pdata = file->private_data;
+ int ret = 0;
+ int status_counter;
+ static DEFINE_MUTEX(rbcpr_lock);
+
+ mutex_lock(&rbcpr_lock);
+ if (!pdata) {
+ pr_err("%s pdata is null", __func__);
+ ret = -EINVAL;
+ goto exit_rpmrbcpr_file_read;
+ }
+
+ if (!bufu || count < 0) {
+ pr_err("%s count %d ", __func__, count);
+ ret = -EINVAL;
+ goto exit_rpmrbcpr_file_read;
+ }
+
+ if (*ppos > pdata->len || !*ppos) {
+ /* Read RPM stats */
+ status_counter = readl_relaxed(pdata->start +
+ offsetof(struct rbcpr_stats_type, status));
+ if (status_counter != rbcpr_stats->status) {
+ msm_rpmrbcpr_read_rpm_data();
+ rbcpr_stats->status = status_counter;
+ }
+ pdata->len = msm_rpmrbcpr_print_data();
+ *ppos = 0;
+ }
+
+ /* copy to user data*/
+ ret = simple_read_from_buffer(bufu, count, ppos, pdata->buf,
+ pdata->len);
+exit_rpmrbcpr_file_read:
+ mutex_unlock(&rbcpr_lock);
+ return ret;
+}
+
+static int msm_rpmrbcpr_file_open(struct inode *inode, struct file *file)
+{
+ file->private_data = rbcpr_data;
+
+ if (!rbcpr_data->start)
+ return -ENODEV;
+
+ return 0;
+}
+
+static int msm_rpmrbcpr_file_close(struct inode *inode, struct file *file)
+{
+ return 0;
+}
+
+static const struct file_operations msm_rpmrbcpr_fops = {
+ .owner = THIS_MODULE,
+ .open = msm_rpmrbcpr_file_open,
+ .read = msm_rpmrbcpr_file_read,
+ .release = msm_rpmrbcpr_file_close,
+ .llseek = no_llseek,
+};
+
+static int msm_rpmrbcpr_memalloc(struct platform_device *pdev)
+{
+ void *addr = NULL;
+ int ret = 0;
+ uint32_t num_latest_recommends = 0;
+ uint32_t num_corners = 0;
+
+ rbcpr_stats->num_rails = readl_relaxed(rbcpr_data->start);
+
+ if (rbcpr_stats->num_rails > RBCPR_MAX_RAILS) {
+ pr_err("%s: Invalid number of RPM RBCPR rails %d",
+ __func__, rbcpr_stats->num_rails);
+ rbcpr_stats->num_rails = 0;
+ ret = -EFAULT;
+ goto rbcpr_memalloc_fail;
+ }
+
+ rbcpr_stats->rbcpr_rail =
+ devm_kzalloc(&pdev->dev,
+ sizeof(struct rbcpr_rail_stats_type) *
+ rbcpr_stats->num_rails, GFP_KERNEL);
+
+ if (!rbcpr_stats->rbcpr_rail) {
+ ret = -ENOMEM;
+ goto rbcpr_memalloc_fail;
+ }
+
+ addr = rbcpr_data->start + offsetof(struct rbcpr_stats_type,
+ rbcpr_rail);
+
+ /* Each rail has the same number of corners and number of latest
+ recommended values. Read these from the first rail and check them
+ to make sure the values are valid. (RPM doesn't 0 initialize this
+ memory region, so its possible we end up with bogus values if the
+ rbcpr driver is not initialized.).
+ */
+ num_corners = readl_relaxed(addr);
+ num_latest_recommends = readl_relaxed(addr +
+ offsetof(struct rbcpr_rail_stats_type,
+ num_latest_recommends));
+
+ if ((num_latest_recommends != RBCPR_NUM_RECMNDS)
+ || (num_corners != RBCPR_NUM_CORNERS)) {
+ pr_err("%s: Invalid num corners %d, num recmnds %d",
+ __func__, num_corners, num_latest_recommends);
+ ret = -EFAULT;
+ goto rbcpr_memalloc_fail;
+ }
+
+rbcpr_memalloc_fail:
+ return ret;
+}
+
+static int __devinit msm_rpmrbcpr_probe(struct platform_device *pdev)
+{
+ struct dentry *dent;
+ int ret = 0;
+ struct resource *res = NULL;
+ void __iomem *start_ptr = NULL;
+ uint32_t rbcpr_start_addr = 0;
+ char *key = NULL;
+ uint32_t start_addr;
+
+ rbcpr_data = devm_kzalloc(&pdev->dev,
+ sizeof(struct rbcpr_data_type), GFP_KERNEL);
+
+ if (!rbcpr_data)
+ return -ENOMEM;
+
+ rbcpr_stats = devm_kzalloc(&pdev->dev,
+ sizeof(struct rbcpr_stats_type), GFP_KERNEL);
+
+ if (!rbcpr_stats) {
+ pr_err("%s: Failed to allocate memory for RBCPR stats",
+ __func__);
+ return -ENOMEM;
+ }
+
+ res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+
+ if (!res) {
+ pr_err("%s: Failed to get IO resource from platform device",
+ __func__);
+ ret = -ENXIO;
+ goto rbcpr_probe_fail;
+ }
+
+ key = "qcom,start-offset";
+ ret = of_property_read_u32(pdev->dev.of_node, key, &start_addr);
+
+ if (ret) {
+ pr_err("%s: Failed to get start offset", __func__);
+ goto rbcpr_probe_fail;
+ }
+
+ start_addr += res->start;
+ start_ptr = ioremap_nocache(start_addr, 4);
+
+ if (!start_ptr) {
+ pr_err("%s: Failed to remap RBCPR start pointer",
+ __func__);
+ goto rbcpr_probe_fail;
+ }
+
+ rbcpr_start_addr = res->start + readl_relaxed(start_ptr);
+
+ if ((rbcpr_start_addr > (res->end - RBCPR_STATS_MAX_SIZE)) ||
+ (rbcpr_start_addr < start_addr)) {
+ pr_err("%s: Invalid start address for rbcpr stats 0x%x",
+ __func__, rbcpr_start_addr);
+ goto rbcpr_probe_fail;
+ }
+
+ rbcpr_data->start = devm_ioremap_nocache(&pdev->dev, rbcpr_start_addr,
+ RBCPR_STATS_MAX_SIZE);
+
+ if (!rbcpr_data->start) {
+ pr_err("%s: Failed to remap RBCPR start address",
+ __func__);
+ goto rbcpr_probe_fail;
+ }
+
+ ret = msm_rpmrbcpr_memalloc(pdev);
+
+ if (ret)
+ goto rbcpr_probe_fail;
+
+ dent = debugfs_create_file("rpm_rbcpr", S_IRUGO, NULL,
+ pdev->dev.platform_data, &msm_rpmrbcpr_fops);
+
+ if (!dent) {
+ pr_err("%s: error debugfs_create_file failed\n", __func__);
+ ret = -ENOMEM;
+ goto rbcpr_probe_fail;
+ }
+
+ platform_set_drvdata(pdev, dent);
+rbcpr_probe_fail:
+ iounmap(start_ptr);
+ return ret;
+}
+
+static int __devexit msm_rpmrbcpr_remove(struct platform_device *pdev)
+{
+ struct dentry *dent;
+
+ dent = platform_get_drvdata(pdev);
+ debugfs_remove(dent);
+ platform_set_drvdata(pdev, NULL);
+ return 0;
+}
+
+static struct of_device_id rpmrbcpr_stats_table[] = {
+ {.compatible = "qcom,rpmrbcpr-stats"},
+ {},
+};
+
+static struct platform_driver msm_rpmrbcpr_driver = {
+ .probe = msm_rpmrbcpr_probe,
+ .remove = __devexit_p(msm_rpmrbcpr_remove),
+ .driver = {
+ .name = "msm_rpmrbcpr_stats",
+ .owner = THIS_MODULE,
+ .of_match_table = rpmrbcpr_stats_table,
+ },
+};
+
+static int __init msm_rpmrbcpr_init(void)
+{
+ return platform_driver_register(&msm_rpmrbcpr_driver);
+}
+
+static void __exit msm_rpmrbcpr_exit(void)
+{
+ platform_driver_unregister(&msm_rpmrbcpr_driver);
+}
+
+module_init(msm_rpmrbcpr_init);
+module_exit(msm_rpmrbcpr_exit);
diff --git a/arch/arm/mach-msm/scm-pas.c b/arch/arm/mach-msm/scm-pas.c
index f48b538..4cb43b1 100644
--- a/arch/arm/mach-msm/scm-pas.c
+++ b/arch/arm/mach-msm/scm-pas.c
@@ -17,6 +17,8 @@
#include <linux/string.h>
#include <linux/clk.h>
+#include <asm/cacheflush.h>
+
#include <mach/scm.h>
#include <mach/socinfo.h>
#include <mach/msm_bus.h>
@@ -150,6 +152,10 @@
request.proc = id;
request.image_addr = virt_to_phys(mdata_buf);
+ /* Flush metadata to ensure secure world doesn't read stale data */
+ __cpuc_flush_dcache_area(mdata_buf, size);
+ outer_flush_range(request.image_addr, request.image_addr + size);
+
ret = scm_call(SCM_SVC_PIL, PAS_INIT_IMAGE_CMD, &request,
sizeof(request), &scm_ret, sizeof(scm_ret));
diff --git a/arch/arm/mach-msm/subsystem_restart.c b/arch/arm/mach-msm/subsystem_restart.c
index a5e04cd..7b1a4c3 100644
--- a/arch/arm/mach-msm/subsystem_restart.c
+++ b/arch/arm/mach-msm/subsystem_restart.c
@@ -952,8 +952,8 @@
static irqreturn_t subsys_err_ready_intr_handler(int irq, void *subsys)
{
struct subsys_device *subsys_dev = subsys;
- pr_info("Error ready interrupt occured for %s\n",
- subsys_dev->desc->name);
+ dev_info(subsys_dev->desc->dev,
+ "Subsystem error monitoring/handling services are up\n");
if (subsys_dev->desc->is_not_loadable)
return IRQ_HANDLED;
diff --git a/arch/arm/mm/dma-mapping.c b/arch/arm/mm/dma-mapping.c
index 1c8a25d..4ff4b3e 100644
--- a/arch/arm/mm/dma-mapping.c
+++ b/arch/arm/mm/dma-mapping.c
@@ -747,16 +747,17 @@
if (PageHighMem(page)) {
if (len + offset > PAGE_SIZE)
len = PAGE_SIZE - offset;
- vaddr = kmap_high_get(page);
- if (vaddr) {
- vaddr += offset;
- op(vaddr, len, dir);
- kunmap_high(page);
- } else if (cache_is_vipt()) {
- /* unmapped pages might still be cached */
+
+ if (cache_is_vipt_nonaliasing()) {
vaddr = kmap_atomic(page);
op(vaddr + offset, len, dir);
kunmap_atomic(vaddr);
+ } else {
+ vaddr = kmap_high_get(page);
+ if (vaddr) {
+ op(vaddr + offset, len, dir);
+ kunmap_high(page);
+ }
}
} else {
vaddr = page_address(page) + offset;
diff --git a/arch/arm/mm/flush.c b/arch/arm/mm/flush.c
index 7745854..839a18e 100644
--- a/arch/arm/mm/flush.c
+++ b/arch/arm/mm/flush.c
@@ -170,15 +170,18 @@
if (!PageHighMem(page)) {
__cpuc_flush_dcache_area(page_address(page), PAGE_SIZE);
} else {
- void *addr = kmap_high_get(page);
- if (addr) {
- __cpuc_flush_dcache_area(addr, PAGE_SIZE);
- kunmap_high(page);
- } else if (cache_is_vipt()) {
- /* unmapped pages might still be cached */
+ void *addr;
+
+ if (cache_is_vipt_nonaliasing()) {
addr = kmap_atomic(page);
__cpuc_flush_dcache_area(addr, PAGE_SIZE);
kunmap_atomic(addr);
+ } else {
+ addr = kmap_high_get(page);
+ if (addr) {
+ __cpuc_flush_dcache_area(addr, PAGE_SIZE);
+ kunmap_high(page);
+ }
}
}
diff --git a/arch/arm/mm/mmu.c b/arch/arm/mm/mmu.c
index 266be05..e65b5ba 100644
--- a/arch/arm/mm/mmu.c
+++ b/arch/arm/mm/mmu.c
@@ -326,6 +326,44 @@
}
EXPORT_SYMBOL(get_mem_type);
+#define PTE_SET_FN(_name, pteop) \
+static int pte_set_##_name(pte_t *ptep, pgtable_t token, unsigned long addr, \
+ void *data) \
+{ \
+ pte_t pte = pteop(*ptep); \
+\
+ set_pte_ext(ptep, pte, 0); \
+ return 0; \
+} \
+
+#define SET_MEMORY_FN(_name, callback) \
+int set_memory_##_name(unsigned long addr, int numpages) \
+{ \
+ unsigned long start = addr; \
+ unsigned long size = PAGE_SIZE*numpages; \
+ unsigned end = start + size; \
+\
+ if (start < MODULES_VADDR || start >= MODULES_END) \
+ return -EINVAL;\
+\
+ if (end < MODULES_VADDR || end >= MODULES_END) \
+ return -EINVAL; \
+\
+ apply_to_page_range(&init_mm, start, size, callback, NULL); \
+ flush_tlb_kernel_range(start, end); \
+ return 0;\
+}
+
+PTE_SET_FN(ro, pte_wrprotect)
+PTE_SET_FN(rw, pte_mkwrite)
+PTE_SET_FN(x, pte_mkexec)
+PTE_SET_FN(nx, pte_mknexec)
+
+SET_MEMORY_FN(ro, pte_set_ro)
+SET_MEMORY_FN(rw, pte_set_rw)
+SET_MEMORY_FN(x, pte_set_x)
+SET_MEMORY_FN(nx, pte_set_nx)
+
/*
* Adjust the PMD section entries according to the CPU in use.
*/
diff --git a/drivers/base/Makefile b/drivers/base/Makefile
index cb4528f..7a0d23b 100644
--- a/drivers/base/Makefile
+++ b/drivers/base/Makefile
@@ -22,6 +22,7 @@
obj-$(CONFIG_SYS_HYPERVISOR) += hypervisor.o
obj-$(CONFIG_REGMAP) += regmap/
obj-$(CONFIG_SOC_BUS) += soc.o
+obj-$(CONFIG_PINCTRL) += pinctrl.o
obj-$(CONFIG_SYNC) += sync.o
obj-$(CONFIG_SW_SYNC) += sw_sync.o
diff --git a/drivers/base/bus.c b/drivers/base/bus.c
index 26a06b8..770e1d6 100644
--- a/drivers/base/bus.c
+++ b/drivers/base/bus.c
@@ -715,12 +715,12 @@
if (error)
goto out_unregister;
+ klist_add_tail(&priv->knode_bus, &bus->p->klist_drivers);
if (drv->bus->p->drivers_autoprobe) {
error = driver_attach(drv);
if (error)
goto out_unregister;
}
- klist_add_tail(&priv->knode_bus, &bus->p->klist_drivers);
module_add_driver(drv->owner, drv);
error = driver_create_file(drv, &driver_attr_uevent);
diff --git a/drivers/base/dd.c b/drivers/base/dd.c
index 1b1cbb5..b3a7d6e 100644
--- a/drivers/base/dd.c
+++ b/drivers/base/dd.c
@@ -24,6 +24,7 @@
#include <linux/wait.h>
#include <linux/async.h>
#include <linux/pm_runtime.h>
+#include <linux/pinctrl/devinfo.h>
#include "base.h"
#include "power/power.h"
@@ -257,6 +258,12 @@
WARN_ON(!list_empty(&dev->devres_head));
dev->driver = drv;
+
+ /* If using pinctrl, bind pins now before probing */
+ ret = pinctrl_bind_pins(dev);
+ if (ret)
+ goto probe_failed;
+
if (driver_sysfs_add(dev)) {
printk(KERN_ERR "%s: driver_sysfs_add(%s) failed\n",
__func__, dev_name(dev));
diff --git a/drivers/base/pinctrl.c b/drivers/base/pinctrl.c
new file mode 100644
index 0000000..67a274e
--- /dev/null
+++ b/drivers/base/pinctrl.c
@@ -0,0 +1,69 @@
+/*
+ * Driver core interface to the pinctrl subsystem.
+ *
+ * Copyright (C) 2012 ST-Ericsson SA
+ * Written on behalf of Linaro for ST-Ericsson
+ * Based on bits of regulator core, gpio core and clk core
+ *
+ * Author: Linus Walleij <linus.walleij@linaro.org>
+ *
+ * License terms: GNU General Public License (GPL) version 2
+ */
+
+#include <linux/device.h>
+#include <linux/pinctrl/devinfo.h>
+#include <linux/pinctrl/consumer.h>
+#include <linux/slab.h>
+
+/**
+ * pinctrl_bind_pins() - called by the device core before probe
+ * @dev: the device that is just about to probe
+ */
+int pinctrl_bind_pins(struct device *dev)
+{
+ int ret;
+
+ dev->pins = devm_kzalloc(dev, sizeof(*(dev->pins)), GFP_KERNEL);
+ if (!dev->pins)
+ return -ENOMEM;
+
+ dev->pins->p = devm_pinctrl_get(dev);
+ if (IS_ERR(dev->pins->p)) {
+ dev_dbg(dev, "no pinctrl handle\n");
+ ret = PTR_ERR(dev->pins->p);
+ goto cleanup_alloc;
+ }
+
+ dev->pins->default_state = pinctrl_lookup_state(dev->pins->p,
+ PINCTRL_STATE_DEFAULT);
+ if (IS_ERR(dev->pins->default_state)) {
+ dev_dbg(dev, "no default pinctrl state\n");
+ ret = 0;
+ goto cleanup_get;
+ }
+
+ ret = pinctrl_select_state(dev->pins->p, dev->pins->default_state);
+ if (ret) {
+ dev_dbg(dev, "failed to activate default pinctrl state\n");
+ goto cleanup_get;
+ }
+
+ return 0;
+
+ /*
+ * If no pinctrl handle or default state was found for this device,
+ * let's explicitly free the pin container in the device, there is
+ * no point in keeping it around.
+ */
+cleanup_get:
+ devm_pinctrl_put(dev->pins->p);
+cleanup_alloc:
+ devm_kfree(dev, dev->pins);
+ dev->pins = NULL;
+
+ /* Only return deferrals */
+ if (ret != -EPROBE_DEFER)
+ ret = 0;
+
+ return ret;
+}
diff --git a/drivers/char/adsprpc.c b/drivers/char/adsprpc.c
index e98fff2..83d94f1 100644
--- a/drivers/char/adsprpc.c
+++ b/drivers/char/adsprpc.c
@@ -87,7 +87,7 @@
static inline int buf_get_pages(void *addr, int sz, int nr_pages, int access,
struct smq_phy_page *pages, int nr_elems)
{
- struct vm_area_struct *vma;
+ struct vm_area_struct *vma, *vmaend;
uint32_t start = buf_page_start(addr);
uint32_t end = buf_page_start((void *)((uint32_t)addr + sz - 1));
uint32_t len = nr_pages << PAGE_SHIFT;
@@ -101,14 +101,14 @@
VERIFY(err, 0 != (vma = find_vma(current->mm, start)));
if (err)
goto bail;
- VERIFY(err, ((uint32_t)addr + sz) <= vma->vm_end);
+ VERIFY(err, 0 != (vmaend = find_vma(current->mm, end)));
if (err)
goto bail;
n = 0;
VERIFY(err, 0 == follow_pfn(vma, start, &pfn));
if (err)
goto bail;
- VERIFY(err, 0 == follow_pfn(vma, end, &pfnend));
+ VERIFY(err, 0 == follow_pfn(vmaend, end, &pfnend));
if (err)
goto bail;
VERIFY(err, (pfn + nr_pages - 1) == pfnend);
diff --git a/drivers/char/diag/diag_dci.c b/drivers/char/diag/diag_dci.c
index fa0e9d7..5027107 100644
--- a/drivers/char/diag/diag_dci.c
+++ b/drivers/char/diag/diag_dci.c
@@ -42,6 +42,32 @@
#define DCI_CHK_CAPACITY(entry, new_data_len) \
((entry->data_len + new_data_len > entry->total_capacity) ? 1 : 0) \
+#ifdef CONFIG_DEBUG_FS
+struct diag_dci_data_info *dci_data_smd;
+struct mutex dci_stat_mutex;
+
+void diag_dci_smd_record_info(int read_bytes)
+{
+ static int curr_dci_data_smd;
+ static unsigned long iteration;
+ struct diag_dci_data_info *temp_data = dci_data_smd;
+ if (!temp_data)
+ return;
+ mutex_lock(&dci_stat_mutex);
+ if (curr_dci_data_smd == DIAG_DCI_DEBUG_CNT)
+ curr_dci_data_smd = 0;
+ temp_data += curr_dci_data_smd;
+ temp_data->iteration = iteration + 1;
+ temp_data->data_size = read_bytes;
+ diag_get_timestamp(temp_data->time_stamp);
+ curr_dci_data_smd++;
+ iteration++;
+ mutex_unlock(&dci_stat_mutex);
+}
+#else
+void diag_dci_smd_record_info(int read_bytes) { }
+#endif
+
/* Process the data read from the smd dci channel */
int diag_process_smd_dci_read_data(struct diag_smd_info *smd_info, void *buf,
int recd_bytes)
@@ -49,6 +75,7 @@
int read_bytes, dci_pkt_len, i;
uint8_t recv_pkt_cmd_code;
+ diag_dci_smd_record_info(recd_bytes);
/* Each SMD read can have multiple DCI packets */
read_bytes = 0;
while (read_bytes < recd_bytes) {
@@ -118,6 +145,7 @@
if (i != DCI_CLIENT_INDEX_INVALID) {
/* copy pkt rsp in client buf */
entry = &(driver->dci_client_tbl[i]);
+ mutex_lock(&entry->data_mutex);
if (DCI_CHK_CAPACITY(entry, 8+write_len)) {
pr_alert("diag: create capacity for pkt rsp\n");
entry->total_capacity += 8+write_len;
@@ -125,6 +153,7 @@
entry->total_capacity, GFP_KERNEL);
if (!temp_buf) {
pr_err("diag: DCI realloc failed\n");
+ mutex_unlock(&entry->data_mutex);
return;
} else {
entry->dci_data = temp_buf;
@@ -139,6 +168,7 @@
memcpy(entry->dci_data+entry->data_len,
buf+4+cmd_code_len, write_len);
entry->data_len += write_len;
+ mutex_unlock(&entry->data_mutex);
/* delete immediate response entry */
if (smd_info->buf_in_1[8+cmd_code_len] != 0x80)
driver->req_tracking_tbl[index].pid = 0;
@@ -213,6 +243,7 @@
event_mask_ptr = entry->dci_event_mask +
byte_index;
mutex_lock(&dci_health_mutex);
+ mutex_lock(&entry->data_mutex);
if (*event_mask_ptr & byte_mask) {
/* copy to client buffer */
if (DCI_CHK_CAPACITY(entry,
@@ -221,6 +252,8 @@
driver->dci_client_tbl[i].
dropped_events++;
mutex_unlock(
+ &entry->data_mutex);
+ mutex_unlock(
&dci_health_mutex);
break;
}
@@ -234,6 +267,7 @@
, total_event_len);
entry->data_len += 4 + total_event_len;
}
+ mutex_unlock(&entry->data_mutex);
mutex_unlock(&dci_health_mutex);
}
}
@@ -270,6 +304,7 @@
return;
log_mask_ptr = log_mask_ptr + byte_offset;
mutex_lock(&dci_health_mutex);
+ mutex_lock(&entry->data_mutex);
if (*log_mask_ptr & byte_mask) {
pr_debug("\t log code %x needed by client %d",
log_code, entry->client->tgid);
@@ -280,6 +315,8 @@
driver->dci_client_tbl[i].
dropped_logs++;
mutex_unlock(
+ &entry->data_mutex);
+ mutex_unlock(
&dci_health_mutex);
return;
}
@@ -290,6 +327,7 @@
buf + 4, *(uint16_t *)(buf + 2));
entry->data_len += 4 + *(uint16_t *)(buf + 2);
}
+ mutex_unlock(&entry->data_mutex);
mutex_unlock(&dci_health_mutex);
}
}
@@ -1214,8 +1252,10 @@
platform_driver_unregister(&msm_diag_dci_driver);
if (driver->dci_client_tbl) {
- for (i = 0; i < MAX_DCI_CLIENTS; i++)
+ for (i = 0; i < MAX_DCI_CLIENTS; i++) {
kfree(driver->dci_client_tbl[i].dci_data);
+ mutex_destroy(&driver->dci_client_tbl[i].data_mutex);
+ }
}
if (driver->supports_separate_cmdrsp) {
diff --git a/drivers/char/diag/diag_dci.h b/drivers/char/diag/diag_dci.h
index d530de9..22f2cad 100644
--- a/drivers/char/diag/diag_dci.h
+++ b/drivers/char/diag/diag_dci.h
@@ -28,6 +28,10 @@
#define DCI_LOG_CON_MIN_LEN 14
#define DCI_EVENT_CON_MIN_LEN 16
+#ifdef CONFIG_DEBUG_FS
+#define DIAG_DCI_DEBUG_CNT 100
+#define DIAG_DCI_DEBUG_LEN 100
+#endif
/* 16 log code categories, each has:
* 1 bytes equip id + 1 dirty byte + 512 byte max log mask
@@ -61,6 +65,7 @@
int dropped_events;
int received_logs;
int received_events;
+ struct mutex data_mutex;
};
/* This is used for DCI health stats */
@@ -89,6 +94,18 @@
DIAG_DCI_TABLE_ERR /* Error dealing with registration tables */
};
+#ifdef CONFIG_DEBUG_FS
+/* To collect debug information during each smd read */
+struct diag_dci_data_info {
+ unsigned long iteration;
+ int data_size;
+ char time_stamp[DIAG_TS_SIZE];
+};
+
+extern struct diag_dci_data_info *dci_data_smd;
+extern struct mutex dci_stat_mutex;
+#endif
+
int diag_dci_init(void);
void diag_dci_exit(void);
void diag_update_smd_dci_work_fn(struct work_struct *);
@@ -117,4 +134,5 @@
void create_dci_event_mask_tbl(unsigned char *tbl_buf);
int diag_dci_clear_event_mask(void);
int diag_dci_query_event_mask(uint16_t event_id);
+void diag_dci_smd_record_info(int read_bytes);
#endif
diff --git a/drivers/char/diag/diag_debugfs.c b/drivers/char/diag/diag_debugfs.c
index 71eda68..6b0931c 100644
--- a/drivers/char/diag/diag_debugfs.c
+++ b/drivers/char/diag/diag_debugfs.c
@@ -18,11 +18,15 @@
#include "diagfwd.h"
#include "diagfwd_bridge.h"
#include "diagfwd_hsic.h"
+#include "diagmem.h"
+#include "diag_dci.h"
#define DEBUG_BUF_SIZE 4096
static struct dentry *diag_dbgfs_dent;
static int diag_dbgfs_table_index;
static int diag_dbgfs_finished;
+static int diag_dbgfs_dci_data_index;
+static int diag_dbgfs_dci_finished;
static ssize_t diag_dbgfs_read_status(struct file *file, char __user *ubuf,
size_t count, loff_t *ppos)
@@ -109,6 +113,70 @@
return ret;
}
+static ssize_t diag_dbgfs_read_dcistats(struct file *file,
+ char __user *ubuf, size_t count, loff_t *ppos)
+{
+ char *buf = NULL;
+ int bytes_remaining, bytes_written = 0, bytes_in_buf = 0, i = 0;
+ struct diag_dci_data_info *temp_data = dci_data_smd;
+ int buf_size = (DEBUG_BUF_SIZE < count) ? DEBUG_BUF_SIZE : count;
+
+ if (diag_dbgfs_dci_finished) {
+ diag_dbgfs_dci_finished = 0;
+ return 0;
+ }
+
+ buf = kzalloc(sizeof(char) * buf_size, GFP_KERNEL);
+ if (ZERO_OR_NULL_PTR(buf)) {
+ pr_err("diag: %s, Error allocating memory\n", __func__);
+ return -ENOMEM;
+ }
+
+ bytes_remaining = buf_size;
+
+ if (diag_dbgfs_dci_data_index == 0) {
+ bytes_written =
+ scnprintf(buf, buf_size,
+ "number of clients: %d\n",
+ driver->num_dci_client);
+ bytes_in_buf += bytes_written;
+ bytes_remaining -= bytes_written;
+#ifdef CONFIG_DIAG_OVER_USB
+ bytes_written = scnprintf(buf+bytes_in_buf, bytes_remaining,
+ "usb_connected: %d\n",
+ driver->usb_connected);
+ bytes_in_buf += bytes_written;
+ bytes_remaining -= bytes_written;
+#endif
+ }
+ temp_data += diag_dbgfs_dci_data_index;
+ for (i = diag_dbgfs_dci_data_index; i < DIAG_DCI_DEBUG_CNT; i++) {
+ if (temp_data->iteration != 0) {
+ bytes_written = scnprintf(
+ buf + bytes_in_buf, bytes_remaining,
+ "i %-20ld\t"
+ "s %-20d\t"
+ "t %-20s\n",
+ temp_data->iteration,
+ temp_data->data_size,
+ temp_data->time_stamp);
+ bytes_in_buf += bytes_written;
+ bytes_remaining -= bytes_written;
+ /* Check if there is room for another entry */
+ if (bytes_remaining < bytes_written)
+ break;
+ }
+ temp_data++;
+ }
+
+ diag_dbgfs_dci_data_index = (i >= DIAG_DCI_DEBUG_CNT) ? 0 : i + 1;
+ bytes_written = simple_read_from_buffer(ubuf, count, ppos, buf,
+ bytes_in_buf);
+ kfree(buf);
+ diag_dbgfs_dci_finished = 1;
+ return bytes_written;
+}
+
static ssize_t diag_dbgfs_read_workpending(struct file *file,
char __user *ubuf, size_t count, loff_t *ppos)
{
@@ -248,6 +316,102 @@
}
#ifdef CONFIG_DIAGFWD_BRIDGE_CODE
+static ssize_t diag_dbgfs_read_mempool(struct file *file, char __user *ubuf,
+ size_t count, loff_t *ppos)
+{
+ char *buf = NULL;
+ int ret = 0, i = 0;
+
+ buf = kzalloc(sizeof(char) * DEBUG_BUF_SIZE, GFP_KERNEL);
+ if (ZERO_OR_NULL_PTR(buf)) {
+ pr_err("diag: %s, Error allocating memory\n", __func__);
+ return -ENOMEM;
+ }
+
+ ret = scnprintf(buf, DEBUG_BUF_SIZE,
+ "POOL_TYPE_COPY: [0x%p : 0x%p] count = %d\n"
+ "POOL_TYPE_HDLC: [0x%p : 0x%p] count = %d\n"
+ "POOL_TYPE_USER: [0x%p : 0x%p] count = %d\n"
+ "POOL_TYPE_WRITE_STRUCT: [0x%p : 0x%p] count = %d\n",
+ driver->diagpool,
+ diag_pools_array[POOL_COPY_IDX],
+ driver->count,
+ driver->diag_hdlc_pool,
+ diag_pools_array[POOL_HDLC_IDX],
+ driver->count_hdlc_pool,
+ driver->diag_user_pool,
+ diag_pools_array[POOL_USER_IDX],
+ driver->count_user_pool,
+ driver->diag_write_struct_pool,
+ diag_pools_array[POOL_WRITE_STRUCT_IDX],
+ driver->count_write_struct_pool);
+
+ for (i = 0; i < MAX_HSIC_CH; i++) {
+ if (!diag_hsic[i].hsic_inited)
+ continue;
+ ret += scnprintf(buf+ret, DEBUG_BUF_SIZE-ret,
+ "POOL_TYPE_HSIC_%d: [0x%p : 0x%p] count = %d\n",
+ i+1,
+ diag_hsic[i].diag_hsic_pool,
+ diag_pools_array[POOL_HSIC_IDX + i],
+ diag_hsic[i].count_hsic_pool);
+ }
+
+ for (i = 0; i < MAX_HSIC_CH; i++) {
+ if (!diag_hsic[i].hsic_inited)
+ continue;
+ ret += scnprintf(buf+ret, DEBUG_BUF_SIZE-ret,
+ "POOL_TYPE_HSIC_%d_WRITE: [0x%p : 0x%p] count = %d\n",
+ i+1,
+ diag_hsic[i].diag_hsic_write_pool,
+ diag_pools_array[POOL_HSIC_WRITE_IDX + i],
+ diag_hsic[i].count_hsic_write_pool);
+ }
+
+ ret = simple_read_from_buffer(ubuf, count, ppos, buf, ret);
+
+ kfree(buf);
+ return ret;
+}
+#else
+static ssize_t diag_dbgfs_read_mempool(struct file *file, char __user *ubuf,
+ size_t count, loff_t *ppos)
+{
+ char *buf = NULL;
+ int ret = 0;
+
+ buf = kzalloc(sizeof(char) * DEBUG_BUF_SIZE, GFP_KERNEL);
+ if (ZERO_OR_NULL_PTR(buf)) {
+ pr_err("diag: %s, Error allocating memory\n", __func__);
+ return -ENOMEM;
+ }
+
+ ret = scnprintf(buf, DEBUG_BUF_SIZE,
+ "POOL_TYPE_COPY: [0x%p : 0x%p] count = %d\n"
+ "POOL_TYPE_HDLC: [0x%p : 0x%p] count = %d\n"
+ "POOL_TYPE_USER: [0x%p : 0x%p] count = %d\n"
+ "POOL_TYPE_WRITE_STRUCT: [0x%p : 0x%p] count = %d\n",
+ driver->diagpool,
+ diag_pools_array[POOL_COPY_IDX],
+ driver->count,
+ driver->diag_hdlc_pool,
+ diag_pools_array[POOL_HDLC_IDX],
+ driver->count_hdlc_pool,
+ driver->diag_user_pool,
+ diag_pools_array[POOL_USER_IDX],
+ driver->count_user_pool,
+ driver->diag_write_struct_pool,
+ diag_pools_array[POOL_WRITE_STRUCT_IDX],
+ driver->count_write_struct_pool);
+
+ ret = simple_read_from_buffer(ubuf, count, ppos, buf, ret);
+
+ kfree(buf);
+ return ret;
+}
+#endif
+
+#ifdef CONFIG_DIAGFWD_BRIDGE_CODE
static ssize_t diag_dbgfs_read_bridge(struct file *file, char __user *ubuf,
size_t count, loff_t *ppos)
{
@@ -383,6 +547,14 @@
.read = diag_dbgfs_read_workpending,
};
+const struct file_operations diag_dbgfs_mempool_ops = {
+ .read = diag_dbgfs_read_mempool,
+};
+
+const struct file_operations diag_dbgfs_dcistats_ops = {
+ .read = diag_dbgfs_read_dcistats,
+};
+
void diag_debugfs_init(void)
{
diag_dbgfs_dent = debugfs_create_dir("diag", 0);
@@ -398,6 +570,12 @@
debugfs_create_file("work_pending", 0444, diag_dbgfs_dent, 0,
&diag_dbgfs_workpending_ops);
+ debugfs_create_file("mempool", 0444, diag_dbgfs_dent, 0,
+ &diag_dbgfs_mempool_ops);
+
+ debugfs_create_file("dci_stats", 0444, diag_dbgfs_dent, 0,
+ &diag_dbgfs_dcistats_ops);
+
#ifdef CONFIG_DIAGFWD_BRIDGE_CODE
debugfs_create_file("bridge", 0444, diag_dbgfs_dent, 0,
&diag_dbgfs_bridge_ops);
@@ -405,6 +583,16 @@
diag_dbgfs_table_index = 0;
diag_dbgfs_finished = 0;
+ diag_dbgfs_dci_data_index = 0;
+ diag_dbgfs_dci_finished = 0;
+
+ /* DCI related structures */
+ dci_data_smd = kzalloc(sizeof(struct diag_dci_data_info) *
+ DIAG_DCI_DEBUG_CNT, GFP_KERNEL);
+ if (ZERO_OR_NULL_PTR(dci_data_smd))
+ pr_warn("diag: could not allocate memory for dci debug info\n");
+
+ mutex_init(&dci_stat_mutex);
}
void diag_debugfs_cleanup(void)
@@ -413,6 +601,9 @@
debugfs_remove_recursive(diag_dbgfs_dent);
diag_dbgfs_dent = NULL;
}
+
+ kfree(dci_data_smd);
+ mutex_destroy(&dci_stat_mutex);
}
#else
void diag_debugfs_init(void) { }
diff --git a/drivers/char/diag/diagchar.h b/drivers/char/diag/diagchar.h
index b05bcef..1f45a32 100644
--- a/drivers/char/diag/diagchar.h
+++ b/drivers/char/diag/diagchar.h
@@ -44,6 +44,26 @@
#define POOL_TYPE_HSIC_WRITE 11
#define POOL_TYPE_HSIC_2_WRITE 12
#define POOL_TYPE_ALL 10
+
+#define POOL_COPY_IDX 0
+#define POOL_HDLC_IDX 1
+#define POOL_USER_IDX 2
+#define POOL_WRITE_STRUCT_IDX 3
+#define POOL_HSIC_IDX 4
+#define POOL_HSIC_2_IDX 5
+#define POOL_HSIC_3_IDX 6
+#define POOL_HSIC_4_IDX 7
+#define POOL_HSIC_WRITE_IDX 8
+#define POOL_HSIC_2_WRITE_IDX 9
+#define POOL_HSIC_3_WRITE_IDX 10
+#define POOL_HSIC_4_WRITE_IDX 11
+
+#ifdef CONFIG_DIAGFWD_BRIDGE_CODE
+#define NUM_MEMORY_POOLS 12
+#else
+#define NUM_MEMORY_POOLS 4
+#endif
+
#define MODEM_DATA 0
#define LPASS_DATA 1
#define WCNSS_DATA 2
@@ -93,6 +113,8 @@
#define SMD_CMD_TYPE 3
#define SMD_DCI_CMD_TYPE 4
+#define DIAG_TS_SIZE 50
+
/* Maximum number of pkt reg supported at initialization*/
extern int diag_max_reg;
extern int diag_threshold_reg;
@@ -346,4 +368,6 @@
extern int wrap_enabled;
extern uint16_t wrap_count;
+void diag_get_timestamp(char *time_str);
+
#endif
diff --git a/drivers/char/diag/diagchar_core.c b/drivers/char/diag/diagchar_core.c
index 90a4154..1a2f431 100644
--- a/drivers/char/diag/diagchar_core.c
+++ b/drivers/char/diag/diagchar_core.c
@@ -16,6 +16,7 @@
#include <linux/cdev.h>
#include <linux/fs.h>
#include <linux/device.h>
+#include <linux/delay.h>
#include <linux/uaccess.h>
#include <linux/diagchar.h>
#include <linux/platform_device.h>
@@ -382,6 +383,18 @@
(*count_entries)++;
}
+void diag_get_timestamp(char *time_str)
+{
+ struct timeval t;
+ struct tm broken_tm;
+ do_gettimeofday(&t);
+ if (!time_str)
+ return;
+ time_to_tm(t.tv_sec, 0, &broken_tm);
+ scnprintf(time_str, DIAG_TS_SIZE, "%d:%d:%d:%ld", broken_tm.tm_hour,
+ broken_tm.tm_min, broken_tm.tm_sec, t.tv_usec);
+}
+
static int diag_get_remote(int remote_info)
{
int val = (remote_info < 0) ? -remote_info : remote_info;
@@ -976,6 +989,8 @@
driver->dci_client_tbl[i].dropped_events = 0;
driver->dci_client_tbl[i].received_logs = 0;
driver->dci_client_tbl[i].received_events = 0;
+ mutex_init(&driver->dci_client_tbl[i].
+ data_mutex);
break;
}
}
@@ -1019,6 +1034,8 @@
driver->dci_client_tbl[result].client = NULL;
kfree(driver->dci_client_tbl[result].dci_data);
driver->dci_client_tbl[result].dci_data = NULL;
+ mutex_destroy(&driver->dci_client_tbl[result].
+ data_mutex);
driver->num_dci_client--;
}
mutex_unlock(&driver->dci_mutex);
@@ -1360,11 +1377,13 @@
entry = &(driver->dci_client_tbl[i]);
if (entry && entry->client) {
if (current->tgid == entry->client->tgid) {
+ mutex_lock(&entry->data_mutex);
COPY_USER_SPACE_OR_EXIT(buf+4,
entry->data_len, 4);
COPY_USER_SPACE_OR_EXIT(buf+8,
*(entry->dci_data), entry->data_len);
entry->data_len = 0;
+ mutex_unlock(&entry->data_mutex);
break;
}
}
diff --git a/drivers/char/diag/diagmem.c b/drivers/char/diag/diagmem.c
index bd339e2..f22b4c2 100644
--- a/drivers/char/diag/diagmem.c
+++ b/drivers/char/diag/diagmem.c
@@ -20,6 +20,8 @@
#include "diagfwd_bridge.h"
#include "diagfwd_hsic.h"
+mempool_t *diag_pools_array[NUM_MEMORY_POOLS];
+
void *diagmem_alloc(struct diagchar_dev *driver, int size, int pool_type)
{
void *buf = NULL;
@@ -251,21 +253,30 @@
{
mutex_init(&driver->diagmem_mutex);
- if (driver->count == 0)
+ if (driver->count == 0) {
driver->diagpool = mempool_create_kmalloc_pool(
driver->poolsize, driver->itemsize);
+ diag_pools_array[POOL_COPY_IDX] = driver->diagpool;
+ }
- if (driver->count_hdlc_pool == 0)
+ if (driver->count_hdlc_pool == 0) {
driver->diag_hdlc_pool = mempool_create_kmalloc_pool(
driver->poolsize_hdlc, driver->itemsize_hdlc);
+ diag_pools_array[POOL_HDLC_IDX] = driver->diag_hdlc_pool;
+ }
- if (driver->count_user_pool == 0)
+ if (driver->count_user_pool == 0) {
driver->diag_user_pool = mempool_create_kmalloc_pool(
driver->poolsize_user, driver->itemsize_user);
+ diag_pools_array[POOL_USER_IDX] = driver->diag_user_pool;
+ }
- if (driver->count_write_struct_pool == 0)
+ if (driver->count_write_struct_pool == 0) {
driver->diag_write_struct_pool = mempool_create_kmalloc_pool(
driver->poolsize_write_struct, driver->itemsize_write_struct);
+ diag_pools_array[POOL_WRITE_STRUCT_IDX] =
+ driver->diag_write_struct_pool;
+ }
if (!driver->diagpool)
pr_err("diag: Cannot allocate diag mempool\n");
@@ -283,16 +294,27 @@
#ifdef CONFIG_DIAGFWD_BRIDGE_CODE
void diagmem_hsic_init(int index)
{
- if (diag_hsic[index].count_hsic_pool == 0)
+ if (index < 0 || index >= MAX_HSIC_CH) {
+ pr_err("diag: Invalid hsic index in %s\n", __func__);
+ return;
+ }
+
+ if (diag_hsic[index].count_hsic_pool == 0) {
diag_hsic[index].diag_hsic_pool = mempool_create_kmalloc_pool(
diag_hsic[index].poolsize_hsic,
diag_hsic[index].itemsize_hsic);
+ diag_pools_array[POOL_HSIC_IDX + index] =
+ diag_hsic[index].diag_hsic_pool;
+ }
- if (diag_hsic[index].count_hsic_write_pool == 0)
+ if (diag_hsic[index].count_hsic_write_pool == 0) {
diag_hsic[index].diag_hsic_write_pool =
mempool_create_kmalloc_pool(
diag_hsic[index].poolsize_hsic_write,
diag_hsic[index].itemsize_hsic_write);
+ diag_pools_array[POOL_HSIC_WRITE_IDX + index] =
+ diag_hsic[index].diag_hsic_write_pool;
+ }
if (!diag_hsic[index].diag_hsic_pool)
pr_err("Cannot allocate diag HSIC mempool for ch %d\n", index);
diff --git a/drivers/char/diag/diagmem.h b/drivers/char/diag/diagmem.h
index f478263..6861790 100644
--- a/drivers/char/diag/diagmem.h
+++ b/drivers/char/diag/diagmem.h
@@ -14,6 +14,8 @@
#define DIAGMEM_H
#include "diagchar.h"
+extern mempool_t *diag_pools_array[NUM_MEMORY_POOLS];
+
void *diagmem_alloc(struct diagchar_dev *driver, int size, int pool_type);
void diagmem_free(struct diagchar_dev *driver, void *buf, int pool_type);
void diagmem_init(struct diagchar_dev *driver);
diff --git a/drivers/char/hw_random/msm_rng.c b/drivers/char/hw_random/msm_rng.c
index 261af7d..369477f 100644
--- a/drivers/char/hw_random/msm_rng.c
+++ b/drivers/char/hw_random/msm_rng.c
@@ -24,6 +24,7 @@
#include <linux/types.h>
#include <mach/msm_iomap.h>
#include <mach/socinfo.h>
+#include <mach/msm_bus.h>
#define DRIVER_NAME "msm_rng"
@@ -47,6 +48,7 @@
struct platform_device *pdev;
void __iomem *base;
struct clk *prng_clk;
+ uint32_t qrng_perf_client;
};
static int msm_rng_read(struct hwrng *rng, void *data, size_t max, bool wait)
@@ -77,7 +79,12 @@
dev_err(&pdev->dev, "failed to enable clock in callback\n");
return 0;
}
-
+ if (msm_rng_dev->qrng_perf_client) {
+ ret = msm_bus_scale_client_update_request(
+ msm_rng_dev->qrng_perf_client, 1);
+ if (ret)
+ pr_err("bus_scale_client_update_req failed!\n");
+ }
/* read random data from h/w */
do {
/* check status bit if data is available */
@@ -97,7 +104,9 @@
if ((maxsize - currsize) < 4)
break;
} while (currsize < maxsize);
-
+ if (msm_rng_dev->qrng_perf_client)
+ ret = msm_bus_scale_client_update_request(
+ msm_rng_dev->qrng_perf_client, 0);
/* vote to turn off clock */
clk_disable_unprepare(msm_rng_dev->prng_clk);
@@ -115,6 +124,12 @@
unsigned long reg_val = 0;
int ret = 0;
+ if (msm_rng_dev->qrng_perf_client) {
+ ret = msm_bus_scale_client_update_request(
+ msm_rng_dev->qrng_perf_client, 1);
+ if (ret)
+ pr_err("bus_scale_client_update_req failed!\n");
+ }
/* Enable the PRNG CLK */
ret = clk_prepare_enable(msm_rng_dev->prng_clk);
if (ret) {
@@ -145,8 +160,10 @@
*/
mb();
}
-
clk_disable_unprepare(msm_rng_dev->prng_clk);
+ if (msm_rng_dev->qrng_perf_client)
+ ret = msm_bus_scale_client_update_request(
+ msm_rng_dev->qrng_perf_client, 0);
return 0;
}
@@ -157,6 +174,7 @@
struct msm_rng_device *msm_rng_dev = NULL;
void __iomem *base = NULL;
int error = 0;
+ struct msm_bus_scale_pdata *qrng_platform_support = NULL;
res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
if (res == NULL) {
@@ -197,6 +215,15 @@
msm_rng_dev->pdev = pdev;
platform_set_drvdata(pdev, msm_rng_dev);
+ if (pdev->dev.of_node) {
+ /* Register bus client */
+ qrng_platform_support = msm_bus_cl_get_pdata(pdev);
+ msm_rng_dev->qrng_perf_client = msm_bus_scale_register_client(
+ qrng_platform_support);
+ if (!msm_rng_dev->qrng_perf_client)
+ pr_err("Unable to register bus client\n");
+ }
+
/* Enable rng h/w */
error = msm_rng_enable_hw(msm_rng_dev);
@@ -232,6 +259,8 @@
clk_put(msm_rng_dev->prng_clk);
iounmap(msm_rng_dev->base);
platform_set_drvdata(pdev, NULL);
+ if (msm_rng_dev->qrng_perf_client)
+ msm_bus_scale_unregister_client(msm_rng_dev->qrng_perf_client);
kfree(msm_rng_dev);
return 0;
}
diff --git a/drivers/coresight/coresight-etm.c b/drivers/coresight/coresight-etm.c
index 5a5c0cf..de86622 100644
--- a/drivers/coresight/coresight-etm.c
+++ b/drivers/coresight/coresight-etm.c
@@ -2154,14 +2154,20 @@
drvdata->cpu = count++;
- get_online_cpus();
etmdrvdata[drvdata->cpu] = drvdata;
+ /*
+ * This is safe wrt CPU_UP_PREPARE and CPU_STARTING hotplug callbacks
+ * on the secondary cores that may enable the clock and perform
+ * etm_os_unlock since they occur before the cpu online mask is updated
+ * for the cpu which is checked by this smp call.
+ */
if (!smp_call_function_single(drvdata->cpu, etm_os_unlock, drvdata, 1))
drvdata->os_unlock = true;
+
/*
- * Use CPU0 to populate read-only configuration data for ETM0. For
- * other ETMs copy it over from ETM0.
+ * OS unlock must have happened on cpu0 so use it to populate read-only
+ * configuration data for ETM0. For other ETMs copy it over from ETM0.
*/
if (drvdata->cpu == 0) {
register_hotcpu_notifier(&etm_cpu_notifier);
@@ -2172,8 +2178,6 @@
etm_copy_arch_data(drvdata);
}
- put_online_cpus();
-
if (etm_arch_supported(drvdata->arch) == false) {
ret = -EINVAL;
goto err1;
diff --git a/drivers/coresight/coresight-tmc.c b/drivers/coresight/coresight-tmc.c
index 4a9a97a..f39334a 100644
--- a/drivers/coresight/coresight-tmc.c
+++ b/drivers/coresight/coresight-tmc.c
@@ -441,7 +441,7 @@
if (drvdata->out_mode == TMC_ETR_OUT_MODE_MEM &&
!drvdata->reset_flush_race) {
coresight_cti_map_trigout(drvdata->cti_flush, 3, 0);
- coresight_cti_map_trigin(drvdata->cti_reset, 0, 0);
+ coresight_cti_map_trigin(drvdata->cti_reset, 2, 0);
} else if (drvdata->out_mode == TMC_ETR_OUT_MODE_USB) {
drvdata->usbch = usb_qdss_open("qdss", drvdata,
usb_notifier);
@@ -676,7 +676,7 @@
} else if (drvdata->config_type == TMC_CONFIG_TYPE_ETR) {
if (drvdata->out_mode == TMC_ETR_OUT_MODE_MEM &&
!drvdata->reset_flush_race) {
- coresight_cti_unmap_trigin(drvdata->cti_reset, 0, 0);
+ coresight_cti_unmap_trigin(drvdata->cti_reset, 2, 0);
coresight_cti_unmap_trigout(drvdata->cti_flush, 3, 0);
} else if (drvdata->out_mode == TMC_ETR_OUT_MODE_USB) {
tmc_etr_bam_disable(drvdata);
@@ -996,7 +996,7 @@
if (!drvdata->reset_flush_race) {
coresight_cti_map_trigout(drvdata->cti_flush, 3, 0);
- coresight_cti_map_trigin(drvdata->cti_reset, 0, 0);
+ coresight_cti_map_trigin(drvdata->cti_reset, 2, 0);
}
tmc_etr_bam_disable(drvdata);
@@ -1020,7 +1020,7 @@
spin_unlock_irqrestore(&drvdata->spinlock, flags);
if (!drvdata->reset_flush_race) {
- coresight_cti_unmap_trigin(drvdata->cti_reset, 0, 0);
+ coresight_cti_unmap_trigin(drvdata->cti_reset, 2, 0);
coresight_cti_unmap_trigout(drvdata->cti_flush, 3, 0);
}
diff --git a/drivers/cpufreq/cpufreq_ondemand.c b/drivers/cpufreq/cpufreq_ondemand.c
index fda64e5..2fd8bef 100644
--- a/drivers/cpufreq/cpufreq_ondemand.c
+++ b/drivers/cpufreq/cpufreq_ondemand.c
@@ -22,6 +22,7 @@
#include <linux/hrtimer.h>
#include <linux/tick.h>
#include <linux/ktime.h>
+#include <linux/kthread.h>
#include <linux/sched.h>
#include <linux/input.h>
#include <linux/workqueue.h>
@@ -103,6 +104,11 @@
* when user is changing the governor or limits.
*/
struct mutex timer_mutex;
+
+ struct task_struct *sync_thread;
+ wait_queue_head_t sync_wq;
+ atomic_t src_sync_cpu;
+ atomic_t sync_enabled;
};
static DEFINE_PER_CPU(struct cpu_dbs_info_s, od_cpu_dbs_info);
@@ -125,14 +131,6 @@
static DEFINE_PER_CPU(struct dbs_work_struct, dbs_refresh_work);
-struct dbs_sync_work_struct {
- struct work_struct work;
- unsigned int src_cpu;
- unsigned int targ_cpu;
-};
-
-static DEFINE_PER_CPU(struct dbs_sync_work_struct, dbs_sync_work);
-
static struct dbs_tuners {
unsigned int sampling_rate;
unsigned int up_threshold;
@@ -1039,12 +1037,11 @@
static int dbs_migration_notify(struct notifier_block *nb,
unsigned long target_cpu, void *arg)
{
- struct dbs_sync_work_struct *sync_work =
- &per_cpu(dbs_sync_work, target_cpu);
- sync_work->src_cpu = (unsigned int)arg;
+ struct cpu_dbs_info_s *target_dbs_info =
+ &per_cpu(od_cpu_dbs_info, target_cpu);
- queue_work_on(target_cpu, dbs_wq,
- &per_cpu(dbs_sync_work, target_cpu).work);
+ atomic_set(&target_dbs_info->src_sync_cpu, (int)arg);
+ wake_up(&target_dbs_info->sync_wq);
return NOTIFY_OK;
}
@@ -1053,73 +1050,97 @@
.notifier_call = dbs_migration_notify,
};
-void dbs_synchronize(struct work_struct *work)
+static int sync_pending(struct cpu_dbs_info_s *this_dbs_info)
{
- struct cpufreq_policy *policy;
- struct cpu_dbs_info_s *this_dbs_info, *src_dbs_info;
- struct dbs_sync_work_struct *dbs_work;
- unsigned int cpu, src_cpu;
+ return atomic_read(&this_dbs_info->src_sync_cpu) >= 0;
+}
+
+static int dbs_sync_thread(void *data)
+{
+ int src_cpu, cpu = (int)data;
unsigned int src_freq, src_max_load;
+ struct cpu_dbs_info_s *this_dbs_info, *src_dbs_info;
+ struct cpufreq_policy *policy;
int delay;
- dbs_work = container_of(work, struct dbs_sync_work_struct, work);
- cpu = dbs_work->targ_cpu;
- src_cpu = dbs_work->src_cpu;
-
- get_online_cpus();
-
- /* Getting source cpu info */
- src_dbs_info = &per_cpu(od_cpu_dbs_info, src_cpu);
- if (src_dbs_info != NULL && src_dbs_info->cur_policy != NULL) {
- src_freq = src_dbs_info->cur_policy->cur;
- src_max_load = src_dbs_info->max_load;
- } else {
- src_freq = dbs_tuners_ins.sync_freq;
- src_max_load = 0;
- }
-
- if (lock_policy_rwsem_write(cpu) < 0)
- goto bail_acq_sema_failed;
-
this_dbs_info = &per_cpu(od_cpu_dbs_info, cpu);
- policy = this_dbs_info->cur_policy;
- if (!policy) {
- /* CPU not using ondemand governor */
- goto bail_incorrect_governor;
- }
- delay = usecs_to_jiffies(dbs_tuners_ins.sampling_rate);
+ while (1) {
+ wait_event(this_dbs_info->sync_wq,
+ sync_pending(this_dbs_info) ||
+ kthread_should_stop());
- if (policy->cur < src_freq) {
+ if (kthread_should_stop())
+ break;
- /* Cancelling the next ondemand sample */
- cancel_delayed_work_sync(&this_dbs_info->work);
+ get_online_cpus();
- /*
- * Arch specific cpufreq driver may fail.
- * Don't update governor frequency upon failure.
+ /* TODO: cur_policy is currently set for all CPUs when
+ * a policy is started but cleared only on the current
+ * CPU when the policy is stopped. If/when this is
+ * resolved, sync_enabled can be removed and
+ * cur_policy can be used instead.
*/
- if (__cpufreq_driver_target(policy, src_freq,
- CPUFREQ_RELATION_L) >= 0) {
- policy->cur = src_freq;
- if (src_max_load > this_dbs_info->max_load) {
- this_dbs_info->max_load = src_max_load;
- this_dbs_info->prev_load = src_max_load;
- }
+ if (!atomic_read(&this_dbs_info->sync_enabled)) {
+ atomic_set(&this_dbs_info->src_sync_cpu, -1);
+ put_online_cpus();
+ continue;
}
- /* Rescheduling the next ondemand sample */
- mutex_lock(&this_dbs_info->timer_mutex);
- schedule_delayed_work_on(cpu, &this_dbs_info->work,
- delay);
- mutex_unlock(&this_dbs_info->timer_mutex);
- }
-bail_incorrect_governor:
- unlock_policy_rwsem_write(cpu);
+ src_cpu = atomic_read(&this_dbs_info->src_sync_cpu);
+ src_dbs_info = &per_cpu(od_cpu_dbs_info, src_cpu);
+ if (src_dbs_info != NULL &&
+ src_dbs_info->cur_policy != NULL) {
+ src_freq = src_dbs_info->cur_policy->cur;
+ src_max_load = src_dbs_info->max_load;
+ } else {
+ src_freq = dbs_tuners_ins.sync_freq;
+ src_max_load = 0;
+ }
+ if (lock_policy_rwsem_write(cpu) < 0)
+ goto bail_acq_sema_failed;
+
+ policy = this_dbs_info->cur_policy;
+ if (!policy) {
+ /* CPU not using ondemand governor */
+ goto bail_incorrect_governor;
+ }
+ delay = usecs_to_jiffies(dbs_tuners_ins.sampling_rate);
+
+
+ if (policy->cur < src_freq) {
+ /* cancel the next ondemand sample */
+ cancel_delayed_work_sync(&this_dbs_info->work);
+
+ /*
+ * Arch specific cpufreq driver may fail.
+ * Don't update governor frequency upon failure.
+ */
+ if (__cpufreq_driver_target(policy, src_freq,
+ CPUFREQ_RELATION_L) >= 0) {
+ policy->cur = src_freq;
+ if (src_max_load > this_dbs_info->max_load) {
+ this_dbs_info->max_load = src_max_load;
+ this_dbs_info->prev_load = src_max_load;
+ }
+ }
+
+ /* reschedule the next ondemand sample */
+ mutex_lock(&this_dbs_info->timer_mutex);
+ queue_delayed_work_on(cpu, dbs_wq,
+ &this_dbs_info->work, delay);
+ mutex_unlock(&this_dbs_info->timer_mutex);
+ }
+
+bail_incorrect_governor:
+ unlock_policy_rwsem_write(cpu);
bail_acq_sema_failed:
- put_online_cpus();
- return;
+ put_online_cpus();
+ atomic_set(&this_dbs_info->src_sync_cpu, -1);
+ }
+
+ return 0;
}
static void dbs_input_event(struct input_handle *handle, unsigned int type,
@@ -1215,6 +1236,9 @@
if (dbs_tuners_ins.ignore_nice)
j_dbs_info->prev_cpu_nice =
kcpustat_cpu(j).cpustat[CPUTIME_NICE];
+ set_cpus_allowed(j_dbs_info->sync_thread,
+ *cpumask_of(j));
+ atomic_set(&j_dbs_info->sync_enabled, 1);
}
this_dbs_info->cpu = cpu;
this_dbs_info->rate_mult = 1;
@@ -1271,6 +1295,13 @@
mutex_lock(&dbs_mutex);
dbs_enable--;
+
+ for_each_cpu(j, policy->cpus) {
+ struct cpu_dbs_info_s *j_dbs_info;
+ j_dbs_info = &per_cpu(od_cpu_dbs_info, j);
+ atomic_set(&j_dbs_info->sync_enabled, 0);
+ }
+
/* If device is being removed, policy is no longer
* valid. */
this_dbs_info->cur_policy = NULL;
@@ -1342,17 +1373,17 @@
&per_cpu(od_cpu_dbs_info, i);
struct dbs_work_struct *dbs_work =
&per_cpu(dbs_refresh_work, i);
- struct dbs_sync_work_struct *dbs_sync =
- &per_cpu(dbs_sync_work, i);
mutex_init(&this_dbs_info->timer_mutex);
INIT_WORK(&dbs_work->work, dbs_refresh_callback);
dbs_work->cpu = i;
- INIT_WORK(&dbs_sync->work, dbs_synchronize);
- dbs_sync->src_cpu = 0;
- dbs_sync->targ_cpu = i;
+ atomic_set(&this_dbs_info->src_sync_cpu, -1);
+ init_waitqueue_head(&this_dbs_info->sync_wq);
+ this_dbs_info->sync_thread = kthread_run(dbs_sync_thread,
+ (void *)i,
+ "dbs_sync/%d", i);
}
return cpufreq_register_governor(&cpufreq_gov_ondemand);
@@ -1367,6 +1398,7 @@
struct cpu_dbs_info_s *this_dbs_info =
&per_cpu(od_cpu_dbs_info, i);
mutex_destroy(&this_dbs_info->timer_mutex);
+ kthread_stop(this_dbs_info->sync_thread);
}
destroy_workqueue(dbs_wq);
}
diff --git a/drivers/crypto/msm/qce.h b/drivers/crypto/msm/qce.h
index c14143f..afd5141 100644
--- a/drivers/crypto/msm/qce.h
+++ b/drivers/crypto/msm/qce.h
@@ -73,7 +73,6 @@
QCE_HASH_SHA1_HMAC = 2,
QCE_HASH_SHA256_HMAC = 3,
QCE_HASH_AES_CMAC = 4,
- QCE_AEAD_SHA1_HMAC = 5,
QCE_HASH_LAST
};
diff --git a/drivers/crypto/msm/qce50.c b/drivers/crypto/msm/qce50.c
index 75d0d39..eae16fa 100644
--- a/drivers/crypto/msm/qce50.c
+++ b/drivers/crypto/msm/qce50.c
@@ -372,6 +372,191 @@
return 0;
}
+static struct qce_cmdlist_info *_ce_get_aead_cmdlistinfo(
+ struct qce_device *pce_dev, struct qce_req *creq)
+{
+ switch (creq->alg) {
+ case CIPHER_ALG_DES:
+ switch (creq->mode) {
+ case QCE_MODE_ECB:
+ return &pce_dev->ce_sps.
+ cmdlistptr.aead_hmac_sha1_ecb_des;
+ break;
+ case QCE_MODE_CBC:
+ return &pce_dev->ce_sps.
+ cmdlistptr.aead_hmac_sha1_cbc_des;
+ break;
+ default:
+ return NULL;
+ }
+ break;
+ case CIPHER_ALG_3DES:
+ switch (creq->mode) {
+ case QCE_MODE_ECB:
+ return &pce_dev->ce_sps.
+ cmdlistptr.aead_hmac_sha1_ecb_3des;
+ break;
+ case QCE_MODE_CBC:
+ return &pce_dev->ce_sps.
+ cmdlistptr.aead_hmac_sha1_cbc_3des;
+ break;
+ default:
+ return NULL;
+ }
+ break;
+ case CIPHER_ALG_AES:
+ switch (creq->mode) {
+ case QCE_MODE_ECB:
+ if (creq->encklen == AES128_KEY_SIZE)
+ return &pce_dev->ce_sps.
+ cmdlistptr.aead_hmac_sha1_ecb_aes_128;
+ else if (creq->encklen == AES256_KEY_SIZE)
+ return &pce_dev->ce_sps.
+ cmdlistptr.aead_hmac_sha1_ecb_aes_256;
+ else
+ return NULL;
+ break;
+ case QCE_MODE_CBC:
+ if (creq->encklen == AES128_KEY_SIZE)
+ return &pce_dev->ce_sps.
+ cmdlistptr.aead_hmac_sha1_cbc_aes_128;
+ else if (creq->encklen == AES256_KEY_SIZE)
+ return &pce_dev->ce_sps.
+ cmdlistptr.aead_hmac_sha1_cbc_aes_256;
+ else
+ return NULL;
+ break;
+ default:
+ return NULL;
+ }
+ break;
+
+ default:
+ return NULL;
+ }
+ return NULL;
+}
+
+static int _ce_setup_aead(struct qce_device *pce_dev, struct qce_req *q_req,
+ uint32_t totallen_in, uint32_t coffset,
+ struct qce_cmdlist_info *cmdlistinfo)
+{
+ int32_t authk_size_in_word = q_req->authklen/sizeof(uint32_t);
+ int i;
+ uint32_t mackey32[SHA_HMAC_KEY_SIZE/sizeof(uint32_t)] = {0};
+ struct sps_command_element *pce;
+ uint32_t a_cfg;
+ uint32_t enckey32[(MAX_CIPHER_KEY_SIZE*2)/sizeof(uint32_t)] = {0};
+ uint32_t enciv32[MAX_IV_LENGTH/sizeof(uint32_t)] = {0};
+ uint32_t enck_size_in_word = 0;
+ uint32_t enciv_in_word;
+ uint32_t key_size;
+ uint32_t encr_cfg = 0;
+ uint32_t ivsize = q_req->ivsize;
+
+ key_size = q_req->encklen;
+ enck_size_in_word = key_size/sizeof(uint32_t);
+
+ switch (q_req->alg) {
+ case CIPHER_ALG_DES:
+ enciv_in_word = 2;
+ break;
+ case CIPHER_ALG_3DES:
+ enciv_in_word = 2;
+ break;
+ case CIPHER_ALG_AES:
+ if ((key_size != AES128_KEY_SIZE) &&
+ (key_size != AES256_KEY_SIZE))
+ return -EINVAL;
+ enciv_in_word = 4;
+ break;
+ default:
+ return -EINVAL;
+ }
+
+ switch (q_req->mode) {
+ case QCE_MODE_ECB:
+ case QCE_MODE_CBC:
+ case QCE_MODE_CTR:
+ pce_dev->mode = q_req->mode;
+ break;
+ default:
+ return -EINVAL;
+ }
+
+ if (q_req->mode != QCE_MODE_ECB) {
+ _byte_stream_to_net_words(enciv32, q_req->iv, ivsize);
+ pce = cmdlistinfo->encr_cntr_iv;
+ for (i = 0; i < enciv_in_word; i++, pce++)
+ pce->data = enciv32[i];
+ }
+
+ /*
+ * write encr key
+ * do not use hw key or pipe key
+ */
+ _byte_stream_to_net_words(enckey32, q_req->enckey, key_size);
+ pce = cmdlistinfo->encr_key;
+ for (i = 0; i < enck_size_in_word; i++, pce++)
+ pce->data = enckey32[i];
+
+ /* write encr seg cfg */
+ pce = cmdlistinfo->encr_seg_cfg;
+ encr_cfg = pce->data;
+ if (q_req->dir == QCE_ENCRYPT)
+ encr_cfg |= (1 << CRYPTO_ENCODE);
+ else
+ encr_cfg &= ~(1 << CRYPTO_ENCODE);
+ pce->data = encr_cfg;
+
+ /* we only support sha1-hmac at this point */
+ _byte_stream_to_net_words(mackey32, q_req->authkey,
+ q_req->authklen);
+ pce = cmdlistinfo->auth_key;
+ for (i = 0; i < authk_size_in_word; i++, pce++)
+ pce->data = mackey32[i];
+ pce = cmdlistinfo->auth_iv;
+ for (i = 0; i < 5; i++, pce++)
+ pce->data = _std_init_vector_sha1[i];
+
+ /* write auth_bytecnt 0/1, start with 0 */
+ pce = cmdlistinfo->auth_bytecount;
+ for (i = 0; i < 2; i++, pce++)
+ pce->data = 0;
+
+ pce = cmdlistinfo->auth_seg_cfg;
+ a_cfg = pce->data;
+ a_cfg &= ~(CRYPTO_AUTH_POS_MASK);
+ if (q_req->dir == QCE_ENCRYPT)
+ a_cfg |= (CRYPTO_AUTH_POS_AFTER << CRYPTO_AUTH_POS);
+ else
+ a_cfg |= (CRYPTO_AUTH_POS_BEFORE << CRYPTO_AUTH_POS);
+ pce->data = a_cfg;
+
+ /* write auth seg size */
+ pce = cmdlistinfo->auth_seg_size;
+ pce->data = totallen_in;
+
+ /* write auth seg size start*/
+ pce = cmdlistinfo->auth_seg_start;
+ pce->data = 0;
+
+ /* write seg size */
+ pce = cmdlistinfo->seg_size;
+ pce->data = totallen_in;
+
+ /* write encr seg size */
+ pce = cmdlistinfo->encr_seg_size;
+ pce->data = q_req->cryptlen;
+
+ /* write encr seg start */
+ pce = cmdlistinfo->encr_seg_start;
+ pce->data = (coffset & 0xffff);
+
+ return 0;
+
+};
+
static int _ce_get_cipher_cmdlistinfo(struct qce_device *pce_dev,
struct qce_req *creq,
struct qce_cmdlist_info **cmdlistinfo)
@@ -881,6 +1066,190 @@
return 0;
}
+static int _ce_setup_aead_direct(struct qce_device *pce_dev,
+ struct qce_req *q_req, uint32_t totallen_in, uint32_t coffset)
+{
+ int32_t authk_size_in_word = q_req->authklen/sizeof(uint32_t);
+ int i;
+ uint32_t mackey32[SHA_HMAC_KEY_SIZE/sizeof(uint32_t)] = {0};
+ uint32_t a_cfg;
+ uint32_t enckey32[(MAX_CIPHER_KEY_SIZE*2)/sizeof(uint32_t)] = {0};
+ uint32_t enciv32[MAX_IV_LENGTH/sizeof(uint32_t)] = {0};
+ uint32_t enck_size_in_word = 0;
+ uint32_t enciv_in_word;
+ uint32_t key_size;
+ uint32_t ivsize = q_req->ivsize;
+ uint32_t encr_cfg;
+
+
+ /* clear status */
+ writel_relaxed(0, pce_dev->iobase + CRYPTO_STATUS_REG);
+
+ writel_relaxed(pce_dev->reg.crypto_cfg_be, (pce_dev->iobase +
+ CRYPTO_CONFIG_REG));
+ /*
+ * Ensure previous instructions (setting the CONFIG register)
+ * was completed before issuing starting to set other config register
+ * This is to ensure the configurations are done in correct endian-ness
+ * as set in the CONFIG registers
+ */
+ mb();
+
+ key_size = q_req->encklen;
+ enck_size_in_word = key_size/sizeof(uint32_t);
+
+ switch (q_req->alg) {
+
+ case CIPHER_ALG_DES:
+
+ switch (q_req->mode) {
+ case QCE_MODE_ECB:
+ encr_cfg = pce_dev->reg.encr_cfg_des_ecb;
+ break;
+ case QCE_MODE_CBC:
+ encr_cfg = pce_dev->reg.encr_cfg_des_cbc;
+ break;
+ default:
+ return -EINVAL;
+ }
+
+ enciv_in_word = 2;
+ break;
+
+ case CIPHER_ALG_3DES:
+
+ switch (q_req->mode) {
+ case QCE_MODE_ECB:
+ encr_cfg = pce_dev->reg.encr_cfg_3des_ecb;
+ break;
+ case QCE_MODE_CBC:
+ encr_cfg = pce_dev->reg.encr_cfg_3des_cbc;
+ break;
+ default:
+ return -EINVAL;
+ }
+
+ enciv_in_word = 2;
+
+ break;
+
+ case CIPHER_ALG_AES:
+
+ switch (q_req->mode) {
+ case QCE_MODE_ECB:
+ if (key_size == AES128_KEY_SIZE)
+ encr_cfg = pce_dev->reg.encr_cfg_aes_ecb_128;
+ else if (key_size == AES256_KEY_SIZE)
+ encr_cfg = pce_dev->reg.encr_cfg_aes_ecb_256;
+ else
+ return -EINVAL;
+ break;
+ case QCE_MODE_CBC:
+ if (key_size == AES128_KEY_SIZE)
+ encr_cfg = pce_dev->reg.encr_cfg_aes_cbc_128;
+ else if (key_size == AES256_KEY_SIZE)
+ encr_cfg = pce_dev->reg.encr_cfg_aes_cbc_256;
+ else
+ return -EINVAL;
+ break;
+ default:
+ return -EINVAL;
+ }
+
+ enciv_in_word = 4;
+ break;
+
+ default:
+ return -EINVAL;
+ }
+
+
+ pce_dev->mode = q_req->mode;
+
+
+ /* write CNTR0_IV0_REG */
+ if (q_req->mode != QCE_MODE_ECB) {
+ _byte_stream_to_net_words(enciv32, q_req->iv, ivsize);
+ for (i = 0; i < enciv_in_word; i++)
+ writel_relaxed(enciv32[i], pce_dev->iobase +
+ (CRYPTO_CNTR0_IV0_REG + i * sizeof(uint32_t)));
+ }
+
+ /*
+ * write encr key
+ * do not use hw key or pipe key
+ */
+ _byte_stream_to_net_words(enckey32, q_req->enckey, key_size);
+ for (i = 0; i < enck_size_in_word; i++)
+ writel_relaxed(enckey32[i], pce_dev->iobase +
+ (CRYPTO_ENCR_KEY0_REG + i * sizeof(uint32_t)));
+
+ /* write encr seg cfg */
+ if (q_req->dir == QCE_ENCRYPT)
+ encr_cfg |= (1 << CRYPTO_ENCODE);
+ writel_relaxed(encr_cfg, pce_dev->iobase + CRYPTO_ENCR_SEG_CFG_REG);
+
+ /* we only support sha1-hmac at this point */
+ _byte_stream_to_net_words(mackey32, q_req->authkey,
+ q_req->authklen);
+ for (i = 0; i < authk_size_in_word; i++)
+ writel_relaxed(mackey32[i], pce_dev->iobase +
+ (CRYPTO_AUTH_KEY0_REG + i * sizeof(uint32_t)));
+
+ for (i = 0; i < 5; i++)
+ writel_relaxed(_std_init_vector_sha1[i], pce_dev->iobase +
+ (CRYPTO_AUTH_IV0_REG + i * sizeof(uint32_t)));
+
+ /* write auth_bytecnt 0/1, start with 0 */
+ writel_relaxed(0, pce_dev->iobase + CRYPTO_AUTH_BYTECNT0_REG);
+ writel_relaxed(0, pce_dev->iobase + CRYPTO_AUTH_BYTECNT1_REG);
+
+ /* write encr seg size */
+ writel_relaxed(q_req->cryptlen, pce_dev->iobase +
+ CRYPTO_ENCR_SEG_SIZE_REG);
+
+ /* write encr start */
+ writel_relaxed(coffset & 0xffff, pce_dev->iobase +
+ CRYPTO_ENCR_SEG_START_REG);
+
+ a_cfg = (CRYPTO_AUTH_MODE_HMAC << CRYPTO_AUTH_MODE) |
+ (CRYPTO_AUTH_SIZE_SHA1 << CRYPTO_AUTH_SIZE) |
+ (1 << CRYPTO_LAST) | (1 << CRYPTO_FIRST) |
+ (CRYPTO_AUTH_ALG_SHA << CRYPTO_AUTH_ALG);
+
+ if (q_req->dir == QCE_ENCRYPT)
+ a_cfg |= (CRYPTO_AUTH_POS_AFTER << CRYPTO_AUTH_POS);
+ else
+ a_cfg |= (CRYPTO_AUTH_POS_BEFORE << CRYPTO_AUTH_POS);
+
+ /* write auth seg_cfg */
+ writel_relaxed(a_cfg, pce_dev->iobase + CRYPTO_AUTH_SEG_CFG_REG);
+
+ /* write auth seg_size */
+ writel_relaxed(totallen_in, pce_dev->iobase + CRYPTO_AUTH_SEG_SIZE_REG);
+
+ /* write auth_seg_start */
+ writel_relaxed(0, pce_dev->iobase + CRYPTO_AUTH_SEG_START_REG);
+
+
+ /* write seg_size */
+ writel_relaxed(totallen_in, pce_dev->iobase + CRYPTO_SEG_SIZE_REG);
+
+
+ writel_relaxed(pce_dev->reg.crypto_cfg_le, (pce_dev->iobase +
+
+ CRYPTO_CONFIG_REG));
+ /* issue go to crypto */
+ writel_relaxed(((1 << CRYPTO_GO) | (1 << CRYPTO_RESULTS_DUMP)),
+ pce_dev->iobase + CRYPTO_GOPROC_REG);
+ /*
+ * Ensure previous instructions (setting the GO register)
+ * was completed before issuing a DMA transfer request
+ */
+ mb();
+ return 0;
+};
+
static int _ce_setup_cipher_direct(struct qce_device *pce_dev,
struct qce_req *creq, uint32_t totallen_in, uint32_t coffset)
{
@@ -1208,6 +1577,7 @@
struct aead_request *areq;
unsigned char mac[SHA256_DIGEST_SIZE];
uint32_t status;
+ int32_t result_status;
areq = (struct aead_request *) pce_dev->areq;
if (areq->src != areq->dst) {
@@ -1229,61 +1599,53 @@
if (_qce_unlock_other_pipes(pce_dev))
return -EINVAL;
- if (pce_dev->mode == QCE_MODE_CCM) {
- int32_t result_status;
+ /*
+ * Don't use result dump status. The operation may not
+ * be complete.
+ * Instead, use the status we just read of device.
+ * In case, we need to use result_status from result
+ * dump the result_status needs to be byte swapped,
+ * since we set the device to little endian.
+ */
+ result_status = 0;
+ pce_dev->ce_sps.result->status = 0;
- /*
- * Don't use result dump status. The operation may not
- * be complete.
- * Instead, use the status we just read of device.
- * In case, we need to use result_status from result
- * dump the result_status needs to be byte swapped,
- * since we set the device to little endian.
- */
-
- result_status = pce_dev->ce_sps.result->status;
- pce_dev->ce_sps.result->status = 0;
-
- if (status & ((1 << CRYPTO_SW_ERR) | (1 << CRYPTO_AXI_ERR)
+ if (status & ((1 << CRYPTO_SW_ERR) | (1 << CRYPTO_AXI_ERR)
| (1 << CRYPTO_HSD_ERR))) {
-
- pr_err("aead operation error. Status %x\n",
- status);
- result_status = -ENXIO;
- } else if (pce_dev->ce_sps.consumer_status |
+ pr_err("aead operation error. Status %x\n", status);
+ result_status = -ENXIO;
+ } else if (pce_dev->ce_sps.consumer_status |
pce_dev->ce_sps.producer_status) {
- pr_err("aead sps operation error. sps status %x %x\n",
+ pr_err("aead sps operation error. sps status %x %x\n",
pce_dev->ce_sps.consumer_status,
pce_dev->ce_sps.producer_status);
- result_status = -ENXIO;
- } else if ((status & (1 << CRYPTO_OPERATION_DONE)) == 0) {
- pr_err("aead operation not done? Status %x, sps status %x %x\n",
+ result_status = -ENXIO;
+ } else if ((status & (1 << CRYPTO_OPERATION_DONE)) == 0) {
+ pr_err("aead operation not done? Status %x, sps status %x %x\n",
status,
pce_dev->ce_sps.consumer_status,
pce_dev->ce_sps.producer_status);
- result_status = -ENXIO;
+ result_status = -ENXIO;
+ }
- } else if (status & (1 << CRYPTO_MAC_FAILED)) {
+ if (pce_dev->mode == QCE_MODE_CCM) {
+
+ if (result_status == 0 && (status & (1 << CRYPTO_MAC_FAILED)))
result_status = -EBADMSG;
- } else {
- result_status = 0;
- }
-
pce_dev->qce_cb(areq, mac, NULL, result_status);
} else {
uint32_t ivsize = 0;
struct crypto_aead *aead;
unsigned char iv[NUM_OF_CRYPTO_CNTR_IV_REG * CRYPTO_REG_SIZE];
-
aead = crypto_aead_reqtfm(areq);
ivsize = crypto_aead_ivsize(aead);
- dma_unmap_single(pce_dev->pdev, pce_dev->phy_iv_in,
- ivsize, DMA_TO_DEVICE);
+ if (pce_dev->ce_sps.minor_version != 0)
+ dma_unmap_single(pce_dev->pdev, pce_dev->phy_iv_in,
+ ivsize, DMA_TO_DEVICE);
memcpy(iv, (char *)(pce_dev->ce_sps.result->encr_cntr_iv),
sizeof(iv));
- pce_dev->qce_cb(areq, mac, iv, pce_dev->ce_sps.consumer_status |
- pce_dev->ce_sps.producer_status);
+ pce_dev->qce_cb(areq, mac, iv, result_status);
}
return 0;
@@ -2381,24 +2743,6 @@
qce_add_cmd_element(pdev, &ce_vaddr, CRYPTO_CONFIG_REG,
pdev->reg.crypto_cfg_be, &pcl_info->crypto_cfg);
break;
- case QCE_AEAD_SHA1_HMAC:
- cmdlistptr->aead_sha1_hmac.cmdlist = (uint32_t)ce_vaddr;
- pcl_info = &(cmdlistptr->aead_sha1_hmac);
-
- auth_cfg = pdev->reg.auth_cfg_aead_sha1_hmac;
- key_reg = 16;
- iv_reg = 5;
-
- /* clear status register */
- qce_add_cmd_element(pdev, &ce_vaddr, CRYPTO_STATUS_REG,
- 0, NULL);
-
- qce_add_cmd_element(pdev, &ce_vaddr, CRYPTO_CONFIG_REG,
- pdev->reg.crypto_cfg_be, &pcl_info->crypto_cfg);
- /* 1 dummy write */
- qce_add_cmd_element(pdev, &ce_vaddr, CRYPTO_ENCR_SEG_SIZE_REG,
- 0, NULL);
- break;
case QCE_HASH_SHA256_HMAC:
cmdlistptr->auth_sha256_hmac.cmdlist = (uint32_t)ce_vaddr;
pcl_info = &(cmdlistptr->auth_sha256_hmac);
@@ -2496,8 +2840,7 @@
qce_add_cmd_element(pdev, &ce_vaddr, CRYPTO_CONFIG_REG,
pdev->reg.crypto_cfg_le, NULL);
- if (alg != QCE_AEAD_SHA1_HMAC)
- qce_add_cmd_element(pdev, &ce_vaddr, CRYPTO_GOPROC_REG,
+ qce_add_cmd_element(pdev, &ce_vaddr, CRYPTO_GOPROC_REG,
((1 << CRYPTO_GO) | (1 << CRYPTO_RESULTS_DUMP)),
&pcl_info->go_proc);
@@ -2508,6 +2851,210 @@
}
static int _setup_aead_cmdlistptrs(struct qce_device *pdev,
+ unsigned char **pvaddr,
+ uint32_t alg,
+ uint32_t mode,
+ uint32_t key_size)
+{
+ struct sps_command_element *ce_vaddr;
+ uint32_t ce_vaddr_start;
+ struct qce_cmdlistptr_ops *cmdlistptr = &pdev->ce_sps.cmdlistptr;
+ struct qce_cmdlist_info *pcl_info = NULL;
+ uint32_t key_reg;
+ uint32_t iv_reg;
+ uint32_t i;
+ uint32_t enciv_in_word;
+ uint32_t encr_cfg;
+
+ *pvaddr = (unsigned char *) ALIGN(((unsigned int)(*pvaddr)),
+ pdev->ce_sps.ce_burst_size);
+
+ ce_vaddr_start = (uint32_t)(*pvaddr);
+ ce_vaddr = (struct sps_command_element *)(*pvaddr);
+
+ switch (alg) {
+
+ case CIPHER_ALG_DES:
+
+ switch (mode) {
+
+ case QCE_MODE_ECB:
+ cmdlistptr->aead_hmac_sha1_ecb_des.cmdlist =
+ (uint32_t)ce_vaddr;
+ pcl_info = &(cmdlistptr->aead_hmac_sha1_ecb_des);
+ encr_cfg = pdev->reg.encr_cfg_des_ecb;
+
+ break;
+
+ case QCE_MODE_CBC:
+ cmdlistptr->aead_hmac_sha1_cbc_des.cmdlist =
+ (uint32_t)ce_vaddr;
+ pcl_info = &(cmdlistptr->aead_hmac_sha1_cbc_des);
+ encr_cfg = pdev->reg.encr_cfg_des_cbc;
+ break;
+ default:
+ return -EINVAL;
+ };
+
+ enciv_in_word = 2;
+
+ break;
+
+ case CIPHER_ALG_3DES:
+ switch (mode) {
+
+ case QCE_MODE_ECB:
+ cmdlistptr->aead_hmac_sha1_ecb_3des.cmdlist =
+ (uint32_t)ce_vaddr;
+ pcl_info = &(cmdlistptr->aead_hmac_sha1_ecb_3des);
+ encr_cfg = pdev->reg.encr_cfg_3des_ecb;
+
+ break;
+
+ case QCE_MODE_CBC:
+ cmdlistptr->aead_hmac_sha1_cbc_3des.cmdlist =
+ (uint32_t)ce_vaddr;
+ pcl_info = &(cmdlistptr->aead_hmac_sha1_cbc_3des);
+ encr_cfg = pdev->reg.encr_cfg_3des_cbc;
+ break;
+ default:
+ return -EINVAL;
+ };
+
+ enciv_in_word = 2;
+
+ break;
+
+ case CIPHER_ALG_AES:
+ switch (mode) {
+
+ case QCE_MODE_ECB:
+ if (key_size == AES128_KEY_SIZE) {
+ cmdlistptr->aead_hmac_sha1_ecb_aes_128.cmdlist =
+ (uint32_t)ce_vaddr;
+ pcl_info = &(cmdlistptr->
+ aead_hmac_sha1_ecb_aes_128);
+
+ encr_cfg = pdev->reg.encr_cfg_aes_ecb_128;
+
+ } else if (key_size == AES256_KEY_SIZE) {
+ cmdlistptr->aead_hmac_sha1_ecb_aes_256.cmdlist =
+ (uint32_t)ce_vaddr;
+ pcl_info = &(cmdlistptr->
+ aead_hmac_sha1_ecb_aes_256);
+ encr_cfg = pdev->reg.encr_cfg_aes_ecb_256;
+ } else {
+ return -EINVAL;
+ }
+ break;
+
+ case QCE_MODE_CBC:
+ if (key_size == AES128_KEY_SIZE) {
+ cmdlistptr->aead_hmac_sha1_cbc_aes_128.cmdlist =
+ (uint32_t)ce_vaddr;
+ pcl_info = &(cmdlistptr->
+ aead_hmac_sha1_cbc_aes_128);
+ encr_cfg = pdev->reg.encr_cfg_aes_cbc_128;
+ } else if (key_size == AES256_KEY_SIZE) {
+ cmdlistptr->aead_hmac_sha1_cbc_aes_256.cmdlist =
+ (uint32_t)ce_vaddr;
+ pcl_info = &(cmdlistptr->
+ aead_hmac_sha1_cbc_aes_256);
+ encr_cfg = pdev->reg.encr_cfg_aes_cbc_256;
+ } else {
+ return -EINVAL;
+ }
+ break;
+ default:
+ return -EINVAL;
+ };
+
+ enciv_in_word = 4;
+
+ break;
+
+ default:
+ return -EINVAL;
+ };
+
+
+ qce_add_cmd_element(pdev, &ce_vaddr, CRYPTO_STATUS_REG, 0, NULL);
+
+ qce_add_cmd_element(pdev, &ce_vaddr, CRYPTO_CONFIG_REG,
+ pdev->reg.crypto_cfg_be, &pcl_info->crypto_cfg);
+
+
+ key_reg = key_size/sizeof(uint32_t);
+ qce_add_cmd_element(pdev, &ce_vaddr, CRYPTO_ENCR_KEY0_REG, 0,
+ &pcl_info->encr_key);
+ for (i = 1; i < key_reg; i++)
+ qce_add_cmd_element(pdev, &ce_vaddr,
+ (CRYPTO_ENCR_KEY0_REG + i * sizeof(uint32_t)),
+ 0, NULL);
+
+ if (mode != QCE_MODE_ECB) {
+ qce_add_cmd_element(pdev, &ce_vaddr, CRYPTO_CNTR0_IV0_REG, 0,
+ &pcl_info->encr_cntr_iv);
+ for (i = 1; i < enciv_in_word; i++)
+ qce_add_cmd_element(pdev, &ce_vaddr,
+ (CRYPTO_CNTR0_IV0_REG + i * sizeof(uint32_t)),
+ 0, NULL);
+ };
+
+ iv_reg = 5;
+ qce_add_cmd_element(pdev, &ce_vaddr, CRYPTO_AUTH_IV0_REG, 0,
+ &pcl_info->auth_iv);
+ for (i = 1; i < iv_reg; i++)
+ qce_add_cmd_element(pdev, &ce_vaddr,
+ (CRYPTO_AUTH_IV0_REG + i*sizeof(uint32_t)),
+ 0, NULL);
+
+ qce_add_cmd_element(pdev, &ce_vaddr, CRYPTO_AUTH_BYTECNT0_REG,
+ 0, &pcl_info->auth_bytecount);
+ qce_add_cmd_element(pdev, &ce_vaddr, CRYPTO_AUTH_BYTECNT1_REG, 0, NULL);
+
+ key_reg = SHA_HMAC_KEY_SIZE/sizeof(uint32_t);
+ qce_add_cmd_element(pdev, &ce_vaddr, CRYPTO_AUTH_KEY0_REG, 0,
+ &pcl_info->auth_key);
+ for (i = 1; i < key_reg; i++)
+ qce_add_cmd_element(pdev, &ce_vaddr,
+ (CRYPTO_AUTH_KEY0_REG + i*sizeof(uint32_t)), 0, NULL);
+
+ qce_add_cmd_element(pdev, &ce_vaddr, CRYPTO_SEG_SIZE_REG, 0,
+ &pcl_info->seg_size);
+
+ qce_add_cmd_element(pdev, &ce_vaddr, CRYPTO_ENCR_SEG_CFG_REG, encr_cfg,
+ &pcl_info->encr_seg_cfg);
+ qce_add_cmd_element(pdev, &ce_vaddr, CRYPTO_ENCR_SEG_SIZE_REG, 0,
+ &pcl_info->encr_seg_size);
+ qce_add_cmd_element(pdev, &ce_vaddr, CRYPTO_ENCR_SEG_START_REG, 0,
+ &pcl_info->encr_seg_start);
+
+ qce_add_cmd_element(
+ pdev,
+ &ce_vaddr,
+ CRYPTO_AUTH_SEG_CFG_REG,
+ pdev->reg.auth_cfg_aead_sha1_hmac,
+ &pcl_info->auth_seg_cfg);
+
+ qce_add_cmd_element(pdev, &ce_vaddr, CRYPTO_AUTH_SEG_SIZE_REG, 0,
+ &pcl_info->auth_seg_size);
+ qce_add_cmd_element(pdev, &ce_vaddr, CRYPTO_AUTH_SEG_START_REG, 0,
+ &pcl_info->auth_seg_start);
+
+ qce_add_cmd_element(pdev, &ce_vaddr, CRYPTO_CONFIG_REG,
+ pdev->reg.crypto_cfg_le, NULL);
+
+ qce_add_cmd_element(pdev, &ce_vaddr, CRYPTO_GOPROC_REG,
+ ((1 << CRYPTO_GO) | (1 << CRYPTO_RESULTS_DUMP)),
+ &pcl_info->go_proc);
+
+ pcl_info->size = (uint32_t)ce_vaddr - (uint32_t)ce_vaddr_start;
+ *pvaddr = (unsigned char *) ce_vaddr;
+ return 0;
+}
+
+static int _setup_aead_ccm_cmdlistptrs(struct qce_device *pdev,
unsigned char **pvaddr, bool key_128)
{
struct sps_command_element *ce_vaddr;
@@ -2696,10 +3243,25 @@
_setup_auth_cmdlistptrs(pdev, pvaddr, QCE_HASH_AES_CMAC, true);
_setup_auth_cmdlistptrs(pdev, pvaddr, QCE_HASH_AES_CMAC, false);
- _setup_auth_cmdlistptrs(pdev, pvaddr, QCE_AEAD_SHA1_HMAC, false);
+ _setup_aead_cmdlistptrs(pdev, pvaddr, CIPHER_ALG_DES, QCE_MODE_CBC,
+ DES_KEY_SIZE);
+ _setup_aead_cmdlistptrs(pdev, pvaddr, CIPHER_ALG_DES, QCE_MODE_ECB,
+ DES_KEY_SIZE);
+ _setup_aead_cmdlistptrs(pdev, pvaddr, CIPHER_ALG_3DES, QCE_MODE_CBC,
+ DES3_EDE_KEY_SIZE);
+ _setup_aead_cmdlistptrs(pdev, pvaddr, CIPHER_ALG_3DES, QCE_MODE_ECB,
+ DES3_EDE_KEY_SIZE);
+ _setup_aead_cmdlistptrs(pdev, pvaddr, CIPHER_ALG_AES, QCE_MODE_CBC,
+ AES128_KEY_SIZE);
+ _setup_aead_cmdlistptrs(pdev, pvaddr, CIPHER_ALG_AES, QCE_MODE_ECB,
+ AES128_KEY_SIZE);
+ _setup_aead_cmdlistptrs(pdev, pvaddr, CIPHER_ALG_AES, QCE_MODE_CBC,
+ AES256_KEY_SIZE);
+ _setup_aead_cmdlistptrs(pdev, pvaddr, CIPHER_ALG_AES, QCE_MODE_ECB,
+ AES256_KEY_SIZE);
- _setup_aead_cmdlistptrs(pdev, pvaddr, true);
- _setup_aead_cmdlistptrs(pdev, pvaddr, false);
+ _setup_aead_ccm_cmdlistptrs(pdev, pvaddr, true);
+ _setup_aead_ccm_cmdlistptrs(pdev, pvaddr, false);
_setup_unlock_pipe_cmdlistptrs(pdev, pvaddr);
return 0;
@@ -2729,8 +3291,14 @@
pce_dev->ce_sps.ce_burst_size);
pce_dev->ce_sps.result_dump = (uint32_t)vaddr;
pce_dev->ce_sps.result = (struct ce_result_dump_format *)vaddr;
- vaddr += 128;
+ vaddr += CRYPTO_RESULT_DUMP_SIZE;
+ pce_dev->ce_sps.ignore_buffer = (uint32_t)vaddr;
+ vaddr += pce_dev->ce_sps.ce_burst_size * 2;
+
+ if ((vaddr - pce_dev->coh_vmem) > pce_dev->memsize)
+ panic("qce50: Not enough coherent memory. Allocate %x , need %x",
+ pce_dev->memsize, vaddr - pce_dev->coh_vmem);
return 0;
}
@@ -2791,7 +3359,8 @@
pce_dev->reg.encr_cfg_aes_ccm_128 =
(CRYPTO_ENCR_KEY_SZ_AES128 << CRYPTO_ENCR_KEY_SZ) |
(CRYPTO_ENCR_ALG_AES << CRYPTO_ENCR_ALG) |
- ((CRYPTO_ENCR_MODE_CCM << CRYPTO_ENCR_MODE));
+ (CRYPTO_ENCR_MODE_CCM << CRYPTO_ENCR_MODE)|
+ (CRYPTO_LAST_CCM_XFR << CRYPTO_LAST_CCM);
pce_dev->reg.encr_cfg_aes_ccm_256 =
(CRYPTO_ENCR_KEY_SZ_AES256 << CRYPTO_ENCR_KEY_SZ) |
@@ -2866,7 +3435,12 @@
(CRYPTO_AUTH_MODE_HMAC << CRYPTO_AUTH_MODE)|
(CRYPTO_AUTH_SIZE_SHA1 << CRYPTO_AUTH_SIZE) |
(CRYPTO_AUTH_ALG_SHA << CRYPTO_AUTH_ALG) |
- (CRYPTO_AUTH_POS_BEFORE << CRYPTO_AUTH_POS) |
+ (1 << CRYPTO_LAST) | (1 << CRYPTO_FIRST);
+
+ pce_dev->reg.auth_cfg_aead_sha256_hmac =
+ (CRYPTO_AUTH_MODE_HMAC << CRYPTO_AUTH_MODE)|
+ (CRYPTO_AUTH_SIZE_SHA256 << CRYPTO_AUTH_SIZE) |
+ (CRYPTO_AUTH_ALG_SHA << CRYPTO_AUTH_ALG) |
(1 << CRYPTO_LAST) | (1 << CRYPTO_FIRST);
pce_dev->reg.auth_cfg_aes_ccm_128 =
@@ -2888,83 +3462,46 @@
return 0;
}
-int qce_aead_sha1_hmac_setup(struct qce_req *creq, struct crypto_aead *aead,
- struct qce_cmdlist_info *cmdlistinfo)
-{
- uint32_t authk_size_in_word = creq->authklen/sizeof(uint32_t);
- uint32_t mackey32[SHA_HMAC_KEY_SIZE/sizeof(uint32_t)] = {
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0};
- struct sps_command_element *pce = NULL;
- struct aead_request *areq = (struct aead_request *)creq->areq;
- int i;
-
- _byte_stream_to_net_words(mackey32, creq->authkey,
- creq->authklen);
- pce = cmdlistinfo->auth_key;
- for (i = 0; i < authk_size_in_word; i++, pce++)
- pce->data = mackey32[i];
- pce = cmdlistinfo->auth_iv;
- for (i = 0; i < 5; i++, pce++)
- pce->data = _std_init_vector_sha1[i];
- /* write auth seg size */
- pce = cmdlistinfo->auth_seg_size;
- pce->data = creq->cryptlen + areq->assoclen + crypto_aead_ivsize(aead);
-
- /* write auth seg size start*/
- pce = cmdlistinfo->auth_seg_start;
- pce->data = 0;
-
- return 0;
-}
-
-int qce_aead_req(void *handle, struct qce_req *q_req)
+static int _qce_aead_ccm_req(void *handle, struct qce_req *q_req)
{
struct qce_device *pce_dev = (struct qce_device *) handle;
struct aead_request *areq = (struct aead_request *) q_req->areq;
uint32_t authsize = q_req->authsize;
- struct crypto_aead *aead = crypto_aead_reqtfm(areq);
- uint32_t ivsize = 0;
uint32_t totallen_in, out_len;
uint32_t hw_pad_out = 0;
int rc = 0;
int ce_burst_size;
struct qce_cmdlist_info *cmdlistinfo = NULL;
- struct qce_cmdlist_info *auth_cmdlistinfo = NULL;
-
- if (q_req->mode != QCE_MODE_CCM) {
- ivsize = crypto_aead_ivsize(aead);
- auth_cmdlistinfo = &pce_dev->ce_sps.cmdlistptr.aead_sha1_hmac;
- if (auth_cmdlistinfo == NULL) {
- pr_err("Received NULL cmdlist, exiting now\n");
- return -EINVAL;
- }
- }
ce_burst_size = pce_dev->ce_sps.ce_burst_size;
+ totallen_in = areq->cryptlen + areq->assoclen;
if (q_req->dir == QCE_ENCRYPT) {
q_req->cryptlen = areq->cryptlen;
- totallen_in = q_req->cryptlen + areq->assoclen + ivsize;
- if (q_req->mode == QCE_MODE_CCM) {
- out_len = areq->cryptlen + authsize;
- hw_pad_out = ALIGN(authsize, ce_burst_size) - authsize;
- } else {
- out_len = areq->cryptlen;
- }
+ out_len = areq->cryptlen + authsize;
+ hw_pad_out = ALIGN(authsize, ce_burst_size) - authsize;
} else {
q_req->cryptlen = areq->cryptlen - authsize;
- if (q_req->mode == QCE_MODE_CCM)
- totallen_in = areq->cryptlen + areq->assoclen;
- else
- totallen_in = q_req->cryptlen + areq->assoclen + ivsize;
out_len = q_req->cryptlen;
hw_pad_out = authsize;
}
+ if (pce_dev->ce_sps.minor_version == 0) {
+ /*
+ * For crypto 5.0 that has burst size alignment requirement
+ * for data descritpor,
+ * the agent above(qcrypto) prepares the src scatter list with
+ * memory starting with associated data, followed by
+ * data stream to be ciphered.
+ * The destination scatter list is pointing to the same
+ * data area as source.
+ */
+ pce_dev->src_nents = count_sg(areq->src, totallen_in);
+ } else {
+ pce_dev->src_nents = count_sg(areq->src, areq->cryptlen);
+ }
+
pce_dev->assoc_nents = count_sg(areq->assoc, areq->assoclen);
- pce_dev->src_nents = count_sg(areq->src, areq->cryptlen);
- pce_dev->ivsize = q_req->ivsize;
pce_dev->authsize = q_req->authsize;
- pce_dev->phy_iv_in = 0;
/* associated data input */
qce_dma_map_sg(pce_dev->pdev, areq->assoc, pce_dev->assoc_nents,
@@ -2975,7 +3512,18 @@
DMA_TO_DEVICE);
/* cipher + mac output for encryption */
if (areq->src != areq->dst) {
- pce_dev->dst_nents = count_sg(areq->dst, out_len);
+ if (pce_dev->ce_sps.minor_version == 0)
+ /*
+ * The destination scatter list is pointing to the same
+ * data area as src.
+ * Note, the associated data will be pass-through
+ * at the begining of destination area.
+ */
+ pce_dev->dst_nents = count_sg(areq->dst,
+ out_len + areq->assoclen);
+ else
+ pce_dev->dst_nents = count_sg(areq->dst, out_len);
+
qce_dma_map_sg(pce_dev->pdev, areq->dst, pce_dev->dst_nents,
DMA_FROM_DEVICE);
} else {
@@ -2986,26 +3534,15 @@
_ce_get_cipher_cmdlistinfo(pce_dev, q_req, &cmdlistinfo);
/* set up crypto device */
rc = _ce_setup_cipher(pce_dev, q_req, totallen_in,
- areq->assoclen + ivsize, cmdlistinfo);
+ areq->assoclen, cmdlistinfo);
} else {
/* set up crypto device */
rc = _ce_setup_cipher_direct(pce_dev, q_req, totallen_in,
- areq->assoclen + ivsize);
+ areq->assoclen);
}
if (rc < 0)
goto bad;
- if (q_req->mode != QCE_MODE_CCM) {
- rc = qce_aead_sha1_hmac_setup(q_req, aead, auth_cmdlistinfo);
- if (rc < 0)
- goto bad;
- /* overwrite seg size */
- cmdlistinfo->seg_size->data = totallen_in;
- /* cipher iv for input */
- pce_dev->phy_iv_in = dma_map_single(pce_dev->pdev, q_req->iv,
- ivsize, DMA_TO_DEVICE);
- }
-
/* setup for callback, and issue command to bam */
pce_dev->areq = q_req->areq;
pce_dev->qce_cb = q_req->qce_cb;
@@ -3033,6 +3570,10 @@
_qce_set_flag(&pce_dev->ce_sps.in_transfer,
SPS_IOVEC_FLAG_EOT|SPS_IOVEC_FLAG_NWD);
+ /*
+ * The destination data should be big enough to
+ * include CCM padding.
+ */
if (_qce_sps_add_sg_data(pce_dev, areq->dst, out_len +
areq->assoclen + hw_pad_out,
&pce_dev->ce_sps.out_transfer))
@@ -3057,6 +3598,211 @@
if (_qce_sps_add_sg_data(pce_dev, areq->assoc, areq->assoclen,
&pce_dev->ce_sps.in_transfer))
goto bad;
+ if (_qce_sps_add_sg_data(pce_dev, areq->src, areq->cryptlen,
+ &pce_dev->ce_sps.in_transfer))
+ goto bad;
+ _qce_set_flag(&pce_dev->ce_sps.in_transfer,
+ SPS_IOVEC_FLAG_EOT|SPS_IOVEC_FLAG_NWD);
+
+ /* Pass through to ignore associated data*/
+ if (_qce_sps_add_data(
+ GET_PHYS_ADDR(pce_dev->ce_sps.ignore_buffer),
+ areq->assoclen,
+ &pce_dev->ce_sps.out_transfer))
+ goto bad;
+ if (_qce_sps_add_sg_data(pce_dev, areq->dst, out_len,
+ &pce_dev->ce_sps.out_transfer))
+ goto bad;
+ /* Pass through to ignore hw_pad (padding of the MAC data) */
+ if (_qce_sps_add_data(
+ GET_PHYS_ADDR(pce_dev->ce_sps.ignore_buffer),
+ hw_pad_out, &pce_dev->ce_sps.out_transfer))
+ goto bad;
+ if (totallen_in > SPS_MAX_PKT_SIZE) {
+ _qce_set_flag(&pce_dev->ce_sps.out_transfer,
+ SPS_IOVEC_FLAG_INT);
+ pce_dev->ce_sps.producer_state = QCE_PIPE_STATE_IDLE;
+ } else {
+ if (_qce_sps_add_data(
+ GET_PHYS_ADDR(pce_dev->ce_sps.result_dump),
+ CRYPTO_RESULT_DUMP_SIZE,
+ &pce_dev->ce_sps.out_transfer))
+ goto bad;
+ _qce_set_flag(&pce_dev->ce_sps.out_transfer,
+ SPS_IOVEC_FLAG_INT);
+ pce_dev->ce_sps.producer_state = QCE_PIPE_STATE_COMP;
+ }
+ }
+ rc = _qce_sps_transfer(pce_dev);
+ if (rc)
+ goto bad;
+ return 0;
+
+bad:
+ if (pce_dev->assoc_nents) {
+ qce_dma_unmap_sg(pce_dev->pdev, areq->assoc,
+ pce_dev->assoc_nents, DMA_TO_DEVICE);
+ }
+ if (pce_dev->src_nents) {
+ qce_dma_unmap_sg(pce_dev->pdev, areq->src, pce_dev->src_nents,
+ (areq->src == areq->dst) ? DMA_BIDIRECTIONAL :
+ DMA_TO_DEVICE);
+ }
+ if (areq->src != areq->dst) {
+ qce_dma_unmap_sg(pce_dev->pdev, areq->dst, pce_dev->dst_nents,
+ DMA_FROM_DEVICE);
+ }
+
+ return rc;
+}
+
+int qce_aead_req(void *handle, struct qce_req *q_req)
+{
+ struct qce_device *pce_dev;
+ struct aead_request *areq;
+ uint32_t authsize;
+ struct crypto_aead *aead;
+ uint32_t ivsize;
+ uint32_t totallen;
+ int rc;
+ struct qce_cmdlist_info *cmdlistinfo = NULL;
+
+ if (q_req->mode == QCE_MODE_CCM)
+ return _qce_aead_ccm_req(handle, q_req);
+
+ pce_dev = (struct qce_device *) handle;
+ areq = (struct aead_request *) q_req->areq;
+ aead = crypto_aead_reqtfm(areq);
+ ivsize = crypto_aead_ivsize(aead);
+ q_req->ivsize = ivsize;
+ authsize = q_req->authsize;
+ if (q_req->dir == QCE_ENCRYPT)
+ q_req->cryptlen = areq->cryptlen;
+ else
+ q_req->cryptlen = areq->cryptlen - authsize;
+
+ totallen = q_req->cryptlen + areq->assoclen + ivsize;
+
+ if (pce_dev->support_cmd_dscr) {
+ cmdlistinfo = _ce_get_aead_cmdlistinfo(pce_dev, q_req);
+ if (cmdlistinfo == NULL) {
+ pr_err("Unsupported aead ciphering algorithm %d, mode %d, ciphering key length %d, auth digest size %d\n",
+ q_req->alg, q_req->mode, q_req->encklen,
+ q_req->authsize);
+ return -EINVAL;
+ }
+ /* set up crypto device */
+ rc = _ce_setup_aead(pce_dev, q_req, totallen,
+ areq->assoclen + ivsize, cmdlistinfo);
+ if (rc < 0)
+ return -EINVAL;
+ };
+
+
+ pce_dev->assoc_nents = count_sg(areq->assoc, areq->assoclen);
+
+ if (pce_dev->ce_sps.minor_version == 0) {
+ /*
+ * For crypto 5.0 that has burst size alignment requirement
+ * for data descritpor,
+ * the agent above(qcrypto) prepares the src scatter list with
+ * memory starting with associated data, followed by
+ * iv, and data stream to be ciphered.
+ */
+ pce_dev->src_nents = count_sg(areq->src, totallen);
+ } else {
+ pce_dev->src_nents = count_sg(areq->src, q_req->cryptlen);
+ };
+
+ pce_dev->ivsize = q_req->ivsize;
+ pce_dev->authsize = q_req->authsize;
+ pce_dev->phy_iv_in = 0;
+
+ /* associated data input */
+ qce_dma_map_sg(pce_dev->pdev, areq->assoc, pce_dev->assoc_nents,
+ DMA_TO_DEVICE);
+ /* cipher input */
+ qce_dma_map_sg(pce_dev->pdev, areq->src, pce_dev->src_nents,
+ (areq->src == areq->dst) ? DMA_BIDIRECTIONAL :
+ DMA_TO_DEVICE);
+ /* cipher + mac output for encryption */
+ if (areq->src != areq->dst) {
+ if (pce_dev->ce_sps.minor_version == 0)
+ /*
+ * The destination scatter list is pointing to the same
+ * data area as source.
+ */
+ pce_dev->dst_nents = count_sg(areq->dst, totallen);
+ else
+ pce_dev->dst_nents = count_sg(areq->dst,
+ q_req->cryptlen);
+
+ qce_dma_map_sg(pce_dev->pdev, areq->dst, pce_dev->dst_nents,
+ DMA_FROM_DEVICE);
+ }
+
+
+ /* cipher iv for input */
+ if (pce_dev->ce_sps.minor_version != 0)
+ pce_dev->phy_iv_in = dma_map_single(pce_dev->pdev, q_req->iv,
+ ivsize, DMA_TO_DEVICE);
+
+ /* setup for callback, and issue command to bam */
+ pce_dev->areq = q_req->areq;
+ pce_dev->qce_cb = q_req->qce_cb;
+
+ /* Register callback event for EOT (End of transfer) event. */
+ pce_dev->ce_sps.producer.event.callback = _aead_sps_producer_callback;
+ pce_dev->ce_sps.producer.event.options = SPS_O_DESC_DONE;
+ rc = sps_register_event(pce_dev->ce_sps.producer.pipe,
+ &pce_dev->ce_sps.producer.event);
+ if (rc) {
+ pr_err("Producer callback registration failed rc = %d\n", rc);
+ goto bad;
+ }
+ _qce_sps_iovec_count_init(pce_dev);
+
+ if (pce_dev->support_cmd_dscr) {
+ _qce_sps_add_cmd(pce_dev, SPS_IOVEC_FLAG_LOCK, cmdlistinfo,
+ &pce_dev->ce_sps.in_transfer);
+ } else {
+ rc = _ce_setup_aead_direct(pce_dev, q_req, totallen,
+ areq->assoclen + ivsize);
+ if (rc)
+ goto bad;
+ }
+
+ if (pce_dev->ce_sps.minor_version == 0) {
+ if (_qce_sps_add_sg_data(pce_dev, areq->src, totallen,
+ &pce_dev->ce_sps.in_transfer))
+ goto bad;
+
+ _qce_set_flag(&pce_dev->ce_sps.in_transfer,
+ SPS_IOVEC_FLAG_EOT|SPS_IOVEC_FLAG_NWD);
+
+ if (_qce_sps_add_sg_data(pce_dev, areq->dst, totallen,
+ &pce_dev->ce_sps.out_transfer))
+ goto bad;
+ if (totallen > SPS_MAX_PKT_SIZE) {
+ _qce_set_flag(&pce_dev->ce_sps.out_transfer,
+ SPS_IOVEC_FLAG_INT);
+ pce_dev->ce_sps.producer.event.options =
+ SPS_O_DESC_DONE;
+ pce_dev->ce_sps.producer_state = QCE_PIPE_STATE_IDLE;
+ } else {
+ if (_qce_sps_add_data(GET_PHYS_ADDR(
+ pce_dev->ce_sps.result_dump),
+ CRYPTO_RESULT_DUMP_SIZE,
+ &pce_dev->ce_sps.out_transfer))
+ goto bad;
+ _qce_set_flag(&pce_dev->ce_sps.out_transfer,
+ SPS_IOVEC_FLAG_INT);
+ pce_dev->ce_sps.producer_state = QCE_PIPE_STATE_COMP;
+ }
+ } else {
+ if (_qce_sps_add_sg_data(pce_dev, areq->assoc, areq->assoclen,
+ &pce_dev->ce_sps.in_transfer))
+ goto bad;
if (_qce_sps_add_data((uint32_t)pce_dev->phy_iv_in, ivsize,
&pce_dev->ce_sps.in_transfer))
goto bad;
@@ -3066,21 +3812,17 @@
_qce_set_flag(&pce_dev->ce_sps.in_transfer,
SPS_IOVEC_FLAG_EOT|SPS_IOVEC_FLAG_NWD);
- /* Pass through to ignore associated (+iv, if applicable) data*/
+ /* Pass through to ignore associated + iv data*/
if (_qce_sps_add_data(
GET_PHYS_ADDR(pce_dev->ce_sps.ignore_buffer),
(ivsize + areq->assoclen),
&pce_dev->ce_sps.out_transfer))
goto bad;
- if (_qce_sps_add_sg_data(pce_dev, areq->dst, out_len,
+ if (_qce_sps_add_sg_data(pce_dev, areq->dst, areq->cryptlen,
&pce_dev->ce_sps.out_transfer))
goto bad;
- /* Pass through to ignore hw_pad (padding of the MAC data) */
- if (_qce_sps_add_data(
- GET_PHYS_ADDR(pce_dev->ce_sps.ignore_buffer),
- hw_pad_out, &pce_dev->ce_sps.out_transfer))
- goto bad;
- if (totallen_in > SPS_MAX_PKT_SIZE) {
+
+ if (totallen > SPS_MAX_PKT_SIZE) {
_qce_set_flag(&pce_dev->ce_sps.out_transfer,
SPS_IOVEC_FLAG_INT);
pce_dev->ce_sps.producer_state = QCE_PIPE_STATE_IDLE;
diff --git a/drivers/crypto/msm/qce50.h b/drivers/crypto/msm/qce50.h
index 38515fb..adab5d4 100644
--- a/drivers/crypto/msm/qce50.h
+++ b/drivers/crypto/msm/qce50.h
@@ -103,7 +103,14 @@
struct qce_cmdlist_info auth_sha256_hmac;
struct qce_cmdlist_info auth_aes_128_cmac;
struct qce_cmdlist_info auth_aes_256_cmac;
- struct qce_cmdlist_info aead_sha1_hmac;
+ struct qce_cmdlist_info aead_hmac_sha1_cbc_aes_128;
+ struct qce_cmdlist_info aead_hmac_sha1_cbc_aes_256;
+ struct qce_cmdlist_info aead_hmac_sha1_cbc_des;
+ struct qce_cmdlist_info aead_hmac_sha1_cbc_3des;
+ struct qce_cmdlist_info aead_hmac_sha1_ecb_aes_128;
+ struct qce_cmdlist_info aead_hmac_sha1_ecb_aes_256;
+ struct qce_cmdlist_info aead_hmac_sha1_ecb_des;
+ struct qce_cmdlist_info aead_hmac_sha1_ecb_3des;
struct qce_cmdlist_info aead_aes_128_ccm;
struct qce_cmdlist_info aead_aes_256_ccm;
struct qce_cmdlist_info unlock_all_pipes;
@@ -146,6 +153,7 @@
uint32_t auth_cfg_aes_ccm_128;
uint32_t auth_cfg_aes_ccm_256;
uint32_t auth_cfg_aead_sha1_hmac;
+ uint32_t auth_cfg_aead_sha256_hmac;
};
diff --git a/drivers/crypto/msm/qcrypto.c b/drivers/crypto/msm/qcrypto.c
index 39b9a46..c98cbba 100644
--- a/drivers/crypto/msm/qcrypto.c
+++ b/drivers/crypto/msm/qcrypto.c
@@ -44,7 +44,12 @@
#define DEBUG_MAX_FNAME 16
-#define DEBUG_MAX_RW_BUF 1024
+#define DEBUG_MAX_RW_BUF 2048
+
+/*
+ * For crypto 5.0 which has burst size alignment requirement.
+ */
+#define MAX_ALIGN_SIZE 0x40
struct crypto_stat {
u32 aead_sha1_aes_enc;
@@ -824,7 +829,14 @@
struct crypto_tfm *tfm = crypto_ablkcipher_tfm(cipher);
struct qcrypto_cipher_ctx *ctx = crypto_tfm_ctx(tfm);
u32 tmp[DES_EXPKEY_WORDS];
- int ret = des_ekey(tmp, key);
+ int ret;
+
+ if (!key) {
+ pr_err("%s Inavlid key pointer\n", __func__);
+ return -EINVAL;
+ }
+
+ ret = des_ekey(tmp, key);
if ((ctx->flags & QCRYPTO_CTX_USE_HW_KEY) == QCRYPTO_CTX_USE_HW_KEY) {
pr_err("%s HW KEY usage not supported for DES algorithm\n",
@@ -843,14 +855,9 @@
}
ctx->enc_key_len = len;
- if (!(ctx->flags & QCRYPTO_CTX_USE_PIPE_KEY)) {
- if (key != NULL) {
- memcpy(ctx->enc_key, key, len);
- } else {
- pr_err("%s Inavlid key pointer\n", __func__);
- return -EINVAL;
- }
- }
+ if (!(ctx->flags & QCRYPTO_CTX_USE_PIPE_KEY))
+ memcpy(ctx->enc_key, key, len);
+
return 0;
};
@@ -1087,6 +1094,37 @@
areq->assoc = rctx->assoc_sg;
areq->assoclen = rctx->assoclen;
} else {
+ uint32_t ivsize = crypto_aead_ivsize(aead);
+
+ /* for aead operations, other than aes(ccm) */
+ if (cp->ce_support.aligned_only) {
+ struct qcrypto_cipher_req_ctx *rctx;
+ uint32_t bytes = 0;
+ uint32_t nbytes = 0;
+ uint32_t num_sg = 0;
+ uint32_t offset = areq->assoclen + ivsize;
+
+ rctx = aead_request_ctx(areq);
+ areq->src = rctx->orig_src;
+ areq->dst = rctx->orig_dst;
+
+ if (rctx->dir == QCE_ENCRYPT)
+ nbytes = areq->cryptlen;
+ else
+ nbytes = areq->cryptlen -
+ crypto_aead_authsize(aead);
+ num_sg = qcrypto_count_sg(areq->dst, nbytes);
+ bytes = qcrypto_sg_copy_from_buffer(
+ areq->dst,
+ num_sg,
+ (char *)rctx->data + offset,
+ nbytes);
+ if (bytes != nbytes)
+ pr_warn("bytes copied=0x%x bytes to copy= 0x%x",
+ bytes, nbytes);
+ kfree(rctx->data);
+ }
+
if (ret == 0) {
if (rctx->dir == QCE_ENCRYPT) {
/* copy the icv to dst */
@@ -1111,7 +1149,7 @@
}
if (iv)
- memcpy(ctx->iv, iv, crypto_aead_ivsize(aead));
+ memcpy(ctx->iv, iv, ivsize);
}
if (ret == (-EBADMSG))
@@ -1174,7 +1212,7 @@
uint32_t bytes = 0;
uint32_t num_sg = 0;
- qreq->assoc = kzalloc((alen + 0x64), (GFP_KERNEL | __GFP_DMA));
+ qreq->assoc = kzalloc((alen + 0x64), GFP_ATOMIC);
if (!qreq->assoc) {
pr_err("qcrypto Memory allocation of adata FAIL, error %ld\n",
PTR_ERR(qreq->assoc));
@@ -1432,6 +1470,68 @@
sg_set_buf(req->assoc, qreq.assoc,
req->assoclen);
sg_mark_end(req->assoc);
+ } else {
+ /* for aead operations, other than aes(ccm) */
+ if (cp->ce_support.aligned_only) {
+ uint32_t bytes = 0;
+ uint32_t num_sg = 0;
+
+ rctx->orig_src = req->src;
+ rctx->orig_dst = req->dst;
+ /*
+ * The data area should be big enough to
+ * include assoicated data, ciphering data stream,
+ * generated MAC, and CCM padding.
+ */
+ rctx->data = kzalloc(
+ (req->cryptlen +
+ req->assoclen +
+ qreq.ivsize +
+ MAX_ALIGN_SIZE * 2),
+ GFP_ATOMIC);
+ if (rctx->data == NULL) {
+ pr_err("Mem Alloc fail rctx->data, err %ld\n",
+ PTR_ERR(rctx->data));
+ return -ENOMEM;
+ }
+
+ /* copy associated data */
+ num_sg = qcrypto_count_sg(req->assoc, req->assoclen);
+ bytes = qcrypto_sg_copy_to_buffer(
+ req->assoc, num_sg,
+ rctx->data, req->assoclen);
+
+ if (bytes != req->assoclen)
+ pr_warn("bytes copied=0x%x bytes to copy= 0x%x",
+ bytes, req->assoclen);
+
+ /* copy iv */
+ memcpy(rctx->data + req->assoclen, qreq.iv,
+ qreq.ivsize);
+
+ /* copy src */
+ num_sg = qcrypto_count_sg(req->src, req->cryptlen);
+ bytes = qcrypto_sg_copy_to_buffer(
+ req->src,
+ num_sg,
+ rctx->data + req->assoclen +
+ qreq.ivsize,
+ req->cryptlen);
+ if (bytes != req->cryptlen)
+ pr_warn("bytes copied=0x%x bytes to copy= 0x%x",
+ bytes, req->cryptlen);
+ sg_set_buf(&rctx->ssg, rctx->data,
+ req->cryptlen + req->assoclen
+ + qreq.ivsize);
+ sg_mark_end(&rctx->ssg);
+
+ sg_set_buf(&rctx->dsg, rctx->data,
+ req->cryptlen + req->assoclen
+ + qreq.ivsize);
+ sg_mark_end(&rctx->dsg);
+ req->src = &rctx->ssg;
+ req->dst = &rctx->dsg;
+ }
}
ret = qce_aead_req(cp->qce, &qreq);
@@ -3644,7 +3744,8 @@
}
/* register crypto aead (hmac-sha1) algorithms the device supports */
- if (cp->ce_support.sha1_hmac_20 || cp->ce_support.sha1_hmac) {
+ if (cp->ce_support.sha1_hmac_20 || cp->ce_support.sha1_hmac
+ || cp->ce_support.sha_hmac) {
for (i = 0; i < ARRAY_SIZE(_qcrypto_aead_sha1_hmac_algos);
i++) {
struct qcrypto_alg *q_alg;
diff --git a/drivers/devfreq/devfreq.c b/drivers/devfreq/devfreq.c
index 89d779c..dadf87c 100644
--- a/drivers/devfreq/devfreq.c
+++ b/drivers/devfreq/devfreq.c
@@ -69,11 +69,34 @@
}
/**
+ * devfreq_set_freq_limits() - Set min and max frequency from freq_table
+ * @devfreq: the devfreq instance
+ */
+static void devfreq_set_freq_limits(struct devfreq *devfreq)
+{
+ int idx;
+ unsigned long min = ~0, max = 0;
+
+ if (!devfreq->profile->freq_table)
+ return;
+
+ for (idx = 0; idx < devfreq->profile->max_state; idx++) {
+ if (min > devfreq->profile->freq_table[idx])
+ min = devfreq->profile->freq_table[idx];
+ if (max < devfreq->profile->freq_table[idx])
+ max = devfreq->profile->freq_table[idx];
+ }
+
+ devfreq->min_freq = min;
+ devfreq->max_freq = max;
+}
+
+/**
* devfreq_get_freq_level() - Lookup freq_table for the frequency
* @devfreq: the devfreq instance
* @freq: the target frequency
*/
-static int devfreq_get_freq_level(struct devfreq *devfreq, unsigned long freq)
+int devfreq_get_freq_level(struct devfreq *devfreq, unsigned long freq)
{
int lev;
@@ -83,6 +106,7 @@
return -EINVAL;
}
+EXPORT_SYMBOL(devfreq_get_freq_level);
/**
* devfreq_update_status() - Update statistics of devfreq behavior
@@ -419,6 +443,32 @@
}
/**
+ * find_governor_data - Find device specific private data for a governor.
+ * @profile: The profile to search.
+ * @governor_name: The governor to search for.
+ *
+ * Look up the device specific data for a governor.
+ */
+static void *find_governor_data(struct devfreq_dev_profile *profile,
+ const char *governor_name)
+{
+ void *data = NULL;
+ int i;
+
+ if (profile->governor_data == NULL)
+ return NULL;
+
+ for (i = 0; i < profile->num_governor_data; i++) {
+ if (!strncmp(governor_name, profile->governor_data[i].name,
+ DEVFREQ_NAME_LEN) == 0) {
+ data = profile->governor_data[i].data;
+ break;
+ }
+ }
+ return data;
+}
+
+/**
* devfreq_add_device() - Add devfreq feature to the device
* @dev: the device to add devfreq feature.
* @profile: device-specific profile to run devfreq.
@@ -465,7 +515,10 @@
devfreq->profile = profile;
strncpy(devfreq->governor_name, governor_name, DEVFREQ_NAME_LEN);
devfreq->previous_freq = profile->initial_freq;
- devfreq->data = data;
+
+ devfreq->data = data ? data : find_governor_data(devfreq->profile,
+ governor_name);
+
devfreq->nb.notifier_call = devfreq_notifier_call;
devfreq->trans_table = devm_kzalloc(dev, sizeof(unsigned int) *
@@ -476,6 +529,7 @@
devfreq->profile->max_state,
GFP_KERNEL);
devfreq->last_stat_updated = jiffies;
+ devfreq_set_freq_limits(devfreq);
dev_set_name(&devfreq->dev, dev_name(dev));
err = device_register(&devfreq->dev);
@@ -722,6 +776,7 @@
goto out;
}
}
+ df->data = find_governor_data(df->profile, str_governor);
df->governor = governor;
strncpy(df->governor_name, governor->name, DEVFREQ_NAME_LEN);
ret = df->governor->event_handler(df, DEVFREQ_GOV_START, NULL);
diff --git a/drivers/devfreq/governor.h b/drivers/devfreq/governor.h
index fad7d63..ebde695 100644
--- a/drivers/devfreq/governor.h
+++ b/drivers/devfreq/governor.h
@@ -38,4 +38,5 @@
extern int devfreq_add_governor(struct devfreq_governor *governor);
extern int devfreq_remove_governor(struct devfreq_governor *governor);
+extern int devfreq_get_freq_level(struct devfreq *devfreq, unsigned long freq);
#endif /* _GOVERNOR_H */
diff --git a/drivers/devfreq/governor_performance.c b/drivers/devfreq/governor_performance.c
index c72f942..bc7da1e 100644
--- a/drivers/devfreq/governor_performance.c
+++ b/drivers/devfreq/governor_performance.c
@@ -32,7 +32,7 @@
{
int ret = 0;
- if (event == DEVFREQ_GOV_START) {
+ if (event == DEVFREQ_GOV_START || event == DEVFREQ_GOV_RESUME) {
mutex_lock(&devfreq->lock);
ret = update_devfreq(devfreq);
mutex_unlock(&devfreq->lock);
diff --git a/drivers/devfreq/governor_powersave.c b/drivers/devfreq/governor_powersave.c
index 0c6bed5..6d43685 100644
--- a/drivers/devfreq/governor_powersave.c
+++ b/drivers/devfreq/governor_powersave.c
@@ -29,7 +29,7 @@
{
int ret = 0;
- if (event == DEVFREQ_GOV_START) {
+ if (event == DEVFREQ_GOV_START || event == DEVFREQ_GOV_RESUME) {
mutex_lock(&devfreq->lock);
ret = update_devfreq(devfreq);
mutex_unlock(&devfreq->lock);
diff --git a/drivers/gpio/gpiolib.c b/drivers/gpio/gpiolib.c
index 5a75510..7db56a3 100644
--- a/drivers/gpio/gpiolib.c
+++ b/drivers/gpio/gpiolib.c
@@ -1081,6 +1081,10 @@
}
}
+#ifdef CONFIG_PINCTRL
+ INIT_LIST_HEAD(&chip->pin_ranges);
+#endif
+
of_gpiochip_add(chip);
unlock:
@@ -1178,6 +1182,47 @@
}
EXPORT_SYMBOL_GPL(gpiochip_find);
+#ifdef CONFIG_PINCTRL
+int gpiochip_add_pin_range(struct gpio_chip *chip, const char *pinctl_name,
+ unsigned int pin_base, unsigned int npins)
+{
+ struct gpio_pin_range *pin_range;
+
+ pin_range = devm_kzalloc(chip->dev, sizeof(*pin_range), GFP_KERNEL);
+ if (!pin_range) {
+ pr_err("%s: GPIO chip: failed to allocate pin ranges\n",
+ chip->label);
+ return -ENOMEM;
+ }
+
+ pin_range->range.name = chip->label;
+ pin_range->range.base = chip->base;
+ pin_range->range.pin_base = pin_base;
+ pin_range->range.npins = npins;
+ pin_range->pctldev = pinctrl_find_and_add_gpio_range(pinctl_name,
+ &pin_range->range);
+
+ list_add_tail(&pin_range->node, &chip->pin_ranges);
+
+ return 0;
+}
+
+void gpiochip_remove_pin_ranges(struct gpio_chip *chip)
+{
+ struct gpio_pin_range *pin_range, *tmp;
+
+ list_for_each_entry_safe(pin_range, tmp, &chip->pin_ranges, node) {
+ list_del(&pin_range->node);
+ pinctrl_remove_gpio_range(pin_range->pctldev,
+ &pin_range->range);
+ }
+}
+#else
+void gpiochip_add_pin_range(struct gpio_chip *chip, const char *pinctl_name,
+ unsigned int pin_base, unsigned int npins) {}
+void gpiochip_remove_pin_ranges(struct gpio_chip *chip) {}
+#endif
+
/* These "optional" allocation calls help prevent drivers from stomping
* on each other, and help provide better diagnostics in debugfs.
* They're called even less than the "set direction" calls.
diff --git a/drivers/gpu/ion/ion_cma_heap.c b/drivers/gpu/ion/ion_cma_heap.c
index e7f7836..b24b2bd 100644
--- a/drivers/gpu/ion/ion_cma_heap.c
+++ b/drivers/gpu/ion/ion_cma_heap.c
@@ -76,10 +76,10 @@
if (!ION_IS_CACHED(flags))
info->cpu_addr = dma_alloc_writecombine(dev, len,
- &(info->handle), 0);
+ &(info->handle), GFP_KERNEL);
else
info->cpu_addr = dma_alloc_nonconsistent(dev, len,
- &(info->handle), 0);
+ &(info->handle), GFP_KERNEL);
if (!info->cpu_addr) {
dev_err(dev, "Fail to allocate buffer\n");
diff --git a/drivers/gpu/ion/ion_cma_secure_heap.c b/drivers/gpu/ion/ion_cma_secure_heap.c
index b3960b2..415c73e 100644
--- a/drivers/gpu/ion/ion_cma_secure_heap.c
+++ b/drivers/gpu/ion/ion_cma_secure_heap.c
@@ -83,7 +83,8 @@
return ION_CMA_ALLOCATE_FAILED;
}
- info->cpu_addr = dma_alloc_attrs(dev, len, &(info->handle), 0, &attrs);
+ info->cpu_addr = dma_alloc_attrs(dev, len, &(info->handle), GFP_KERNEL,
+ &attrs);
if (!info->cpu_addr) {
dev_err(dev, "Fail to allocate buffer\n");
diff --git a/drivers/gpu/ion/msm/ion_cp_common.c b/drivers/gpu/ion/msm/ion_cp_common.c
index 623a174..d315fc4 100644
--- a/drivers/gpu/ion/msm/ion_cp_common.c
+++ b/drivers/gpu/ion/msm/ion_cp_common.c
@@ -86,6 +86,8 @@
int nchunks;
int ret;
int i;
+ int chunk_list_len;
+ phys_addr_t chunk_list_phys;
if (usage < 0 || usage >= MAX_USAGE)
return -EINVAL;
@@ -97,15 +99,26 @@
}
nchunks = size / V2_CHUNK_SIZE;
+ chunk_list_len = sizeof(unsigned long)*nchunks;
- chunk_list = kmalloc(sizeof(unsigned long)*nchunks, GFP_KERNEL);
+ chunk_list = kmalloc(chunk_list_len, GFP_KERNEL);
if (!chunk_list)
return -ENOMEM;
+ chunk_list_phys = virt_to_phys(chunk_list);
for (i = 0; i < nchunks; i++)
chunk_list[i] = phy_base + i * V2_CHUNK_SIZE;
- ret = ion_cp_change_chunks_state(__pa(chunk_list),
+ /*
+ * Flush the chunk list before sending the memory to the
+ * secure environment to ensure the data is actually present
+ * in RAM
+ */
+ dmac_flush_range(chunk_list, chunk_list + chunk_list_len);
+ outer_flush_range(chunk_list_phys,
+ chunk_list_phys + chunk_list_len);
+
+ ret = ion_cp_change_chunks_state(chunk_list_phys,
nchunks, V2_CHUNK_SIZE, usage, lock);
kfree(chunk_list);
diff --git a/drivers/gpu/ion/msm/msm_ion.c b/drivers/gpu/ion/msm/msm_ion.c
index 4a45313..4e3af1c 100644
--- a/drivers/gpu/ion/msm/msm_ion.c
+++ b/drivers/gpu/ion/msm/msm_ion.c
@@ -365,6 +365,9 @@
if (!ION_IS_CACHED(flags))
return 0;
+ if (flags & ION_FLAG_SECURE)
+ return 0;
+
table = ion_sg_table(client, handle);
if (IS_ERR_OR_NULL(table))
diff --git a/drivers/gpu/msm/adreno.c b/drivers/gpu/msm/adreno.c
index 459a79c..44c9c29 100644
--- a/drivers/gpu/msm/adreno.c
+++ b/drivers/gpu/msm/adreno.c
@@ -123,7 +123,7 @@
#define LONG_IB_DETECT_REG_INDEX_START 1
#define LONG_IB_DETECT_REG_INDEX_END 5
-unsigned int ft_detect_regs[] = {
+unsigned int ft_detect_regs[FT_DETECT_REGS_COUNT] = {
A3XX_RBBM_STATUS,
REG_CP_RB_RPTR, /* LONG_IB_DETECT_REG_INDEX_START */
REG_CP_IB1_BASE,
@@ -138,8 +138,6 @@
0
};
-const unsigned int ft_detect_regs_count = ARRAY_SIZE(ft_detect_regs);
-
/*
* This is the master list of all GPU cores that are supported by this
* driver.
@@ -166,6 +164,15 @@
/* version of pfp microcode that supports sync_lock
between CPU and GPU for IOMMU-v0 programming */
unsigned int sync_lock_pfp_ver;
+ /* PM4 jump table index */
+ unsigned int pm4_jt_idx;
+ /* PM4 jump table load addr */
+ unsigned int pm4_jt_addr;
+ /* PFP jump table index */
+ unsigned int pfp_jt_idx;
+ /* PFP jump table load addr */
+ unsigned int pfp_jt_addr;
+
} adreno_gpulist[] = {
{ ADRENO_REV_A200, 0, 2, ANY_ID, ANY_ID,
"yamato_pm4.fw", "yamato_pfp.fw", &adreno_a2xx_gpudev,
@@ -202,10 +209,16 @@
512, 0, 2, SZ_512K, 0x3FF037, 0x3FF016 },
{ ADRENO_REV_A330, 3, 3, 0, ANY_ID,
"a330_pm4.fw", "a330_pfp.fw", &adreno_a3xx_gpudev,
- 512, 0, 2, SZ_1M, NO_VER, NO_VER },
+ 512, 0, 2, SZ_1M, NO_VER, NO_VER, 0x8AD, 0x2E4, 0x201, 0x200 },
{ ADRENO_REV_A305B, 3, 0, 5, 0x10,
"a330_pm4.fw", "a330_pfp.fw", &adreno_a3xx_gpudev,
- 512, 0, 2, SZ_128K, NO_VER, NO_VER },
+ 512, 0, 2, SZ_128K, NO_VER, NO_VER, 0x8AD, 0x2E4,
+ 0x201, 0x200 },
+ /* 8226v2 */
+ { ADRENO_REV_A305B, 3, 0, 5, 0x12,
+ "a330_pm4.fw", "a330_pfp.fw", &adreno_a3xx_gpudev,
+ 512, 0, 2, SZ_128K, NO_VER, NO_VER, 0x8AD, 0x2E4,
+ 0x201, 0x200 },
{ ADRENO_REV_A305C, 3, 0, 5, 0x20,
"a300_pm4.fw", "a300_pfp.fw", &adreno_a3xx_gpudev,
512, 0, 2, SZ_128K, 0x3FF037, 0x3FF016 },
@@ -534,6 +547,8 @@
/* Reset the time-out in our idle timer */
mod_timer_pending(&device->idle_timer,
jiffies + device->pwrctrl.interval_timeout);
+ mod_timer_pending(&device->hang_timer,
+ (jiffies + msecs_to_jiffies(KGSL_TIMEOUT_PART)));
return result;
}
@@ -823,7 +838,7 @@
if (!adreno_dev->drawctxt_active ||
KGSL_STATE_ACTIVE != device->state ||
- !device->active_cnt ||
+ !atomic_read(&device->active_cnt) ||
device->cff_dump_enable) {
kgsl_mmu_device_setstate(&device->mmu, flags);
return;
@@ -1118,6 +1133,10 @@
adreno_dev->pix_shader_start = adreno_gpulist[i].pix_shader_start;
adreno_dev->instruction_size = adreno_gpulist[i].instruction_size;
adreno_dev->gmem_size = adreno_gpulist[i].gmem_size;
+ adreno_dev->pm4_jt_idx = adreno_gpulist[i].pm4_jt_idx;
+ adreno_dev->pm4_jt_addr = adreno_gpulist[i].pm4_jt_addr;
+ adreno_dev->pfp_jt_idx = adreno_gpulist[i].pfp_jt_idx;
+ adreno_dev->pfp_jt_addr = adreno_gpulist[i].pfp_jt_addr;
adreno_dev->gpulist_index = i;
}
@@ -1780,10 +1799,8 @@
if (status)
goto error_irq_off;
- /* While fault tolerance is on we do not want timer to
- * fire and attempt to change any device state */
- if (KGSL_STATE_DUMP_AND_FT != device->state)
- mod_timer(&device->idle_timer, jiffies + FIRST_TIMEOUT);
+ mod_timer(&device->hang_timer,
+ (jiffies + msecs_to_jiffies(KGSL_TIMEOUT_PART)));
adreno_perfcounter_start(adreno_dev);
@@ -1820,6 +1837,7 @@
device->ftbl->irqctrl(device, 0);
kgsl_pwrctrl_irq(device, KGSL_PWRFLAGS_OFF);
del_timer_sync(&device->idle_timer);
+ del_timer_sync(&device->hang_timer);
adreno_ocmem_gmem_free(adreno_dev);
@@ -2175,10 +2193,70 @@
}
}
+/**
+ * adreno_soft_reset() - Do a soft reset of the GPU hardware
+ * @device: KGSL device to soft reset
+ *
+ * "soft reset" the GPU hardware - this is a fast path GPU reset
+ * The GPU hardware is reset but we never pull power so we can skip
+ * a lot of the standard adreno_stop/adreno_start sequence
+ */
+int adreno_soft_reset(struct kgsl_device *device)
+{
+ struct adreno_device *adreno_dev = ADRENO_DEVICE(device);
+ int ret;
+
+ /* If the jump table index is 0 soft reset is not supported */
+ if ((!adreno_dev->pm4_jt_idx) || (!adreno_dev->gpudev->soft_reset)) {
+ dev_WARN_ONCE(device->dev, 1, "Soft reset not supported");
+ return -EINVAL;
+ }
+
+ adreno_dev->drawctxt_active = NULL;
+
+ /* Stop the ringbuffer */
+ adreno_ringbuffer_stop(&adreno_dev->ringbuffer);
+
+ /* Delete the idle timer */
+ del_timer_sync(&device->idle_timer);
+
+ /* Make sure we are totally awake */
+ kgsl_pwrctrl_enable(device);
+
+ /* Reset the GPU */
+ adreno_dev->gpudev->soft_reset(adreno_dev);
+
+ /* Reinitialize the GPU */
+ adreno_dev->gpudev->start(adreno_dev);
+
+ /* Enable IRQ */
+ kgsl_pwrctrl_irq(device, KGSL_PWRFLAGS_ON);
+ device->ftbl->irqctrl(device, 1);
+
+ /*
+ * Restart the ringbuffer - we can go down the warm start path because
+ * power was never yanked
+ */
+ ret = adreno_ringbuffer_warm_start(&adreno_dev->ringbuffer);
+ if (ret)
+ return ret;
+
+ device->reset_counter++;
+
+ return 0;
+}
+
static int
_adreno_ft_restart_device(struct kgsl_device *device,
struct kgsl_context *context)
{
+ /* If device soft reset fails try hard reset */
+ if (adreno_soft_reset(device))
+ KGSL_DEV_ERR_ONCE(device, "Device soft reset failed\n");
+ else
+ /* Soft reset is successful */
+ goto reset_done;
+
/* restart device */
if (adreno_stop(device)) {
KGSL_FT_ERR(device, "Device stop failed\n");
@@ -2195,6 +2273,7 @@
return 1;
}
+reset_done:
if (context) {
struct adreno_context *adreno_context = context->devctxt;
kgsl_mmu_setstate(&device->mmu, adreno_context->pagetable,
@@ -2301,6 +2380,7 @@
struct adreno_context *last_active_ctx = adreno_dev->drawctxt_active;
unsigned int long_ib = 0;
static int no_context_ft;
+ struct kgsl_mmu *mmu = &device->mmu;
context = idr_find(&device->context_idr, ft_data->context_id);
if (context == NULL) {
@@ -2374,12 +2454,13 @@
/* Do not try the reply if hang is due to a pagefault */
if (adreno_context && adreno_context->pagefault) {
+ /* Resume MMU */
+ mmu->mmu_ops->mmu_pagefault_resume(mmu);
if ((ft_data->context_id == adreno_context->id) &&
(ft_data->global_eop == adreno_context->pagefault_ts)) {
ft_data->ft_policy &= ~KGSL_FT_REPLAY;
KGSL_FT_ERR(device, "MMU fault skipping replay\n");
}
-
adreno_context->pagefault = 0;
}
@@ -2515,6 +2596,16 @@
struct adreno_ringbuffer *rb = &adreno_dev->ringbuffer;
unsigned int timestamp;
+ /*
+ * If GPU FT is turned off do not run FT.
+ * If GPU stall detection is suspected to be false,
+ * we can use this option to confirm stall detection.
+ */
+ if (ft_data->ft_policy & KGSL_FT_OFF) {
+ KGSL_FT_ERR(device, "GPU FT turned off\n");
+ return 0;
+ }
+
KGSL_FT_INFO(device,
"Start Parameters: IB1: 0x%X, "
"Bad context_id: %u, global_eop: 0x%x\n",
@@ -2589,6 +2680,12 @@
if (device->state != KGSL_STATE_HUNG)
result = 0;
} else {
+ /*
+ * While fault tolerance is happening we do not want the
+ * idle_timer to fire and attempt to change any device state
+ */
+ del_timer_sync(&device->idle_timer);
+
kgsl_pwrctrl_set_state(device, KGSL_STATE_DUMP_AND_FT);
INIT_COMPLETION(device->ft_gate);
/* Detected a hang */
@@ -2600,11 +2697,6 @@
/* Get the fault tolerance data as soon as hang is detected */
adreno_setup_ft_data(device, &ft_data);
- /*
- * Trigger an automatic dump of the state to
- * the console
- */
- kgsl_postmortem_dump(device, 0);
/*
* If long ib is detected, do not attempt postmortem or
@@ -2636,7 +2728,9 @@
kgsl_pwrctrl_set_state(device, KGSL_STATE_HUNG);
} else {
kgsl_pwrctrl_set_state(device, KGSL_STATE_ACTIVE);
- mod_timer(&device->idle_timer, jiffies + FIRST_TIMEOUT);
+ mod_timer(&device->hang_timer,
+ (jiffies +
+ msecs_to_jiffies(KGSL_TIMEOUT_PART)));
}
complete_all(&device->ft_gate);
}
@@ -2791,6 +2885,7 @@
struct adreno_ringbuffer *rb = &adreno_dev->ringbuffer;
unsigned long wait;
unsigned long timeout = jiffies + msecs_to_jiffies(ADRENO_IDLE_TIMEOUT);
+ unsigned int rptr;
/*
* The first time into the loop, wait for 100 msecs and kick wptr again
@@ -2809,14 +2904,13 @@
wait = jiffies + msecs_to_jiffies(KGSL_TIMEOUT_PART);
}
- GSL_RB_GET_READPTR(rb, &rb->rptr);
-
+ rptr = adreno_get_rptr(rb);
if (time_after(jiffies, timeout)) {
KGSL_DRV_ERR(device, "rptr: %x, wptr: %x\n",
- rb->rptr, rb->wptr);
+ rptr, rb->wptr);
return -ETIMEDOUT;
}
- } while (rb->rptr != rb->wptr);
+ } while (rptr != rb->wptr);
return 0;
}
@@ -2828,7 +2922,7 @@
unsigned int rbbm_status;
unsigned long wait_time;
unsigned long wait_time_part;
- unsigned int prev_reg_val[ft_detect_regs_count];
+ unsigned int prev_reg_val[FT_DETECT_REGS_COUNT];
memset(prev_reg_val, 0, sizeof(prev_reg_val));
@@ -2916,8 +3010,8 @@
/* If the device isn't active, don't force it on. */
if (device->state == KGSL_STATE_ACTIVE) {
/* Is the ring buffer is empty? */
- GSL_RB_GET_READPTR(rb, &rb->rptr);
- if (rb->rptr == rb->wptr) {
+ unsigned int rptr = adreno_get_rptr(rb);
+ if (rptr == rb->wptr) {
/*
* Are there interrupts pending? If so then pretend we
* are not idle - this avoids the possiblity that we go
@@ -3223,7 +3317,8 @@
unsigned int *prev_reg_val)
{
struct adreno_device *adreno_dev = ADRENO_DEVICE(device);
- unsigned int curr_reg_val[ft_detect_regs_count];
+ struct adreno_ringbuffer *rb = &adreno_dev->ringbuffer;
+ unsigned int curr_reg_val[FT_DETECT_REGS_COUNT];
unsigned int fast_hang_detected = 1;
unsigned int long_ib_detected = 1;
unsigned int i;
@@ -3243,7 +3338,9 @@
if (!(adreno_dev->ringbuffer.flags & KGSL_FLAGS_STARTED))
return 0;
- if (is_adreno_rbbm_status_idle(device)) {
+ if (is_adreno_rbbm_status_idle(device) &&
+ (kgsl_readtimestamp(device, NULL, KGSL_TIMESTAMP_RETIRED)
+ == rb->timestamp[KGSL_MEMSTORE_GLOBAL])) {
/*
* On A2XX if the RPTR != WPTR and the device is idle, then
@@ -3275,7 +3372,7 @@
msecs_to_jiffies(KGSL_TIMEOUT_PART-1));
/* Read the current Hang detect reg values here */
- for (i = 0; i < ft_detect_regs_count; i++) {
+ for (i = 0; i < FT_DETECT_REGS_COUNT; i++) {
if (ft_detect_regs[i] == 0)
continue;
adreno_regread(device, ft_detect_regs[i],
@@ -3310,7 +3407,7 @@
"Fault tolerance no context found\n");
}
}
- for (i = 0; i < ft_detect_regs_count; i++) {
+ for (i = 0; i < FT_DETECT_REGS_COUNT; i++) {
if (curr_reg_val[i] != prev_reg_val[i]) {
fast_hang_detected = 0;
@@ -3386,55 +3483,11 @@
/* If hangs are not detected copy the current reg values
* to previous values and return no hang */
- for (i = 0; i < ft_detect_regs_count; i++)
+ for (i = 0; i < FT_DETECT_REGS_COUNT; i++)
prev_reg_val[i] = curr_reg_val[i];
return 0;
}
-/**
- * adreno_handle_hang - Process a hang detected in adreno_waittimestamp
- * @device - pointer to a KGSL device structure
- * @context - pointer to the active KGSL context
- * @timestamp - the timestamp that the process was waiting for
- *
- * Process a possible GPU hang and try fault tolerance from it
- * cleanly
- */
-static int adreno_handle_hang(struct kgsl_device *device,
- struct kgsl_context *context, unsigned int timestamp)
-{
- struct adreno_device *adreno_dev = ADRENO_DEVICE(device);
- unsigned int context_id = _get_context_id(context);
- unsigned int ts_issued;
- unsigned int rptr;
-
- /* Do one last check to see if we somehow made it through */
- if (kgsl_check_timestamp(device, context, timestamp))
- return 0;
-
- ts_issued = adreno_dev->ringbuffer.timestamp[context_id];
-
- adreno_regread(device, REG_CP_RB_RPTR, &rptr);
-
- /* Make sure timestamp check finished before triggering a hang */
- mb();
-
- KGSL_DRV_WARN(device,
- "Device hang detected while waiting for timestamp: "
- "<%d:0x%x>, last submitted timestamp: <%d:0x%x>, "
- "retired timestamp: <%d:0x%x>, wptr: 0x%x, rptr: 0x%x\n",
- context_id, timestamp, context_id, ts_issued, context_id,
- kgsl_readtimestamp(device, context,
- KGSL_TIMESTAMP_RETIRED),
- adreno_dev->ringbuffer.wptr, rptr);
-
- /* Return 0 after a successful fault tolerance */
- if (!adreno_dump_and_exec_ft(device))
- return 0;
-
- return -ETIMEDOUT;
-}
-
static int _check_pending_timestamp(struct kgsl_device *device,
struct kgsl_context *context, unsigned int timestamp)
{
@@ -3483,7 +3536,6 @@
struct adreno_context *adreno_ctx = context ? context->devctxt : NULL;
struct kgsl_pwrctrl *pwr = &device->pwrctrl;
unsigned int context_id = _get_context_id(context);
- unsigned int prev_reg_val[ft_detect_regs_count];
unsigned int time_elapsed = 0;
unsigned int wait;
int ts_compare = 1;
@@ -3511,10 +3563,6 @@
context->wait_on_invalid_ts = false;
}
-
- /* Clear the registers used for hang detection */
- memset(prev_reg_val, 0, sizeof(prev_reg_val));
-
/*
* On the first time through the loop only wait 100ms.
* this gives enough time for the engine to start moving and oddly
@@ -3541,12 +3589,6 @@
break;
}
- /* Check to see if the GPU is hung */
- if (adreno_ft_detect(device, prev_reg_val)) {
- ret = adreno_handle_hang(device, context, timestamp);
- break;
- }
-
/*
* For proper power accounting sometimes we need to call
* io_wait_interruptible_timeout and sometimes we need to call
diff --git a/drivers/gpu/msm/adreno.h b/drivers/gpu/msm/adreno.h
index 816940f..70b07c4 100644
--- a/drivers/gpu/msm/adreno.h
+++ b/drivers/gpu/msm/adreno.h
@@ -110,6 +110,10 @@
unsigned int mharb;
struct adreno_gpudev *gpudev;
unsigned int wait_timeout;
+ unsigned int pm4_jt_idx;
+ unsigned int pm4_jt_addr;
+ unsigned int pfp_jt_idx;
+ unsigned int pfp_jt_addr;
unsigned int istore_size;
unsigned int pix_shader_start;
unsigned int instruction_size;
@@ -200,6 +204,7 @@
void (*coresight_disable) (struct kgsl_device *device);
void (*coresight_config_debug_reg) (struct kgsl_device *device,
int debug_reg, unsigned int val);
+ void (*soft_reset)(struct adreno_device *device);
};
/*
@@ -242,12 +247,15 @@
unsigned int replay_for_snapshot;
};
+#define FT_DETECT_REGS_COUNT 12
+
/* Fault Tolerance policy flags */
-#define KGSL_FT_DISABLE BIT(0)
+#define KGSL_FT_OFF BIT(0)
#define KGSL_FT_REPLAY BIT(1)
#define KGSL_FT_SKIPIB BIT(2)
#define KGSL_FT_SKIPFRAME BIT(3)
-#define KGSL_FT_TEMP_DISABLE BIT(4)
+#define KGSL_FT_DISABLE BIT(4)
+#define KGSL_FT_TEMP_DISABLE BIT(5)
#define KGSL_FT_DEFAULT_POLICY (KGSL_FT_REPLAY + KGSL_FT_SKIPIB)
/* Pagefault policy flags */
@@ -280,7 +288,6 @@
extern const unsigned int a330_registers_count;
extern unsigned int ft_detect_regs[];
-extern const unsigned int ft_detect_regs_count;
int adreno_coresight_enable(struct coresight_device *csdev);
void adreno_coresight_disable(struct coresight_device *csdev);
@@ -330,6 +337,9 @@
int adreno_perfcounter_put(struct adreno_device *adreno_dev,
unsigned int groupid, unsigned int countable);
+int adreno_soft_reset(struct kgsl_device *device);
+
+
static inline int adreno_is_a200(struct adreno_device *adreno_dev)
{
return (adreno_dev->gpurev == ADRENO_REV_A200);
diff --git a/drivers/gpu/msm/adreno_a3xx.c b/drivers/gpu/msm/adreno_a3xx.c
index 884b72b..a757a22 100644
--- a/drivers/gpu/msm/adreno_a3xx.c
+++ b/drivers/gpu/msm/adreno_a3xx.c
@@ -2735,6 +2735,9 @@
{
unsigned int in, out;
+ if (countable > 1)
+ return;
+
adreno_regread(device, A3XX_RBBM_RBBM_CTL, &in);
if (countable == 0)
@@ -2790,6 +2793,9 @@
{
unsigned int in, out, bit;
+ if (countable > 2)
+ return;
+
adreno_regread(device, A3XX_VBIF_PERF_CNT_EN, &in);
if (countable == 0)
bit = VBIF_PERF_PWR_CNT_0;
@@ -2823,12 +2829,6 @@
unsigned int val = 0;
struct a3xx_perfcounter_register *reg;
- if (group >= ARRAY_SIZE(a3xx_perfcounter_reglist))
- return;
-
- if (counter >= a3xx_perfcounter_reglist[group].count)
- return;
-
/* Special cases */
if (group == KGSL_PERFCOUNTER_GROUP_PWR)
return a3xx_perfcounter_enable_pwr(device, countable);
@@ -2837,6 +2837,12 @@
else if (group == KGSL_PERFCOUNTER_GROUP_VBIF_PWR)
return a3xx_perfcounter_enable_vbif_pwr(device, countable);
+ if (group >= ARRAY_SIZE(a3xx_perfcounter_reglist))
+ return;
+
+ if (counter >= a3xx_perfcounter_reglist[group].count)
+ return;
+
reg = &(a3xx_perfcounter_reglist[group].regs[counter]);
/* Select the desired perfcounter */
@@ -3461,6 +3467,30 @@
ARRAY_SIZE(a3xx_perfcounter_groups),
};
+/*
+ * a3xx_soft_reset() - Soft reset GPU
+ * @adreno_dev: Pointer to adreno device
+ *
+ * Soft reset the GPU by doing a AHB write of value 1 to RBBM_SW_RESET
+ * register. This is used when we want to reset the GPU without
+ * turning off GFX power rail. The reset when asserted resets
+ * all the HW logic, restores GPU registers to default state and
+ * flushes out pending VBIF transactions.
+ */
+static void a3xx_soft_reset(struct adreno_device *adreno_dev)
+{
+ struct kgsl_device *device = &adreno_dev->dev;
+ unsigned int reg;
+
+ adreno_regwrite(device, A3XX_RBBM_SW_RESET_CMD, 1);
+ /*
+ * Do a dummy read to get a brief read cycle delay for the reset to take
+ * effect
+ */
+ adreno_regread(device, A3XX_RBBM_SW_RESET_CMD, ®);
+ adreno_regwrite(device, A3XX_RBBM_SW_RESET_CMD, 0);
+}
+
/* Defined in adreno_a3xx_snapshot.c */
void *a3xx_snapshot(struct adreno_device *adreno_dev, void *snapshot,
int *remain, int hang);
@@ -3488,4 +3518,5 @@
.coresight_enable = a3xx_coresight_enable,
.coresight_disable = a3xx_coresight_disable,
.coresight_config_debug_reg = a3xx_coresight_config_debug_reg,
+ .soft_reset = a3xx_soft_reset,
};
diff --git a/drivers/gpu/msm/adreno_debugfs.c b/drivers/gpu/msm/adreno_debugfs.c
index 12b9e7c..90bd017 100644
--- a/drivers/gpu/msm/adreno_debugfs.c
+++ b/drivers/gpu/msm/adreno_debugfs.c
@@ -28,6 +28,17 @@
DEFINE_SIMPLE_ATTRIBUTE(kgsl_cff_dump_enable_fops, kgsl_cff_dump_enable_get,
kgsl_cff_dump_enable_set, "%llu\n");
+static int _active_count_get(void *data, u64 *val)
+{
+ struct kgsl_device *device = data;
+ unsigned int i = atomic_read(&device->active_cnt);
+
+ *val = (u64) i;
+ return 0;
+}
+
+DEFINE_SIMPLE_ATTRIBUTE(_active_count_fops, _active_count_get, NULL, "%llu\n");
+
typedef void (*reg_read_init_t)(struct kgsl_device *device);
typedef void (*reg_read_fill_t)(struct kgsl_device *device, int i,
unsigned int *vals, int linec);
@@ -51,10 +62,11 @@
&adreno_dev->fast_hang_detect);
/*
* FT policy can be set to any of the options below.
- * KGSL_FT_DISABLE -> BIT(0) Set to disable FT
+ * KGSL_FT_OFF -> BIT(0) Set to turn off FT
* KGSL_FT_REPLAY -> BIT(1) Set to enable replay
* KGSL_FT_SKIPIB -> BIT(2) Set to skip IB
* KGSL_FT_SKIPFRAME -> BIT(3) Set to skip frame
+ * KGSL_FT_DISABLE -> BIT(4) Set to disable FT for faulting context
* by default set FT policy to KGSL_FT_DEFAULT_POLICY
*/
adreno_dev->ft_policy = KGSL_FT_DEFAULT_POLICY;
@@ -79,6 +91,6 @@
debugfs_create_u32("ft_pagefault_policy", 0644, device->d_debugfs,
&adreno_dev->ft_pf_policy);
- debugfs_create_u32("active_cnt", 0444, device->d_debugfs,
- &device->active_cnt);
+ debugfs_create_file("active_cnt", 0444, device->d_debugfs, device,
+ &_active_count_fops);
}
diff --git a/drivers/gpu/msm/adreno_ringbuffer.c b/drivers/gpu/msm/adreno_ringbuffer.c
index 4e95e93..2d87263 100644
--- a/drivers/gpu/msm/adreno_ringbuffer.c
+++ b/drivers/gpu/msm/adreno_ringbuffer.c
@@ -14,6 +14,8 @@
#include <linux/slab.h>
#include <linux/sched.h>
#include <linux/log2.h>
+#include <linux/time.h>
+#include <linux/delay.h>
#include "kgsl.h"
#include "kgsl_sharedmem.h"
@@ -64,7 +66,8 @@
unsigned long wait_time;
unsigned long wait_timeout = msecs_to_jiffies(ADRENO_IDLE_TIMEOUT);
unsigned long wait_time_part;
- unsigned int prev_reg_val[ft_detect_regs_count];
+ unsigned int prev_reg_val[FT_DETECT_REGS_COUNT];
+ unsigned int rptr;
memset(prev_reg_val, 0, sizeof(prev_reg_val));
@@ -84,8 +87,8 @@
* want the rptr and wptr to become equal when
* the ringbuffer is not empty */
do {
- GSL_RB_GET_READPTR(rb, &rb->rptr);
- } while (!rb->rptr);
+ rptr = adreno_get_rptr(rb);
+ } while (!rptr);
rb->wptr++;
@@ -98,9 +101,9 @@
wait_time_part = jiffies + msecs_to_jiffies(KGSL_TIMEOUT_PART);
/* wait for space in ringbuffer */
while (1) {
- GSL_RB_GET_READPTR(rb, &rb->rptr);
+ rptr = adreno_get_rptr(rb);
- freecmds = rb->rptr - rb->wptr;
+ freecmds = rptr - rb->wptr;
if (freecmds == 0 || freecmds > numcmds)
break;
@@ -115,7 +118,7 @@
KGSL_DRV_ERR(rb->device,
"Hang detected while waiting for freespace in"
"ringbuffer rptr: 0x%x, wptr: 0x%x\n",
- rb->rptr, rb->wptr);
+ rptr, rb->wptr);
goto err;
}
}
@@ -123,7 +126,7 @@
if (time_after(jiffies, wait_time)) {
KGSL_DRV_ERR(rb->device,
"Timed out while waiting for freespace in ringbuffer "
- "rptr: 0x%x, wptr: 0x%x\n", rb->rptr, rb->wptr);
+ "rptr: 0x%x, wptr: 0x%x\n", rptr, rb->wptr);
goto err;
}
@@ -152,11 +155,12 @@
{
unsigned int *ptr = NULL;
int ret = 0;
+ unsigned int rptr;
BUG_ON(numcmds >= rb->sizedwords);
- GSL_RB_GET_READPTR(rb, &rb->rptr);
+ rptr = adreno_get_rptr(rb);
/* check for available space */
- if (rb->wptr >= rb->rptr) {
+ if (rb->wptr >= rptr) {
/* wptr ahead or equal to rptr */
/* reserve dwords for nop packet */
if ((rb->wptr + numcmds) > (rb->sizedwords -
@@ -165,7 +169,7 @@
numcmds, 1);
} else {
/* wptr behind rptr */
- if ((rb->wptr + numcmds) >= rb->rptr)
+ if ((rb->wptr + numcmds) >= rptr)
ret = adreno_ringbuffer_waitspace(rb, context,
numcmds, 0);
/* check for remaining space */
@@ -242,8 +246,16 @@
return ret;
}
-
-int adreno_ringbuffer_load_pm4_ucode(struct kgsl_device *device)
+/**
+ * adreno_ringbuffer_load_pm4_ucode() - Load pm4 ucode
+ * @device: Pointer to a KGSL device
+ * @start: Starting index in pm4 ucode to load
+ * @addr: Address to load the pm4 ucode
+ *
+ * Load the pm4 ucode from @start at @addr.
+ */
+int adreno_ringbuffer_load_pm4_ucode(struct kgsl_device *device,
+ unsigned int start, unsigned int addr)
{
struct adreno_device *adreno_dev = ADRENO_DEVICE(device);
int i;
@@ -258,8 +270,8 @@
adreno_dev->pm4_fw_version);
adreno_regwrite(device, REG_CP_DEBUG, CP_DEBUG_DEFAULT);
- adreno_regwrite(device, REG_CP_ME_RAM_WADDR, 0);
- for (i = 1; i < adreno_dev->pm4_fw_size; i++)
+ adreno_regwrite(device, REG_CP_ME_RAM_WADDR, addr);
+ for (i = start; i < adreno_dev->pm4_fw_size; i++)
adreno_regwrite(device, REG_CP_ME_RAM_DATA,
adreno_dev->pm4_fw[i]);
@@ -297,7 +309,16 @@
return ret;
}
-int adreno_ringbuffer_load_pfp_ucode(struct kgsl_device *device)
+/**
+ * adreno_ringbuffer_load_pfp_ucode() - Load pfp ucode
+ * @device: Pointer to a KGSL device
+ * @start: Starting index in pfp ucode to load
+ * @addr: Address to load the pfp ucode
+ *
+ * Load the pfp ucode from @start at @addr.
+ */
+int adreno_ringbuffer_load_pfp_ucode(struct kgsl_device *device,
+ unsigned int start, unsigned int addr)
{
struct adreno_device *adreno_dev = ADRENO_DEVICE(device);
int i;
@@ -311,8 +332,9 @@
KGSL_DRV_INFO(device, "loading pfp ucode version: %d\n",
adreno_dev->pfp_fw_version);
- adreno_regwrite(device, adreno_dev->gpudev->reg_cp_pfp_ucode_addr, 0);
- for (i = 1; i < adreno_dev->pfp_fw_size; i++)
+ adreno_regwrite(device, adreno_dev->gpudev->reg_cp_pfp_ucode_addr,
+ addr);
+ for (i = start; i < adreno_dev->pfp_fw_size; i++)
adreno_regwrite(device,
adreno_dev->gpudev->reg_cp_pfp_ucode_data,
adreno_dev->pfp_fw[i]);
@@ -320,7 +342,13 @@
return 0;
}
-int adreno_ringbuffer_start(struct adreno_ringbuffer *rb)
+/**
+ * _ringbuffer_start_common() - Ringbuffer start
+ * @rb: Pointer to adreno ringbuffer
+ *
+ * Setup ringbuffer for GPU.
+ */
+int _ringbuffer_start_common(struct adreno_ringbuffer *rb)
{
int status;
/*cp_rb_cntl_u cp_rb_cntl; */
@@ -420,16 +448,6 @@
adreno_regwrite(device, REG_SCRATCH_UMSK,
GSL_RB_MEMPTRS_SCRATCH_MASK);
- /* load the CP ucode */
- status = adreno_ringbuffer_load_pm4_ucode(device);
- if (status != 0)
- return status;
-
- /* load the prefetch parser ucode */
- status = adreno_ringbuffer_load_pfp_ucode(device);
- if (status != 0)
- return status;
-
/* CP ROQ queue sizes (bytes) - RB:16, ST:16, IB1:32, IB2:64 */
if (adreno_is_a305(adreno_dev) || adreno_is_a305c(adreno_dev) ||
adreno_is_a320(adreno_dev))
@@ -437,7 +455,6 @@
else if (adreno_is_a330(adreno_dev) || adreno_is_a305b(adreno_dev))
adreno_regwrite(device, REG_CP_QUEUE_THRESHOLDS, 0x003E2008);
- rb->rptr = 0;
rb->wptr = 0;
/* clear ME_HALT to start micro engine */
@@ -457,6 +474,54 @@
return status;
}
+/**
+ * adreno_ringbuffer_warm_start() - Ringbuffer warm start
+ * @rb: Pointer to adreno ringbuffer
+ *
+ * Start the ringbuffer but load only jump tables part of the
+ * microcode.
+ */
+int adreno_ringbuffer_warm_start(struct adreno_ringbuffer *rb)
+{
+ int status;
+ struct kgsl_device *device = rb->device;
+ struct adreno_device *adreno_dev = ADRENO_DEVICE(device);
+
+ /* load the CP ucode */
+ status = adreno_ringbuffer_load_pm4_ucode(device,
+ adreno_dev->pm4_jt_idx, adreno_dev->pm4_jt_addr);
+ if (status != 0)
+ return status;
+
+ /* load the prefetch parser ucode */
+ status = adreno_ringbuffer_load_pfp_ucode(device,
+ adreno_dev->pfp_jt_idx, adreno_dev->pfp_jt_addr);
+ if (status != 0)
+ return status;
+
+ return _ringbuffer_start_common(rb);
+}
+
+int adreno_ringbuffer_start(struct adreno_ringbuffer *rb)
+{
+ int status;
+
+ if (rb->flags & KGSL_FLAGS_STARTED)
+ return 0;
+
+ /* load the CP ucode */
+ status = adreno_ringbuffer_load_pm4_ucode(rb->device, 1, 0);
+ if (status != 0)
+ return status;
+
+ /* load the prefetch parser ucode */
+ status = adreno_ringbuffer_load_pfp_ucode(rb->device, 1, 0);
+ if (status != 0)
+ return status;
+
+ return _ringbuffer_start_common(rb);
+}
+
void adreno_ringbuffer_stop(struct adreno_ringbuffer *rb)
{
struct kgsl_device *device = rb->device;
@@ -903,10 +968,8 @@
buffer */
struct kgsl_mem_entry *entry;
- spin_lock(&dev_priv->process_priv->mem_lock);
entry = kgsl_sharedmem_find_region(dev_priv->process_priv,
gpuaddr, sizedwords * sizeof(uint));
- spin_unlock(&dev_priv->process_priv->mem_lock);
if (entry == NULL) {
KGSL_CMD_ERR(dev_priv->device,
"no mapping for gpuaddr: 0x%08x\n", gpuaddr);
@@ -1316,7 +1379,6 @@
if (num_rb_contents > (rb->buffer_desc.size - rb->wptr)) {
adreno_regwrite(rb->device, REG_CP_RB_RPTR, 0);
- rb->rptr = 0;
BUG_ON(num_rb_contents > rb->buffer_desc.size);
}
ringcmds = (unsigned int *)rb->buffer_desc.hostptr + rb->wptr;
diff --git a/drivers/gpu/msm/adreno_ringbuffer.h b/drivers/gpu/msm/adreno_ringbuffer.h
index 115533e..e9fb050 100644
--- a/drivers/gpu/msm/adreno_ringbuffer.h
+++ b/drivers/gpu/msm/adreno_ringbuffer.h
@@ -54,7 +54,6 @@
unsigned int sizedwords;
unsigned int wptr; /* write pointer offset in dwords from baseaddr */
- unsigned int rptr; /* read pointer offset in dwords from baseaddr */
unsigned int timestamp[KGSL_MEMSTORE_MAX];
};
@@ -74,10 +73,20 @@
/* mem rptr */
#define GSL_RB_CNTL_NO_UPDATE 0x0 /* enable */
-#define GSL_RB_GET_READPTR(rb, data) \
- do { \
- *(data) = rb->memptrs->rptr; \
- } while (0)
+
+/**
+ * adreno_get_rptr - Get the current ringbuffer read pointer
+ * @rb - the ringbuffer
+ *
+ * Get the current read pointer, which is written by the GPU.
+ */
+static inline unsigned int
+adreno_get_rptr(struct adreno_ringbuffer *rb)
+{
+ unsigned int result = rb->memptrs->rptr;
+ rmb();
+ return result;
+}
#define GSL_RB_CNTL_POLL_EN 0x0 /* disable */
@@ -97,6 +106,8 @@
int adreno_ringbuffer_init(struct kgsl_device *device);
+int adreno_ringbuffer_warm_start(struct adreno_ringbuffer *rb);
+
int adreno_ringbuffer_start(struct adreno_ringbuffer *rb);
void adreno_ringbuffer_stop(struct adreno_ringbuffer *rb);
diff --git a/drivers/gpu/msm/kgsl.c b/drivers/gpu/msm/kgsl.c
index 98d15f6..e62dac9 100644
--- a/drivers/gpu/msm/kgsl.c
+++ b/drivers/gpu/msm/kgsl.c
@@ -39,6 +39,7 @@
#include "kgsl_device.h"
#include "kgsl_trace.h"
#include "kgsl_sync.h"
+#include "adreno.h"
#undef MODULE_PARAM_PREFIX
#define MODULE_PARAM_PREFIX "kgsl."
@@ -58,6 +59,56 @@
struct sg_table *table;
};
+static void kgsl_mem_entry_detach_process(struct kgsl_mem_entry *entry);
+
+/**
+ * kgsl_hang_check() - Check for GPU hang
+ * data: KGSL device structure
+ *
+ * This function is called every KGSL_TIMEOUT_PART time when
+ * GPU is active to check for hang. If a hang is detected we
+ * trigger fault tolerance.
+ */
+void kgsl_hang_check(struct work_struct *work)
+{
+ struct kgsl_device *device = container_of(work, struct kgsl_device,
+ hang_check_ws);
+ static unsigned int prev_reg_val[FT_DETECT_REGS_COUNT];
+
+ mutex_lock(&device->mutex);
+
+ if (device->state == KGSL_STATE_ACTIVE) {
+
+ /* Check to see if the GPU is hung */
+ if (adreno_ft_detect(device, prev_reg_val))
+ adreno_dump_and_exec_ft(device);
+
+ mod_timer(&device->hang_timer,
+ (jiffies + msecs_to_jiffies(KGSL_TIMEOUT_PART)));
+ }
+
+ mutex_unlock(&device->mutex);
+}
+
+/**
+ * hang_timer() - Hang timer function
+ * data: KGSL device structure
+ *
+ * This function is called when hang timer expires, in this
+ * function we check if GPU is in active state and queue the
+ * work on device workqueue to check for the hang. We restart
+ * the timer after KGSL_TIMEOUT_PART time.
+ */
+void hang_timer(unsigned long data)
+{
+ struct kgsl_device *device = (struct kgsl_device *) data;
+
+ if (device->state == KGSL_STATE_ACTIVE) {
+ /* Have work run in a non-interrupt context. */
+ queue_work(device->work_queue, &device->hang_check_ws);
+ }
+}
+
/**
* kgsl_trace_issueibcmds() - Call trace_issueibcmds by proxy
* device: KGSL device
@@ -206,6 +257,9 @@
struct kgsl_mem_entry,
refcount);
+ /* Detach from process list */
+ kgsl_mem_entry_detach_process(entry);
+
if (entry->memtype != KGSL_MEM_ENTRY_KERNEL)
kgsl_driver.stats.mapped -= entry->memdesc.size;
@@ -237,23 +291,46 @@
EXPORT_SYMBOL(kgsl_mem_entry_destroy);
/**
- * kgsl_mem_entry_track_gpuaddr - Insert a mem_entry in the address tree
+ * kgsl_mem_entry_track_gpuaddr - Insert a mem_entry in the address tree and
+ * assign it with a gpu address space before insertion
* @process: the process that owns the memory
* @entry: the memory entry
*
- * Insert a kgsl_mem_entry in to the rb_tree for searching by GPU address.
- * Not all mem_entries will have gpu addresses when first created, so this
- * function may be called after creation when the GPU address is finally
- * assigned.
+ * @returns - 0 on succcess else error code
+ *
+ * Insert the kgsl_mem_entry in to the rb_tree for searching by GPU address.
+ * The assignment of gpu address and insertion into list needs to
+ * happen with the memory lock held to avoid race conditions between
+ * gpu address being selected and some other thread looking through the
+ * rb list in search of memory based on gpuaddr
+ * This function should be called with processes memory spinlock held
*/
-static void
+static int
kgsl_mem_entry_track_gpuaddr(struct kgsl_process_private *process,
struct kgsl_mem_entry *entry)
{
+ int ret = 0;
struct rb_node **node;
struct rb_node *parent = NULL;
- spin_lock(&process->mem_lock);
+ assert_spin_locked(&process->mem_lock);
+ /*
+ * If cpu=gpu map is used then caller needs to set the
+ * gpu address
+ */
+ if (kgsl_memdesc_use_cpu_map(&entry->memdesc)) {
+ if (!entry->memdesc.gpuaddr)
+ goto done;
+ } else if (entry->memdesc.gpuaddr) {
+ WARN_ONCE(1, "gpuaddr assigned w/o holding memory lock\n");
+ ret = -EINVAL;
+ goto done;
+ }
+ if (!kgsl_memdesc_use_cpu_map(&entry->memdesc)) {
+ ret = kgsl_mmu_get_gpuaddr(process->pagetable, &entry->memdesc);
+ if (ret)
+ goto done;
+ }
node = &process->mem_rb.rb_node;
@@ -272,7 +349,27 @@
rb_link_node(&entry->node, parent, node);
rb_insert_color(&entry->node, &process->mem_rb);
- spin_unlock(&process->mem_lock);
+done:
+ return ret;
+}
+
+/**
+ * kgsl_mem_entry_untrack_gpuaddr() - Untrack memory that is previously tracked
+ * process - Pointer to process private to which memory belongs
+ * entry - Memory entry to untrack
+ *
+ * Function just does the opposite of kgsl_mem_entry_track_gpuaddr. Needs to be
+ * called with processes spin lock held
+ */
+static void
+kgsl_mem_entry_untrack_gpuaddr(struct kgsl_process_private *process,
+ struct kgsl_mem_entry *entry)
+{
+ assert_spin_locked(&process->mem_lock);
+ if (entry->memdesc.gpuaddr) {
+ kgsl_mmu_put_gpuaddr(process->pagetable, &entry->memdesc);
+ rb_erase(&entry->node, &entry->priv->mem_rb);
+ }
}
/**
@@ -311,8 +408,19 @@
}
entry->priv = process;
- if (entry->memdesc.gpuaddr != 0)
- kgsl_mem_entry_track_gpuaddr(process, entry);
+ spin_lock(&process->mem_lock);
+ ret = kgsl_mem_entry_track_gpuaddr(process, entry);
+ if (ret)
+ idr_remove(&process->mem_idr, entry->id);
+ spin_unlock(&process->mem_lock);
+ if (ret)
+ goto err;
+ /* map the memory after unlocking if gpuaddr has been assigned */
+ if (entry->memdesc.gpuaddr) {
+ ret = kgsl_mmu_map(process->pagetable, &entry->memdesc);
+ if (ret)
+ kgsl_mem_entry_detach_process(entry);
+ }
err:
return ret;
}
@@ -321,37 +429,23 @@
static void kgsl_mem_entry_detach_process(struct kgsl_mem_entry *entry)
{
- bool had_gpuaddr = false;
-
if (entry == NULL)
return;
- /*
- * Unmap the entry first so that there isn't a period of
- * time where kgsl doesn't know about the address range
- * but it is still present in the pagetable. Unmapping will
- * clear the gpuaddr field, so remember if we had a mapping,
- * and an rbtree entry for later.
- */
- had_gpuaddr = entry->memdesc.gpuaddr != 0;
- kgsl_mmu_unmap(entry->memdesc.pagetable, &entry->memdesc);
+ /* Unmap here so that below we can call kgsl_mmu_put_gpuaddr */
+ kgsl_mmu_unmap(entry->priv->pagetable, &entry->memdesc);
spin_lock(&entry->priv->mem_lock);
+ kgsl_mem_entry_untrack_gpuaddr(entry->priv, entry);
if (entry->id != 0)
idr_remove(&entry->priv->mem_idr, entry->id);
entry->id = 0;
- if (had_gpuaddr)
- rb_erase(&entry->node, &entry->priv->mem_rb);
-
+ entry->priv->stats[entry->memtype].cur -= entry->memdesc.size;
spin_unlock(&entry->priv->mem_lock);
- entry->priv->stats[entry->memtype].cur -= entry->memdesc.size;
entry->priv = NULL;
-
-
- kgsl_mem_entry_put(entry);
}
/* Allocate a new context id */
@@ -550,6 +644,7 @@
/* Don't let the timer wake us during suspended sleep. */
del_timer_sync(&device->idle_timer);
+ del_timer_sync(&device->hang_timer);
switch (device->state) {
case KGSL_STATE_INIT:
break;
@@ -589,23 +684,32 @@
static int kgsl_resume_device(struct kgsl_device *device)
{
- int status = -EINVAL;
-
if (!device)
return -EINVAL;
KGSL_PWR_WARN(device, "resume start\n");
mutex_lock(&device->mutex);
if (device->state == KGSL_STATE_SUSPEND) {
- kgsl_pwrctrl_set_state(device, KGSL_STATE_SLUMBER);
- status = 0;
complete_all(&device->hwaccess_gate);
+ } else {
+ /*
+ * This is an error situation,so wait for the device
+ * to idle and then put the device to SLUMBER state.
+ * This will put the device to the right state when
+ * we resume.
+ */
+ device->ftbl->idle(device);
+ kgsl_pwrctrl_request_state(device, KGSL_STATE_SLUMBER);
+ kgsl_pwrctrl_sleep(device);
+ KGSL_PWR_ERR(device,
+ "resume invoked without a suspend\n");
}
+ kgsl_pwrctrl_set_state(device, KGSL_STATE_SLUMBER);
kgsl_pwrctrl_request_state(device, KGSL_STATE_NONE);
mutex_unlock(&device->mutex);
KGSL_PWR_WARN(device, "resume end\n");
- return status;
+ return 0;
}
static int kgsl_suspend(struct device *dev)
@@ -700,7 +804,7 @@
rcu_read_unlock();
if (entry == NULL)
break;
- kgsl_mem_entry_detach_process(entry);
+ kgsl_mem_entry_put(entry);
/*
* Always start back at the beginning, to
* ensure all entries are removed,
@@ -787,10 +891,15 @@
mutex_lock(&private->process_private_mutex);
- if (!private->mem_rb.rb_node) {
- private->mem_rb = RB_ROOT;
- idr_init(&private->mem_idr);
- }
+ /*
+ * If debug root initialized then it means the rest of the fields
+ * are also initialized
+ */
+ if (private->debug_root)
+ goto done;
+
+ private->mem_rb = RB_ROOT;
+ idr_init(&private->mem_idr);
if ((!private->pagetable) && kgsl_mmu_enabled()) {
unsigned long pt_name;
@@ -806,11 +915,10 @@
}
}
- if (!private->kobj.ktype)
- kgsl_process_init_sysfs(private);
- if (!private->debug_root)
- kgsl_process_init_debugfs(private);
+ kgsl_process_init_sysfs(private);
+ kgsl_process_init_debugfs(private);
+done:
mutex_unlock(&private->process_private_mutex);
return private;
@@ -821,14 +929,14 @@
int result = 0;
device->open_count--;
if (device->open_count == 0) {
- BUG_ON(device->active_cnt > 1);
+ BUG_ON(atomic_read(&device->active_cnt) > 1);
result = device->ftbl->stop(device);
kgsl_pwrctrl_set_state(device, KGSL_STATE_INIT);
/*
* active_cnt special case: we just stopped the device,
* so no need to use kgsl_active_count_put()
*/
- device->active_cnt--;
+ atomic_dec(&device->active_cnt);
} else {
kgsl_active_count_put(device);
}
@@ -890,7 +998,7 @@
* time, so use this sequence instead of the kgsl_pwrctrl_wake()
* which will be called by kgsl_active_count_get().
*/
- device->active_cnt++;
+ atomic_inc(&device->active_cnt);
kgsl_sharedmem_set(device, &device->memstore, 0, 0,
device->memstore.size);
@@ -913,7 +1021,8 @@
device->open_count++;
err:
if (result)
- device->active_cnt--;
+ atomic_dec(&device->active_cnt);
+
return result;
}
EXPORT_SYMBOL(kgsl_open_device);
@@ -985,7 +1094,7 @@
kgsl_pwrctrl_enable(device);
result = device->ftbl->stop(device);
kgsl_pwrctrl_set_state(device, KGSL_STATE_INIT);
- device->active_cnt--;
+ atomic_dec(&device->active_cnt);
}
err_freedevpriv:
mutex_unlock(&device->mutex);
@@ -1010,12 +1119,13 @@
kgsl_sharedmem_find_region(struct kgsl_process_private *private,
unsigned int gpuaddr, size_t size)
{
- struct rb_node *node = private->mem_rb.rb_node;
+ struct rb_node *node;
if (!kgsl_mmu_gpuaddr_in_range(private->pagetable, gpuaddr))
return NULL;
spin_lock(&private->mem_lock);
+ node = private->mem_rb.rb_node;
while (node != NULL) {
struct kgsl_mem_entry *entry;
@@ -1065,16 +1175,19 @@
* @size: length of the region.
*
* Checks that there are no existing allocations within an address
- * region.
+ * region. This function should be called with processes spin lock
+ * held.
*/
-int
+static int
kgsl_sharedmem_region_empty(struct kgsl_process_private *private,
unsigned int gpuaddr, size_t size)
{
int result = 1;
unsigned int gpuaddr_end = gpuaddr + size;
- struct rb_node *node = private->mem_rb.rb_node;
+ struct rb_node *node;
+
+ assert_spin_locked(&private->mem_lock);
if (!kgsl_mmu_gpuaddr_in_range(private->pagetable, gpuaddr))
return 0;
@@ -1083,7 +1196,6 @@
if (gpuaddr_end < gpuaddr)
return 0;
- spin_lock(&private->mem_lock);
node = private->mem_rb.rb_node;
while (node != NULL) {
struct kgsl_mem_entry *entry;
@@ -1104,7 +1216,6 @@
break;
}
}
- spin_unlock(&private->mem_lock);
return result;
}
@@ -1132,6 +1243,30 @@
return entry;
}
+/**
+ * kgsl_mem_entry_set_pend() - Set the pending free flag of a memory entry
+ * @entry - The memory entry
+ *
+ * @returns - true if pending flag was 0 else false
+ *
+ * This function will set the pending free flag if it is previously unset. Used
+ * to prevent race condition between ioctls calling free/freememontimestamp
+ * on the same entry. Whichever thread set's the flag first will do the free.
+ */
+static inline bool kgsl_mem_entry_set_pend(struct kgsl_mem_entry *entry)
+{
+ bool ret = false;
+ spin_lock(&entry->priv->mem_lock);
+ if (entry && entry->pending_free) {
+ ret = false;
+ } else if (entry) {
+ entry->pending_free = 1;
+ ret = true;
+ }
+ spin_unlock(&entry->priv->mem_lock);
+ return ret;
+}
+
/*call all ioctl sub functions with driver locked*/
static long kgsl_ioctl_device_getproperty(struct kgsl_device_private *dev_priv,
unsigned int cmd, void *data)
@@ -1410,7 +1545,7 @@
{
struct kgsl_mem_entry *entry = priv;
trace_kgsl_mem_timestamp_free(device, entry, id, timestamp, 0);
- kgsl_mem_entry_detach_process(entry);
+ kgsl_mem_entry_put(entry);
}
static long _cmdstream_freememontimestamp(struct kgsl_device_private *dev_priv,
@@ -1429,11 +1564,12 @@
"invalid gpuaddr %08x\n", gpuaddr);
return -EINVAL;
}
- if (entry->memdesc.priv & KGSL_MEMDESC_FREE_PENDING) {
+ if (!kgsl_mem_entry_set_pend(entry)) {
+ KGSL_DRV_WARN(dev_priv->device,
+ "Cannot set pending bit for gpuaddr %08x\n", gpuaddr);
kgsl_mem_entry_put(entry);
return -EBUSY;
}
- entry->memdesc.priv |= KGSL_MEMDESC_FREE_PENDING;
trace_kgsl_mem_timestamp_queue(device, entry, context_id,
kgsl_readtimestamp(device, context,
@@ -1533,8 +1669,7 @@
param->gpuaddr);
return -EINVAL;
}
-
- if (entry->memdesc.priv & KGSL_MEMDESC_FREE_PENDING) {
+ if (!kgsl_mem_entry_set_pend(entry)) {
kgsl_mem_entry_put(entry);
return -EBUSY;
}
@@ -1546,7 +1681,12 @@
entry->memdesc.size,
entry->memdesc.flags);
- kgsl_mem_entry_detach_process(entry);
+ /*
+ * First kgsl_mem_entry_put is for the reference that we took in
+ * this function when calling kgsl_sharedmem_find, second one is
+ * to free the memory since this is a free ioctl
+ */
+ kgsl_mem_entry_put(entry);
kgsl_mem_entry_put(entry);
return 0;
}
@@ -1565,7 +1705,7 @@
return -EINVAL;
}
- if (entry->memdesc.priv & KGSL_MEMDESC_FREE_PENDING) {
+ if (!kgsl_mem_entry_set_pend(entry)) {
kgsl_mem_entry_put(entry);
return -EBUSY;
}
@@ -1577,7 +1717,12 @@
entry->memdesc.size,
entry->memdesc.flags);
- kgsl_mem_entry_detach_process(entry);
+ /*
+ * First kgsl_mem_entry_put is for the reference that we took in
+ * this function when calling kgsl_sharedmem_find_id, second one is
+ * to free the memory since this is a free ioctl
+ */
+ kgsl_mem_entry_put(entry);
kgsl_mem_entry_put(entry);
return 0;
}
@@ -2052,18 +2197,15 @@
else if (entry->memdesc.size >= SZ_64K)
kgsl_memdesc_set_align(&entry->memdesc, ilog2(SZ_64));
- result = kgsl_mmu_map(private->pagetable, &entry->memdesc);
- if (result)
- goto error_put_file_ptr;
-
- /* Adjust the returned value for a non 4k aligned offset */
- param->gpuaddr = entry->memdesc.gpuaddr + (param->offset & ~PAGE_MASK);
/* echo back flags */
param->flags = entry->memdesc.flags;
result = kgsl_mem_entry_attach_process(entry, private);
if (result)
- goto error_unmap;
+ goto error_attach;
+
+ /* Adjust the returned value for a non 4k aligned offset */
+ param->gpuaddr = entry->memdesc.gpuaddr + (param->offset & ~PAGE_MASK);
KGSL_STATS_ADD(param->len, kgsl_driver.stats.mapped,
kgsl_driver.stats.mapped_max);
@@ -2074,9 +2216,7 @@
return result;
-error_unmap:
- kgsl_mmu_unmap(private->pagetable, &entry->memdesc);
-error_put_file_ptr:
+error_attach:
switch (entry->memtype) {
case KGSL_MEM_ENTRY_PMEM:
case KGSL_MEM_ENTRY_ASHMEM:
@@ -2336,10 +2476,6 @@
if (result)
return result;
- result = kgsl_mmu_map(private->pagetable, &entry->memdesc);
- if (result)
- goto err;
-
result = kgsl_mem_entry_attach_process(entry, private);
if (result != 0)
goto err;
@@ -2373,12 +2509,6 @@
if (result != 0)
goto err;
- if (!kgsl_memdesc_use_cpu_map(&entry->memdesc)) {
- result = kgsl_mmu_map(private->pagetable, &entry->memdesc);
- if (result)
- goto err;
- }
-
result = kgsl_mem_entry_attach_process(entry, private);
if (result != 0)
goto err;
@@ -2950,7 +3080,7 @@
*/
if (!retry && (ret == (unsigned long)-ENOMEM)
&& (align > PAGE_SHIFT)) {
- align = PAGE_SHIFT;
+ align = 0;
addr = 0;
len = orig_len;
retry = 1;
@@ -2962,8 +3092,30 @@
ret = ALIGN(ret, (1 << align));
/*make sure there isn't a GPU only mapping at this address */
- if (kgsl_sharedmem_region_empty(private, ret, orig_len))
+ spin_lock(&private->mem_lock);
+ if (kgsl_sharedmem_region_empty(private, ret, orig_len)) {
+ int ret_val;
+ /*
+ * We found a free memory map, claim it here with
+ * memory lock held
+ */
+ entry->memdesc.gpuaddr = ret;
+ /* This should never fail */
+ ret_val = kgsl_mem_entry_track_gpuaddr(private, entry);
+ spin_unlock(&private->mem_lock);
+ BUG_ON(ret_val);
+ /* map cannot be called with lock held */
+ ret_val = kgsl_mmu_map(private->pagetable,
+ &entry->memdesc);
+ if (ret_val) {
+ spin_lock(&private->mem_lock);
+ kgsl_mem_entry_untrack_gpuaddr(private, entry);
+ spin_unlock(&private->mem_lock);
+ ret = ret_val;
+ }
break;
+ }
+ spin_unlock(&private->mem_lock);
trace_kgsl_mem_unmapped_area_collision(entry, addr, orig_len,
ret);
@@ -2989,7 +3141,7 @@
} while (mmap_range_valid(addr, len));
if (IS_ERR_VALUE(ret))
- KGSL_MEM_INFO(device,
+ KGSL_MEM_ERR(device,
"pid %d pgoff %lx len %ld failed error %ld\n",
private->pid, pgoff, len, ret);
put:
@@ -3020,17 +3172,6 @@
if (ret)
return ret;
- if (kgsl_memdesc_use_cpu_map(&entry->memdesc)) {
- entry->memdesc.gpuaddr = vma->vm_start;
-
- ret = kgsl_mmu_map(private->pagetable, &entry->memdesc);
- if (ret) {
- kgsl_mem_entry_put(entry);
- return ret;
- }
- kgsl_mem_entry_track_gpuaddr(private, entry);
- }
-
vma->vm_flags |= entry->memdesc.ops->vmflags(&entry->memdesc);
vma->vm_private_data = entry;
@@ -3283,6 +3424,7 @@
setup_timer(&device->idle_timer, kgsl_timer, (unsigned long) device);
+ setup_timer(&device->hang_timer, hang_timer, (unsigned long) device);
status = kgsl_create_device_workqueue(device);
if (status)
goto error_pwrctrl_close;
@@ -3362,9 +3504,7 @@
/* Disable the idle timer so we don't get interrupted */
del_timer_sync(&device->idle_timer);
- mutex_unlock(&device->mutex);
- flush_workqueue(device->work_queue);
- mutex_lock(&device->mutex);
+ del_timer_sync(&device->hang_timer);
/* Force on the clocks */
kgsl_pwrctrl_wake(device);
diff --git a/drivers/gpu/msm/kgsl.h b/drivers/gpu/msm/kgsl.h
index 4a1f291..d05d391 100644
--- a/drivers/gpu/msm/kgsl.h
+++ b/drivers/gpu/msm/kgsl.h
@@ -156,8 +156,8 @@
#define KGSL_MEMDESC_GLOBAL BIT(1)
/* The memdesc is frozen during a snapshot */
#define KGSL_MEMDESC_FROZEN BIT(2)
-/* The memdesc is scheduled to be freed on a timestamp */
-#define KGSL_MEMDESC_FREE_PENDING BIT(3)
+/* The memdesc is mapped into a pagetable */
+#define KGSL_MEMDESC_MAPPED BIT(3)
/* shared memory allocation */
struct kgsl_memdesc {
@@ -195,6 +195,8 @@
/* back pointer to private structure under whose context this
* allocation is made */
struct kgsl_process_private *priv;
+ /* Initialized to 0, set to 1 when entry is marked for freeing */
+ int pending_free;
};
#ifdef CONFIG_MSM_KGSL_MMU_PAGE_FAULT
@@ -203,6 +205,7 @@
#define MMU_CONFIG 1
#endif
+void kgsl_hang_check(struct work_struct *work);
void kgsl_mem_entry_destroy(struct kref *kref);
int kgsl_postmortem_dump(struct kgsl_device *device, int manual);
diff --git a/drivers/gpu/msm/kgsl_cffdump.c b/drivers/gpu/msm/kgsl_cffdump.c
index 99f4235..b07a1cad 100644
--- a/drivers/gpu/msm/kgsl_cffdump.c
+++ b/drivers/gpu/msm/kgsl_cffdump.c
@@ -424,10 +424,8 @@
if (memdesc == NULL) {
struct kgsl_mem_entry *entry;
- spin_lock(&dev_priv->process_priv->mem_lock);
entry = kgsl_sharedmem_find_region(dev_priv->process_priv,
gpuaddr, sizebytes);
- spin_unlock(&dev_priv->process_priv->mem_lock);
if (entry == NULL) {
KGSL_CORE_ERR("did not find mapping "
"for gpuaddr: 0x%08x\n", gpuaddr);
diff --git a/drivers/gpu/msm/kgsl_device.h b/drivers/gpu/msm/kgsl_device.h
index 6477cbd..2af5ccd 100644
--- a/drivers/gpu/msm/kgsl_device.h
+++ b/drivers/gpu/msm/kgsl_device.h
@@ -172,7 +172,9 @@
struct completion hwaccess_gate;
const struct kgsl_functable *ftbl;
struct work_struct idle_check_ws;
+ struct work_struct hang_check_ws;
struct timer_list idle_timer;
+ struct timer_list hang_timer;
struct kgsl_pwrctrl pwrctrl;
int open_count;
@@ -180,7 +182,7 @@
uint32_t state;
uint32_t requested_state;
- unsigned int active_cnt;
+ atomic_t active_cnt;
struct completion suspend_gate;
wait_queue_head_t wait_queue;
@@ -237,6 +239,8 @@
.ft_gate = COMPLETION_INITIALIZER((_dev).ft_gate),\
.idle_check_ws = __WORK_INITIALIZER((_dev).idle_check_ws,\
kgsl_idle_check),\
+ .hang_check_ws = __WORK_INITIALIZER((_dev).hang_check_ws,\
+ kgsl_hang_check),\
.ts_expired_ws = __WORK_INITIALIZER((_dev).ts_expired_ws,\
kgsl_process_events),\
.context_idr = IDR_INIT((_dev).context_idr),\
diff --git a/drivers/gpu/msm/kgsl_drm.c b/drivers/gpu/msm/kgsl_drm.c
index 007f89a..1fc7467 100644
--- a/drivers/gpu/msm/kgsl_drm.c
+++ b/drivers/gpu/msm/kgsl_drm.c
@@ -224,10 +224,23 @@
return result;
}
+ result = kgsl_mmu_get_gpuaddr(priv->pagetable,
+ &priv->memdesc);
+ if (result) {
+ DRM_ERROR(
+ "kgsl_mmu_get_gpuaddr failed. result = %d\n",
+ result);
+ ion_free(kgsl_drm_ion_client,
+ priv->ion_handle);
+ priv->ion_handle = NULL;
+ return result;
+ }
result = kgsl_mmu_map(priv->pagetable, &priv->memdesc);
if (result) {
DRM_ERROR(
"kgsl_mmu_map failed. result = %d\n", result);
+ kgsl_mmu_put_gpuaddr(priv->pagetable,
+ &priv->memdesc);
ion_free(kgsl_drm_ion_client,
priv->ion_handle);
priv->ion_handle = NULL;
@@ -273,10 +286,17 @@
priv->memdesc.sglen++;
}
+ result = kgsl_mmu_get_gpuaddr(priv->pagetable, &priv->memdesc);
+ if (result) {
+ DRM_ERROR(
+ "kgsl_mmu_get_gpuaddr failed. result = %d\n", result);
+ goto memerr;
+ }
result = kgsl_mmu_map(priv->pagetable, &priv->memdesc);
if (result) {
DRM_ERROR(
"kgsl_mmu_map failed. result = %d\n", result);
+ kgsl_mmu_put_gpuaddr(priv->pagetable, &priv->memdesc);
goto memerr;
}
@@ -311,8 +331,10 @@
if (!kgsl_gem_memory_allocated(obj) || TYPE_IS_FD(priv->type))
return;
- if (priv->memdesc.gpuaddr)
+ if (priv->memdesc.gpuaddr) {
kgsl_mmu_unmap(priv->memdesc.pagetable, &priv->memdesc);
+ kgsl_mmu_put_gpuaddr(priv->memdesc.pagetable, &priv->memdesc);
+ }
/* ION will take care of freeing the sg table. */
priv->memdesc.sg = NULL;
@@ -645,9 +667,21 @@
priv->memdesc.sglen++;
}
+ ret = kgsl_mmu_get_gpuaddr(priv->pagetable, &priv->memdesc);
+ if (ret) {
+ DRM_ERROR("kgsl_mmu_get_gpuaddr failed. ret = %d\n", ret);
+ ion_free(kgsl_drm_ion_client,
+ priv->ion_handle);
+ priv->ion_handle = NULL;
+ kgsl_mmu_putpagetable(priv->pagetable);
+ drm_gem_object_release(obj);
+ kfree(priv);
+ return -ENOMEM;
+ }
ret = kgsl_mmu_map(priv->pagetable, &priv->memdesc);
if (ret) {
DRM_ERROR("kgsl_mmu_map failed. ret = %d\n", ret);
+ kgsl_mmu_put_gpuaddr(priv->pagetable, &priv->memdesc);
ion_free(kgsl_drm_ion_client,
priv->ion_handle);
priv->ion_handle = NULL;
@@ -688,7 +722,7 @@
ret = -EINVAL;
else if (TYPE_IS_PMEM(priv->type) || TYPE_IS_MEM(priv->type)) {
if (priv->ion_handle) {
- args->ion_fd = ion_share_dma_buf(
+ args->ion_fd = ion_share_dma_buf_fd(
kgsl_drm_ion_client, priv->ion_handle);
if (args->ion_fd < 0) {
DRM_ERROR(
diff --git a/drivers/gpu/msm/kgsl_iommu.c b/drivers/gpu/msm/kgsl_iommu.c
index eb85900..9113605 100644
--- a/drivers/gpu/msm/kgsl_iommu.c
+++ b/drivers/gpu/msm/kgsl_iommu.c
@@ -287,7 +287,7 @@
addr < (p->gpuaddr + p->size)) {
kgsl_get_memory_usage(name, sizeof(name) - 1,
- p->flags),
+ p->flags);
KGSL_LOG_DUMP(iommu_dev->kgsldev,
"---- premature free ----\n");
KGSL_LOG_DUMP(iommu_dev->kgsldev,
@@ -1735,10 +1735,36 @@
return ret;
}
-static void kgsl_iommu_stop(struct kgsl_mmu *mmu)
+void kgsl_iommu_pagefault_resume(struct kgsl_mmu *mmu)
{
struct kgsl_iommu *iommu = mmu->priv;
int i, j;
+
+ if (mmu->fault) {
+ for (i = 0; i < iommu->unit_count; i++) {
+ struct kgsl_iommu_unit *iommu_unit =
+ &iommu->iommu_units[i];
+ for (j = 0; j < iommu_unit->dev_count; j++) {
+ if (iommu_unit->dev[j].fault) {
+ kgsl_iommu_enable_clk(mmu, j);
+ _iommu_lock();
+ KGSL_IOMMU_SET_CTX_REG(iommu,
+ iommu_unit,
+ iommu_unit->dev[j].ctx_id,
+ RESUME, 1);
+ _iommu_unlock();
+ iommu_unit->dev[j].fault = 0;
+ }
+ }
+ }
+ mmu->fault = 0;
+ }
+}
+
+
+static void kgsl_iommu_stop(struct kgsl_mmu *mmu)
+{
+ struct kgsl_iommu *iommu = mmu->priv;
/*
* stop device mmu
*
@@ -1751,25 +1777,7 @@
mmu->flags &= ~KGSL_FLAGS_STARTED;
- if (mmu->fault) {
- for (i = 0; i < iommu->unit_count; i++) {
- struct kgsl_iommu_unit *iommu_unit =
- &iommu->iommu_units[i];
- for (j = 0; j < iommu_unit->dev_count; j++) {
- if (iommu_unit->dev[j].fault) {
- kgsl_iommu_enable_clk(mmu, j);
- _iommu_lock();
- KGSL_IOMMU_SET_CTX_REG(iommu,
- iommu_unit,
- iommu_unit->dev[j].ctx_id,
- RESUME, 1);
- _iommu_unlock();
- iommu_unit->dev[j].fault = 0;
- }
- }
- }
- mmu->fault = 0;
- }
+ kgsl_iommu_pagefault_resume(mmu);
}
/* switch off MMU clocks and cancel any events it has queued */
iommu->clk_event_queued = false;
@@ -1987,6 +1995,7 @@
.mmu_setstate = kgsl_iommu_setstate,
.mmu_device_setstate = kgsl_iommu_default_setstate,
.mmu_pagefault = NULL,
+ .mmu_pagefault_resume = kgsl_iommu_pagefault_resume,
.mmu_get_current_ptbase = kgsl_iommu_get_current_ptbase,
.mmu_enable_clk = kgsl_iommu_enable_clk,
.mmu_disable_clk_on_ts = kgsl_iommu_disable_clk_on_ts,
diff --git a/drivers/gpu/msm/kgsl_mmu.c b/drivers/gpu/msm/kgsl_mmu.c
index 12a4b25..952019f 100644
--- a/drivers/gpu/msm/kgsl_mmu.c
+++ b/drivers/gpu/msm/kgsl_mmu.c
@@ -613,15 +613,20 @@
}
EXPORT_SYMBOL(kgsl_mh_start);
+/**
+ * kgsl_mmu_get_gpuaddr - Assign a memdesc with a gpuadddr from the gen pool
+ * @pagetable - pagetable whose pool is to be used
+ * @memdesc - memdesc to which gpuaddr is assigned
+ *
+ * returns - 0 on success else error code
+ */
int
-kgsl_mmu_map(struct kgsl_pagetable *pagetable,
- struct kgsl_memdesc *memdesc)
+kgsl_mmu_get_gpuaddr(struct kgsl_pagetable *pagetable,
+ struct kgsl_memdesc *memdesc)
{
- int ret;
struct gen_pool *pool = NULL;
int size;
int page_align = ilog2(PAGE_SIZE);
- unsigned int protflags = kgsl_memdesc_protflags(memdesc);
if (kgsl_mmu_type == KGSL_MMU_TYPE_NONE) {
if (memdesc->sglen == 1) {
@@ -693,6 +698,28 @@
return -ENOMEM;
}
}
+ return 0;
+}
+EXPORT_SYMBOL(kgsl_mmu_get_gpuaddr);
+
+int
+kgsl_mmu_map(struct kgsl_pagetable *pagetable,
+ struct kgsl_memdesc *memdesc)
+{
+ int ret = 0;
+ int size;
+ unsigned int protflags = kgsl_memdesc_protflags(memdesc);
+
+ if (!memdesc->gpuaddr)
+ return -EINVAL;
+ /* Only global mappings should be mapped multiple times */
+ if (!kgsl_memdesc_is_global(memdesc) &&
+ (KGSL_MEMDESC_MAPPED & memdesc->priv))
+ return -EINVAL;
+ /* Add space for the guard page when allocating the mmu VA. */
+ size = memdesc->size;
+ if (kgsl_memdesc_has_guard_page(memdesc))
+ size += PAGE_SIZE;
if (KGSL_MMU_TYPE_IOMMU != kgsl_mmu_get_mmutype())
spin_lock(&pagetable->lock);
@@ -702,7 +729,7 @@
spin_lock(&pagetable->lock);
if (ret)
- goto err_free_gpuaddr;
+ goto done;
/* Keep track of the statistics for the sysfs files */
@@ -713,34 +740,76 @@
pagetable->stats.max_mapped);
spin_unlock(&pagetable->lock);
+ memdesc->priv |= KGSL_MEMDESC_MAPPED;
return 0;
-err_free_gpuaddr:
+done:
spin_unlock(&pagetable->lock);
- if (pool)
- gen_pool_free(pool, memdesc->gpuaddr, size);
- memdesc->gpuaddr = 0;
return ret;
}
EXPORT_SYMBOL(kgsl_mmu_map);
+/**
+ * kgsl_mmu_put_gpuaddr - Free a gpuaddress from memory pool
+ * @pagetable - pagetable whose pool memory is freed from
+ * @memdesc - memdesc whose gpuaddress is freed
+ *
+ * returns - 0 on success else error code
+ */
+int
+kgsl_mmu_put_gpuaddr(struct kgsl_pagetable *pagetable,
+ struct kgsl_memdesc *memdesc)
+{
+ struct gen_pool *pool;
+ int size;
+
+ if (memdesc->size == 0 || memdesc->gpuaddr == 0)
+ return 0;
+
+ if (kgsl_mmu_type == KGSL_MMU_TYPE_NONE)
+ goto done;
+
+ /* Add space for the guard page when freeing the mmu VA. */
+ size = memdesc->size;
+ if (kgsl_memdesc_has_guard_page(memdesc))
+ size += PAGE_SIZE;
+
+ pool = pagetable->pool;
+
+ if (KGSL_MMU_TYPE_IOMMU == kgsl_mmu_get_mmutype()) {
+ if (kgsl_memdesc_is_global(memdesc))
+ pool = pagetable->kgsl_pool;
+ else if (kgsl_memdesc_use_cpu_map(memdesc))
+ pool = NULL;
+ }
+ if (pool)
+ gen_pool_free(pool, memdesc->gpuaddr, size);
+ /*
+ * Don't clear the gpuaddr on global mappings because they
+ * may be in use by other pagetables
+ */
+done:
+ if (!kgsl_memdesc_is_global(memdesc))
+ memdesc->gpuaddr = 0;
+ return 0;
+}
+EXPORT_SYMBOL(kgsl_mmu_put_gpuaddr);
+
int
kgsl_mmu_unmap(struct kgsl_pagetable *pagetable,
struct kgsl_memdesc *memdesc)
{
- struct gen_pool *pool;
int size;
unsigned int start_addr = 0;
unsigned int end_addr = 0;
- if (memdesc->size == 0 || memdesc->gpuaddr == 0)
- return 0;
+ if (memdesc->size == 0 || memdesc->gpuaddr == 0 ||
+ !(KGSL_MEMDESC_MAPPED & memdesc->priv))
+ return -EINVAL;
- if (kgsl_mmu_type == KGSL_MMU_TYPE_NONE) {
- memdesc->gpuaddr = 0;
+ if (kgsl_mmu_type == KGSL_MMU_TYPE_NONE)
return 0;
- }
/* Add space for the guard page when freeing the mmu VA. */
size = memdesc->size;
@@ -767,24 +836,8 @@
pagetable->stats.mapped -= size;
spin_unlock(&pagetable->lock);
-
- pool = pagetable->pool;
-
- if (KGSL_MMU_TYPE_IOMMU == kgsl_mmu_get_mmutype()) {
- if (kgsl_memdesc_is_global(memdesc))
- pool = pagetable->kgsl_pool;
- else if (kgsl_memdesc_use_cpu_map(memdesc))
- pool = NULL;
- }
- if (pool)
- gen_pool_free(pool, memdesc->gpuaddr, size);
-
- /*
- * Don't clear the gpuaddr on global mappings because they
- * may be in use by other pagetables
- */
if (!kgsl_memdesc_is_global(memdesc))
- memdesc->gpuaddr = 0;
+ memdesc->priv &= ~KGSL_MEMDESC_MAPPED;
return 0;
}
EXPORT_SYMBOL(kgsl_mmu_unmap);
@@ -805,9 +858,12 @@
gpuaddr = memdesc->gpuaddr;
memdesc->priv |= KGSL_MEMDESC_GLOBAL;
- result = kgsl_mmu_map(pagetable, memdesc);
+ result = kgsl_mmu_get_gpuaddr(pagetable, memdesc);
if (result)
goto error;
+ result = kgsl_mmu_map(pagetable, memdesc);
+ if (result)
+ goto error_put_gpuaddr;
/*global mappings must have the same gpu address in all pagetables*/
if (gpuaddr && gpuaddr != memdesc->gpuaddr) {
@@ -818,6 +874,8 @@
return result;
error_unmap:
kgsl_mmu_unmap(pagetable, memdesc);
+error_put_gpuaddr:
+ kgsl_mmu_put_gpuaddr(pagetable, memdesc);
error:
return result;
}
diff --git a/drivers/gpu/msm/kgsl_mmu.h b/drivers/gpu/msm/kgsl_mmu.h
index a4fffec..faba81e 100644
--- a/drivers/gpu/msm/kgsl_mmu.h
+++ b/drivers/gpu/msm/kgsl_mmu.h
@@ -141,6 +141,8 @@
void (*mmu_pagefault) (struct kgsl_mmu *mmu);
phys_addr_t (*mmu_get_current_ptbase)
(struct kgsl_mmu *mmu);
+ void (*mmu_pagefault_resume)
+ (struct kgsl_mmu *mmu);
void (*mmu_disable_clk_on_ts)
(struct kgsl_mmu *mmu, uint32_t ts, bool ts_valid);
int (*mmu_enable_clk)
@@ -220,10 +222,14 @@
int kgsl_mmu_close(struct kgsl_device *device);
int kgsl_mmu_map(struct kgsl_pagetable *pagetable,
struct kgsl_memdesc *memdesc);
+int kgsl_mmu_get_gpuaddr(struct kgsl_pagetable *pagetable,
+ struct kgsl_memdesc *memdesc);
int kgsl_mmu_map_global(struct kgsl_pagetable *pagetable,
struct kgsl_memdesc *memdesc);
int kgsl_mmu_unmap(struct kgsl_pagetable *pagetable,
struct kgsl_memdesc *memdesc);
+int kgsl_mmu_put_gpuaddr(struct kgsl_pagetable *pagetable,
+ struct kgsl_memdesc *memdesc);
unsigned int kgsl_virtaddr_to_physaddr(void *virtaddr);
void kgsl_setstate(struct kgsl_mmu *mmu, unsigned int context_id,
uint32_t flags);
diff --git a/drivers/gpu/msm/kgsl_pwrctrl.c b/drivers/gpu/msm/kgsl_pwrctrl.c
index 847c59e..91d462b 100644
--- a/drivers/gpu/msm/kgsl_pwrctrl.c
+++ b/drivers/gpu/msm/kgsl_pwrctrl.c
@@ -1152,7 +1152,8 @@
* (active_cnt is zero), then loop with increasing delay,
* waiting for the GPU to become idle.
*/
- while (!device->active_cnt && delay < MAX_UDELAY) {
+ while (!atomic_read(&device->active_cnt) &&
+ (delay < MAX_UDELAY)) {
requested_state = device->requested_state;
if (!kgsl_pwrctrl_sleep(device))
break;
@@ -1242,6 +1243,7 @@
kgsl_pwrctrl_request_state(device, KGSL_STATE_NONE);
return -EBUSY;
}
+ del_timer_sync(&device->hang_timer);
kgsl_pwrctrl_irq(device, KGSL_PWRFLAGS_OFF);
kgsl_pwrctrl_clk(device, KGSL_PWRFLAGS_OFF, KGSL_STATE_NAP);
kgsl_pwrctrl_set_state(device, KGSL_STATE_NAP);
@@ -1311,6 +1313,7 @@
case KGSL_STATE_NAP:
case KGSL_STATE_SLEEP:
del_timer_sync(&device->idle_timer);
+ del_timer_sync(&device->hang_timer);
/* make sure power is on to stop the device*/
kgsl_pwrctrl_enable(device);
device->ftbl->suspend_context(device);
@@ -1400,9 +1403,9 @@
/* Enable state before turning on irq */
kgsl_pwrctrl_set_state(device, KGSL_STATE_ACTIVE);
kgsl_pwrctrl_irq(device, KGSL_PWRFLAGS_ON);
- /* Re-enable HW access */
- mod_timer(&device->idle_timer,
- jiffies + device->pwrctrl.interval_timeout);
+
+ mod_timer(&device->hang_timer,
+ (jiffies + msecs_to_jiffies(KGSL_TIMEOUT_PART)));
pm_qos_update_request(&device->pwrctrl.pm_qos_req_dma,
device->pwrctrl.pm_qos_latency);
case KGSL_STATE_ACTIVE:
@@ -1501,16 +1504,20 @@
int ret = 0;
BUG_ON(!mutex_is_locked(&device->mutex));
- if (device->active_cnt == 0) {
+ if ((atomic_read(&device->active_cnt) == 0) &&
+ (device->state != KGSL_STATE_ACTIVE)) {
mutex_unlock(&device->mutex);
wait_for_completion(&device->hwaccess_gate);
wait_for_completion(&device->ft_gate);
mutex_lock(&device->mutex);
+ /* Stop the idle timer */
+ del_timer_sync(&device->idle_timer);
+
ret = kgsl_pwrctrl_wake(device);
}
if (ret == 0)
- device->active_cnt++;
+ atomic_inc(&device->active_cnt);
trace_kgsl_active_count(device,
(unsigned long) __builtin_return_address(0));
return ret;
@@ -1522,25 +1529,17 @@
* @device: Pointer to a KGSL device
*
* Increase the active count for the KGSL device WITHOUT
- * turning on the clocks. Currently this is only used for creating
- * kgsl_events. The device mutex must be held while calling this function.
+ * turning on the clocks based on the assumption that the clocks are already
+ * on from a previous active_count_get(). Currently this is only used for
+ * creating kgsl_events.
*/
int kgsl_active_count_get_light(struct kgsl_device *device)
{
- BUG_ON(!mutex_is_locked(&device->mutex));
-
- if (device->state != KGSL_STATE_ACTIVE) {
- dev_WARN_ONCE(device->dev, 1, "device in unexpected state %s\n",
- kgsl_pwrstate_to_str(device->state));
- return -EINVAL;
- }
-
- if (device->active_cnt == 0) {
+ if (atomic_inc_not_zero(&device->active_cnt) == 0) {
dev_WARN_ONCE(device->dev, 1, "active count is 0!\n");
return -EINVAL;
}
- device->active_cnt++;
trace_kgsl_active_count(device,
(unsigned long) __builtin_return_address(0));
return 0;
@@ -1560,32 +1559,27 @@
void kgsl_active_count_put(struct kgsl_device *device)
{
BUG_ON(!mutex_is_locked(&device->mutex));
- BUG_ON(device->active_cnt == 0);
+ BUG_ON(atomic_read(&device->active_cnt) == 0);
kgsl_pwrscale_idle(device);
- if (device->active_cnt > 1) {
- device->active_cnt--;
- trace_kgsl_active_count(device,
- (unsigned long) __builtin_return_address(0));
- return;
- }
- INIT_COMPLETION(device->suspend_gate);
+ if (atomic_dec_and_test(&device->active_cnt)) {
+ INIT_COMPLETION(device->suspend_gate);
- if (device->state == KGSL_STATE_ACTIVE &&
+ if (device->state == KGSL_STATE_ACTIVE &&
device->requested_state == KGSL_STATE_NONE) {
- kgsl_pwrctrl_request_state(device, KGSL_STATE_NAP);
- if (kgsl_pwrctrl_sleep(device) && device->pwrctrl.irq_last) {
kgsl_pwrctrl_request_state(device, KGSL_STATE_NAP);
queue_work(device->work_queue, &device->idle_check_ws);
}
+
+ mod_timer(&device->idle_timer,
+ jiffies + device->pwrctrl.interval_timeout);
+
+ complete(&device->suspend_gate);
}
- device->active_cnt--;
trace_kgsl_active_count(device,
(unsigned long) __builtin_return_address(0));
- if (device->active_cnt == 0)
- complete(&device->suspend_gate);
}
EXPORT_SYMBOL(kgsl_active_count_put);
@@ -1599,7 +1593,7 @@
{
BUG_ON(!mutex_is_locked(&device->mutex));
- if (device->active_cnt != 0) {
+ if (atomic_read(&device->active_cnt) != 0) {
mutex_unlock(&device->mutex);
wait_for_completion(&device->suspend_gate);
mutex_lock(&device->mutex);
diff --git a/drivers/gpu/msm/kgsl_pwrscale_trustzone.c b/drivers/gpu/msm/kgsl_pwrscale_trustzone.c
index cfc409c..40649d2 100644
--- a/drivers/gpu/msm/kgsl_pwrscale_trustzone.c
+++ b/drivers/gpu/msm/kgsl_pwrscale_trustzone.c
@@ -28,8 +28,6 @@
struct tz_priv {
int governor;
- unsigned int no_switch_cnt;
- unsigned int skip_cnt;
struct kgsl_power_stats bin;
unsigned int idle_dcvs;
};
@@ -43,9 +41,6 @@
* frame length, but less than the idle timer.
*/
#define CEILING 50000
-#define SWITCH_OFF 200
-#define SWITCH_OFF_RESET_TH 40
-#define SKIP_COUNTER 500
#define TZ_RESET_ID 0x3
#define TZ_UPDATE_ID 0x4
#define TZ_INIT_ID 0x6
@@ -164,22 +159,6 @@
(priv->bin.total_time < FLOOR))
return;
- /* If the GPU has stayed in turbo mode for a while, *
- * stop writing out values. */
- if (pwr->active_pwrlevel == 0) {
- if (priv->no_switch_cnt > SWITCH_OFF) {
- priv->skip_cnt++;
- if (priv->skip_cnt > SKIP_COUNTER) {
- priv->no_switch_cnt -= SWITCH_OFF_RESET_TH;
- priv->skip_cnt = 0;
- }
- return;
- }
- priv->no_switch_cnt++;
- } else {
- priv->no_switch_cnt = 0;
- }
-
/* If there is an extended block of busy processing,
* increase frequency. Otherwise run the normal algorithm.
*/
@@ -225,7 +204,6 @@
struct tz_priv *priv = pwrscale->priv;
__secure_tz_entry2(TZ_RESET_ID, 0, 0);
- priv->no_switch_cnt = 0;
priv->bin.total_time = 0;
priv->bin.busy_time = 0;
}
diff --git a/drivers/gpu/msm/kgsl_sharedmem.c b/drivers/gpu/msm/kgsl_sharedmem.c
index 01f0768..2939df6 100644
--- a/drivers/gpu/msm/kgsl_sharedmem.c
+++ b/drivers/gpu/msm/kgsl_sharedmem.c
@@ -781,8 +781,10 @@
if (memdesc == NULL || memdesc->size == 0)
return;
- if (memdesc->gpuaddr)
+ if (memdesc->gpuaddr) {
kgsl_mmu_unmap(memdesc->pagetable, memdesc);
+ kgsl_mmu_put_gpuaddr(memdesc->pagetable, memdesc);
+ }
if (memdesc->ops && memdesc->ops->free)
memdesc->ops->free(memdesc);
diff --git a/drivers/gpu/msm/kgsl_sharedmem.h b/drivers/gpu/msm/kgsl_sharedmem.h
index 985b9b8..9f84690 100644
--- a/drivers/gpu/msm/kgsl_sharedmem.h
+++ b/drivers/gpu/msm/kgsl_sharedmem.h
@@ -260,6 +260,11 @@
ret = kgsl_sharedmem_page_alloc(memdesc, pagetable, size);
if (ret)
return ret;
+ ret = kgsl_mmu_get_gpuaddr(pagetable, memdesc);
+ if (ret) {
+ kgsl_sharedmem_free(memdesc);
+ return ret;
+ }
ret = kgsl_mmu_map(pagetable, memdesc);
if (ret)
kgsl_sharedmem_free(memdesc);
diff --git a/drivers/gpu/msm/kgsl_trace.h b/drivers/gpu/msm/kgsl_trace.h
index 6917883..48c7301 100644
--- a/drivers/gpu/msm/kgsl_trace.h
+++ b/drivers/gpu/msm/kgsl_trace.h
@@ -780,7 +780,7 @@
TP_fast_assign(
__assign_str(device_name, device->name);
- __entry->count = device->active_cnt;
+ __entry->count = atomic_read(&device->active_cnt);
__entry->ip = ip;
),
diff --git a/drivers/gpu/msm/z180.c b/drivers/gpu/msm/z180.c
index 78e2859..cc1819d 100644
--- a/drivers/gpu/msm/z180.c
+++ b/drivers/gpu/msm/z180.c
@@ -580,7 +580,6 @@
z180_cmdstream_start(device);
- mod_timer(&device->idle_timer, jiffies + FIRST_TIMEOUT);
kgsl_pwrctrl_irq(device, KGSL_PWRFLAGS_ON);
device->ftbl->irqctrl(device, 1);
diff --git a/drivers/gud/Makefile b/drivers/gud/Makefile
index 3a16bb7..ef0e083 100644
--- a/drivers/gud/Makefile
+++ b/drivers/gud/Makefile
@@ -10,7 +10,8 @@
mobicore_driver/ops.o \
mobicore_driver/mem.o \
mobicore_driver/api.o \
- mobicore_driver/main.o
+ mobicore_driver/main.o \
+ mobicore_driver/pm.o
mckernelapi-objs := mobicore_kernelapi/main.o \
mobicore_kernelapi/clientlib.o \
diff --git a/drivers/gud/mobicore_driver/main.c b/drivers/gud/mobicore_driver/main.c
index b5cb1a6..6f91974 100644
--- a/drivers/gud/mobicore_driver/main.c
+++ b/drivers/gud/mobicore_driver/main.c
@@ -51,7 +51,6 @@
};
struct device mcd_debug_subname = {
- .init_name = "", /* Set to 'mcd' at mc_init() time */
.driver = &mcd_debug_name
};
@@ -1343,6 +1342,10 @@
ret = mc_init_l2_tables();
+#ifdef MC_CRYPTO_CLOCK_MANAGEMENT
+ ret = mc_pm_clock_initialize();
+#endif
+
/*
* initialize unique number counter which we can use for
* handles. It is limited to 2^32, but this should be
@@ -1398,6 +1401,10 @@
mc_fastcall_destroy();
+#ifdef MC_CRYPTO_CLOCK_MANAGEMENT
+ mc_pm_clock_finalize();
+#endif
+
MCDRV_DBG_VERBOSE(mcd, "exit");
}
diff --git a/drivers/gud/mobicore_driver/ops.c b/drivers/gud/mobicore_driver/ops.c
index 05c80b7..9d4af72 100644
--- a/drivers/gud/mobicore_driver/ops.c
+++ b/drivers/gud/mobicore_driver/ops.c
@@ -60,7 +60,16 @@
{
struct fastcall_work *fc_work =
container_of(work, struct fastcall_work, work);
+
+#ifdef MC_CRYPTO_CLOCK_MANAGEMENT
+ mc_pm_clock_enable();
+#endif
+
smc(fc_work->data);
+
+#ifdef MC_CRYPTO_CLOCK_MANAGEMENT
+ mc_pm_clock_disable();
+#endif
}
void mc_fastcall(void *data)
@@ -114,7 +123,16 @@
{
struct fastcall_work_struct *fc_work =
container_of(work, struct fastcall_work_struct, work);
+
+#ifdef MC_CRYPTO_CLOCK_MANAGEMENT
+ mc_pm_clock_enable();
+#endif
+
smc(fc_work->data);
+
+#ifdef MC_CRYPTO_CLOCK_MANAGEMENT
+ mc_pm_clock_disable();
+#endif
}
void mc_fastcall(void *data)
diff --git a/drivers/gud/mobicore_driver/platforms/msm8960_surf_std/platform.h b/drivers/gud/mobicore_driver/platforms/msm8960_surf_std/platform.h
index 7febcb6..4768f39 100644
--- a/drivers/gud/mobicore_driver/platforms/msm8960_surf_std/platform.h
+++ b/drivers/gud/mobicore_driver/platforms/msm8960_surf_std/platform.h
@@ -43,4 +43,7 @@
*/
#define MC_VM_UNMAP
+/* Enable Power Management for Crypto Engine */
+#define MC_CRYPTO_CLOCK_MANAGEMENT
+
#endif /* _MC_PLATFORM_H_ */
diff --git a/drivers/gud/mobicore_driver/pm.c b/drivers/gud/mobicore_driver/pm.c
new file mode 100644
index 0000000..3ad2015
--- /dev/null
+++ b/drivers/gud/mobicore_driver/pm.c
@@ -0,0 +1,295 @@
+/*
+ * MobiCore Driver Kernel Module.
+ * This module is written as a Linux device driver.
+ * This driver represents the command proxy on the lowest layer, from the
+ * secure world to the non secure world, and vice versa.
+ * This driver is located in the non secure world (Linux).
+ * This driver offers IOCTL commands, for access to the secure world, and has
+ * the interface from the secure world to the normal world.
+ * The access to the driver is possible with a file descriptor,
+ * which has to be created by the fd = open(/dev/mobicore) command.
+ *
+ * <-- Copyright Giesecke & Devrient GmbH 2009-2012 -->
+ * <-- Copyright Trustonic Limited 2013 -->
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+#include <linux/module.h>
+#include <linux/timer.h>
+#include <linux/suspend.h>
+#include <linux/device.h>
+
+#include "main.h"
+#include "pm.h"
+#include "fastcall.h"
+#include "ops.h"
+#include "logging.h"
+#include "debug.h"
+
+#ifdef MC_CRYPTO_CLOCK_MANAGEMENT
+ #include <linux/clk.h>
+ #include <linux/err.h>
+
+ struct clk *mc_ce_iface_clk = NULL;
+ struct clk *mc_ce_core_clk = NULL;
+ struct clk *mc_ce_bus_clk = NULL;
+#endif /* MC_CRYPTO_CLOCK_MANAGEMENT */
+
+#ifdef MC_PM_RUNTIME
+
+static struct mc_context *ctx;
+
+static bool sleep_ready(void)
+{
+ if (!ctx->mcp)
+ return false;
+
+ if (!ctx->mcp->flags.sleep_mode.ReadyToSleep & READY_TO_SLEEP)
+ return false;
+
+ return true;
+}
+
+static void mc_suspend_handler(struct work_struct *work)
+{
+ if (!ctx->mcp)
+ return;
+
+ ctx->mcp->flags.sleep_mode.SleepReq = REQ_TO_SLEEP;
+ _nsiq();
+}
+DECLARE_WORK(suspend_work, mc_suspend_handler);
+
+static inline void dump_sleep_params(struct mc_flags *flags)
+{
+ MCDRV_DBG(mcd, "MobiCore IDLE=%d!", flags->schedule);
+ MCDRV_DBG(mcd,
+ "MobiCore Request Sleep=%d!", flags->sleep_mode.SleepReq);
+ MCDRV_DBG(mcd, "MobiCore Sleep Ready=%d!",
+ flags->sleep_mode.ReadyToSleep);
+}
+
+static int mc_suspend_notifier(struct notifier_block *nb,
+ unsigned long event, void *dummy)
+{
+ struct mc_mcp_buffer *mcp = ctx->mcp;
+ /* We have noting to say if MobiCore is not initialized */
+ if (!mcp)
+ return 0;
+
+#ifdef MC_MEM_TRACES
+ mobicore_log_read();
+#endif
+
+ switch (event) {
+ case PM_SUSPEND_PREPARE:
+ /*
+ * Make sure we have finished all the work otherwise
+ * we end up in a race condition
+ */
+ cancel_work_sync(&suspend_work);
+ /*
+ * We can't go to sleep if MobiCore is not IDLE
+ * or not Ready to sleep
+ */
+ dump_sleep_params(&mcp->flags);
+ if (!sleep_ready()) {
+ ctx->mcp->flags.sleep_mode.SleepReq = REQ_TO_SLEEP;
+ schedule_work_on(0, &suspend_work);
+ flush_work(&suspend_work);
+ if (!sleep_ready()) {
+ dump_sleep_params(&mcp->flags);
+ ctx->mcp->flags.sleep_mode.SleepReq = 0;
+ MCDRV_DBG_ERROR(mcd, "MobiCore can't SLEEP!");
+ return NOTIFY_BAD;
+ }
+ }
+ break;
+ case PM_POST_SUSPEND:
+ MCDRV_DBG(mcd, "Resume MobiCore system!");
+ ctx->mcp->flags.sleep_mode.SleepReq = 0;
+ break;
+ default:
+ break;
+ }
+ return 0;
+}
+
+static struct notifier_block mc_notif_block = {
+ .notifier_call = mc_suspend_notifier,
+};
+
+#ifdef MC_BL_NOTIFIER
+
+static int bL_switcher_notifier_handler(struct notifier_block *this,
+ unsigned long event, void *ptr)
+{
+ unsigned int mpidr, cpu, cluster;
+ struct mc_mcp_buffer *mcp = ctx->mcp;
+
+ if (!mcp)
+ return 0;
+
+ asm volatile ("mrc\tp15, 0, %0, c0, c0, 5" : "=r" (mpidr));
+ cpu = mpidr & 0x3;
+ cluster = (mpidr >> 8) & 0xf;
+ MCDRV_DBG(mcd, "%s switching!!, cpu: %u, Out=%u\n",
+ (event == SWITCH_ENTER ? "Before" : "After"), cpu, cluster);
+
+ if (cpu != 0)
+ return 0;
+
+ switch (event) {
+ case SWITCH_ENTER:
+ if (!sleep_ready()) {
+ ctx->mcp->flags.sleep_mode.SleepReq = REQ_TO_SLEEP;
+ _nsiq();
+ /* By this time we should be ready for sleep or we are
+ * in the middle of something important */
+ if (!sleep_ready()) {
+ dump_sleep_params(&mcp->flags);
+ MCDRV_DBG(mcd,
+ "MobiCore: Don't allow switch!\n");
+ ctx->mcp->flags.sleep_mode.SleepReq = 0;
+ return -EPERM;
+ }
+ }
+ break;
+ case SWITCH_EXIT:
+ ctx->mcp->flags.sleep_mode.SleepReq = 0;
+ break;
+ default:
+ MCDRV_DBG(mcd, "MobiCore: Unknown switch event!\n");
+ }
+
+ return 0;
+}
+
+static struct notifier_block switcher_nb = {
+ .notifier_call = bL_switcher_notifier_handler,
+};
+#endif
+
+int mc_pm_initialize(struct mc_context *context)
+{
+ int ret = 0;
+
+ ctx = context;
+
+ ret = register_pm_notifier(&mc_notif_block);
+ if (ret)
+ MCDRV_DBG_ERROR(mcd, "device pm register failed\n");
+#ifdef MC_BL_NOTIFIER
+ if (register_bL_swicher_notifier(&switcher_nb))
+ MCDRV_DBG_ERROR(mcd,
+ "Failed to register to bL_switcher_notifier\n");
+#endif
+
+ return ret;
+}
+
+int mc_pm_free(void)
+{
+ int ret = unregister_pm_notifier(&mc_notif_block);
+ if (ret)
+ MCDRV_DBG_ERROR(mcd, "device pm unregister failed\n");
+#ifdef MC_BL_NOTIFIER
+ ret = unregister_bL_swicher_notifier(&switcher_nb);
+ if (ret)
+ MCDRV_DBG_ERROR(mcd, "device bl unregister failed\n");
+#endif
+ return ret;
+}
+
+#endif /* MC_PM_RUNTIME */
+
+#ifdef MC_CRYPTO_CLOCK_MANAGEMENT
+
+int mc_pm_clock_initialize(void)
+{
+ int ret = 0;
+
+ /* Get core clk */
+ mc_ce_core_clk = clk_get(mcd, "core_clk");
+ if (IS_ERR(mc_ce_core_clk)) {
+ ret = PTR_ERR(mc_ce_core_clk);
+ MCDRV_DBG_ERROR(mcd, "cannot get core clock\n");
+ goto error;
+ }
+ /* Get Interface clk */
+ mc_ce_iface_clk = clk_get(mcd, "iface_clk");
+ if (IS_ERR(mc_ce_iface_clk)) {
+ clk_put(mc_ce_core_clk);
+ ret = PTR_ERR(mc_ce_iface_clk);
+ MCDRV_DBG_ERROR(mcd, "cannot get iface clock\n");
+ goto error;
+ }
+ /* Get AXI clk */
+ mc_ce_bus_clk = clk_get(mcd, "bus_clk");
+ if (IS_ERR(mc_ce_bus_clk)) {
+ clk_put(mc_ce_iface_clk);
+ clk_put(mc_ce_core_clk);
+ ret = PTR_ERR(mc_ce_bus_clk);
+ MCDRV_DBG_ERROR(mcd, "cannot get AXI bus clock\n");
+ goto error;
+ }
+ return ret;
+
+error:
+ mc_ce_core_clk = NULL;
+ mc_ce_iface_clk = NULL;
+ mc_ce_bus_clk = NULL;
+
+ return ret;
+}
+
+void mc_pm_clock_finalize(void)
+{
+ if (mc_ce_iface_clk != NULL)
+ clk_put(mc_ce_iface_clk);
+
+ if (mc_ce_core_clk != NULL)
+ clk_put(mc_ce_core_clk);
+
+ if (mc_ce_bus_clk != NULL)
+ clk_put(mc_ce_bus_clk);
+}
+
+int mc_pm_clock_enable(void)
+{
+ int rc = 0;
+
+ rc = clk_prepare_enable(mc_ce_core_clk);
+ if (rc) {
+ MCDRV_DBG_ERROR(mcd, "cannot enable clock\n");
+ } else {
+ rc = clk_prepare_enable(mc_ce_iface_clk);
+ if (rc) {
+ clk_disable_unprepare(mc_ce_core_clk);
+ MCDRV_DBG_ERROR(mcd, "cannot enable clock\n");
+ } else {
+ rc = clk_prepare_enable(mc_ce_bus_clk);
+ if (rc) {
+ clk_disable_unprepare(mc_ce_iface_clk);
+ MCDRV_DBG_ERROR(mcd, "cannot enable clock\n");
+ }
+ }
+ }
+ return rc;
+}
+
+void mc_pm_clock_disable(void)
+{
+ if (mc_ce_iface_clk != NULL)
+ clk_disable_unprepare(mc_ce_iface_clk);
+
+ if (mc_ce_core_clk != NULL)
+ clk_disable_unprepare(mc_ce_core_clk);
+
+ if (mc_ce_bus_clk != NULL)
+ clk_disable_unprepare(mc_ce_bus_clk);
+}
+
+#endif /* MC_CRYPTO_CLOCK_MANAGEMENT */
diff --git a/drivers/gud/mobicore_driver/pm.h b/drivers/gud/mobicore_driver/pm.h
index 3e73b8b..332da34 100644
--- a/drivers/gud/mobicore_driver/pm.h
+++ b/drivers/gud/mobicore_driver/pm.h
@@ -31,5 +31,13 @@
int mc_pm_initialize(struct mc_context *context);
/* Free all Power Management resources*/
int mc_pm_free(void);
+/* Initialize secure crypto clocks */
+int mc_pm_clock_initialize(void);
+/* Free secure crypto clocks */
+void mc_pm_clock_finalize(void);
+/* Enable secure crypto clocks */
+int mc_pm_clock_enable(void);
+/* Disable secure crypto clocks */
+void mc_pm_clock_disable(void);
#endif /* _MC_PM_H_ */
diff --git a/drivers/hwmon/epm_adc.c b/drivers/hwmon/epm_adc.c
index 51ffd21..a587ed2 100644
--- a/drivers/hwmon/epm_adc.c
+++ b/drivers/hwmon/epm_adc.c
@@ -937,7 +937,7 @@
return rc;
}
-static int epm_psoc_timestamp(struct epm_adc_drv *epm_adc,
+static int epm_psoc_get_timestamp(struct epm_adc_drv *epm_adc,
struct epm_psoc_system_time_stamp *psoc_timestamp)
{
struct spi_message m;
@@ -955,15 +955,51 @@
spi_message_init(&m);
spi_message_add_tail(&t, &m);
- if (psoc_timestamp->cmd == EPM_PSOC_SET_SYSTEM_TIMESTAMP_CMD) {
- tx_buf[0] = psoc_timestamp->cmd;
- tx_buf[1] = (psoc_timestamp->timestamp & 0xff000000) >> 24;
- tx_buf[2] = (psoc_timestamp->timestamp & 0xff0000) >> 16;
- tx_buf[3] = (psoc_timestamp->timestamp & 0xff00) >> 8;
- tx_buf[4] = (psoc_timestamp->timestamp & 0xff);
- } else if (psoc_timestamp->cmd == EPM_PSOC_GET_SYSTEM_TIMESTAMP_CMD) {
- tx_buf[0] = psoc_timestamp->cmd;
- }
+ psoc_timestamp->cmd = EPM_PSOC_GET_SYSTEM_TIMESTAMP_CMD;
+ tx_buf[0] = psoc_timestamp->cmd;
+
+ t.len = sizeof(tx_buf);
+ t.bits_per_word = EPM_ADC_ADS_SPI_BITS_PER_WORD;
+
+ rc = spi_sync(epm_adc->epm_spi_client, &m);
+ if (rc)
+ return rc;
+
+ rc = spi_sync(epm_adc->epm_spi_client, &m);
+ if (rc)
+ return rc;
+
+ psoc_timestamp->cmd = rx_buf[0];
+ psoc_timestamp->timestamp = rx_buf[1] << 24 | rx_buf[2] << 16 |
+ rx_buf[3] << 8 | rx_buf[4];
+
+ return rc;
+}
+
+static int epm_psoc_set_timestamp(struct epm_adc_drv *epm_adc,
+ struct epm_psoc_system_time_stamp *psoc_timestamp)
+{
+ struct spi_message m;
+ struct spi_transfer t;
+ char tx_buf[10], rx_buf[10];
+ int rc = 0;
+
+ spi_setup(epm_adc->epm_spi_client);
+
+ memset(&t, 0, sizeof t);
+ memset(tx_buf, 0, sizeof tx_buf);
+ memset(rx_buf, 0, sizeof tx_buf);
+ t.tx_buf = tx_buf;
+ t.rx_buf = rx_buf;
+ spi_message_init(&m);
+ spi_message_add_tail(&t, &m);
+
+ psoc_timestamp->cmd = EPM_PSOC_SET_SYSTEM_TIMESTAMP_CMD;
+ tx_buf[0] = psoc_timestamp->cmd;
+ tx_buf[1] = (psoc_timestamp->timestamp >> 24) & 0xff;
+ tx_buf[2] = (psoc_timestamp->timestamp >> 16) & 0xff;
+ tx_buf[3] = (psoc_timestamp->timestamp >> 8) & 0xff;
+ tx_buf[4] = (psoc_timestamp->timestamp & 0xff);
t.len = sizeof(tx_buf);
t.bits_per_word = EPM_ADC_ADS_SPI_BITS_PER_WORD;
@@ -1199,7 +1235,7 @@
if (rc)
return rc;
- rc = rx_buf[2];
+ rc = rx_buf[1];
return rc;
}
@@ -1378,6 +1414,26 @@
break;
}
case EPM_PSOC_ADC_GET_SYSTEM_TIMESTAMP:
+ {
+ struct epm_psoc_system_time_stamp psoc_timestamp;
+ int rc;
+
+ if (copy_from_user(&psoc_timestamp,
+ (void __user *)arg,
+ sizeof(struct epm_psoc_system_time_stamp)))
+ return -EFAULT;
+
+ rc = epm_psoc_get_timestamp(epm_adc, &psoc_timestamp);
+ if (rc) {
+ pr_err("PSOC get timestamp failed\n");
+ return -EINVAL;
+ }
+
+ if (copy_to_user((void __user *)arg, &psoc_timestamp,
+ sizeof(struct epm_psoc_system_time_stamp)))
+ return -EFAULT;
+ break;
+ }
case EPM_PSOC_ADC_SET_SYSTEM_TIMESTAMP:
{
struct epm_psoc_system_time_stamp psoc_timestamp;
@@ -1388,9 +1444,9 @@
sizeof(struct epm_psoc_system_time_stamp)))
return -EFAULT;
- rc = epm_psoc_timestamp(epm_adc, &psoc_timestamp);
+ rc = epm_psoc_set_timestamp(epm_adc, &psoc_timestamp);
if (rc) {
- pr_err("PSOC buffered measurement failed\n");
+ pr_err("PSOC set timestamp failed\n");
return -EINVAL;
}
diff --git a/drivers/hwmon/qpnp-adc-current.c b/drivers/hwmon/qpnp-adc-current.c
index de7b0e9..9570327 100644
--- a/drivers/hwmon/qpnp-adc-current.c
+++ b/drivers/hwmon/qpnp-adc-current.c
@@ -389,8 +389,13 @@
rc = qpnp_iadc_read_reg(QPNP_IADC_ATE_GAIN_CALIB_OFFSET,
&iadc->iadc_comp.sys_gain);
- if (rc < 0)
+ if (rc < 0) {
pr_err("full scale read failed with %d\n", rc);
+ return rc;
+ }
+
+ if (iadc->external_rsense)
+ iadc->iadc_comp.ext_rsense = true;
pr_debug("fab id = %u, revision = %u, sys gain = %u, external_rsense = %d\n",
iadc->iadc_comp.id,
diff --git a/drivers/hwmon/qpnp-adc-voltage.c b/drivers/hwmon/qpnp-adc-voltage.c
index 4306b1d..309944e 100644
--- a/drivers/hwmon/qpnp-adc-voltage.c
+++ b/drivers/hwmon/qpnp-adc-voltage.c
@@ -1164,14 +1164,14 @@
rc = qpnp_vadc_read_reg(QPNP_INT_TEST_VAL, &fab_id);
if (rc < 0) {
pr_err("qpnp adc comp id failed with %d\n", rc);
- return rc;
+ goto fail;
}
vadc->id = fab_id;
rc = qpnp_vadc_warm_rst_configure();
if (rc < 0) {
pr_err("Setting perp reset on warm reset failed %d\n", rc);
- return rc;
+ goto fail;
}
vadc->vadc_initialized = true;
diff --git a/drivers/input/misc/kxtj9.c b/drivers/input/misc/kxtj9.c
index f46139f..204ad94 100644
--- a/drivers/input/misc/kxtj9.c
+++ b/drivers/input/misc/kxtj9.c
@@ -25,8 +25,15 @@
#include <linux/slab.h>
#include <linux/input/kxtj9.h>
#include <linux/input-polldev.h>
+#include <linux/regulator/consumer.h>
-#define NAME "kxtj9"
+#ifdef CONFIG_OF
+#include <linux/of_gpio.h>
+#endif /* CONFIG_OF */
+
+#define ACCEL_INPUT_DEV_NAME "accelerometer"
+#define DEVICE_NAME "kxtj9"
+
#define G_MAX 8000
/* OUTPUT REGISTERS */
#define XOUT_L 0x06
@@ -62,6 +69,11 @@
#define RES_CTRL_REG1 1
#define RES_INT_CTRL1 2
#define RESUME_ENTRIES 3
+/* POWER SUPPLY VOLTAGE RANGE */
+#define KXTJ9_VDD_MIN_UV 2000000
+#define KXTJ9_VDD_MAX_UV 3300000
+#define KXTJ9_VIO_MIN_UV 1750000
+#define KXTJ9_VIO_MAX_UV 1950000
/*
* The following table lists the maximum appropriate poll interval for each
@@ -88,10 +100,14 @@
struct input_polled_dev *poll_dev;
#endif
unsigned int last_poll_interval;
+ bool enable;
u8 shift;
u8 ctrl_reg1;
u8 data_ctrl;
u8 int_ctrl;
+ bool power_enabled;
+ struct regulator *vdd;
+ struct regulator *vio;
};
static int kxtj9_i2c_read(struct kxtj9_data *tj9, u8 addr, u8 *data, int len)
@@ -203,12 +219,130 @@
return 0;
}
-static int kxtj9_device_power_on(struct kxtj9_data *tj9)
+static int kxtj9_power_on(struct kxtj9_data *data, bool on)
{
- if (tj9->pdata.power_on)
- return tj9->pdata.power_on();
+ int rc = 0;
+
+ if (!on && data->power_enabled) {
+ rc = regulator_disable(data->vdd);
+ if (rc) {
+ dev_err(&data->client->dev,
+ "Regulator vdd disable failed rc=%d\n", rc);
+ return rc;
+ }
+
+ rc = regulator_disable(data->vio);
+ if (rc) {
+ dev_err(&data->client->dev,
+ "Regulator vio disable failed rc=%d\n", rc);
+ regulator_enable(data->vdd);
+ }
+ data->power_enabled = false;
+ } else if (on && !data->power_enabled) {
+ rc = regulator_enable(data->vdd);
+ if (rc) {
+ dev_err(&data->client->dev,
+ "Regulator vdd enable failed rc=%d\n", rc);
+ return rc;
+ }
+
+ rc = regulator_enable(data->vio);
+ if (rc) {
+ dev_err(&data->client->dev,
+ "Regulator vio enable failed rc=%d\n", rc);
+ regulator_disable(data->vdd);
+ }
+ data->power_enabled = true;
+ } else {
+ dev_warn(&data->client->dev,
+ "Power on=%d. enabled=%d\n",
+ on, data->power_enabled);
+ }
+
+ return rc;
+}
+
+static int kxtj9_power_init(struct kxtj9_data *data, bool on)
+{
+ int rc;
+
+ if (!on) {
+ if (regulator_count_voltages(data->vdd) > 0)
+ regulator_set_voltage(data->vdd, 0, KXTJ9_VDD_MAX_UV);
+
+ regulator_put(data->vdd);
+
+ if (regulator_count_voltages(data->vio) > 0)
+ regulator_set_voltage(data->vio, 0, KXTJ9_VIO_MAX_UV);
+
+ regulator_put(data->vio);
+ } else {
+ data->vdd = regulator_get(&data->client->dev, "vdd");
+ if (IS_ERR(data->vdd)) {
+ rc = PTR_ERR(data->vdd);
+ dev_err(&data->client->dev,
+ "Regulator get failed vdd rc=%d\n", rc);
+ return rc;
+ }
+
+ if (regulator_count_voltages(data->vdd) > 0) {
+ rc = regulator_set_voltage(data->vdd, KXTJ9_VDD_MIN_UV,
+ KXTJ9_VDD_MAX_UV);
+ if (rc) {
+ dev_err(&data->client->dev,
+ "Regulator set failed vdd rc=%d\n",
+ rc);
+ goto reg_vdd_put;
+ }
+ }
+
+ data->vio = regulator_get(&data->client->dev, "vio");
+ if (IS_ERR(data->vio)) {
+ rc = PTR_ERR(data->vio);
+ dev_err(&data->client->dev,
+ "Regulator get failed vio rc=%d\n", rc);
+ goto reg_vdd_set;
+ }
+
+ if (regulator_count_voltages(data->vio) > 0) {
+ rc = regulator_set_voltage(data->vio, KXTJ9_VIO_MIN_UV,
+ KXTJ9_VIO_MAX_UV);
+ if (rc) {
+ dev_err(&data->client->dev,
+ "Regulator set failed vio rc=%d\n", rc);
+ goto reg_vio_put;
+ }
+ }
+ }
return 0;
+
+reg_vio_put:
+ regulator_put(data->vio);
+reg_vdd_set:
+ if (regulator_count_voltages(data->vdd) > 0)
+ regulator_set_voltage(data->vdd, 0, KXTJ9_VDD_MAX_UV);
+reg_vdd_put:
+ regulator_put(data->vdd);
+ return rc;
+}
+static int kxtj9_device_power_on(struct kxtj9_data *tj9)
+{
+ int err = 0;
+ if (tj9->pdata.power_on) {
+ err = tj9->pdata.power_on();
+ } else {
+ err = kxtj9_power_on(tj9, true);
+ if (err) {
+ dev_err(&tj9->client->dev, "power on failed");
+ goto err_exit;
+ }
+ msleep(20);
+ }
+
+err_exit:
+ dev_dbg(&tj9->client->dev, "soft power on complete err=%d.\n", err);
+ return err;
}
static void kxtj9_device_power_off(struct kxtj9_data *tj9)
@@ -222,6 +356,11 @@
if (tj9->pdata.power_off)
tj9->pdata.power_off();
+ else
+ kxtj9_power_on(tj9, false);
+
+ dev_dbg(&tj9->client->dev, "soft power off complete.\n");
+ return ;
}
static int kxtj9_enable(struct kxtj9_data *tj9)
@@ -269,31 +408,21 @@
}
}
+ tj9->enable = true;
return 0;
fail:
kxtj9_device_power_off(tj9);
+ tj9->enable = false;
return err;
}
static void kxtj9_disable(struct kxtj9_data *tj9)
{
kxtj9_device_power_off(tj9);
+ tj9->enable = false;
}
-static int kxtj9_input_open(struct input_dev *input)
-{
- struct kxtj9_data *tj9 = input_get_drvdata(input);
-
- return kxtj9_enable(tj9);
-}
-
-static void kxtj9_input_close(struct input_dev *dev)
-{
- struct kxtj9_data *tj9 = input_get_drvdata(dev);
-
- kxtj9_disable(tj9);
-}
static void __devinit kxtj9_init_input_device(struct kxtj9_data *tj9,
struct input_dev *input_dev)
@@ -303,7 +432,7 @@
input_set_abs_params(input_dev, ABS_Y, -G_MAX, G_MAX, FUZZ, FLAT);
input_set_abs_params(input_dev, ABS_Z, -G_MAX, G_MAX, FUZZ, FLAT);
- input_dev->name = "kxtj9_accel";
+ input_dev->name = ACCEL_INPUT_DEV_NAME;
input_dev->id.bustype = BUS_I2C;
input_dev->dev.parent = &tj9->client->dev;
}
@@ -321,8 +450,6 @@
tj9->input_dev = input_dev;
- input_dev->open = kxtj9_input_open;
- input_dev->close = kxtj9_input_close;
input_set_drvdata(input_dev, tj9);
kxtj9_init_input_device(tj9, input_dev);
@@ -339,6 +466,49 @@
return 0;
}
+static ssize_t kxtj9_enable_show(struct device *dev,
+ struct device_attribute *attr, char *buf)
+{
+ struct i2c_client *client = to_i2c_client(dev);
+ struct kxtj9_data *tj9 = i2c_get_clientdata(client);
+
+ return snprintf(buf, 4, "%d\n", tj9->enable);
+}
+
+static ssize_t kxtj9_enable_store(struct device *dev,
+ struct device_attribute *attr,
+ const char *buf, size_t count)
+{
+ struct i2c_client *client = to_i2c_client(dev);
+ struct kxtj9_data *tj9 = i2c_get_clientdata(client);
+ struct input_dev *input_dev = tj9->input_dev;
+ unsigned long data;
+ int error;
+
+ error = kstrtoul(buf, 10, &data);
+ if (error)
+ return error;
+ mutex_lock(&input_dev->mutex);
+ disable_irq(client->irq);
+
+ if (data == 0)
+ kxtj9_disable(tj9);
+ else if (data == 1)
+ kxtj9_enable(tj9);
+ else {
+ dev_err(&tj9->client->dev,
+ "Invalid value of input, input=%ld\n", data);
+ }
+
+ enable_irq(client->irq);
+ mutex_unlock(&input_dev->mutex);
+
+ return count;
+}
+
+static DEVICE_ATTR(enable, S_IRUGO|S_IWUSR|S_IWGRP,
+ kxtj9_enable_show, kxtj9_enable_store);
+
/*
* When IRQ mode is selected, we need to provide an interface to allow the user
* to change the output data rate of the part. For consistency, we are using
@@ -351,7 +521,7 @@
*/
/* Returns currently selected poll interval (in ms) */
-static ssize_t kxtj9_get_poll(struct device *dev,
+static ssize_t kxtj9_get_poll_delay(struct device *dev,
struct device_attribute *attr, char *buf)
{
struct i2c_client *client = to_i2c_client(dev);
@@ -361,8 +531,9 @@
}
/* Allow users to select a new poll interval (in ms) */
-static ssize_t kxtj9_set_poll(struct device *dev, struct device_attribute *attr,
- const char *buf, size_t count)
+static ssize_t kxtj9_set_poll_delay(struct device *dev,
+ struct device_attribute *attr,
+ const char *buf, size_t count)
{
struct i2c_client *client = to_i2c_client(dev);
struct kxtj9_data *tj9 = i2c_get_clientdata(client);
@@ -393,10 +564,12 @@
return count;
}
-static DEVICE_ATTR(poll, S_IRUGO|S_IWUSR, kxtj9_get_poll, kxtj9_set_poll);
+static DEVICE_ATTR(poll_delay, S_IRUGO|S_IWUSR|S_IWGRP,
+ kxtj9_get_poll_delay, kxtj9_set_poll_delay);
static struct attribute *kxtj9_attributes[] = {
- &dev_attr_poll.attr,
+ &dev_attr_enable.attr,
+ &dev_attr_poll_delay.attr,
NULL
};
@@ -489,27 +662,108 @@
{
int retval;
- retval = kxtj9_device_power_on(tj9);
- if (retval < 0)
- return retval;
-
retval = i2c_smbus_read_byte_data(tj9->client, WHO_AM_I);
if (retval < 0) {
dev_err(&tj9->client->dev, "read err int source\n");
goto out;
}
- retval = (retval != 0x07 && retval != 0x08) ? -EIO : 0;
+ retval = (retval != 0x05 && retval != 0x07 && retval != 0x08)
+ ? -EIO : 0;
out:
- kxtj9_device_power_off(tj9);
return retval;
}
+#ifdef CONFIG_OF
+static int kxtj9_parse_dt(struct device *dev,
+ struct kxtj9_platform_data *kxtj9_pdata)
+{
+ struct device_node *np = dev->of_node;
+ u32 temp_val;
+ int rc;
+
+ rc = of_property_read_u32(np, "kionix,min-interval", &temp_val);
+ if (rc && (rc != -EINVAL)) {
+ dev_err(dev, "Unable to read min-interval\n");
+ return rc;
+ } else {
+ kxtj9_pdata->min_interval = temp_val;
+ }
+
+ rc = of_property_read_u32(np, "kionix,init-interval", &temp_val);
+ if (rc && (rc != -EINVAL)) {
+ dev_err(dev, "Unable to read init-interval\n");
+ return rc;
+ } else {
+ kxtj9_pdata->init_interval = temp_val;
+ }
+
+ rc = of_property_read_u32(np, "kionix,axis-map-x", &temp_val);
+ if (rc && (rc != -EINVAL)) {
+ dev_err(dev, "Unable to read axis-map_x\n");
+ return rc;
+ } else {
+ kxtj9_pdata->axis_map_x = (u8)temp_val;
+ }
+
+ rc = of_property_read_u32(np, "kionix,axis-map-y", &temp_val);
+ if (rc && (rc != -EINVAL)) {
+ dev_err(dev, "Unable to read axis_map_y\n");
+ return rc;
+ } else {
+ kxtj9_pdata->axis_map_y = (u8)temp_val;
+ }
+
+ rc = of_property_read_u32(np, "kionix,axis-map-z", &temp_val);
+ if (rc && (rc != -EINVAL)) {
+ dev_err(dev, "Unable to read axis-map-z\n");
+ return rc;
+ } else {
+ kxtj9_pdata->axis_map_z = (u8)temp_val;
+ }
+
+ rc = of_property_read_u32(np, "kionix,g-range", &temp_val);
+ if (rc && (rc != -EINVAL)) {
+ dev_err(dev, "Unable to read g-range\n");
+ return rc;
+ } else {
+ switch (temp_val) {
+ case 2:
+ kxtj9_pdata->g_range = KXTJ9_G_2G;
+ break;
+ case 4:
+ kxtj9_pdata->g_range = KXTJ9_G_4G;
+ break;
+ case 8:
+ kxtj9_pdata->g_range = KXTJ9_G_8G;
+ break;
+ default:
+ kxtj9_pdata->g_range = KXTJ9_G_2G;
+ break;
+ }
+ }
+
+ kxtj9_pdata->negate_x = of_property_read_bool(np, "kionix,negate-x");
+
+ kxtj9_pdata->negate_y = of_property_read_bool(np, "kionix,negate-y");
+
+ kxtj9_pdata->negate_z = of_property_read_bool(np, "kionix,negate-z");
+
+ kxtj9_pdata->res_12bit = of_property_read_bool(np, "kionix,res-12bit");
+
+ return 0;
+}
+#else
+static int kxtj9_parse_dt(struct device *dev,
+ struct kxtj9_platform_data *kxtj9_pdata)
+{
+ return -ENODEV;
+}
+#endif /* !CONFIG_OF */
static int __devinit kxtj9_probe(struct i2c_client *client,
const struct i2c_device_id *id)
{
- const struct kxtj9_platform_data *pdata = client->dev.platform_data;
struct kxtj9_data *tj9;
int err;
@@ -519,11 +773,6 @@
return -ENXIO;
}
- if (!pdata) {
- dev_err(&client->dev, "platform data is NULL; exiting\n");
- return -EINVAL;
- }
-
tj9 = kzalloc(sizeof(*tj9), GFP_KERNEL);
if (!tj9) {
dev_err(&client->dev,
@@ -531,19 +780,49 @@
return -ENOMEM;
}
- tj9->client = client;
- tj9->pdata = *pdata;
+ if (client->dev.of_node) {
+ memset(&tj9->pdata, 0 , sizeof(tj9->pdata));
+ err = kxtj9_parse_dt(&client->dev, &tj9->pdata);
+ if (err) {
+ dev_err(&client->dev,
+ "Unable to parse platfrom data err=%d\n", err);
+ return err;
+ }
+ } else {
+ if (client->dev.platform_data)
+ tj9->pdata = *(struct kxtj9_platform_data *)
+ client->dev.platform_data;
+ else {
+ dev_err(&client->dev,
+ "platform data is NULL; exiting\n");
+ return -EINVAL;
+ }
+ }
- if (pdata->init) {
- err = pdata->init();
+ tj9->client = client;
+ tj9->power_enabled = false;
+
+ if (tj9->pdata.init) {
+ err = tj9->pdata.init();
if (err < 0)
goto err_free_mem;
}
+ err = kxtj9_power_init(tj9, true);
+ if (err < 0) {
+ dev_err(&tj9->client->dev, "power init failed! err=%d", err);
+ goto err_pdata_exit;
+ }
+
+ err = kxtj9_device_power_on(tj9);
+ if (err < 0) {
+ dev_err(&client->dev, "power on failed! err=%d\n", err);
+ goto err_power_deinit;
+ }
err = kxtj9_verify(tj9);
if (err < 0) {
dev_err(&client->dev, "device not recognized\n");
- goto err_pdata_exit;
+ goto err_power_off;
}
i2c_set_clientdata(client, tj9);
@@ -558,7 +837,7 @@
err = kxtj9_setup_input_device(tj9);
if (err)
- goto err_pdata_exit;
+ goto err_power_off;
err = request_threaded_irq(client->irq, NULL, kxtj9_isr,
IRQF_TRIGGER_RISING | IRQF_ONESHOT,
@@ -577,20 +856,28 @@
} else {
err = kxtj9_setup_polled_device(tj9);
if (err)
- goto err_pdata_exit;
+ goto err_power_off;
}
+ dev_dbg(&client->dev, "%s: kxtj9_probe OK.\n", __func__);
+ kxtj9_device_power_off(tj9);
return 0;
err_free_irq:
free_irq(client->irq, tj9);
err_destroy_input:
input_unregister_device(tj9->input_dev);
+err_power_off:
+ kxtj9_device_power_off(tj9);
+err_power_deinit:
+ kxtj9_power_init(tj9, false);
err_pdata_exit:
if (tj9->pdata.exit)
tj9->pdata.exit();
err_free_mem:
kfree(tj9);
+
+ dev_err(&client->dev, "%s: kxtj9_probe err=%d\n", __func__, err);
return err;
}
@@ -606,6 +893,9 @@
kxtj9_teardown_polled_device(tj9);
}
+ kxtj9_device_power_off(tj9);
+ kxtj9_power_init(tj9, false);
+
if (tj9->pdata.exit)
tj9->pdata.exit();
@@ -650,16 +940,23 @@
static SIMPLE_DEV_PM_OPS(kxtj9_pm_ops, kxtj9_suspend, kxtj9_resume);
static const struct i2c_device_id kxtj9_id[] = {
- { NAME, 0 },
+ { DEVICE_NAME, 0 },
{ },
};
+static struct of_device_id kxtj9_match_table[] = {
+ { .compatible = "kionix,kxtj9", },
+ { },
+};
+
+
MODULE_DEVICE_TABLE(i2c, kxtj9_id);
static struct i2c_driver kxtj9_driver = {
.driver = {
- .name = NAME,
+ .name = DEVICE_NAME,
.owner = THIS_MODULE,
+ .of_match_table = kxtj9_match_table,
.pm = &kxtj9_pm_ops,
},
.probe = kxtj9_probe,
diff --git a/drivers/input/misc/lis3dh_acc.c b/drivers/input/misc/lis3dh_acc.c
index ea1b079..03fabd0 100644
--- a/drivers/input/misc/lis3dh_acc.c
+++ b/drivers/input/misc/lis3dh_acc.c
@@ -1093,7 +1093,7 @@
static struct device_attribute attributes[] = {
- __ATTR(pollrate_ms, 0664, attr_get_polling_rate,
+ __ATTR(poll_delay, 0664, attr_get_polling_rate,
attr_set_polling_rate),
__ATTR(range, 0664, attr_get_range, attr_set_range),
__ATTR(enable, 0664, attr_get_enable, attr_set_enable),
@@ -1226,7 +1226,7 @@
acc->input_dev->open = lis3dh_acc_input_open;
acc->input_dev->close = lis3dh_acc_input_close;
- acc->input_dev->name = LIS3DH_ACC_DEV_NAME;
+ acc->input_dev->name = ACCEL_INPUT_DEV_NAME;
acc->input_dev->id.bustype = BUS_I2C;
acc->input_dev->dev.parent = &acc->client->dev;
diff --git a/drivers/input/touchscreen/atmel_mxt_ts.c b/drivers/input/touchscreen/atmel_mxt_ts.c
index 29b269a..479b788 100644
--- a/drivers/input/touchscreen/atmel_mxt_ts.c
+++ b/drivers/input/touchscreen/atmel_mxt_ts.c
@@ -2923,13 +2923,32 @@
goto err_free_mem;
}
+ if (gpio_is_valid(pdata->reset_gpio)) {
+ /* configure touchscreen reset out gpio */
+ error = gpio_request(pdata->reset_gpio, "mxt_reset_gpio");
+ if (error) {
+ dev_err(&client->dev, "unable to request gpio [%d]\n",
+ pdata->reset_gpio);
+ goto err_regulator_on;
+ }
+
+ error = gpio_direction_output(pdata->reset_gpio, 0);
+ if (error) {
+ dev_err(&client->dev,
+ "unable to set direction for gpio [%d]\n",
+ pdata->reset_gpio);
+ goto err_reset_gpio_req;
+ }
+ mxt_reset_delay(data);
+ }
+
if (pdata->power_on)
error = pdata->power_on(true);
else
error = mxt_power_on(data, true);
if (error) {
dev_err(&client->dev, "Failed to power on hardware\n");
- goto err_regulator_on;
+ goto err_reset_gpio_req;
}
if (gpio_is_valid(pdata->irq_gpio)) {
@@ -2954,20 +2973,12 @@
}
if (gpio_is_valid(pdata->reset_gpio)) {
- /* configure touchscreen reset out gpio */
- error = gpio_request(pdata->reset_gpio, "mxt_reset_gpio");
- if (error) {
- dev_err(&client->dev, "unable to request gpio [%d]\n",
- pdata->reset_gpio);
- goto err_irq_gpio_req;
- }
-
error = gpio_direction_output(pdata->reset_gpio, 1);
if (error) {
dev_err(&client->dev,
"unable to set direction for gpio [%d]\n",
pdata->reset_gpio);
- goto err_reset_gpio_req;
+ goto err_irq_gpio_req;
}
}
@@ -2982,7 +2993,7 @@
error = mxt_initialize(data);
if (error)
- goto err_reset_gpio_req;
+ goto err_irq_gpio_req;
error = request_threaded_irq(client->irq, NULL, mxt_interrupt,
pdata->irqflags, client->dev.driver->name, data);
@@ -3036,9 +3047,6 @@
free_irq(client->irq, data);
err_free_object:
kfree(data->object_table);
-err_reset_gpio_req:
- if (gpio_is_valid(pdata->reset_gpio))
- gpio_free(pdata->reset_gpio);
err_irq_gpio_req:
if (gpio_is_valid(pdata->irq_gpio))
gpio_free(pdata->irq_gpio);
@@ -3047,6 +3055,9 @@
pdata->power_on(false);
else
mxt_power_on(data, false);
+err_reset_gpio_req:
+ if (gpio_is_valid(pdata->reset_gpio))
+ gpio_free(pdata->reset_gpio);
err_regulator_on:
if (pdata->init_hw)
pdata->init_hw(false);
diff --git a/drivers/input/touchscreen/ft5x06_ts.c b/drivers/input/touchscreen/ft5x06_ts.c
index 5cbe9ab..8dbac64 100644
--- a/drivers/input/touchscreen/ft5x06_ts.c
+++ b/drivers/input/touchscreen/ft5x06_ts.c
@@ -18,6 +18,7 @@
#include <linux/i2c.h>
#include <linux/input.h>
+#include <linux/input/mt.h>
#include <linux/slab.h>
#include <linux/interrupt.h>
#include <linux/delay.h>
@@ -26,12 +27,18 @@
#include <linux/gpio.h>
#include <linux/of_gpio.h>
#include <linux/regulator/consumer.h>
+#include <linux/firmware.h>
+#include <linux/debugfs.h>
#include <linux/input/ft5x06_ts.h>
-#ifdef CONFIG_HAS_EARLYSUSPEND
+#if defined(CONFIG_FB)
+#include <linux/notifier.h>
+#include <linux/fb.h>
+
+#elif defined(CONFIG_HAS_EARLYSUSPEND)
#include <linux/earlysuspend.h>
/* Early-suspend level */
-#define FT5X06_SUSPEND_LEVEL 1
+#define FT_SUSPEND_LEVEL 1
#endif
#define CFG_MAX_TOUCH_POINTS 5
@@ -52,26 +59,126 @@
#define POINT_READ_BUF (3 + FT_TOUCH_STEP * CFG_MAX_TOUCH_POINTS)
/*register address*/
-#define FT5X06_REG_ID 0xA3
-#define FT5X06_REG_PMODE 0xA5
-#define FT5X06_REG_FW_VER 0xA6
-#define FT5X06_REG_POINT_RATE 0x88
-#define FT5X06_REG_THGROUP 0x80
+#define FT_REG_DEV_MODE 0x00
+#define FT_DEV_MODE_REG_CAL 0x02
+#define FT_REG_ID 0xA3
+#define FT_REG_PMODE 0xA5
+#define FT_REG_FW_VER 0xA6
+#define FT_REG_POINT_RATE 0x88
+#define FT_REG_THGROUP 0x80
+#define FT_REG_ECC 0xCC
+#define FT_REG_RESET_FW 0x07
/* power register bits*/
-#define FT5X06_PMODE_ACTIVE 0x00
-#define FT5X06_PMODE_MONITOR 0x01
-#define FT5X06_PMODE_STANDBY 0x02
-#define FT5X06_PMODE_HIBERNATE 0x03
+#define FT_PMODE_ACTIVE 0x00
+#define FT_PMODE_MONITOR 0x01
+#define FT_PMODE_STANDBY 0x02
+#define FT_PMODE_HIBERNATE 0x03
+#define FT_FACTORYMODE_VALUE 0x40
+#define FT_WORKMODE_VALUE 0x00
+#define FT_RST_CMD_REG 0xFC
+#define FT_READ_ID_REG 0x90
+#define FT_ERASE_APP_REG 0x61
+#define FT_ERASE_PANEL_REG 0x63
+#define FT_FW_START_REG 0xBF
-#define FT5X06_VTG_MIN_UV 2600000
-#define FT5X06_VTG_MAX_UV 3300000
-#define FT5X06_I2C_VTG_MIN_UV 1800000
-#define FT5X06_I2C_VTG_MAX_UV 1800000
-#define FT5X06_COORDS_ARR_SIZE 4
+#define FT_VTG_MIN_UV 2600000
+#define FT_VTG_MAX_UV 3300000
+#define FT_I2C_VTG_MIN_UV 1800000
+#define FT_I2C_VTG_MAX_UV 1800000
+
+#define FT_COORDS_ARR_SIZE 4
#define MAX_BUTTONS 4
+#define FT_8BIT_SHIFT 8
+#define FT_4BIT_SHIFT 4
+#define FT_FW_NAME_MAX_LEN 50
+
+#define FT5316_ID 0x0A
+#define FT5306I_ID 0x55
+
+#define FT_UPGRADE_AA 0xAA
+#define FT_UPGRADE_55 0x55
+
+/*upgrade config of FT5606*/
+#define FT5606_UPGRADE_AA_DELAY 50
+#define FT5606_UPGRADE_55_DELAY 10
+#define FT5606_UPGRADE_ID_1 0x79
+#define FT5606_UPGRADE_ID_2 0x06
+#define FT5606_UPGRADE_READID_DELAY 100
+#define FT5606_UPGRADE_EARSE_DELAY 2000
+
+/*upgrade config of FT5316*/
+#define FT5316_UPGRADE_AA_DELAY 50
+#define FT5316_UPGRADE_55_DELAY 30
+#define FT5316_UPGRADE_ID_1 0x79
+#define FT5316_UPGRADE_ID_2 0x07
+#define FT5316_UPGRADE_READID_DELAY 1
+#define FT5316_UPGRADE_EARSE_DELAY 1500
+
+/*upgrade config of FT5x06(x=2,3,4)*/
+#define FT5X06_UPGRADE_AA_DELAY 50
+#define FT5X06_UPGRADE_55_DELAY 30
+#define FT5X06_UPGRADE_ID_1 0x79
+#define FT5X06_UPGRADE_ID_2 0x03
+#define FT5X06_UPGRADE_READID_DELAY 1
+#define FT5X06_UPGRADE_EARSE_DELAY 2000
+
+/*upgrade config of FT6208*/
+#define FT6208_UPGRADE_AA_DELAY 60
+#define FT6208_UPGRADE_55_DELAY 10
+#define FT6208_UPGRADE_ID_1 0x79
+#define FT6208_UPGRADE_ID_2 0x05
+#define FT6208_UPGRADE_READID_DELAY 10
+#define FT6208_UPGRADE_EARSE_DELAY 2000
+
+#define FT_UPGRADE_INFO(x, y) do { \
+ x->delay_55 = y##_UPGRADE_55_DELAY; \
+ x->delay_aa = y##_UPGRADE_AA_DELAY; \
+ x->upgrade_id_1 = y##_UPGRADE_ID_1; \
+ x->upgrade_id_2 = y##_UPGRADE_ID_2; \
+ x->delay_readid = y##_UPGRADE_READID_DELAY; \
+ x->delay_earse_flash = y##_UPGRADE_EARSE_DELAY; \
+ } while (0)
+
+#define FT_FW_MIN_SIZE 8
+#define FT_FW_MAX_SIZE 32768
+#define FT_FW_FILE_VER(x) ((x)->data[(x)->size - 2])
+#define FT_FW_CHECK(x) \
+ (((x)->data[(x)->size - 8] ^ (x)->data[(x)->size - 6]) == 0xFF \
+ && (((x)->data[(x)->size - 7] ^ (x)->data[(x)->size - 5]) == 0xFF \
+ && (((x)->data[(x)->size - 3] ^ (x)->data[(x)->size - 4]) == 0xFF)))
+
+#define FT_MAX_TRIES 5
+#define FT_RETRY_DLY 20
+
+#define FT_MAX_WR_BUF 10
+#define FT_MAX_RD_BUF 2
+#define FT_FW_PKT_LEN 128
+#define FT_FW_PKT_META_LEN 6
+#define FT_FW_PKT_DLY_MS 20
+#define FT_FW_LAST_PKT 0x6ffa
+#define FT_EARSE_DLY_MS 100
+
+#define FT_UPGRADE_LOOP 3
+#define FT_CAL_START 0x04
+#define FT_CAL_FIN 0x00
+#define FT_CAL_STORE 0x05
+#define FT_CAL_RETRY 100
+#define FT_REG_CAL 0x00
+#define FT_CAL_MASK 0x70
+
+#define FT_INFO_MAX_LEN 200
+
+#define FT_STORE_TS_INFO(buf, id, fw_ver) \
+ snprintf(buf, FT_INFO_MAX_LEN, \
+ "controller\t= focaltech\n" \
+ "model\t\t= 0x%x\n" \
+ "fw_ver\t\t= 0x%x\n", id, fw_ver)
+
+#define FT_DEBUG_DIR_NAME "ts_debug"
+
struct ts_event {
u16 x[CFG_MAX_TOUCH_POINTS]; /*x coordinate */
u16 y[CFG_MAX_TOUCH_POINTS]; /*y coordinate */
@@ -82,6 +189,15 @@
u8 touch_point;
};
+struct upgrade_info {
+ u16 delay_aa; /*delay of write FT_UPGRADE_AA */
+ u16 delay_55; /*delay of write FT_UPGRADE_55 */
+ u8 upgrade_id_1; /*upgrade id 1 */
+ u8 upgrade_id_2; /*upgrade id 2 */
+ u16 delay_readid; /*delay of read id */
+ u16 delay_earse_flash; /*delay of earse flash*/
+};
+
struct ft5x06_ts_data {
struct i2c_client *client;
struct input_dev *input_dev;
@@ -89,7 +205,16 @@
const struct ft5x06_ts_platform_data *pdata;
struct regulator *vdd;
struct regulator *vcc_i2c;
-#ifdef CONFIG_HAS_EARLYSUSPEND
+ char fw_name[FT_FW_NAME_MAX_LEN];
+ bool loading_fw;
+ u8 family_id;
+ struct dentry *dir;
+ u16 addr;
+ bool suspended;
+ char *ts_info;
+#if defined(CONFIG_FB)
+ struct notifier_block fb_notif;
+#elif defined(CONFIG_HAS_EARLYSUSPEND)
struct early_suspend early_suspend;
#endif
};
@@ -154,6 +279,21 @@
return ret;
}
+static int ft5x0x_write_reg(struct i2c_client *client, u8 addr, const u8 val)
+{
+ u8 buf[2] = {0};
+
+ buf[0] = addr;
+ buf[1] = val;
+
+ return ft5x06_i2c_write(client, buf, sizeof(buf));
+}
+
+static int ft5x0x_read_reg(struct i2c_client *client, u8 addr, u8 *val)
+{
+ return ft5x06_i2c_read(client, &addr, 1, val, 1);
+}
+
static void ft5x06_report_value(struct ft5x06_ts_data *data)
{
struct ts_event *event = &data->event;
@@ -168,17 +308,22 @@
event->pressure = 0;
}
- input_report_abs(data->input_dev, ABS_MT_POSITION_X,
- event->x[i]);
- input_report_abs(data->input_dev, ABS_MT_POSITION_Y,
- event->y[i]);
- input_report_abs(data->input_dev, ABS_MT_PRESSURE,
- event->pressure);
- input_report_abs(data->input_dev, ABS_MT_TRACKING_ID,
- event->finger_id[i]);
- input_report_abs(data->input_dev, ABS_MT_TOUCH_MAJOR,
- event->pressure);
- input_mt_sync(data->input_dev);
+ input_mt_slot(data->input_dev, i);
+ input_mt_report_slot_state(data->input_dev, MT_TOOL_FINGER,
+ !!event->pressure);
+
+ if (event->pressure == FT_PRESS) {
+ input_report_abs(data->input_dev, ABS_MT_POSITION_X,
+ event->x[i]);
+ input_report_abs(data->input_dev, ABS_MT_POSITION_Y,
+ event->y[i]);
+ input_report_abs(data->input_dev, ABS_MT_PRESSURE,
+ event->pressure);
+ input_report_abs(data->input_dev, ABS_MT_TRACKING_ID,
+ event->finger_id[i]);
+ input_report_abs(data->input_dev, ABS_MT_TOUCH_MAJOR,
+ event->pressure);
+ }
}
input_report_key(data->input_dev, BTN_TOUCH, !!fingerdown);
@@ -293,8 +438,8 @@
}
if (regulator_count_voltages(data->vdd) > 0) {
- rc = regulator_set_voltage(data->vdd, FT5X06_VTG_MIN_UV,
- FT5X06_VTG_MAX_UV);
+ rc = regulator_set_voltage(data->vdd, FT_VTG_MIN_UV,
+ FT_VTG_MAX_UV);
if (rc) {
dev_err(&data->client->dev,
"Regulator set_vtg failed vdd rc=%d\n", rc);
@@ -311,8 +456,8 @@
}
if (regulator_count_voltages(data->vcc_i2c) > 0) {
- rc = regulator_set_voltage(data->vcc_i2c, FT5X06_I2C_VTG_MIN_UV,
- FT5X06_I2C_VTG_MAX_UV);
+ rc = regulator_set_voltage(data->vcc_i2c, FT_I2C_VTG_MIN_UV,
+ FT_I2C_VTG_MAX_UV);
if (rc) {
dev_err(&data->client->dev,
"Regulator set_vtg failed vcc_i2c rc=%d\n", rc);
@@ -326,19 +471,19 @@
regulator_put(data->vcc_i2c);
reg_vdd_set_vtg:
if (regulator_count_voltages(data->vdd) > 0)
- regulator_set_voltage(data->vdd, 0, FT5X06_VTG_MAX_UV);
+ regulator_set_voltage(data->vdd, 0, FT_VTG_MAX_UV);
reg_vdd_put:
regulator_put(data->vdd);
return rc;
pwr_deinit:
if (regulator_count_voltages(data->vdd) > 0)
- regulator_set_voltage(data->vdd, 0, FT5X06_VTG_MAX_UV);
+ regulator_set_voltage(data->vdd, 0, FT_VTG_MAX_UV);
regulator_put(data->vdd);
if (regulator_count_voltages(data->vcc_i2c) > 0)
- regulator_set_voltage(data->vcc_i2c, 0, FT5X06_I2C_VTG_MAX_UV);
+ regulator_set_voltage(data->vcc_i2c, 0, FT_I2C_VTG_MAX_UV);
regulator_put(data->vcc_i2c);
return 0;
@@ -350,14 +495,26 @@
struct ft5x06_ts_data *data = dev_get_drvdata(dev);
char txbuf[2];
+ if (data->loading_fw) {
+ dev_info(dev, "Firmware loading in process...\n");
+ return 0;
+ }
+
+ if (data->suspended) {
+ dev_info(dev, "Already in suspend state\n");
+ return 0;
+ }
+
disable_irq(data->client->irq);
if (gpio_is_valid(data->pdata->reset_gpio)) {
- txbuf[0] = FT5X06_REG_PMODE;
- txbuf[1] = FT5X06_PMODE_HIBERNATE;
+ txbuf[0] = FT_REG_PMODE;
+ txbuf[1] = FT_PMODE_HIBERNATE;
ft5x06_i2c_write(data->client, txbuf, sizeof(txbuf));
}
+ data->suspended = true;
+
return 0;
}
@@ -365,6 +522,11 @@
{
struct ft5x06_ts_data *data = dev_get_drvdata(dev);
+ if (!data->suspended) {
+ dev_info(dev, "Already in awake state\n");
+ return 0;
+ }
+
if (gpio_is_valid(data->pdata->reset_gpio)) {
gpio_set_value_cansleep(data->pdata->reset_gpio, 0);
msleep(FT_RESET_DLY);
@@ -372,10 +534,32 @@
}
enable_irq(data->client->irq);
+ data->suspended = false;
+
return 0;
}
-#ifdef CONFIG_HAS_EARLYSUSPEND
+#if defined(CONFIG_FB)
+static int fb_notifier_callback(struct notifier_block *self,
+ unsigned long event, void *data)
+{
+ struct fb_event *evdata = data;
+ int *blank;
+ struct ft5x06_ts_data *ft5x06_data =
+ container_of(self, struct ft5x06_ts_data, fb_notif);
+
+ if (evdata && evdata->data && event == FB_EVENT_BLANK &&
+ ft5x06_data && ft5x06_data->client) {
+ blank = evdata->data;
+ if (*blank == FB_BLANK_UNBLANK)
+ ft5x06_ts_resume(&ft5x06_data->client->dev);
+ else if (*blank == FB_BLANK_POWERDOWN)
+ ft5x06_ts_suspend(&ft5x06_data->client->dev);
+ }
+
+ return 0;
+}
+#elif defined(CONFIG_HAS_EARLYSUSPEND)
static void ft5x06_ts_early_suspend(struct early_suspend *handler)
{
struct ft5x06_ts_data *data = container_of(handler,
@@ -396,18 +580,483 @@
#endif
static const struct dev_pm_ops ft5x06_ts_pm_ops = {
-#ifndef CONFIG_HAS_EARLYSUSPEND
+#if (!defined(CONFIG_FB) && !defined(CONFIG_HAS_EARLYSUSPEND))
.suspend = ft5x06_ts_suspend,
.resume = ft5x06_ts_resume,
#endif
};
#endif
+static int ft5x06_auto_cal(struct i2c_client *client)
+{
+ u8 temp = 0, i;
+
+ /* set to factory mode */
+ msleep(2 * FT_STARTUP_DLY);
+ ft5x0x_write_reg(client, FT_REG_DEV_MODE, FT_FACTORYMODE_VALUE);
+ msleep(FT_STARTUP_DLY);
+
+ /* start calibration */
+ ft5x0x_write_reg(client, FT_DEV_MODE_REG_CAL, FT_CAL_START);
+ msleep(2 * FT_STARTUP_DLY);
+ for (i = 0; i < FT_CAL_RETRY; i++) {
+ ft5x0x_read_reg(client, FT_REG_CAL, &temp);
+ /*return to normal mode, calibration finish */
+ if (((temp & FT_CAL_MASK) >> FT_4BIT_SHIFT) == FT_CAL_FIN)
+ break;
+ }
+
+ /*calibration OK */
+ msleep(2 * FT_STARTUP_DLY);
+ ft5x0x_write_reg(client, FT_REG_DEV_MODE, FT_FACTORYMODE_VALUE);
+ msleep(FT_STARTUP_DLY);
+
+ /* store calibration data */
+ ft5x0x_write_reg(client, FT_DEV_MODE_REG_CAL, FT_CAL_STORE);
+ msleep(2 * FT_STARTUP_DLY);
+
+ /* set to normal mode */
+ ft5x0x_write_reg(client, FT_REG_DEV_MODE, FT_WORKMODE_VALUE);
+ msleep(2 * FT_STARTUP_DLY);
+
+ return 0;
+}
+
+static int ft5x06_get_upgrade_info(u8 family_id, struct upgrade_info *info)
+{
+ switch (family_id) {
+ case FT5306I_ID:
+ FT_UPGRADE_INFO(info, FT5X06);
+ break;
+ case FT5316_ID:
+ FT_UPGRADE_INFO(info, FT5316);
+ break;
+ default:
+ return -EINVAL;
+ }
+
+ return 0;
+}
+
+static int ft5x06_fw_upgrade_start(struct i2c_client *client,
+ const u8 *data, u32 data_len)
+{
+ struct ft5x06_ts_data *ts_data = i2c_get_clientdata(client);
+ struct upgrade_info info;
+ u8 w_buf[FT_MAX_WR_BUF] = {0}, r_buf[FT_MAX_RD_BUF] = {0};
+ u8 pkt_buf[FT_FW_PKT_LEN + FT_FW_PKT_META_LEN];
+ int rc, i, j, temp;
+ u32 pkt_num, pkt_len;
+ u8 fw_ecc;
+
+ rc = ft5x06_get_upgrade_info(ts_data->family_id, &info);
+ if (rc < 0) {
+ dev_err(&client->dev, "Cannot get upgrade information!\n");
+ return -EINVAL;
+ }
+
+ for (i = 0; i < FT_UPGRADE_LOOP; i++) {
+ /* reset - write 0xaa and 0x55 to register 0xfc */
+ ft5x0x_write_reg(client, FT_RST_CMD_REG, FT_UPGRADE_AA);
+ msleep(info.delay_aa);
+
+ ft5x0x_write_reg(client, FT_RST_CMD_REG, FT_UPGRADE_55);
+ msleep(info.delay_55);
+
+ /* Enter upgrade mode */
+ w_buf[0] = FT_UPGRADE_55;
+ w_buf[1] = FT_UPGRADE_AA;
+ do {
+ i++;
+ rc = ft5x06_i2c_write(client, w_buf, 2);
+ msleep(FT_RETRY_DLY);
+ } while (rc <= 0 && i < FT_MAX_TRIES);
+
+ /* check READ_ID */
+ msleep(info.delay_readid);
+ w_buf[0] = FT_READ_ID_REG;
+ w_buf[1] = 0x00;
+ w_buf[2] = 0x00;
+ w_buf[3] = 0x00;
+
+ ft5x06_i2c_read(client, w_buf, 4, r_buf, 2);
+
+ if (r_buf[0] != info.upgrade_id_1
+ || r_buf[1] != info.upgrade_id_2) {
+ dev_err(&client->dev, "Upgrade ID mismatch(%d)\n", i);
+ } else
+ break;
+ }
+
+ if (i >= FT_UPGRADE_LOOP) {
+ dev_err(&client->dev, "Abort upgrade\n");
+ return -EIO;
+ }
+
+ /* erase app and panel paramenter area */
+ w_buf[0] = FT_ERASE_APP_REG;
+ ft5x06_i2c_write(client, w_buf, 1);
+ msleep(info.delay_earse_flash);
+
+ w_buf[0] = FT_ERASE_PANEL_REG;
+ ft5x06_i2c_write(client, w_buf, 1);
+ msleep(FT_EARSE_DLY_MS);
+
+ /* program firmware */
+ data_len = data_len - 8;
+ pkt_num = (data_len) / FT_FW_PKT_LEN;
+ pkt_len = FT_FW_PKT_LEN;
+ pkt_buf[0] = FT_FW_START_REG;
+ pkt_buf[1] = 0x00;
+ fw_ecc = 0;
+
+ for (i = 0; i < pkt_num; i++) {
+ temp = i * FT_FW_PKT_LEN;
+ pkt_buf[2] = (u8) (temp >> FT_8BIT_SHIFT);
+ pkt_buf[3] = (u8) temp;
+ pkt_buf[4] = (u8) (pkt_len >> FT_8BIT_SHIFT);
+ pkt_buf[5] = (u8) pkt_len;
+
+ for (j = 0; j < FT_FW_PKT_LEN; j++) {
+ pkt_buf[6 + j] = data[i * FT_FW_PKT_LEN + j];
+ fw_ecc ^= pkt_buf[6 + j];
+ }
+
+ ft5x06_i2c_write(client, pkt_buf,
+ FT_FW_PKT_LEN + FT_FW_PKT_META_LEN);
+ msleep(FT_FW_PKT_DLY_MS);
+ }
+
+ /* send remaining bytes */
+ if ((data_len) % FT_FW_PKT_LEN > 0) {
+ temp = pkt_num * FT_FW_PKT_LEN;
+ pkt_buf[2] = (u8) (temp >> FT_8BIT_SHIFT);
+ pkt_buf[3] = (u8) temp;
+ temp = (data_len) % FT_FW_PKT_LEN;
+ pkt_buf[4] = (u8) (temp >> FT_8BIT_SHIFT);
+ pkt_buf[5] = (u8) temp;
+
+ for (i = 0; i < temp; i++) {
+ pkt_buf[6 + i] = data[pkt_num * FT_FW_PKT_LEN + i];
+ fw_ecc ^= pkt_buf[6 + i];
+ }
+
+ ft5x06_i2c_write(client, pkt_buf, temp + FT_FW_PKT_META_LEN);
+ msleep(FT_FW_PKT_DLY_MS);
+ }
+
+ /* send the finishing packet */
+ for (i = 0; i < 6; i++) {
+ temp = FT_FW_LAST_PKT + i;
+ pkt_buf[2] = (u8) (temp >> 8);
+ pkt_buf[3] = (u8) temp;
+ temp = 1;
+ pkt_buf[4] = (u8) (temp >> 8);
+ pkt_buf[5] = (u8) temp;
+ pkt_buf[6] = data[data_len + i];
+ fw_ecc ^= pkt_buf[6];
+ ft5x06_i2c_write(client, pkt_buf, temp + FT_FW_PKT_META_LEN);
+ msleep(FT_FW_PKT_DLY_MS);
+ }
+
+ /* verify checksum */
+ w_buf[0] = FT_REG_ECC;
+ ft5x06_i2c_read(client, w_buf, 1, r_buf, 1);
+ if (r_buf[0] != fw_ecc) {
+ dev_err(&client->dev, "ECC error! dev_ecc=%02x fw_ecc=%02x\n",
+ r_buf[0], fw_ecc);
+ return -EIO;
+ }
+
+ /* reset */
+ w_buf[0] = FT_REG_RESET_FW;
+ ft5x06_i2c_write(client, w_buf, 1);
+ msleep(FT_STARTUP_DLY);
+
+ return 0;
+}
+
+static int ft5x06_fw_upgrade(struct device *dev, bool force)
+{
+ struct ft5x06_ts_data *data = dev_get_drvdata(dev);
+ const struct firmware *fw = NULL;
+ int rc;
+ u8 val = 0;
+
+ rc = request_firmware(&fw, data->fw_name, dev);
+ if (rc < 0) {
+ dev_err(dev, "Request firmware failed - %s (%d)\n",
+ data->fw_name, rc);
+ return rc;
+ }
+
+ if (fw->size < FT_FW_MIN_SIZE || fw->size > FT_FW_MAX_SIZE) {
+ dev_err(dev, "Invalid firmware size (%d)\n", fw->size);
+ rc = -EIO;
+ goto rel_fw;
+ }
+
+ /* check firmware version */
+ rc = ft5x0x_read_reg(data->client, FT_REG_FW_VER, &val);
+ if (rc < 0) {
+ dev_err(dev, "Get firmware version failed\n");
+ goto rel_fw;
+ }
+
+ if (val == FT_FW_FILE_VER(fw) && !force) {
+ dev_err(dev, "No need to update (0x%x)\n", val);
+ rc = -EFAULT;
+ goto rel_fw;
+ }
+
+ dev_info(dev, "upgrade to fw ver 0x%x from 0x%x\n",
+ FT_FW_FILE_VER(fw), val);
+
+ /* start firmware upgrade */
+ if (FT_FW_CHECK(fw)) {
+ rc = ft5x06_fw_upgrade_start(data->client, fw->data, fw->size);
+ if (rc < 0)
+ dev_err(dev, "update failed (%d)\n", rc);
+ else
+ ft5x06_auto_cal(data->client);
+ } else {
+ dev_err(dev, "FW format error\n");
+ rc = -EIO;
+ }
+
+ FT_STORE_TS_INFO(data->ts_info, data->family_id, FT_FW_FILE_VER(fw));
+rel_fw:
+ release_firmware(fw);
+ return rc;
+}
+
+static ssize_t ft5x06_update_fw_show(struct device *dev,
+ struct device_attribute *attr, char *buf)
+{
+ struct ft5x06_ts_data *data = dev_get_drvdata(dev);
+ return snprintf(buf, 2, "%d\n", data->loading_fw);
+}
+
+static ssize_t ft5x06_update_fw_store(struct device *dev,
+ struct device_attribute *attr,
+ const char *buf, size_t size)
+{
+ struct ft5x06_ts_data *data = dev_get_drvdata(dev);
+ unsigned long val;
+ int rc;
+
+ if (size > 2)
+ return -EINVAL;
+
+ rc = kstrtoul(buf, 10, &val);
+ if (rc != 0)
+ return rc;
+
+ mutex_lock(&data->input_dev->mutex);
+ if (!data->loading_fw && val) {
+ data->loading_fw = true;
+ ft5x06_fw_upgrade(dev, false);
+ data->loading_fw = false;
+ }
+ mutex_unlock(&data->input_dev->mutex);
+
+ return size;
+}
+
+static DEVICE_ATTR(update_fw, 0664, ft5x06_update_fw_show,
+ ft5x06_update_fw_store);
+
+static ssize_t ft5x06_force_update_fw_store(struct device *dev,
+ struct device_attribute *attr,
+ const char *buf, size_t size)
+{
+ struct ft5x06_ts_data *data = dev_get_drvdata(dev);
+ unsigned long val;
+ int rc;
+
+ if (size > 2)
+ return -EINVAL;
+
+ rc = kstrtoul(buf, 10, &val);
+ if (rc != 0)
+ return rc;
+
+ mutex_lock(&data->input_dev->mutex);
+ if (!data->loading_fw && val) {
+ data->loading_fw = true;
+ ft5x06_fw_upgrade(dev, true);
+ data->loading_fw = false;
+ }
+ mutex_unlock(&data->input_dev->mutex);
+
+ return size;
+}
+
+static DEVICE_ATTR(force_update_fw, 0664, ft5x06_update_fw_show,
+ ft5x06_force_update_fw_store);
+
+static ssize_t ft5x06_fw_name_show(struct device *dev,
+ struct device_attribute *attr, char *buf)
+{
+ struct ft5x06_ts_data *data = dev_get_drvdata(dev);
+ return snprintf(buf, FT_FW_NAME_MAX_LEN - 1, "%s\n", data->fw_name);
+}
+
+static ssize_t ft5x06_fw_name_store(struct device *dev,
+ struct device_attribute *attr,
+ const char *buf, size_t size)
+{
+ struct ft5x06_ts_data *data = dev_get_drvdata(dev);
+
+ if (size > FT_FW_NAME_MAX_LEN - 1)
+ return -EINVAL;
+
+ strlcpy(data->fw_name, buf, size);
+ if (data->fw_name[size-1] == '\n')
+ data->fw_name[size-1] = 0;
+
+ return size;
+}
+
+static DEVICE_ATTR(fw_name, 0664, ft5x06_fw_name_show, ft5x06_fw_name_store);
+
+static bool ft5x06_debug_addr_is_valid(int addr)
+{
+ if (addr < 0 || addr > 0xFF) {
+ pr_err("FT reg address is invalid: 0x%x\n", addr);
+ return false;
+ }
+
+ return true;
+}
+
+static int ft5x06_debug_data_set(void *_data, u64 val)
+{
+ struct ft5x06_ts_data *data = _data;
+
+ mutex_lock(&data->input_dev->mutex);
+
+ if (ft5x06_debug_addr_is_valid(data->addr))
+ dev_info(&data->client->dev,
+ "Writing into FT registers not supported\n");
+
+ mutex_unlock(&data->input_dev->mutex);
+
+ return 0;
+}
+
+static int ft5x06_debug_data_get(void *_data, u64 *val)
+{
+ struct ft5x06_ts_data *data = _data;
+ int rc;
+ u8 reg;
+
+ mutex_lock(&data->input_dev->mutex);
+
+ if (ft5x06_debug_addr_is_valid(data->addr)) {
+ rc = ft5x0x_read_reg(data->client, data->addr, ®);
+ if (rc < 0)
+ dev_err(&data->client->dev,
+ "FT read register 0x%x failed (%d)\n",
+ data->addr, rc);
+ else
+ *val = reg;
+ }
+
+ mutex_unlock(&data->input_dev->mutex);
+
+ return 0;
+}
+
+DEFINE_SIMPLE_ATTRIBUTE(debug_data_fops, ft5x06_debug_data_get,
+ ft5x06_debug_data_set, "0x%02llX\n");
+
+static int ft5x06_debug_addr_set(void *_data, u64 val)
+{
+ struct ft5x06_ts_data *data = _data;
+
+ if (ft5x06_debug_addr_is_valid(val)) {
+ mutex_lock(&data->input_dev->mutex);
+ data->addr = val;
+ mutex_unlock(&data->input_dev->mutex);
+ }
+
+ return 0;
+}
+
+static int ft5x06_debug_addr_get(void *_data, u64 *val)
+{
+ struct ft5x06_ts_data *data = _data;
+
+ mutex_lock(&data->input_dev->mutex);
+
+ if (ft5x06_debug_addr_is_valid(data->addr))
+ *val = data->addr;
+
+ mutex_unlock(&data->input_dev->mutex);
+
+ return 0;
+}
+
+DEFINE_SIMPLE_ATTRIBUTE(debug_addr_fops, ft5x06_debug_addr_get,
+ ft5x06_debug_addr_set, "0x%02llX\n");
+
+static int ft5x06_debug_suspend_set(void *_data, u64 val)
+{
+ struct ft5x06_ts_data *data = _data;
+
+ mutex_lock(&data->input_dev->mutex);
+
+ if (val)
+ ft5x06_ts_suspend(&data->client->dev);
+ else
+ ft5x06_ts_resume(&data->client->dev);
+
+ mutex_unlock(&data->input_dev->mutex);
+
+ return 0;
+}
+
+static int ft5x06_debug_suspend_get(void *_data, u64 *val)
+{
+ struct ft5x06_ts_data *data = _data;
+
+ mutex_lock(&data->input_dev->mutex);
+ *val = data->suspended;
+ mutex_unlock(&data->input_dev->mutex);
+
+ return 0;
+}
+
+DEFINE_SIMPLE_ATTRIBUTE(debug_suspend_fops, ft5x06_debug_suspend_get,
+ ft5x06_debug_suspend_set, "%lld\n");
+
+static int ft5x06_debug_dump_info(struct seq_file *m, void *v)
+{
+ struct ft5x06_ts_data *data = m->private;
+
+ seq_printf(m, "%s\n", data->ts_info);
+
+ return 0;
+}
+
+static int debugfs_dump_info_open(struct inode *inode, struct file *file)
+{
+ return single_open(file, ft5x06_debug_dump_info, inode->i_private);
+}
+
+static const struct file_operations debug_dump_info_fops = {
+ .owner = THIS_MODULE,
+ .open = debugfs_dump_info_open,
+ .read = seq_read,
+ .release = single_release,
+};
+
#ifdef CONFIG_OF
static int ft5x06_get_dt_coords(struct device *dev, char *name,
struct ft5x06_ts_platform_data *pdata)
{
- u32 coords[FT5X06_COORDS_ARR_SIZE];
+ u32 coords[FT_COORDS_ARR_SIZE];
struct property *prop;
struct device_node *np = dev->of_node;
int coords_size, rc;
@@ -419,7 +1068,7 @@
return -ENODATA;
coords_size = prop->length / sizeof(u32);
- if (coords_size != FT5X06_COORDS_ARR_SIZE) {
+ if (coords_size != FT_COORDS_ARR_SIZE) {
dev_err(dev, "invalid %s\n", name);
return -EINVAL;
}
@@ -451,7 +1100,7 @@
static int ft5x06_parse_dt(struct device *dev,
struct ft5x06_ts_platform_data *pdata)
{
- int rc, i;
+ int rc;
struct device_node *np = dev->of_node;
struct property *prop;
u32 temp_val, num_buttons;
@@ -518,6 +1167,7 @@
struct ft5x06_ts_platform_data *pdata;
struct ft5x06_ts_data *data;
struct input_dev *input_dev;
+ struct dentry *temp;
u8 reg_value;
u8 reg_addr;
int err;
@@ -575,12 +1225,11 @@
__set_bit(BTN_TOUCH, input_dev->keybit);
__set_bit(INPUT_PROP_DIRECT, input_dev->propbit);
+ input_mt_init_slots(input_dev, CFG_MAX_TOUCH_POINTS);
input_set_abs_params(input_dev, ABS_MT_POSITION_X, pdata->x_min,
pdata->x_max, 0, 0);
input_set_abs_params(input_dev, ABS_MT_POSITION_Y, pdata->y_min,
pdata->y_max, 0, 0);
- input_set_abs_params(input_dev, ABS_MT_TRACKING_ID, 0,
- CFG_MAX_TOUCH_POINTS, 0, 0);
input_set_abs_params(input_dev, ABS_MT_TOUCH_MAJOR, 0, FT_PRESS, 0, 0);
input_set_abs_params(input_dev, ABS_MT_PRESSURE, 0, FT_PRESS, 0, 0);
@@ -653,37 +1302,21 @@
msleep(FT_STARTUP_DLY);
/* check the controller id */
- reg_addr = FT5X06_REG_ID;
+ reg_addr = FT_REG_ID;
err = ft5x06_i2c_read(client, ®_addr, 1, ®_value, 1);
if (err < 0) {
dev_err(&client->dev, "version read failed");
return err;
}
+ dev_info(&client->dev, "Device ID = 0x%x\n", reg_value);
+
if (pdata->family_id != reg_value) {
dev_err(&client->dev, "%s:Unsupported controller\n", __func__);
goto free_reset_gpio;
}
- /*get some register information */
- reg_addr = FT5X06_REG_FW_VER;
- err = ft5x06_i2c_read(client, ®_addr, 1, ®_value, 1);
- if (err)
- dev_err(&client->dev, "version read failed");
-
- dev_info(&client->dev, "[FTS] Firmware version = 0x%x\n", reg_value);
-
- reg_addr = FT5X06_REG_POINT_RATE;
- ft5x06_i2c_read(client, ®_addr, 1, ®_value, 1);
- if (err)
- dev_err(&client->dev, "report rate read failed");
- dev_info(&client->dev, "[FTS] report rate is %dHz.\n", reg_value * 10);
-
- reg_addr = FT5X06_REG_THGROUP;
- err = ft5x06_i2c_read(client, ®_addr, 1, ®_value, 1);
- if (err)
- dev_err(&client->dev, "threshold read failed");
- dev_dbg(&client->dev, "[FTS] touch threshold is %d.\n", reg_value * 4);
+ data->family_id = reg_value;
err = request_threaded_irq(client->irq, NULL,
ft5x06_ts_interrupt, pdata->irqflags,
@@ -693,9 +1326,104 @@
goto free_reset_gpio;
}
-#ifdef CONFIG_HAS_EARLYSUSPEND
+ err = device_create_file(&client->dev, &dev_attr_fw_name);
+ if (err) {
+ dev_err(&client->dev, "sys file creation failed\n");
+ goto irq_free;
+ }
+
+ err = device_create_file(&client->dev, &dev_attr_update_fw);
+ if (err) {
+ dev_err(&client->dev, "sys file creation failed\n");
+ goto free_fw_name_sys;
+ }
+
+ err = device_create_file(&client->dev, &dev_attr_force_update_fw);
+ if (err) {
+ dev_err(&client->dev, "sys file creation failed\n");
+ goto free_update_fw_sys;
+ }
+
+ data->dir = debugfs_create_dir(FT_DEBUG_DIR_NAME, NULL);
+ if (data->dir == NULL || IS_ERR(data->dir)) {
+ pr_err("debugfs_create_dir failed(%ld)\n", PTR_ERR(data->dir));
+ err = PTR_ERR(data->dir);
+ goto free_force_update_fw_sys;
+ }
+
+ temp = debugfs_create_file("addr", S_IRUSR | S_IWUSR, data->dir, data,
+ &debug_addr_fops);
+ if (temp == NULL || IS_ERR(temp)) {
+ pr_err("debugfs_create_file failed: rc=%ld\n", PTR_ERR(temp));
+ err = PTR_ERR(temp);
+ goto free_debug_dir;
+ }
+
+ temp = debugfs_create_file("data", S_IRUSR | S_IWUSR, data->dir, data,
+ &debug_data_fops);
+ if (temp == NULL || IS_ERR(temp)) {
+ pr_err("debugfs_create_file failed: rc=%ld\n", PTR_ERR(temp));
+ err = PTR_ERR(temp);
+ goto free_debug_dir;
+ }
+
+ temp = debugfs_create_file("suspend", S_IRUSR | S_IWUSR, data->dir,
+ data, &debug_suspend_fops);
+ if (temp == NULL || IS_ERR(temp)) {
+ pr_err("debugfs_create_file failed: rc=%ld\n", PTR_ERR(temp));
+ err = PTR_ERR(temp);
+ goto free_debug_dir;
+ }
+
+ temp = debugfs_create_file("dump_info", S_IRUSR | S_IWUSR, data->dir,
+ data, &debug_dump_info_fops);
+ if (temp == NULL || IS_ERR(temp)) {
+ pr_err("debugfs_create_file failed: rc=%ld\n", PTR_ERR(temp));
+ err = PTR_ERR(temp);
+ goto free_debug_dir;
+ }
+
+ data->ts_info = kzalloc(FT_INFO_MAX_LEN, GFP_KERNEL);
+ if (!data->ts_info) {
+ dev_err(&client->dev, "Not enough memory\n");
+ goto free_debug_dir;
+ }
+
+ /*get some register information */
+ reg_addr = FT_REG_POINT_RATE;
+ ft5x06_i2c_read(client, ®_addr, 1, ®_value, 1);
+ if (err < 0)
+ dev_err(&client->dev, "report rate read failed");
+
+ dev_info(&client->dev, "report rate = %dHz\n", reg_value * 10);
+
+ reg_addr = FT_REG_THGROUP;
+ err = ft5x06_i2c_read(client, ®_addr, 1, ®_value, 1);
+ if (err < 0)
+ dev_err(&client->dev, "threshold read failed");
+
+ dev_dbg(&client->dev, "touch threshold = %d\n", reg_value * 4);
+
+ reg_addr = FT_REG_FW_VER;
+ err = ft5x06_i2c_read(client, ®_addr, 1, ®_value, 1);
+ if (err < 0)
+ dev_err(&client->dev, "version read failed");
+
+ dev_info(&client->dev, "Firmware version = 0x%x\n", reg_value);
+
+ FT_STORE_TS_INFO(data->ts_info, data->family_id, reg_value);
+
+#if defined(CONFIG_FB)
+ data->fb_notif.notifier_call = fb_notifier_callback;
+
+ err = fb_register_client(&data->fb_notif);
+
+ if (err)
+ dev_err(&client->dev, "Unable to register fb_notifier: %d\n",
+ err);
+#elif defined(CONFIG_HAS_EARLYSUSPEND)
data->early_suspend.level = EARLY_SUSPEND_LEVEL_BLANK_SCREEN +
- FT5X06_SUSPEND_LEVEL;
+ FT_SUSPEND_LEVEL;
data->early_suspend.suspend = ft5x06_ts_early_suspend;
data->early_suspend.resume = ft5x06_ts_late_resume;
register_early_suspend(&data->early_suspend);
@@ -703,12 +1431,22 @@
return 0;
+free_debug_dir:
+ debugfs_remove_recursive(data->dir);
+free_force_update_fw_sys:
+ device_remove_file(&client->dev, &dev_attr_force_update_fw);
+free_update_fw_sys:
+ device_remove_file(&client->dev, &dev_attr_update_fw);
+free_fw_name_sys:
+ device_remove_file(&client->dev, &dev_attr_fw_name);
+irq_free:
+ free_irq(client->irq, data);
free_reset_gpio:
if (gpio_is_valid(pdata->reset_gpio))
gpio_free(pdata->reset_gpio);
free_irq_gpio:
if (gpio_is_valid(pdata->irq_gpio))
- gpio_free(pdata->reset_gpio);
+ gpio_free(pdata->irq_gpio);
pwr_off:
if (pdata->power_on)
pdata->power_on(false);
@@ -733,7 +1471,15 @@
{
struct ft5x06_ts_data *data = i2c_get_clientdata(client);
-#ifdef CONFIG_HAS_EARLYSUSPEND
+ debugfs_remove_recursive(data->dir);
+ device_remove_file(&client->dev, &dev_attr_force_update_fw);
+ device_remove_file(&client->dev, &dev_attr_update_fw);
+ device_remove_file(&client->dev, &dev_attr_fw_name);
+
+#if defined(CONFIG_FB)
+ if (fb_unregister_client(&data->fb_notif))
+ dev_err(&client->dev, "Error occurred while unregistering fb_notifier.\n");
+#elif defined(CONFIG_HAS_EARLYSUSPEND)
unregister_early_suspend(&data->early_suspend);
#endif
free_irq(client->irq, data);
@@ -742,7 +1488,7 @@
gpio_free(data->pdata->reset_gpio);
if (gpio_is_valid(data->pdata->irq_gpio))
- gpio_free(data->pdata->reset_gpio);
+ gpio_free(data->pdata->irq_gpio);
if (data->pdata->power_on)
data->pdata->power_on(false);
@@ -755,6 +1501,7 @@
ft5x06_power_init(data, false);
input_unregister_device(data->input_dev);
+ kfree(data->ts_info);
kfree(data);
return 0;
diff --git a/drivers/input/touchscreen/synaptics_fw_update.c b/drivers/input/touchscreen/synaptics_fw_update.c
index d51481f..349b020 100644
--- a/drivers/input/touchscreen/synaptics_fw_update.c
+++ b/drivers/input/touchscreen/synaptics_fw_update.c
@@ -304,10 +304,10 @@
};
static struct device_attribute attrs[] = {
- __ATTR(forceflash, S_IWUGO,
+ __ATTR(force_update_fw, S_IWUGO,
synaptics_rmi4_show_error,
fwu_sysfs_force_reflash_store),
- __ATTR(doreflash, S_IWUGO,
+ __ATTR(update_fw, S_IWUGO,
synaptics_rmi4_show_error,
fwu_sysfs_do_reflash_store),
__ATTR(writeconfig, S_IWUGO,
diff --git a/drivers/input/touchscreen/synaptics_i2c_rmi4.c b/drivers/input/touchscreen/synaptics_i2c_rmi4.c
index ba94178..b9dd4ae 100644
--- a/drivers/input/touchscreen/synaptics_i2c_rmi4.c
+++ b/drivers/input/touchscreen/synaptics_i2c_rmi4.c
@@ -114,6 +114,12 @@
static ssize_t synaptics_rmi4_full_pm_cycle_store(struct device *dev,
struct device_attribute *attr, const char *buf, size_t count);
+static ssize_t synaptics_rmi4_mode_suspend_store(struct device *dev,
+ struct device_attribute *attr, const char *buf, size_t count);
+
+static ssize_t synaptics_rmi4_mode_resume_store(struct device *dev,
+ struct device_attribute *attr, const char *buf, size_t count);
+
#if defined(CONFIG_FB)
static int fb_notifier_callback(struct notifier_block *self,
unsigned long event, void *data);
@@ -237,6 +243,12 @@
__ATTR(full_pm_cycle, (S_IRUGO | S_IWUGO),
synaptics_rmi4_full_pm_cycle_show,
synaptics_rmi4_full_pm_cycle_store),
+ __ATTR(mode_suspend, S_IWUGO,
+ synaptics_rmi4_show_error,
+ synaptics_rmi4_mode_suspend_store),
+ __ATTR(mode_resume, S_IWUGO,
+ synaptics_rmi4_show_error,
+ synaptics_rmi4_mode_resume_store),
#endif
__ATTR(reset, S_IWUGO,
synaptics_rmi4_show_error,
@@ -288,6 +300,34 @@
return count;
}
+static ssize_t synaptics_rmi4_mode_suspend_store(struct device *dev,
+ struct device_attribute *attr, const char *buf, size_t count)
+{
+ unsigned int input;
+ struct synaptics_rmi4_data *rmi4_data = dev_get_drvdata(dev);
+
+ if (sscanf(buf, "%u", &input) != 1)
+ return -EINVAL;
+
+ synaptics_rmi4_suspend(&(rmi4_data->input_dev->dev));
+
+ return count;
+}
+
+static ssize_t synaptics_rmi4_mode_resume_store(struct device *dev,
+ struct device_attribute *attr, const char *buf, size_t count)
+{
+ unsigned int input;
+ struct synaptics_rmi4_data *rmi4_data = dev_get_drvdata(dev);
+
+ if (sscanf(buf, "%u", &input) != 1)
+ return -EINVAL;
+
+ synaptics_rmi4_resume(&(rmi4_data->input_dev->dev));
+
+ return count;
+}
+
#ifdef CONFIG_FB
static void configure_sleep(struct synaptics_rmi4_data *rmi4_data)
{
@@ -1031,8 +1071,6 @@
rmi4_pdata->i2c_pull_up = of_property_read_bool(np,
"synaptics,i2c-pull-up");
- rmi4_pdata->regulator_en = of_property_read_bool(np,
- "synaptics,reg-en");
rmi4_pdata->x_flip = of_property_read_bool(np, "synaptics,x-flip");
rmi4_pdata->y_flip = of_property_read_bool(np, "synaptics,y-flip");
@@ -1865,25 +1903,23 @@
if (on == false)
goto hw_shutdown;
- if (rmi4_data->board->regulator_en) {
- rmi4_data->vdd = regulator_get(&rmi4_data->i2c_client->dev,
- "vdd");
- if (IS_ERR(rmi4_data->vdd)) {
- dev_err(&rmi4_data->i2c_client->dev,
- "%s: Failed to get vdd regulator\n",
- __func__);
- return PTR_ERR(rmi4_data->vdd);
- }
+ rmi4_data->vdd = regulator_get(&rmi4_data->i2c_client->dev,
+ "vdd");
+ if (IS_ERR(rmi4_data->vdd)) {
+ dev_err(&rmi4_data->i2c_client->dev,
+ "%s: Failed to get vdd regulator\n",
+ __func__);
+ return PTR_ERR(rmi4_data->vdd);
+ }
- if (regulator_count_voltages(rmi4_data->vdd) > 0) {
- retval = regulator_set_voltage(rmi4_data->vdd,
- RMI4_VTG_MIN_UV, RMI4_VTG_MAX_UV);
- if (retval) {
- dev_err(&rmi4_data->i2c_client->dev,
- "regulator set_vtg failed retval =%d\n",
- retval);
- goto err_set_vtg_vdd;
- }
+ if (regulator_count_voltages(rmi4_data->vdd) > 0) {
+ retval = regulator_set_voltage(rmi4_data->vdd,
+ RMI4_VTG_MIN_UV, RMI4_VTG_MAX_UV);
+ if (retval) {
+ dev_err(&rmi4_data->i2c_client->dev,
+ "regulator set_vtg failed retval =%d\n",
+ retval);
+ goto err_set_vtg_vdd;
}
}
@@ -1915,22 +1951,18 @@
if (rmi4_data->board->i2c_pull_up)
regulator_put(rmi4_data->vcc_i2c);
err_get_vtg_i2c:
- if (rmi4_data->board->regulator_en)
- if (regulator_count_voltages(rmi4_data->vdd) > 0)
- regulator_set_voltage(rmi4_data->vdd, 0,
- RMI4_VTG_MAX_UV);
+ if (regulator_count_voltages(rmi4_data->vdd) > 0)
+ regulator_set_voltage(rmi4_data->vdd, 0,
+ RMI4_VTG_MAX_UV);
err_set_vtg_vdd:
- if (rmi4_data->board->regulator_en)
- regulator_put(rmi4_data->vdd);
+ regulator_put(rmi4_data->vdd);
return retval;
hw_shutdown:
- if (rmi4_data->board->regulator_en) {
- if (regulator_count_voltages(rmi4_data->vdd) > 0)
- regulator_set_voltage(rmi4_data->vdd, 0,
- RMI4_VTG_MAX_UV);
- regulator_put(rmi4_data->vdd);
- }
+ if (regulator_count_voltages(rmi4_data->vdd) > 0)
+ regulator_set_voltage(rmi4_data->vdd, 0,
+ RMI4_VTG_MAX_UV);
+ regulator_put(rmi4_data->vdd);
if (rmi4_data->board->i2c_pull_up) {
if (regulator_count_voltages(rmi4_data->vcc_i2c) > 0)
regulator_set_voltage(rmi4_data->vcc_i2c, 0,
@@ -1947,23 +1979,21 @@
if (on == false)
goto power_off;
- if (rmi4_data->board->regulator_en) {
- retval = reg_set_optimum_mode_check(rmi4_data->vdd,
- RMI4_ACTIVE_LOAD_UA);
- if (retval < 0) {
- dev_err(&rmi4_data->i2c_client->dev,
- "Regulator vdd set_opt failed rc=%d\n",
- retval);
- return retval;
- }
+ retval = reg_set_optimum_mode_check(rmi4_data->vdd,
+ RMI4_ACTIVE_LOAD_UA);
+ if (retval < 0) {
+ dev_err(&rmi4_data->i2c_client->dev,
+ "Regulator vdd set_opt failed rc=%d\n",
+ retval);
+ return retval;
+ }
- retval = regulator_enable(rmi4_data->vdd);
- if (retval) {
- dev_err(&rmi4_data->i2c_client->dev,
- "Regulator vdd enable failed rc=%d\n",
- retval);
- goto error_reg_en_vdd;
- }
+ retval = regulator_enable(rmi4_data->vdd);
+ if (retval) {
+ dev_err(&rmi4_data->i2c_client->dev,
+ "Regulator vdd enable failed rc=%d\n",
+ retval);
+ goto error_reg_en_vdd;
}
if (rmi4_data->board->i2c_pull_up) {
@@ -1990,18 +2020,14 @@
if (rmi4_data->board->i2c_pull_up)
reg_set_optimum_mode_check(rmi4_data->vdd, 0);
error_reg_opt_i2c:
- if (rmi4_data->board->regulator_en)
- regulator_disable(rmi4_data->vdd);
+ regulator_disable(rmi4_data->vdd);
error_reg_en_vdd:
- if (rmi4_data->board->regulator_en)
- reg_set_optimum_mode_check(rmi4_data->vdd, 0);
+ reg_set_optimum_mode_check(rmi4_data->vdd, 0);
return retval;
power_off:
- if (rmi4_data->board->regulator_en) {
- reg_set_optimum_mode_check(rmi4_data->vdd, 0);
- regulator_disable(rmi4_data->vdd);
- }
+ reg_set_optimum_mode_check(rmi4_data->vdd, 0);
+ regulator_disable(rmi4_data->vdd);
if (rmi4_data->board->i2c_pull_up) {
reg_set_optimum_mode_check(rmi4_data->vcc_i2c, 0);
regulator_disable(rmi4_data->vcc_i2c);
diff --git a/drivers/iommu/Kconfig b/drivers/iommu/Kconfig
index 318b98f..6324dff 100644
--- a/drivers/iommu/Kconfig
+++ b/drivers/iommu/Kconfig
@@ -75,6 +75,20 @@
section mappings and TLB misses should be quite infrequent.
Most people can probably say Y here.
+config IOMMU_NON_SECURE
+ bool "Turns on programming of secure SMMU by kernel"
+ depends on MSM_IOMMU
+ help
+ Say Y here if you want the kernel to program all SMMUs regardless of
+ whether SMMUs are secure or not. A secure SMMU is an SMMU that has
+ its global address space programmed by the secure environment. In
+ addition some of the context banks might be owned/programmed by the
+ secure environment for a secure SMMU. Enabling this feature can be
+ used during testing when the secure environment is not available
+ and the kernel needs to program all the SMMUs.
+
+ If unsure, say N here.
+
# AMD IOMMU support
config AMD_IOMMU
bool "AMD IOMMU support"
diff --git a/drivers/iommu/msm_iommu-v1.c b/drivers/iommu/msm_iommu-v1.c
index 06c6d94..175328e 100644
--- a/drivers/iommu/msm_iommu-v1.c
+++ b/drivers/iommu/msm_iommu-v1.c
@@ -39,6 +39,7 @@
#define MSM_IOMMU_PGSIZES (SZ_4K | SZ_64K | SZ_1M | SZ_16M)
static DEFINE_MUTEX(msm_iommu_lock);
+struct dump_regs_tbl dump_regs_tbl[MAX_DUMP_REGS];
static int __enable_regulators(struct msm_iommu_drvdata *drvdata)
{
@@ -259,12 +260,46 @@
mb();
}
+#ifdef CONFIG_IOMMU_NON_SECURE
+static void __reset_iommu_secure(void __iomem *base)
+{
+ SET_NSACR(base, 0);
+ SET_NSCR2(base, 0);
+ SET_NSGFAR(base, 0);
+ SET_NSGFSRRESTORE(base, 0);
+ mb();
+}
+
+static void __program_iommu_secure(void __iomem *base)
+{
+ SET_NSCR0_SMCFCFG(base, 1);
+ SET_NSCR0_USFCFG(base, 1);
+ SET_NSCR0_STALLD(base, 1);
+ SET_NSCR0_GCFGFIE(base, 1);
+ SET_NSCR0_GCFGFRE(base, 1);
+ SET_NSCR0_GFIE(base, 1);
+ SET_NSCR0_GFRE(base, 1);
+ SET_NSCR0_CLIENTPD(base, 0);
+}
+
+#else
+static inline void __reset_iommu_secure(void __iomem *base)
+{
+}
+
+static inline void __program_iommu_secure(void __iomem *base)
+{
+}
+
+#endif
+
/*
* May only be called for non-secure iommus
*/
static void __program_iommu(void __iomem *base)
{
__reset_iommu(base);
+ __reset_iommu_secure(base);
SET_CR0_SMCFCFG(base, 1);
SET_CR0_USFCFG(base, 1);
@@ -275,6 +310,8 @@
SET_CR0_GFRE(base, 1);
SET_CR0_CLIENTPD(base, 0);
+ __program_iommu_secure(base);
+
mb(); /* Make sure writes complete before returning */
}
@@ -733,7 +770,7 @@
struct msm_iommu_priv *priv;
struct msm_iommu_drvdata *iommu_drvdata;
struct msm_iommu_ctx_drvdata *ctx_drvdata;
- unsigned int par;
+ u64 par;
void __iomem *base;
phys_addr_t ret = 0;
int ctx;
@@ -766,6 +803,23 @@
__disable_clocks(iommu_drvdata);
if (par & CB_PAR_F) {
+ unsigned int level = (par & CB_PAR_PLVL) >> CB_PAR_PLVL_SHIFT;
+ pr_err("IOMMU translation fault!\n");
+ pr_err("name = %s\n", iommu_drvdata->name);
+ pr_err("context = %s (%d)\n", ctx_drvdata->name,
+ ctx_drvdata->num);
+ pr_err("Interesting registers:\n");
+ pr_err("PAR = %16llx [%s%s%s%s%s%s%s%sPLVL%u %s]\n", par,
+ (par & CB_PAR_F) ? "F " : "",
+ (par & CB_PAR_TF) ? "TF " : "",
+ (par & CB_PAR_AFF) ? "AFF " : "",
+ (par & CB_PAR_PF) ? "PF " : "",
+ (par & CB_PAR_EF) ? "EF " : "",
+ (par & CB_PAR_TLBMCF) ? "TLBMCF " : "",
+ (par & CB_PAR_TLBLKF) ? "TLBLKF " : "",
+ (par & CB_PAR_ATOT) ? "ATOT " : "",
+ level,
+ (par & CB_PAR_STAGE) ? "S2 " : "S1 ");
ret = 0;
} else {
/* We are dealing with a supersection */
@@ -786,12 +840,18 @@
return 0;
}
-void print_ctx_regs(struct msm_iommu_context_regs *regs)
+void print_ctx_regs(struct msm_iommu_context_reg regs[])
{
- uint32_t fsr = regs->fsr;
+ uint32_t fsr = regs[DUMP_REG_FSR].val;
- pr_err("FAR = %08x PAR = %08x\n",
- regs->far, regs->par);
+ pr_err("FAR = %016llx\n",
+ COMBINE_DUMP_REG(
+ regs[DUMP_REG_FAR1].val,
+ regs[DUMP_REG_FAR0].val));
+ pr_err("PAR = %016llx\n",
+ COMBINE_DUMP_REG(
+ regs[DUMP_REG_PAR1].val,
+ regs[DUMP_REG_PAR0].val));
pr_err("FSR = %08x [%s%s%s%s%s%s%s%s%s]\n", fsr,
(fsr & 0x02) ? "TF " : "",
(fsr & 0x04) ? "AFF " : "",
@@ -804,31 +864,25 @@
(fsr & 0x80000000) ? "MULTI " : "");
pr_err("FSYNR0 = %08x FSYNR1 = %08x\n",
- regs->fsynr0, regs->fsynr1);
+ regs[DUMP_REG_FSYNR0].val, regs[DUMP_REG_FSYNR1].val);
pr_err("TTBR0 = %08x TTBR1 = %08x\n",
- regs->ttbr0, regs->ttbr1);
+ regs[DUMP_REG_TTBR0].val, regs[DUMP_REG_TTBR1].val);
pr_err("SCTLR = %08x ACTLR = %08x\n",
- regs->sctlr, regs->actlr);
+ regs[DUMP_REG_SCTLR].val, regs[DUMP_REG_ACTLR].val);
pr_err("PRRR = %08x NMRR = %08x\n",
- regs->prrr, regs->nmrr);
+ regs[DUMP_REG_PRRR].val, regs[DUMP_REG_NMRR].val);
}
static void __print_ctx_regs(void __iomem *base, int ctx, unsigned int fsr)
{
- struct msm_iommu_context_regs regs = {
- .far = GET_FAR(base, ctx),
- .par = GET_PAR(base, ctx),
- .fsr = fsr,
- .fsynr0 = GET_FSYNR0(base, ctx),
- .fsynr1 = GET_FSYNR1(base, ctx),
- .ttbr0 = GET_TTBR0(base, ctx),
- .ttbr1 = GET_TTBR1(base, ctx),
- .sctlr = GET_SCTLR(base, ctx),
- .actlr = GET_ACTLR(base, ctx),
- .prrr = GET_PRRR(base, ctx),
- .nmrr = GET_NMRR(base, ctx),
- };
- print_ctx_regs(®s);
+ struct msm_iommu_context_reg regs[MAX_DUMP_REGS];
+ unsigned int i;
+
+ for (i = DUMP_REG_FIRST; i < MAX_DUMP_REGS; ++i) {
+ regs[i].val = GET_CTX_REG(dump_regs_tbl[i].key, base, ctx);
+ regs[i].valid = 1;
+ }
+ print_ctx_regs(regs);
}
irqreturn_t msm_iommu_fault_handler_v2(int irq, void *dev_id)
@@ -904,6 +958,29 @@
return __pa(priv->pt.fl_table);
}
+#define DUMP_REG_INIT(dump_reg, cb_reg) \
+ do { \
+ dump_regs_tbl[dump_reg].key = cb_reg; \
+ dump_regs_tbl[dump_reg].name = #cb_reg; \
+ } while (0)
+
+static void msm_iommu_build_dump_regs_table(void)
+{
+ DUMP_REG_INIT(DUMP_REG_FAR0, CB_FAR);
+ DUMP_REG_INIT(DUMP_REG_FAR1, CB_FAR + 4);
+ DUMP_REG_INIT(DUMP_REG_PAR0, CB_PAR);
+ DUMP_REG_INIT(DUMP_REG_PAR1, CB_PAR + 4);
+ DUMP_REG_INIT(DUMP_REG_FSR, CB_FSR);
+ DUMP_REG_INIT(DUMP_REG_FSYNR0, CB_FSYNR0);
+ DUMP_REG_INIT(DUMP_REG_FSYNR1, CB_FSYNR1);
+ DUMP_REG_INIT(DUMP_REG_TTBR0, CB_TTBR0);
+ DUMP_REG_INIT(DUMP_REG_TTBR1, CB_TTBR1);
+ DUMP_REG_INIT(DUMP_REG_SCTLR, CB_SCTLR);
+ DUMP_REG_INIT(DUMP_REG_ACTLR, CB_ACTLR);
+ DUMP_REG_INIT(DUMP_REG_PRRR, CB_PRRR);
+ DUMP_REG_INIT(DUMP_REG_NMRR, CB_NMRR);
+}
+
static struct iommu_ops msm_iommu_ops = {
.domain_init = msm_iommu_domain_init,
.domain_destroy = msm_iommu_domain_destroy,
@@ -923,6 +1000,8 @@
{
msm_iommu_pagetable_init();
bus_set_iommu(&platform_bus_type, &msm_iommu_ops);
+ msm_iommu_build_dump_regs_table();
+
return 0;
}
diff --git a/drivers/iommu/msm_iommu_dev-v1.c b/drivers/iommu/msm_iommu_dev-v1.c
index bcd78a9..119a126 100644
--- a/drivers/iommu/msm_iommu_dev-v1.c
+++ b/drivers/iommu/msm_iommu_dev-v1.c
@@ -115,8 +115,35 @@
static void __put_bus_vote_client(struct msm_iommu_drvdata *drvdata)
{
msm_bus_scale_unregister_client(drvdata->bus_client);
+ drvdata->bus_client = 0;
}
+#ifdef CONFIG_IOMMU_NON_SECURE
+static inline void get_secure_id(struct device_node *node,
+ struct msm_iommu_drvdata *drvdata)
+{
+}
+
+static inline void get_secure_ctx(struct device_node *node,
+ struct msm_iommu_ctx_drvdata *ctx_drvdata)
+{
+ ctx_drvdata->secure_context = 0;
+}
+#else
+static void get_secure_id(struct device_node *node,
+ struct msm_iommu_drvdata *drvdata)
+{
+ of_property_read_u32(node, "qcom,iommu-secure-id", &drvdata->sec_id);
+}
+
+static void get_secure_ctx(struct device_node *node,
+ struct msm_iommu_ctx_drvdata *ctx_drvdata)
+{
+ ctx_drvdata->secure_context =
+ of_property_read_bool(node, "qcom,secure-context");
+}
+#endif
+
static int msm_iommu_parse_dt(struct platform_device *pdev,
struct msm_iommu_drvdata *drvdata)
{
@@ -153,8 +180,7 @@
goto fail;
drvdata->sec_id = -1;
- of_property_read_u32(pdev->dev.of_node, "qcom,iommu-secure-id",
- &drvdata->sec_id);
+ get_secure_id(pdev->dev.of_node, drvdata);
r = platform_get_resource_byname(pdev, IORESOURCE_MEM, "clk_base");
if (r) {
@@ -360,8 +386,7 @@
int irq = 0, ret = 0;
u32 nsid;
- ctx_drvdata->secure_context = of_property_read_bool(pdev->dev.of_node,
- "qcom,secure-context");
+ get_secure_ctx(pdev->dev.of_node, ctx_drvdata);
if (ctx_drvdata->secure_context) {
irq = platform_get_irq(pdev, 1);
diff --git a/drivers/iommu/msm_iommu_sec.c b/drivers/iommu/msm_iommu_sec.c
index a17a4e8..8d2cc8f 100644
--- a/drivers/iommu/msm_iommu_sec.c
+++ b/drivers/iommu/msm_iommu_sec.c
@@ -34,6 +34,7 @@
#include <mach/msm_iommu_priv.h>
#include <mach/iommu.h>
#include <mach/scm.h>
+#include <mach/memory.h>
/* bitmap of the page sizes currently supported */
#define MSM_IOMMU_PGSIZES (SZ_4K | SZ_64K | SZ_1M | SZ_16M)
@@ -77,37 +78,19 @@
unsigned int flags;
};
+#define NUM_DUMP_REGS 14
+/*
+ * some space to allow the number of registers returned by the secure
+ * environment to grow
+ */
+#define WIGGLE_ROOM (NUM_DUMP_REGS * 2)
+/* Each entry is a (reg_addr, reg_val) pair, hence the * 2 */
+#define SEC_DUMP_SIZE ((NUM_DUMP_REGS * 2) + WIGGLE_ROOM)
+
struct msm_scm_fault_regs_dump {
uint32_t dump_size;
- uint32_t fsr_addr;
- uint32_t fsr;
- uint32_t far0_addr;
- uint32_t far0;
- uint32_t far1_addr;
- uint32_t far1;
- uint32_t par0_addr;
- uint32_t par0;
- uint32_t par1_addr;
- uint32_t par1;
- uint32_t fsyn0_addr;
- uint32_t fsyn0;
- uint32_t fsyn1_addr;
- uint32_t fsyn1;
- uint32_t ttbr0_addr;
- uint32_t ttbr0;
- uint32_t ttbr1_addr;
- uint32_t ttbr1;
- uint32_t ttbcr_addr;
- uint32_t ttbcr;
- uint32_t sctlr_addr;
- uint32_t sctlr;
- uint32_t actlr_addr;
- uint32_t actlr;
- uint32_t prrr_addr;
- uint32_t prrr;
- uint32_t nmrr_addr;
- uint32_t nmrr;
-};
+ uint32_t dump_data[SEC_DUMP_SIZE];
+} __packed;
void msm_iommu_sec_set_access_ops(struct iommu_access_ops *access_ops)
{
@@ -135,6 +118,67 @@
ret = scm_call(SCM_SVC_UTIL, IOMMU_DUMP_SMMU_FAULT_REGS,
&req_info, sizeof(req_info), &resp, 1);
+ invalidate_caches((unsigned long) regs, sizeof(*regs),
+ (unsigned long)virt_to_phys(regs));
+
+ return ret;
+}
+
+#define EXTRACT_DUMP_REG_KEY(addr, ctx) (addr & ((1 << CTX_SHIFT) - 1))
+
+static int msm_iommu_reg_dump_to_regs(
+ struct msm_iommu_context_reg ctx_regs[],
+ struct msm_scm_fault_regs_dump *dump, int cb_num)
+{
+ int i, j, ret = 0;
+ const uint32_t nvals = (dump->dump_size / sizeof(uint32_t));
+ uint32_t *it = (uint32_t *) dump->dump_data;
+ const uint32_t * const end = ((uint32_t *) dump) + nvals;
+
+ for (i = 1; it < end; it += 2, i += 2) {
+ uint32_t addr = *it;
+ uint32_t val = *(it + 1);
+ struct msm_iommu_context_reg *reg = NULL;
+
+ for (j = 0; j < MAX_DUMP_REGS; ++j) {
+ if (dump_regs_tbl[j].key ==
+ EXTRACT_DUMP_REG_KEY(addr, cb_num)) {
+ reg = &ctx_regs[j];
+ break;
+ }
+ }
+
+ if (reg == NULL) {
+ pr_debug("Unknown register in secure CB dump: %x (%x)\n",
+ addr, EXTRACT_DUMP_REG_KEY(addr, cb_num));
+ continue;
+ }
+
+ if (reg->valid) {
+ WARN(1, "Invalid (repeated?) register in CB dump: %x\n",
+ addr);
+ continue;
+ }
+
+ reg->val = val;
+ reg->valid = true;
+ }
+
+ if (i != nvals) {
+ pr_err("Invalid dump! %d != %d\n", i, nvals);
+ ret = 1;
+ goto out;
+ }
+
+ for (i = 0; i < MAX_DUMP_REGS; ++i) {
+ if (!ctx_regs[i].valid) {
+ pr_err("Register missing from dump: %s, %lx\n",
+ dump_regs_tbl[i].name, dump_regs_tbl[i].key);
+ ret = 1;
+ }
+ }
+
+out:
return ret;
}
@@ -180,43 +224,40 @@
iommu_access_ops->iommu_clk_off(drvdata);
if (tmp) {
- pr_err("%s: Couldn't dump fault registers!\n", __func__);
+ pr_err("%s: Couldn't dump fault registers (%d) %s, ctx: %d\n",
+ __func__, tmp, drvdata->name, ctx_drvdata->num);
goto free_regs;
- } else if (regs->fsr) {
- struct msm_iommu_context_regs ctx_regs = {
- .far = regs->far0,
- .par = regs->par0,
- .fsr = regs->fsr,
- .fsynr0 = regs->fsyn0,
- .fsynr1 = regs->fsyn1,
- .ttbr0 = regs->ttbr0,
- .ttbr1 = regs->ttbr1,
- .sctlr = regs->sctlr,
- .actlr = regs->actlr,
- .prrr = regs->prrr,
- .nmrr = regs->nmrr,
- };
-
- if (!ctx_drvdata->attached_domain) {
- pr_err("Bad domain in interrupt handler\n");
- tmp = -ENOSYS;
- } else {
- tmp = report_iommu_fault(ctx_drvdata->attached_domain,
- &ctx_drvdata->pdev->dev,
- regs->far0, 0);
- }
-
- /* if the fault wasn't handled by someone else: */
- if (tmp == -ENOSYS) {
- pr_err("Unexpected IOMMU page fault from secure context bank!\n");
- pr_err("name = %s\n", drvdata->name);
- pr_err("context = %s (%d)\n", ctx_drvdata->name,
- ctx_drvdata->num);
- pr_err("Interesting registers:\n");
- print_ctx_regs(&ctx_regs);
- }
} else {
- ret = IRQ_NONE;
+ struct msm_iommu_context_reg ctx_regs[MAX_DUMP_REGS];
+ memset(ctx_regs, 0, sizeof(ctx_regs));
+ tmp = msm_iommu_reg_dump_to_regs(ctx_regs, regs,
+ ctx_drvdata->num);
+ if (!tmp && ctx_regs[DUMP_REG_FSR].val) {
+ if (!ctx_drvdata->attached_domain) {
+ pr_err("Bad domain in interrupt handler\n");
+ tmp = -ENOSYS;
+ } else {
+ tmp = report_iommu_fault(
+ ctx_drvdata->attached_domain,
+ &ctx_drvdata->pdev->dev,
+ COMBINE_DUMP_REG(
+ ctx_regs[DUMP_REG_FAR1].val,
+ ctx_regs[DUMP_REG_FAR0].val),
+ 0);
+ }
+
+ /* if the fault wasn't handled by someone else: */
+ if (tmp == -ENOSYS) {
+ pr_err("Unexpected IOMMU page fault from secure context bank!\n");
+ pr_err("name = %s\n", drvdata->name);
+ pr_err("context = %s (%d)\n", ctx_drvdata->name,
+ ctx_drvdata->num);
+ pr_err("Interesting registers:\n");
+ print_ctx_regs(ctx_regs);
+ }
+ } else {
+ ret = IRQ_NONE;
+ }
}
free_regs:
kfree(regs);
@@ -315,6 +356,8 @@
unsigned long va, phys_addr_t pa, size_t len)
{
struct msm_scm_map2_req map;
+ void *flush_va;
+ phys_addr_t flush_pa;
int ret = 0;
map.plist.list = virt_to_phys(&pa);
@@ -325,6 +368,13 @@
map.info.va = va;
map.info.size = len;
map.flags = IOMMU_TLBINVAL_FLAG;
+ flush_va = &pa;
+ flush_pa = virt_to_phys(&pa);
+
+ /*
+ * Ensure that the buffer is in RAM by the time it gets to TZ
+ */
+ clean_caches((unsigned long) flush_va, len, flush_pa);
if (scm_call(SCM_SVC_MP, IOMMU_SECURE_MAP2, &map, sizeof(map), &ret,
sizeof(ret)))
@@ -332,6 +382,9 @@
if (ret)
return -EINVAL;
+ /* Invalidate cache since TZ touched this address range */
+ invalidate_caches((unsigned long) flush_va, len, flush_pa);
+
return 0;
}
@@ -356,6 +409,7 @@
struct msm_scm_map2_req map;
unsigned int *pa_list = 0;
unsigned int pa, cnt;
+ void *flush_va;
unsigned int offset = 0, chunk_offset = 0;
int ret, scm_ret;
@@ -370,6 +424,7 @@
map.plist.list = virt_to_phys(&pa);
map.plist.list_size = 1;
map.plist.size = len;
+ flush_va = &pa;
} else {
sgiter = sg;
cnt = sg->length / SZ_1M;
@@ -400,8 +455,15 @@
map.plist.list = virt_to_phys(pa_list);
map.plist.list_size = cnt;
map.plist.size = SZ_1M;
+ flush_va = pa_list;
}
+ /*
+ * Ensure that the buffer is in RAM by the time it gets to TZ
+ */
+ clean_caches((unsigned long) flush_va,
+ map.plist.size * map.plist.list_size, virt_to_phys(flush_va));
+
ret = scm_call(SCM_SVC_MP, IOMMU_SECURE_MAP2, &map, sizeof(map),
&scm_ret, sizeof(scm_ret));
kfree(pa_list);
diff --git a/drivers/leds/leds-pm8xxx.c b/drivers/leds/leds-pm8xxx.c
index c3a5564..aef6295 100644
--- a/drivers/leds/leds-pm8xxx.c
+++ b/drivers/leds/leds-pm8xxx.c
@@ -133,6 +133,11 @@
_rgb_led_blue << PM8XXX_ID_RGB_LED_BLUE, \
}
+#define PM8XXX_PWM_CURRENT_4MA 4
+#define PM8XXX_PWM_CURRENT_8MA 8
+#define PM8XXX_PWM_CURRENT_12MA 12
+
+
/**
* supported_leds - leds supported for each PMIC version
* @version - version of PMIC
@@ -795,7 +800,7 @@
static int pm8xxx_led_pwm_configure(struct pm8xxx_led_data *led)
{
- int start_idx, idx_len, duty_us, rc;
+ int start_idx, idx_len, duty_us, rc, flags;
led->pwm_dev = pwm_request(led->pwm_channel,
led->cdev.name);
@@ -808,6 +813,22 @@
return -ENODEV;
}
+ flags = PM8XXX_LED_PWM_FLAGS;
+ switch (led->max_current) {
+ case PM8XXX_PWM_CURRENT_4MA:
+ flags |= PM_PWM_BANK_LO;
+ break;
+ case PM8XXX_PWM_CURRENT_8MA:
+ flags |= PM_PWM_BANK_HI;
+ break;
+ case PM8XXX_PWM_CURRENT_12MA:
+ flags |= (PM_PWM_BANK_LO | PM_PWM_BANK_HI);
+ break;
+ default:
+ flags |= (PM_PWM_BANK_LO | PM_PWM_BANK_HI);
+ break;
+ }
+
if (led->pwm_duty_cycles != NULL) {
start_idx = led->pwm_duty_cycles->start_idx;
idx_len = led->pwm_duty_cycles->num_duty_pcts;
@@ -825,7 +846,7 @@
led->pwm_duty_cycles->duty_pcts,
led->pwm_duty_cycles->duty_ms,
start_idx, idx_len, 0, 0,
- PM8XXX_LED_PWM_FLAGS);
+ flags);
} else {
duty_us = led->pwm_period_us;
rc = pwm_config(led->pwm_dev, duty_us, led->pwm_period_us);
diff --git a/drivers/leds/leds-qpnp.c b/drivers/leds/leds-qpnp.c
index 2ea7128..fbcc243 100644
--- a/drivers/leds/leds-qpnp.c
+++ b/drivers/leds/leds-qpnp.c
@@ -97,6 +97,7 @@
#define FLASH_FAULT_DETECT(base) (base + 0x51)
#define FLASH_MAX_LEVEL 0x4F
+#define TORCH_MAX_LEVEL 0x0F
#define FLASH_NO_MASK 0x00
#define FLASH_MASK_1 0x20
@@ -109,7 +110,7 @@
#define FLASH_TMR_WATCHDOG 0x03
#define FLASH_TMR_SAFETY 0x00
#define FLASH_FAULT_DETECT_MASK 0X80
-#define FLASH_HW_VREG_OK 0x80
+#define FLASH_HW_VREG_OK 0x40
#define FLASH_VREG_MASK 0xC0
#define FLASH_STARTUP_DLY_MASK 0x02
@@ -159,6 +160,7 @@
#define QPNP_LED_PWM_FLAGS (PM_PWM_LUT_LOOP | PM_PWM_LUT_RAMP_UP)
#define QPNP_LUT_RAMP_STEP_DEFAULT 255
#define PWM_LUT_MAX_SIZE 63
+#define PWM_GPLED_LUT_MAX_SIZE 31
#define RGB_LED_DISABLE 0x00
#define MPP_MAX_LEVEL LED_FULL
@@ -299,6 +301,10 @@
* @pwm_channel - pwm channel to be configured for led
* @pwm_period_us - period for pwm, in us
* @mode - mode the led operates in
+ * @old_duty_pcts - storage for duty pcts that may need to be reused
+ * @default_mode - default mode of LED as set in device tree
+ * @use_blink - use blink sysfs entry
+ * @blinking - device is currently blinking w/LPG mode
*/
struct pwm_config_data {
struct lut_params lut_params;
@@ -306,8 +312,11 @@
int pwm_channel;
u32 pwm_period_us;
struct pwm_duty_cycles *duty_cycles;
+ int *old_duty_pcts;
u8 mode;
- u8 enable;
+ u8 default_mode;
+ bool use_blink;
+ bool blinking;
};
/**
@@ -413,6 +422,7 @@
* struct qpnp_led_data - internal led data structure
* @led_classdev - led class device
* @delayed_work - delayed work for turning off the LED
+ * @work - workqueue for led
* @id - led index
* @base_reg - base register given in device tree
* @lock - to protect the transactions
@@ -426,11 +436,12 @@
struct led_classdev cdev;
struct spmi_device *spmi_dev;
struct delayed_work dwork;
+ struct work_struct work;
int id;
u16 base;
u8 reg;
u8 num_leds;
- spinlock_t lock;
+ struct mutex lock;
struct wled_config_data *wled_cfg;
struct flash_config_data *flash_cfg;
struct kpdbl_config_data *kpdbl_cfg;
@@ -565,6 +576,14 @@
int duty_us;
if (led->cdev.brightness) {
+ if (led->mpp_cfg->pwm_mode != MANUAL_MODE) {
+ if (!led->mpp_cfg->pwm_cfg->blinking) {
+ led->mpp_cfg->pwm_cfg->mode =
+ led->mpp_cfg->pwm_cfg->default_mode;
+ led->mpp_cfg->pwm_mode =
+ led->mpp_cfg->pwm_cfg->default_mode;
+ }
+ }
if (led->mpp_cfg->pwm_mode == PWM_MODE) {
pwm_disable(led->mpp_cfg->pwm_cfg->pwm_dev);
duty_us = (led->mpp_cfg->pwm_cfg->pwm_period_us *
@@ -605,8 +624,13 @@
return rc;
}
} else {
- if (led->mpp_cfg->pwm_mode != MANUAL_MODE)
+ if (led->mpp_cfg->pwm_mode != MANUAL_MODE) {
+ led->mpp_cfg->pwm_cfg->mode =
+ led->mpp_cfg->pwm_cfg->default_mode;
+ led->mpp_cfg->pwm_mode =
+ led->mpp_cfg->pwm_cfg->default_mode;
pwm_disable(led->mpp_cfg->pwm_cfg->pwm_dev);
+ }
rc = qpnp_led_masked_write(led,
LED_MPP_MODE_CTRL(led->base),
LED_MPP_MODE_MASK,
@@ -628,6 +652,8 @@
}
}
+ if (led->mpp_cfg->pwm_mode != MANUAL_MODE)
+ led->mpp_cfg->pwm_cfg->blinking = false;
qpnp_dump_regs(led, mpp_debug_regs, ARRAY_SIZE(mpp_debug_regs));
return 0;
@@ -638,8 +664,12 @@
int rc;
int val = led->cdev.brightness;
- led->flash_cfg->current_prgm = (val * FLASH_MAX_LEVEL /
- led->max_current);
+ if (led->flash_cfg->torch_enable)
+ led->flash_cfg->current_prgm =
+ (val * TORCH_MAX_LEVEL / led->max_current);
+ else
+ led->flash_cfg->current_prgm =
+ (val * FLASH_MAX_LEVEL / led->max_current);
led->flash_cfg->current_prgm =
led->flash_cfg->current_prgm >> FLASH_CURRENT_PRGM_SHIFT;
@@ -690,7 +720,7 @@
qpnp_led_masked_write(led, FLASH_MAX_CURR(led->base),
FLASH_CURRENT_MASK,
- led->max_current);
+ TORCH_MAX_LEVEL);
if (rc) {
dev_err(&led->spmi_dev->dev,
"Max current reg write failed(%d)\n",
@@ -860,6 +890,9 @@
int rc;
if (led->cdev.brightness) {
+ if (!led->kpdbl_cfg->pwm_cfg->blinking)
+ led->kpdbl_cfg->pwm_cfg->mode =
+ led->kpdbl_cfg->pwm_cfg->default_mode;
rc = qpnp_led_masked_write(led, KPDBL_ENABLE(led->base),
KPDBL_MODULE_EN_MASK, KPDBL_MODULE_EN);
duty_us = (led->kpdbl_cfg->pwm_cfg->pwm_period_us *
@@ -876,6 +909,8 @@
return rc;
}
} else {
+ led->kpdbl_cfg->pwm_cfg->mode =
+ led->kpdbl_cfg->pwm_cfg->default_mode;
pwm_disable(led->kpdbl_cfg->pwm_cfg->pwm_dev);
rc = qpnp_led_masked_write(led, KPDBL_ENABLE(led->base),
KPDBL_MODULE_EN_MASK, KPDBL_MODULE_DIS);
@@ -886,6 +921,7 @@
}
}
+ led->kpdbl_cfg->pwm_cfg->blinking = false;
qpnp_dump_regs(led, kpdbl_debug_regs, ARRAY_SIZE(kpdbl_debug_regs));
return 0;
@@ -897,6 +933,9 @@
int rc;
if (led->cdev.brightness) {
+ if (!led->rgb_cfg->pwm_cfg->blinking)
+ led->rgb_cfg->pwm_cfg->mode =
+ led->rgb_cfg->pwm_cfg->default_mode;
if (led->rgb_cfg->pwm_cfg->mode == PWM_MODE) {
duty_us = (led->rgb_cfg->pwm_cfg->pwm_period_us *
led->cdev.brightness) / LED_FULL;
@@ -923,6 +962,8 @@
return rc;
}
} else {
+ led->rgb_cfg->pwm_cfg->mode =
+ led->rgb_cfg->pwm_cfg->default_mode;
pwm_disable(led->rgb_cfg->pwm_cfg->pwm_dev);
rc = qpnp_led_masked_write(led,
RGB_LED_EN_CTL(led->base),
@@ -934,6 +975,7 @@
}
}
+ led->rgb_cfg->pwm_cfg->blinking = false;
qpnp_dump_regs(led, rgb_pwm_debug_regs, ARRAY_SIZE(rgb_pwm_debug_regs));
return 0;
@@ -942,9 +984,7 @@
static void qpnp_led_set(struct led_classdev *led_cdev,
enum led_brightness value)
{
- int rc, i;
struct qpnp_led_data *led;
- struct qpnp_led_data *led_array;
led = container_of(led_cdev, struct qpnp_led_data, cdev);
if (value < LED_OFF || value > led->cdev.max_brightness) {
@@ -952,6 +992,16 @@
return;
}
+ led->cdev.brightness = value;
+ schedule_work(&led->work);
+}
+
+static void __qpnp_led_work(struct qpnp_led_data *led,
+ enum led_brightness value)
+{
+ int rc, i;
+ struct qpnp_led_data *led_array;
+
if (led->id == QPNP_ID_FLASH1_LED0 || led->id == QPNP_ID_FLASH1_LED1) {
if (!led->flash_cfg->flash_on && value > 0) {
led_array = dev_get_drvdata(&led->spmi_dev->dev);
@@ -979,8 +1029,7 @@
}
}
- spin_lock(&led->lock);
- led->cdev.brightness = value;
+ mutex_lock(&led->lock);
switch (led->id) {
case QPNP_ID_WLED:
@@ -1020,7 +1069,7 @@
dev_err(&led->spmi_dev->dev, "Invalid LED(%d)\n", led->id);
break;
}
- spin_unlock(&led->lock);
+ mutex_unlock(&led->lock);
if (led->id == QPNP_ID_FLASH1_LED0 || led->id == QPNP_ID_FLASH1_LED1) {
if (led->flash_cfg->flash_on && !value) {
@@ -1049,6 +1098,16 @@
}
}
+static void qpnp_led_work(struct work_struct *work)
+{
+ struct qpnp_led_data *led = container_of(work,
+ struct qpnp_led_data, work);
+
+ __qpnp_led_work(led, led->cdev.brightness);
+
+ return;
+}
+
static int __devinit qpnp_led_set_max_brightness(struct qpnp_led_data *led)
{
switch (led->id) {
@@ -1283,8 +1342,525 @@
return count;
}
+static int qpnp_pwm_init(struct pwm_config_data *pwm_cfg,
+ struct spmi_device *spmi_dev,
+ const char *name)
+{
+ int rc, start_idx, idx_len;
+
+ if (pwm_cfg->pwm_channel != -1) {
+ pwm_cfg->pwm_dev =
+ pwm_request(pwm_cfg->pwm_channel, name);
+
+ if (IS_ERR_OR_NULL(pwm_cfg->pwm_dev)) {
+ dev_err(&spmi_dev->dev,
+ "could not acquire PWM Channel %d, " \
+ "error %ld\n",
+ pwm_cfg->pwm_channel,
+ PTR_ERR(pwm_cfg->pwm_dev));
+ pwm_cfg->pwm_dev = NULL;
+ return -ENODEV;
+ }
+
+ if (pwm_cfg->mode == LPG_MODE) {
+ start_idx =
+ pwm_cfg->duty_cycles->start_idx;
+ idx_len =
+ pwm_cfg->duty_cycles->num_duty_pcts;
+
+ if (idx_len >= PWM_LUT_MAX_SIZE &&
+ start_idx) {
+ dev_err(&spmi_dev->dev,
+ "Wrong LUT size or index\n");
+ return -EINVAL;
+ }
+ if ((start_idx + idx_len) >
+ PWM_LUT_MAX_SIZE) {
+ dev_err(&spmi_dev->dev,
+ "Exceed LUT limit\n");
+ return -EINVAL;
+ }
+ rc = pwm_lut_config(pwm_cfg->pwm_dev,
+ PM_PWM_PERIOD_MIN, /* ignored by hardware */
+ pwm_cfg->duty_cycles->duty_pcts,
+ pwm_cfg->lut_params);
+ if (rc < 0) {
+ dev_err(&spmi_dev->dev, "Failed to " \
+ "configure pwm LUT\n");
+ return rc;
+ }
+ }
+ } else {
+ dev_err(&spmi_dev->dev,
+ "Invalid PWM channel\n");
+ return -EINVAL;
+ }
+
+ return 0;
+}
+
+static ssize_t pwm_us_store(struct device *dev,
+ struct device_attribute *attr,
+ const char *buf, size_t count)
+{
+ struct qpnp_led_data *led;
+ u32 pwm_us;
+ struct led_classdev *led_cdev = dev_get_drvdata(dev);
+ ssize_t ret;
+ u32 previous_pwm_us;
+ struct pwm_config_data *pwm_cfg;
+
+ led = container_of(led_cdev, struct qpnp_led_data, cdev);
+
+ ret = kstrtou32(buf, 10, &pwm_us);
+ if (ret)
+ return ret;
+
+ switch (led->id) {
+ case QPNP_ID_LED_MPP:
+ pwm_cfg = led->mpp_cfg->pwm_cfg;
+ break;
+ case QPNP_ID_RGB_RED:
+ case QPNP_ID_RGB_GREEN:
+ case QPNP_ID_RGB_BLUE:
+ pwm_cfg = led->rgb_cfg->pwm_cfg;
+ break;
+ default:
+ dev_err(&led->spmi_dev->dev,
+ "Invalid LED id type for pwm_us\n");
+ return -EINVAL;
+ }
+
+ if (pwm_cfg->mode == LPG_MODE)
+ pwm_cfg->blinking = true;
+
+ previous_pwm_us = pwm_cfg->pwm_period_us;
+
+ pwm_cfg->pwm_period_us = pwm_us;
+ pwm_free(pwm_cfg->pwm_dev);
+ ret = qpnp_pwm_init(pwm_cfg, led->spmi_dev, led->cdev.name);
+ if (ret) {
+ pwm_cfg->pwm_period_us = previous_pwm_us;
+ pwm_free(pwm_cfg->pwm_dev);
+ qpnp_pwm_init(pwm_cfg, led->spmi_dev, led->cdev.name);
+ qpnp_led_set(&led->cdev, led->cdev.brightness);
+ dev_err(&led->spmi_dev->dev,
+ "Failed to initialize pwm with new pwm_us value\n");
+ return ret;
+ }
+ qpnp_led_set(&led->cdev, led->cdev.brightness);
+ return count;
+}
+
+static ssize_t pause_lo_store(struct device *dev,
+ struct device_attribute *attr,
+ const char *buf, size_t count)
+{
+ struct qpnp_led_data *led;
+ u32 pause_lo;
+ struct led_classdev *led_cdev = dev_get_drvdata(dev);
+ ssize_t ret;
+ u32 previous_pause_lo;
+ struct pwm_config_data *pwm_cfg;
+
+ ret = kstrtou32(buf, 10, &pause_lo);
+ if (ret)
+ return ret;
+ led = container_of(led_cdev, struct qpnp_led_data, cdev);
+
+ switch (led->id) {
+ case QPNP_ID_LED_MPP:
+ pwm_cfg = led->mpp_cfg->pwm_cfg;
+ break;
+ case QPNP_ID_RGB_RED:
+ case QPNP_ID_RGB_GREEN:
+ case QPNP_ID_RGB_BLUE:
+ pwm_cfg = led->rgb_cfg->pwm_cfg;
+ break;
+ default:
+ dev_err(&led->spmi_dev->dev,
+ "Invalid LED id type for pause lo\n");
+ return -EINVAL;
+ }
+
+ if (pwm_cfg->mode == LPG_MODE)
+ pwm_cfg->blinking = true;
+
+ previous_pause_lo = pwm_cfg->lut_params.lut_pause_lo;
+
+ pwm_free(pwm_cfg->pwm_dev);
+ pwm_cfg->lut_params.lut_pause_lo = pause_lo;
+ ret = qpnp_pwm_init(pwm_cfg, led->spmi_dev, led->cdev.name);
+ if (ret) {
+ pwm_cfg->lut_params.lut_pause_lo = previous_pause_lo;
+ pwm_free(pwm_cfg->pwm_dev);
+ qpnp_pwm_init(pwm_cfg, led->spmi_dev, led->cdev.name);
+ qpnp_led_set(&led->cdev, led->cdev.brightness);
+ dev_err(&led->spmi_dev->dev,
+ "Failed to initialize pwm with new pause lo value\n");
+ return ret;
+ }
+ qpnp_led_set(&led->cdev, led->cdev.brightness);
+ return count;
+}
+
+static ssize_t pause_hi_store(struct device *dev,
+ struct device_attribute *attr,
+ const char *buf, size_t count)
+{
+ struct qpnp_led_data *led;
+ u32 pause_hi;
+ struct led_classdev *led_cdev = dev_get_drvdata(dev);
+ ssize_t ret;
+ u32 previous_pause_hi;
+ struct pwm_config_data *pwm_cfg;
+
+ ret = kstrtou32(buf, 10, &pause_hi);
+ if (ret)
+ return ret;
+ led = container_of(led_cdev, struct qpnp_led_data, cdev);
+
+ switch (led->id) {
+ case QPNP_ID_LED_MPP:
+ pwm_cfg = led->mpp_cfg->pwm_cfg;
+ break;
+ case QPNP_ID_RGB_RED:
+ case QPNP_ID_RGB_GREEN:
+ case QPNP_ID_RGB_BLUE:
+ pwm_cfg = led->rgb_cfg->pwm_cfg;
+ break;
+ default:
+ dev_err(&led->spmi_dev->dev,
+ "Invalid LED id type for pause hi\n");
+ return -EINVAL;
+ }
+
+ if (pwm_cfg->mode == LPG_MODE)
+ pwm_cfg->blinking = true;
+
+ previous_pause_hi = pwm_cfg->lut_params.lut_pause_hi;
+
+ pwm_free(pwm_cfg->pwm_dev);
+ pwm_cfg->lut_params.lut_pause_hi = pause_hi;
+ ret = qpnp_pwm_init(pwm_cfg, led->spmi_dev, led->cdev.name);
+ if (ret) {
+ pwm_cfg->lut_params.lut_pause_hi = previous_pause_hi;
+ pwm_free(pwm_cfg->pwm_dev);
+ qpnp_pwm_init(pwm_cfg, led->spmi_dev, led->cdev.name);
+ qpnp_led_set(&led->cdev, led->cdev.brightness);
+ dev_err(&led->spmi_dev->dev,
+ "Failed to initialize pwm with new pause hi value\n");
+ return ret;
+ }
+ qpnp_led_set(&led->cdev, led->cdev.brightness);
+ return count;
+}
+
+static ssize_t start_idx_store(struct device *dev,
+ struct device_attribute *attr,
+ const char *buf, size_t count)
+{
+ struct qpnp_led_data *led;
+ u32 start_idx;
+ struct led_classdev *led_cdev = dev_get_drvdata(dev);
+ ssize_t ret;
+ u32 previous_start_idx;
+ struct pwm_config_data *pwm_cfg;
+
+ ret = kstrtou32(buf, 10, &start_idx);
+ if (ret)
+ return ret;
+ led = container_of(led_cdev, struct qpnp_led_data, cdev);
+
+ switch (led->id) {
+ case QPNP_ID_LED_MPP:
+ pwm_cfg = led->mpp_cfg->pwm_cfg;
+ break;
+ case QPNP_ID_RGB_RED:
+ case QPNP_ID_RGB_GREEN:
+ case QPNP_ID_RGB_BLUE:
+ pwm_cfg = led->rgb_cfg->pwm_cfg;
+ break;
+ default:
+ dev_err(&led->spmi_dev->dev,
+ "Invalid LED id type for start idx\n");
+ return -EINVAL;
+ }
+
+ if (pwm_cfg->mode == LPG_MODE)
+ pwm_cfg->blinking = true;
+
+ previous_start_idx = pwm_cfg->duty_cycles->start_idx;
+ pwm_cfg->duty_cycles->start_idx = start_idx;
+ pwm_cfg->lut_params.start_idx = pwm_cfg->duty_cycles->start_idx;
+ pwm_free(pwm_cfg->pwm_dev);
+ ret = qpnp_pwm_init(pwm_cfg, led->spmi_dev, led->cdev.name);
+ if (ret) {
+ pwm_cfg->duty_cycles->start_idx = previous_start_idx;
+ pwm_cfg->lut_params.start_idx = pwm_cfg->duty_cycles->start_idx;
+ pwm_free(pwm_cfg->pwm_dev);
+ qpnp_pwm_init(pwm_cfg, led->spmi_dev, led->cdev.name);
+ qpnp_led_set(&led->cdev, led->cdev.brightness);
+ dev_err(&led->spmi_dev->dev,
+ "Failed to initialize pwm with new start idx value\n");
+ return ret;
+ }
+ qpnp_led_set(&led->cdev, led->cdev.brightness);
+ return count;
+}
+
+static ssize_t ramp_step_ms_store(struct device *dev,
+ struct device_attribute *attr,
+ const char *buf, size_t count)
+{
+ struct qpnp_led_data *led;
+ u32 ramp_step_ms;
+ struct led_classdev *led_cdev = dev_get_drvdata(dev);
+ ssize_t ret;
+ u32 previous_ramp_step_ms;
+ struct pwm_config_data *pwm_cfg;
+
+ ret = kstrtou32(buf, 10, &ramp_step_ms);
+ if (ret)
+ return ret;
+ led = container_of(led_cdev, struct qpnp_led_data, cdev);
+
+ switch (led->id) {
+ case QPNP_ID_LED_MPP:
+ pwm_cfg = led->mpp_cfg->pwm_cfg;
+ break;
+ case QPNP_ID_RGB_RED:
+ case QPNP_ID_RGB_GREEN:
+ case QPNP_ID_RGB_BLUE:
+ pwm_cfg = led->rgb_cfg->pwm_cfg;
+ break;
+ default:
+ dev_err(&led->spmi_dev->dev,
+ "Invalid LED id type for ramp step\n");
+ return -EINVAL;
+ }
+
+ if (pwm_cfg->mode == LPG_MODE)
+ pwm_cfg->blinking = true;
+
+ previous_ramp_step_ms = pwm_cfg->lut_params.ramp_step_ms;
+
+ pwm_free(pwm_cfg->pwm_dev);
+ pwm_cfg->lut_params.ramp_step_ms = ramp_step_ms;
+ ret = qpnp_pwm_init(pwm_cfg, led->spmi_dev, led->cdev.name);
+ if (ret) {
+ pwm_cfg->lut_params.ramp_step_ms = previous_ramp_step_ms;
+ pwm_free(pwm_cfg->pwm_dev);
+ qpnp_pwm_init(pwm_cfg, led->spmi_dev, led->cdev.name);
+ qpnp_led_set(&led->cdev, led->cdev.brightness);
+ dev_err(&led->spmi_dev->dev,
+ "Failed to initialize pwm with new ramp step value\n");
+ return ret;
+ }
+ qpnp_led_set(&led->cdev, led->cdev.brightness);
+ return count;
+}
+
+static ssize_t lut_flags_store(struct device *dev,
+ struct device_attribute *attr,
+ const char *buf, size_t count)
+{
+ struct qpnp_led_data *led;
+ u32 lut_flags;
+ struct led_classdev *led_cdev = dev_get_drvdata(dev);
+ ssize_t ret;
+ u32 previous_lut_flags;
+ struct pwm_config_data *pwm_cfg;
+
+ ret = kstrtou32(buf, 10, &lut_flags);
+ if (ret)
+ return ret;
+ led = container_of(led_cdev, struct qpnp_led_data, cdev);
+
+ switch (led->id) {
+ case QPNP_ID_LED_MPP:
+ pwm_cfg = led->mpp_cfg->pwm_cfg;
+ break;
+ case QPNP_ID_RGB_RED:
+ case QPNP_ID_RGB_GREEN:
+ case QPNP_ID_RGB_BLUE:
+ pwm_cfg = led->rgb_cfg->pwm_cfg;
+ break;
+ default:
+ dev_err(&led->spmi_dev->dev,
+ "Invalid LED id type for lut flags\n");
+ return -EINVAL;
+ }
+
+ if (pwm_cfg->mode == LPG_MODE)
+ pwm_cfg->blinking = true;
+
+ previous_lut_flags = pwm_cfg->lut_params.flags;
+
+ pwm_free(pwm_cfg->pwm_dev);
+ pwm_cfg->lut_params.flags = lut_flags;
+ ret = qpnp_pwm_init(pwm_cfg, led->spmi_dev, led->cdev.name);
+ if (ret) {
+ pwm_cfg->lut_params.flags = previous_lut_flags;
+ pwm_free(pwm_cfg->pwm_dev);
+ qpnp_pwm_init(pwm_cfg, led->spmi_dev, led->cdev.name);
+ qpnp_led_set(&led->cdev, led->cdev.brightness);
+ dev_err(&led->spmi_dev->dev,
+ "Failed to initialize pwm with new lut flags value\n");
+ return ret;
+ }
+ qpnp_led_set(&led->cdev, led->cdev.brightness);
+ return count;
+}
+
+static ssize_t duty_pcts_store(struct device *dev,
+ struct device_attribute *attr,
+ const char *buf, size_t count)
+{
+ struct qpnp_led_data *led;
+ int num_duty_pcts = 0;
+ struct led_classdev *led_cdev = dev_get_drvdata(dev);
+ char *buffer;
+ ssize_t ret;
+ int i = 0;
+ int max_duty_pcts;
+ struct pwm_config_data *pwm_cfg;
+ u32 previous_num_duty_pcts;
+ int value;
+ int *previous_duty_pcts;
+
+ led = container_of(led_cdev, struct qpnp_led_data, cdev);
+
+ switch (led->id) {
+ case QPNP_ID_LED_MPP:
+ pwm_cfg = led->mpp_cfg->pwm_cfg;
+ max_duty_pcts = PWM_LUT_MAX_SIZE;
+ break;
+ case QPNP_ID_RGB_RED:
+ case QPNP_ID_RGB_GREEN:
+ case QPNP_ID_RGB_BLUE:
+ pwm_cfg = led->rgb_cfg->pwm_cfg;
+ max_duty_pcts = PWM_LUT_MAX_SIZE;
+ break;
+ default:
+ dev_err(&led->spmi_dev->dev,
+ "Invalid LED id type for duty pcts\n");
+ return -EINVAL;
+ }
+
+ if (pwm_cfg->mode == LPG_MODE)
+ pwm_cfg->blinking = true;
+
+ buffer = (char *)buf;
+
+ for (i = 0; i < max_duty_pcts; i++) {
+ if (buffer == NULL)
+ break;
+ ret = sscanf((const char *)buffer, "%u,%s", &value, buffer);
+ pwm_cfg->old_duty_pcts[i] = value;
+ num_duty_pcts++;
+ if (ret <= 1)
+ break;
+ }
+
+ if (num_duty_pcts >= max_duty_pcts) {
+ dev_err(&led->spmi_dev->dev,
+ "Number of duty pcts given exceeds max (%d)\n",
+ max_duty_pcts);
+ return -EINVAL;
+ }
+
+ previous_num_duty_pcts = pwm_cfg->duty_cycles->num_duty_pcts;
+ previous_duty_pcts = pwm_cfg->duty_cycles->duty_pcts;
+
+ pwm_cfg->duty_cycles->num_duty_pcts = num_duty_pcts;
+ pwm_cfg->duty_cycles->duty_pcts = pwm_cfg->old_duty_pcts;
+ pwm_cfg->old_duty_pcts = previous_duty_pcts;
+ pwm_cfg->lut_params.idx_len = pwm_cfg->duty_cycles->num_duty_pcts;
+
+ pwm_free(pwm_cfg->pwm_dev);
+ ret = qpnp_pwm_init(pwm_cfg, led->spmi_dev, led->cdev.name);
+ if (ret)
+ goto restore;
+
+ qpnp_led_set(&led->cdev, led->cdev.brightness);
+ return count;
+
+restore:
+ dev_err(&led->spmi_dev->dev,
+ "Failed to initialize pwm with new duty pcts value\n");
+ pwm_cfg->duty_cycles->num_duty_pcts = previous_num_duty_pcts;
+ pwm_cfg->old_duty_pcts = pwm_cfg->duty_cycles->duty_pcts;
+ pwm_cfg->duty_cycles->duty_pcts = previous_duty_pcts;
+ pwm_cfg->lut_params.idx_len = pwm_cfg->duty_cycles->num_duty_pcts;
+ pwm_free(pwm_cfg->pwm_dev);
+ qpnp_pwm_init(pwm_cfg, led->spmi_dev, led->cdev.name);
+ qpnp_led_set(&led->cdev, led->cdev.brightness);
+ return ret;
+}
+
+static void led_blink(struct qpnp_led_data *led,
+ struct pwm_config_data *pwm_cfg)
+{
+ if (pwm_cfg->use_blink) {
+ if (led->cdev.brightness) {
+ pwm_cfg->blinking = true;
+ if (led->id == QPNP_ID_LED_MPP)
+ led->mpp_cfg->pwm_mode = LPG_MODE;
+ pwm_cfg->mode = LPG_MODE;
+ } else {
+ pwm_cfg->blinking = false;
+ pwm_cfg->mode = pwm_cfg->default_mode;
+ if (led->id == QPNP_ID_LED_MPP)
+ led->mpp_cfg->pwm_mode = pwm_cfg->default_mode;
+ }
+ pwm_free(pwm_cfg->pwm_dev);
+ qpnp_pwm_init(pwm_cfg, led->spmi_dev, led->cdev.name);
+ qpnp_led_set(&led->cdev, led->cdev.brightness);
+ }
+}
+
+static ssize_t blink_store(struct device *dev,
+ struct device_attribute *attr,
+ const char *buf, size_t count)
+{
+ struct qpnp_led_data *led;
+ unsigned long blinking;
+ struct led_classdev *led_cdev = dev_get_drvdata(dev);
+ ssize_t ret = -EINVAL;
+
+ ret = kstrtoul(buf, 10, &blinking);
+ if (ret)
+ return ret;
+ led = container_of(led_cdev, struct qpnp_led_data, cdev);
+ led->cdev.brightness = blinking ? led->cdev.max_brightness : 0;
+
+ switch (led->id) {
+ case QPNP_ID_LED_MPP:
+ led_blink(led, led->mpp_cfg->pwm_cfg);
+ break;
+ case QPNP_ID_RGB_RED:
+ case QPNP_ID_RGB_GREEN:
+ case QPNP_ID_RGB_BLUE:
+ led_blink(led, led->rgb_cfg->pwm_cfg);
+ break;
+ default:
+ dev_err(&led->spmi_dev->dev, "Invalid LED id type for blink\n");
+ return -EINVAL;
+ }
+ return count;
+}
+
static DEVICE_ATTR(led_mode, 0664, NULL, led_mode_store);
static DEVICE_ATTR(strobe, 0664, NULL, led_strobe_type_store);
+static DEVICE_ATTR(pwm_us, 0664, NULL, pwm_us_store);
+static DEVICE_ATTR(pause_lo, 0664, NULL, pause_lo_store);
+static DEVICE_ATTR(pause_hi, 0664, NULL, pause_hi_store);
+static DEVICE_ATTR(start_idx, 0664, NULL, start_idx_store);
+static DEVICE_ATTR(ramp_step_ms, 0664, NULL, ramp_step_ms_store);
+static DEVICE_ATTR(lut_flags, 0664, NULL, lut_flags_store);
+static DEVICE_ATTR(duty_pcts, 0664, NULL, duty_pcts_store);
+static DEVICE_ATTR(blink, 0664, NULL, blink_store);
static struct attribute *led_attrs[] = {
&dev_attr_led_mode.attr,
@@ -1296,6 +1872,38 @@
.attrs = led_attrs,
};
+static struct attribute *pwm_attrs[] = {
+ &dev_attr_pwm_us.attr,
+ NULL
+};
+
+static struct attribute *lpg_attrs[] = {
+ &dev_attr_pause_lo.attr,
+ &dev_attr_pause_hi.attr,
+ &dev_attr_start_idx.attr,
+ &dev_attr_ramp_step_ms.attr,
+ &dev_attr_lut_flags.attr,
+ &dev_attr_duty_pcts.attr,
+ NULL
+};
+
+static struct attribute *blink_attrs[] = {
+ &dev_attr_blink.attr,
+ NULL
+};
+
+static const struct attribute_group pwm_attr_group = {
+ .attrs = pwm_attrs,
+};
+
+static const struct attribute_group lpg_attr_group = {
+ .attrs = lpg_attrs,
+};
+
+static const struct attribute_group blink_attr_group = {
+ .attrs = blink_attrs,
+};
+
static int __devinit qpnp_flash_init(struct qpnp_led_data *led)
{
int rc;
@@ -1387,63 +1995,6 @@
return 0;
}
-static int __devinit qpnp_pwm_init(struct pwm_config_data *pwm_cfg,
- struct spmi_device *spmi_dev,
- const char *name)
-{
- int rc, start_idx, idx_len;
-
- if (pwm_cfg->pwm_channel != -1) {
- pwm_cfg->pwm_dev =
- pwm_request(pwm_cfg->pwm_channel, name);
-
- if (IS_ERR_OR_NULL(pwm_cfg->pwm_dev)) {
- dev_err(&spmi_dev->dev,
- "could not acquire PWM Channel %d, " \
- "error %ld\n",
- pwm_cfg->pwm_channel,
- PTR_ERR(pwm_cfg->pwm_dev));
- pwm_cfg->pwm_dev = NULL;
- return -ENODEV;
- }
-
- if (pwm_cfg->mode == LPG_MODE) {
- start_idx =
- pwm_cfg->duty_cycles->start_idx;
- idx_len =
- pwm_cfg->duty_cycles->num_duty_pcts;
-
- if (idx_len >= PWM_LUT_MAX_SIZE &&
- start_idx) {
- dev_err(&spmi_dev->dev,
- "Wrong LUT size or index\n");
- return -EINVAL;
- }
- if ((start_idx + idx_len) >
- PWM_LUT_MAX_SIZE) {
- dev_err(&spmi_dev->dev,
- "Exceed LUT limit\n");
- return -EINVAL;
- }
- rc = pwm_lut_config(pwm_cfg->pwm_dev,
- PM_PWM_PERIOD_MIN, /* ignored by hardware */
- pwm_cfg->duty_cycles->duty_pcts,
- pwm_cfg->lut_params);
- if (rc < 0) {
- dev_err(&spmi_dev->dev, "Failed to " \
- "configure pwm LUT\n");
- return rc;
- }
- }
- } else {
- dev_err(&spmi_dev->dev,
- "Invalid PWM channel\n");
- return -EINVAL;
- }
-
- return 0;
-}
-
static int __devinit qpnp_kpdbl_init(struct qpnp_led_data *led)
{
int rc;
@@ -1773,11 +2324,18 @@
return -EINVAL;
}
+ led->flash_cfg->torch_enable =
+ of_property_read_bool(node, "qcom,torch-enable");
+
rc = of_property_read_u32(node, "qcom,current", &val);
- if (!rc)
- led->flash_cfg->current_prgm = (val *
+ if (!rc) {
+ if (led->flash_cfg->torch_enable)
+ led->flash_cfg->current_prgm = (val *
+ TORCH_MAX_LEVEL / led->max_current);
+ else
+ led->flash_cfg->current_prgm = (val *
FLASH_MAX_LEVEL / led->max_current);
- else
+ } else
return -EINVAL;
rc = of_property_read_u32(node, "qcom,headroom", &val);
@@ -1816,9 +2374,6 @@
led->flash_cfg->safety_timer =
of_property_read_bool(node, "qcom,safety-timer");
- led->flash_cfg->torch_enable =
- of_property_read_bool(node, "qcom,torch-enable");
-
return 0;
}
@@ -1845,14 +2400,18 @@
return rc;
}
- if (pwm_cfg->mode == LPG_MODE) {
+ pwm_cfg->use_blink =
+ of_property_read_bool(node, "qcom,use-blink");
+
+ if (pwm_cfg->mode == LPG_MODE || pwm_cfg->use_blink) {
pwm_cfg->duty_cycles =
devm_kzalloc(&spmi_dev->dev,
sizeof(struct pwm_duty_cycles), GFP_KERNEL);
if (!pwm_cfg->duty_cycles) {
dev_err(&spmi_dev->dev,
"Unable to allocate memory\n");
- return -ENOMEM;
+ rc = -ENOMEM;
+ goto bad_lpg_params;
}
prop = of_find_property(node, "qcom,duty-pcts",
@@ -1860,21 +2419,35 @@
if (!prop) {
dev_err(&spmi_dev->dev, "Looking up property " \
"node qcom,duty-pcts failed\n");
- return -ENODEV;
+ rc = -ENODEV;
+ goto bad_lpg_params;
} else if (!pwm_cfg->duty_cycles->num_duty_pcts) {
dev_err(&spmi_dev->dev, "Invalid length of " \
"duty pcts\n");
- return -EINVAL;
+ rc = -EINVAL;
+ goto bad_lpg_params;
}
pwm_cfg->duty_cycles->duty_pcts =
devm_kzalloc(&spmi_dev->dev,
- sizeof(int) * pwm_cfg->duty_cycles->num_duty_pcts,
+ sizeof(int) * PWM_LUT_MAX_SIZE,
GFP_KERNEL);
if (!pwm_cfg->duty_cycles->duty_pcts) {
dev_err(&spmi_dev->dev,
"Unable to allocate memory\n");
- return -ENOMEM;
+ rc = -ENOMEM;
+ goto bad_lpg_params;
+ }
+
+ pwm_cfg->old_duty_pcts =
+ devm_kzalloc(&spmi_dev->dev,
+ sizeof(int) * PWM_LUT_MAX_SIZE,
+ GFP_KERNEL);
+ if (!pwm_cfg->old_duty_pcts) {
+ dev_err(&spmi_dev->dev,
+ "Unable to allocate memory\n");
+ rc = -ENOMEM;
+ goto bad_lpg_params;
}
temp_cfg = devm_kzalloc(&spmi_dev->dev,
@@ -1883,7 +2456,8 @@
if (!temp_cfg) {
dev_err(&spmi_dev->dev, "Failed to allocate " \
"memory for duty pcts\n");
- return -ENOMEM;
+ rc = -ENOMEM;
+ goto bad_lpg_params;
}
memcpy(temp_cfg, prop->value,
@@ -1898,21 +2472,21 @@
pwm_cfg->lut_params.start_idx = val;
pwm_cfg->duty_cycles->start_idx = val;
} else
- return rc;
+ goto bad_lpg_params;
pwm_cfg->lut_params.lut_pause_hi = 0;
rc = of_property_read_u32(node, "qcom,pause-hi", &val);
if (!rc)
pwm_cfg->lut_params.lut_pause_hi = val;
else if (rc != -EINVAL)
- return rc;
+ goto bad_lpg_params;
pwm_cfg->lut_params.lut_pause_lo = 0;
rc = of_property_read_u32(node, "qcom,pause-lo", &val);
if (!rc)
pwm_cfg->lut_params.lut_pause_lo = val;
else if (rc != -EINVAL)
- return rc;
+ goto bad_lpg_params;
pwm_cfg->lut_params.ramp_step_ms =
QPNP_LUT_RAMP_STEP_DEFAULT;
@@ -1920,19 +2494,28 @@
if (!rc)
pwm_cfg->lut_params.ramp_step_ms = val;
else if (rc != -EINVAL)
- return rc;
+ goto bad_lpg_params;
pwm_cfg->lut_params.flags = QPNP_LED_PWM_FLAGS;
rc = of_property_read_u32(node, "qcom,lut-flags", &val);
if (!rc)
pwm_cfg->lut_params.flags = (u8) val;
else if (rc != -EINVAL)
- return rc;
+ goto bad_lpg_params;
pwm_cfg->lut_params.idx_len =
pwm_cfg->duty_cycles->num_duty_pcts;
}
return 0;
+
+bad_lpg_params:
+ pwm_cfg->use_blink = false;
+ if (pwm_cfg->mode == PWM_MODE) {
+ dev_err(&spmi_dev->dev, "LPG parameters not set for" \
+ " blink mode, defaulting to PWM mode\n");
+ return 0;
+ }
+ return rc;
};
static int qpnp_led_get_mode(const char *mode)
@@ -1978,6 +2561,7 @@
return -ENOMEM;
}
led->kpdbl_cfg->pwm_cfg->mode = led_mode;
+ led->kpdbl_cfg->pwm_cfg->default_mode = led_mode;
} else
return rc;
@@ -2046,6 +2630,7 @@
return -ENOMEM;
}
led->rgb_cfg->pwm_cfg->mode = led_mode;
+ led->rgb_cfg->pwm_cfg->default_mode = led_mode;
} else
return rc;
@@ -2112,6 +2697,7 @@
return -ENOMEM;
}
led->mpp_cfg->pwm_cfg->mode = led_mode;
+ led->mpp_cfg->pwm_cfg->default_mode = led_mode;
} else
return rc;
@@ -2247,7 +2833,8 @@
goto fail_id_check;
}
- spin_lock_init(&led->lock);
+ mutex_init(&led->lock);
+ INIT_WORK(&led->work, qpnp_led_work);
rc = qpnp_led_initialize(led);
if (rc < 0)
@@ -2273,10 +2860,63 @@
}
+ if (led->id == QPNP_ID_LED_MPP) {
+ if (!led->mpp_cfg->pwm_cfg)
+ break;
+ if (led->mpp_cfg->pwm_cfg->mode == PWM_MODE) {
+ rc = sysfs_create_group(&led->cdev.dev->kobj,
+ &pwm_attr_group);
+ if (rc)
+ goto fail_id_check;
+ }
+ if (led->mpp_cfg->pwm_cfg->use_blink) {
+ rc = sysfs_create_group(&led->cdev.dev->kobj,
+ &blink_attr_group);
+ if (rc)
+ goto fail_id_check;
+
+ rc = sysfs_create_group(&led->cdev.dev->kobj,
+ &lpg_attr_group);
+ if (rc)
+ goto fail_id_check;
+ } else if (led->mpp_cfg->pwm_cfg->mode == LPG_MODE) {
+ rc = sysfs_create_group(&led->cdev.dev->kobj,
+ &lpg_attr_group);
+ if (rc)
+ goto fail_id_check;
+ }
+ } else if ((led->id == QPNP_ID_RGB_RED) ||
+ (led->id == QPNP_ID_RGB_GREEN) ||
+ (led->id == QPNP_ID_RGB_BLUE)) {
+ if (led->rgb_cfg->pwm_cfg->mode == PWM_MODE) {
+ rc = sysfs_create_group(&led->cdev.dev->kobj,
+ &pwm_attr_group);
+ if (rc)
+ goto fail_id_check;
+ }
+ if (led->rgb_cfg->pwm_cfg->use_blink) {
+ rc = sysfs_create_group(&led->cdev.dev->kobj,
+ &blink_attr_group);
+ if (rc)
+ goto fail_id_check;
+
+ rc = sysfs_create_group(&led->cdev.dev->kobj,
+ &lpg_attr_group);
+ if (rc)
+ goto fail_id_check;
+ } else if (led->rgb_cfg->pwm_cfg->mode == LPG_MODE) {
+ rc = sysfs_create_group(&led->cdev.dev->kobj,
+ &lpg_attr_group);
+ if (rc)
+ goto fail_id_check;
+ }
+ }
+
/* configure default state */
if (led->default_on) {
led->cdev.brightness = led->cdev.max_brightness;
- qpnp_led_set(&led->cdev, led->cdev.brightness);
+ __qpnp_led_work(led, led->cdev.brightness);
+ schedule_work(&led->work);
if (led->turn_off_delay_ms > 0)
qpnp_led_turn_off(led);
} else
@@ -2288,8 +2928,11 @@
return 0;
fail_id_check:
- for (i = 0; i < parsed_leds; i++)
+ for (i = 0; i < parsed_leds; i++) {
+ mutex_destroy(&led_array[i].lock);
led_classdev_unregister(&led_array[i].cdev);
+ }
+
return rc;
}
@@ -2299,6 +2942,8 @@
int i, parsed_leds = led_array->num_leds;
for (i = 0; i < parsed_leds; i++) {
+ cancel_work_sync(&led_array[i].work);
+ mutex_destroy(&led_array[i].lock);
led_classdev_unregister(&led_array[i].cdev);
switch (led_array[i].id) {
case QPNP_ID_WLED:
@@ -2314,6 +2959,35 @@
case QPNP_ID_RGB_RED:
case QPNP_ID_RGB_GREEN:
case QPNP_ID_RGB_BLUE:
+ if (led_array[i].rgb_cfg->pwm_cfg->mode == PWM_MODE)
+ sysfs_remove_group(&led_array[i].cdev.dev->\
+ kobj, &pwm_attr_group);
+ if (led_array[i].rgb_cfg->pwm_cfg->use_blink) {
+ sysfs_remove_group(&led_array[i].cdev.dev->\
+ kobj, &blink_attr_group);
+ sysfs_remove_group(&led_array[i].cdev.dev->\
+ kobj, &lpg_attr_group);
+ } else if (led_array[i].rgb_cfg->pwm_cfg->mode\
+ == LPG_MODE)
+ sysfs_remove_group(&led_array[i].cdev.dev->\
+ kobj, &lpg_attr_group);
+ break;
+ case QPNP_ID_LED_MPP:
+ if (!led_array[i].mpp_cfg->pwm_cfg)
+ break;
+ if (led_array[i].mpp_cfg->pwm_cfg->mode == PWM_MODE)
+ sysfs_remove_group(&led_array[i].cdev.dev->\
+ kobj, &pwm_attr_group);
+ if (led_array[i].mpp_cfg->pwm_cfg->use_blink) {
+ sysfs_remove_group(&led_array[i].cdev.dev->\
+ kobj, &blink_attr_group);
+ sysfs_remove_group(&led_array[i].cdev.dev->\
+ kobj, &lpg_attr_group);
+ } else if (led_array[i].mpp_cfg->pwm_cfg->mode\
+ == LPG_MODE)
+ sysfs_remove_group(&led_array[i].cdev.dev->\
+ kobj, &lpg_attr_group);
+ break;
default:
dev_err(&led_array[i].spmi_dev->dev,
"Invalid LED(%d)\n",
diff --git a/drivers/media/dvb/dvb-core/dmxdev.c b/drivers/media/dvb/dvb-core/dmxdev.c
index 6734da8..28e8092 100644
--- a/drivers/media/dvb/dvb-core/dmxdev.c
+++ b/drivers/media/dvb/dvb-core/dmxdev.c
@@ -1067,6 +1067,41 @@
wake_up_all(&cmdbuf->queue);
}
+static int dvb_dvr_external_input_only(struct dmxdev *dmxdev)
+{
+ struct dmx_caps caps;
+ int is_external_only;
+ int flags;
+ size_t tsp_size;
+
+ if (dmxdev->demux->get_tsp_size)
+ tsp_size = dmxdev->demux->get_tsp_size(dmxdev->demux);
+ else
+ tsp_size = 188;
+
+ /*
+ * For backward compatibility, default assumes that
+ * external only buffers are not supported.
+ */
+ flags = 0;
+ if (dmxdev->demux->get_caps) {
+ dmxdev->demux->get_caps(dmxdev->demux, &caps);
+
+ if (tsp_size == 188)
+ flags = caps.playback_188_tsp.flags;
+ else
+ flags = caps.playback_192_tsp.flags;
+ }
+
+ if (!(flags & DMX_BUFFER_INTERNAL_SUPPORT) &&
+ (flags & DMX_BUFFER_EXTERNAL_SUPPORT))
+ is_external_only = 1;
+ else
+ is_external_only = 0;
+
+ return is_external_only;
+}
+
static ssize_t dvb_dvr_write(struct file *file, const char __user *buf,
size_t count, loff_t *ppos)
{
@@ -1082,7 +1117,9 @@
return -EOPNOTSUPP;
if (((file->f_flags & O_ACCMODE) == O_RDONLY) ||
- (!src->data) || (!cmdbuf->data))
+ !src->data || !cmdbuf->data ||
+ (dvb_dvr_external_input_only(dmxdev) &&
+ (dmxdev->dvr_input_buffer_mode == DMX_BUFFER_MODE_INTERNAL)))
return -EINVAL;
if ((file->f_flags & O_NONBLOCK) &&
@@ -1238,7 +1275,7 @@
if (buf->size == size)
return 0;
- if ((!size) || (buffer_mode == DMX_BUFFER_MODE_EXTERNAL))
+ if (!size || (buffer_mode == DMX_BUFFER_MODE_EXTERNAL))
return -EINVAL;
newmem = vmalloc_user(size);
@@ -1282,10 +1319,6 @@
(mode != DMX_BUFFER_MODE_EXTERNAL))
return -EINVAL;
- if ((mode == DMX_BUFFER_MODE_INTERNAL) &&
- (dmxdev->capabilities & DMXDEV_CAP_EXTERNAL_BUFFS_ONLY))
- return -EINVAL;
-
if ((mode == DMX_BUFFER_MODE_EXTERNAL) &&
(!dmxdev->demux->map_buffer || !dmxdev->demux->unmap_buffer))
return -EINVAL;
@@ -1543,7 +1576,8 @@
if (buf->size == size)
return 0;
- if ((!size) || (dmxdevfilter->buffer_mode == DMX_BUFFER_MODE_EXTERNAL))
+ if (!size ||
+ (dmxdevfilter->buffer_mode == DMX_BUFFER_MODE_EXTERNAL))
return -EINVAL;
if (dmxdevfilter->state >= DMXDEV_STATE_GO)
return -EBUSY;
@@ -1580,10 +1614,6 @@
(mode != DMX_BUFFER_MODE_EXTERNAL))
return -EINVAL;
- if ((mode == DMX_BUFFER_MODE_INTERNAL) &&
- (dmxdev->capabilities & DMXDEV_CAP_EXTERNAL_BUFFS_ONLY))
- return -EINVAL;
-
if ((mode == DMX_BUFFER_MODE_EXTERNAL) &&
(!dmxdev->demux->map_buffer || !dmxdev->demux->unmap_buffer))
return -EINVAL;
@@ -1765,8 +1795,15 @@
int found_pid;
struct dmxdev_feed *feed;
struct dmxdev_feed *ts_feed = NULL;
+ struct dmx_caps caps;
+
+ if (!dmxdevfilter->dev->demux->get_caps)
+ return -EINVAL;
+
+ dmxdevfilter->dev->demux->get_caps(dmxdevfilter->dev->demux, &caps);
if (!idx_params ||
+ !(caps.caps & DMX_CAP_VIDEO_INDEXING) ||
(dmxdevfilter->state < DMXDEV_STATE_SET) ||
(dmxdevfilter->type != DMXDEV_TYPE_PES) ||
((dmxdevfilter->params.pes.output != DMX_OUT_TS_TAP) &&
@@ -1907,10 +1944,16 @@
int first_buffer;
struct dmxdev_feed *feed;
struct ts_insertion_buffer *ts_buffer;
+ struct dmx_caps caps;
+
+ if (!dmxdevfilter->dev->demux->get_caps)
+ return -EINVAL;
+
+ dmxdevfilter->dev->demux->get_caps(dmxdevfilter->dev->demux, &caps);
if (!params ||
!params->size ||
- !(dmxdevfilter->dev->capabilities & DMXDEV_CAP_TS_INSERTION) ||
+ !(caps.caps & DMX_CAP_TS_INSERTION) ||
(dmxdevfilter->state < DMXDEV_STATE_SET) ||
(dmxdevfilter->type != DMXDEV_TYPE_PES) ||
((dmxdevfilter->params.pes.output != DMX_OUT_TS_TAP) &&
@@ -1974,9 +2017,15 @@
int found_buffer;
struct dmxdev_feed *feed;
struct ts_insertion_buffer *ts_buffer, *tmp;
+ struct dmx_caps caps;
+
+ if (!dmxdevfilter->dev->demux->get_caps)
+ return -EINVAL;
+
+ dmxdevfilter->dev->demux->get_caps(dmxdevfilter->dev->demux, &caps);
if (!params ||
- !(dmxdevfilter->dev->capabilities & DMXDEV_CAP_TS_INSERTION) ||
+ !(caps.caps & DMX_CAP_TS_INSERTION) ||
(dmxdevfilter->state < DMXDEV_STATE_SET) ||
(dmxdevfilter->type != DMXDEV_TYPE_PES) ||
((dmxdevfilter->params.pes.output != DMX_OUT_TS_TAP) &&
@@ -2122,15 +2171,21 @@
enum dmx_playback_mode_t playback_mode)
{
struct dmxdev *dmxdev = dmxdevfilter->dev;
+ struct dmx_caps caps;
+
+ if (dmxdev->demux->get_caps)
+ dmxdev->demux->get_caps(dmxdev->demux, &caps);
+ else
+ caps.caps = 0;
if ((playback_mode != DMX_PB_MODE_PUSH) &&
(playback_mode != DMX_PB_MODE_PULL))
return -EINVAL;
if (((dmxdev->source < DMX_SOURCE_DVR0) ||
- !dmxdev->demux->set_playback_mode ||
- !(dmxdev->capabilities & DMXDEV_CAP_PULL_MODE)) &&
- (playback_mode == DMX_PB_MODE_PULL))
+ !dmxdev->demux->set_playback_mode ||
+ !(caps.caps & DMX_CAP_PULL_MODE)) &&
+ (playback_mode == DMX_PB_MODE_PULL))
return -EPERM;
if (dmxdevfilter->state == DMXDEV_STATE_GO)
@@ -3083,6 +3138,43 @@
return 0;
}
+static int dvb_filter_external_buffer_only(struct dmxdev *dmxdev,
+ struct dmxdev_filter *filter)
+{
+ struct dmx_caps caps;
+ int is_external_only;
+ int flags;
+
+ /*
+ * For backward compatibility, default assumes that
+ * external only buffers are not supported.
+ */
+ flags = 0;
+ if (dmxdev->demux->get_caps) {
+ dmxdev->demux->get_caps(dmxdev->demux, &caps);
+
+ if (filter->type == DMXDEV_TYPE_SEC)
+ flags = caps.section.flags;
+ else if (filter->params.pes.output == DMX_OUT_DECODER)
+ /* For decoder filters dmxdev buffer is not required */
+ flags = 0;
+ else if (filter->params.pes.output == DMX_OUT_TAP)
+ flags = caps.pes.flags;
+ else if (filter->dmx_tsp_format == DMX_TSP_FORMAT_188)
+ flags = caps.recording_188_tsp.flags;
+ else
+ flags = caps.recording_192_tsp.flags;
+ }
+
+ if (!(flags & DMX_BUFFER_INTERNAL_SUPPORT) &&
+ (flags & DMX_BUFFER_EXTERNAL_SUPPORT))
+ is_external_only = 1;
+ else
+ is_external_only = 0;
+
+ return is_external_only;
+}
+
static int dvb_dmxdev_filter_start(struct dmxdev_filter *filter)
{
struct dmxdev *dmxdev = filter->dev;
@@ -3098,14 +3190,18 @@
if (!filter->buffer.data) {
if ((filter->buffer_mode == DMX_BUFFER_MODE_EXTERNAL) ||
- (dmxdev->capabilities & DMXDEV_CAP_EXTERNAL_BUFFS_ONLY))
+ dvb_filter_external_buffer_only(dmxdev, filter))
return -ENOMEM;
+
mem = vmalloc_user(filter->buffer.size);
if (!mem)
return -ENOMEM;
spin_lock_irq(&filter->dev->lock);
filter->buffer.data = mem;
spin_unlock_irq(&filter->dev->lock);
+ } else if ((filter->buffer_mode == DMX_BUFFER_MODE_INTERNAL) &&
+ dvb_filter_external_buffer_only(dmxdev, filter)) {
+ return -ENOMEM;
}
filter->eos_state = 0;
@@ -3577,10 +3673,13 @@
struct dmx_decoder_buffers *dec_buffs;
struct dmx_caps caps;
- if (NULL == dmxdev || NULL == filter || NULL == buffs)
+ if (!dmxdev || !filter || !buffs)
return -EINVAL;
dec_buffs = &filter->decoder_buffers;
+ if (!dmxdev->demux->get_caps)
+ return -EINVAL;
+
dmxdev->demux->get_caps(dmxdev->demux, &caps);
if ((buffs->buffers_size == 0) ||
diff --git a/drivers/media/dvb/dvb-core/dmxdev.h b/drivers/media/dvb/dvb-core/dmxdev.h
index 49e5e1b..4e306e8 100644
--- a/drivers/media/dvb/dvb-core/dmxdev.h
+++ b/drivers/media/dvb/dvb-core/dmxdev.h
@@ -196,11 +196,6 @@
int filternum;
int capabilities;
#define DMXDEV_CAP_DUPLEX 0x01
-#define DMXDEV_CAP_PULL_MODE 0x02
-#define DMXDEV_CAP_INDEXING 0x04
-#define DMXDEV_CAP_EXTERNAL_BUFFS_ONLY 0x08
-#define DMXDEV_CAP_TS_INSERTION 0x10
-
enum dmx_playback_mode_t playback_mode;
dmx_source_t source;
diff --git a/drivers/media/dvb/dvb-core/dvb_demux.c b/drivers/media/dvb/dvb-core/dvb_demux.c
index bd4344b..bbf2470 100644
--- a/drivers/media/dvb/dvb-core/dvb_demux.c
+++ b/drivers/media/dvb/dvb-core/dvb_demux.c
@@ -1893,7 +1893,7 @@
(feed->idx_params.types &
(DMX_IDX_H264_IDR_START | DMX_IDX_H264_IDR_END |
DMX_IDX_H264_NON_IDR_END |
- DMX_IDX_H264_FIRST_SPS_FRAME_END |
+ DMX_IDX_H264_FIRST_SPS_FRAME_START |
DMX_IDX_H264_FIRST_SPS_FRAME_END))) {
feed->patterns[feed->pattern_num] =
dvb_dmx_get_pattern(DMX_IDX_H264_IDR_START);
@@ -1905,7 +1905,7 @@
(feed->idx_params.types &
(DMX_IDX_H264_NON_IDR_START | DMX_IDX_H264_NON_IDR_END |
DMX_IDX_H264_IDR_END |
- DMX_IDX_H264_FIRST_SPS_FRAME_END |
+ DMX_IDX_H264_FIRST_SPS_FRAME_START |
DMX_IDX_H264_FIRST_SPS_FRAME_END))) {
feed->patterns[feed->pattern_num] =
dvb_dmx_get_pattern(DMX_IDX_H264_NON_IDR_START);
diff --git a/drivers/media/platform/msm/camera_v2/Kconfig b/drivers/media/platform/msm/camera_v2/Kconfig
index 525a545..ec2e381 100644
--- a/drivers/media/platform/msm/camera_v2/Kconfig
+++ b/drivers/media/platform/msm/camera_v2/Kconfig
@@ -137,6 +137,15 @@
hfr video at 60, 90 and 120 fps. This sensor driver does
not support auto focus.
+config HI256
+ bool "Hynix hi256 (YUV 2MP)"
+ depends on MSMB_CAMERA
+ ---help---
+ OmniVision 8 MP Bayer Sensor with auto focus.uses
+ 2 mipi lanes, preview config = 1632*1224 30 fps,
+ snapshot config = 3264 * 2448 at 18 fps.
+ 2 lanes max fps is 18, 4 lanes max fps is 24.
+
config MT9M114
bool "Sensor MT9M114 (YUV 1.26MP)"
depends on MSMB_CAMERA
@@ -146,6 +155,24 @@
1280 * 270. It does not support auto focus. It supports
few special effects like saturation.
+config SP1628
+ bool "Sensor SP1628 (YUV 720P)"
+ depends on MSMB_CAMERA
+ ---help---
+ SP1628 is SuperPix YUV sensor. It supports 720P preview
+ and snapshot. The preview and snapshot resolution shall be
+ 1280 * 270. It does not support auto focus. It supports
+ few special effects like mono.
+
+config GC0339
+ bool "Sensor GC0339 (BAYER .3M)"
+ depends on MSMB_CAMERA
+ ---help---
+ gc0339 is a Galaxycore .3 MP Bayer Sensor.
+ It supports 1 or 2 mipi lanes.
+ Preview and snapshot resolution shall be 640*480 at 30 fps,
+ It does not support auto focus.
+
config OV8825
bool "OmniVision OV8825 (BAYER 8MP)"
depends on MSMB_CAMERA
diff --git a/drivers/media/platform/msm/camera_v2/camera/camera.c b/drivers/media/platform/msm/camera_v2/camera/camera.c
index 08fa7dd..d3618c0 100644
--- a/drivers/media/platform/msm/camera_v2/camera/camera.c
+++ b/drivers/media/platform/msm/camera_v2/camera/camera.c
@@ -462,7 +462,7 @@
filep->private_data = &sp->fh;
/* stream_id = open id */
- sp->stream_id = atomic_read(&pvdev->opened);
+ sp->stream_id = atomic_read(&pvdev->stream_cnt);
v4l2_fh_init(&sp->fh, pvdev->vdev);
v4l2_fh_add(&sp->fh);
@@ -553,12 +553,13 @@
goto post_fail;
} else {
rc = msm_create_command_ack_q(pvdev->vdev->num,
- atomic_read(&pvdev->opened));
+ atomic_read(&pvdev->stream_cnt));
if (rc < 0)
goto session_fail;
}
atomic_add(1, &pvdev->opened);
+ atomic_add(1, &pvdev->stream_cnt);
return rc;
post_fail:
@@ -615,6 +616,7 @@
/* This should take care of both normal close
* and application crashes */
msm_destroy_session(pvdev->vdev->num);
+ atomic_set(&pvdev->stream_cnt, 0);
} else {
camera_pack_event(filep, MSM_CAMERA_SET_PARM,
@@ -714,6 +716,7 @@
*session = pvdev->vdev->num;
atomic_set(&pvdev->opened, 0);
+ atomic_set(&pvdev->stream_cnt, 0);
video_set_drvdata(pvdev->vdev, pvdev);
goto init_end;
diff --git a/drivers/media/platform/msm/camera_v2/isp/msm_isp.c b/drivers/media/platform/msm/camera_v2/isp/msm_isp.c
index ff9c9b8..2c5e136 100644
--- a/drivers/media/platform/msm/camera_v2/isp/msm_isp.c
+++ b/drivers/media/platform/msm/camera_v2/isp/msm_isp.c
@@ -38,6 +38,10 @@
.compatible = "qcom,vfe40",
.data = &vfe40_hw_info,
},
+ {
+ .compatible = "qcom,vfe32",
+ .data = &vfe32_hw_info,
+ },
{}
};
diff --git a/drivers/media/platform/msm/camera_v2/isp/msm_isp.h b/drivers/media/platform/msm/camera_v2/isp/msm_isp.h
index cf03c7f..f1f4c17 100644
--- a/drivers/media/platform/msm/camera_v2/isp/msm_isp.h
+++ b/drivers/media/platform/msm/camera_v2/isp/msm_isp.h
@@ -419,6 +419,7 @@
struct msm_vfe_error_info error_info;
struct msm_isp_buf_mgr *buf_mgr;
int dump_reg;
+ int vfe_clk_idx;
uint32_t vfe_open_cnt;
};
diff --git a/drivers/media/platform/msm/camera_v2/isp/msm_isp32.c b/drivers/media/platform/msm/camera_v2/isp/msm_isp32.c
index 73b4f4d..4c5f258 100644
--- a/drivers/media/platform/msm/camera_v2/isp/msm_isp32.c
+++ b/drivers/media/platform/msm/camera_v2/isp/msm_isp32.c
@@ -22,7 +22,7 @@
#include "msm.h"
#include "msm_camera_io_util.h"
-#define VFE32_BURST_LEN 3
+#define VFE32_BURST_LEN 1
#define VFE32_UB_SIZE 1024
#define VFE32_EQUAL_SLICE_UB 204
#define VFE32_WM_BASE(idx) (0x4C + 0x18 * idx)
@@ -40,7 +40,17 @@
(~(ping_pong >> (idx + VFE32_STATS_PING_PONG_OFFSET)) & 0x1))
#define VFE32_CLK_IDX 0
-static struct msm_cam_clk_info msm_vfe32_clk_info[] = {
+static struct msm_cam_clk_info msm_vfe32_1_clk_info[] = {
+ /*vfe32 clock info for B-family: 8610 */
+ {"vfe_clk_src", 266670000},
+ {"vfe_clk", -1},
+ {"vfe_ahb_clk", -1},
+ {"csi_vfe_clk", -1},
+ {"bus_clk", -1},
+};
+
+static struct msm_cam_clk_info msm_vfe32_2_clk_info[] = {
+ /*vfe32 clock info for A-family: 8960 */
{"vfe_clk", 266667000},
{"vfe_pclk", -1},
{"csi_vfe_clk", -1},
@@ -49,6 +59,7 @@
static int msm_vfe32_init_hardware(struct vfe_device *vfe_dev)
{
int rc = -1;
+ vfe_dev->vfe_clk_idx = 0;
rc = msm_isp_init_bandwidth_mgr(ISP_VFE0 + vfe_dev->pdev->id);
if (rc < 0) {
pr_err("%s: Bandwidth registration Failed!\n", __func__);
@@ -63,10 +74,18 @@
}
}
- rc = msm_cam_clk_enable(&vfe_dev->pdev->dev, msm_vfe32_clk_info,
- vfe_dev->vfe_clk, ARRAY_SIZE(msm_vfe32_clk_info), 1);
- if (rc < 0)
- goto clk_enable_failed;
+ rc = msm_cam_clk_enable(&vfe_dev->pdev->dev, msm_vfe32_1_clk_info,
+ vfe_dev->vfe_clk, ARRAY_SIZE(msm_vfe32_1_clk_info), 1);
+ if (rc < 0) {
+ rc = msm_cam_clk_enable(&vfe_dev->pdev->dev,
+ msm_vfe32_2_clk_info, vfe_dev->vfe_clk,
+ ARRAY_SIZE(msm_vfe32_2_clk_info), 1);
+ if (rc < 0)
+ goto clk_enable_failed;
+ else
+ vfe_dev->vfe_clk_idx = 2;
+ } else
+ vfe_dev->vfe_clk_idx = 1;
vfe_dev->vfe_base = ioremap(vfe_dev->vfe_mem->start,
resource_size(vfe_dev->vfe_mem));
@@ -87,8 +106,14 @@
irq_req_failed:
iounmap(vfe_dev->vfe_base);
vfe_remap_failed:
- msm_cam_clk_enable(&vfe_dev->pdev->dev, msm_vfe32_clk_info,
- vfe_dev->vfe_clk, ARRAY_SIZE(msm_vfe32_clk_info), 0);
+ if (vfe_dev->vfe_clk_idx == 1)
+ msm_cam_clk_enable(&vfe_dev->pdev->dev,
+ msm_vfe32_1_clk_info, vfe_dev->vfe_clk,
+ ARRAY_SIZE(msm_vfe32_1_clk_info), 0);
+ if (vfe_dev->vfe_clk_idx == 2)
+ msm_cam_clk_enable(&vfe_dev->pdev->dev,
+ msm_vfe32_2_clk_info, vfe_dev->vfe_clk,
+ ARRAY_SIZE(msm_vfe32_2_clk_info), 0);
clk_enable_failed:
regulator_disable(vfe_dev->fs_vfe);
fs_failed:
@@ -102,8 +127,14 @@
free_irq(vfe_dev->vfe_irq->start, vfe_dev);
tasklet_kill(&vfe_dev->vfe_tasklet);
iounmap(vfe_dev->vfe_base);
- msm_cam_clk_enable(&vfe_dev->pdev->dev, msm_vfe32_clk_info,
- vfe_dev->vfe_clk, ARRAY_SIZE(msm_vfe32_clk_info), 0);
+ if (vfe_dev->vfe_clk_idx == 1)
+ msm_cam_clk_enable(&vfe_dev->pdev->dev,
+ msm_vfe32_1_clk_info, vfe_dev->vfe_clk,
+ ARRAY_SIZE(msm_vfe32_1_clk_info), 0);
+ if (vfe_dev->vfe_clk_idx == 2)
+ msm_cam_clk_enable(&vfe_dev->pdev->dev,
+ msm_vfe32_2_clk_info, vfe_dev->vfe_clk,
+ ARRAY_SIZE(msm_vfe32_2_clk_info), 0);
regulator_disable(vfe_dev->fs_vfe);
msm_isp_deinit_bandwidth_mgr(ISP_VFE0 + vfe_dev->pdev->id);
}
@@ -330,7 +361,18 @@
static void msm_vfe32_axi_reload_wm(
struct vfe_device *vfe_dev, uint32_t reload_mask)
{
- msm_camera_io_w_mb(reload_mask, vfe_dev->vfe_base + 0x38);
+ if (!vfe_dev->pdev->dev.of_node) {
+ /*vfe32 A-family: 8960*/
+ msm_camera_io_w_mb(reload_mask, vfe_dev->vfe_base + 0x38);
+ } else {
+ /*vfe32 B-family: 8610*/
+ msm_camera_io_w(0x0, vfe_dev->vfe_base + 0x24);
+ msm_camera_io_w(0x0, vfe_dev->vfe_base + 0x28);
+ msm_camera_io_w(0x0, vfe_dev->vfe_base + 0x20);
+ msm_camera_io_w_mb(0x1, vfe_dev->vfe_base + 0x18);
+ msm_camera_io_w(0x9AAAAAAA , vfe_dev->vfe_base + 0x600);
+ msm_camera_io_w(reload_mask, vfe_dev->vfe_base + 0x38);
+ }
}
static void msm_vfe32_axi_enable_wm(struct vfe_device *vfe_dev,
@@ -914,14 +956,22 @@
goto vfe_no_resource;
}
- vfe_dev->iommu_ctx[0] = msm_iommu_get_ctx("vfe_imgwr");
+ if (!vfe_dev->pdev->dev.of_node)
+ vfe_dev->iommu_ctx[0] = msm_iommu_get_ctx("vfe_imgwr");
+ else
+ vfe_dev->iommu_ctx[0] = msm_iommu_get_ctx("vfe0");
+
if (!vfe_dev->iommu_ctx[0]) {
pr_err("%s: no iommux ctx resource?\n", __func__);
rc = -ENODEV;
goto vfe_no_resource;
}
- vfe_dev->iommu_ctx[1] = msm_iommu_get_ctx("vfe_misc");
+ if (!vfe_dev->pdev->dev.of_node)
+ vfe_dev->iommu_ctx[1] = msm_iommu_get_ctx("vfe_misc");
+ else
+ vfe_dev->iommu_ctx[1] = msm_iommu_get_ctx("vfe0");
+
if (!vfe_dev->iommu_ctx[1]) {
pr_err("%s: no iommux ctx resource?\n", __func__);
rc = -ENODEV;
diff --git a/drivers/media/platform/msm/camera_v2/isp/msm_isp40.c b/drivers/media/platform/msm/camera_v2/isp/msm_isp40.c
index 1f9afd8..cb8d821 100644
--- a/drivers/media/platform/msm/camera_v2/isp/msm_isp40.c
+++ b/drivers/media/platform/msm/camera_v2/isp/msm_isp40.c
@@ -12,6 +12,7 @@
#include <linux/module.h>
#include <mach/iommu.h>
+#include <linux/ratelimit.h>
#include "msm_isp40.h"
#include "msm_isp_util.h"
@@ -31,7 +32,9 @@
#define VFE40_8974V1_VERSION 0x10000018
#define VFE40_8974V2_VERSION 0x1001001A
+#define VFE40_8974V3_VERSION 0x1001001B
#define VFE40_8x26_VERSION 0x20000013
+#define VFE40_8x26V2_VERSION 0x20010014
#define VFE40_BURST_LEN 3
#define VFE40_STATS_BURST_LEN 2
@@ -91,8 +94,10 @@
static void msm_vfe40_init_qos_parms(struct vfe_device *vfe_dev)
{
void __iomem *vfebase = vfe_dev->vfe_base;
+
if (vfe_dev->vfe_hw_version == VFE40_8974V1_VERSION ||
- vfe_dev->vfe_hw_version == VFE40_8x26_VERSION) {
+ vfe_dev->vfe_hw_version == VFE40_8x26_VERSION ||
+ vfe_dev->vfe_hw_version == VFE40_8x26V2_VERSION) {
msm_camera_io_w(0xAAAAAAAA, vfebase + VFE40_BUS_BDG_QOS_CFG_0);
msm_camera_io_w(0xAAAAAAAA, vfebase + VFE40_BUS_BDG_QOS_CFG_1);
msm_camera_io_w(0xAAAAAAAA, vfebase + VFE40_BUS_BDG_QOS_CFG_2);
@@ -101,7 +106,8 @@
msm_camera_io_w(0xAAAAAAAA, vfebase + VFE40_BUS_BDG_QOS_CFG_5);
msm_camera_io_w(0xAAAAAAAA, vfebase + VFE40_BUS_BDG_QOS_CFG_6);
msm_camera_io_w(0x0002AAAA, vfebase + VFE40_BUS_BDG_QOS_CFG_7);
- } else if (vfe_dev->vfe_hw_version == VFE40_8974V2_VERSION) {
+ } else if (vfe_dev->vfe_hw_version == VFE40_8974V2_VERSION ||
+ vfe_dev->vfe_hw_version == VFE40_8974V3_VERSION) {
msm_camera_io_w(0xAAA9AAA9, vfebase + VFE40_BUS_BDG_QOS_CFG_0);
msm_camera_io_w(0xAAA9AAA9, vfebase + VFE40_BUS_BDG_QOS_CFG_1);
msm_camera_io_w(0xAAA9AAA9, vfebase + VFE40_BUS_BDG_QOS_CFG_2);
@@ -230,9 +236,11 @@
msm_vfe40_init_vbif_parms_8974_v1(vfe_dev);
break;
case VFE40_8974V2_VERSION:
+ case VFE40_8974V3_VERSION:
msm_vfe40_init_vbif_parms_8974_v2(vfe_dev);
break;
case VFE40_8x26_VERSION:
+ case VFE40_8x26V2_VERSION:
msm_vfe40_init_vbif_parms_8x26(vfe_dev);
break;
default:
@@ -496,10 +504,15 @@
*irq_status0 = msm_camera_io_r(vfe_dev->vfe_base + 0x38);
*irq_status1 = msm_camera_io_r(vfe_dev->vfe_base + 0x3C);
/*Ignore composite 3 irq which is used for dual VFE only*/
- *irq_status0 &= ~BIT(28);
+ if (*irq_status0 & 0x6000000)
+ *irq_status0 &= ~(0x10000000);
msm_camera_io_w(*irq_status0, vfe_dev->vfe_base + 0x30);
msm_camera_io_w(*irq_status1, vfe_dev->vfe_base + 0x34);
msm_camera_io_w_mb(1, vfe_dev->vfe_base + 0x24);
+ if (*irq_status0 & 0x10000000) {
+ pr_err_ratelimited("%s: Protection triggered\n", __func__);
+ *irq_status0 &= ~(0x10000000);
+ }
if (*irq_status1 & (1 << 0))
vfe_dev->error_info.camif_status =
@@ -821,6 +834,7 @@
uint32_t wm_base = VFE40_WM_BASE(stream_info->wm[plane_idx]);
if (!stream_info->frame_based) {
+ msm_camera_io_w(0x0, vfe_dev->vfe_base + wm_base);
/*WR_IMAGE_SIZE*/
val =
((msm_isp_cal_word_per_line(
diff --git a/drivers/media/platform/msm/camera_v2/isp/msm_isp_axi_util.c b/drivers/media/platform/msm/camera_v2/isp/msm_isp_axi_util.c
index f470d36..d3138ed 100644
--- a/drivers/media/platform/msm/camera_v2/isp/msm_isp_axi_util.c
+++ b/drivers/media/platform/msm/camera_v2/isp/msm_isp_axi_util.c
@@ -97,6 +97,8 @@
case V4L2_PIX_FMT_QGBRG12:
case V4L2_PIX_FMT_QGRBG12:
case V4L2_PIX_FMT_QRGGB12:
+ case V4L2_PIX_FMT_JPEG:
+ case V4L2_PIX_FMT_META:
stream_info->num_planes = 1;
stream_info->format_factor = ISP_Q2;
break;
@@ -165,6 +167,8 @@
case V4L2_PIX_FMT_QGBRG8:
case V4L2_PIX_FMT_QGRBG8:
case V4L2_PIX_FMT_QRGGB8:
+ case V4L2_PIX_FMT_JPEG:
+ case V4L2_PIX_FMT_META:
size = plane_cfg[plane_idx].output_height *
plane_cfg[plane_idx].output_width;
break;
@@ -549,9 +553,9 @@
}
if (stream_info->num_planes > 1) {
- msm_isp_axi_free_comp_mask(&vfe_dev->axi_data, stream_info);
vfe_dev->hw_info->vfe_ops.axi_ops.
- clear_comp_mask(vfe_dev, stream_info);
+ clear_comp_mask(vfe_dev, stream_info);
+ msm_isp_axi_free_comp_mask(&vfe_dev->axi_data, stream_info);
} else {
vfe_dev->hw_info->vfe_ops.axi_ops.
clear_wm_irq_mask(vfe_dev, stream_info);
diff --git a/drivers/media/platform/msm/camera_v2/isp/msm_isp_util.c b/drivers/media/platform/msm/camera_v2/isp/msm_isp_util.c
index ac44c61..908d3c6 100644
--- a/drivers/media/platform/msm/camera_v2/isp/msm_isp_util.c
+++ b/drivers/media/platform/msm/camera_v2/isp/msm_isp_util.c
@@ -619,6 +619,8 @@
case V4L2_PIX_FMT_QGBRG8:
case V4L2_PIX_FMT_QGRBG8:
case V4L2_PIX_FMT_QRGGB8:
+ case V4L2_PIX_FMT_JPEG:
+ case V4L2_PIX_FMT_META:
val = CAL_WORD(pixel_per_line, 1, 8);
break;
case V4L2_PIX_FMT_SBGGR10:
@@ -672,6 +674,8 @@
case V4L2_PIX_FMT_QGBRG8:
case V4L2_PIX_FMT_QGRBG8:
case V4L2_PIX_FMT_QRGGB8:
+ case V4L2_PIX_FMT_JPEG:
+ case V4L2_PIX_FMT_META:
return 8;
case V4L2_PIX_FMT_SBGGR10:
case V4L2_PIX_FMT_SGBRG10:
diff --git a/drivers/media/platform/msm/camera_v2/ispif/msm_ispif.c b/drivers/media/platform/msm/camera_v2/ispif/msm_ispif.c
index dc1bcc3..3082e99 100644
--- a/drivers/media/platform/msm/camera_v2/ispif/msm_ispif.c
+++ b/drivers/media/platform/msm/camera_v2/ispif/msm_ispif.c
@@ -55,7 +55,7 @@
static inline int msm_ispif_is_intf_valid(uint32_t csid_version,
uint8_t intf_type)
{
- return (csid_version <= CSID_VERSION_V2 && intf_type != VFE0) ?
+ return (csid_version <= CSID_VERSION_V22 && intf_type != VFE0) ?
false : true;
}
@@ -67,7 +67,7 @@
{
int rc = 0;
- if (ispif->csid_version < CSID_VERSION_V3) {
+ if (ispif->csid_version < CSID_VERSION_V30) {
/* Older ISPIF versiond don't need ahb clokc */
return 0;
}
@@ -407,14 +407,14 @@
if ((intftype >= INTF_MAX) ||
(vfe_intf >= ispif->vfe_info.num_vfe) ||
- (ispif->csid_version <= CSID_VERSION_V2 &&
+ (ispif->csid_version <= CSID_VERSION_V22 &&
(vfe_intf > VFE0))) {
pr_err("%s: VFEID %d and CSID version %d mismatch\n",
__func__, vfe_intf, ispif->csid_version);
return -EINVAL;
}
- if (ispif->csid_version >= CSID_VERSION_V3)
+ if (ispif->csid_version >= CSID_VERSION_V30)
msm_ispif_select_clk_mux(ispif, intftype,
params->entries[i].csid, vfe_intf);
@@ -488,7 +488,7 @@
vfe_intf = params->entries[i].vfe_intf;
for (k = 0; k < params->entries[i].num_cids; k++) {
cid = params->entries[i].cids[k];
- vc = cid % 4;
+ vc = cid / 4;
if (intf_type == RDI2) {
/* zero out two bits */
ispif->applied_intf_cmd[vfe_intf].intf_cmd1 &=
@@ -776,7 +776,7 @@
ispif->csid_version = csid_version;
- if (ispif->csid_version >= CSID_VERSION_V3) {
+ if (ispif->csid_version >= CSID_VERSION_V30) {
if (!ispif->clk_mux_mem || !ispif->clk_mux_io) {
pr_err("%s csi clk mux mem %p io %p\n", __func__,
ispif->clk_mux_mem, ispif->clk_mux_io);
diff --git a/drivers/media/platform/msm/camera_v2/ispif/msm_ispif_hwreg_v1.h b/drivers/media/platform/msm/camera_v2/ispif/msm_ispif_hwreg_v1.h
index 6396486..c8a4366 100644
--- a/drivers/media/platform/msm/camera_v2/ispif/msm_ispif_hwreg_v1.h
+++ b/drivers/media/platform/msm/camera_v2/ispif/msm_ispif_hwreg_v1.h
@@ -103,4 +103,5 @@
#define ISPIF_IRQ_GLOBAL_CLEAR_CMD 0x000001
+#define ISPIF_STOP_INTF_IMMEDIATELY 0xAAAAAAAA
#endif /* __MSM_ISPIF_HWREG_V1_H__ */
diff --git a/drivers/media/platform/msm/camera_v2/jpeg_10/msm_jpeg_dev.c b/drivers/media/platform/msm/camera_v2/jpeg_10/msm_jpeg_dev.c
index 8b96227..7a06c00 100644
--- a/drivers/media/platform/msm/camera_v2/jpeg_10/msm_jpeg_dev.c
+++ b/drivers/media/platform/msm/camera_v2/jpeg_10/msm_jpeg_dev.c
@@ -228,6 +228,7 @@
fail_1:
__msm_jpeg_exit(msm_jpeg_device_p);
+ return rc;
fail:
kfree(msm_jpeg_device_p);
diff --git a/drivers/media/platform/msm/camera_v2/msm.h b/drivers/media/platform/msm/camera_v2/msm.h
index d57cf8d..46c7d67 100644
--- a/drivers/media/platform/msm/camera_v2/msm.h
+++ b/drivers/media/platform/msm/camera_v2/msm.h
@@ -36,6 +36,7 @@
struct msm_video_device {
struct video_device *vdev;
atomic_t opened;
+ atomic_t stream_cnt;
};
struct msm_queue_head {
diff --git a/drivers/media/platform/msm/camera_v2/pproc/cpp/msm_cpp.c b/drivers/media/platform/msm/camera_v2/pproc/cpp/msm_cpp.c
index 4f02197..d238649 100644
--- a/drivers/media/platform/msm/camera_v2/pproc/cpp/msm_cpp.c
+++ b/drivers/media/platform/msm/camera_v2/pproc/cpp/msm_cpp.c
@@ -24,6 +24,9 @@
#include <linux/proc_fs.h>
#include <linux/msm_ion.h>
#include <linux/iommu.h>
+#include <linux/timer.h>
+#include <linux/kernel.h>
+#include <linux/workqueue.h>
#include <mach/iommu_domains.h>
#include <mach/iommu.h>
#include <mach/vreg.h>
@@ -36,6 +39,7 @@
#include "msm_cpp.h"
#include "msm_isp_util.h"
#include "msm_camera_io_util.h"
+#include <linux/debugfs.h>
#define MSM_CPP_DRV_NAME "msm_cpp"
@@ -43,6 +47,23 @@
#define CONFIG_MSM_CPP_DBG 0
+#define CPP_CMD_TIMEOUT_MS 300
+
+struct msm_cpp_timer_data_t {
+ struct cpp_device *cpp_dev;
+ struct msm_cpp_frame_info_t *processed_frame;
+};
+
+struct msm_cpp_timer_t {
+ uint8_t used;
+ struct msm_cpp_timer_data_t data;
+ struct timer_list cpp_timer;
+};
+
+struct msm_cpp_timer_t cpp_timers[2];
+static int del_timer_idx;
+static int set_timer_idx;
+
/* dump the frame command before writing to the hardware */
#define MSM_CPP_DUMP_FRM_CMD 0
@@ -109,6 +130,11 @@
{"micro_iface_clk", -1},
};
static int msm_cpp_notify_frame_done(struct cpp_device *cpp_dev);
+static void cpp_load_fw(struct cpp_device *cpp_dev, char *fw_name_bin);
+static void cpp_timer_callback(unsigned long data);
+
+uint8_t induce_error;
+static int msm_cpp_enable_debugfs(struct cpp_device *cpp_dev);
static void msm_cpp_write(u32 data, void __iomem *cpp_base)
{
@@ -472,7 +498,6 @@
tx_fifo[i] = msm_camera_io_r(cpp_dev->base +
MSM_CPP_MICRO_FIFO_TX_DATA);
}
-
spin_lock_irqsave(&cpp_dev->tasklet_lock, flags);
queue_cmd = &cpp_dev->tasklet_queue_cmd[cpp_dev->taskletq_idx];
if (queue_cmd->cmd_used) {
@@ -494,6 +519,36 @@
spin_unlock_irqrestore(&cpp_dev->tasklet_lock, flags);
tasklet_schedule(&cpp_dev->cpp_tasklet);
+ } else if (irq_status & 0x7C0) {
+ pr_err("%s: fatal error: 0x%x\n", __func__, irq_status);
+ pr_err("%s: DEBUG_SP: 0x%x\n", __func__,
+ msm_camera_io_r(cpp_dev->cpp_hw_base + 0x40));
+ pr_err("%s: DEBUG_T: 0x%x\n", __func__,
+ msm_camera_io_r(cpp_dev->cpp_hw_base + 0x44));
+ pr_err("%s: DEBUG_N: 0x%x\n", __func__,
+ msm_camera_io_r(cpp_dev->cpp_hw_base + 0x48));
+ pr_err("%s: DEBUG_R: 0x%x\n", __func__,
+ msm_camera_io_r(cpp_dev->cpp_hw_base + 0x4C));
+ pr_err("%s: DEBUG_OPPC: 0x%x\n", __func__,
+ msm_camera_io_r(cpp_dev->cpp_hw_base + 0x50));
+ pr_err("%s: DEBUG_MO: 0x%x\n", __func__,
+ msm_camera_io_r(cpp_dev->cpp_hw_base + 0x54));
+ pr_err("%s: DEBUG_TIMER0: 0x%x\n", __func__,
+ msm_camera_io_r(cpp_dev->cpp_hw_base + 0x60));
+ pr_err("%s: DEBUG_TIMER1: 0x%x\n", __func__,
+ msm_camera_io_r(cpp_dev->cpp_hw_base + 0x64));
+ pr_err("%s: DEBUG_GPI: 0x%x\n", __func__,
+ msm_camera_io_r(cpp_dev->cpp_hw_base + 0x70));
+ pr_err("%s: DEBUG_GPO: 0x%x\n", __func__,
+ msm_camera_io_r(cpp_dev->cpp_hw_base + 0x74));
+ pr_err("%s: DEBUG_T0: 0x%x\n", __func__,
+ msm_camera_io_r(cpp_dev->cpp_hw_base + 0x80));
+ pr_err("%s: DEBUG_R0: 0x%x\n", __func__,
+ msm_camera_io_r(cpp_dev->cpp_hw_base + 0x84));
+ pr_err("%s: DEBUG_T1: 0x%x\n", __func__,
+ msm_camera_io_r(cpp_dev->cpp_hw_base + 0x88));
+ pr_err("%s: DEBUG_R1: 0x%x\n", __func__,
+ msm_camera_io_r(cpp_dev->cpp_hw_base + 0x8C));
}
msm_camera_io_w(irq_status, cpp_dev->base + MSM_CPP_MICRO_IRQGEN_CLR);
return IRQ_HANDLED;
@@ -509,6 +564,7 @@
uint32_t tx_fifo[MSM_CPP_TX_FIFO_LEVEL];
struct cpp_device *cpp_dev = (struct cpp_device *) data;
struct msm_cpp_tasklet_queue_cmd *queue_cmd;
+ struct msm_cpp_timer_t *timer = NULL;
while (atomic_read(&cpp_dev->irq_cnt)) {
spin_lock_irqsave(&cpp_dev->tasklet_lock, flags);
@@ -535,6 +591,25 @@
msg_id = tx_fifo[i+2];
if (msg_id == MSM_CPP_MSG_ID_FRAME_ACK) {
CPP_DBG("Frame done!!\n");
+ /* delete CPP timer */
+ CPP_DBG("delete timer %d.\n",
+ del_timer_idx);
+ timer = &cpp_timers[del_timer_idx];
+ del_timer(&timer->cpp_timer);
+ timer->used = 0;
+ timer->data.processed_frame = NULL;
+ del_timer_idx = 1 - del_timer_idx;
+ msm_cpp_notify_frame_done(cpp_dev);
+ } else if (msg_id ==
+ MSM_CPP_MSG_ID_FRAME_NACK) {
+ pr_err("NACK error from hw!!\n");
+ CPP_DBG("delete timer %d.\n",
+ del_timer_idx);
+ timer = &cpp_timers[del_timer_idx];
+ del_timer(&timer->cpp_timer);
+ timer->used = 0;
+ timer->data.processed_frame = NULL;
+ del_timer_idx = 1 - del_timer_idx;
msm_cpp_notify_frame_done(cpp_dev);
}
i += cmd_len + 2;
@@ -543,48 +618,6 @@
}
}
-static void msm_cpp_boot_hw(struct cpp_device *cpp_dev)
-{
- disable_irq(cpp_dev->irq->start);
-
- msm_camera_io_w(0x1, cpp_dev->base + MSM_CPP_MICRO_CLKEN_CTL);
- msm_camera_io_w(0x1, cpp_dev->base +
- MSM_CPP_MICRO_BOOT_START);
- msm_cpp_poll(cpp_dev->base, MSM_CPP_MSG_ID_CMD);
-
- /*Trigger MC to jump to start address*/
- msm_cpp_write(MSM_CPP_CMD_EXEC_JUMP, cpp_dev->base);
- msm_cpp_write(MSM_CPP_JUMP_ADDRESS, cpp_dev->base);
-
- msm_cpp_poll(cpp_dev->base, MSM_CPP_MSG_ID_CMD);
- msm_cpp_poll(cpp_dev->base, 0x1);
- msm_cpp_poll(cpp_dev->base, MSM_CPP_MSG_ID_JUMP_ACK);
- msm_cpp_poll(cpp_dev->base, MSM_CPP_MSG_ID_TRAILER);
-
- /*Get Bootloader Version*/
- msm_cpp_write(MSM_CPP_CMD_GET_BOOTLOADER_VER, cpp_dev->base);
- pr_info("MC Bootloader Version: 0x%x\n",
- msm_cpp_read(cpp_dev->base));
-
- /*Get Firmware Version*/
- msm_cpp_write(MSM_CPP_CMD_GET_FW_VER, cpp_dev->base);
- msm_cpp_write(MSM_CPP_MSG_ID_CMD, cpp_dev->base);
- msm_cpp_write(0x1, cpp_dev->base);
- msm_cpp_write(MSM_CPP_CMD_GET_FW_VER, cpp_dev->base);
- msm_cpp_write(MSM_CPP_MSG_ID_TRAILER, cpp_dev->base);
-
- msm_cpp_poll(cpp_dev->base, MSM_CPP_MSG_ID_CMD);
- msm_cpp_poll(cpp_dev->base, 0x2);
- msm_cpp_poll(cpp_dev->base, MSM_CPP_MSG_ID_FW_VER);
- pr_info("CPP FW Version: 0x%x\n", msm_cpp_read(cpp_dev->base));
- msm_cpp_poll(cpp_dev->base, MSM_CPP_MSG_ID_TRAILER);
- enable_irq(cpp_dev->irq->start);
- msm_camera_io_w_mb(0x8, cpp_dev->base +
- MSM_CPP_MICRO_IRQGEN_MASK);
- msm_camera_io_w_mb(0xFFFF, cpp_dev->base +
- MSM_CPP_MICRO_IRQGEN_CLR);
-}
-
static int cpp_init_hardware(struct cpp_device *cpp_dev)
{
int rc = 0;
@@ -663,8 +696,15 @@
cpp_dev->taskletq_idx = 0;
atomic_set(&cpp_dev->irq_cnt, 0);
msm_cpp_create_buff_queue(cpp_dev, MSM_CPP_MAX_BUFF_QUEUE);
- if (cpp_dev->is_firmware_loaded == 1)
- msm_cpp_boot_hw(cpp_dev);
+ if (cpp_dev->is_firmware_loaded == 1) {
+ disable_irq(cpp_dev->irq->start);
+ cpp_load_fw(cpp_dev, NULL);
+ enable_irq(cpp_dev->irq->start);
+ msm_camera_io_w_mb(0x7C8, cpp_dev->base +
+ MSM_CPP_MICRO_IRQGEN_MASK);
+ msm_camera_io_w_mb(0xFFFF, cpp_dev->base +
+ MSM_CPP_MICRO_IRQGEN_CLR);
+ }
return rc;
req_irq_fail:
iounmap(cpp_dev->cpp_hw_base);
@@ -698,11 +738,9 @@
iounmap(cpp_dev->cpp_hw_base);
msm_cam_clk_enable(&cpp_dev->pdev->dev, cpp_clk_info,
cpp_dev->cpp_clk, ARRAY_SIZE(cpp_clk_info), 0);
- if (0) {
- regulator_disable(cpp_dev->fs_cpp);
- regulator_put(cpp_dev->fs_cpp);
- cpp_dev->fs_cpp = NULL;
- }
+ regulator_disable(cpp_dev->fs_cpp);
+ regulator_put(cpp_dev->fs_cpp);
+ cpp_dev->fs_cpp = NULL;
msm_isp_update_bandwidth(ISP_CPP, 0, 0);
msm_isp_deinit_bandwidth_mgr(ISP_CPP);
}
@@ -715,47 +753,44 @@
const struct firmware *fw = NULL;
struct device *dev = &cpp_dev->pdev->dev;
- pr_debug("%s: FW file: %s\n", __func__, fw_name_bin);
- rc = request_firmware(&fw, fw_name_bin, dev);
- if (rc) {
- dev_err(dev, "Failed to locate blob %s from device %p, Error: %d\n",
- fw_name_bin, dev, rc);
- }
-
- CPP_DBG("HW Ver:0x%x\n",
- msm_camera_io_r(cpp_dev->base +
- MSM_CPP_MICRO_HW_VERSION));
-
+ msm_camera_io_w(0x1, cpp_dev->base + MSM_CPP_MICRO_CLKEN_CTL);
msm_camera_io_w(0x1, cpp_dev->base +
- MSM_CPP_MICRO_BOOT_START);
- /*Enable MC clock*/
- msm_camera_io_w(0x1, cpp_dev->base +
- MSM_CPP_MICRO_CLKEN_CTL);
-
+ MSM_CPP_MICRO_BOOT_START);
msm_cpp_poll(cpp_dev->base, MSM_CPP_MSG_ID_CMD);
- /*Start firmware loading*/
- msm_cpp_write(MSM_CPP_CMD_FW_LOAD, cpp_dev->base);
- msm_cpp_write(MSM_CPP_END_ADDRESS, cpp_dev->base);
- msm_cpp_write(MSM_CPP_START_ADDRESS, cpp_dev->base);
- if (NULL != fw)
- ptr_bin = (uint32_t *)fw->data;
+ if (fw_name_bin) {
+ pr_debug("%s: FW file: %s\n", __func__, fw_name_bin);
+ rc = request_firmware(&fw, fw_name_bin, dev);
+ if (rc) {
+ dev_err(dev,
+ "Fail to loc blob %s from dev %p, Error: %d\n",
+ fw_name_bin, dev, rc);
+ }
+ if (NULL != fw)
+ ptr_bin = (uint32_t *)fw->data;
- if (ptr_bin == NULL) {
- pr_err("ptr_bin is NULL\n");
- } else {
- for (i = 0; i < fw->size/4; i++) {
- if (ptr_bin) {
+ msm_camera_io_w(0x1, cpp_dev->base +
+ MSM_CPP_MICRO_BOOT_START);
+ msm_cpp_poll(cpp_dev->base, MSM_CPP_MSG_ID_CMD);
+ msm_camera_io_w(0xFFFFFFFF, cpp_dev->base +
+ MSM_CPP_MICRO_IRQGEN_CLR);
+
+ /*Start firmware loading*/
+ msm_cpp_write(MSM_CPP_CMD_FW_LOAD, cpp_dev->base);
+ msm_cpp_write(MSM_CPP_END_ADDRESS, cpp_dev->base);
+ msm_cpp_write(MSM_CPP_START_ADDRESS, cpp_dev->base);
+
+ if (ptr_bin) {
+ for (i = 0; i < fw->size/4; i++) {
msm_cpp_write(*ptr_bin, cpp_dev->base);
ptr_bin++;
}
}
+ if (fw)
+ release_firmware(fw);
+ msm_cpp_poll(cpp_dev->base, MSM_CPP_MSG_ID_OK);
+ msm_cpp_poll(cpp_dev->base, MSM_CPP_MSG_ID_CMD);
}
- if (fw)
- release_firmware(fw);
-
- msm_cpp_poll(cpp_dev->base, MSM_CPP_MSG_ID_OK);
- msm_cpp_poll(cpp_dev->base, MSM_CPP_MSG_ID_CMD);
/*Trigger MC to jump to start address*/
msm_cpp_write(MSM_CPP_CMD_EXEC_JUMP, cpp_dev->base);
@@ -853,6 +888,36 @@
cpp_dev->cpp_open_cnt--;
if (cpp_dev->cpp_open_cnt == 0) {
+ pr_err("%s: irq_status: 0x%x\n", __func__,
+ msm_camera_io_r(cpp_dev->cpp_hw_base + 0x4));
+ pr_err("%s: DEBUG_SP: 0x%x\n", __func__,
+ msm_camera_io_r(cpp_dev->cpp_hw_base + 0x40));
+ pr_err("%s: DEBUG_T: 0x%x\n", __func__,
+ msm_camera_io_r(cpp_dev->cpp_hw_base + 0x44));
+ pr_err("%s: DEBUG_N: 0x%x\n", __func__,
+ msm_camera_io_r(cpp_dev->cpp_hw_base + 0x48));
+ pr_err("%s: DEBUG_R: 0x%x\n", __func__,
+ msm_camera_io_r(cpp_dev->cpp_hw_base + 0x4C));
+ pr_err("%s: DEBUG_OPPC: 0x%x\n", __func__,
+ msm_camera_io_r(cpp_dev->cpp_hw_base + 0x50));
+ pr_err("%s: DEBUG_MO: 0x%x\n", __func__,
+ msm_camera_io_r(cpp_dev->cpp_hw_base + 0x54));
+ pr_err("%s: DEBUG_TIMER0: 0x%x\n", __func__,
+ msm_camera_io_r(cpp_dev->cpp_hw_base + 0x60));
+ pr_err("%s: DEBUG_TIMER1: 0x%x\n", __func__,
+ msm_camera_io_r(cpp_dev->cpp_hw_base + 0x64));
+ pr_err("%s: DEBUG_GPI: 0x%x\n", __func__,
+ msm_camera_io_r(cpp_dev->cpp_hw_base + 0x70));
+ pr_err("%s: DEBUG_GPO: 0x%x\n", __func__,
+ msm_camera_io_r(cpp_dev->cpp_hw_base + 0x74));
+ pr_err("%s: DEBUG_T0: 0x%x\n", __func__,
+ msm_camera_io_r(cpp_dev->cpp_hw_base + 0x80));
+ pr_err("%s: DEBUG_R0: 0x%x\n", __func__,
+ msm_camera_io_r(cpp_dev->cpp_hw_base + 0x84));
+ pr_err("%s: DEBUG_T1: 0x%x\n", __func__,
+ msm_camera_io_r(cpp_dev->cpp_hw_base + 0x88));
+ pr_err("%s: DEBUG_R1: 0x%x\n", __func__,
+ msm_camera_io_r(cpp_dev->cpp_hw_base + 0x8C));
msm_camera_io_w(0x0, cpp_dev->base + MSM_CPP_MICRO_CLKEN_CTL);
cpp_deinit_mem(cpp_dev);
cpp_release_hardware(cpp_dev);
@@ -969,23 +1034,140 @@
}
#endif
+void msm_cpp_do_timeout_work(struct work_struct *work)
+{
+ int ret;
+ uint32_t i = 0;
+ struct msm_cpp_frame_info_t *this_frame =
+ cpp_timers[del_timer_idx].data.processed_frame;
+ struct msm_cpp_frame_info_t *second_frame = NULL;
+
+ pr_err("cpp_timer_callback called idx:%d. (jiffies=%lu)\n",
+ del_timer_idx, jiffies);
+ pr_err("fatal: cpp_timer expired for identity=0x%x, frame_id=%03d",
+ this_frame->identity, this_frame->frame_id);
+ cpp_timers[del_timer_idx].used = 0;
+ cpp_timers[del_timer_idx].data.processed_frame = NULL;
+ del_timer_idx = 1 - del_timer_idx;
+
+ if (cpp_timers[del_timer_idx].used == 1) {
+ pr_err("deleting cpp_timer %d.\n", del_timer_idx);
+ del_timer(&cpp_timers[del_timer_idx].cpp_timer);
+ cpp_timers[del_timer_idx].used = 0;
+ second_frame = cpp_timers[del_timer_idx].data.processed_frame;
+ cpp_timers[del_timer_idx].data.processed_frame = NULL;
+ del_timer_idx = 1 - del_timer_idx;
+ }
+
+ disable_irq(cpp_timers[del_timer_idx].data.cpp_dev->irq->start);
+ pr_err("Reloading firmware\n");
+ cpp_load_fw(cpp_timers[del_timer_idx].data.cpp_dev, NULL);
+ pr_err("Firmware loading done\n");
+ enable_irq(cpp_timers[del_timer_idx].data.cpp_dev->irq->start);
+ msm_camera_io_w_mb(0x8, cpp_timers[del_timer_idx].data.cpp_dev->base +
+ MSM_CPP_MICRO_IRQGEN_MASK);
+ msm_camera_io_w_mb(0xFFFF,
+ cpp_timers[del_timer_idx].data.cpp_dev->base +
+ MSM_CPP_MICRO_IRQGEN_CLR);
+
+ cpp_timers[set_timer_idx].data.processed_frame = this_frame;
+ cpp_timers[set_timer_idx].used = 1;
+ pr_err("ReInstalling cpp_timer %d\n", set_timer_idx);
+ setup_timer(&cpp_timers[set_timer_idx].cpp_timer, cpp_timer_callback,
+ (unsigned long)&cpp_timers[0]);
+ pr_err("Starting timer to fire in %d ms. (jiffies=%lu)\n",
+ CPP_CMD_TIMEOUT_MS, jiffies);
+ ret = mod_timer(&cpp_timers[set_timer_idx].cpp_timer,
+ jiffies + msecs_to_jiffies(CPP_CMD_TIMEOUT_MS));
+ if (ret)
+ pr_err("error in mod_timer\n");
+
+ set_timer_idx = 1 - set_timer_idx;
+ pr_err("Rescheduling for identity=0x%x, frame_id=%03d",
+ this_frame->identity, this_frame->frame_id);
+ msm_cpp_write(0x6, cpp_timers[set_timer_idx].data.cpp_dev->base);
+ msm_cpp_dump_frame_cmd(this_frame->cpp_cmd_msg,
+ this_frame->msg_len);
+ for (i = 0; i < this_frame->msg_len; i++)
+ msm_cpp_write(this_frame->cpp_cmd_msg[i],
+ cpp_timers[set_timer_idx].data.cpp_dev->base);
+
+
+ if (second_frame != NULL) {
+ cpp_timers[set_timer_idx].data.processed_frame = second_frame;
+ cpp_timers[set_timer_idx].used = 1;
+ pr_err("ReInstalling cpp_timer %d\n", set_timer_idx);
+ setup_timer(&cpp_timers[set_timer_idx].cpp_timer,
+ cpp_timer_callback, (unsigned long)&cpp_timers[0]);
+ pr_err("Starting timer to fire in %d ms. (jiffies=%lu)\n",
+ CPP_CMD_TIMEOUT_MS, jiffies);
+ ret = mod_timer(&cpp_timers[set_timer_idx].cpp_timer,
+ jiffies + msecs_to_jiffies(CPP_CMD_TIMEOUT_MS));
+ if (ret)
+ pr_err("error in mod_timer\n");
+
+ set_timer_idx = 1 - set_timer_idx;
+ pr_err("Rescheduling for identity=0x%x, frame_id=%03d",
+ second_frame->identity, second_frame->frame_id);
+ msm_cpp_write(0x6,
+ cpp_timers[set_timer_idx].data.cpp_dev->base);
+ msm_cpp_dump_frame_cmd(second_frame->cpp_cmd_msg,
+ second_frame->msg_len);
+ for (i = 0; i < second_frame->msg_len; i++)
+ msm_cpp_write(second_frame->cpp_cmd_msg[i],
+ cpp_timers[set_timer_idx].data.cpp_dev->base);
+ }
+}
+
+void cpp_timer_callback(unsigned long data)
+{
+ struct msm_cpp_work_t *work =
+ cpp_timers[set_timer_idx].data.cpp_dev->work;
+ queue_work(cpp_timers[set_timer_idx].data.cpp_dev->timer_wq,
+ (struct work_struct *)work);
+}
+
static int msm_cpp_send_frame_to_hardware(struct cpp_device *cpp_dev,
struct msm_queue_cmd *frame_qcmd)
{
uint32_t i;
int32_t rc = -EAGAIN;
+ int ret;
struct msm_cpp_frame_info_t *process_frame;
if (cpp_dev->processing_q.len < MAX_CPP_PROCESSING_FRAME) {
process_frame = frame_qcmd->command;
msm_enqueue(&cpp_dev->processing_q,
&frame_qcmd->list_frame);
+
+ cpp_timers[set_timer_idx].data.processed_frame = process_frame;
+ cpp_timers[set_timer_idx].used = 1;
+ /* install timer for cpp timeout */
+ CPP_DBG("Installing cpp_timer %d\n", set_timer_idx);
+ setup_timer(&cpp_timers[set_timer_idx].cpp_timer,
+ cpp_timer_callback, (unsigned long)&cpp_timers[0]);
+ CPP_DBG("Starting timer to fire in %d ms. (jiffies=%lu)\n",
+ CPP_CMD_TIMEOUT_MS, jiffies);
+ ret = mod_timer(&cpp_timers[set_timer_idx].cpp_timer,
+ jiffies + msecs_to_jiffies(CPP_CMD_TIMEOUT_MS));
+ if (ret)
+ pr_err("error in mod_timer\n");
+
+ set_timer_idx = 1 - set_timer_idx;
+
msm_cpp_write(0x6, cpp_dev->base);
msm_cpp_dump_frame_cmd(process_frame->cpp_cmd_msg,
process_frame->msg_len);
- for (i = 0; i < process_frame->msg_len; i++)
- msm_cpp_write(process_frame->cpp_cmd_msg[i],
- cpp_dev->base);
+ for (i = 0; i < process_frame->msg_len; i++) {
+ if ((induce_error) && (i == 1)) {
+ pr_err("Induce error\n");
+ msm_cpp_write(process_frame->cpp_cmd_msg[i]-1,
+ cpp_dev->base);
+ induce_error--;
+ } else
+ msm_cpp_write(process_frame->cpp_cmd_msg[i],
+ cpp_dev->base);
+ }
do_gettimeofday(&(process_frame->in_time));
rc = 0;
}
@@ -1013,6 +1195,7 @@
struct msm_cpp_frame_info_t *u_frame_info =
(struct msm_cpp_frame_info_t *)ioctl_ptr->ioctl_ptr;
int32_t status = 0;
+ uint8_t fw_version_1_2_x = 0;
int i = 0;
if (!new_frame) {
@@ -1096,7 +1279,7 @@
&buff_mgr_info);
if (rc < 0) {
rc = -EAGAIN;
- pr_err("error getting buffer rc:%d\n", rc);
+ pr_debug("error getting buffer rc:%d\n", rc);
goto ERROR2;
}
new_frame->output_buffer_info[1].index = buff_mgr_info.index;
@@ -1117,12 +1300,21 @@
((cpp_frame_msg[12] >> 10) & 0x3FF) +
(cpp_frame_msg[12] & 0x3FF);
+ fw_version_1_2_x = 0;
+ if (cpp_dev->hw_info.cpp_hw_version == 0x10010000)
+ fw_version_1_2_x = 2;
+
for (i = 0; i < num_stripes; i++) {
- cpp_frame_msg[133 + i * 27] += (uint32_t) in_phyaddr;
- cpp_frame_msg[139 + i * 27] += (uint32_t) out_phyaddr0;
- cpp_frame_msg[140 + i * 27] += (uint32_t) out_phyaddr1;
- cpp_frame_msg[141 + i * 27] += (uint32_t) out_phyaddr0;
- cpp_frame_msg[142 + i * 27] += (uint32_t) out_phyaddr1;
+ cpp_frame_msg[(133 + fw_version_1_2_x) + i * 27] +=
+ (uint32_t) in_phyaddr;
+ cpp_frame_msg[(139 + fw_version_1_2_x) + i * 27] +=
+ (uint32_t) out_phyaddr0;
+ cpp_frame_msg[(140 + fw_version_1_2_x) + i * 27] +=
+ (uint32_t) out_phyaddr1;
+ cpp_frame_msg[(141 + fw_version_1_2_x) + i * 27] +=
+ (uint32_t) out_phyaddr0;
+ cpp_frame_msg[(142 + fw_version_1_2_x) + i * 27] +=
+ (uint32_t) out_phyaddr1;
}
frame_qcmd = kzalloc(sizeof(struct msm_queue_cmd), GFP_KERNEL);
@@ -1174,7 +1366,6 @@
struct cpp_device *cpp_dev = v4l2_get_subdevdata(sd);
struct msm_camera_v4l2_ioctl_t *ioctl_ptr = arg;
int rc = 0;
- char *fw_name_bin;
if (ioctl_ptr == NULL) {
pr_err("ioctl_ptr is null\n");
@@ -1196,8 +1387,11 @@
case VIDIOC_MSM_CPP_LOAD_FIRMWARE: {
if (cpp_dev->is_firmware_loaded == 0) {
- fw_name_bin = kzalloc(ioctl_ptr->len+1, GFP_KERNEL);
- if (!fw_name_bin) {
+ kfree(cpp_dev->fw_name_bin);
+ cpp_dev->fw_name_bin = NULL;
+ cpp_dev->fw_name_bin = kzalloc(ioctl_ptr->len+1,
+ GFP_KERNEL);
+ if (!cpp_dev->fw_name_bin) {
pr_err("%s:%d: malloc error\n", __func__,
__LINE__);
mutex_unlock(&cpp_dev->mutex);
@@ -1212,24 +1406,24 @@
pr_err("ioctl_ptr->len is 0\n");
return -EINVAL;
}
- rc = (copy_from_user(fw_name_bin,
+ rc = (copy_from_user(cpp_dev->fw_name_bin,
(void __user *)ioctl_ptr->ioctl_ptr,
ioctl_ptr->len) ? -EFAULT : 0);
if (rc) {
ERR_COPY_FROM_USER();
- kfree(fw_name_bin);
+ kfree(cpp_dev->fw_name_bin);
+ cpp_dev->fw_name_bin = NULL;
mutex_unlock(&cpp_dev->mutex);
return -EINVAL;
}
- *(fw_name_bin+ioctl_ptr->len) = '\0';
+ *(cpp_dev->fw_name_bin+ioctl_ptr->len) = '\0';
if (cpp_dev == NULL) {
pr_err("cpp_dev is null\n");
return -EINVAL;
}
disable_irq(cpp_dev->irq->start);
- cpp_load_fw(cpp_dev, fw_name_bin);
- kfree(fw_name_bin);
+ cpp_load_fw(cpp_dev, cpp_dev->fw_name_bin);
enable_irq(cpp_dev->irq->start);
cpp_dev->is_firmware_loaded = 1;
}
@@ -1549,9 +1743,9 @@
}
cpp_dev->iommu_ctx = msm_iommu_get_ctx("cpp");
- if (!cpp_dev->iommu_ctx) {
+ if (IS_ERR(cpp_dev->iommu_ctx)) {
pr_err("%s: cannot get iommu_ctx\n", __func__);
- rc = -ENODEV;
+ rc = -EPROBE_DEFER;
goto ERROR3;
}
@@ -1577,17 +1771,27 @@
MSM_CPP_MICRO_IRQGEN_MASK);
msm_camera_io_w(0xFFFF, cpp_dev->base +
MSM_CPP_MICRO_IRQGEN_CLR);
-
+ msm_camera_io_w(0x80000000, cpp_dev->base + 0xF0);
cpp_release_hardware(cpp_dev);
cpp_dev->state = CPP_STATE_OFF;
+ msm_cpp_enable_debugfs(cpp_dev);
msm_queue_init(&cpp_dev->eventData_q, "eventdata");
msm_queue_init(&cpp_dev->processing_q, "frame");
INIT_LIST_HEAD(&cpp_dev->tasklet_q);
tasklet_init(&cpp_dev->cpp_tasklet, msm_cpp_do_tasklet,
(unsigned long)cpp_dev);
+ cpp_dev->timer_wq = create_workqueue("msm_cpp_workqueue");
+ cpp_dev->work = kmalloc(sizeof(struct msm_cpp_work_t),
+ GFP_KERNEL);
+ INIT_WORK((struct work_struct *)cpp_dev->work, msm_cpp_do_timeout_work);
cpp_dev->cpp_open_cnt = 0;
cpp_dev->is_firmware_loaded = 0;
+ cpp_timers[0].data.cpp_dev = cpp_dev;
+ cpp_timers[1].data.cpp_dev = cpp_dev;
+ cpp_timers[0].used = 0;
+ cpp_timers[1].used = 0;
+ cpp_dev->fw_name_bin = NULL;
return rc;
ERROR3:
@@ -1627,6 +1831,8 @@
release_mem_region(cpp_dev->cpp_hw_mem->start,
resource_size(cpp_dev->cpp_hw_mem));
mutex_destroy(&cpp_dev->mutex);
+ kfree(cpp_dev->work);
+ destroy_workqueue(cpp_dev->timer_wq);
kfree(cpp_dev->cpp_clk);
kfree(cpp_dev);
return 0;
@@ -1652,6 +1858,30 @@
platform_driver_unregister(&cpp_driver);
}
+static int msm_cpp_debugfs_error_s(void *data, u64 val)
+{
+ pr_err("setting error inducement");
+ induce_error = val;
+ return 0;
+}
+
+DEFINE_SIMPLE_ATTRIBUTE(cpp_debugfs_error, NULL,
+ msm_cpp_debugfs_error_s, "%llu\n");
+
+static int msm_cpp_enable_debugfs(struct cpp_device *cpp_dev)
+{
+ struct dentry *debugfs_base;
+ debugfs_base = debugfs_create_dir("msm_cpp", NULL);
+ if (!debugfs_base)
+ return -ENOMEM;
+
+ if (!debugfs_create_file("error", S_IRUGO | S_IWUSR, debugfs_base,
+ (void *)cpp_dev, &cpp_debugfs_error))
+ return -ENOMEM;
+
+ return 0;
+}
+
module_init(msm_cpp_init_module);
module_exit(msm_cpp_exit_module);
MODULE_DESCRIPTION("MSM CPP driver");
diff --git a/drivers/media/platform/msm/camera_v2/pproc/cpp/msm_cpp.h b/drivers/media/platform/msm/camera_v2/pproc/cpp/msm_cpp.h
index 36a5fa5..0a70d37 100644
--- a/drivers/media/platform/msm/camera_v2/pproc/cpp/msm_cpp.h
+++ b/drivers/media/platform/msm/camera_v2/pproc/cpp/msm_cpp.h
@@ -147,6 +147,11 @@
struct list_head native_buff_head;
};
+struct msm_cpp_work_t {
+ struct work_struct my_work;
+ struct cpp_device *cpp_dev;
+};
+
struct cpp_device {
struct platform_device *pdev;
struct msm_sd_subdev msm_sd;
@@ -165,6 +170,9 @@
struct mutex mutex;
enum cpp_state state;
uint8_t is_firmware_loaded;
+ char *fw_name_bin;
+ struct workqueue_struct *timer_wq;
+ struct msm_cpp_work_t *work;
int domain_num;
struct iommu_domain *domain;
diff --git a/drivers/media/platform/msm/camera_v2/sensor/Makefile b/drivers/media/platform/msm/camera_v2/sensor/Makefile
index 5104bcb..40931ef 100644
--- a/drivers/media/platform/msm/camera_v2/sensor/Makefile
+++ b/drivers/media/platform/msm/camera_v2/sensor/Makefile
@@ -10,4 +10,7 @@
obj-$(CONFIG_OV8825) += ov8825.o
obj-$(CONFIG_OV2720) += ov2720.o
obj-$(CONFIG_OV9724) += ov9724.o
+obj-$(CONFIG_HI256) += hi256.o
obj-$(CONFIG_MT9M114) += mt9m114.o
+obj-$(CONFIG_SP1628) += sp1628.o
+obj-$(CONFIG_GC0339) += gc0339.o
diff --git a/drivers/media/platform/msm/camera_v2/sensor/actuator/msm_actuator.c b/drivers/media/platform/msm/camera_v2/sensor/actuator/msm_actuator.c
index 300daca..c188105 100644
--- a/drivers/media/platform/msm/camera_v2/sensor/actuator/msm_actuator.c
+++ b/drivers/media/platform/msm/camera_v2/sensor/actuator/msm_actuator.c
@@ -30,6 +30,7 @@
static struct msm_actuator msm_vcm_actuator_table;
static struct msm_actuator msm_piezo_actuator_table;
+static struct i2c_driver msm_actuator_i2c_driver;
static struct msm_actuator *actuators[] = {
&msm_vcm_actuator_table,
&msm_piezo_actuator_table,
@@ -549,7 +550,11 @@
pr_err("failed\n");
return -EINVAL;
}
- *subdev_id = a_ctrl->pdev->id;
+ if (a_ctrl->act_device_type == MSM_CAMERA_PLATFORM_DEVICE)
+ *subdev_id = a_ctrl->pdev->id;
+ else
+ *subdev_id = a_ctrl->subdev_id;
+
CDBG("subdev_id %d\n", *subdev_id);
CDBG("Exit\n");
return 0;
@@ -684,6 +689,11 @@
.core = &msm_actuator_subdev_core_ops,
};
+static const struct i2c_device_id msm_actuator_i2c_id[] = {
+ {"qcom,actuator", (kernel_ulong_t)NULL},
+ { }
+};
+
static int32_t msm_actuator_i2c_probe(struct i2c_client *client,
const struct i2c_device_id *id)
{
@@ -691,19 +701,46 @@
struct msm_actuator_ctrl_t *act_ctrl_t = NULL;
CDBG("Enter\n");
+ if (client == NULL) {
+ pr_err("msm_actuator_i2c_probe: client is null\n");
+ rc = -EINVAL;
+ goto probe_failure;
+ }
+
+ act_ctrl_t = kzalloc(sizeof(struct msm_actuator_ctrl_t),
+ GFP_KERNEL);
+ if (!act_ctrl_t) {
+ pr_err("%s:%d failed no memory\n", __func__, __LINE__);
+ return -ENOMEM;
+ }
+
if (!i2c_check_functionality(client->adapter, I2C_FUNC_I2C)) {
pr_err("i2c_check_functionality failed\n");
goto probe_failure;
}
- act_ctrl_t = (struct msm_actuator_ctrl_t *)(id->driver_data);
CDBG("client = %x\n", (unsigned int) client);
+
+ rc = of_property_read_u32(client->dev.of_node, "cell-index",
+ &act_ctrl_t->subdev_id);
+ CDBG("cell-index %d, rc %d\n", act_ctrl_t->subdev_id, rc);
+ if (rc < 0) {
+ pr_err("failed rc %d\n", rc);
+ return rc;
+ }
+
+ act_ctrl_t->i2c_driver = &msm_actuator_i2c_driver;
act_ctrl_t->i2c_client.client = client;
+ act_ctrl_t->curr_step_pos = 0,
+ act_ctrl_t->curr_region_index = 0,
/* Set device type as I2C */
act_ctrl_t->act_device_type = MSM_CAMERA_I2C_DEVICE;
act_ctrl_t->i2c_client.i2c_func_tbl = &msm_sensor_qup_func_tbl;
act_ctrl_t->act_v4l2_subdev_ops = &msm_actuator_subdev_ops;
act_ctrl_t->actuator_mutex = &msm_actuator_mutex;
+
+ act_ctrl_t->cam_name = act_ctrl_t->subdev_id;
+ CDBG("act_ctrl_t->cam_name: %d", act_ctrl_t->cam_name);
/* Assign name for sub device */
snprintf(act_ctrl_t->msm_sd.sd.name, sizeof(act_ctrl_t->msm_sd.sd.name),
"%s", act_ctrl_t->i2c_driver->driver.name);
@@ -720,7 +757,7 @@
act_ctrl_t->msm_sd.sd.entity.group_id = MSM_CAMERA_SUBDEV_ACTUATOR;
act_ctrl_t->msm_sd.close_seq = MSM_SD_CLOSE_2ND_CATEGORY | 0x2;
msm_sd_register(&act_ctrl_t->msm_sd);
- CDBG("succeeded\n");
+ pr_info("msm_actuator_i2c_probe: succeeded\n");
CDBG("Exit\n");
probe_failure:
@@ -795,17 +832,21 @@
return rc;
}
-static const struct i2c_device_id msm_actuator_i2c_id[] = {
- {"msm_actuator", (kernel_ulong_t)NULL},
- { }
+static const struct of_device_id msm_actuator_i2c_dt_match[] = {
+ {.compatible = "qcom,actuator"},
+ {}
};
+MODULE_DEVICE_TABLE(of, msm_actuator_i2c_dt_match);
+
static struct i2c_driver msm_actuator_i2c_driver = {
.id_table = msm_actuator_i2c_id,
.probe = msm_actuator_i2c_probe,
.remove = __exit_p(msm_actuator_i2c_remove),
.driver = {
- .name = "msm_actuator",
+ .name = "qcom,actuator",
+ .owner = THIS_MODULE,
+ .of_match_table = msm_actuator_i2c_dt_match,
},
};
diff --git a/drivers/media/platform/msm/camera_v2/sensor/actuator/msm_actuator.h b/drivers/media/platform/msm/camera_v2/sensor/actuator/msm_actuator.h
index c616307..c4a4137 100644
--- a/drivers/media/platform/msm/camera_v2/sensor/actuator/msm_actuator.h
+++ b/drivers/media/platform/msm/camera_v2/sensor/actuator/msm_actuator.h
@@ -80,6 +80,7 @@
struct msm_camera_i2c_reg_tbl *i2c_reg_tbl;
uint16_t i2c_tbl_index;
enum cci_i2c_master_t cci_master;
+ uint32_t subdev_id;
};
#endif
diff --git a/drivers/media/platform/msm/camera_v2/sensor/cci/msm_cci.c b/drivers/media/platform/msm/camera_v2/sensor/cci/msm_cci.c
index 1c8662b..a6c5639 100644
--- a/drivers/media/platform/msm/camera_v2/sensor/cci/msm_cci.c
+++ b/drivers/media/platform/msm/camera_v2/sensor/cci/msm_cci.c
@@ -111,9 +111,30 @@
msm_camera_io_w(1 << master, cci_dev->base + CCI_HALT_REQ_ADDR);
rc = wait_for_completion_interruptible_timeout(
&cci_dev->cci_master_info[master].reset_complete, CCI_TIMEOUT);
- if (rc <= 0)
- pr_err("%s: wait_for_completion_interruptible_timeout %d\n",
- __func__, __LINE__);
+ if (rc < 0) {
+ pr_err("%s:%d wait failed\n", __func__, __LINE__);
+ } else if (rc == 0) {
+ pr_err("%s:%d wait timeout\n", __func__, __LINE__);
+
+ /* Set reset pending flag to TRUE */
+ cci_dev->cci_master_info[master].reset_pending = TRUE;
+
+ /* Set proper mask to RESET CMD address based on MASTER */
+ if (master == MASTER_0)
+ msm_camera_io_w(CCI_M0_RESET_RMSK,
+ cci_dev->base + CCI_RESET_CMD_ADDR);
+ else
+ msm_camera_io_w(CCI_M1_RESET_RMSK,
+ cci_dev->base + CCI_RESET_CMD_ADDR);
+
+ /* wait for reset done irq */
+ rc = wait_for_completion_interruptible_timeout(
+ &cci_dev->cci_master_info[master].reset_complete,
+ CCI_TIMEOUT);
+ if (rc <= 0)
+ pr_err("%s:%d wait failed %d\n", __func__, __LINE__,
+ rc);
+ }
return;
}
@@ -714,40 +735,40 @@
complete(&cci_dev->cci_master_info[MASTER_1].
reset_complete);
}
- } else if ((irq & CCI_IRQ_STATUS_0_I2C_M0_RD_DONE_BMSK) ||
+ }
+ if ((irq & CCI_IRQ_STATUS_0_I2C_M0_RD_DONE_BMSK) ||
(irq & CCI_IRQ_STATUS_0_I2C_M0_Q0_REPORT_BMSK) ||
(irq & CCI_IRQ_STATUS_0_I2C_M0_Q1_REPORT_BMSK)) {
cci_dev->cci_master_info[MASTER_0].status = 0;
complete(&cci_dev->cci_master_info[MASTER_0].reset_complete);
- } else if ((irq & CCI_IRQ_STATUS_0_I2C_M1_RD_DONE_BMSK) ||
+ }
+ if ((irq & CCI_IRQ_STATUS_0_I2C_M1_RD_DONE_BMSK) ||
(irq & CCI_IRQ_STATUS_0_I2C_M1_Q0_REPORT_BMSK) ||
(irq & CCI_IRQ_STATUS_0_I2C_M1_Q1_REPORT_BMSK)) {
cci_dev->cci_master_info[MASTER_1].status = 0;
complete(&cci_dev->cci_master_info[MASTER_1].reset_complete);
- } else if (irq & CCI_IRQ_STATUS_0_I2C_M0_Q0Q1_HALT_ACK_BMSK) {
+ }
+ if (irq & CCI_IRQ_STATUS_0_I2C_M0_Q0Q1_HALT_ACK_BMSK) {
cci_dev->cci_master_info[MASTER_0].reset_pending = TRUE;
msm_camera_io_w(CCI_M0_RESET_RMSK,
cci_dev->base + CCI_RESET_CMD_ADDR);
- } else if (irq & CCI_IRQ_STATUS_0_I2C_M1_Q0Q1_HALT_ACK_BMSK) {
+ }
+ if (irq & CCI_IRQ_STATUS_0_I2C_M1_Q0Q1_HALT_ACK_BMSK) {
cci_dev->cci_master_info[MASTER_1].reset_pending = TRUE;
msm_camera_io_w(CCI_M1_RESET_RMSK,
cci_dev->base + CCI_RESET_CMD_ADDR);
- } else if (irq & CCI_IRQ_STATUS_0_I2C_M0_ERROR_BMSK) {
+ }
+ if (irq & CCI_IRQ_STATUS_0_I2C_M0_ERROR_BMSK) {
pr_err("%s:%d MASTER_0 error %x\n", __func__, __LINE__, irq);
cci_dev->cci_master_info[MASTER_0].status = -EINVAL;
msm_camera_io_w(CCI_M0_HALT_REQ_RMSK,
cci_dev->base + CCI_HALT_REQ_ADDR);
- } else if (irq & CCI_IRQ_STATUS_0_I2C_M1_ERROR_BMSK) {
+ }
+ if (irq & CCI_IRQ_STATUS_0_I2C_M1_ERROR_BMSK) {
pr_err("%s:%d MASTER_1 error %x\n", __func__, __LINE__, irq);
cci_dev->cci_master_info[MASTER_1].status = -EINVAL;
msm_camera_io_w(CCI_M1_HALT_REQ_RMSK,
cci_dev->base + CCI_HALT_REQ_ADDR);
- } else {
- pr_err("%s unhandled irq 0x%x\n", __func__, irq);
- cci_dev->cci_master_info[MASTER_0].status = 0;
- complete(&cci_dev->cci_master_info[MASTER_0].reset_complete);
- cci_dev->cci_master_info[MASTER_1].status = 0;
- complete(&cci_dev->cci_master_info[MASTER_1].reset_complete);
}
return IRQ_HANDLED;
}
diff --git a/drivers/media/platform/msm/camera_v2/sensor/csid/Makefile b/drivers/media/platform/msm/camera_v2/sensor/csid/Makefile
index 572e722..771167d 100644
--- a/drivers/media/platform/msm/camera_v2/sensor/csid/Makefile
+++ b/drivers/media/platform/msm/camera_v2/sensor/csid/Makefile
@@ -2,6 +2,8 @@
ccflags-y += -Idrivers/media/platform/msm/camera_v2/sensor/io
ifeq ($(CONFIG_MSM_CSI20_HEADER),y)
ccflags-y += -Idrivers/media/platform/msm/camera_v2/sensor/csid/include/csi2.0
+else ifeq ($(CONFIG_MSM_CSI22_HEADER),y)
+ ccflags-y += -Idrivers/media/platform/msm/camera_v2/sensor/csid/include/csi2.2
else ifeq ($(CONFIG_MSM_CSI30_HEADER),y)
ccflags-y += -Idrivers/media/platform/msm/camera_v2/sensor/csid/include/csi3.0
endif
diff --git a/drivers/media/platform/msm/camera_v2/sensor/csid/include/csi2.2/msm_csid_hwreg.h b/drivers/media/platform/msm/camera_v2/sensor/csid/include/csi2.2/msm_csid_hwreg.h
new file mode 100644
index 0000000..5b30472
--- /dev/null
+++ b/drivers/media/platform/msm/camera_v2/sensor/csid/include/csi2.2/msm_csid_hwreg.h
@@ -0,0 +1,52 @@
+/* Copyright (c) 2013, The Linux Foundation. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 and
+ * only version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#ifndef MSM_CSID_HWREG_H
+#define MSM_CSID_HWREG_H
+
+/* MIPI CSID registers */
+#define CSID_HW_VERSION_ADDR 0x0
+#define CSID_CORE_CTRL_0_ADDR 0x4
+#define CSID_CORE_CTRL_1_ADDR 0x4
+#define CSID_RST_CMD_ADDR 0x8
+#define CSID_CID_LUT_VC_0_ADDR 0xc
+#define CSID_CID_LUT_VC_1_ADDR 0x10
+#define CSID_CID_LUT_VC_2_ADDR 0x14
+#define CSID_CID_LUT_VC_3_ADDR 0x18
+#define CSID_CID_n_CFG_ADDR 0x1C
+#define CSID_IRQ_CLEAR_CMD_ADDR 0x5c
+#define CSID_IRQ_MASK_ADDR 0x60
+#define CSID_IRQ_STATUS_ADDR 0x64
+#define CSID_CAPTURED_UNMAPPED_LONG_PKT_HDR_ADDR 0x68
+#define CSID_CAPTURED_MMAPPED_LONG_PKT_HDR_ADDR 0x6c
+#define CSID_CAPTURED_SHORT_PKT_ADDR 0x70
+#define CSID_CAPTURED_LONG_PKT_HDR_ADDR 0x74
+#define CSID_CAPTURED_LONG_PKT_FTR_ADDR 0x78
+#define CSID_PIF_MISR_DL0_ADDR 0x7C
+#define CSID_PIF_MISR_DL1_ADDR 0x80
+#define CSID_PIF_MISR_DL2_ADDR 0x84
+#define CSID_PIF_MISR_DL3_ADDR 0x88
+#define CSID_STATS_TOTAL_PKTS_RCVD_ADDR 0x8C
+#define CSID_STATS_ECC_ADDR 0x90
+#define CSID_STATS_CRC_ADDR 0x94
+#define CSID_TG_CTRL_ADDR 0x9C
+#define CSID_TG_VC_CFG_ADDR 0xA0
+#define CSID_TG_DT_n_CFG_0_ADDR 0xA8
+#define CSID_TG_DT_n_CFG_1_ADDR 0xAC
+#define CSID_TG_DT_n_CFG_2_ADDR 0xB0
+#define CSID_RST_DONE_IRQ_BITSHIFT 11
+#define CSID_RST_STB_ALL 0x7FFF
+#define CSID_DL_INPUT_SEL_SHIFT 0x2
+#define CSID_PHY_SEL_SHIFT 17
+#define CSID_VERSION 0x02001000
+
+#endif
diff --git a/drivers/media/platform/msm/camera_v2/sensor/csid/msm_csid.c b/drivers/media/platform/msm/camera_v2/sensor/csid/msm_csid.c
index 4db6855..9aca234 100644
--- a/drivers/media/platform/msm/camera_v2/sensor/csid/msm_csid.c
+++ b/drivers/media/platform/msm/camera_v2/sensor/csid/msm_csid.c
@@ -20,8 +20,9 @@
#include "msm_camera_io_util.h"
#define V4L2_IDENT_CSID 50002
-#define CSID_VERSION_V2 0x02000011
-#define CSID_VERSION_V3 0x30000000
+#define CSID_VERSION_V20 0x02000011
+#define CSID_VERSION_V22 0x02001000
+#define CSID_VERSION_V30 0x30000000
#define MSM_CSID_DRV_NAME "msm_csid"
#define DBG_CSID 0
@@ -196,6 +197,27 @@
{"csi_rdi_clk", -1},
};
+static struct msm_cam_clk_info csid_8610_clk_info[] = {
+ {"csi_ahb_clk", -1},
+ {"csi_src_clk", 200000000},
+ {"csi_clk", -1},
+ {"csi0phy_mux_clk", -1},
+ {"csi1phy_mux_clk", -1},
+ {"csi0pix_mux_clk", -1},
+ {"csi0rdi_mux_clk", -1},
+ {"csi1rdi_mux_clk", -1},
+ {"csi2rdi_mux_clk", -1},
+};
+
+static struct msm_cam_clk_info csid_8610_clk_src_info[] = {
+ {"csi_phy_src_clk", 0},
+ {"csi_phy_src_clk", 0},
+ {"csi_pix_src_clk", 0},
+ {"csi_rdi_src_clk", 0},
+ {"csi_rdi_src_clk", 0},
+ {"csi_rdi_src_clk", 0},
+};
+
static struct camera_vreg_t csid_8960_vreg_info[] = {
{"mipi_csi_vdd", REG_LDO, 1200000, 1200000, 20000},
};
@@ -207,6 +229,7 @@
static int msm_csid_init(struct csid_device *csid_dev, uint32_t *csid_version)
{
int rc = 0;
+ struct camera_vreg_t *cam_vreg;
if (!csid_version) {
pr_err("%s:%d csid_version NULL\n", __func__, __LINE__);
@@ -229,31 +252,50 @@
return rc;
}
- if (CSID_VERSION <= CSID_VERSION_V2) {
+ if (CSID_VERSION == CSID_VERSION_V20)
+ cam_vreg = csid_8960_vreg_info;
+ else
+ cam_vreg = csid_vreg_info;
+
+ if (CSID_VERSION < CSID_VERSION_V30) {
rc = msm_camera_config_vreg(&csid_dev->pdev->dev,
- csid_8960_vreg_info, ARRAY_SIZE(csid_8960_vreg_info),
+ csid_vreg_info, ARRAY_SIZE(csid_vreg_info),
NULL, 0, &csid_dev->csi_vdd, 1);
if (rc < 0) {
pr_err("%s: regulator on failed\n", __func__);
goto vreg_config_failed;
}
-
rc = msm_camera_enable_vreg(&csid_dev->pdev->dev,
- csid_8960_vreg_info, ARRAY_SIZE(csid_8960_vreg_info),
+ csid_vreg_info, ARRAY_SIZE(csid_vreg_info),
NULL, 0, &csid_dev->csi_vdd, 1);
if (rc < 0) {
pr_err("%s: regulator enable failed\n", __func__);
goto vreg_enable_failed;
}
- rc = msm_cam_clk_enable(&csid_dev->pdev->dev,
- csid_8960_clk_info, csid_dev->csid_clk,
- ARRAY_SIZE(csid_8960_clk_info), 1);
- if (rc < 0) {
- pr_err("%s: clock enable failed\n", __func__);
- goto clk_enable_failed;
+ if (CSID_VERSION == CSID_VERSION_V20) {
+ rc = msm_cam_clk_enable(&csid_dev->pdev->dev,
+ csid_8960_clk_info, csid_dev->csid_clk,
+ ARRAY_SIZE(csid_8960_clk_info), 1);
+ if (rc < 0) {
+ pr_err("%s: 8960: clock enable failed\n",
+ __func__);
+ goto clk_enable_failed;
+ }
+ } else {
+ msm_cam_clk_sel_src(&csid_dev->pdev->dev,
+ &csid_8610_clk_info[3], csid_8610_clk_src_info,
+ ARRAY_SIZE(csid_8610_clk_src_info));
+ rc = msm_cam_clk_enable(&csid_dev->pdev->dev,
+ csid_8610_clk_info, csid_dev->csid_clk,
+ ARRAY_SIZE(csid_8610_clk_info), 1);
+ if (rc < 0) {
+ pr_err("%s: 8610: clock enable failed\n",
+ __func__);
+ goto clk_enable_failed;
+ }
}
- } else if (CSID_VERSION >= CSID_VERSION_V3) {
+ } else if (CSID_VERSION >= CSID_VERSION_V30) {
rc = msm_camera_config_vreg(&csid_dev->pdev->dev,
csid_vreg_info, ARRAY_SIZE(csid_vreg_info),
NULL, 0, &csid_dev->csi_vdd, 1);
@@ -294,21 +336,21 @@
return rc;
clk_enable_failed:
- if (CSID_VERSION <= CSID_VERSION_V2) {
+ if (CSID_VERSION < CSID_VERSION_V30) {
msm_camera_enable_vreg(&csid_dev->pdev->dev,
- csid_8960_vreg_info, ARRAY_SIZE(csid_8960_vreg_info),
+ csid_vreg_info, ARRAY_SIZE(csid_vreg_info),
NULL, 0, &csid_dev->csi_vdd, 0);
- } else if (CSID_VERSION >= CSID_VERSION_V3) {
+ } else if (CSID_VERSION >= CSID_VERSION_V30) {
msm_camera_enable_vreg(&csid_dev->pdev->dev,
csid_vreg_info, ARRAY_SIZE(csid_vreg_info),
NULL, 0, &csid_dev->csi_vdd, 0);
}
vreg_enable_failed:
- if (CSID_VERSION <= CSID_VERSION_V2) {
+ if (CSID_VERSION < CSID_VERSION_V30) {
msm_camera_config_vreg(&csid_dev->pdev->dev,
- csid_8960_vreg_info, ARRAY_SIZE(csid_8960_vreg_info),
+ csid_vreg_info, ARRAY_SIZE(csid_vreg_info),
NULL, 0, &csid_dev->csi_vdd, 0);
- } else if (CSID_VERSION >= CSID_VERSION_V3) {
+ } else if (CSID_VERSION >= CSID_VERSION_V30) {
msm_camera_config_vreg(&csid_dev->pdev->dev,
csid_vreg_info, ARRAY_SIZE(csid_vreg_info),
NULL, 0, &csid_dev->csi_vdd, 0);
@@ -335,7 +377,7 @@
disable_irq(csid_dev->irq->start);
- if (csid_dev->hw_version <= CSID_VERSION_V2) {
+ if (csid_dev->hw_version == CSID_VERSION_V20) {
msm_cam_clk_enable(&csid_dev->pdev->dev, csid_8960_clk_info,
csid_dev->csid_clk, ARRAY_SIZE(csid_8960_clk_info), 0);
@@ -346,7 +388,20 @@
msm_camera_config_vreg(&csid_dev->pdev->dev,
csid_8960_vreg_info, ARRAY_SIZE(csid_8960_vreg_info),
NULL, 0, &csid_dev->csi_vdd, 0);
- } else if (csid_dev->hw_version >= CSID_VERSION_V3) {
+ } else if (csid_dev->hw_version == CSID_VERSION_V22) {
+ msm_cam_clk_enable(&csid_dev->pdev->dev,
+ csid_8610_clk_info,
+ csid_dev->csid_clk,
+ ARRAY_SIZE(csid_8610_clk_info), 0);
+
+ msm_camera_enable_vreg(&csid_dev->pdev->dev,
+ csid_vreg_info, ARRAY_SIZE(csid_vreg_info),
+ NULL, 0, &csid_dev->csi_vdd, 0);
+
+ msm_camera_config_vreg(&csid_dev->pdev->dev,
+ csid_vreg_info, ARRAY_SIZE(csid_vreg_info),
+ NULL, 0, &csid_dev->csi_vdd, 0);
+ } else if (csid_dev->hw_version >= CSID_VERSION_V30) {
msm_cam_clk_enable(&csid_dev->pdev->dev, csid_8974_clk_info,
csid_dev->csid_clk, ARRAY_SIZE(csid_8974_clk_info), 0);
diff --git a/drivers/media/platform/msm/camera_v2/sensor/csiphy/Makefile b/drivers/media/platform/msm/camera_v2/sensor/csiphy/Makefile
index eab1f6f..61671ea 100644
--- a/drivers/media/platform/msm/camera_v2/sensor/csiphy/Makefile
+++ b/drivers/media/platform/msm/camera_v2/sensor/csiphy/Makefile
@@ -2,6 +2,8 @@
ccflags-y += -Idrivers/media/platform/msm/camera_v2/sensor/io
ifeq ($(CONFIG_MSM_CSI20_HEADER),y)
ccflags-y += -Idrivers/media/platform/msm/camera_v2/sensor/csiphy/include/csi2.0
+else ifeq ($(CONFIG_MSM_CSI22_HEADER),y)
+ ccflags-y += -Idrivers/media/platform/msm/camera_v2/sensor/csiphy/include/csi2.2
else ifeq ($(CONFIG_MSM_CSI30_HEADER),y)
ccflags-y += -Idrivers/media/platform/msm/camera_v2/sensor/csiphy/include/csi3.0
endif
diff --git a/drivers/media/platform/msm/camera_v2/sensor/csiphy/include/csi2.2/msm_csiphy_hwreg.h b/drivers/media/platform/msm/camera_v2/sensor/csiphy/include/csi2.2/msm_csiphy_hwreg.h
new file mode 100644
index 0000000..c4ff05d
--- /dev/null
+++ b/drivers/media/platform/msm/camera_v2/sensor/csiphy/include/csi2.2/msm_csiphy_hwreg.h
@@ -0,0 +1,43 @@
+/* Copyright (c) 2013, The Linux Foundation. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 and
+ * only version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#ifndef MSM_CSIPHY_HWREG_H
+#define MSM_CSIPHY_HWREG_H
+
+/*MIPI CSI PHY registers*/
+#define MIPI_CSIPHY_HW_VERSION_ADDR 0x17C
+#define MIPI_CSIPHY_LNn_CFG1_ADDR 0x0
+#define MIPI_CSIPHY_LNn_CFG2_ADDR 0x4
+#define MIPI_CSIPHY_LNn_CFG3_ADDR 0x8
+#define MIPI_CSIPHY_LNn_CFG4_ADDR 0xC
+#define MIPI_CSIPHY_LNn_CFG5_ADDR 0x10
+#define MIPI_CSIPHY_LNCK_CFG1_ADDR 0x100
+#define MIPI_CSIPHY_LNCK_CFG2_ADDR 0x104
+#define MIPI_CSIPHY_LNCK_CFG3_ADDR 0x108
+#define MIPI_CSIPHY_LNCK_CFG4_ADDR 0x10C
+#define MIPI_CSIPHY_LNCK_CFG5_ADDR 0x110
+#define MIPI_CSIPHY_LNCK_MISC1_ADDR 0x128
+#define MIPI_CSIPHY_GLBL_RESET_ADDR 0x140
+#define MIPI_CSIPHY_GLBL_PWR_CFG_ADDR 0x144
+#define MIPI_CSIPHY_GLBL_IRQ_CMD_ADDR 0x164
+#define MIPI_CSIPHY_INTERRUPT_STATUS0_ADDR 0x180
+#define MIPI_CSIPHY_INTERRUPT_MASK0_ADDR 0x1A0
+#define MIPI_CSIPHY_INTERRUPT_MASK_VAL 0x6F
+#define MIPI_CSIPHY_INTERRUPT_MASK_ADDR 0x1A4
+#define MIPI_CSIPHY_INTERRUPT_CLEAR0_ADDR 0x1C0
+#define MIPI_CSIPHY_INTERRUPT_CLEAR_ADDR 0x1C4
+#define MIPI_CSIPHY_MODE_CONFIG_SHIFT 0x4
+#define MIPI_CSIPHY_GLBL_T_INIT_CFG0_ADDR 0x1E0
+#define MIPI_CSIPHY_T_WAKEUP_CFG0_ADDR 0x1E8
+#define CSIPHY_VERSION 0x1
+
+#endif
diff --git a/drivers/media/platform/msm/camera_v2/sensor/csiphy/msm_csiphy.c b/drivers/media/platform/msm/camera_v2/sensor/csiphy/msm_csiphy.c
index 429d151..0fbe238 100644
--- a/drivers/media/platform/msm/camera_v2/sensor/csiphy/msm_csiphy.c
+++ b/drivers/media/platform/msm/camera_v2/sensor/csiphy/msm_csiphy.c
@@ -24,7 +24,9 @@
#define DBG_CSIPHY 0
#define V4L2_IDENT_CSIPHY 50003
-#define CSIPHY_VERSION_V3 0x10
+#define CSIPHY_VERSION_V22 0x01
+#define CSIPHY_VERSION_V20 0x00
+#define CSIPHY_VERSION_V30 0x10
#define MSM_CSIPHY_DRV_NAME "msm_csiphy"
#undef CDBG
@@ -66,7 +68,7 @@
csiphy_params->settle_cnt,
csiphy_params->csid_core);
- if (csiphy_dev->hw_version >= CSIPHY_VERSION_V3) {
+ if (csiphy_dev->hw_version >= CSIPHY_VERSION_V30) {
val = msm_camera_io_r(csiphy_dev->clk_mux_base);
if (csiphy_params->combo_mode &&
(csiphy_params->lane_mask & 0x18)) {
@@ -84,7 +86,7 @@
msm_camera_io_w(0x1, csiphybase + MIPI_CSIPHY_GLBL_T_INIT_CFG0_ADDR);
msm_camera_io_w(0x1, csiphybase + MIPI_CSIPHY_T_WAKEUP_CFG0_ADDR);
- if (csiphy_dev->hw_version < CSIPHY_VERSION_V3) {
+ if (csiphy_dev->hw_version < CSIPHY_VERSION_V30) {
val = 0x3;
msm_camera_io_w((lane_mask << 2) | val,
csiphybase + MIPI_CSIPHY_GLBL_PWR_CFG_ADDR);
@@ -173,6 +175,11 @@
{"csiphy_timer_clk", -1},
};
+static struct msm_cam_clk_info csiphy_8610_clk_info[] = {
+ {"csiphy_timer_src_clk", 200000000},
+ {"csiphy_timer_clk", -1},
+};
+
static struct msm_cam_clk_info csiphy_8974_clk_info[] = {
{"camss_top_ahb_clk", -1},
{"ispif_ahb_clk", -1},
@@ -216,12 +223,17 @@
}
CDBG("%s:%d called\n", __func__, __LINE__);
- if (CSIPHY_VERSION < CSIPHY_VERSION_V3) {
+ if (CSIPHY_VERSION == CSIPHY_VERSION_V20) {
CDBG("%s:%d called\n", __func__, __LINE__);
rc = msm_cam_clk_enable(&csiphy_dev->pdev->dev,
csiphy_8960_clk_info, csiphy_dev->csiphy_clk,
ARRAY_SIZE(csiphy_8960_clk_info), 1);
- } else {
+ } else if (CSIPHY_VERSION == CSIPHY_VERSION_V22) {
+ CDBG("%s:%d called\n", __func__, __LINE__);
+ rc = msm_cam_clk_enable(&csiphy_dev->pdev->dev,
+ csiphy_8610_clk_info, csiphy_dev->csiphy_clk,
+ ARRAY_SIZE(csiphy_8610_clk_info), 1);
+ } else if (CSIPHY_VERSION == CSIPHY_VERSION_V30) {
if (!csiphy_dev->clk_mux_mem || !csiphy_dev->clk_mux_io) {
pr_err("%s clk mux mem %p io %p\n", __func__,
csiphy_dev->clk_mux_mem,
@@ -242,6 +254,11 @@
rc = msm_cam_clk_enable(&csiphy_dev->pdev->dev,
csiphy_8974_clk_info, csiphy_dev->csiphy_clk,
ARRAY_SIZE(csiphy_8974_clk_info), 1);
+ } else {
+ pr_err("%s: ERROR Invalid CSIPHY Version %d",
+ __func__, __LINE__);
+ rc = -EINVAL;
+ return rc;
}
CDBG("%s:%d called\n", __func__, __LINE__);
@@ -259,8 +276,13 @@
msm_csiphy_reset(csiphy_dev);
CDBG("%s:%d called\n", __func__, __LINE__);
- csiphy_dev->hw_version =
- msm_camera_io_r(csiphy_dev->base + MIPI_CSIPHY_HW_VERSION_ADDR);
+
+ if (CSIPHY_VERSION == CSIPHY_VERSION_V30)
+ csiphy_dev->hw_version =
+ msm_camera_io_r(csiphy_dev->base +
+ MIPI_CSIPHY_HW_VERSION_ADDR);
+ else
+ csiphy_dev->hw_version = CSIPHY_VERSION;
CDBG("%s:%d called csiphy_dev->hw_version %x\n", __func__, __LINE__,
csiphy_dev->hw_version);
@@ -304,13 +326,17 @@
CDBG("%s:%d called\n", __func__, __LINE__);
- if (CSIPHY_VERSION < CSIPHY_VERSION_V3) {
+ if (CSIPHY_VERSION == CSIPHY_VERSION_V20) {
CDBG("%s:%d called\n", __func__, __LINE__);
rc = msm_cam_clk_enable(&csiphy_dev->pdev->dev,
csiphy_8960_clk_info, csiphy_dev->csiphy_clk,
ARRAY_SIZE(csiphy_8960_clk_info), 1);
- } else {
-
+ } else if (CSIPHY_VERSION == CSIPHY_VERSION_V22) {
+ CDBG("%s:%d called\n", __func__, __LINE__);
+ rc = msm_cam_clk_enable(&csiphy_dev->pdev->dev,
+ csiphy_8610_clk_info, csiphy_dev->csiphy_clk,
+ ARRAY_SIZE(csiphy_8610_clk_info), 1);
+ } else if (CSIPHY_VERSION == CSIPHY_VERSION_V30) {
if (!csiphy_dev->clk_mux_mem || !csiphy_dev->clk_mux_io) {
pr_err("%s clk mux mem %p io %p\n", __func__,
csiphy_dev->clk_mux_mem,
@@ -332,6 +358,11 @@
rc = msm_cam_clk_enable(&csiphy_dev->pdev->dev,
csiphy_8974_clk_info, csiphy_dev->csiphy_clk,
ARRAY_SIZE(csiphy_8974_clk_info), 1);
+ } else {
+ pr_err("%s: ERROR Invalid CSIPHY Version %d",
+ __func__, __LINE__);
+ rc = -EINVAL;
+ return rc;
}
CDBG("%s:%d called\n", __func__, __LINE__);
@@ -347,8 +378,13 @@
msm_csiphy_reset(csiphy_dev);
CDBG("%s:%d called\n", __func__, __LINE__);
- csiphy_dev->hw_version =
- msm_camera_io_r(csiphy_dev->base + MIPI_CSIPHY_HW_VERSION_ADDR);
+
+ if (CSIPHY_VERSION == CSIPHY_VERSION_V30)
+ csiphy_dev->hw_version =
+ msm_camera_io_r(csiphy_dev->base +
+ MIPI_CSIPHY_HW_VERSION_ADDR);
+ else
+ csiphy_dev->hw_version = CSIPHY_VERSION;
CDBG("%s:%d called csiphy_dev->hw_version %x\n", __func__, __LINE__,
csiphy_dev->hw_version);
@@ -382,7 +418,7 @@
csi_lane_params->csi_lane_assign,
csi_lane_params->csi_lane_mask);
- if (csiphy_dev->hw_version < CSIPHY_VERSION_V3) {
+ if (csiphy_dev->hw_version < CSIPHY_VERSION_V30) {
csiphy_dev->lane_mask[csiphy_dev->pdev->id] = 0;
for (i = 0; i < 4; i++)
msm_camera_io_w(0x0, csiphy_dev->base +
@@ -412,11 +448,15 @@
disable_irq(csiphy_dev->irq->start);
- if (CSIPHY_VERSION < CSIPHY_VERSION_V3) {
+ if (CSIPHY_VERSION == CSIPHY_VERSION_V20) {
msm_cam_clk_enable(&csiphy_dev->pdev->dev,
csiphy_8960_clk_info, csiphy_dev->csiphy_clk,
ARRAY_SIZE(csiphy_8960_clk_info), 0);
- } else {
+ } else if (CSIPHY_VERSION == CSIPHY_VERSION_V22) {
+ msm_cam_clk_enable(&csiphy_dev->pdev->dev,
+ csiphy_8610_clk_info, csiphy_dev->csiphy_clk,
+ ARRAY_SIZE(csiphy_8610_clk_info), 0);
+ } else if (CSIPHY_VERSION == CSIPHY_VERSION_V30) {
msm_cam_clk_enable(&csiphy_dev->pdev->dev,
csiphy_8974_clk_info, csiphy_dev->csiphy_clk,
ARRAY_SIZE(csiphy_8974_clk_info), 0);
@@ -453,7 +493,7 @@
csi_lane_params->csi_lane_assign,
csi_lane_params->csi_lane_mask);
- if (csiphy_dev->hw_version < CSIPHY_VERSION_V3) {
+ if (csiphy_dev->hw_version < CSIPHY_VERSION_V30) {
csiphy_dev->lane_mask[csiphy_dev->pdev->id] = 0;
for (i = 0; i < 4; i++)
msm_camera_io_w(0x0, csiphy_dev->base +
@@ -481,11 +521,17 @@
msm_camera_io_w(0x0, csiphy_dev->base + MIPI_CSIPHY_LNCK_CFG2_ADDR);
msm_camera_io_w(0x0, csiphy_dev->base + MIPI_CSIPHY_GLBL_PWR_CFG_ADDR);
- if (CSIPHY_VERSION < CSIPHY_VERSION_V3) {
+ if (CSIPHY_VERSION == CSIPHY_VERSION_V20) {
msm_cam_clk_enable(&csiphy_dev->pdev->dev,
csiphy_8960_clk_info, csiphy_dev->csiphy_clk,
ARRAY_SIZE(csiphy_8960_clk_info), 0);
- } else {
+
+ } else if (CSIPHY_VERSION == CSIPHY_VERSION_V22) {
+ msm_cam_clk_enable(&csiphy_dev->pdev->dev,
+ csiphy_8610_clk_info, csiphy_dev->csiphy_clk,
+ ARRAY_SIZE(csiphy_8610_clk_info), 0);
+
+ } else if (CSIPHY_VERSION == CSIPHY_VERSION_V30) {
msm_cam_clk_enable(&csiphy_dev->pdev->dev,
csiphy_8974_clk_info, csiphy_dev->csiphy_clk,
ARRAY_SIZE(csiphy_8974_clk_info), 0);
diff --git a/drivers/media/platform/msm/camera_v2/sensor/eeprom/msm_eeprom.c b/drivers/media/platform/msm/camera_v2/sensor/eeprom/msm_eeprom.c
index 3dd3a4e..e096e96 100644
--- a/drivers/media/platform/msm/camera_v2/sensor/eeprom/msm_eeprom.c
+++ b/drivers/media/platform/msm/camera_v2/sensor/eeprom/msm_eeprom.c
@@ -130,12 +130,6 @@
pr_err("%s failed e_ctrl is NULL\n", __func__);
return -EINVAL;
}
- if (e_ctrl->eeprom_device_type == MSM_CAMERA_PLATFORM_DEVICE) {
- rc = e_ctrl->i2c_client.i2c_func_tbl->i2c_util(
- &e_ctrl->i2c_client, MSM_CCI_INIT);
- if (rc < 0)
- pr_err("%s cci_init failed\n", __func__);
- }
CDBG("%s X\n", __func__);
return rc;
}
@@ -149,12 +143,6 @@
pr_err("%s failed e_ctrl is NULL\n", __func__);
return -EINVAL;
}
- if (e_ctrl->eeprom_device_type == MSM_CAMERA_PLATFORM_DEVICE) {
- rc = e_ctrl->i2c_client.i2c_func_tbl->i2c_util(
- &e_ctrl->i2c_client, MSM_CCI_RELEASE);
- if (rc < 0)
- pr_err("%s cci_init failed\n", __func__);
- }
CDBG("%s X\n", __func__);
return rc;
}
@@ -445,14 +433,18 @@
struct msm_eeprom_board_info *eb_info;
struct msm_camera_power_ctrl_t *power_info =
&e_ctrl->eboard_info->power_info;
- struct spi_device *spi = e_ctrl->i2c_client.spi_client->spi_master;
- struct device_node *of_node = spi->dev.of_node;
+ struct device_node *of_node = NULL;
struct msm_camera_gpio_conf *gconf = NULL;
uint16_t gpio_array_size = 0;
uint16_t *gpio_array = NULL;
eb_info = e_ctrl->eboard_info;
- rc = msm_camera_get_dt_power_setting_data(spi->dev.of_node,
+ if (e_ctrl->eeprom_device_type == MSM_CAMERA_SPI_DEVICE)
+ of_node = e_ctrl->i2c_client.
+ spi_client->spi_master->dev.of_node;
+ else if (e_ctrl->eeprom_device_type == MSM_CAMERA_PLATFORM_DEVICE)
+ of_node = e_ctrl->pdev->dev.of_node;
+ rc = msm_camera_get_dt_power_setting_data(of_node,
&power_info->power_setting, &power_info->power_setting_size);
if (rc)
return rc;
@@ -787,26 +779,35 @@
goto board_free;
}
- if (e_ctrl->eeprom_device_type == MSM_CAMERA_PLATFORM_DEVICE) {
- rc = e_ctrl->i2c_client.i2c_func_tbl->i2c_util(
- &e_ctrl->i2c_client, MSM_CCI_INIT);
- if (rc < 0)
- pr_err("%s cci_init failed\n", __func__);
- }
+ rc = msm_eeprom_get_dt_data(e_ctrl);
+ if (rc)
+ goto board_free;
rc = msm_eeprom_alloc_memory_map(e_ctrl, of_node);
if (rc)
goto board_free;
+ rc = msm_camera_power_up(power_info, e_ctrl->eeprom_device_type,
+ &e_ctrl->i2c_client);
+ if (rc) {
+ pr_err("failed rc %d\n", rc);
+ goto memdata_free;
+ }
rc = read_eeprom_memory(e_ctrl);
if (rc < 0) {
pr_err("%s read_eeprom_memory failed\n", __func__);
- goto memdata_free;
+ goto power_down;
}
pr_err("%s line %d\n", __func__, __LINE__);
for (j = 0; j < e_ctrl->num_bytes; j++)
CDBG("memory_data[%d] = 0x%X\n", j, e_ctrl->memory_data[j]);
+ rc = msm_camera_power_down(power_info, e_ctrl->eeprom_device_type,
+ &e_ctrl->i2c_client);
+ if (rc) {
+ pr_err("failed rc %d\n", rc);
+ goto memdata_free;
+ }
v4l2_subdev_init(&e_ctrl->msm_sd.sd,
e_ctrl->eeprom_v4l2_subdev_ops);
v4l2_set_subdevdata(&e_ctrl->msm_sd.sd, e_ctrl);
@@ -821,16 +822,13 @@
msm_sd_register(&e_ctrl->msm_sd);
- if (e_ctrl->eeprom_device_type == MSM_CAMERA_PLATFORM_DEVICE) {
- rc = e_ctrl->i2c_client.i2c_func_tbl->i2c_util(
- &e_ctrl->i2c_client, MSM_CCI_RELEASE);
- if (rc < 0)
- pr_err("%s cci_init failed\n", __func__);
- }
e_ctrl->is_supported = 1;
CDBG("%s X\n", __func__);
return rc;
+power_down:
+ msm_camera_power_down(power_info, e_ctrl->eeprom_device_type,
+ &e_ctrl->i2c_client);
memdata_free:
kfree(e_ctrl->memory_data);
kfree(eb_info->eeprom_map);
diff --git a/drivers/media/platform/msm/camera_v2/sensor/gc0339.c b/drivers/media/platform/msm/camera_v2/sensor/gc0339.c
new file mode 100644
index 0000000..8cba04c
--- /dev/null
+++ b/drivers/media/platform/msm/camera_v2/sensor/gc0339.c
@@ -0,0 +1,676 @@
+/* Copyright (c) 2013, The Linux Foundation. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 and
+ * only version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ */
+#include <mach/gpiomux.h>
+#include "msm_sensor.h"
+#include "msm_cci.h"
+#include "msm_camera_io_util.h"
+#include "msm_camera_i2c_mux.h"
+
+
+#define GC0339_SENSOR_NAME "gc0339"
+DEFINE_MSM_MUTEX(gc0339_mut);
+
+#undef CDBG
+#ifdef CONFIG_MSMB_CAMERA_DEBUG
+#define CDBG(fmt, args...) pr_err(fmt, ##args)
+#else
+#define CDBG(fmt, args...) do { } while (0)
+#endif
+
+
+static struct msm_sensor_ctrl_t gc0339_s_ctrl;
+
+static struct msm_sensor_power_setting gc0339_power_setting[] = {
+
+ {
+ .seq_type = SENSOR_VREG,
+ .seq_val = CAM_VIO,
+ .config_val = 0,
+ .delay = 0,
+ },
+ {
+ .seq_type = SENSOR_VREG,
+ .seq_val = CAM_VDIG,
+ .config_val = 0,
+ .delay = 0,
+ },
+ {
+ .seq_type = SENSOR_VREG,
+ .seq_val = CAM_VANA,
+ .config_val = 0,
+ .delay = 0,
+ },
+ {
+ .seq_type = SENSOR_GPIO,
+ .seq_val = SENSOR_GPIO_STANDBY,
+ .config_val = GPIO_OUT_HIGH,
+ .delay = 0,
+ },
+ {
+ .seq_type = SENSOR_CLK,
+ .seq_val = SENSOR_CAM_MCLK,
+ .config_val = 24000000,
+ .delay = 5,
+ },
+ {
+ .seq_type = SENSOR_GPIO,
+ .seq_val = SENSOR_GPIO_STANDBY,
+ .config_val = GPIO_OUT_LOW,
+ .delay = 0,
+ },
+ {
+ .seq_type = SENSOR_GPIO,
+ .seq_val = SENSOR_GPIO_RESET,
+ .config_val = GPIO_OUT_HIGH,
+ .delay = 1,
+ },
+ {
+ .seq_type = SENSOR_GPIO,
+ .seq_val = SENSOR_GPIO_RESET,
+ .config_val = GPIO_OUT_LOW,
+ .delay = 1,
+ },
+ {
+ .seq_type = SENSOR_GPIO,
+ .seq_val = SENSOR_GPIO_RESET,
+ .config_val = GPIO_OUT_HIGH,
+ .delay = 1,
+ },
+};
+
+static struct v4l2_subdev_info gc0339_subdev_info[] = {
+ {
+ .code = V4L2_MBUS_FMT_SBGGR10_1X10,
+ .colorspace = V4L2_COLORSPACE_JPEG,
+ .fmt = 1,
+ .order = 0,
+ },
+};
+
+static int32_t msm_gc0339_i2c_probe(struct i2c_client *client,
+ const struct i2c_device_id *id)
+{
+ return msm_sensor_i2c_probe(client, id, &gc0339_s_ctrl);
+}
+
+static const struct i2c_device_id gc0339_i2c_id[] = {
+ {GC0339_SENSOR_NAME, (kernel_ulong_t)&gc0339_s_ctrl},
+ { }
+};
+
+static struct i2c_driver gc0339_i2c_driver = {
+ .id_table = gc0339_i2c_id,
+ .probe = msm_gc0339_i2c_probe,
+ .driver = {
+ .name = GC0339_SENSOR_NAME,
+ },
+};
+
+static struct msm_camera_i2c_client gc0339_sensor_i2c_client = {
+ .addr_type = MSM_CAMERA_I2C_BYTE_ADDR,
+};
+
+int32_t gc0339_power_up(struct msm_sensor_ctrl_t *s_ctrl)
+{
+ int32_t rc = 0, index = 0;
+ struct msm_sensor_power_setting_array *power_setting_array = NULL;
+ struct msm_sensor_power_setting *power_setting = NULL;
+ struct msm_camera_sensor_board_info *data = s_ctrl->sensordata;
+
+ CDBG("%s:%d\n", __func__, __LINE__);
+ power_setting_array = &s_ctrl->power_setting_array;
+
+ if (data->gpio_conf->cam_gpiomux_conf_tbl != NULL) {
+ pr_err("%s:%d mux install\n", __func__, __LINE__);
+ msm_gpiomux_install(
+ (struct msm_gpiomux_config *)
+ data->gpio_conf->cam_gpiomux_conf_tbl,
+ data->gpio_conf->cam_gpiomux_conf_tbl_size);
+ }
+
+ rc = msm_camera_request_gpio_table(
+ data->gpio_conf->cam_gpio_req_tbl,
+ data->gpio_conf->cam_gpio_req_tbl_size, 1);
+ if (rc < 0) {
+ pr_err("%s: request gpio failed\n", __func__);
+ return rc;
+ }
+ for (index = 0; index < power_setting_array->size; index++) {
+ CDBG("%s index %d\n", __func__, index);
+ power_setting = &power_setting_array->power_setting[index];
+ CDBG("%s type %d\n", __func__, power_setting->seq_type);
+ switch (power_setting->seq_type) {
+ case SENSOR_CLK:
+ if (power_setting->seq_val >= s_ctrl->clk_info_size) {
+ pr_err("%s clk index %d >= max %d\n", __func__,
+ power_setting->seq_val,
+ s_ctrl->clk_info_size);
+ goto power_up_failed;
+ }
+ if (power_setting->config_val)
+ s_ctrl->clk_info[power_setting->seq_val].
+ clk_rate = power_setting->config_val;
+
+ rc = msm_cam_clk_enable(s_ctrl->dev,
+ &s_ctrl->clk_info[0],
+ (struct clk **)&power_setting->data[0],
+ s_ctrl->clk_info_size,
+ 1);
+ if (rc < 0) {
+ pr_err("%s: clk enable failed\n",
+ __func__);
+ goto power_up_failed;
+ }
+ break;
+ case SENSOR_GPIO:
+ if (power_setting->seq_val >= SENSOR_GPIO_MAX ||
+ !data->gpio_conf->gpio_num_info) {
+ pr_err("%s gpio index %d >= max %d\n", __func__,
+ power_setting->seq_val,
+ SENSOR_GPIO_MAX);
+ goto power_up_failed;
+ }
+ pr_debug("%s:%d gpio set val %d\n", __func__, __LINE__,
+ data->gpio_conf->gpio_num_info->gpio_num
+ [power_setting->seq_val]);
+ if (data->gpio_conf->gpio_num_info->gpio_num
+ [power_setting->seq_val])
+ gpio_set_value_cansleep(
+ data->gpio_conf->gpio_num_info->gpio_num
+ [power_setting->seq_val],
+ power_setting->config_val);
+ break;
+ case SENSOR_VREG:
+ if (power_setting->seq_val >= CAM_VREG_MAX) {
+ pr_err("%s vreg index %d >= max %d\n", __func__,
+ power_setting->seq_val,
+ SENSOR_GPIO_MAX);
+ goto power_up_failed;
+ }
+ msm_camera_config_single_vreg(s_ctrl->dev,
+ &data->cam_vreg[power_setting->seq_val],
+ (struct regulator **)&power_setting->data[0],
+ 1);
+ break;
+ default:
+ pr_err("%s error power seq type %d\n", __func__,
+ power_setting->seq_type);
+ break;
+ }
+ if (power_setting->delay > 20) {
+ msleep(power_setting->delay);
+ } else if (power_setting->delay) {
+ usleep_range(power_setting->delay * 1000,
+ (power_setting->delay * 1000) + 1000);
+ }
+ }
+
+ if (s_ctrl->sensor_device_type == MSM_CAMERA_PLATFORM_DEVICE) {
+ rc = s_ctrl->sensor_i2c_client->i2c_func_tbl->i2c_util(
+ s_ctrl->sensor_i2c_client, MSM_CCI_INIT);
+ if (rc < 0) {
+ pr_err("%s cci_init failed\n", __func__);
+ goto power_up_failed;
+ }
+ }
+ if (s_ctrl->func_tbl->sensor_match_id)
+ rc = s_ctrl->func_tbl->sensor_match_id(s_ctrl);
+ else
+ rc = msm_sensor_match_id(s_ctrl);
+ if (rc < 0) {
+ pr_err("%s:%d match id failed rc %d\n", __func__, __LINE__, rc);
+ goto power_up_failed;
+ }
+
+ CDBG("%s exit\n", __func__);
+ return 0;
+power_up_failed:
+ pr_err("%s:%d failed\n", __func__, __LINE__);
+ if (s_ctrl->sensor_device_type == MSM_CAMERA_PLATFORM_DEVICE) {
+ s_ctrl->sensor_i2c_client->i2c_func_tbl->i2c_util(
+ s_ctrl->sensor_i2c_client, MSM_CCI_RELEASE);
+ }
+
+ for (index--; index >= 0; index--) {
+ CDBG("%s index %d\n", __func__, index);
+ power_setting = &power_setting_array->power_setting[index];
+ CDBG("%s type %d\n", __func__, power_setting->seq_type);
+ switch (power_setting->seq_type) {
+ case SENSOR_CLK:
+ msm_cam_clk_enable(s_ctrl->dev,
+ &s_ctrl->clk_info[0],
+ (struct clk **)&power_setting->data[0],
+ s_ctrl->clk_info_size,
+ 0);
+ break;
+ case SENSOR_GPIO:
+ gpio_set_value_cansleep(
+ data->gpio_conf->gpio_num_info->gpio_num
+ [power_setting->seq_val], GPIOF_OUT_INIT_LOW);
+ break;
+ case SENSOR_VREG:
+ msm_camera_config_single_vreg(s_ctrl->dev,
+ &data->cam_vreg[power_setting->seq_val],
+ (struct regulator **)&power_setting->data[0],
+ 0);
+ break;
+ default:
+ pr_err("%s error power seq type %d\n", __func__,
+ power_setting->seq_type);
+ break;
+ }
+ if (power_setting->delay > 20) {
+ msleep(power_setting->delay);
+ } else if (power_setting->delay) {
+ usleep_range(power_setting->delay * 1000,
+ (power_setting->delay * 1000) + 1000);
+ }
+ }
+ msm_camera_request_gpio_table(
+ data->gpio_conf->cam_gpio_req_tbl,
+ data->gpio_conf->cam_gpio_req_tbl_size, 0);
+ return rc;
+}
+
+int32_t gc0339_power_down(struct msm_sensor_ctrl_t *s_ctrl)
+{
+ int32_t index = 0;
+ struct msm_sensor_power_setting_array *power_setting_array = NULL;
+ struct msm_sensor_power_setting *power_setting = NULL;
+ struct msm_camera_sensor_board_info *data = s_ctrl->sensordata;
+
+ CDBG("%s:%d\n", __func__, __LINE__);
+ power_setting_array = &s_ctrl->power_setting_array;
+
+ if (s_ctrl->sensor_device_type == MSM_CAMERA_PLATFORM_DEVICE) {
+ s_ctrl->sensor_i2c_client->i2c_func_tbl->i2c_util(
+ s_ctrl->sensor_i2c_client, MSM_CCI_RELEASE);
+ }
+
+ for (index = (power_setting_array->size - 1); index >= 0; index--) {
+ CDBG("%s index %d\n", __func__, index);
+ power_setting = &power_setting_array->power_setting[index];
+ CDBG("%s type %d\n", __func__, power_setting->seq_type);
+ switch (power_setting->seq_type) {
+ case SENSOR_CLK:
+ msm_cam_clk_enable(s_ctrl->dev,
+ &s_ctrl->clk_info[0],
+ (struct clk **)&power_setting->data[0],
+ s_ctrl->clk_info_size,
+ 0);
+ break;
+ case SENSOR_GPIO:
+ if (power_setting->seq_val >= SENSOR_GPIO_MAX ||
+ !data->gpio_conf->gpio_num_info) {
+ pr_err("%s gpio index %d >= max %d\n", __func__,
+ power_setting->seq_val,
+ SENSOR_GPIO_MAX);
+ continue;
+ }
+ gpio_set_value_cansleep(
+ data->gpio_conf->gpio_num_info->gpio_num
+ [power_setting->seq_val], GPIOF_OUT_INIT_LOW);
+ break;
+ case SENSOR_VREG:
+ if (power_setting->seq_val >= CAM_VREG_MAX) {
+ pr_err("%s vreg index %d >= max %d\n", __func__,
+ power_setting->seq_val,
+ SENSOR_GPIO_MAX);
+ continue;
+ }
+ msm_camera_config_single_vreg(s_ctrl->dev,
+ &data->cam_vreg[power_setting->seq_val],
+ (struct regulator **)&power_setting->data[0],
+ 0);
+ break;
+ default:
+ pr_err("%s error power seq type %d\n", __func__,
+ power_setting->seq_type);
+ break;
+ }
+ if (power_setting->delay > 20) {
+ msleep(power_setting->delay);
+ } else if (power_setting->delay) {
+ usleep_range(power_setting->delay * 1000,
+ (power_setting->delay * 1000) + 1000);
+ }
+ }
+ msm_camera_request_gpio_table(
+ data->gpio_conf->cam_gpio_req_tbl,
+ data->gpio_conf->cam_gpio_req_tbl_size, 0);
+ CDBG("%s exit\n", __func__);
+ return 0;
+}
+
+int32_t gc0339_match_id(struct msm_sensor_ctrl_t *s_ctrl)
+{
+ int32_t rc = 0;
+ uint16_t chipid = 0;
+ s_ctrl->sensor_i2c_client->i2c_func_tbl->i2c_write(
+ s_ctrl->sensor_i2c_client,
+ 0xfc,
+ 0x10, MSM_CAMERA_I2C_BYTE_DATA);
+ rc = s_ctrl->sensor_i2c_client->i2c_func_tbl->i2c_read(
+ s_ctrl->sensor_i2c_client,
+ s_ctrl->sensordata->slave_info->sensor_id_reg_addr,
+ &chipid, MSM_CAMERA_I2C_BYTE_DATA);
+ if (rc < 0) {
+ pr_err("%s: %s: read id failed\n", __func__,
+ s_ctrl->sensordata->sensor_name);
+ return rc;
+ }
+
+ if (chipid != s_ctrl->sensordata->slave_info->sensor_id) {
+ pr_err("msm_sensor_match_id chip id doesnot match\n");
+ return -ENODEV;
+ }
+ return rc;
+}
+
+int32_t gc0339_config(struct msm_sensor_ctrl_t *s_ctrl,
+ void __user *argp)
+{
+ struct sensorb_cfg_data *cdata = (struct sensorb_cfg_data *)argp;
+ long rc = 0;
+ int32_t i = 0;
+ mutex_lock(s_ctrl->msm_sensor_mutex);
+ switch (cdata->cfgtype) {
+ case CFG_GET_SENSOR_INFO:
+ memcpy(cdata->cfg.sensor_info.sensor_name,
+ s_ctrl->sensordata->sensor_name,
+ sizeof(cdata->cfg.sensor_info.sensor_name));
+ cdata->cfg.sensor_info.session_id =
+ s_ctrl->sensordata->sensor_info->session_id;
+ for (i = 0; i < SUB_MODULE_MAX; i++)
+ cdata->cfg.sensor_info.subdev_id[i] =
+ s_ctrl->sensordata->sensor_info->subdev_id[i];
+ CDBG("%s:%d sensor name %s\n", __func__, __LINE__,
+ cdata->cfg.sensor_info.sensor_name);
+ CDBG("%s:%d session id %d\n", __func__, __LINE__,
+ cdata->cfg.sensor_info.session_id);
+ for (i = 0; i < SUB_MODULE_MAX; i++)
+ CDBG("%s:%d subdev_id[%d] %d\n", __func__, __LINE__, i,
+ cdata->cfg.sensor_info.subdev_id[i]);
+
+ break;
+ case CFG_GET_SENSOR_INIT_PARAMS:
+ cdata->cfg.sensor_init_params =
+ *s_ctrl->sensordata->sensor_init_params;
+ CDBG("%s:%d init params mode %d pos %d mount %d\n", __func__,
+ __LINE__,
+ cdata->cfg.sensor_init_params.modes_supported,
+ cdata->cfg.sensor_init_params.position,
+ cdata->cfg.sensor_init_params.sensor_mount_angle);
+ break;
+ case CFG_SET_SLAVE_INFO: {
+ struct msm_camera_sensor_slave_info sensor_slave_info;
+ struct msm_sensor_power_setting_array *power_setting_array;
+ int slave_index = 0;
+ if (copy_from_user(&sensor_slave_info,
+ (void *)cdata->cfg.setting,
+ sizeof(struct msm_camera_sensor_slave_info))) {
+ pr_err("%s:%d failed\n", __func__, __LINE__);
+ rc = -EFAULT;
+ break;
+ }
+ /* Update sensor slave address */
+ if (sensor_slave_info.slave_addr) {
+ s_ctrl->sensor_i2c_client->cci_client->sid =
+ sensor_slave_info.slave_addr >> 1;
+ }
+
+ /* Update sensor address type */
+ s_ctrl->sensor_i2c_client->addr_type =
+ sensor_slave_info.addr_type;
+
+ /* Update power up / down sequence */
+ s_ctrl->power_setting_array =
+ sensor_slave_info.power_setting_array;
+ power_setting_array = &s_ctrl->power_setting_array;
+ power_setting_array->power_setting = kzalloc(
+ power_setting_array->size *
+ sizeof(struct msm_sensor_power_setting), GFP_KERNEL);
+ if (!power_setting_array->power_setting) {
+ pr_err("%s:%d failed\n", __func__, __LINE__);
+ rc = -ENOMEM;
+ break;
+ }
+ if (copy_from_user(power_setting_array->power_setting,
+ (void *)
+ sensor_slave_info.power_setting_array.power_setting,
+ power_setting_array->size *
+ sizeof(struct msm_sensor_power_setting))) {
+ pr_err("%s:%d failed\n", __func__, __LINE__);
+ rc = -EFAULT;
+ break;
+ }
+ s_ctrl->free_power_setting = true;
+ CDBG("%s sensor id %x\n", __func__,
+ sensor_slave_info.slave_addr);
+ CDBG("%s sensor addr type %d\n", __func__,
+ sensor_slave_info.addr_type);
+ CDBG("%s sensor reg %x\n", __func__,
+ sensor_slave_info.sensor_id_info.sensor_id_reg_addr);
+ CDBG("%s sensor id %x\n", __func__,
+ sensor_slave_info.sensor_id_info.sensor_id);
+ for (slave_index = 0; slave_index <
+ power_setting_array->size; slave_index++) {
+ CDBG("%s i %d power setting %d %d %ld %d\n", __func__,
+ slave_index,
+ power_setting_array->power_setting[slave_index].
+ seq_type,
+ power_setting_array->power_setting[slave_index].
+ seq_val,
+ power_setting_array->power_setting[slave_index].
+ config_val,
+ power_setting_array->power_setting[slave_index].
+ delay);
+ }
+ break;
+ }
+ case CFG_WRITE_I2C_ARRAY: {
+ struct msm_camera_i2c_reg_setting conf_array;
+ struct msm_camera_i2c_reg_array *reg_setting = NULL;
+
+ if (copy_from_user(&conf_array,
+ (void *)cdata->cfg.setting,
+ sizeof(struct msm_camera_i2c_reg_setting))) {
+ pr_err("%s:%d failed\n", __func__, __LINE__);
+ rc = -EFAULT;
+ break;
+ }
+
+ reg_setting = kzalloc(conf_array.size *
+ (sizeof(struct msm_camera_i2c_reg_array)), GFP_KERNEL);
+ if (!reg_setting) {
+ pr_err("%s:%d failed\n", __func__, __LINE__);
+ rc = -ENOMEM;
+ break;
+ }
+ if (copy_from_user(reg_setting, (void *)conf_array.reg_setting,
+ conf_array.size *
+ sizeof(struct msm_camera_i2c_reg_array))) {
+ pr_err("%s:%d failed\n", __func__, __LINE__);
+ kfree(reg_setting);
+ rc = -EFAULT;
+ break;
+ }
+
+ conf_array.reg_setting = reg_setting;
+ rc = s_ctrl->sensor_i2c_client->i2c_func_tbl->i2c_write_table(
+ s_ctrl->sensor_i2c_client, &conf_array);
+ kfree(reg_setting);
+ break;
+ }
+ case CFG_WRITE_I2C_SEQ_ARRAY: {
+ struct msm_camera_i2c_seq_reg_setting conf_array;
+ struct msm_camera_i2c_seq_reg_array *reg_setting = NULL;
+
+ if (copy_from_user(&conf_array,
+ (void *)cdata->cfg.setting,
+ sizeof(struct msm_camera_i2c_seq_reg_setting))) {
+ pr_err("%s:%d failed\n", __func__, __LINE__);
+ rc = -EFAULT;
+ break;
+ }
+
+ reg_setting = kzalloc(conf_array.size *
+ (sizeof(struct msm_camera_i2c_seq_reg_array)),
+ GFP_KERNEL);
+ if (!reg_setting) {
+ pr_err("%s:%d failed\n", __func__, __LINE__);
+ rc = -ENOMEM;
+ break;
+ }
+ if (copy_from_user(reg_setting, (void *)conf_array.reg_setting,
+ conf_array.size *
+ sizeof(struct msm_camera_i2c_seq_reg_array))) {
+ pr_err("%s:%d failed\n", __func__, __LINE__);
+ kfree(reg_setting);
+ rc = -EFAULT;
+ break;
+ }
+
+ conf_array.reg_setting = reg_setting;
+ rc = s_ctrl->sensor_i2c_client->i2c_func_tbl->
+ i2c_write_seq_table(s_ctrl->sensor_i2c_client,
+ &conf_array);
+ kfree(reg_setting);
+ break;
+ }
+
+ case CFG_POWER_UP:
+ if (s_ctrl->func_tbl->sensor_power_up)
+ rc = s_ctrl->func_tbl->sensor_power_up(s_ctrl);
+ else
+ rc = -EFAULT;
+ break;
+
+ case CFG_POWER_DOWN:
+ if (s_ctrl->func_tbl->sensor_power_down)
+ rc = s_ctrl->func_tbl->sensor_power_down(
+ s_ctrl);
+ else
+ rc = -EFAULT;
+ break;
+
+ case CFG_SET_STOP_STREAM_SETTING: {
+ struct msm_camera_i2c_reg_setting *stop_setting =
+ &s_ctrl->stop_setting;
+ struct msm_camera_i2c_reg_array *reg_setting = NULL;
+ if (copy_from_user(stop_setting,
+ (void *)cdata->cfg.setting,
+ sizeof(struct msm_camera_i2c_reg_setting))) {
+ pr_err("%s:%d failed\n", __func__, __LINE__);
+ rc = -EFAULT;
+ break;
+ }
+
+ reg_setting = stop_setting->reg_setting;
+ stop_setting->reg_setting = kzalloc(stop_setting->size *
+ (sizeof(struct msm_camera_i2c_reg_array)), GFP_KERNEL);
+ if (!stop_setting->reg_setting) {
+ pr_err("%s:%d failed\n", __func__, __LINE__);
+ rc = -ENOMEM;
+ break;
+ }
+ if (copy_from_user(stop_setting->reg_setting,
+ (void *)reg_setting,
+ stop_setting->size *
+ sizeof(struct msm_camera_i2c_reg_array))) {
+ pr_err("%s:%d failed\n", __func__, __LINE__);
+ kfree(stop_setting->reg_setting);
+ stop_setting->reg_setting = NULL;
+ stop_setting->size = 0;
+ rc = -EFAULT;
+ break;
+ }
+ break;
+ }
+ default:
+ rc = -EFAULT;
+ break;
+ }
+
+ mutex_unlock(s_ctrl->msm_sensor_mutex);
+ return rc;
+}
+
+static struct msm_sensor_fn_t gc0339_sensor_fn_t = {
+ .sensor_power_up = gc0339_power_up,
+ .sensor_power_down = gc0339_power_down,
+ .sensor_match_id = gc0339_match_id,
+ .sensor_config = gc0339_config,
+};
+
+
+static struct msm_sensor_ctrl_t gc0339_s_ctrl = {
+ .sensor_i2c_client = &gc0339_sensor_i2c_client,
+ .power_setting_array.power_setting = gc0339_power_setting,
+ .power_setting_array.size = ARRAY_SIZE(gc0339_power_setting),
+ .msm_sensor_mutex = &gc0339_mut,
+ .sensor_v4l2_subdev_info = gc0339_subdev_info,
+ .sensor_v4l2_subdev_info_size = ARRAY_SIZE(gc0339_subdev_info),
+ .func_tbl = &gc0339_sensor_fn_t,
+};
+
+static const struct of_device_id gc0339_dt_match[] = {
+ {.compatible = "shinetech,gc0339", .data = &gc0339_s_ctrl},
+ {}
+};
+
+MODULE_DEVICE_TABLE(of, gc0339_dt_match);
+
+static struct platform_driver gc0339_platform_driver = {
+ .driver = {
+ .name = "shinetech,gc0339",
+ .owner = THIS_MODULE,
+ .of_match_table = gc0339_dt_match,
+ },
+};
+
+static int32_t gc0339_platform_probe(struct platform_device *pdev)
+{
+ int32_t rc = 0;
+ const struct of_device_id *match;
+
+ match = of_match_device(gc0339_dt_match, &pdev->dev);
+ rc = msm_sensor_platform_probe(pdev, match->data);
+ return rc;
+}
+
+static int __init gc0339_init_module(void)
+{
+ int32_t rc = 0;
+
+ rc = platform_driver_probe(&gc0339_platform_driver,
+ gc0339_platform_probe);
+ if (!rc)
+ return rc;
+ return i2c_add_driver(&gc0339_i2c_driver);
+}
+
+static void __exit gc0339_exit_module(void)
+{
+ if (gc0339_s_ctrl.pdev) {
+ msm_sensor_free_sensor_data(&gc0339_s_ctrl);
+ platform_driver_unregister(&gc0339_platform_driver);
+ } else
+ i2c_del_driver(&gc0339_i2c_driver);
+ return;
+}
+
+module_init(gc0339_init_module);
+module_exit(gc0339_exit_module);
+MODULE_DESCRIPTION("gc0339");
+MODULE_LICENSE("GPL v2");
diff --git a/drivers/media/platform/msm/camera_v2/sensor/hi256.c b/drivers/media/platform/msm/camera_v2/sensor/hi256.c
new file mode 100644
index 0000000..f1df703
--- /dev/null
+++ b/drivers/media/platform/msm/camera_v2/sensor/hi256.c
@@ -0,0 +1,1413 @@
+/* Copyright (c) 2013, The Linux Foundation. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 and
+ * only version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ */
+#include "msm_sensor.h"
+#include "msm_cci.h"
+#include "msm_camera_io_util.h"
+#define HI256_SENSOR_NAME "hi256"
+#define PLATFORM_DRIVER_NAME "msm_camera_hi256"
+
+#define CONFIG_MSMB_CAMERA_DEBUG
+#undef CDBG
+#ifdef CONFIG_MSMB_CAMERA_DEBUG
+#define CDBG(fmt, args...) pr_err(fmt, ##args)
+#else
+#define CDBG(fmt, args...) do { } while (0)
+#endif
+
+
+DEFINE_MSM_MUTEX(hi256_mut);
+static struct msm_sensor_ctrl_t hi256_s_ctrl;
+
+static struct msm_sensor_power_setting hi256_power_setting[] = {
+ {
+ .seq_type = SENSOR_GPIO,
+ .seq_val = SENSOR_GPIO_STANDBY,
+ .config_val = GPIO_OUT_LOW,
+ .delay = 20,
+ },
+ {
+ .seq_type = SENSOR_GPIO,
+ .seq_val = SENSOR_GPIO_STANDBY,
+ .config_val = GPIO_OUT_HIGH,
+ .delay = 0,
+ },
+ {
+ .seq_type = SENSOR_VREG,
+ .seq_val = CAM_VIO,
+ .config_val = 0,
+ .delay = 0,
+ },
+ {
+ .seq_type = SENSOR_VREG,
+ .seq_val = CAM_VANA,
+ .config_val = 0,
+ .delay = 0,
+ },
+ {
+ .seq_type = SENSOR_VREG,
+ .seq_val = CAM_VDIG,
+ .config_val = 0,
+ .delay = 0,
+ },
+ {
+ .seq_type = SENSOR_CLK,
+ .seq_val = SENSOR_CAM_MCLK,
+ .config_val = 24000000,
+ .delay = 10,
+ },
+ {
+ .seq_type = SENSOR_GPIO,
+ .seq_val = SENSOR_GPIO_STANDBY,
+ .config_val = GPIO_OUT_LOW,
+ .delay = 20,
+ },
+ {
+ .seq_type = SENSOR_GPIO,
+ .seq_val = SENSOR_GPIO_RESET,
+ .config_val = GPIO_OUT_LOW,
+ .delay = 10,
+ },
+ {
+ .seq_type = SENSOR_GPIO,
+ .seq_val = SENSOR_GPIO_RESET,
+ .config_val = GPIO_OUT_HIGH,
+ .delay = 30,
+ },
+ {
+ .seq_type = SENSOR_I2C_MUX,
+ .seq_val = 0,
+ .config_val = 0,
+ .delay = 0,
+ },
+};
+
+static struct msm_camera_i2c_reg_conf hi256_uxga_settings[] = {
+ {0x03, 0x00},
+ {0x01, 0xf1},
+ {0x03, 0x20},
+ {0x10, 0x1c},
+ {0x03, 0x22},
+ {0x10, 0x69},
+ {0x03, 0x00},
+ {0x12, 0x00},
+ {0x20, 0x00},
+ {0x21, 0x0a},
+ {0x22, 0x00},
+ {0x23, 0x0a},
+ {0x40, 0x01},
+ {0x41, 0x68},
+ {0x42, 0x00},
+ {0x43, 0x12},
+ {0x03, 0x10},
+ {0x3f, 0x00},
+ {0x03, 0x12},
+ {0x20, 0x0f},
+ {0x21, 0x0f},
+ {0x90, 0x5d},
+ {0x03, 0x13},
+ {0x80, 0xfd},
+ {0x03, 0x00},
+ {0x10, 0x00},
+ {0x03, 0x48},
+ {0x72, 0x81},
+ {0x30, 0x0c},
+ {0x31, 0x80},
+ {0x03, 0x00},
+ {0x01, 0xf0},
+};
+
+static struct msm_camera_i2c_reg_conf hi256_start_settings[] = {
+ {0x03, 0x00},
+ {0x01, 0xf0},
+};
+
+static struct msm_camera_i2c_reg_conf hi256_stop_settings[] = {
+ {0x03, 0x00},
+ {0x01, 0xf1},
+};
+
+static struct msm_camera_i2c_reg_conf hi256_recommend_settings[] = {
+ {0x01, 0xf1},
+ {0x01, 0xf3},
+ {0x01, 0xf1},
+
+ {0x08, 0x0f},
+ {0x0a, 0x00},
+
+ {0x03, 0x20},
+ {0x10, 0x1c},
+ {0x03, 0x22},
+ {0x10, 0x69},
+
+ {0x03, 0x00},
+ {0x10, 0x13},
+ {0x11, 0x93},
+ {0x12, 0x00},
+ {0x0b, 0xaa},
+ {0x0c, 0xaa},
+ {0x0d, 0xaa},
+ {0x20, 0x00},
+ {0x21, 0x06},
+ {0x22, 0x00},
+ {0x23, 0x05},
+ {0x24, 0x04},
+ {0x25, 0xb0},
+ {0x26, 0x06},
+ {0x27, 0x40},
+ {0x40, 0x01},
+ {0x41, 0x78},
+ {0x42, 0x00},
+ {0x43, 0x14},
+ {0x45, 0x04},
+ {0x46, 0x18},
+ {0x47, 0xd8},
+ {0x80, 0x2e},
+ {0x81, 0x7e},
+ {0x82, 0x90},
+ {0x83, 0x00},
+ {0x84, 0x0c},
+ {0x85, 0x00},
+ {0x90, 0x0c},
+ {0x91, 0x0c},
+ {0x92, 0x78},
+ {0x93, 0x70},
+ {0x94, 0xff},
+ {0x95, 0xff},
+ {0x96, 0xdc},
+ {0x97, 0xfe},
+ {0x98, 0x38},
+ {0xa0, 0x45},
+ {0xa2, 0x45},
+ {0xa4, 0x45},
+ {0xa6, 0x45},
+ {0xa8, 0x45},
+ {0xaa, 0x45},
+ {0xac, 0x45},
+ {0xae, 0x45},
+ {0x99, 0x43},
+ {0x9a, 0x43},
+ {0x9b, 0x43},
+ {0x9c, 0x43},
+ {0x03, 0x02},
+ {0x12, 0x03},
+ {0x13, 0x03},
+ {0x15, 0x00},
+ {0x16, 0x00},
+ {0x17, 0x8C},
+ {0x18, 0x4c},
+ {0x19, 0x00},
+ {0x1a, 0x39},
+ {0x1c, 0x09},
+ {0x1d, 0x40},
+ {0x1e, 0x30},
+ {0x1f, 0x10},
+ {0x20, 0x77},
+ {0x21, 0x6d},
+ {0x22, 0x77},
+ {0x23, 0x30},
+ {0x24, 0x77},
+ {0x27, 0x3c},
+ {0x2b, 0x80},
+ {0x2e, 0x00},
+ {0x2f, 0x00},
+ {0x30, 0x05},
+ {0x50, 0x20},
+ {0x52, 0x01},
+ {0x53, 0xc1},
+ {0x55, 0x1c},
+ {0x56, 0x11},
+ {0x58, 0x22},
+ {0x59, 0x20},
+ {0x5d, 0xa2},
+ {0x5e, 0x5a},
+ {0x60, 0x87},
+ {0x61, 0x99},
+ {0x62, 0x88},
+ {0x63, 0x97},
+ {0x64, 0x88},
+ {0x65, 0x97},
+ {0x67, 0x0c},
+ {0x68, 0x0c},
+ {0x69, 0x0c},
+ {0x72, 0x89},
+ {0x73, 0x96},
+ {0x74, 0x89},
+ {0x75, 0x96},
+ {0x76, 0x89},
+ {0x77, 0x96},
+ {0x7c, 0x85},
+ {0x7d, 0xaf},
+ {0x80, 0x01},
+ {0x81, 0x7f},
+ {0x82, 0x13},
+ {0x83, 0x24},
+ {0x84, 0x7d},
+ {0x85, 0x81},
+ {0x86, 0x7d},
+ {0x87, 0x81},
+ {0x92, 0x48},
+ {0x93, 0x54},
+ {0x94, 0x7d},
+ {0x95, 0x81},
+ {0x96, 0x7d},
+ {0x97, 0x81},
+ {0xa0, 0x02},
+ {0xa1, 0x7b},
+ {0xa2, 0x02},
+ {0xa3, 0x7b},
+ {0xa4, 0x7b},
+ {0xa5, 0x02},
+ {0xa6, 0x7b},
+ {0xa7, 0x02},
+ {0xa8, 0x85},
+ {0xa9, 0x8c},
+ {0xaa, 0x85},
+ {0xab, 0x8c},
+ {0xac, 0x10},
+ {0xad, 0x16},
+ {0xae, 0x10},
+ {0xaf, 0x16},
+ {0xb0, 0x99},
+ {0xb1, 0xa3},
+ {0xb2, 0xa4},
+ {0xb3, 0xae},
+ {0xb4, 0x9b},
+ {0xb5, 0xa2},
+ {0xb6, 0xa6},
+ {0xb7, 0xac},
+ {0xb8, 0x9b},
+ {0xb9, 0x9f},
+ {0xba, 0xa6},
+ {0xbb, 0xaa},
+ {0xbc, 0x9b},
+ {0xbd, 0x9f},
+ {0xbe, 0xa6},
+ {0xbf, 0xaa},
+ {0xc4, 0x2c},
+ {0xc5, 0x43},
+ {0xc6, 0x63},
+ {0xc7, 0x79},
+ {0xc8, 0x2d},
+ {0xc9, 0x42},
+ {0xca, 0x2d},
+ {0xcb, 0x42},
+ {0xcc, 0x64},
+ {0xcd, 0x78},
+ {0xce, 0x64},
+ {0xcf, 0x78},
+ {0xd0, 0x0a},
+ {0xd1, 0x09},
+ {0xd4, 0x0c},
+ {0xd5, 0x0c},
+ {0xd6, 0x78},
+ {0xd7, 0x70},
+ {0xe0, 0xc4},
+ {0xe1, 0xc4},
+ {0xe2, 0xc4},
+ {0xe3, 0xc4},
+ {0xe4, 0x00},
+ {0xe8, 0x80},
+ {0xe9, 0x40},
+ {0xea, 0x7f},
+ {0xf0, 0xc1},
+ {0xf1, 0xc1},
+ {0xf2, 0xc1},
+ {0xf3, 0xc1},
+ {0xf4, 0xc1},
+ {0x03, 0x03},
+ {0x10, 0x10},
+ {0x03, 0x10},
+ {0x10, 0x03},
+ {0x12, 0x30},
+ {0x13, 0x02},
+ {0x20, 0x00},
+ {0x30, 0x00},
+ {0x31, 0x00},
+ {0x32, 0x00},
+ {0x33, 0x00},
+ {0x34, 0x30},
+ {0x35, 0x00},
+ {0x36, 0x00},
+ {0x38, 0x00},
+ {0x3e, 0x58},
+ {0x3f, 0x00},
+ {0x40, 0x80},
+ {0x41, 0x00},
+ {0x48, 0x95},
+ {0x60, 0x67},
+ {0x61, 0x88},
+ {0x62, 0x90},
+ {0x63, 0x50},
+ {0x64, 0x41},
+ {0x66, 0x42},
+ {0x67, 0x20},
+ {0x6a, 0x71},
+ {0x6b, 0x84},
+ {0x6c, 0x72},
+ {0x6d, 0x83},
+ {0x03, 0x11},
+ {0x10, 0x7f},
+ {0x11, 0x40},
+ {0x12, 0x0a},
+ {0x13, 0xbb},
+ {0x26, 0x31},
+ {0x27, 0x34},
+ {0x28, 0x0f},
+ {0x29, 0x10},
+ {0x2b, 0x30},
+ {0x2c, 0x32},
+ {0x30, 0x70},
+ {0x31, 0x10},
+ {0x32, 0x58},
+ {0x33, 0x09},
+ {0x34, 0x06},
+ {0x35, 0x03},
+ {0x36, 0x70},
+ {0x37, 0x18},
+ {0x38, 0x58},
+ {0x39, 0x09},
+ {0x3a, 0x06},
+ {0x3b, 0x03},
+ {0x3c, 0x80},
+ {0x3d, 0x18},
+ {0x3e, 0x80},
+ {0x3f, 0x0c},
+ {0x40, 0x05},
+ {0x41, 0x06},
+ {0x42, 0x80},
+ {0x43, 0x18},
+ {0x44, 0x80},
+ {0x45, 0x0c},
+ {0x46, 0x05},
+ {0x47, 0x06},
+ {0x48, 0x90},
+ {0x49, 0x40},
+ {0x4a, 0x80},
+ {0x4b, 0x13},
+ {0x4c, 0x10},
+ {0x4d, 0x11},
+ {0x4e, 0x80},
+ {0x4f, 0x30},
+ {0x50, 0x80},
+ {0x51, 0x13},
+ {0x52, 0x10},
+ {0x53, 0x13},
+ {0x54, 0x11},
+ {0x55, 0x17},
+ {0x56, 0x20},
+ {0x57, 0x01},
+ {0x58, 0x00},
+ {0x59, 0x00},
+ {0x5a, 0x18},
+ {0x5b, 0x00},
+ {0x5c, 0x00},
+ {0x60, 0x3f},
+ {0x62, 0x60},
+ {0x70, 0x06},
+ {0x03, 0x12},
+ {0x20, 0x00},
+ {0x21, 0x00},
+ {0x25, 0x00},
+ {0x28, 0x00},
+ {0x29, 0x00},
+ {0x2a, 0x00},
+ {0x30, 0x50},
+ {0x31, 0x18},
+ {0x32, 0x32},
+ {0x33, 0x40},
+ {0x34, 0x50},
+ {0x35, 0x70},
+ {0x36, 0xa0},
+ {0x40, 0xa0},
+ {0x41, 0x40},
+ {0x42, 0xa0},
+ {0x43, 0x90},
+ {0x44, 0x90},
+ {0x45, 0x80},
+ {0x46, 0xb0},
+ {0x47, 0x55},
+ {0x48, 0xa0},
+ {0x49, 0x90},
+ {0x4a, 0x90},
+ {0x4b, 0x80},
+ {0x4c, 0xb0},
+ {0x4d, 0x40},
+ {0x4e, 0x90},
+ {0x4f, 0x60},
+ {0x50, 0xa0},
+ {0x51, 0x80},
+ {0x52, 0xb0},
+ {0x53, 0x40},
+ {0x54, 0x90},
+ {0x55, 0x60},
+ {0x56, 0xa0},
+ {0x57, 0x80},
+ {0x58, 0x90},
+ {0x59, 0x40},
+ {0x5a, 0xd0},
+ {0x5b, 0xd0},
+ {0x5c, 0xe0},
+ {0x5d, 0x80},
+ {0x5e, 0x88},
+ {0x5f, 0x40},
+ {0x60, 0xe0},
+ {0x61, 0xe0},
+ {0x62, 0xe0},
+ {0x63, 0x80},
+ {0x70, 0x15},
+ {0x71, 0x01},
+ {0x72, 0x18},
+ {0x73, 0x01},
+ {0x74, 0x25},
+ {0x75, 0x15},
+ {0x80, 0x20},
+ {0x81, 0x40},
+ {0x82, 0x65},
+ {0x85, 0x1a},
+ {0x88, 0x00},
+ {0x89, 0x00},
+ {0x90, 0x5d},
+ {0xD0, 0x0c},
+ {0xD1, 0x80},
+ {0xD2, 0x17},
+ {0xD3, 0x00},
+ {0xD4, 0x00},
+ {0xD5, 0x0f},
+ {0xD6, 0xff},
+ {0xD7, 0xff},
+ {0x3b, 0x06},
+ {0x3c, 0x06},
+ {0xc5, 0x00},
+ {0xc6, 0x00},
+ {0x03, 0x13},
+ {0x10, 0xcb},
+ {0x11, 0x7b},
+ {0x12, 0x07},
+ {0x14, 0x00},
+ {0x20, 0x15},
+ {0x21, 0x13},
+ {0x22, 0x33},
+ {0x23, 0x05},
+ {0x24, 0x09},
+ {0x25, 0x0a},
+ {0x26, 0x18},
+ {0x27, 0x30},
+ {0x29, 0x12},
+ {0x2a, 0x50},
+ {0x2b, 0x02},
+ {0x2c, 0x02},
+ {0x25, 0x06},
+ {0x2d, 0x0c},
+ {0x2e, 0x12},
+ {0x2f, 0x12},
+ {0x50, 0x10},
+ {0x51, 0x14},
+ {0x52, 0x12},
+ {0x53, 0x0c},
+ {0x54, 0x0f},
+ {0x55, 0x0c},
+ {0x56, 0x10},
+ {0x57, 0x13},
+ {0x58, 0x12},
+ {0x59, 0x0c},
+ {0x5a, 0x0f},
+ {0x5b, 0x0c},
+ {0x5c, 0x25},
+ {0x5d, 0x25},
+ {0x5e, 0x25},
+ {0x5f, 0x25},
+ {0x60, 0x25},
+ {0x61, 0x25},
+ {0x62, 0x25},
+ {0x63, 0x25},
+ {0x64, 0x25},
+ {0x65, 0x25},
+ {0x66, 0x25},
+ {0x67, 0x25},
+ {0x68, 0x07},
+ {0x69, 0x07},
+ {0x6a, 0x07},
+ {0x6b, 0x05},
+ {0x6c, 0x05},
+ {0x6d, 0x05},
+ {0x6e, 0x07},
+ {0x6f, 0x07},
+ {0x70, 0x07},
+ {0x71, 0x05},
+ {0x72, 0x05},
+ {0x73, 0x05},
+ {0x80, 0x01},
+ {0x81, 0x1f},
+ {0x82, 0x05},
+ {0x83, 0x31},
+ {0x90, 0x05},
+ {0x91, 0x05},
+ {0x92, 0x33},
+ {0x93, 0x30},
+ {0x94, 0x03},
+ {0x95, 0x14},
+ {0x97, 0x20},
+ {0x99, 0x20},
+ {0xa0, 0x01},
+ {0xa1, 0x02},
+ {0xa2, 0x01},
+ {0xa3, 0x02},
+ {0xa4, 0x05},
+ {0xa5, 0x05},
+ {0xa6, 0x07},
+ {0xa7, 0x08},
+ {0xa8, 0x07},
+ {0xa9, 0x08},
+ {0xaa, 0x07},
+ {0xab, 0x08},
+ {0xb0, 0x22},
+ {0xb1, 0x2a},
+ {0xb2, 0x28},
+ {0xb3, 0x22},
+ {0xb4, 0x2a},
+ {0xb5, 0x28},
+ {0xb6, 0x22},
+ {0xb7, 0x2a},
+ {0xb8, 0x28},
+ {0xb9, 0x22},
+ {0xba, 0x2a},
+ {0xbb, 0x28},
+ {0xbc, 0x25},
+ {0xbd, 0x2a},
+ {0xbe, 0x27},
+ {0xbf, 0x25},
+ {0xc0, 0x2a},
+ {0xc1, 0x27},
+ {0xc2, 0x1e},
+ {0xc3, 0x24},
+ {0xc4, 0x20},
+ {0xc5, 0x1e},
+ {0xc6, 0x24},
+ {0xc7, 0x20},
+ {0xc8, 0x18},
+ {0xc9, 0x20},
+ {0xca, 0x1e},
+ {0xcb, 0x18},
+ {0xcc, 0x20},
+ {0xcd, 0x1e},
+ {0xce, 0x18},
+ {0xcf, 0x20},
+ {0xd0, 0x1e},
+ {0xd1, 0x18},
+ {0xd2, 0x20},
+ {0xd3, 0x1e},
+ {0x03, 0x14},
+ {0x10, 0x11},
+ {0x14, 0x80},
+ {0x15, 0x80},
+ {0x16, 0x80},
+ {0x17, 0x80},
+ {0x18, 0x80},
+ {0x19, 0x80},
+ {0x20, 0x80},
+ {0x21, 0x80},
+ {0x22, 0x80},
+ {0x23, 0x80},
+ {0x24, 0x80},
+ {0x30, 0xc8},
+ {0x31, 0x2b},
+ {0x32, 0x00},
+ {0x33, 0x00},
+ {0x34, 0x90},
+ {0x40, 0x32},
+ {0x50, 0x21},
+ {0x60, 0x19},
+ {0x70, 0x21},
+ {0x03, 0x15},
+ {0x10, 0x0f},
+ {0x14, 0x46},
+ {0x15, 0x36},
+ {0x16, 0x26},
+ {0x17, 0x2f},
+ {0x30, 0x8f},
+ {0x31, 0x59},
+ {0x32, 0x0a},
+ {0x33, 0x15},
+ {0x34, 0x5b},
+ {0x35, 0x06},
+ {0x36, 0x07},
+ {0x37, 0x40},
+ {0x38, 0x87},
+ {0x40, 0x94},
+ {0x41, 0x20},
+ {0x42, 0x89},
+ {0x43, 0x84},
+ {0x44, 0x03},
+ {0x45, 0x01},
+ {0x46, 0x88},
+ {0x47, 0x9c},
+ {0x48, 0x28},
+ {0x50, 0x02},
+ {0x51, 0x82},
+ {0x52, 0x00},
+ {0x53, 0x07},
+ {0x54, 0x11},
+ {0x55, 0x98},
+ {0x56, 0x00},
+ {0x57, 0x0b},
+ {0x58, 0x8b},
+ {0x80, 0x03},
+ {0x85, 0x40},
+ {0x87, 0x02},
+ {0x88, 0x00},
+ {0x89, 0x00},
+ {0x8a, 0x00},
+ {0x03, 0x16},
+ {0x10, 0x31},
+ {0x18, 0x5e},
+ {0x19, 0x5d},
+ {0x1a, 0x0e},
+ {0x1b, 0x01},
+ {0x1c, 0xdc},
+ {0x1d, 0xfe},
+ {0x30, 0x00},
+ {0x31, 0x0a},
+ {0x32, 0x1f},
+ {0x33, 0x33},
+ {0x34, 0x53},
+ {0x35, 0x6c},
+ {0x36, 0x81},
+ {0x37, 0x94},
+ {0x38, 0xa4},
+ {0x39, 0xb3},
+ {0x3a, 0xc0},
+ {0x3b, 0xcb},
+ {0x3c, 0xd5},
+ {0x3d, 0xde},
+ {0x3e, 0xe6},
+ {0x3f, 0xee},
+ {0x40, 0xf5},
+ {0x41, 0xfc},
+ {0x42, 0xff},
+ {0x50, 0x00},
+ {0x51, 0x08},
+ {0x52, 0x1e},
+ {0x53, 0x36},
+ {0x54, 0x5a},
+ {0x55, 0x75},
+ {0x56, 0x8d},
+ {0x57, 0xa1},
+ {0x58, 0xb2},
+ {0x59, 0xbe},
+ {0x5a, 0xc9},
+ {0x5b, 0xd2},
+ {0x5c, 0xdb},
+ {0x5d, 0xe3},
+ {0x5e, 0xeb},
+ {0x5f, 0xf0},
+ {0x60, 0xf5},
+ {0x61, 0xf7},
+ {0x62, 0xf8},
+ {0x70, 0x00},
+ {0x71, 0x08},
+ {0x72, 0x17},
+ {0x73, 0x2f},
+ {0x74, 0x53},
+ {0x75, 0x6c},
+ {0x76, 0x81},
+ {0x77, 0x94},
+ {0x78, 0xa4},
+ {0x79, 0xb3},
+ {0x7a, 0xc0},
+ {0x7b, 0xcb},
+ {0x7c, 0xd5},
+ {0x7d, 0xde},
+ {0x7e, 0xe6},
+ {0x7f, 0xee},
+ {0x80, 0xf4},
+ {0x81, 0xfa},
+ {0x82, 0xff},
+ {0x03, 0x17},
+ {0x10, 0xf7},
+ {0xC4, 0x66},
+ {0xC5, 0x55},
+ {0x03, 0x20},
+ {0x11, 0x1c},
+ {0x18, 0x30},
+ {0x1a, 0x08},
+ {0x20, 0x05},
+ {0x21, 0x30},
+ {0x22, 0x10},
+ {0x23, 0x00},
+ {0x24, 0x00},
+ {0x28, 0xe7},
+ {0x29, 0x0d},
+ {0x2a, 0xf0},
+ {0x2b, 0x34},
+ {0x30, 0x78},
+ {0x2c, 0xc2},
+ {0x2d, 0xff},
+ {0x2e, 0x33},
+ {0x30, 0x78},
+ {0x32, 0x03},
+ {0x33, 0x2e},
+ {0x34, 0x30},
+ {0x35, 0xd4},
+ {0x36, 0xfe},
+ {0x37, 0x32},
+ {0x38, 0x04},
+ {0x39, 0x22},
+ {0x3a, 0xde},
+ {0x3b, 0x22},
+ {0x3c, 0xde},
+ {0x50, 0x45},
+ {0x51, 0x88},
+ {0x56, 0x03},
+ {0x57, 0xf7},
+ {0x58, 0x14},
+ {0x59, 0x88},
+ {0x5a, 0x04},
+ {0x60, 0xaa},
+ {0x61, 0xaa},
+ {0x62, 0xaa},
+ {0x63, 0xaa},
+ {0x64, 0xaa},
+ {0x65, 0xaa},
+ {0x66, 0xab},
+ {0x67, 0xEa},
+ {0x68, 0xab},
+ {0x69, 0xEa},
+ {0x6a, 0xaa},
+ {0x6b, 0xaa},
+ {0x6c, 0xaa},
+ {0x6d, 0xaa},
+ {0x6e, 0xaa},
+ {0x6f, 0xaa},
+ {0x70, 0x76},
+ {0x71, 0x80},
+ {0x76, 0x43},
+ {0x77, 0x04},
+ {0x78, 0x23},
+ {0x79, 0x46},
+ {0x7a, 0x23},
+ {0x7b, 0x22},
+ {0x7d, 0x23},
+ {0x83, 0x01},
+ {0x84, 0x5f},
+ {0x85, 0x90},
+ {0x86, 0x01},
+ {0x87, 0x2c},
+ {0x88, 0x05},
+ {0x89, 0x7e},
+ {0x8a, 0x40},
+ {0x8B, 0x75},
+ {0x8C, 0x30},
+ {0x8D, 0x61},
+ {0x8E, 0x44},
+ {0x9c, 0x08},
+ {0x9d, 0x34},
+ {0x9e, 0x01},
+ {0x9f, 0x2c},
+ {0xb0, 0x18},
+ {0xb1, 0x14},
+ {0xb2, 0x80},
+ {0xb3, 0x18},
+ {0xb4, 0x1a},
+ {0xb5, 0x44},
+ {0xb6, 0x2f},
+ {0xb7, 0x28},
+ {0xb8, 0x25},
+ {0xb9, 0x22},
+ {0xba, 0x21},
+ {0xbb, 0x20},
+ {0xbc, 0x32},
+ {0xbd, 0x30},
+ {0xc0, 0x10},
+ {0xc1, 0x2b},
+ {0xc2, 0x2b},
+ {0xc3, 0x2b},
+ {0xc4, 0x08},
+ {0xc8, 0x40},
+ {0xc9, 0x40},
+ {0x03, 0x22},
+ {0x10, 0xfd},
+ {0x11, 0x2e},
+ {0x19, 0x01},
+ {0x20, 0x10},
+ {0x21, 0x80},
+ {0x24, 0x01},
+ {0x30, 0x80},
+ {0x31, 0x80},
+ {0x38, 0x11},
+ {0x39, 0x34},
+ {0x40, 0xfa},
+ {0x41, 0x44},
+ {0x42, 0x43},
+ {0x43, 0xf6},
+ {0x44, 0x44},
+ {0x45, 0x33},
+ {0x46, 0x00},
+ {0x50, 0xb2},
+ {0x51, 0x81},
+ {0x52, 0x98},
+ {0x80, 0x38},
+ {0x81, 0x20},
+ {0x82, 0x38},
+ {0x83, 0x5e},
+ {0x84, 0x18},
+ {0x85, 0x58},
+ {0x86, 0x20},
+ {0x87, 0x49},
+ {0x88, 0x33},
+ {0x89, 0x37},
+ {0x8a, 0x2a},
+ {0x8b, 0x41},
+ {0x8c, 0x39},
+ {0x8d, 0x34},
+ {0x8e, 0x29},
+ {0x8f, 0x53},
+ {0x90, 0x52},
+ {0x91, 0x51},
+ {0x92, 0x4e},
+ {0x93, 0x46},
+ {0x94, 0x3d},
+ {0x95, 0x34},
+ {0x96, 0x2e},
+ {0x97, 0x29},
+ {0x98, 0x22},
+ {0x99, 0x1c},
+ {0x9a, 0x18},
+ {0x9b, 0x77},
+ {0x9c, 0x77},
+ {0x9d, 0x48},
+ {0x9e, 0x38},
+ {0x9f, 0x30},
+ {0xa0, 0x60},
+ {0xa1, 0x34},
+ {0xa2, 0x6f},
+ {0xa3, 0xff},
+ {0xa4, 0x14},
+ {0xa5, 0x2c},
+ {0xa6, 0xcf},
+ {0xad, 0x40},
+ {0xae, 0x4a},
+ {0xaf, 0x28},
+ {0xb0, 0x26},
+ {0xb1, 0x00},
+ {0xb4, 0xea},
+ {0xb8, 0xa0},
+ {0xb9, 0x00},
+ {0x03, 0x48},
+ {0x70, 0x03},
+ {0x71, 0x30},
+ {0x72, 0x81},
+ {0x73, 0x10},
+ {0x70, 0x85},
+ {0x03, 0x48},
+ {0x03, 0x48},
+ {0x03, 0x48},
+ {0x03, 0x48},
+ {0x70, 0x95},
+ {0x10, 0x1c},
+ {0x11, 0x10},
+ {0x12, 0x00},
+ {0x14, 0x00},
+ {0x16, 0x04},
+ {0x18, 0x80},
+ {0x19, 0x00},
+ {0x1a, 0xa0},
+ {0x1b, 0x0d},
+ {0x1c, 0x01},
+ {0x1d, 0x0a},
+ {0x1e, 0x07},
+ {0x1f, 0x0b},
+ {0x23, 0x01},
+ {0x24, 0x1e},
+ {0x25, 0x00},
+ {0x26, 0x00},
+ {0x27, 0x08},
+ {0x28, 0x00},
+ {0x30, 0x06},
+ {0x31, 0x40},
+ {0x32, 0x13},
+ {0x33, 0x0c},
+ {0x34, 0x04},
+ {0x35, 0x06},
+ {0x36, 0x01},
+ {0x37, 0x06},
+ {0x39, 0x4f},
+ {0x03, 0x20},
+ {0x10, 0x9c},
+ {0x03, 0x22},
+ {0x10, 0xe9},
+ {0x03, 0x00},
+ {0x03, 0x00},
+ {0x03, 0x00},
+ {0x03, 0x00},
+ {0x03, 0x00},
+ {0x03, 0x00},
+ {0x03, 0x00},
+ {0x03, 0x00},
+ {0x03, 0x00},
+ {0x03, 0x00},
+ {0x03, 0x00},
+ {0x0e, 0x03},
+ {0x0e, 0x73},
+ {0x03, 0x00},
+ {0x01, 0xf0},
+};
+
+static struct v4l2_subdev_info hi256_subdev_info[] = {
+ {
+ .code = V4L2_MBUS_FMT_YUYV8_2X8,
+ .colorspace = V4L2_COLORSPACE_JPEG,
+ .fmt = 1,
+ .order = 0,
+ },
+};
+
+static struct msm_camera_i2c_reg_conf hi256_svga_settings[] = {
+ {0x03, 0x20},
+ {0x10, 0x1c},
+ {0x03, 0x22},
+ {0x10, 0x69},
+ {0x03, 0x00},
+ {0x10, 0x13},
+ {0x12, 0x00},
+ {0x20, 0x00},
+ {0x21, 0x04},
+ {0x22, 0x00},
+ {0x23, 0x07},
+ {0x40, 0x01},
+ {0x41, 0x78},
+ {0x42, 0x00},
+ {0x43, 0x14},
+ {0x03, 0x10},
+ {0x3f, 0x02},
+ {0x03, 0x12},
+ {0x20, 0x0f},
+ {0x21, 0x0f},
+ {0x90, 0x5d},
+ {0x03, 0x13},
+ {0x80, 0x00},
+ {0x03, 0x48},
+ {0x72, 0x81},
+ {0x30, 0x06},
+ {0x31, 0x40},
+ {0x03, 0x20},
+ {0x88, 0x05},
+ {0x89, 0x7e},
+ {0x8a, 0x40},
+ {0x03, 0x20},
+ {0x10, 0x9c},
+ {0x03, 0x22},
+ {0x10, 0xe9},
+};
+
+
+static const struct i2c_device_id hi256_i2c_id[] = {
+ {HI256_SENSOR_NAME, (kernel_ulong_t)&hi256_s_ctrl},
+ { }
+};
+
+static int32_t msm_hi256_i2c_probe(struct i2c_client *client,
+ const struct i2c_device_id *id)
+{
+ return msm_sensor_i2c_probe(client, id, &hi256_s_ctrl);
+}
+
+static struct i2c_driver hi256_i2c_driver = {
+ .id_table = hi256_i2c_id,
+ .probe = msm_hi256_i2c_probe,
+ .driver = {
+ .name = HI256_SENSOR_NAME,
+ },
+};
+
+static struct msm_camera_i2c_client hi256_sensor_i2c_client = {
+ .addr_type = MSM_CAMERA_I2C_BYTE_ADDR,
+};
+
+static const struct of_device_id hi256_dt_match[] = {
+ {.compatible = "shinetech,hi256", .data = &hi256_s_ctrl},
+ {}
+};
+
+MODULE_DEVICE_TABLE(of, hi256_dt_match);
+
+static struct platform_driver hi256_platform_driver = {
+ .driver = {
+ .name = "shinetech,hi256",
+ .owner = THIS_MODULE,
+ .of_match_table = hi256_dt_match,
+ },
+};
+
+static void hi256_i2c_write_table(struct msm_sensor_ctrl_t *s_ctrl,
+ struct msm_camera_i2c_reg_conf *table,
+ int num)
+{
+ int i = 0;
+ int rc = 0;
+ for (i = 0; i < num; ++i) {
+ rc = s_ctrl->sensor_i2c_client->i2c_func_tbl->
+ i2c_write(
+ s_ctrl->sensor_i2c_client, table->reg_addr,
+ table->reg_data,
+ MSM_CAMERA_I2C_BYTE_DATA);
+ if (rc < 0) {
+ msleep(100);
+ rc = s_ctrl->sensor_i2c_client->i2c_func_tbl->
+ i2c_write(
+ s_ctrl->sensor_i2c_client, table->reg_addr,
+ table->reg_data,
+ MSM_CAMERA_I2C_BYTE_DATA);
+ }
+ table++;
+ }
+
+}
+
+static int32_t hi256_platform_probe(struct platform_device *pdev)
+{
+ int32_t rc;
+ const struct of_device_id *match;
+ match = of_match_device(hi256_dt_match, &pdev->dev);
+ rc = msm_sensor_platform_probe(pdev, match->data);
+ return rc;
+}
+
+static int __init hi256_init_module(void)
+{
+ int32_t rc;
+ pr_info("%s:%d\n", __func__, __LINE__);
+ rc = platform_driver_probe(&hi256_platform_driver,
+ hi256_platform_probe);
+ if (!rc)
+ return rc;
+ return i2c_add_driver(&hi256_i2c_driver);
+}
+
+static void __exit hi256_exit_module(void)
+{
+ pr_info("%s:%d\n", __func__, __LINE__);
+ if (hi256_s_ctrl.pdev) {
+ msm_sensor_free_sensor_data(&hi256_s_ctrl);
+ platform_driver_unregister(&hi256_platform_driver);
+ } else
+ i2c_del_driver(&hi256_i2c_driver);
+ return;
+}
+
+static int32_t hi256_sensor_match_id(struct msm_sensor_ctrl_t *s_ctrl)
+{
+ int32_t rc = 0;
+ uint16_t chipid = 0;
+ rc = s_ctrl->sensor_i2c_client->i2c_func_tbl->i2c_read(
+ s_ctrl->sensor_i2c_client,
+ s_ctrl->sensordata->slave_info->sensor_id_reg_addr,
+ &chipid, MSM_CAMERA_I2C_BYTE_DATA);
+ if (rc < 0) {
+ pr_err("%s: %s: hi256 read id failed\n", __func__,
+ s_ctrl->sensordata->sensor_name);
+ return rc;
+ }
+
+ CDBG("%s: read id: %x expected id %x:\n", __func__, chipid,
+ s_ctrl->sensordata->slave_info->sensor_id);
+ if (chipid != s_ctrl->sensordata->slave_info->sensor_id) {
+ pr_err("msm_sensor_match_id chip id doesnot match\n");
+ return -ENODEV;
+ }
+ return rc;
+}
+
+int32_t hi256_sensor_config(struct msm_sensor_ctrl_t *s_ctrl,
+ void __user *argp)
+{
+ struct sensorb_cfg_data *cdata = (struct sensorb_cfg_data *)argp;
+ long rc = 0;
+ int32_t i = 0;
+ mutex_lock(s_ctrl->msm_sensor_mutex);
+ CDBG("%s:%d %s cfgtype = %d\n", __func__, __LINE__,
+ s_ctrl->sensordata->sensor_name, cdata->cfgtype);
+ switch (cdata->cfgtype) {
+ case CFG_GET_SENSOR_INFO:
+ memcpy(cdata->cfg.sensor_info.sensor_name,
+ s_ctrl->sensordata->sensor_name,
+ sizeof(cdata->cfg.sensor_info.sensor_name));
+ cdata->cfg.sensor_info.session_id =
+ s_ctrl->sensordata->sensor_info->session_id;
+ for (i = 0; i < SUB_MODULE_MAX; i++)
+ cdata->cfg.sensor_info.subdev_id[i] =
+ s_ctrl->sensordata->sensor_info->subdev_id[i];
+ CDBG("%s:%d sensor name %s\n", __func__, __LINE__,
+ cdata->cfg.sensor_info.sensor_name);
+ CDBG("%s:%d session id %d\n", __func__, __LINE__,
+ cdata->cfg.sensor_info.session_id);
+ for (i = 0; i < SUB_MODULE_MAX; i++)
+ CDBG("%s:%d subdev_id[%d] %d\n", __func__, __LINE__, i,
+ cdata->cfg.sensor_info.subdev_id[i]);
+ break;
+ case CFG_SET_INIT_SETTING:
+ CDBG("init setting");
+ hi256_i2c_write_table(s_ctrl,
+ &hi256_recommend_settings[0],
+ ARRAY_SIZE(hi256_recommend_settings));
+ CDBG("init setting X");
+ break;
+ case CFG_SET_RESOLUTION: {
+ int val = 0;
+ if (copy_from_user(&val,
+ (void *)cdata->cfg.setting, sizeof(int))) {
+ pr_err("%s:%d failed\n", __func__, __LINE__);
+ rc = -EFAULT;
+ break;
+ }
+ if (val == 0)
+ hi256_i2c_write_table(s_ctrl, &hi256_uxga_settings[0],
+ ARRAY_SIZE(hi256_uxga_settings));
+ else if (val == 1)
+ hi256_i2c_write_table(s_ctrl, &hi256_svga_settings[0],
+ ARRAY_SIZE(hi256_svga_settings));
+ break;
+ }
+ case CFG_SET_STOP_STREAM:
+ hi256_i2c_write_table(s_ctrl,
+ &hi256_stop_settings[0],
+ ARRAY_SIZE(hi256_stop_settings));
+ break;
+ case CFG_SET_START_STREAM:
+ hi256_i2c_write_table(s_ctrl,
+ &hi256_start_settings[0],
+ ARRAY_SIZE(hi256_start_settings));
+ break;
+ case CFG_GET_SENSOR_INIT_PARAMS:
+ cdata->cfg.sensor_init_params =
+ *s_ctrl->sensordata->sensor_init_params;
+ CDBG("%s:%d init params mode %d pos %d mount %d\n", __func__,
+ __LINE__,
+ cdata->cfg.sensor_init_params.modes_supported,
+ cdata->cfg.sensor_init_params.position,
+ cdata->cfg.sensor_init_params.sensor_mount_angle);
+ break;
+ case CFG_SET_SLAVE_INFO: {
+ struct msm_camera_sensor_slave_info sensor_slave_info;
+ struct msm_sensor_power_setting_array *power_setting_array;
+ int slave_index = 0;
+ if (copy_from_user(&sensor_slave_info,
+ (void *)cdata->cfg.setting,
+ sizeof(struct msm_camera_sensor_slave_info))) {
+ pr_err("%s:%d failed\n", __func__, __LINE__);
+ rc = -EFAULT;
+ break;
+ }
+ /* Update sensor slave address */
+ if (sensor_slave_info.slave_addr) {
+ s_ctrl->sensor_i2c_client->cci_client->sid =
+ sensor_slave_info.slave_addr >> 1;
+ }
+
+ /* Update sensor address type */
+ s_ctrl->sensor_i2c_client->addr_type =
+ sensor_slave_info.addr_type;
+
+ /* Update power up / down sequence */
+ s_ctrl->power_setting_array =
+ sensor_slave_info.power_setting_array;
+ power_setting_array = &s_ctrl->power_setting_array;
+ power_setting_array->power_setting = kzalloc(
+ power_setting_array->size *
+ sizeof(struct msm_sensor_power_setting), GFP_KERNEL);
+ if (!power_setting_array->power_setting) {
+ pr_err("%s:%d failed\n", __func__, __LINE__);
+ rc = -ENOMEM;
+ break;
+ }
+ if (copy_from_user(power_setting_array->power_setting,
+ (void *)
+ sensor_slave_info.power_setting_array.power_setting,
+ power_setting_array->size *
+ sizeof(struct msm_sensor_power_setting))) {
+ kfree(power_setting_array->power_setting);
+ pr_err("%s:%d failed\n", __func__, __LINE__);
+ rc = -EFAULT;
+ break;
+ }
+ s_ctrl->free_power_setting = true;
+ CDBG("%s sensor id %x\n", __func__,
+ sensor_slave_info.slave_addr);
+ CDBG("%s sensor addr type %d\n", __func__,
+ sensor_slave_info.addr_type);
+ CDBG("%s sensor reg %x\n", __func__,
+ sensor_slave_info.sensor_id_info.sensor_id_reg_addr);
+ CDBG("%s sensor id %x\n", __func__,
+ sensor_slave_info.sensor_id_info.sensor_id);
+ for (slave_index = 0; slave_index <
+ power_setting_array->size; slave_index++) {
+ CDBG("%s i %d power setting %d %d %ld %d\n", __func__,
+ slave_index,
+ power_setting_array->power_setting[slave_index].
+ seq_type,
+ power_setting_array->power_setting[slave_index].
+ seq_val,
+ power_setting_array->power_setting[slave_index].
+ config_val,
+ power_setting_array->power_setting[slave_index].
+ delay);
+ }
+ kfree(power_setting_array->power_setting);
+ break;
+ }
+ case CFG_WRITE_I2C_ARRAY: {
+ struct msm_camera_i2c_reg_setting conf_array;
+ struct msm_camera_i2c_reg_array *reg_setting = NULL;
+
+ if (copy_from_user(&conf_array,
+ (void *)cdata->cfg.setting,
+ sizeof(struct msm_camera_i2c_reg_setting))) {
+ pr_err("%s:%d failed\n", __func__, __LINE__);
+ rc = -EFAULT;
+ break;
+ }
+
+ reg_setting = kzalloc(conf_array.size *
+ (sizeof(struct msm_camera_i2c_reg_array)), GFP_KERNEL);
+ if (!reg_setting) {
+ pr_err("%s:%d failed\n", __func__, __LINE__);
+ rc = -ENOMEM;
+ break;
+ }
+ if (copy_from_user(reg_setting, (void *)conf_array.reg_setting,
+ conf_array.size *
+ sizeof(struct msm_camera_i2c_reg_array))) {
+ pr_err("%s:%d failed\n", __func__, __LINE__);
+ kfree(reg_setting);
+ rc = -EFAULT;
+ break;
+ }
+
+ conf_array.reg_setting = reg_setting;
+ rc = s_ctrl->sensor_i2c_client->i2c_func_tbl->i2c_write_table(
+ s_ctrl->sensor_i2c_client, &conf_array);
+ kfree(reg_setting);
+ break;
+ }
+ case CFG_WRITE_I2C_SEQ_ARRAY: {
+ struct msm_camera_i2c_seq_reg_setting conf_array;
+ struct msm_camera_i2c_seq_reg_array *reg_setting = NULL;
+
+ if (copy_from_user(&conf_array,
+ (void *)cdata->cfg.setting,
+ sizeof(struct msm_camera_i2c_seq_reg_setting))) {
+ pr_err("%s:%d failed\n", __func__, __LINE__);
+ rc = -EFAULT;
+ break;
+ }
+
+ reg_setting = kzalloc(conf_array.size *
+ (sizeof(struct msm_camera_i2c_seq_reg_array)),
+ GFP_KERNEL);
+ if (!reg_setting) {
+ pr_err("%s:%d failed\n", __func__, __LINE__);
+ rc = -ENOMEM;
+ break;
+ }
+ if (copy_from_user(reg_setting, (void *)conf_array.reg_setting,
+ conf_array.size *
+ sizeof(struct msm_camera_i2c_seq_reg_array))) {
+ pr_err("%s:%d failed\n", __func__, __LINE__);
+ kfree(reg_setting);
+ rc = -EFAULT;
+ break;
+ }
+
+ conf_array.reg_setting = reg_setting;
+ rc = s_ctrl->sensor_i2c_client->i2c_func_tbl->
+ i2c_write_seq_table(s_ctrl->sensor_i2c_client,
+ &conf_array);
+ kfree(reg_setting);
+ break;
+ }
+
+ case CFG_POWER_UP:
+ if (s_ctrl->func_tbl->sensor_power_up)
+ rc = s_ctrl->func_tbl->sensor_power_up(s_ctrl);
+ else
+ rc = -EFAULT;
+ break;
+
+ case CFG_POWER_DOWN:
+ if (s_ctrl->func_tbl->sensor_power_down)
+ rc = s_ctrl->func_tbl->sensor_power_down(s_ctrl);
+ else
+ rc = -EFAULT;
+ break;
+
+ case CFG_SET_STOP_STREAM_SETTING: {
+ struct msm_camera_i2c_reg_setting *stop_setting =
+ &s_ctrl->stop_setting;
+ struct msm_camera_i2c_reg_array *reg_setting = NULL;
+ if (copy_from_user(stop_setting, (void *)cdata->cfg.setting,
+ sizeof(struct msm_camera_i2c_reg_setting))) {
+ pr_err("%s:%d failed\n", __func__, __LINE__);
+ rc = -EFAULT;
+ break;
+ }
+
+ reg_setting = stop_setting->reg_setting;
+ stop_setting->reg_setting = kzalloc(stop_setting->size *
+ (sizeof(struct msm_camera_i2c_reg_array)), GFP_KERNEL);
+ if (!stop_setting->reg_setting) {
+ pr_err("%s:%d failed\n", __func__, __LINE__);
+ rc = -ENOMEM;
+ break;
+ }
+ if (copy_from_user(stop_setting->reg_setting,
+ (void *)reg_setting, stop_setting->size *
+ sizeof(struct msm_camera_i2c_reg_array))) {
+ pr_err("%s:%d failed\n", __func__, __LINE__);
+ kfree(stop_setting->reg_setting);
+ stop_setting->reg_setting = NULL;
+ stop_setting->size = 0;
+ rc = -EFAULT;
+ break;
+ }
+ break;
+ }
+ default:
+ rc = -EFAULT;
+ break;
+ }
+
+ mutex_unlock(s_ctrl->msm_sensor_mutex);
+
+ return rc;
+}
+
+static struct msm_sensor_fn_t hi256_sensor_func_tbl = {
+ .sensor_config = hi256_sensor_config,
+ .sensor_power_up = msm_sensor_power_up,
+ .sensor_power_down = msm_sensor_power_down,
+ .sensor_match_id = hi256_sensor_match_id,
+};
+
+static struct msm_sensor_ctrl_t hi256_s_ctrl = {
+ .sensor_i2c_client = &hi256_sensor_i2c_client,
+ .power_setting_array.power_setting = hi256_power_setting,
+ .power_setting_array.size = ARRAY_SIZE(hi256_power_setting),
+ .msm_sensor_mutex = &hi256_mut,
+ .sensor_v4l2_subdev_info = hi256_subdev_info,
+ .sensor_v4l2_subdev_info_size = ARRAY_SIZE(hi256_subdev_info),
+ .func_tbl = &hi256_sensor_func_tbl,
+};
+
+module_init(hi256_init_module);
+module_exit(hi256_exit_module);
+MODULE_DESCRIPTION("Hi256 2MP YUV sensor driver");
+MODULE_LICENSE("GPL v2");
diff --git a/drivers/media/platform/msm/camera_v2/sensor/imx135.c b/drivers/media/platform/msm/camera_v2/sensor/imx135.c
index 9b02b17..8368a4d 100644
--- a/drivers/media/platform/msm/camera_v2/sensor/imx135.c
+++ b/drivers/media/platform/msm/camera_v2/sensor/imx135.c
@@ -93,9 +93,15 @@
{ }
};
+static int32_t msm_imx135_i2c_probe(struct i2c_client *client,
+ const struct i2c_device_id *id)
+{
+ return msm_sensor_i2c_probe(client, id, &imx135_s_ctrl);
+}
+
static struct i2c_driver imx135_i2c_driver = {
.id_table = imx135_i2c_id,
- .probe = msm_sensor_i2c_probe,
+ .probe = msm_imx135_i2c_probe,
.driver = {
.name = IMX135_SENSOR_NAME,
},
diff --git a/drivers/media/platform/msm/camera_v2/sensor/io/msm_camera_i2c.h b/drivers/media/platform/msm/camera_v2/sensor/io/msm_camera_i2c.h
index b1331ab..7af04ba 100644
--- a/drivers/media/platform/msm/camera_v2/sensor/io/msm_camera_i2c.h
+++ b/drivers/media/platform/msm/camera_v2/sensor/io/msm_camera_i2c.h
@@ -121,4 +121,9 @@
struct msm_camera_i2c_reg_tbl *reg_tbl, uint16_t size,
enum msm_camera_i2c_data_type data_type);
+int32_t msm_camera_qup_i2c_write_conf_tbl(
+ struct msm_camera_i2c_client *client,
+ struct msm_camera_i2c_reg_conf *reg_conf_tbl, uint16_t size,
+ enum msm_camera_i2c_data_type data_type);
+
#endif
diff --git a/drivers/media/platform/msm/camera_v2/sensor/io/msm_camera_io_util.c b/drivers/media/platform/msm/camera_v2/sensor/io/msm_camera_io_util.c
index e30e798..c2a5cad 100644
--- a/drivers/media/platform/msm/camera_v2/sensor/io/msm_camera_io_util.c
+++ b/drivers/media/platform/msm/camera_v2/sensor/io/msm_camera_io_util.c
@@ -107,6 +107,34 @@
msm_camera_io_dump(dest_addr, len);
}
+int msm_cam_clk_sel_src(struct device *dev, struct msm_cam_clk_info *clk_info,
+ struct msm_cam_clk_info *clk_src_info, int num_clk)
+{
+ int i;
+ int rc = 0;
+ struct clk *mux_clk = NULL;
+ struct clk *src_clk = NULL;
+
+ for (i = 0; i < num_clk; i++) {
+ if (clk_src_info[i].clk_name) {
+ mux_clk = clk_get(dev, clk_info[i].clk_name);
+ if (IS_ERR(mux_clk)) {
+ pr_err("%s get failed\n",
+ clk_info[i].clk_name);
+ continue;
+ }
+ src_clk = clk_get(dev, clk_src_info[i].clk_name);
+ if (IS_ERR(src_clk)) {
+ pr_err("%s get failed\n",
+ clk_src_info[i].clk_name);
+ continue;
+ }
+ clk_set_parent(mux_clk, src_clk);
+ }
+ }
+ return rc;
+}
+
int msm_cam_clk_enable(struct device *dev, struct msm_cam_clk_info *clk_info,
struct clk **clk_ptr, int num_clk, int enable)
{
diff --git a/drivers/media/platform/msm/camera_v2/sensor/io/msm_camera_io_util.h b/drivers/media/platform/msm/camera_v2/sensor/io/msm_camera_io_util.h
index 499a045..73376e2 100644
--- a/drivers/media/platform/msm/camera_v2/sensor/io/msm_camera_io_util.h
+++ b/drivers/media/platform/msm/camera_v2/sensor/io/msm_camera_io_util.h
@@ -25,7 +25,8 @@
void msm_camera_io_dump(void __iomem *addr, int size);
void msm_camera_io_memcpy(void __iomem *dest_addr,
void __iomem *src_addr, u32 len);
-
+int msm_cam_clk_sel_src(struct device *dev, struct msm_cam_clk_info *clk_info,
+ struct msm_cam_clk_info *clk_src_info, int num_clk);
int msm_cam_clk_enable(struct device *dev, struct msm_cam_clk_info *clk_info,
struct clk **clk_ptr, int num_clk, int enable);
diff --git a/drivers/media/platform/msm/camera_v2/sensor/io/msm_camera_qup_i2c.c b/drivers/media/platform/msm/camera_v2/sensor/io/msm_camera_qup_i2c.c
index 9222bb5..ac9cdbf 100644
--- a/drivers/media/platform/msm/camera_v2/sensor/io/msm_camera_qup_i2c.c
+++ b/drivers/media/platform/msm/camera_v2/sensor/io/msm_camera_qup_i2c.c
@@ -22,6 +22,10 @@
#define S_I2C_DBG(fmt, args...) do { } while (0)
#endif
+#define I2C_COMPARE_MATCH 0
+#define I2C_COMPARE_MISMATCH 1
+#define I2C_POLL_MAX_ITERATION 20
+
static int32_t msm_camera_qup_i2c_rxdata(
struct msm_camera_i2c_client *dev_client, unsigned char *rxdata,
int data_length)
@@ -330,3 +334,210 @@
}
return rc;
}
+
+static int32_t msm_camera_qup_i2c_compare(struct msm_camera_i2c_client *client,
+ uint32_t addr, uint16_t data,
+ enum msm_camera_i2c_data_type data_type)
+{
+ int32_t rc;
+ uint16_t reg_data = 0;
+ int data_len = 0;
+ switch (data_type) {
+ case MSM_CAMERA_I2C_BYTE_DATA:
+ case MSM_CAMERA_I2C_WORD_DATA:
+ data_len = data_type;
+ break;
+ case MSM_CAMERA_I2C_SET_BYTE_MASK:
+ case MSM_CAMERA_I2C_UNSET_BYTE_MASK:
+ data_len = MSM_CAMERA_I2C_BYTE_DATA;
+ break;
+ case MSM_CAMERA_I2C_SET_WORD_MASK:
+ case MSM_CAMERA_I2C_UNSET_WORD_MASK:
+ data_len = MSM_CAMERA_I2C_WORD_DATA;
+ break;
+ default:
+ pr_err("%s: Unsupport data type: %d\n", __func__, data_type);
+ break;
+ }
+
+ rc = msm_camera_qup_i2c_read(client, addr, ®_data, data_len);
+ if (rc < 0)
+ return rc;
+
+ rc = I2C_COMPARE_MISMATCH;
+ switch (data_type) {
+ case MSM_CAMERA_I2C_BYTE_DATA:
+ case MSM_CAMERA_I2C_WORD_DATA:
+ if (data == reg_data)
+ rc = I2C_COMPARE_MATCH;
+ break;
+ case MSM_CAMERA_I2C_SET_BYTE_MASK:
+ case MSM_CAMERA_I2C_SET_WORD_MASK:
+ if ((reg_data & data) == data)
+ rc = I2C_COMPARE_MATCH;
+ break;
+ case MSM_CAMERA_I2C_UNSET_BYTE_MASK:
+ case MSM_CAMERA_I2C_UNSET_WORD_MASK:
+ if (!(reg_data & data))
+ rc = I2C_COMPARE_MATCH;
+ break;
+ default:
+ pr_err("%s: Unsupport data type: %d\n", __func__, data_type);
+ break;
+ }
+
+ S_I2C_DBG("%s: Register and data match result %d\n", __func__,
+ rc);
+ return rc;
+}
+
+int32_t msm_camera_qup_i2c_poll(struct msm_camera_i2c_client *client,
+ uint32_t addr, uint16_t data,
+ enum msm_camera_i2c_data_type data_type)
+{
+ int32_t rc;
+ int i;
+ S_I2C_DBG("%s: addr: 0x%x data: 0x%x dt: %d\n",
+ __func__, addr, data, data_type);
+
+ for (i = 0; i < I2C_POLL_MAX_ITERATION; i++) {
+ rc = msm_camera_qup_i2c_compare(client,
+ addr, data, data_type);
+ if (rc == 0 || rc < 0)
+ break;
+ usleep_range(10000, 11000);
+ }
+ return rc;
+}
+
+static int32_t msm_camera_qup_i2c_set_mask(struct msm_camera_i2c_client *client,
+ uint32_t addr, uint16_t mask,
+ enum msm_camera_i2c_data_type data_type, uint16_t set_mask)
+{
+ int32_t rc;
+ uint16_t reg_data;
+
+ rc = msm_camera_qup_i2c_read(client, addr, ®_data, data_type);
+ if (rc < 0) {
+ S_I2C_DBG("%s read fail\n", __func__);
+ return rc;
+ }
+ S_I2C_DBG("%s addr: 0x%x data: 0x%x setmask: 0x%x\n",
+ __func__, addr, reg_data, mask);
+
+ if (set_mask)
+ reg_data |= mask;
+ else
+ reg_data &= ~mask;
+ S_I2C_DBG("%s write: 0x%x\n", __func__, reg_data);
+
+ rc = msm_camera_qup_i2c_write(client, addr, reg_data, data_type);
+ if (rc < 0)
+ S_I2C_DBG("%s write fail\n", __func__);
+
+ return rc;
+}
+
+static int32_t msm_camera_qup_i2c_set_write_mask_data(
+ struct msm_camera_i2c_client *client,
+ uint32_t addr, uint16_t data, int16_t mask,
+ enum msm_camera_i2c_data_type data_type)
+{
+ int32_t rc;
+ uint16_t reg_data;
+ CDBG("%s\n", __func__);
+ if (mask == -1)
+ return 0;
+ if (mask == 0) {
+ rc = msm_camera_qup_i2c_write(client, addr, data, data_type);
+ } else {
+ rc = msm_camera_qup_i2c_read(client, addr, ®_data,
+ data_type);
+ if (rc < 0) {
+ CDBG("%s read fail\n", __func__);
+ return rc;
+ }
+ reg_data &= ~mask;
+ reg_data |= (data & mask);
+ rc = msm_camera_qup_i2c_write(client, addr, reg_data,
+ data_type);
+ if (rc < 0)
+ CDBG("%s write fail\n", __func__);
+ }
+ return rc;
+}
+
+
+int32_t msm_camera_qup_i2c_write_conf_tbl(
+ struct msm_camera_i2c_client *client,
+ struct msm_camera_i2c_reg_conf *reg_conf_tbl, uint16_t size,
+ enum msm_camera_i2c_data_type data_type)
+{
+ int i;
+ int32_t rc = -EFAULT;
+ pr_err("%s, E. ", __func__);
+ for (i = 0; i < size; i++) {
+ enum msm_camera_i2c_data_type dt;
+ if (reg_conf_tbl->cmd_type == MSM_CAMERA_I2C_CMD_POLL) {
+ rc = msm_camera_qup_i2c_poll(client,
+ reg_conf_tbl->reg_addr,
+ reg_conf_tbl->reg_data,
+ reg_conf_tbl->dt);
+ } else {
+ if (reg_conf_tbl->dt == 0)
+ dt = data_type;
+ else
+ dt = reg_conf_tbl->dt;
+ switch (dt) {
+ case MSM_CAMERA_I2C_BYTE_DATA:
+ case MSM_CAMERA_I2C_WORD_DATA:
+ rc = msm_camera_qup_i2c_write(
+ client,
+ reg_conf_tbl->reg_addr,
+ reg_conf_tbl->reg_data, dt);
+ break;
+ case MSM_CAMERA_I2C_SET_BYTE_MASK:
+ rc = msm_camera_qup_i2c_set_mask(client,
+ reg_conf_tbl->reg_addr,
+ reg_conf_tbl->reg_data,
+ MSM_CAMERA_I2C_BYTE_DATA, 1);
+ break;
+ case MSM_CAMERA_I2C_UNSET_BYTE_MASK:
+ rc = msm_camera_qup_i2c_set_mask(client,
+ reg_conf_tbl->reg_addr,
+ reg_conf_tbl->reg_data,
+ MSM_CAMERA_I2C_BYTE_DATA, 0);
+ break;
+ case MSM_CAMERA_I2C_SET_WORD_MASK:
+ rc = msm_camera_qup_i2c_set_mask(client,
+ reg_conf_tbl->reg_addr,
+ reg_conf_tbl->reg_data,
+ MSM_CAMERA_I2C_WORD_DATA, 1);
+ break;
+ case MSM_CAMERA_I2C_UNSET_WORD_MASK:
+ rc = msm_camera_qup_i2c_set_mask(client,
+ reg_conf_tbl->reg_addr,
+ reg_conf_tbl->reg_data,
+ MSM_CAMERA_I2C_WORD_DATA, 0);
+ break;
+ case MSM_CAMERA_I2C_SET_BYTE_WRITE_MASK_DATA:
+ rc = msm_camera_qup_i2c_set_write_mask_data(
+ client,
+ reg_conf_tbl->reg_addr,
+ reg_conf_tbl->reg_data,
+ reg_conf_tbl->mask,
+ MSM_CAMERA_I2C_BYTE_DATA);
+ break;
+ default:
+ pr_err("%s: Unsupport data type: %d\n",
+ __func__, dt);
+ break;
+ }
+ }
+ if (rc < 0)
+ break;
+ reg_conf_tbl++;
+ }
+ return rc;
+}
+
diff --git a/drivers/media/platform/msm/camera_v2/sensor/msm_sensor.c b/drivers/media/platform/msm/camera_v2/sensor/msm_sensor.c
index 68c7d23..34f4428 100644
--- a/drivers/media/platform/msm/camera_v2/sensor/msm_sensor.c
+++ b/drivers/media/platform/msm/camera_v2/sensor/msm_sensor.c
@@ -613,11 +613,10 @@
return rc;
}
-static int32_t msm_sensor_get_dt_data(struct platform_device *pdev,
+static int32_t msm_sensor_get_dt_data(struct device_node *of_node,
struct msm_sensor_ctrl_t *s_ctrl)
{
int32_t rc = 0, i = 0, ret = 0;
- struct device_node *of_node = pdev->dev.of_node;
struct msm_camera_gpio_conf *gconf = NULL;
struct msm_camera_sensor_board_info *sensordata = NULL;
uint16_t *gpio_array = NULL;
@@ -867,6 +866,11 @@
[SENSOR_CAM_MCLK] = {"cam_clk", 24000000},
};
+static struct msm_cam_clk_info cam_8610_clk_info[] = {
+ [SENSOR_CAM_MCLK] = {"cam_src_clk", 24000000},
+ [SENSOR_CAM_CLK] = {"cam_clk", 0},
+};
+
static struct msm_cam_clk_info cam_8974_clk_info[] = {
[SENSOR_CAM_MCLK] = {"cam_src_clk", 19200000},
[SENSOR_CAM_CLK] = {"cam_clk", 0},
@@ -1656,6 +1660,7 @@
.i2c_write_seq_table = msm_camera_qup_i2c_write_seq_table,
.i2c_write_table_w_microdelay =
msm_camera_qup_i2c_write_table_w_microdelay,
+ .i2c_write_conf_tbl = msm_camera_qup_i2c_write_conf_tbl,
};
int32_t msm_sensor_platform_probe(struct platform_device *pdev, void *data)
@@ -1670,7 +1675,7 @@
CDBG("%s called data %p\n", __func__, data);
CDBG("%s pdev name %s\n", __func__, pdev->id_entry->name);
if (pdev->dev.of_node) {
- rc = msm_sensor_get_dt_data(pdev, s_ctrl);
+ rc = msm_sensor_get_dt_data(pdev->dev.of_node, s_ctrl);
if (rc < 0) {
pr_err("%s failed line %d\n", __func__, __LINE__);
return rc;
@@ -1744,10 +1749,9 @@
}
int32_t msm_sensor_i2c_probe(struct i2c_client *client,
- const struct i2c_device_id *id)
+ const struct i2c_device_id *id, struct msm_sensor_ctrl_t *s_ctrl)
{
int rc = 0;
- struct msm_sensor_ctrl_t *s_ctrl;
uint32_t session_id;
CDBG("%s %s_i2c_probe called\n", __func__, client->name);
if (!i2c_check_functionality(client->adapter, I2C_FUNC_I2C)) {
@@ -1757,15 +1761,25 @@
return rc;
}
- s_ctrl = (struct msm_sensor_ctrl_t *)(id->driver_data);
- if (!s_ctrl) {
- pr_err("%s:%d sensor ctrl structure NULL\n", __func__,
- __LINE__);
- return -EINVAL;
+ if (!client->dev.of_node) {
+ CDBG("msm_sensor_i2c_probe: of_node is NULL");
+ s_ctrl = (struct msm_sensor_ctrl_t *)(id->driver_data);
+ if (!s_ctrl) {
+ pr_err("%s:%d sensor ctrl structure NULL\n", __func__,
+ __LINE__);
+ return -EINVAL;
+ }
+ s_ctrl->sensordata = client->dev.platform_data;
+ } else {
+ CDBG("msm_sensor_i2c_probe: of_node exisists");
+ rc = msm_sensor_get_dt_data(client->dev.of_node, s_ctrl);
+ if (rc < 0) {
+ pr_err("%s failed line %d\n", __func__, __LINE__);
+ return rc;
+ }
}
s_ctrl->sensor_device_type = MSM_CAMERA_I2C_DEVICE;
- s_ctrl->sensordata = client->dev.platform_data;
if (s_ctrl->sensordata == NULL) {
pr_err("%s %s NULL sensor data\n", __func__, client->name);
return -EFAULT;
@@ -1793,14 +1807,27 @@
if (!s_ctrl->sensor_v4l2_subdev_ops)
s_ctrl->sensor_v4l2_subdev_ops = &msm_sensor_subdev_ops;
- s_ctrl->clk_info = kzalloc(sizeof(cam_8960_clk_info),
- GFP_KERNEL);
- if (!s_ctrl->clk_info) {
- pr_err("%s:%d failed nomem\n", __func__, __LINE__);
- return -ENOMEM;
+ if (!client->dev.of_node) {
+ s_ctrl->clk_info = kzalloc(sizeof(cam_8960_clk_info),
+ GFP_KERNEL);
+ if (!s_ctrl->clk_info) {
+ pr_err("%s:%d failed nomem\n", __func__, __LINE__);
+ return -ENOMEM;
+ }
+ memcpy(s_ctrl->clk_info, cam_8960_clk_info,
+ sizeof(cam_8960_clk_info));
+ s_ctrl->clk_info_size = ARRAY_SIZE(cam_8960_clk_info);
+ } else {
+ s_ctrl->clk_info = kzalloc(sizeof(cam_8610_clk_info),
+ GFP_KERNEL);
+ if (!s_ctrl->clk_info) {
+ pr_err("%s:%d failed nomem\n", __func__, __LINE__);
+ return -ENOMEM;
+ }
+ memcpy(s_ctrl->clk_info, cam_8610_clk_info,
+ sizeof(cam_8610_clk_info));
+ s_ctrl->clk_info_size = ARRAY_SIZE(cam_8610_clk_info);
}
- memcpy(s_ctrl->clk_info, cam_8960_clk_info, sizeof(cam_8960_clk_info));
- s_ctrl->clk_info_size = ARRAY_SIZE(cam_8960_clk_info);
rc = s_ctrl->func_tbl->sensor_power_up(s_ctrl);
if (rc < 0) {
diff --git a/drivers/media/platform/msm/camera_v2/sensor/msm_sensor.h b/drivers/media/platform/msm/camera_v2/sensor/msm_sensor.h
index fe11a56..80a2bd4 100644
--- a/drivers/media/platform/msm/camera_v2/sensor/msm_sensor.h
+++ b/drivers/media/platform/msm/camera_v2/sensor/msm_sensor.h
@@ -88,7 +88,7 @@
void *data);
int32_t msm_sensor_i2c_probe(struct i2c_client *client,
- const struct i2c_device_id *id);
+ const struct i2c_device_id *id, struct msm_sensor_ctrl_t *s_ctrl);
int32_t msm_sensor_free_sensor_data(struct msm_sensor_ctrl_t *s_ctrl);
diff --git a/drivers/media/platform/msm/camera_v2/sensor/mt9m114.c b/drivers/media/platform/msm/camera_v2/sensor/mt9m114.c
index 9911a59..c1cf862 100644
--- a/drivers/media/platform/msm/camera_v2/sensor/mt9m114.c
+++ b/drivers/media/platform/msm/camera_v2/sensor/mt9m114.c
@@ -1107,9 +1107,15 @@
{ }
};
+static int32_t msm_mt9m114_i2c_probe(struct i2c_client *client,
+ const struct i2c_device_id *id)
+{
+ return msm_sensor_i2c_probe(client, id, &mt9m114_s_ctrl);
+}
+
static struct i2c_driver mt9m114_i2c_driver = {
.id_table = mt9m114_i2c_id,
- .probe = msm_sensor_i2c_probe,
+ .probe = msm_mt9m114_i2c_probe,
.driver = {
.name = MT9M114_SENSOR_NAME,
},
diff --git a/drivers/media/platform/msm/camera_v2/sensor/ov2720.c b/drivers/media/platform/msm/camera_v2/sensor/ov2720.c
index d790c65..397564b 100644
--- a/drivers/media/platform/msm/camera_v2/sensor/ov2720.c
+++ b/drivers/media/platform/msm/camera_v2/sensor/ov2720.c
@@ -75,9 +75,15 @@
{ }
};
+static int32_t msm_ov2720_i2c_probe(struct i2c_client *client,
+ const struct i2c_device_id *id)
+{
+ return msm_sensor_i2c_probe(client, id, &ov2720_s_ctrl);
+}
+
static struct i2c_driver ov2720_i2c_driver = {
.id_table = ov2720_i2c_id,
- .probe = msm_sensor_i2c_probe,
+ .probe = msm_ov2720_i2c_probe,
.driver = {
.name = OV2720_SENSOR_NAME,
},
diff --git a/drivers/media/platform/msm/camera_v2/sensor/ov8825.c b/drivers/media/platform/msm/camera_v2/sensor/ov8825.c
index b56eb10..3256c5c 100644
--- a/drivers/media/platform/msm/camera_v2/sensor/ov8825.c
+++ b/drivers/media/platform/msm/camera_v2/sensor/ov8825.c
@@ -93,9 +93,15 @@
{ }
};
+static int32_t msm_ov8825_i2c_probe(struct i2c_client *client,
+ const struct i2c_device_id *id)
+{
+ return msm_sensor_i2c_probe(client, id, &ov8825_s_ctrl);
+}
+
static struct i2c_driver ov8825_i2c_driver = {
.id_table = ov8825_i2c_id,
- .probe = msm_sensor_i2c_probe,
+ .probe = msm_ov8825_i2c_probe,
.driver = {
.name = OV8825_SENSOR_NAME,
},
diff --git a/drivers/media/platform/msm/camera_v2/sensor/ov9724.c b/drivers/media/platform/msm/camera_v2/sensor/ov9724.c
index 981cc10..56af02b 100644
--- a/drivers/media/platform/msm/camera_v2/sensor/ov9724.c
+++ b/drivers/media/platform/msm/camera_v2/sensor/ov9724.c
@@ -83,6 +83,12 @@
},
};
+static int32_t msm_ov9724_i2c_probe(struct i2c_client *client,
+ const struct i2c_device_id *id)
+{
+ return msm_sensor_i2c_probe(client, id, &ov9724_s_ctrl);
+}
+
static const struct i2c_device_id ov9724_i2c_id[] = {
{OV9724_SENSOR_NAME, (kernel_ulong_t)&ov9724_s_ctrl},
{ }
@@ -90,7 +96,7 @@
static struct i2c_driver ov9724_i2c_driver = {
.id_table = ov9724_i2c_id,
- .probe = msm_sensor_i2c_probe,
+ .probe = msm_ov9724_i2c_probe,
.driver = {
.name = OV9724_SENSOR_NAME,
},
diff --git a/drivers/media/platform/msm/camera_v2/sensor/s5k3l1yx.c b/drivers/media/platform/msm/camera_v2/sensor/s5k3l1yx.c
index 21a7369..225e81d 100644
--- a/drivers/media/platform/msm/camera_v2/sensor/s5k3l1yx.c
+++ b/drivers/media/platform/msm/camera_v2/sensor/s5k3l1yx.c
@@ -93,9 +93,15 @@
{ }
};
+static int32_t msm_s5k3l1yx_i2c_probe(struct i2c_client *client,
+ const struct i2c_device_id *id)
+{
+ return msm_sensor_i2c_probe(client, id, &s5k3l1yx_s_ctrl);
+}
+
static struct i2c_driver s5k3l1yx_i2c_driver = {
.id_table = s5k3l1yx_i2c_id,
- .probe = msm_sensor_i2c_probe,
+ .probe = msm_s5k3l1yx_i2c_probe,
.driver = {
.name = S5K3L1YX_SENSOR_NAME,
},
diff --git a/drivers/media/platform/msm/camera_v2/sensor/sp1628.c b/drivers/media/platform/msm/camera_v2/sensor/sp1628.c
new file mode 100644
index 0000000..82e4b7c
--- /dev/null
+++ b/drivers/media/platform/msm/camera_v2/sensor/sp1628.c
@@ -0,0 +1,946 @@
+/* Copyright (c) 2011-2013, The Linux Foundation. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 and
+ * only version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ */
+#include "msm_sensor.h"
+#include "msm_cci.h"
+#include "msm_camera_io_util.h"
+
+#define CONFIG_MSMB_CAMERA_DEBUG
+
+#undef CDBG
+#ifdef CONFIG_MSMB_CAMERA_DEBUG
+#define CDBG(fmt, args...) pr_err(fmt, ##args)
+#else
+#define CDBG(fmt, args...) do { } while (0)
+#endif
+
+#define SP1628_SENSOR_NAME "sp1628"
+DEFINE_MSM_MUTEX(sp1628_mut);
+
+static struct msm_sensor_ctrl_t sp1628_s_ctrl;
+
+static struct msm_sensor_power_setting sp1628_power_setting[] = {
+ {
+ .seq_type = SENSOR_VREG,
+ .seq_val = CAM_VDIG,
+ .config_val = 0,
+ .delay = 0,
+ },
+ {
+ .seq_type = SENSOR_VREG,
+ .seq_val = CAM_VIO,
+ .config_val = 0,
+ .delay = 0,
+ },
+ {
+ .seq_type = SENSOR_VREG,
+ .seq_val = CAM_VANA,
+ .config_val = 0,
+ .delay = 5,
+ },
+ {
+ .seq_type = SENSOR_GPIO,
+ .seq_val = SENSOR_GPIO_STANDBY,
+ .config_val = GPIO_OUT_HIGH,
+ .delay = 50,
+ },
+
+ {
+ .seq_type = SENSOR_GPIO,
+ .seq_val = SENSOR_GPIO_RESET,
+ .config_val = GPIO_OUT_HIGH,
+ .delay = 50,
+ },
+ {
+ .seq_type = SENSOR_GPIO,
+ .seq_val = SENSOR_GPIO_RESET,
+ .config_val = GPIO_OUT_LOW,
+ .delay = 50,
+ },
+ {
+ .seq_type = SENSOR_GPIO,
+ .seq_val = SENSOR_GPIO_RESET,
+ .config_val = GPIO_OUT_HIGH,
+ .delay = 50,
+ },
+ {
+ .seq_type = SENSOR_GPIO,
+ .seq_val = SENSOR_GPIO_STANDBY,
+ .config_val = GPIO_OUT_LOW,
+ .delay = 50,
+ },
+ {
+ .seq_type = SENSOR_CLK,
+ .seq_val = SENSOR_CAM_MCLK,
+ .config_val = 0,
+ .delay = 1,
+ },
+
+ {
+ .seq_type = SENSOR_I2C_MUX,
+ .seq_val = 0,
+ .config_val = 0,
+ .delay = 5,
+ },
+};
+
+static struct msm_camera_i2c_reg_conf sp1628_start_settings[] = {
+ {0x92, 0x81},
+};
+
+static struct msm_camera_i2c_reg_conf sp1628_stop_settings[] = {
+ {0x92, 0x01},
+};
+
+static struct msm_camera_i2c_reg_conf sp1628_recommend_settings[] = {
+ {0xfd, 0x00,},
+ {0x91, 0x00,},
+ {0x92, 0x81,},
+ {0x98, 0x2a,},
+ {0x96, 0xd0,}, /* c0*/
+ {0x97, 0x02,}, /* 03*/
+ {0x2f, 0x20,}, /* 24M*3=72M*/
+ {0x0b, 0x48,}, /* analog*/
+ {0x30, 0x80,}, /* 00*/
+ {0x0c, 0x66,}, /* analog*/
+ {0x0d, 0x12,},
+ {0x13, 0x0f,}, /* 10*/
+ {0x14, 0x00,},
+ {0x12, 0x00,},
+ {0x6b, 0x10,}, /* 11*/
+ {0x6c, 0x00,},
+ {0x6d, 0x00,},
+ {0x6e, 0x00,},
+ {0x6f, 0x10,}, /* 11*/
+ {0x73, 0x11,}, /* 12*/
+ {0x7a, 0x10,}, /* 11*/
+ {0x15, 0x17,}, /* 18*/
+ {0x71, 0x18,}, /* 19*/
+ {0x76, 0x18,}, /* 19*/
+ {0x29, 0x08,},
+ {0x18, 0x01,},
+ {0x19, 0x10,},
+ {0x1a, 0xc3,}, /* c1*/
+ {0x1b, 0x6f,},
+ {0x1d, 0x11,}, /* 01*/
+ {0x1e, 0x00,}, /* 1e*/
+ {0x1f, 0x80,},
+ {0x20, 0x7f,},
+ {0x22, 0x3c,}, /* 1b*/
+ {0x25, 0xff,},
+ {0x2b, 0x88,},
+ {0x2c, 0x85,},
+ {0x2d, 0x00,},
+ {0x2e, 0x80,},
+ {0x27, 0x38,},
+ {0x28, 0x03,},
+ {0x70, 0x1a,},
+ {0x72, 0x18,}, /* 1a*/
+ {0x74, 0x18,},
+ {0x75, 0x18,},
+ {0x77, 0x16,}, /* 18*/
+ {0x7f, 0x19,},
+ {0x31, 0x71,}, /*70 mirror/flip 720P*/
+ {0xfd, 0x01,},
+ {0x5d, 0x11,}, /* position*/
+ {0x5f, 0x00,},
+ {0x36, 0x08,},
+ {0x2f, 0xff,},
+ {0xfb, 0x25,}, /* blacklevl*/
+ {0x48, 0x00,}, /* dp*/
+ {0x49, 0x99,},
+ {0xf2, 0x0A,},
+ {0xfd, 0x02,}, /* AE*/
+ {0x52, 0x34,},
+ {0x53, 0x02,},
+ {0x54, 0x0c,},
+ {0x55, 0x08,},
+ {0x86, 0x0c,},
+ {0x87, 0x10,},
+ {0x8b, 0x10,},
+
+ /* 12-30 50Hz*/
+ {0xfd, 0x00,}, /* ae setting*/
+ {0x03, 0x05,},
+ {0x04, 0x64,},
+ {0x05, 0x00,},
+ {0x06, 0x00,},
+ {0x09, 0x00,},
+ {0x0a, 0x02,},
+ {0xfd, 0x01,},
+ {0xf0, 0x00,},
+ {0xf7, 0xe6,},
+ {0xf8, 0xc1,},
+ {0x02, 0x08,},
+ {0x03, 0x01,},
+ {0x06, 0xe6,},
+ {0x07, 0x00,},
+ {0x08, 0x01,},
+ {0x09, 0x00,},
+ {0xfd, 0x02,},
+ {0x40, 0x0a,},
+ {0x41, 0xc1,},
+ {0x42, 0x00,},
+ {0x88, 0x37,},
+ {0x89, 0xa7,},
+ {0x8a, 0x22,},
+ {0xfd, 0x02,}, /* Status*/
+ {0xbe, 0x30,},
+ {0xbf, 0x07,},
+ {0xd0, 0x30,},
+ {0xd1, 0x07,},
+ {0xfd, 0x01,},
+ {0x5b, 0x07,},
+ {0x5c, 0x30,},
+ {0xfd, 0x00,},
+
+ /* 12-30 60Hz*/
+ {0xfd, 0x00,}, /* ae setting*/
+ {0x03, 0x04,},
+ {0x04, 0x80,},
+ {0x05, 0x00,},
+ {0x06, 0x00,},
+ {0x09, 0x00,},
+ {0x0a, 0x01,},
+ {0xfd, 0x01,},
+ {0xf0, 0x00,},
+ {0xf7, 0xc0,},
+ {0xf8, 0xc1,},
+ {0x02, 0x0a,},
+ {0x03, 0x01,},
+ {0x06, 0xc0,},
+ {0x07, 0x00,},
+ {0x08, 0x01,},
+ {0x09, 0x00,},
+ {0xfd, 0x02,},
+ {0x40, 0x0a,},
+ {0x41, 0xc1,},
+ {0x42, 0x00,},
+ {0x88, 0x37,},
+ {0x89, 0xa7,},
+ {0x8a, 0x22,},
+ {0xfd, 0x02,}, /* Status*/
+ {0xbe, 0x80,},
+ {0xbf, 0x07,},
+ {0xd0, 0x80,},
+ {0xd1, 0x07,},
+ {0xfd, 0x01,},
+ {0x5b, 0x07,},
+ {0x5c, 0x80,},
+ {0xfd, 0x00,},
+
+ {0xfd, 0x01,}, /* fix status*/
+ {0x5a, 0x38,}, /* DP_gain*/
+ {0xfd, 0x02,},
+ {0xba, 0x30,}, /* mean_dummy_low*/
+ {0xbb, 0x50,}, /* mean_low_dummy*/
+ {0xbc, 0xc0,}, /* rpc_heq_low*/
+ {0xbd, 0xa0,}, /* rpc_heq_dummy*/
+ {0xb8, 0x80,}, /* mean_nr_dummy*/
+ {0xb9, 0x90,}, /* mean_dummy_nr*/
+ {0xfd, 0x01,}, /* rpc*/
+ {0xe0, 0x54,},
+ {0xe1, 0x40,},
+ {0xe2, 0x38,},
+ {0xe3, 0x34,},
+ {0xe4, 0x34,},
+ {0xe5, 0x30,},
+ {0xe6, 0x30,},
+ {0xe7, 0x2e,},
+ {0xe8, 0x2e,},
+ {0xe9, 0x2e,},
+ {0xea, 0x2c,},
+ {0xf3, 0x2c,},
+ {0xf4, 0x2c,},
+ {0xfd, 0x01,}, /* min gain*/
+ {0x04, 0xc0,}, /* rpc_max_indr*/
+ {0x05, 0x2c,}, /* rpc_min_indr*/
+ {0x0a, 0xc0,}, /* rpc_max_outdr*/
+ {0x0b, 0x2c,}, /* rpc_min_outdr*/
+ {0xfd, 0x01,}, /* ae target*/
+ {0xeb, 0x78,},
+ {0xec, 0x78,},
+ {0xed, 0x05,},
+ {0xee, 0x0a,},
+ {0xfd, 0x01,}, /* lsc*/
+ {0x26, 0x30,},
+ {0x27, 0xdc,},
+ {0x28, 0x05,},
+ {0x29, 0x08,},
+ {0x2a, 0x00,},
+ {0x2b, 0x03,},
+ {0x2c, 0x00,},
+ {0x2d, 0x2f,},
+ {0xfd, 0x01,}, /* RGainf*/
+ {0xa1, 0x37,}, /* left*/
+ {0xa2, 0x26,}, /* right*/
+ {0xa3, 0x32,}, /* up*/
+ {0xa4, 0x2b,}, /* down*/
+ {0xad, 0x0f,}, /* lu*/
+ {0xae, 0x0a,}, /* ru*/
+ {0xaf, 0x0a,}, /* ld*/
+ {0xb0, 0x0a,}, /* rd*/
+ {0x18, 0x2f,}, /* left*/
+ {0x19, 0x30,}, /* right*/
+ {0x1a, 0x32,}, /* up*/
+ {0x1b, 0x30,}, /* down*/
+ {0xbf, 0xa5,}, /* lu*/
+ {0xc0, 0x12,}, /* ru*/
+ {0xc1, 0x08,}, /* ld*/
+ {0xfa, 0x00,}, /* rd*/
+ {0xa5, 0x35,}, /* GGain*/
+ {0xa6, 0x24,},
+ {0xa7, 0x2e,},
+ {0xa8, 0x25,},
+ {0xb1, 0x00,},
+ {0xb2, 0x04,},
+ {0xb3, 0x00,},
+ {0xb4, 0x00,},
+ {0x1c, 0x24,},
+ {0x1d, 0x23,},
+ {0x1e, 0x2c,},
+ {0xb9, 0x25,},
+ {0x21, 0xa0,},
+ {0x22, 0x13,},
+ {0x23, 0x1c,},
+ {0x24, 0x0d,},
+ {0xa9, 0x2f,}, /* BGain*/
+ {0xaa, 0x24,},
+ {0xab, 0x2d,},
+ {0xac, 0x24,},
+ {0xb5, 0x00,},
+ {0xb6, 0x00,},
+ {0xb7, 0x00,},
+ {0xb8, 0x00,},
+ {0xba, 0x22,},
+ {0xbc, 0x24,},
+ {0xbd, 0x31,},
+ {0xbe, 0x24,},
+ {0x25, 0xa0,},
+ {0x45, 0x08,},
+ {0x46, 0x12,},
+ {0x47, 0x09,},
+ {0xfd, 0x01,}, /* awb*/
+ {0x32, 0x15,},
+ {0xfd, 0x02,},
+ {0x26, 0xc9,},
+ {0x27, 0x8b,},
+ {0x1b, 0x80,},
+ {0x1a, 0x80,},
+ {0x18, 0x27,},
+ {0x19, 0x26,},
+ {0x2a, 0x01,},
+ {0x2b, 0x10,},
+ {0x28, 0xf8,},
+ {0x29, 0x08,},
+
+ /* d65*/
+ {0x66, 0x35,},
+ {0x67, 0x60,},
+ {0x68, 0xb0,},
+ {0x69, 0xe0,},
+ {0x6a, 0xa5,},
+
+ /* indoor*/
+ {0x7c, 0x38,},
+ {0x7d, 0x58,},
+ {0x7e, 0xdb,},
+ {0x7f, 0x13,},
+ {0x80, 0xa6,},
+
+ /* cwftl84*/
+ {0x70, 0x18,}, /* 2f*/
+ {0x71, 0x4a,},
+ {0x72, 0x08,},
+ {0x73, 0x32,}, /* 24*/
+ {0x74, 0xaa,},
+
+ /* tl84--F*/
+ {0x6b, 0x02,}, /* 18*/
+ {0x6c, 0x2a,}, /* 34*/
+ {0x6d, 0x1e,}, /* 17*/
+ {0x6e, 0x49,}, /* 32*/
+ {0x6f, 0xaa,},
+
+ /* f--H*/
+ {0x61, 0xea,}, /* 02*/
+ {0x62, 0xf8,}, /* 2a*/
+ {0x63, 0x4f,}, /* 1e*/
+ {0x64, 0x5f,}, /* 49*/
+ {0x65, 0x5a,}, /* aa*/
+
+ {0x75, 0x80,},
+ {0x76, 0x09,},
+ {0x77, 0x02,},
+ {0x24, 0x25,},
+ {0x0e, 0x16,},
+ {0x3b, 0x09,},
+ {0xfd, 0x02,}, /* sharp*/
+ {0xde, 0x0f,},
+ {0xd2, 0x0c,}, /* control black-white edge; 0 - bolder, f - thinner*/
+ {0xd3, 0x0a,},
+ {0xd4, 0x08,},
+ {0xd5, 0x08,},
+ {0xd7, 0x10,}, /* outline judgement*/
+ {0xd8, 0x1d,},
+ {0xd9, 0x32,},
+ {0xda, 0x48,},
+ {0xdb, 0x08,},
+ {0xe8, 0x38,}, /* outline strength*/
+ {0xe9, 0x38,},
+ {0xea, 0x38,}, /* 30*/
+ {0xeb, 0x38,}, /* 2*/
+ {0xec, 0x60,},
+ {0xed, 0x40,},
+ {0xee, 0x38,}, /* 30*/
+ {0xef, 0x38,}, /* 20*/
+ {0xf3, 0x00,}, /* sharpness level of flat area*/
+ {0xf4, 0x00,},
+ {0xf5, 0x00,},
+ {0xf6, 0x00,},
+ {0xfd, 0x02,}, /* skin sharpen*/
+ {0xdc, 0x04,}, /* skin de-sharpen*/
+ {0x05, 0x6f,},
+ {0x09, 0x10,},
+ {0xfd, 0x01,}, /* dns*/
+ {0x64, 0x22,}, /* 0 - max, 8 - min*/
+ {0x65, 0x22,},
+ {0x86, 0x20,}, /* threshold, 0 - min*/
+ {0x87, 0x20,},
+ {0x88, 0x20,},
+ {0x89, 0x20,},
+ {0x6d, 0x0f,},
+ {0x6e, 0x0f,},
+ {0x6f, 0x10,},
+ {0x70, 0x10,},
+ {0x71, 0x0d,},
+ {0x72, 0x23,},
+ {0x73, 0x23,}, /* 28*/
+ {0x74, 0x23,}, /* 2a*/
+ {0x75, 0x46,}, /* [7:4] strength of flat area,
+ [3:0]strength of un-flat area;
+ 0-max, 8-min*/
+ {0x76, 0x36,},
+ {0x77, 0x36,}, /* 25*/
+ {0x78, 0x36,}, /* 12*/
+ {0x81, 0x1d,}, /* 2x*/
+ {0x82, 0x2b,}, /* 4x*/
+ {0x83, 0x2b,}, /* 50; 8x*/
+ {0x84, 0x2b,}, /* 80; 16x*/
+ {0x85, 0x0a,}, /* 12/8reg0x81*/
+ {0xfd, 0x01,}, /* gamma*/
+ {0x8b, 0x00,}, /* 00; 00; 00;*/
+ {0x8c, 0x0d,}, /* 02; 0b; 0b;*/
+ {0x8d, 0x1f,}, /* 0a; 19; 17;*/
+ {0x8e, 0x2d,}, /* 13; 2a; 27;*/
+ {0x8f, 0x3a,}, /* 1d; 37; 35;*/
+ {0x90, 0x4b,}, /* 30; 4b; 51;*/
+ {0x91, 0x59,}, /* 40; 5e; 64;*/
+ {0x92, 0x64,}, /* 4e; 6c; 74;*/
+ {0x93, 0x70,}, /* 5a; 78; 80;*/
+ {0x94, 0x83,}, /* 71; 92; 92;*/
+ {0x95, 0x92,}, /* 85; a6; a2;*/
+ {0x96, 0xa1,}, /* 96; b5; af;*/
+ {0x97, 0xae,}, /* a6; bf; bb;*/
+ {0x98, 0xba,}, /* b3; ca; c6;*/
+ {0x99, 0xc4,}, /* c0; d2; d0;*/
+ {0x9a, 0xcf,}, /* cb; d9; d9;*/
+ {0x9b, 0xdb,}, /* d5; e1; e0;*/
+ {0x9c, 0xe5,}, /* df; e8; e8;*/
+ {0x9d, 0xec,}, /* e9; ee; ee;*/
+ {0x9e, 0xf3,}, /* f2; f4; f4;*/
+ {0x9f, 0xfa,}, /* fa; fa; fa;*/
+ {0xa0, 0xff,}, /* ff; ff; ff;*/
+ {0xfd, 0x02,}, /* CCM*/
+ {0x15, 0xc8,}, /* b>th ab*/
+ {0x16, 0x95,}, /* r<th 87*/
+
+ {0xa0, 0x8c,}, /* !F*/
+ {0xa1, 0xfa,},
+ {0xa2, 0xfa,},
+ {0xa3, 0xf4,},
+ {0xa4, 0x99,},
+ {0xa5, 0xf4,},
+ {0xa6, 0x00,},
+ {0xa7, 0xb4,},
+ {0xa8, 0xcc,},
+ {0xa9, 0x3c,},
+ {0xaa, 0x33,},
+ {0xab, 0x0c,},
+
+ {0xac, 0x80,}, /* F*/
+ {0xad, 0x00,},
+ {0xae, 0x00,},
+ {0xaf, 0xe7,},
+ {0xb0, 0xc0,},
+ {0xb1, 0xda,},
+ {0xb2, 0xe7,},
+ {0xb3, 0xb4,},
+ {0xb4, 0xe6,},
+ {0xb5, 0x00,},
+ {0xb6, 0x33,},
+ {0xb7, 0x0f,},
+ {0xfd, 0x01,}, /* sat u*/
+ {0xd3, 0x8a,}, /* 90 105%*/
+ {0xd4, 0x8a,}, /* 90*/
+ {0xd5, 0x88,},
+ {0xd6, 0x80,},
+ {0xd7, 0x8a,}, /* 90; sat v*/
+ {0xd8, 0x8a,}, /* 90*/
+ {0xd9, 0x88,},
+ {0xda, 0x80,},
+ {0xfd, 0x01,}, /* auto_sat*/
+ {0xd2, 0x00,}, /* autosa_en*/
+ {0xfd, 0x01,}, /* uv_th*/
+ {0xc2, 0xee,},
+ {0xc3, 0xee,},
+ {0xc4, 0xdd,},
+ {0xc5, 0xbb,},
+ {0xfd, 0x01,}, /* low_lum_offset*/
+ {0xcd, 0x10,},
+ {0xce, 0x1f,},
+ {0xfd, 0x02,}, /* gw*/
+ {0x35, 0x6f,},
+ {0x37, 0x13,},
+ {0xfd, 0x01,}, /* heq*/
+ {0xdb, 0x00,},
+ {0x10, 0x00,},
+ {0x14, 0x25,},
+ {0x11, 0x10,},
+ {0x15, 0x25,},
+ {0x16, 0x15,},
+ {0xfd, 0x02,}, /* cnr*/
+ {0x8e, 0x10,},
+ {0x90, 0x20,},
+ {0x91, 0x20,},
+ {0x92, 0x60,},
+ {0x93, 0x80,},
+ {0xfd, 0x02,}, /* auto*/
+ {0x85, 0x00,},
+ {0xfd, 0x01,},
+ {0x00, 0x00,}, /* fix mode*/
+ {0x32, 0x15,}, /* ae en*/
+ {0x33, 0xef,}, /* lsc\bpc en*/
+ {0x34, 0xc7,}, /* ynr\cnr\gamma\color en*/
+ {0x35, 0x40,}, /* YUYV*/
+ {0xfd, 0x00,},
+
+};
+
+static struct v4l2_subdev_info sp1628_subdev_info[] = {
+ {
+ .code = V4L2_MBUS_FMT_YUYV8_2X8,
+ .colorspace = V4L2_COLORSPACE_JPEG,
+ .fmt = 1,
+ .order = 0,
+ },
+};
+
+static const struct i2c_device_id sp1628_i2c_id[] = {
+ {SP1628_SENSOR_NAME, (kernel_ulong_t)&sp1628_s_ctrl},
+ { }
+};
+
+static int32_t msm_sp1628_i2c_probe(struct i2c_client *client,
+ const struct i2c_device_id *id)
+{
+ CDBG("%s, E.", __func__);
+
+ return msm_sensor_i2c_probe(client, id, &sp1628_s_ctrl);
+}
+
+static struct i2c_driver sp1628_i2c_driver = {
+ .id_table = sp1628_i2c_id,
+ .probe = msm_sp1628_i2c_probe,
+ .driver = {
+ .name = SP1628_SENSOR_NAME,
+ },
+};
+
+static struct msm_camera_i2c_client sp1628_sensor_i2c_client = {
+ .addr_type = MSM_CAMERA_I2C_BYTE_ADDR,
+};
+
+static const struct of_device_id sp1628_dt_match[] = {
+ {.compatible = "qcom,sp1628", .data = &sp1628_s_ctrl},
+ {}
+};
+
+MODULE_DEVICE_TABLE(of, sp1628_dt_match);
+
+static struct platform_driver sp1628_platform_driver = {
+ .driver = {
+ .name = "qcom,sp1628",
+ .owner = THIS_MODULE,
+ .of_match_table = sp1628_dt_match,
+ },
+};
+
+static int32_t sp1628_platform_probe(struct platform_device *pdev)
+{
+ int32_t rc;
+ const struct of_device_id *match;
+ CDBG("%s, E.", __func__);
+ match = of_match_device(sp1628_dt_match, &pdev->dev);
+ rc = msm_sensor_platform_probe(pdev, match->data);
+ return rc;
+}
+
+static int __init sp1628_init_module(void)
+{
+ int32_t rc;
+ pr_info("%s:%d\n", __func__, __LINE__);
+ rc = platform_driver_probe(&sp1628_platform_driver,
+ sp1628_platform_probe);
+ if (!rc)
+ return rc;
+ pr_err("%s:%d rc %d\n", __func__, __LINE__, rc);
+ return i2c_add_driver(&sp1628_i2c_driver);
+}
+
+static void __exit sp1628_exit_module(void)
+{
+ pr_info("%s:%d\n", __func__, __LINE__);
+ if (sp1628_s_ctrl.pdev) {
+ msm_sensor_free_sensor_data(&sp1628_s_ctrl);
+ platform_driver_unregister(&sp1628_platform_driver);
+ } else
+ i2c_del_driver(&sp1628_i2c_driver);
+ return;
+}
+
+int32_t sp1628_sensor_config(struct msm_sensor_ctrl_t *s_ctrl,
+ void __user *argp)
+{
+ struct sensorb_cfg_data *cdata = (struct sensorb_cfg_data *)argp;
+ long rc = 0;
+ int32_t i = 0;
+ mutex_lock(s_ctrl->msm_sensor_mutex);
+ CDBG("%s:%d %s cfgtype = %d\n", __func__, __LINE__,
+ s_ctrl->sensordata->sensor_name, cdata->cfgtype);
+ switch (cdata->cfgtype) {
+ case CFG_GET_SENSOR_INFO:
+ memcpy(cdata->cfg.sensor_info.sensor_name,
+ s_ctrl->sensordata->sensor_name,
+ sizeof(cdata->cfg.sensor_info.sensor_name));
+ cdata->cfg.sensor_info.session_id =
+ s_ctrl->sensordata->sensor_info->session_id;
+ for (i = 0; i < SUB_MODULE_MAX; i++)
+ cdata->cfg.sensor_info.subdev_id[i] =
+ s_ctrl->sensordata->sensor_info->subdev_id[i];
+ CDBG("%s:%d sensor name %s\n", __func__, __LINE__,
+ cdata->cfg.sensor_info.sensor_name);
+ CDBG("%s:%d session id %d\n", __func__, __LINE__,
+ cdata->cfg.sensor_info.session_id);
+ for (i = 0; i < SUB_MODULE_MAX; i++)
+ CDBG("%s:%d subdev_id[%d] %d\n", __func__, __LINE__, i,
+ cdata->cfg.sensor_info.subdev_id[i]);
+
+ break;
+ case CFG_SET_INIT_SETTING:
+ /* Write Recommend settings */
+ pr_err("%s, sensor write init setting!!", __func__);
+ rc = s_ctrl->sensor_i2c_client->i2c_func_tbl->
+ i2c_write_conf_tbl(s_ctrl->sensor_i2c_client,
+ sp1628_recommend_settings,
+ ARRAY_SIZE(sp1628_recommend_settings),
+ MSM_CAMERA_I2C_BYTE_DATA);
+ break;
+ case CFG_SET_RESOLUTION:
+ break;
+ case CFG_SET_STOP_STREAM:
+ pr_err("%s, sensor stop stream!!", __func__);
+ rc = s_ctrl->sensor_i2c_client->i2c_func_tbl->
+ i2c_write_conf_tbl(s_ctrl->sensor_i2c_client,
+ sp1628_stop_settings,
+ ARRAY_SIZE(sp1628_stop_settings),
+ MSM_CAMERA_I2C_BYTE_DATA);
+ break;
+ case CFG_SET_START_STREAM:
+ pr_err("%s, sensor start stream!!", __func__);
+ rc = s_ctrl->sensor_i2c_client->i2c_func_tbl->
+ i2c_write_conf_tbl(s_ctrl->sensor_i2c_client,
+ sp1628_start_settings,
+ ARRAY_SIZE(sp1628_start_settings),
+ MSM_CAMERA_I2C_BYTE_DATA);
+ break;
+ case CFG_GET_SENSOR_INIT_PARAMS:
+ cdata->cfg.sensor_init_params =
+ *s_ctrl->sensordata->sensor_init_params;
+ CDBG("%s:%d init params mode %d pos %d mount %d\n", __func__,
+ __LINE__,
+ cdata->cfg.sensor_init_params.modes_supported,
+ cdata->cfg.sensor_init_params.position,
+ cdata->cfg.sensor_init_params.sensor_mount_angle);
+ break;
+ case CFG_SET_SLAVE_INFO: {
+ struct msm_camera_sensor_slave_info sensor_slave_info;
+ struct msm_sensor_power_setting_array *power_setting_array;
+ int slave_index = 0;
+ if (copy_from_user(&sensor_slave_info,
+ (void *)cdata->cfg.setting,
+ sizeof(struct msm_camera_sensor_slave_info))) {
+ pr_err("%s:%d failed\n", __func__, __LINE__);
+ rc = -EFAULT;
+ break;
+ }
+ /* Update sensor slave address */
+ if (sensor_slave_info.slave_addr) {
+ s_ctrl->sensor_i2c_client->cci_client->sid =
+ sensor_slave_info.slave_addr >> 1;
+ }
+
+ /* Update sensor address type */
+ s_ctrl->sensor_i2c_client->addr_type =
+ sensor_slave_info.addr_type;
+
+ /* Update power up / down sequence */
+ s_ctrl->power_setting_array =
+ sensor_slave_info.power_setting_array;
+ power_setting_array = &s_ctrl->power_setting_array;
+ power_setting_array->power_setting = kzalloc(
+ power_setting_array->size *
+ sizeof(struct msm_sensor_power_setting), GFP_KERNEL);
+ if (!power_setting_array->power_setting) {
+ pr_err("%s:%d failed\n", __func__, __LINE__);
+ rc = -ENOMEM;
+ break;
+ }
+ if (copy_from_user(power_setting_array->power_setting,
+ (void *)sensor_slave_info.power_setting_array.power_setting,
+ power_setting_array->size *
+ sizeof(struct msm_sensor_power_setting))) {
+ kfree(power_setting_array->power_setting);
+ pr_err("%s:%d failed\n", __func__, __LINE__);
+ rc = -EFAULT;
+ break;
+ }
+ s_ctrl->free_power_setting = true;
+ CDBG("%s sensor id %x\n", __func__,
+ sensor_slave_info.slave_addr);
+ CDBG("%s sensor addr type %d\n", __func__,
+ sensor_slave_info.addr_type);
+ CDBG("%s sensor reg %x\n", __func__,
+ sensor_slave_info.sensor_id_info.sensor_id_reg_addr);
+ CDBG("%s sensor id %x\n", __func__,
+ sensor_slave_info.sensor_id_info.sensor_id);
+ for (slave_index = 0; slave_index <
+ power_setting_array->size; slave_index++) {
+ CDBG("%s i %d power setting %d %d %ld %d\n", __func__,
+ slave_index,
+ power_setting_array->power_setting[slave_index].
+ seq_type,
+ power_setting_array->power_setting[slave_index].
+ seq_val,
+ power_setting_array->power_setting[slave_index].
+ config_val,
+ power_setting_array->power_setting[slave_index].
+ delay);
+ }
+ kfree(power_setting_array->power_setting);
+ break;
+ }
+ case CFG_WRITE_I2C_ARRAY: {
+ struct msm_camera_i2c_reg_setting conf_array;
+ struct msm_camera_i2c_reg_array *reg_setting = NULL;
+
+ if (copy_from_user(&conf_array,
+ (void *)cdata->cfg.setting,
+ sizeof(struct msm_camera_i2c_reg_setting))) {
+ pr_err("%s:%d failed\n", __func__, __LINE__);
+ rc = -EFAULT;
+ break;
+ }
+
+ reg_setting = kzalloc(conf_array.size *
+ (sizeof(struct msm_camera_i2c_reg_array)), GFP_KERNEL);
+ if (!reg_setting) {
+ pr_err("%s:%d failed\n", __func__, __LINE__);
+ rc = -ENOMEM;
+ break;
+ }
+ if (copy_from_user(reg_setting, (void *)conf_array.reg_setting,
+ conf_array.size *
+ sizeof(struct msm_camera_i2c_reg_array))) {
+ pr_err("%s:%d failed\n", __func__, __LINE__);
+ kfree(reg_setting);
+ rc = -EFAULT;
+ break;
+ }
+
+ conf_array.reg_setting = reg_setting;
+ rc = s_ctrl->sensor_i2c_client->i2c_func_tbl->i2c_write_table(
+ s_ctrl->sensor_i2c_client, &conf_array);
+ kfree(reg_setting);
+ break;
+ }
+ case CFG_WRITE_I2C_SEQ_ARRAY: {
+ struct msm_camera_i2c_seq_reg_setting conf_array;
+ struct msm_camera_i2c_seq_reg_array *reg_setting = NULL;
+
+ if (copy_from_user(&conf_array,
+ (void *)cdata->cfg.setting,
+ sizeof(struct msm_camera_i2c_seq_reg_setting))) {
+ pr_err("%s:%d failed\n", __func__, __LINE__);
+ rc = -EFAULT;
+ break;
+ }
+
+ reg_setting = kzalloc(conf_array.size *
+ (sizeof(struct msm_camera_i2c_seq_reg_array)),
+ GFP_KERNEL);
+ if (!reg_setting) {
+ pr_err("%s:%d failed\n", __func__, __LINE__);
+ rc = -ENOMEM;
+ break;
+ }
+ if (copy_from_user(reg_setting, (void *)conf_array.reg_setting,
+ conf_array.size *
+ sizeof(struct msm_camera_i2c_seq_reg_array))) {
+ pr_err("%s:%d failed\n", __func__, __LINE__);
+ kfree(reg_setting);
+ rc = -EFAULT;
+ break;
+ }
+
+ conf_array.reg_setting = reg_setting;
+ rc = s_ctrl->sensor_i2c_client->i2c_func_tbl->
+ i2c_write_seq_table(s_ctrl->sensor_i2c_client,
+ &conf_array);
+ kfree(reg_setting);
+ break;
+ }
+
+ case CFG_POWER_UP:
+ if (s_ctrl->func_tbl->sensor_power_up)
+ rc = s_ctrl->func_tbl->sensor_power_up(s_ctrl);
+ else
+ rc = -EFAULT;
+ break;
+
+ case CFG_POWER_DOWN:
+ if (s_ctrl->func_tbl->sensor_power_down)
+ rc = s_ctrl->func_tbl->sensor_power_down(
+ s_ctrl);
+ else
+ rc = -EFAULT;
+ break;
+
+ case CFG_SET_STOP_STREAM_SETTING: {
+ struct msm_camera_i2c_reg_setting *stop_setting =
+ &s_ctrl->stop_setting;
+ struct msm_camera_i2c_reg_array *reg_setting = NULL;
+ if (copy_from_user(stop_setting, (void *)cdata->cfg.setting,
+ sizeof(struct msm_camera_i2c_reg_setting))) {
+ pr_err("%s:%d failed\n", __func__, __LINE__);
+ rc = -EFAULT;
+ break;
+ }
+
+ reg_setting = stop_setting->reg_setting;
+ stop_setting->reg_setting = kzalloc(stop_setting->size *
+ (sizeof(struct msm_camera_i2c_reg_array)), GFP_KERNEL);
+ if (!stop_setting->reg_setting) {
+ pr_err("%s:%d failed\n", __func__, __LINE__);
+ rc = -ENOMEM;
+ break;
+ }
+ if (copy_from_user(stop_setting->reg_setting,
+ (void *)reg_setting, stop_setting->size *
+ sizeof(struct msm_camera_i2c_reg_array))) {
+ pr_err("%s:%d failed\n", __func__, __LINE__);
+ kfree(stop_setting->reg_setting);
+ stop_setting->reg_setting = NULL;
+ stop_setting->size = 0;
+ rc = -EFAULT;
+ break;
+ }
+ break;
+ }
+ default:
+ rc = -EFAULT;
+ break;
+ }
+
+ mutex_unlock(s_ctrl->msm_sensor_mutex);
+
+ return rc;
+}
+
+int32_t sp1628_match_id(struct msm_sensor_ctrl_t *s_ctrl)
+{
+ int32_t rc = 0;
+ uint16_t chipid = 0;
+
+ CDBG("%s, E. calling i2c_read:, i2c_addr:%d, id_reg_addr:%d",
+ __func__,
+ s_ctrl->sensordata->slave_info->sensor_slave_addr,
+ s_ctrl->sensordata->slave_info->sensor_id_reg_addr);
+
+ rc = s_ctrl->sensor_i2c_client->i2c_func_tbl->i2c_read(
+ s_ctrl->sensor_i2c_client,
+ 0x02,
+ &chipid, MSM_CAMERA_I2C_BYTE_DATA);
+ if (rc < 0) {
+ pr_err("%s: %s: read id failed\n", __func__,
+ s_ctrl->sensordata->sensor_name);
+ return rc;
+ }
+
+ CDBG("%s: read id: %x expected id 0x16:\n", __func__, chipid);
+ if (chipid != 0x16) {
+ pr_err("msm_sensor_match_id chip id doesnot match\n");
+ return -ENODEV;
+ }
+
+ chipid = 0;
+ rc = s_ctrl->sensor_i2c_client->i2c_func_tbl->i2c_read(
+ s_ctrl->sensor_i2c_client,
+ 0xa0,
+ &chipid, MSM_CAMERA_I2C_BYTE_DATA);
+ if (rc < 0) {
+ pr_err("%s: %s: read id failed\n", __func__,
+ s_ctrl->sensordata->sensor_name);
+ return rc;
+ }
+
+ CDBG("%s: read id: %x expected id 0x28:\n", __func__, chipid);
+ if (chipid != 0x28) {
+ pr_err("msm_sensor_match_id chip id doesnot match\n");
+ return -ENODEV;
+ }
+
+ return rc;
+}
+
+
+static struct msm_sensor_fn_t sp1628_sensor_func_tbl = {
+ .sensor_config = sp1628_sensor_config,
+ .sensor_power_up = msm_sensor_power_up,
+ .sensor_power_down = msm_sensor_power_down,
+ .sensor_match_id = sp1628_match_id,
+};
+
+static struct msm_sensor_ctrl_t sp1628_s_ctrl = {
+ .sensor_i2c_client = &sp1628_sensor_i2c_client,
+ .power_setting_array.power_setting = sp1628_power_setting,
+ .power_setting_array.size = ARRAY_SIZE(sp1628_power_setting),
+ .msm_sensor_mutex = &sp1628_mut,
+ .sensor_v4l2_subdev_info = sp1628_subdev_info,
+ .sensor_v4l2_subdev_info_size = ARRAY_SIZE(sp1628_subdev_info),
+ .func_tbl = &sp1628_sensor_func_tbl,
+};
+
+module_init(sp1628_init_module);
+module_exit(sp1628_exit_module);
+MODULE_DESCRIPTION("Aptina 1.26MP YUV sensor driver");
+MODULE_LICENSE("GPL v2");
diff --git a/drivers/media/platform/msm/dvb/demux/mpq_dmx_plugin_common.c b/drivers/media/platform/msm/dvb/demux/mpq_dmx_plugin_common.c
index a63fccf..85fdff6 100644
--- a/drivers/media/platform/msm/dvb/demux/mpq_dmx_plugin_common.c
+++ b/drivers/media/platform/msm/dvb/demux/mpq_dmx_plugin_common.c
@@ -14,11 +14,12 @@
#include <linux/module.h>
#include <linux/vmalloc.h>
#include <linux/file.h>
+#include <linux/scatterlist.h>
#include "mpq_dvb_debug.h"
#include "mpq_dmx_plugin_common.h"
#include "mpq_sdmx.h"
-#define SDMX_MAJOR_VERSION_MATCH (3)
+#define SDMX_MAJOR_VERSION_MATCH (4)
#define TS_PACKET_HEADER_LENGTH (4)
@@ -3357,7 +3358,6 @@
if (status != SDMX_SUCCESS) {
MPQ_DVB_ERR_PRINT("%s: sdmx_close_session failed %d\n",
__func__, status);
- return -EINVAL;
}
mpq_demux->sdmx_eos = 0;
mpq_demux->sdmx_session_handle = SDMX_INVALID_SESSION_HANDLE;
@@ -3369,14 +3369,64 @@
}
EXPORT_SYMBOL(mpq_sdmx_close_session);
+static int mpq_sdmx_get_buffer_chunks(struct mpq_demux *mpq_demux,
+ struct ion_handle *buff_handle,
+ u32 actual_buff_size,
+ struct sdmx_buff_descr buff_chunks[SDMX_MAX_PHYSICAL_CHUNKS])
+{
+ int i;
+ struct sg_table *sg_ptr;
+ struct scatterlist *sg;
+ u32 chunk_size;
+
+ memset(buff_chunks, 0,
+ sizeof(struct sdmx_buff_descr) * SDMX_MAX_PHYSICAL_CHUNKS);
+
+ sg_ptr = ion_sg_table(mpq_demux->ion_client, buff_handle);
+ if (sg_ptr == NULL) {
+ MPQ_DVB_ERR_PRINT("%s: ion_sg_table failed\n",
+ __func__);
+ return -EINVAL;
+ }
+
+ if (sg_ptr->nents == 0) {
+ MPQ_DVB_ERR_PRINT("%s: num of scattered entries is 0\n",
+ __func__);
+ return -EINVAL;
+ }
+
+ if (sg_ptr->nents > SDMX_MAX_PHYSICAL_CHUNKS) {
+ MPQ_DVB_ERR_PRINT(
+ "%s: num of scattered entries %d greater than max supported %d\n",
+ __func__, sg_ptr->nents, SDMX_MAX_PHYSICAL_CHUNKS);
+ return -EINVAL;
+ }
+
+ sg = sg_ptr->sgl;
+ for (i = 0; i < sg_ptr->nents; i++) {
+ buff_chunks[i].base_addr =
+ (void *)sg_dma_address(sg);
+ if (sg->length > actual_buff_size)
+ chunk_size = actual_buff_size;
+ else
+ chunk_size = sg->length;
+
+ buff_chunks[i].size = chunk_size;
+ sg = sg_next(sg);
+ actual_buff_size -= chunk_size;
+ }
+
+ return 0;
+}
+
static int mpq_sdmx_init_data_buffer(struct mpq_demux *mpq_demux,
struct mpq_feed *feed, u32 *num_buffers,
- struct sdmx_buff_descr *buf_desc, enum sdmx_buf_mode *buf_mode)
+ struct sdmx_data_buff_descr buf_desc[DMX_MAX_DECODER_BUFFER_NUM],
+ enum sdmx_buf_mode *buf_mode)
{
struct dvb_demux_feed *dvbdmx_feed = feed->dvb_demux_feed;
struct dvb_ringbuffer *buffer;
struct mpq_video_feed_info *feed_data = &feed->video_info;
- ion_phys_addr_t addr;
struct ion_handle *sdmx_buff;
int ret;
int i;
@@ -3389,57 +3439,56 @@
*num_buffers = feed_data->buffer_desc.decoder_buffers_num;
for (i = 0; i < *num_buffers; i++) {
- ret = ion_phys(mpq_demux->ion_client,
- feed_data->buffer_desc.ion_handle[i],
- &addr, &buf_desc[i].size);
+ buf_desc[i].length =
+ feed_data->buffer_desc.desc[i].size;
+
+ ret = mpq_sdmx_get_buffer_chunks(mpq_demux,
+ feed_data->buffer_desc.ion_handle[i],
+ buf_desc[i].length,
+ buf_desc[i].buff_chunks);
if (ret) {
MPQ_DVB_ERR_PRINT(
- "%s: FAILED to get physical buffer address, ret=%d\n",
- __func__, ret);
- goto end;
+ "%s: mpq_sdmx_get_buffer_chunks failed\n",
+ __func__);
+ return ret;
}
- buf_desc[i].base_addr = (void *)addr;
- buf_desc[i].size = feed_data->buffer_desc.desc[i].size;
- }
- } else {
- *num_buffers = 1;
- if (dvb_dmx_is_sec_feed(dvbdmx_feed) ||
- dvb_dmx_is_pcr_feed(dvbdmx_feed)) {
- buffer = &feed->sdmx_buf;
- sdmx_buff = feed->sdmx_buf_handle;
- } else {
- buffer = (struct dvb_ringbuffer *)
- dvbdmx_feed->feed.ts.buffer.ringbuff;
- sdmx_buff = dvbdmx_feed->feed.ts.buffer.priv_handle;
}
- if (sdmx_buff == NULL) {
- MPQ_DVB_ERR_PRINT(
- "%s: Invalid buffer allocation\n",
- __func__);
- return -ENOMEM;
- }
-
- ret = ion_phys(mpq_demux->ion_client, sdmx_buff, &addr,
- &buf_desc[0].size);
- if (ret) {
- MPQ_DVB_ERR_PRINT(
- "%s: FAILED to get physical buffer address, ret=%d\n",
- __func__, ret);
- goto end;
- } else {
- buf_desc[0].size = buffer->size;
- buf_desc[0].base_addr = (void *)addr;
- }
-
+ return 0;
}
+
+ *num_buffers = 1;
+ if (dvb_dmx_is_sec_feed(dvbdmx_feed) ||
+ dvb_dmx_is_pcr_feed(dvbdmx_feed)) {
+ buffer = &feed->sdmx_buf;
+ sdmx_buff = feed->sdmx_buf_handle;
+ } else {
+ buffer = (struct dvb_ringbuffer *)
+ dvbdmx_feed->feed.ts.buffer.ringbuff;
+ sdmx_buff = dvbdmx_feed->feed.ts.buffer.priv_handle;
+ }
+
+ if (sdmx_buff == NULL) {
+ MPQ_DVB_ERR_PRINT(
+ "%s: Invalid buffer allocation\n",
+ __func__);
+ return -ENOMEM;
+ }
+
+ buf_desc[0].length = buffer->size;
+ ret = mpq_sdmx_get_buffer_chunks(mpq_demux, sdmx_buff,
+ buf_desc[0].length,
+ buf_desc[0].buff_chunks);
+ if (ret) {
+ MPQ_DVB_ERR_PRINT(
+ "%s: mpq_sdmx_get_buffer_chunks failed\n",
+ __func__);
+ return ret;
+ }
+
return 0;
-
-end:
- return ret;
}
-
static int mpq_sdmx_filter_setup(struct mpq_demux *mpq_demux,
struct dvb_demux_feed *dvbdmx_feed)
{
@@ -3447,7 +3496,7 @@
struct mpq_feed *feed;
struct mpq_feed *main_rec_feed;
struct sdmx_buff_descr metadata_buff_desc;
- struct sdmx_buff_descr data_buff_desc[DMX_MAX_DECODER_BUFFER_NUM];
+ struct sdmx_data_buff_descr *data_buff_desc = NULL;
u32 data_buf_num = DMX_MAX_DECODER_BUFFER_NUM;
enum sdmx_buf_mode buf_mode;
enum sdmx_raw_out_format ts_out_format = SDMX_188_OUTPUT;
@@ -3490,6 +3539,15 @@
MPQ_DVB_DBG_PRINT("%s: SDMX_PES_FILTER\n", __func__);
}
+ data_buff_desc = vmalloc(
+ sizeof(*data_buff_desc)*DMX_MAX_DECODER_BUFFER_NUM);
+ if (!data_buff_desc) {
+ MPQ_DVB_ERR_PRINT(
+ "%s: failed to allocate memory for data buffer\n",
+ __func__);
+ return -ENOMEM;
+ }
+
/*
* Recording feed sdmx filter handle lookup:
* In case this is a recording filter with multiple feeds,
@@ -3530,7 +3588,7 @@
MPQ_DVB_ERR_PRINT(
"%s: Failed to initialize metadata buffer. ret=%d\n",
__func__, ret);
- goto end;
+ goto sdmx_filter_setup_failed;
}
}
@@ -3541,7 +3599,7 @@
"%s: Failed to initialize data buffer. ret=%d\n",
__func__, ret);
mpq_sdmx_terminate_metadata_buffer(feed);
- goto end;
+ goto sdmx_filter_setup_failed;
}
ret = sdmx_add_filter(mpq_demux->sdmx_session_handle,
dvbdmx_feed->pid,
@@ -3559,14 +3617,14 @@
__func__, ret);
ret = -ENODEV;
mpq_sdmx_terminate_metadata_buffer(feed);
- goto end;
+ goto sdmx_filter_setup_failed;
}
MPQ_DVB_DBG_PRINT(
"%s: feed=0x%p, filter pid=%d, handle=%d, data buffer(s)=%d, size=%d\n",
__func__, feed, dvbdmx_feed->pid,
feed->sdmx_filter_handle,
- data_buf_num, data_buff_desc[0].size);
+ data_buf_num, data_buff_desc[0].length);
mpq_demux->sdmx_filter_count++;
} else {
@@ -3583,7 +3641,7 @@
"%s: FAILED to add raw pid, ret=%d\n",
__func__, ret);
ret = -ENODEV;
- goto end;
+ goto sdmx_filter_setup_failed;
}
}
@@ -3605,12 +3663,14 @@
MPQ_DVB_ERR_PRINT(
"%s: FAILED to set key ladder, ret=%d\n",
__func__, ret);
- ret = -ENODEV;
- goto end;
}
}
-end:
+ vfree(data_buff_desc);
+ return 0;
+
+sdmx_filter_setup_failed:
+ vfree(data_buff_desc);
return ret;
}
diff --git a/drivers/media/platform/msm/dvb/demux/mpq_dmx_plugin_tsif.c b/drivers/media/platform/msm/dvb/demux/mpq_dmx_plugin_tsif.c
index 29369de..ef3f57f 100644
--- a/drivers/media/platform/msm/dvb/demux/mpq_dmx_plugin_tsif.c
+++ b/drivers/media/platform/msm/dvb/demux/mpq_dmx_plugin_tsif.c
@@ -548,7 +548,8 @@
return -EINVAL;
}
- caps->caps = DMX_CAP_PULL_MODE | DMX_CAP_VIDEO_DECODER_DATA;
+ caps->caps = DMX_CAP_PULL_MODE | DMX_CAP_VIDEO_DECODER_DATA |
+ DMX_CAP_TS_INSERTION | DMX_CAP_VIDEO_INDEXING;
caps->num_decoders = MPQ_ADAPTER_MAX_NUM_OF_INTERFACES;
caps->num_demux_devices = CONFIG_DVB_MPQ_NUM_DMX_DEVICES;
caps->num_pid_filters = dvb_demux->feednum;
@@ -599,7 +600,6 @@
caps->playback_192_tsp.max_size = 0xFFFFFFFF;
caps->playback_192_tsp.size_alignment = 0;
caps->decoder.flags =
- DMX_BUFFER_CONTIGUOUS_MEM |
DMX_BUFFER_SECURED_IF_DECRYPTED |
DMX_BUFFER_EXTERNAL_SUPPORT |
DMX_BUFFER_INTERNAL_SUPPORT |
@@ -700,11 +700,7 @@
/* Now initailize the dmx-dev object */
mpq_demux->dmxdev.filternum = MPQ_MAX_DMX_FILES;
mpq_demux->dmxdev.demux = &mpq_demux->demux.dmx;
- mpq_demux->dmxdev.capabilities =
- DMXDEV_CAP_DUPLEX |
- DMXDEV_CAP_PULL_MODE |
- DMXDEV_CAP_INDEXING |
- DMXDEV_CAP_TS_INSERTION;
+ mpq_demux->dmxdev.capabilities = DMXDEV_CAP_DUPLEX;
mpq_demux->dmxdev.demux->set_source = mpq_dmx_set_source;
mpq_demux->dmxdev.demux->get_stc = mpq_tsif_dmx_get_stc;
diff --git a/drivers/media/platform/msm/dvb/demux/mpq_dmx_plugin_tspp_v1.c b/drivers/media/platform/msm/dvb/demux/mpq_dmx_plugin_tspp_v1.c
index a2ce428..8e628f6 100644
--- a/drivers/media/platform/msm/dvb/demux/mpq_dmx_plugin_tspp_v1.c
+++ b/drivers/media/platform/msm/dvb/demux/mpq_dmx_plugin_tspp_v1.c
@@ -1614,7 +1614,8 @@
return -EINVAL;
}
- caps->caps = DMX_CAP_PULL_MODE | DMX_CAP_VIDEO_DECODER_DATA;
+ caps->caps = DMX_CAP_PULL_MODE | DMX_CAP_VIDEO_DECODER_DATA |
+ DMX_CAP_TS_INSERTION | DMX_CAP_VIDEO_INDEXING;
caps->num_decoders = MPQ_ADAPTER_MAX_NUM_OF_INTERFACES;
caps->num_demux_devices = CONFIG_DVB_MPQ_NUM_DMX_DEVICES;
caps->num_pid_filters = TSPP_MAX_PID_FILTER_NUM;
@@ -1623,9 +1624,9 @@
caps->section_filter_length = DMX_FILTER_SIZE;
caps->num_demod_inputs = TSIF_COUNT;
caps->num_memory_inputs = CONFIG_DVB_MPQ_NUM_DMX_DEVICES;
- caps->max_bitrate = 144;
- caps->demod_input_max_bitrate = 72;
- caps->memory_input_max_bitrate = 72;
+ caps->max_bitrate = 192;
+ caps->demod_input_max_bitrate = 96;
+ caps->memory_input_max_bitrate = 96;
/* Buffer requirements */
caps->section.flags =
@@ -1665,7 +1666,6 @@
caps->playback_192_tsp.max_size = 0xFFFFFFFF;
caps->playback_192_tsp.size_alignment = 0;
caps->decoder.flags =
- DMX_BUFFER_CONTIGUOUS_MEM |
DMX_BUFFER_SECURED_IF_DECRYPTED |
DMX_BUFFER_EXTERNAL_SUPPORT |
DMX_BUFFER_INTERNAL_SUPPORT |
@@ -1758,11 +1758,7 @@
/* Now initailize the dmx-dev object */
mpq_demux->dmxdev.filternum = MPQ_MAX_DMX_FILES;
mpq_demux->dmxdev.demux = &mpq_demux->demux.dmx;
- mpq_demux->dmxdev.capabilities =
- DMXDEV_CAP_DUPLEX |
- DMXDEV_CAP_PULL_MODE |
- DMXDEV_CAP_INDEXING |
- DMXDEV_CAP_TS_INSERTION;
+ mpq_demux->dmxdev.capabilities = DMXDEV_CAP_DUPLEX;
mpq_demux->dmxdev.demux->set_source = mpq_dmx_set_source;
mpq_demux->dmxdev.demux->get_stc = mpq_tspp_dmx_get_stc;
diff --git a/drivers/media/platform/msm/dvb/demux/mpq_dmx_plugin_tspp_v2.c b/drivers/media/platform/msm/dvb/demux/mpq_dmx_plugin_tspp_v2.c
index 60e3cb4..1ab9da1 100644
--- a/drivers/media/platform/msm/dvb/demux/mpq_dmx_plugin_tspp_v2.c
+++ b/drivers/media/platform/msm/dvb/demux/mpq_dmx_plugin_tspp_v2.c
@@ -73,7 +73,7 @@
}
caps->caps = DMX_CAP_PULL_MODE | DMX_CAP_VIDEO_INDEXING |
- DMX_CAP_VIDEO_DECODER_DATA;
+ DMX_CAP_VIDEO_DECODER_DATA | DMX_CAP_TS_INSERTION;
caps->num_decoders = MPQ_ADAPTER_MAX_NUM_OF_INTERFACES;
caps->num_demux_devices = CONFIG_DVB_MPQ_NUM_DMX_DEVICES;
caps->num_pid_filters = TSPP_MAX_PID_FILTER_NUM;
@@ -140,11 +140,7 @@
/* Now initailize the dmx-dev object */
mpq_demux->dmxdev.filternum = MPQ_MAX_DMX_FILES;
mpq_demux->dmxdev.demux = &mpq_demux->demux.dmx;
- mpq_demux->dmxdev.capabilities =
- DMXDEV_CAP_DUPLEX |
- DMXDEV_CAP_PULL_MODE |
- DMXDEV_CAP_INDEXING |
- DMXDEV_CAP_TS_INSERTION;
+ mpq_demux->dmxdev.capabilities = DMXDEV_CAP_DUPLEX;
mpq_demux->dmxdev.demux->set_source = mpq_dmx_set_source;
mpq_demux->dmxdev.demux->get_caps = mpq_tspp_dmx_get_caps;
diff --git a/drivers/media/platform/msm/dvb/demux/mpq_sdmx.c b/drivers/media/platform/msm/dvb/demux/mpq_sdmx.c
index 14d3a39..888bbbf 100644
--- a/drivers/media/platform/msm/dvb/demux/mpq_sdmx.c
+++ b/drivers/media/platform/msm/dvb/demux/mpq_sdmx.c
@@ -115,7 +115,7 @@
enum sdmx_raw_out_format ts_out_format;
u32 flags;
u32 num_data_bufs;
- struct sdmx_buff_descr data_bufs[];
+ struct sdmx_data_buff_descr data_bufs[];
};
struct sdmx_add_filt_rsp {
@@ -478,7 +478,7 @@
struct sdmx_buff_descr *meta_data_buf,
enum sdmx_buf_mode d_buf_mode,
u32 num_data_bufs,
- struct sdmx_buff_descr *data_bufs,
+ struct sdmx_data_buff_descr *data_bufs,
int *filter_handle,
enum sdmx_raw_out_format ts_out_format,
u32 flags)
@@ -493,7 +493,7 @@
return SDMX_STATUS_INVALID_INPUT_PARAMS;
cmd_len = sizeof(struct sdmx_add_filt_req)
- + num_data_bufs * sizeof(struct sdmx_buff_descr);
+ + num_data_bufs * sizeof(struct sdmx_data_buff_descr);
rsp_len = sizeof(struct sdmx_add_filt_rsp);
/* Will be later overridden by SDMX response */
@@ -523,7 +523,7 @@
cmd->buffer_mode = d_buf_mode;
cmd->num_data_bufs = num_data_bufs;
memcpy(cmd->data_bufs, data_bufs,
- num_data_bufs * sizeof(struct sdmx_buff_descr));
+ num_data_bufs * sizeof(struct sdmx_data_buff_descr));
/* Issue QSEECom command */
res = qseecom_send_command(sdmx_qseecom_handles[session_handle],
diff --git a/drivers/media/platform/msm/dvb/demux/mpq_sdmx.h b/drivers/media/platform/msm/dvb/demux/mpq_sdmx.h
index 6b669e4..fadb6b2 100644
--- a/drivers/media/platform/msm/dvb/demux/mpq_sdmx.h
+++ b/drivers/media/platform/msm/dvb/demux/mpq_sdmx.h
@@ -19,6 +19,8 @@
#define SDMX_MAX_SESSIONS (4)
#define SDMX_LOOPBACK_PID (0x2000)
+#define SDMX_MAX_PHYSICAL_CHUNKS (10)
+
/* Filter-level error indicators */
#define SDMX_FILTER_SUCCESS (0)
#define SDMX_FILTER_ERR_MD_BUF_FULL BIT(0)
@@ -164,10 +166,18 @@
/* Physical address where buffer starts */
void *base_addr;
- /* Total size of buffer */
+ /* Size of buffer */
u32 size;
};
+struct sdmx_data_buff_descr {
+ /* Physical chunks of the buffer */
+ struct sdmx_buff_descr buff_chunks[SDMX_MAX_PHYSICAL_CHUNKS];
+
+ /* Length of buffer */
+ u32 length;
+};
+
/*
* Data payload residing in the data buffers is described using this meta-data
* header. The meta data header specifies where the payload is located in the
@@ -231,7 +241,7 @@
int sdmx_add_filter(int session_handle, u16 pid, enum sdmx_filter filter_type,
struct sdmx_buff_descr *meta_data_buf, enum sdmx_buf_mode data_buf_mode,
- u32 num_data_bufs, struct sdmx_buff_descr *data_bufs,
+ u32 num_data_bufs, struct sdmx_data_buff_descr *data_bufs,
int *filter_handle, enum sdmx_raw_out_format ts_out_format, u32 flags);
int sdmx_remove_filter(int session_handle, int filter_handle);
diff --git a/drivers/media/platform/msm/vidc/msm_vdec.c b/drivers/media/platform/msm/vidc/msm_vdec.c
index bead12b..7547464 100644
--- a/drivers/media/platform/msm/vidc/msm_vdec.c
+++ b/drivers/media/platform/msm/vidc/msm_vdec.c
@@ -69,6 +69,12 @@
"Extradata mpeg2 seqdisp",
};
+static const char *const perf_level[] = {
+ "Nominal",
+ "Performance",
+ "Turbo"
+};
+
static struct msm_vidc_ctrl msm_vdec_ctrls[] = {
{
.id = V4L2_CID_MPEG_VIDC_VIDEO_STREAM_FORMAT,
@@ -230,6 +236,19 @@
.qmenu = mpeg_video_vidc_extradata,
.step = 0,
},
+ {
+ .id = V4L2_CID_MPEG_VIDC_SET_PERF_LEVEL,
+ .name = "Encoder Performance Level",
+ .type = V4L2_CTRL_TYPE_MENU,
+ .minimum = V4L2_CID_MPEG_VIDC_PERF_LEVEL_NOMINAL,
+ .maximum = V4L2_CID_MPEG_VIDC_PERF_LEVEL_TURBO,
+ .default_value = V4L2_CID_MPEG_VIDC_PERF_LEVEL_NOMINAL,
+ .menu_skip_mask = ~(
+ (1 << V4L2_CID_MPEG_VIDC_PERF_LEVEL_NOMINAL) |
+ (1 << V4L2_CID_MPEG_VIDC_PERF_LEVEL_TURBO)),
+ .qmenu = perf_level,
+ .step = 0,
+ },
};
#define NUM_CTRLS ARRAY_SIZE(msm_vdec_ctrls)
@@ -700,7 +719,7 @@
int msm_vdec_s_parm(struct msm_vidc_inst *inst, struct v4l2_streamparm *a)
{
u64 us_per_frame = 0;
- int rc = 0, fps = 0, rem = 0;
+ int rc = 0, fps = 0;
if (a->parm.output.timeperframe.denominator) {
switch (a->type) {
case V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE:
@@ -726,11 +745,12 @@
}
fps = USEC_PER_SEC;
- rem = do_div(fps, us_per_frame);
- if (rem) {
- /* Effectively fps = ceil((float)USEC_PER_SEC/us_per_frame) */
- fps++;
- }
+ do_div(fps, us_per_frame);
+
+ if ((fps % 15 == 14) || (fps % 24 == 23))
+ fps = fps + 1;
+ else if ((fps % 24 == 1) || (fps % 15 == 1))
+ fps = fps - 1;
if (inst->prop.fps != fps) {
dprintk(VIDC_PROF, "reported fps changed for %p: %d->%d\n",
@@ -1142,7 +1162,6 @@
int msm_vdec_cmd(struct msm_vidc_inst *inst, struct v4l2_decoder_cmd *dec)
{
int rc = 0;
- struct v4l2_event dqevent = {0};
struct msm_vidc_core *core = inst->core;
if (!dec || !inst || !inst->core) {
@@ -1174,16 +1193,15 @@
dprintk(VIDC_ERR,
"Core %p in bad state, Sending CLOSE event\n",
core);
- dqevent.type = V4L2_EVENT_MSM_VIDC_CLOSE_DONE;
- v4l2_event_queue_fh(&inst->event_handler, &dqevent);
+ msm_vidc_queue_v4l2_event(inst,
+ V4L2_EVENT_MSM_VIDC_CLOSE_DONE);
goto exit;
}
rc = msm_comm_try_state(inst, MSM_VIDC_CLOSE_DONE);
/* Clients rely on this event for joining poll thread.
* This event should be returned even if firmware has
* failed to respond */
- dqevent.type = V4L2_EVENT_MSM_VIDC_CLOSE_DONE;
- v4l2_event_queue_fh(&inst->event_handler, &dqevent);
+ msm_vidc_queue_v4l2_event(inst, V4L2_EVENT_MSM_VIDC_CLOSE_DONE);
break;
default:
dprintk(VIDC_ERR, "Unknown Decoder Command\n");
@@ -1233,14 +1251,12 @@
static int try_set_ctrl(struct msm_vidc_inst *inst, struct v4l2_ctrl *ctrl)
{
int rc = 0;
- struct v4l2_control control;
struct hal_nal_stream_format_supported stream_format;
struct hal_enable_picture enable_picture;
struct hal_enable hal_property;/*, prop;*/
- u32 control_idx = 0;
enum hal_property property_id = 0;
u32 property_val = 0;
- void *pdata;
+ void *pdata = NULL;
struct hfi_device *hdev;
if (!inst || !inst->core || !inst->core->device) {
@@ -1304,8 +1320,9 @@
pdata = &hal_property;
break;
case V4L2_CID_MPEG_VIDC_VIDEO_SECURE:
- inst->mode = VIDC_SECURE;
- dprintk(VIDC_DBG, "Setting secure mode to :%d\n", inst->mode);
+ inst->flags |= VIDC_SECURE;
+ dprintk(VIDC_DBG, "Setting secure mode to: %d\n",
+ !!(inst->flags & VIDC_SECURE));
break;
case V4L2_CID_MPEG_VIDC_VIDEO_EXTRADATA:
{
@@ -1316,16 +1333,30 @@
pdata = &extra;
break;
}
+ case V4L2_CID_MPEG_VIDC_SET_PERF_LEVEL:
+ switch (ctrl->val) {
+ case V4L2_CID_MPEG_VIDC_PERF_LEVEL_NOMINAL:
+ inst->flags &= ~VIDC_TURBO;
+ break;
+ case V4L2_CID_MPEG_VIDC_PERF_LEVEL_TURBO:
+ inst->flags |= VIDC_TURBO;
+ break;
+ default:
+ dprintk(VIDC_ERR, "Perf mode %x not supported",
+ ctrl->val);
+ rc = -ENOTSUPP;
+ break;
+ }
+
+ break;
default:
break;
}
if (!rc && property_id) {
dprintk(VIDC_DBG,
- "Control: HAL property=%d,ctrl_id=%d,ctrl_value=%d\n",
- property_id,
- msm_vdec_ctrls[control_idx].id,
- control.value);
+ "Control: HAL property = %d, ctrl_id = 0x%x, ctrl_value = %d\n",
+ property_id, ctrl->id, ctrl->val);
rc = call_hfi_op(hdev, session_set_property, (void *)
inst->session, property_id, pdata);
}
diff --git a/drivers/media/platform/msm/vidc/msm_venc.c b/drivers/media/platform/msm/vidc/msm_venc.c
index 7a1fd81..46da496 100644
--- a/drivers/media/platform/msm/vidc/msm_venc.c
+++ b/drivers/media/platform/msm/vidc/msm_venc.c
@@ -21,7 +21,7 @@
#define MSM_VENC_DVC_NAME "msm_venc_8974"
#define MIN_NUM_OUTPUT_BUFFERS 4
#define MIN_NUM_CAPTURE_BUFFERS 4
-#define MIN_BIT_RATE 64000
+#define MIN_BIT_RATE 32000
#define MAX_BIT_RATE 160000000
#define DEFAULT_BIT_RATE 64000
#define BIT_RATE_STEP 100
@@ -108,6 +108,12 @@
"Extradata aspect ratio",
};
+static const char *const perf_level[] = {
+ "Nominal",
+ "Performance",
+ "Turbo"
+};
+
enum msm_venc_ctrl_cluster {
MSM_VENC_CTRL_CLUSTER_QP = 1 << 0,
MSM_VENC_CTRL_CLUSTER_INTRA_PERIOD = 1 << 1,
@@ -298,7 +304,7 @@
.name = "H264 Profile",
.type = V4L2_CTRL_TYPE_MENU,
.minimum = V4L2_MPEG_VIDEO_H264_PROFILE_BASELINE,
- .maximum = V4L2_MPEG_VIDEO_H264_PROFILE_MULTIVIEW_HIGH,
+ .maximum = V4L2_MPEG_VIDEO_H264_PROFILE_CONSTRAINED_HIGH,
.default_value = V4L2_MPEG_VIDEO_H264_PROFILE_BASELINE,
.step = 1,
.menu_skip_mask = 0,
@@ -664,6 +670,19 @@
.default_value =
V4L2_MPEG_VIDC_VIDEO_H264_AU_DELIMITER_DISABLED,
},
+ {
+ .id = V4L2_CID_MPEG_VIDC_SET_PERF_LEVEL,
+ .name = "Encoder Performance Level",
+ .type = V4L2_CTRL_TYPE_MENU,
+ .minimum = V4L2_CID_MPEG_VIDC_PERF_LEVEL_NOMINAL,
+ .maximum = V4L2_CID_MPEG_VIDC_PERF_LEVEL_TURBO,
+ .default_value = V4L2_CID_MPEG_VIDC_PERF_LEVEL_NOMINAL,
+ .menu_skip_mask = ~(
+ (1 << V4L2_CID_MPEG_VIDC_PERF_LEVEL_NOMINAL) |
+ (1 << V4L2_CID_MPEG_VIDC_PERF_LEVEL_TURBO)),
+ .qmenu = perf_level,
+ .step = 0,
+ },
};
#define NUM_CTRLS ARRAY_SIZE(msm_venc_ctrls)
@@ -1033,6 +1052,8 @@
return HAL_H264_PROFILE_HIGH422;
case V4L2_MPEG_VIDEO_H264_PROFILE_HIGH_444_PREDICTIVE:
return HAL_H264_PROFILE_HIGH444;
+ case V4L2_MPEG_VIDEO_H264_PROFILE_CONSTRAINED_HIGH:
+ return HAL_H264_PROFILE_CONSTRAINED_HIGH;
default:
goto unknown_value;
}
@@ -1702,8 +1723,9 @@
pdata = &enable;
break;
case V4L2_CID_MPEG_VIDC_VIDEO_SECURE:
- inst->mode = VIDC_SECURE;
- dprintk(VIDC_INFO, "Setting secure mode to :%d\n", inst->mode);
+ inst->flags |= VIDC_SECURE;
+ dprintk(VIDC_INFO, "Setting secure mode to: %d\n",
+ !!(inst->flags & VIDC_SECURE));
break;
case V4L2_CID_MPEG_VIDC_VIDEO_EXTRADATA:
{
@@ -1762,6 +1784,22 @@
pdata = &enable;
break;
+ case V4L2_CID_MPEG_VIDC_SET_PERF_LEVEL:
+ switch (ctrl->val) {
+ case V4L2_CID_MPEG_VIDC_PERF_LEVEL_NOMINAL:
+ inst->flags &= ~VIDC_TURBO;
+ break;
+ case V4L2_CID_MPEG_VIDC_PERF_LEVEL_TURBO:
+ inst->flags |= VIDC_TURBO;
+ break;
+ default:
+ dprintk(VIDC_ERR, "Perf mode %x not supported",
+ ctrl->val);
+ rc = -ENOTSUPP;
+ break;
+ }
+
+ break;
default:
rc = -ENOTSUPP;
break;
@@ -1855,7 +1893,6 @@
int msm_venc_cmd(struct msm_vidc_inst *inst, struct v4l2_encoder_cmd *enc)
{
int rc = 0;
- struct v4l2_event dqevent = {0};
struct msm_vidc_core *core;
core = inst->core;
switch (enc->cmd) {
@@ -1865,8 +1902,8 @@
case V4L2_ENC_CMD_STOP:
if (inst->state == MSM_VIDC_CORE_INVALID ||
core->state == VIDC_CORE_INVALID) {
- dqevent.type = V4L2_EVENT_MSM_VIDC_CLOSE_DONE;
- v4l2_event_queue_fh(&inst->event_handler, &dqevent);
+ msm_vidc_queue_v4l2_event(inst,
+ V4L2_EVENT_MSM_VIDC_CLOSE_DONE);
return rc;
}
rc = msm_comm_release_scratch_buffers(inst);
@@ -1881,8 +1918,7 @@
/* Clients rely on this event for joining poll thread.
* This event should be returned even if firmware has
* failed to respond */
- dqevent.type = V4L2_EVENT_MSM_VIDC_CLOSE_DONE;
- v4l2_event_queue_fh(&inst->event_handler, &dqevent);
+ msm_vidc_queue_v4l2_event(inst, V4L2_EVENT_MSM_VIDC_CLOSE_DONE);
break;
}
if (rc)
@@ -1943,7 +1979,7 @@
{
u32 property_id = 0, us_per_frame = 0;
void *pdata;
- int rc = 0, fps = 0, rem = 0;
+ int rc = 0, fps = 0;
struct hal_frame_rate frame_rate;
struct hfi_device *hdev;
@@ -1980,11 +2016,12 @@
}
fps = USEC_PER_SEC;
- rem = do_div(fps, us_per_frame);
- if (rem) {
- /* Effectively fps = ceil((float)USEC_PER_SEC/us_per_frame) */
- fps++;
- }
+ do_div(fps, us_per_frame);
+
+ if ((fps % 15 == 14) || (fps % 24 == 23))
+ fps = fps + 1;
+ else if ((fps % 24 == 1) || (fps % 15 == 1))
+ fps = fps - 1;
if (inst->prop.fps != fps) {
dprintk(VIDC_PROF, "reported fps changed for %p: %d->%d\n",
diff --git a/drivers/media/platform/msm/vidc/msm_vidc_common.c b/drivers/media/platform/msm/vidc/msm_vidc_common.c
index 002363e..77f838c 100644
--- a/drivers/media/platform/msm/vidc/msm_vidc_common.c
+++ b/drivers/media/platform/msm/vidc/msm_vidc_common.c
@@ -46,6 +46,28 @@
u32 __mbs = (__h >> 4) * (__w >> 4);\
__mbs;\
})
+static bool is_turbo_requested(struct msm_vidc_core *core,
+ enum session_type type)
+{
+ struct msm_vidc_inst *inst = NULL;
+
+ list_for_each_entry(inst, &core->instances, list) {
+ bool wants_turbo = false;
+
+ mutex_lock(&inst->lock);
+ if (inst->session_type == type &&
+ inst->state >= MSM_VIDC_OPEN_DONE &&
+ inst->state < MSM_VIDC_STOP_DONE) {
+ wants_turbo = inst->flags & VIDC_TURBO;
+ }
+ mutex_unlock(&inst->lock);
+
+ if (wants_turbo)
+ return true;
+ }
+
+ return false;
+}
static int msm_comm_get_load(struct msm_vidc_core *core,
enum session_type type)
@@ -87,7 +109,10 @@
return -EINVAL;
}
- load = msm_comm_get_load(core, type);
+ if (is_turbo_requested(core, type))
+ load = core->resources.max_load;
+ else
+ load = msm_comm_get_load(core, type);
rc = call_hfi_op(hdev, scale_bus, hdev->hfi_device_data,
load, type, mtype);
@@ -351,7 +376,7 @@
return rc;
}
-static void queue_v4l2_event(struct msm_vidc_inst *inst, int event_type)
+void msm_vidc_queue_v4l2_event(struct msm_vidc_inst *inst, int event_type)
{
struct v4l2_event event = {.id = 0, .type = event_type};
v4l2_event_queue_fh(&inst->event_handler, &event);
@@ -367,7 +392,7 @@
mutex_lock(&inst->lock);
inst->session = NULL;
inst->state = MSM_VIDC_CORE_INVALID;
- queue_v4l2_event(inst, V4L2_EVENT_MSM_VIDC_SYS_ERROR);
+ msm_vidc_queue_v4l2_event(inst, V4L2_EVENT_MSM_VIDC_SYS_ERROR);
mutex_unlock(&inst->lock);
}
@@ -443,7 +468,7 @@
}
rc = msm_vidc_check_session_supported(inst);
if (!rc) {
- queue_v4l2_event(inst, event);
+ msm_vidc_queue_v4l2_event(inst, event);
}
return;
@@ -537,7 +562,7 @@
struct msm_vidc_inst *inst;
if (response) {
inst = (struct msm_vidc_inst *)response->session_id;
- queue_v4l2_event(inst, V4L2_EVENT_MSM_VIDC_FLUSH_DONE);
+ msm_vidc_queue_v4l2_event(inst, V4L2_EVENT_MSM_VIDC_FLUSH_DONE);
} else {
dprintk(VIDC_ERR, "Failed to get valid response for flush\n");
}
@@ -555,7 +580,8 @@
mutex_lock(&inst->sync_lock);
inst->state = MSM_VIDC_CORE_INVALID;
mutex_unlock(&inst->sync_lock);
- queue_v4l2_event(inst, V4L2_EVENT_MSM_VIDC_SYS_ERROR);
+ msm_vidc_queue_v4l2_event(inst,
+ V4L2_EVENT_MSM_VIDC_SYS_ERROR);
}
} else {
dprintk(VIDC_ERR,
@@ -594,7 +620,7 @@
}
inst->session = NULL;
mutex_unlock(&inst->lock);
- queue_v4l2_event(inst,
+ msm_vidc_queue_v4l2_event(inst,
V4L2_EVENT_MSM_VIDC_SYS_ERROR);
}
} else {
@@ -626,7 +652,8 @@
mutex_unlock(&core->lock);
list_for_each_entry(inst, &core->instances, list) {
if (inst) {
- queue_v4l2_event(inst, V4L2_EVENT_MSM_VIDC_SYS_ERROR);
+ msm_vidc_queue_v4l2_event(inst,
+ V4L2_EVENT_MSM_VIDC_SYS_ERROR);
mutex_lock(&inst->lock);
inst->state = MSM_VIDC_CORE_INVALID;
if (inst->core)
@@ -932,8 +959,14 @@
__func__, hdev);
return -EINVAL;
}
- num_mbs_per_sec = msm_comm_get_load(core, MSM_VIDC_ENCODER);
- num_mbs_per_sec += msm_comm_get_load(core, MSM_VIDC_DECODER);
+
+ if (is_turbo_requested(core, MSM_VIDC_ENCODER) ||
+ is_turbo_requested(core, MSM_VIDC_DECODER)) {
+ num_mbs_per_sec = core->resources.max_load;
+ } else {
+ num_mbs_per_sec = msm_comm_get_load(core, MSM_VIDC_ENCODER);
+ num_mbs_per_sec += msm_comm_get_load(core, MSM_VIDC_DECODER);
+ }
dprintk(VIDC_INFO, "num_mbs_per_sec = %d\n", num_mbs_per_sec);
rc = call_hfi_op(hdev, scale_clocks,
@@ -1272,6 +1305,25 @@
return rc;
}
+static void msm_vidc_print_running_insts(struct msm_vidc_core *core)
+{
+ struct msm_vidc_inst *temp;
+ dprintk(VIDC_ERR, "Running instances:\n");
+ dprintk(VIDC_ERR, "%4s|%4s|%4s|%4s\n", "type", "w", "h", "fps");
+ list_for_each_entry(temp, &core->instances, list) {
+ mutex_lock(&temp->lock);
+ if (temp->state >= MSM_VIDC_OPEN_DONE &&
+ temp->state < MSM_VIDC_STOP_DONE) {
+ dprintk(VIDC_ERR, "%4d|%4d|%4d|%4d\n",
+ temp->session_type,
+ temp->prop.width,
+ temp->prop.height,
+ temp->prop.fps);
+ }
+ mutex_unlock(&temp->lock);
+ }
+}
+
static int msm_vidc_load_resources(int flipped_state,
struct msm_vidc_inst *inst)
{
@@ -1294,24 +1346,9 @@
num_mbs_per_sec = msm_comm_get_load(inst->core, MSM_VIDC_DECODER);
num_mbs_per_sec += msm_comm_get_load(inst->core, MSM_VIDC_ENCODER);
if (num_mbs_per_sec > inst->core->resources.max_load) {
- struct msm_vidc_inst *temp;
-
dprintk(VIDC_ERR, "HW is overloaded, needed: %d max: %d\n",
num_mbs_per_sec, inst->core->resources.max_load);
- dprintk(VIDC_ERR, "Running instances:\n");
- dprintk(VIDC_ERR, "%4s|%4s|%4s|%4s\n", "type", "w", "h", "fps");
- list_for_each_entry(temp, &inst->core->instances, list) {
- mutex_lock(&temp->lock);
- if (temp->state >= MSM_VIDC_OPEN_DONE &&
- temp->state < MSM_VIDC_STOP_DONE) {
- dprintk(VIDC_ERR, "%4d|%4d|%4d|%4d\n",
- temp->session_type,
- temp->prop.width,
- temp->prop.height,
- temp->prop.fps);
- }
- mutex_unlock(&temp->lock);
- }
+ msm_vidc_print_running_insts(inst->core);
inst->state = MSM_VIDC_CORE_INVALID;
msm_comm_recover_from_session_error(inst);
return -ENOMEM;
@@ -1542,7 +1579,7 @@
scratch_buf->buffer_count_actual,
scratch_buf->buffer_size);
- if (inst->mode == VIDC_SECURE)
+ if (inst->flags & VIDC_SECURE)
smem_flags |= SMEM_SECURE;
if (scratch_buf->buffer_size) {
@@ -1630,7 +1667,7 @@
return rc;
}
- if (inst->mode == VIDC_SECURE)
+ if (inst->flags & VIDC_SECURE)
smem_flags |= SMEM_SECURE;
if (persist_buf->buffer_size) {
@@ -2243,7 +2280,8 @@
}
}
}
- queue_v4l2_event(inst, V4L2_EVENT_MSM_VIDC_FLUSH_DONE);
+
+ msm_vidc_queue_v4l2_event(inst, V4L2_EVENT_MSM_VIDC_FLUSH_DONE);
return;
}
int msm_comm_flush(struct msm_vidc_inst *inst, u32 flags)
@@ -2445,11 +2483,33 @@
return rc;
}
+static int msm_vidc_load_supported(struct msm_vidc_inst *inst)
+{
+ int num_mbs_per_sec = 0;
+
+ if (inst->state == MSM_VIDC_OPEN_DONE) {
+ num_mbs_per_sec = msm_comm_get_load(inst->core,
+ MSM_VIDC_DECODER);
+ num_mbs_per_sec += msm_comm_get_load(inst->core,
+ MSM_VIDC_ENCODER);
+ if (num_mbs_per_sec > inst->core->resources.max_load) {
+ dprintk(VIDC_ERR,
+ "H/w is overloaded. needed: %d max: %d\n",
+ num_mbs_per_sec,
+ inst->core->resources.max_load);
+ mutex_lock(&inst->sync_lock);
+ msm_vidc_print_running_insts(inst->core);
+ mutex_unlock(&inst->sync_lock);
+ return -EINVAL;
+ }
+ }
+ return 0;
+}
+
int msm_vidc_check_session_supported(struct msm_vidc_inst *inst)
{
struct msm_vidc_core_capability *capability;
int rc = 0;
- struct v4l2_event dqevent;
struct hfi_device *hdev;
if (!inst || !inst->core || !inst->core->device) {
@@ -2459,7 +2519,8 @@
capability = &inst->capability;
hdev = inst->core->device;
- if (inst->capability.capability_set) {
+ rc = msm_vidc_load_supported(inst);
+ if (!rc && inst->capability.capability_set) {
rc = call_hfi_op(hdev, capability_check,
inst->fmts[OUTPUT_PORT]->fourcc,
inst->prop.width, &capability->width.max,
@@ -2478,9 +2539,7 @@
mutex_lock(&inst->sync_lock);
inst->state = MSM_VIDC_CORE_INVALID;
mutex_unlock(&inst->sync_lock);
- dqevent.type = V4L2_EVENT_MSM_VIDC_SYS_ERROR;
- dqevent.id = 0;
- v4l2_event_queue_fh(&inst->event_handler, &dqevent);
+ msm_vidc_queue_v4l2_event(inst, V4L2_EVENT_MSM_VIDC_SYS_ERROR);
wake_up(&inst->kernel_event_queue);
}
return rc;
diff --git a/drivers/media/platform/msm/vidc/msm_vidc_debug.c b/drivers/media/platform/msm/vidc/msm_vidc_debug.c
index ae1e9b7..bea9070 100644
--- a/drivers/media/platform/msm/vidc/msm_vidc_debug.c
+++ b/drivers/media/platform/msm/vidc/msm_vidc_debug.c
@@ -15,7 +15,8 @@
#include "vidc_hfi_api.h"
#define MAX_DBG_BUF_SIZE 4096
-int msm_vidc_debug = 0x3;
+int msm_vidc_debug = VIDC_ERR | VIDC_WARN;
+int msm_vidc_debug_out = VIDC_OUT_PRINTK;
int msm_fw_debug = 0x18;
int msm_fw_debug_mode = 0x1;
int msm_fw_low_power_mode = 0x1;
@@ -171,6 +172,11 @@
dprintk(VIDC_ERR, "debugfs_create_file: fail\n");
goto failed_create_dir;
}
+ if (!debugfs_create_u32("debug_output", S_IRUGO | S_IWUSR,
+ parent, &msm_vidc_debug_out)) {
+ dprintk(VIDC_ERR, "debugfs_create_file: fail\n");
+ goto failed_create_dir;
+ }
failed_create_dir:
return dir;
}
diff --git a/drivers/media/platform/msm/vidc/msm_vidc_debug.h b/drivers/media/platform/msm/vidc/msm_vidc_debug.h
index ea6dd70..5b572c9 100644
--- a/drivers/media/platform/msm/vidc/msm_vidc_debug.h
+++ b/drivers/media/platform/msm/vidc/msm_vidc_debug.h
@@ -31,9 +31,15 @@
VIDC_INFO = 0x0004,
VIDC_DBG = 0x0008,
VIDC_PROF = 0x0010,
+ VIDC_PKT = 0x0020,
VIDC_FW = 0x1000,
};
+enum vidc_msg_out {
+ VIDC_OUT_PRINTK = 0,
+ VIDC_OUT_FTRACE,
+};
+
enum msm_vidc_debugfs_event {
MSM_VIDC_DEBUGFS_EVENT_ETB,
MSM_VIDC_DEBUGFS_EVENT_EBD,
@@ -42,6 +48,7 @@
};
extern int msm_vidc_debug;
+extern int msm_vidc_debug_out;
extern int msm_fw_debug;
extern int msm_fw_debug_mode;
extern int msm_fw_low_power_mode;
@@ -49,11 +56,18 @@
#define dprintk(__level, __fmt, arg...) \
do { \
- if (msm_vidc_debug & __level) \
- printk(KERN_DEBUG VIDC_DBG_TAG \
- __fmt, __level, ## arg); \
+ if (msm_vidc_debug & __level) { \
+ if (msm_vidc_debug_out == VIDC_OUT_PRINTK) { \
+ printk(KERN_DEBUG VIDC_DBG_TAG \
+ __fmt, __level, ## arg); \
+ } else if (msm_vidc_debug_out == VIDC_OUT_FTRACE) { \
+ trace_printk(KERN_DEBUG VIDC_DBG_TAG \
+ __fmt, __level, ## arg); \
+ } \
+ } \
} while (0)
+
struct dentry *msm_vidc_debugfs_init_core(struct msm_vidc_core *core,
struct dentry *parent);
struct dentry *msm_vidc_debugfs_init_inst(struct msm_vidc_inst *inst,
diff --git a/drivers/media/platform/msm/vidc/msm_vidc_internal.h b/drivers/media/platform/msm/vidc/msm_vidc_internal.h
index d9a2332..15f4e3f 100644
--- a/drivers/media/platform/msm/vidc/msm_vidc_internal.h
+++ b/drivers/media/platform/msm/vidc/msm_vidc_internal.h
@@ -168,9 +168,9 @@
int samples;
};
-enum msm_vidc_mode {
- VIDC_NON_SECURE,
- VIDC_SECURE,
+enum msm_vidc_modes {
+ VIDC_SECURE = 1 << 0,
+ VIDC_TURBO = 1 << 1,
};
struct msm_vidc_core_capability {
@@ -225,7 +225,7 @@
void *priv;
struct msm_vidc_debug debug;
struct buf_count count;
- enum msm_vidc_mode mode;
+ enum msm_vidc_modes flags;
struct msm_vidc_core_capability capability;
};
@@ -254,4 +254,6 @@
int msm_vidc_trigger_ssr(struct msm_vidc_core *core,
enum hal_ssr_trigger_type type);
int msm_vidc_check_session_supported(struct msm_vidc_inst *inst);
+void msm_vidc_queue_v4l2_event(struct msm_vidc_inst *inst, int event_type);
+
#endif
diff --git a/drivers/media/platform/msm/vidc/q6_hfi.c b/drivers/media/platform/msm/vidc/q6_hfi.c
index 0678fc2..bc3b93d 100644
--- a/drivers/media/platform/msm/vidc/q6_hfi.c
+++ b/drivers/media/platform/msm/vidc/q6_hfi.c
@@ -400,9 +400,11 @@
static int q6_hfi_apr_callback(struct apr_client_data *data, void *priv)
{
struct q6_hfi_device *device = priv;
+ struct hfi_msg_event_notify_packet pkt = {0};
+ void *payload = NULL;
int rc = 0;
- if (!data || !device || !data->payload_size) {
+ if (!data || !device) {
dprintk(VIDC_ERR, "%s - Invalid arguments", __func__);
return -EINVAL;
}
@@ -410,7 +412,23 @@
dprintk(VIDC_DBG, "%s opcode = %u payload size = %u", __func__,
data->opcode, data->payload_size);
- rc = q6_hfi_iface_eventq_write(device, data->payload);
+ if (data->opcode == RESET_EVENTS) {
+ dprintk(VIDC_ERR, "%s Received subsystem reset event: %d",
+ __func__, data->reset_event);
+ pkt.packet_type = HFI_MSG_EVENT_NOTIFY;
+ pkt.size = sizeof(pkt);
+ pkt.event_id = HFI_EVENT_SYS_ERROR;
+ pkt.event_data1 = data->opcode;
+ pkt.event_data2 = data->reset_event;
+ payload = &pkt;
+ } else if (data->payload_size > 0) {
+ payload = data->payload;
+ } else {
+ dprintk(VIDC_ERR, "%s - Invalid payload size", __func__);
+ return -EINVAL;
+ }
+
+ rc = q6_hfi_iface_eventq_write(device, payload);
if (rc) {
dprintk(VIDC_ERR, "%s failed to write to event queue",
__func__);
diff --git a/drivers/media/platform/msm/vidc/venus_hfi.c b/drivers/media/platform/msm/vidc/venus_hfi.c
index ca4ac53..15ac493 100644
--- a/drivers/media/platform/msm/vidc/venus_hfi.c
+++ b/drivers/media/platform/msm/vidc/venus_hfi.c
@@ -62,6 +62,23 @@
int ret;
};
+static void venus_hfi_dump_packet(u8 *packet)
+{
+ u32 c = 0, packet_size = *(u32 *)packet;
+ const int row_size = 32;
+ /* row must contain enough for 0xdeadbaad * 8 to be converted into
+ * "de ad ba ab " * 8 + '\0' */
+ char row[3 * row_size];
+
+ for (c = 0; c * row_size < packet_size; ++c) {
+ int bytes_to_read = ((c + 1) * row_size > packet_size) ?
+ packet_size % row_size : row_size;
+ hex_dump_to_buffer(packet + c * row_size, bytes_to_read,
+ row_size, 4, row, sizeof(row), false);
+ dprintk(VIDC_PKT, "%s\n", row);
+ }
+}
+
static void venus_hfi_sim_modify_cmd_packet(u8 *packet)
{
struct hfi_cmd_sys_session_init_packet *sys_init;
@@ -171,8 +188,6 @@
return -EINVAL;
}
- venus_hfi_sim_modify_cmd_packet(packet);
-
queue = (struct hfi_queue_header *) qinfo->q_hdr;
if (!queue) {
@@ -180,6 +195,13 @@
return -ENOENT;
}
+ venus_hfi_sim_modify_cmd_packet(packet);
+
+ if (msm_vidc_debug & VIDC_PKT) {
+ dprintk(VIDC_PKT, "%s: %p\n", __func__, qinfo);
+ venus_hfi_dump_packet(packet);
+ }
+
packet_size_in_words = (*(u32 *)packet) >> 2;
dprintk(VIDC_DBG, "Packet_size in words: %d", packet_size_in_words);
@@ -359,6 +381,10 @@
*pb_tx_req_is_set = (1 == queue->qhdr_tx_req) ? 1 : 0;
venus_hfi_hal_sim_modify_msg_packet(packet);
+ if (msm_vidc_debug & VIDC_PKT) {
+ dprintk(VIDC_PKT, "%s: %p\n", __func__, qinfo);
+ venus_hfi_dump_packet(packet);
+ }
dprintk(VIDC_DBG, "Out : ");
return rc;
}
@@ -2296,13 +2322,15 @@
bus_info = &device->resources.bus_info;
bus_info->ddr_handle[MSM_VIDC_ENCODER] =
- msm_bus_scale_register_client(&device->res->bus_pdata[2]);
+ msm_bus_scale_register_client(
+ &device->res->bus_pdata[BUS_IDX_ENC_DDR]);
if (!bus_info->ddr_handle[MSM_VIDC_ENCODER]) {
dprintk(VIDC_ERR, "Failed to register bus scale client\n");
goto err_init_bus;
}
bus_info->ddr_handle[MSM_VIDC_DECODER] =
- msm_bus_scale_register_client(&device->res->bus_pdata[3]);
+ msm_bus_scale_register_client(
+ &device->res->bus_pdata[BUS_IDX_DEC_DDR]);
if (!bus_info->ddr_handle[MSM_VIDC_DECODER]) {
dprintk(VIDC_ERR, "Failed to register bus scale client\n");
goto err_init_bus;
@@ -2311,7 +2339,7 @@
if (device->res->has_ocmem) {
bus_info->ocmem_handle[MSM_VIDC_ENCODER] =
msm_bus_scale_register_client(
- &device->res->bus_pdata[0]);
+ &device->res->bus_pdata[BUS_IDX_ENC_OCMEM]);
if (!bus_info->ocmem_handle[MSM_VIDC_ENCODER]) {
dprintk(VIDC_ERR,
"Failed to register bus scale client\n");
@@ -2320,7 +2348,7 @@
bus_info->ocmem_handle[MSM_VIDC_DECODER] =
msm_bus_scale_register_client(
- &device->res->bus_pdata[1]);
+ &device->res->bus_pdata[BUS_IDX_DEC_OCMEM]);
if (!bus_info->ocmem_handle[MSM_VIDC_DECODER]) {
dprintk(VIDC_ERR,
"Failed to register bus scale client\n");
@@ -2344,15 +2372,35 @@
979200,
};
-static int venus_hfi_get_bus_vector(int load)
+static int venus_hfi_get_bus_vector(struct venus_hfi_device *device, int load,
+ enum session_type type, enum mem_type mtype)
{
int num_rows = sizeof(venus_hfi_bus_table)/(sizeof(u32));
int i, j;
+ int idx = 0;
+
+ if (!device || (mtype != DDR_MEM && mtype != OCMEM_MEM) ||
+ (type != MSM_VIDC_ENCODER && type != MSM_VIDC_DECODER)) {
+ dprintk(VIDC_ERR, "%s invalid params", __func__);
+ return -EINVAL;
+ }
+
for (i = 0; i < num_rows; i++) {
if (load <= venus_hfi_bus_table[i])
break;
}
+
+ if (type == MSM_VIDC_ENCODER)
+ idx = (mtype == DDR_MEM) ? BUS_IDX_ENC_DDR : BUS_IDX_ENC_OCMEM;
+ else
+ idx = (mtype == DDR_MEM) ? BUS_IDX_DEC_DDR : BUS_IDX_DEC_OCMEM;
+
j = clamp(i, 0, num_rows-1) + 1;
+
+ /* Ensure bus index remains within the supported range,
+ * as specified in the device dtsi file */
+ j = clamp(j, 0, device->res->bus_pdata[idx].num_usecases - 1);
+
dprintk(VIDC_DBG, "Required bus = %d\n", j);
return j;
}
@@ -2363,6 +2411,7 @@
int rc = 0;
u32 handle = 0;
struct venus_hfi_device *device = dev;
+ int bus_vector = 0;
if (!device) {
dprintk(VIDC_ERR, "%s invalid device handle %p",
@@ -2376,8 +2425,13 @@
handle = device->resources.bus_info.ocmem_handle[type];
if (handle) {
- rc = msm_bus_scale_client_update_request(
- handle, venus_hfi_get_bus_vector(load));
+ bus_vector = venus_hfi_get_bus_vector(device, load,
+ type, mtype);
+ if (bus_vector < 0) {
+ dprintk(VIDC_ERR, "Failed to get bus vector\n");
+ return -EINVAL;
+ }
+ rc = msm_bus_scale_client_update_request(handle, bus_vector);
if (rc)
dprintk(VIDC_ERR, "Failed to scale bus: %d\n", rc);
} else {
diff --git a/drivers/media/platform/msm/vidc/venus_hfi.h b/drivers/media/platform/msm/vidc/venus_hfi.h
index 197c754..a59a053 100644
--- a/drivers/media/platform/msm/vidc/venus_hfi.h
+++ b/drivers/media/platform/msm/vidc/venus_hfi.h
@@ -116,6 +116,14 @@
VIDC_HWREG_HVI_SOFTINTEN = 0xA,
};
+enum bus_index {
+ BUS_IDX_ENC_OCMEM,
+ BUS_IDX_DEC_OCMEM,
+ BUS_IDX_ENC_DDR,
+ BUS_IDX_DEC_DDR,
+ BUS_IDX_MAX
+};
+
struct vidc_mem_addr {
u8 *align_device_addr;
u8 *align_virtual_addr;
diff --git a/drivers/mfd/pm8xxx-pwm.c b/drivers/mfd/pm8xxx-pwm.c
index caaba81..eb8320f 100644
--- a/drivers/mfd/pm8xxx-pwm.c
+++ b/drivers/mfd/pm8xxx-pwm.c
@@ -1,4 +1,4 @@
-/* Copyright (c) 2011-2012, The Linux Foundation. All rights reserved.
+/* Copyright (c) 2011-2013, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -58,10 +58,11 @@
#define PM8XXX_PWM_DISABLE 0x3F
/* PM8XXX LPG PWM */
+#define SSBI_REG_ADDR_LPG_BANK_LOW_EN 0x130
#define SSBI_REG_ADDR_LPG_CTL_BASE 0x13C
#define SSBI_REG_ADDR_LPG_CTL(n) (SSBI_REG_ADDR_LPG_CTL_BASE + (n))
#define SSBI_REG_ADDR_LPG_BANK_SEL 0x143
-#define SSBI_REG_ADDR_LPG_BANK_EN 0x144
+#define SSBI_REG_ADDR_LPG_BANK_HIGH_EN 0x144
#define SSBI_REG_ADDR_LPG_LUT_CFG0 0x145
#define SSBI_REG_ADDR_LPG_LUT_CFG1 0x146
#define SSBI_REG_ADDR_LPG_TEST 0x147
@@ -206,13 +207,15 @@
struct pm8xxx_pwm_chip *chip;
int bypass_lut;
int dtest_mode_supported;
+ int banks;
};
struct pm8xxx_pwm_chip {
struct pwm_device *pwm_dev;
u8 pwm_channels;
u8 pwm_total_pre_divs;
- u8 bank_mask;
+ u8 lo_bank_mask;
+ u8 hi_bank_mask;
struct mutex pwm_mutex;
struct device *dev;
bool is_lpg_supported;
@@ -259,18 +262,40 @@
chip = pwm->chip;
- if (enable)
- reg = chip->bank_mask | (1 << pwm->pwm_id);
- else
- reg = chip->bank_mask & ~(1 << pwm->pwm_id);
+ if (!pwm->banks)
+ pwm->banks = (PM_PWM_BANK_LO | PM_PWM_BANK_HI);
- rc = pm8xxx_writeb(chip->dev->parent, SSBI_REG_ADDR_LPG_BANK_EN, reg);
- if (rc) {
- pr_err("pm8xxx_writeb(): rc=%d (Enable LPG Bank)\n", rc);
- return rc;
+ if (pwm->banks & PM_PWM_BANK_LO) {
+ if (enable)
+ reg = chip->lo_bank_mask | (1 << pwm->pwm_id);
+ else
+ reg = chip->lo_bank_mask & ~(1 << pwm->pwm_id);
+
+ rc = pm8xxx_writeb(chip->dev->parent,
+ SSBI_REG_ADDR_LPG_BANK_LOW_EN, reg);
+ if (rc) {
+ pr_err("pm8xxx_writeb(): Enable Bank Low =%d\n", rc);
+ return rc;
+ }
+
+ chip->lo_bank_mask = reg;
}
- chip->bank_mask = reg;
+ if (pwm->banks & PM_PWM_BANK_HI) {
+ if (enable)
+ reg = chip->hi_bank_mask | (1 << pwm->pwm_id);
+ else
+ reg = chip->hi_bank_mask & ~(1 << pwm->pwm_id);
+
+ rc = pm8xxx_writeb(chip->dev->parent,
+ SSBI_REG_ADDR_LPG_BANK_HIGH_EN, reg);
+ if (rc) {
+ pr_err("pm8xxx_writeb(): Enable Bank High =%d\n", rc);
+ return rc;
+ }
+
+ chip->hi_bank_mask = reg;
+ }
return 0;
}
@@ -1010,6 +1035,16 @@
period = &pwm->period;
mutex_lock(&pwm->chip->pwm_mutex);
+ if (flags & PM_PWM_BANK_HI)
+ pwm->banks = PM_PWM_BANK_HI;
+
+ if (flags & PM_PWM_BANK_LO)
+ pwm->banks |= PM_PWM_BANK_LO;
+
+ /*Enable both banks if banks information is not shared.*/
+ if (!pwm->banks)
+ pwm->banks |= (PM_PWM_BANK_LO | PM_PWM_BANK_HI);
+
if (!pwm->in_use) {
pr_err("pwm_id: %d: stale handle?\n", pwm->pwm_id);
rc = -EINVAL;
diff --git a/drivers/mfd/wcd9xxx-core.c b/drivers/mfd/wcd9xxx-core.c
index 130ff48..3d0abce 100644
--- a/drivers/mfd/wcd9xxx-core.c
+++ b/drivers/mfd/wcd9xxx-core.c
@@ -283,14 +283,6 @@
},
};
-
-enum wcd9xxx_chipid_major {
- TABLA_MAJOR = cpu_to_le16(0x100),
- SITAR_MAJOR = cpu_to_le16(0x101),
- TAIKO_MAJOR = cpu_to_le16(0x102),
- TAPAN_MAJOR = cpu_to_le16(0x103),
-};
-
static const struct wcd9xxx_codec_type wcd9xxx_codecs[] = {
{
TABLA_MAJOR, cpu_to_le16(0x1), tabla1x_devs,
@@ -1729,6 +1721,7 @@
.id_table = tapan_slimtest_id,
.resume = wcd9xxx_slim_resume,
.suspend = wcd9xxx_slim_suspend,
+ .device_up = wcd9xxx_slim_device_up,
};
static struct i2c_device_id wcd9xxx_id_table[] = {
diff --git a/drivers/mfd/wcd9xxx-irq.c b/drivers/mfd/wcd9xxx-irq.c
index 5efd905..062351d 100644
--- a/drivers/mfd/wcd9xxx-irq.c
+++ b/drivers/mfd/wcd9xxx-irq.c
@@ -193,10 +193,24 @@
mutex_unlock(&wcd9xxx->nested_irq_lock);
}
-static void wcd9xxx_irq_dispatch(struct wcd9xxx *wcd9xxx, int irqbit)
+static bool wcd9xxx_is_mbhc_irq(struct wcd9xxx *wcd9xxx, int irqbit)
{
if ((irqbit <= WCD9XXX_IRQ_MBHC_INSERTION) &&
- (irqbit >= WCD9XXX_IRQ_MBHC_REMOVAL)) {
+ (irqbit >= WCD9XXX_IRQ_MBHC_REMOVAL))
+ return true;
+ else if (wcd9xxx->codec_type->id_major == TAIKO_MAJOR &&
+ irqbit == WCD9320_IRQ_MBHC_JACK_SWITCH)
+ return true;
+ else if (wcd9xxx->codec_type->id_major == TAPAN_MAJOR &&
+ irqbit == WCD9306_IRQ_MBHC_JACK_SWITCH)
+ return true;
+ else
+ return false;
+}
+
+static void wcd9xxx_irq_dispatch(struct wcd9xxx *wcd9xxx, int irqbit)
+{
+ if (wcd9xxx_is_mbhc_irq(wcd9xxx, irqbit)) {
wcd9xxx_nested_irq_lock(wcd9xxx);
wcd9xxx_reg_write(wcd9xxx, WCD9XXX_A_INTR_CLEAR0 +
BIT_BYTE(irqbit),
diff --git a/drivers/misc/qseecom.c b/drivers/misc/qseecom.c
index c60537a..6ea2346 100644
--- a/drivers/misc/qseecom.c
+++ b/drivers/misc/qseecom.c
@@ -41,6 +41,7 @@
#include <mach/subsystem_restart.h>
#include <mach/socinfo.h>
#include <mach/qseecomi.h>
+#include <asm/cacheflush.h>
#include "qseecom_legacy.h"
#include "qseecom_kernel.h"
@@ -515,7 +516,10 @@
qseecom.send_resp_flag = 0;
send_data_rsp.qsee_cmd_id = QSEOS_LISTENER_DATA_RSP_COMMAND;
send_data_rsp.listener_id = lstnr ;
-
+ if (ptr_svc)
+ msm_ion_do_cache_op(qseecom.ion_clnt, ptr_svc->ihandle,
+ ptr_svc->sb_virt, ptr_svc->sb_length,
+ ION_IOC_CLEAN_INV_CACHES);
ret = scm_call(SCM_SVC_TZSCHEDULER, 1,
(const void *)&send_data_rsp,
sizeof(send_data_rsp), resp,
@@ -641,6 +645,8 @@
load_req.mdt_len = load_img_req.mdt_len;
load_req.img_len = load_img_req.img_len;
load_req.phy_addr = pa;
+ msm_ion_do_cache_op(qseecom.ion_clnt, ihandle, NULL, len,
+ ION_IOC_CLEAN_INV_CACHES);
/* SCM_CALL to load the app and get the app_id back */
ret = scm_call(SCM_SVC_TZSCHEDULER, 1, &load_req,
@@ -880,10 +886,15 @@
pr_err("Unsupported cmd_id %d\n", req.cmd_id);
return -EINVAL;
}
-
+ msm_ion_do_cache_op(qseecom.ion_clnt, data->client.ihandle,
+ data->client.sb_virt, data->client.sb_length,
+ ION_IOC_CLEAN_INV_CACHES);
ret = scm_call(SCM_SVC_TZSCHEDULER, 1, (const void *) &send_svc_ireq,
sizeof(send_svc_ireq),
&resp, sizeof(resp));
+ msm_ion_do_cache_op(qseecom.ion_clnt, data->client.ihandle,
+ data->client.sb_virt, data->client.sb_length,
+ ION_IOC_INV_CACHES);
if (ret) {
pr_err("qseecom_scm_call failed with err: %d\n", ret);
return ret;
@@ -952,6 +963,11 @@
(uint32_t)req->resp_buf));
send_data_req.rsp_len = req->resp_len;
+ msm_ion_do_cache_op(qseecom.ion_clnt, data->client.ihandle,
+ data->client.sb_virt,
+ (req->cmd_req_len + req->resp_len),
+ ION_IOC_CLEAN_INV_CACHES);
+
ret = scm_call(SCM_SVC_TZSCHEDULER, 1, (const void *) &send_data_req,
sizeof(send_data_req),
&resp, sizeof(resp));
@@ -974,6 +990,9 @@
ret = -EINVAL;
}
}
+ msm_ion_do_cache_op(qseecom.ion_clnt, data->client.ihandle,
+ data->client.sb_virt, data->client.sb_length,
+ ION_IOC_INV_CACHES);
return ret;
}
@@ -1005,6 +1024,8 @@
char *field;
int ret = 0;
int i = 0;
+ uint32_t len = 0;
+ struct scatterlist *sg;
for (i = 0; i < MAX_ION_FD; i++) {
struct sg_table *sg_ptr = NULL;
@@ -1035,6 +1056,7 @@
sg_ptr->nents, QSEECOM_MAX_SG_ENTRY);
goto err;
}
+ sg = sg_ptr->sgl;
if (sg_ptr->nents == 1) {
uint32_t *update;
update = (uint32_t *) field;
@@ -1043,12 +1065,11 @@
else
*update = (uint32_t)sg_dma_address(
sg_ptr->sgl);
+ len += (uint32_t)sg->length;
} else {
struct qseecom_sg_entry *update;
- struct scatterlist *sg;
int j = 0;
update = (struct qseecom_sg_entry *) field;
- sg = sg_ptr->sgl;
for (j = 0; j < sg_ptr->nents; j++) {
if (cleanup) {
update->phys_addr = 0;
@@ -1058,10 +1079,19 @@
sg_dma_address(sg);
update->len = sg->length;
}
+ len += sg->length;
update++;
sg = sg_next(sg);
}
}
+ if (cleanup)
+ msm_ion_do_cache_op(qseecom.ion_clnt,
+ ihandle, NULL, len,
+ ION_IOC_INV_CACHES);
+ else
+ msm_ion_do_cache_op(qseecom.ion_clnt,
+ ihandle, NULL, len,
+ ION_IOC_CLEAN_INV_CACHES);
/* Deallocate the handle */
if (!IS_ERR_OR_NULL(ihandle))
ion_free(qseecom.ion_clnt, ihandle);
@@ -1288,6 +1318,7 @@
return -EIO;
}
+ __cpuc_flush_dcache_area((void *)img_data, fw_size);
/* SCM_CALL to load the image */
ret = scm_call(SCM_SVC_TZSCHEDULER, 1, &load_req,
sizeof(struct qseecom_load_app_ireq),
@@ -1354,6 +1385,7 @@
return -EIO;
}
+ __cpuc_flush_dcache_area((void *)img_data, fw_size);
/* SCM_CALL to load the image */
ret = scm_call(SCM_SVC_TZSCHEDULER, 1, &load_req,
sizeof(struct qseecom_load_lib_image_ireq),
@@ -1985,7 +2017,8 @@
ret = -EIO;
goto qseecom_load_external_elf_set_cpu_err;
}
-
+ msm_ion_do_cache_op(qseecom.ion_clnt, ihandle, NULL, len,
+ ION_IOC_CLEAN_INV_CACHES);
/* SCM_CALL to load the external elf */
ret = scm_call(SCM_SVC_TZSCHEDULER, 1, &load_req,
sizeof(struct qseecom_load_app_ireq),
@@ -2498,7 +2531,7 @@
ret = scm_call(SCM_SVC_ES, SCM_SAVE_PARTITION_HASH_ID,
(void *) &req, sizeof(req), NULL, 0);
if (ret) {
- pr_err("scm_call failed");
+ pr_err("qseecom_scm_call failed");
return ret;
}
diff --git a/drivers/mmc/card/block.c b/drivers/mmc/card/block.c
index f01ddab..d975543 100644
--- a/drivers/mmc/card/block.c
+++ b/drivers/mmc/card/block.c
@@ -3130,11 +3130,11 @@
/* Silent the block layer */
if (md) {
- rc = mmc_queue_suspend(&md->queue);
+ rc = mmc_queue_suspend(&md->queue, 1);
if (rc)
goto suspend_error;
list_for_each_entry(part_md, &md->part, part) {
- rc = mmc_queue_suspend(&part_md->queue);
+ rc = mmc_queue_suspend(&part_md->queue, 1);
if (rc)
goto suspend_error;
}
@@ -3161,11 +3161,11 @@
int rc = 0;
if (md) {
- rc = mmc_queue_suspend(&md->queue);
+ rc = mmc_queue_suspend(&md->queue, 0);
if (rc)
goto out;
list_for_each_entry(part_md, &md->part, part) {
- rc = mmc_queue_suspend(&part_md->queue);
+ rc = mmc_queue_suspend(&part_md->queue, 0);
if (rc)
goto out_resume;
}
diff --git a/drivers/mmc/card/queue.c b/drivers/mmc/card/queue.c
index 0e024dd..507cd5b 100644
--- a/drivers/mmc/card/queue.c
+++ b/drivers/mmc/card/queue.c
@@ -438,12 +438,13 @@
/**
* mmc_queue_suspend - suspend a MMC request queue
* @mq: MMC queue to suspend
+ * @wait: Wait till MMC request queue is empty
*
* Stop the block request queue, and wait for our thread to
* complete any outstanding requests. This ensures that we
* won't suspend while a request is being processed.
*/
-int mmc_queue_suspend(struct mmc_queue *mq)
+int mmc_queue_suspend(struct mmc_queue *mq, int wait)
{
struct request_queue *q = mq->queue;
unsigned long flags;
@@ -457,7 +458,7 @@
spin_unlock_irqrestore(q->queue_lock, flags);
rc = down_trylock(&mq->thread_sem);
- if (rc) {
+ if (rc && !wait) {
/*
* Failed to take the lock so better to abort the
* suspend because mmcqd thread is processing requests.
@@ -467,6 +468,9 @@
blk_start_queue(q);
spin_unlock_irqrestore(q->queue_lock, flags);
rc = -EBUSY;
+ } else if (rc && wait) {
+ down(&mq->thread_sem);
+ rc = 0;
}
}
return rc;
diff --git a/drivers/mmc/card/queue.h b/drivers/mmc/card/queue.h
index 9280d1b..d1fe01c 100644
--- a/drivers/mmc/card/queue.h
+++ b/drivers/mmc/card/queue.h
@@ -60,7 +60,7 @@
extern int mmc_init_queue(struct mmc_queue *, struct mmc_card *, spinlock_t *,
const char *);
extern void mmc_cleanup_queue(struct mmc_queue *);
-extern int mmc_queue_suspend(struct mmc_queue *);
+extern int mmc_queue_suspend(struct mmc_queue *, int);
extern void mmc_queue_resume(struct mmc_queue *);
extern unsigned int mmc_queue_map_sg(struct mmc_queue *,
diff --git a/drivers/mmc/core/bus.c b/drivers/mmc/core/bus.c
index ac2ecbb..a990f43 100644
--- a/drivers/mmc/core/bus.c
+++ b/drivers/mmc/core/bus.c
@@ -128,6 +128,16 @@
struct mmc_driver *drv = to_mmc_driver(dev->driver);
struct mmc_card *card = mmc_dev_to_card(dev);
+ if (!drv) {
+ pr_debug("%s: %s: drv is NULL\n", dev_name(dev), __func__);
+ return;
+ }
+
+ if (!card) {
+ pr_debug("%s: %s: card is NULL\n", dev_name(dev), __func__);
+ return;
+ }
+
if (drv->shutdown)
drv->shutdown(card);
}
diff --git a/drivers/mmc/host/msm_sdcc.c b/drivers/mmc/host/msm_sdcc.c
index 3986cdd..e285bfa 100644
--- a/drivers/mmc/host/msm_sdcc.c
+++ b/drivers/mmc/host/msm_sdcc.c
@@ -3747,6 +3747,7 @@
{
struct msmsdcc_host *host = mmc_priv(mmc);
unsigned long flags;
+ bool prev_pwrsave, curr_pwrsave;
int rc = 0;
switch (ios->signal_voltage) {
@@ -3779,7 +3780,9 @@
* low voltage is required
*/
spin_lock_irqsave(&host->lock, flags);
-
+ prev_pwrsave = !!(readl_relaxed(host->base + MMCICLOCK) &
+ MCI_CLK_PWRSAVE);
+ curr_pwrsave = prev_pwrsave;
/*
* Poll on MCIDATIN_3_0 and MCICMDIN bits of MCI_TEST_INPUT
* register until they become all zeros.
@@ -3792,9 +3795,12 @@
}
/* Stop SD CLK output. */
- writel_relaxed((readl_relaxed(host->base + MMCICLOCK) |
- MCI_CLK_PWRSAVE), host->base + MMCICLOCK);
- msmsdcc_sync_reg_wr(host);
+ if (!prev_pwrsave) {
+ writel_relaxed((readl_relaxed(host->base + MMCICLOCK) |
+ MCI_CLK_PWRSAVE), host->base + MMCICLOCK);
+ msmsdcc_sync_reg_wr(host);
+ curr_pwrsave = true;
+ }
spin_unlock_irqrestore(&host->lock, flags);
/*
@@ -3815,6 +3821,7 @@
writel_relaxed((readl_relaxed(host->base + MMCICLOCK)
& ~MCI_CLK_PWRSAVE), host->base + MMCICLOCK);
msmsdcc_sync_reg_wr(host);
+ curr_pwrsave = false;
spin_unlock_irqrestore(&host->lock, flags);
/*
@@ -3835,10 +3842,9 @@
}
out_unlock:
- /* Enable PWRSAVE */
- writel_relaxed((readl_relaxed(host->base + MMCICLOCK) |
- MCI_CLK_PWRSAVE), host->base + MMCICLOCK);
- msmsdcc_sync_reg_wr(host);
+ /* Restore the correct PWRSAVE state */
+ if (prev_pwrsave ^ curr_pwrsave)
+ msmsdcc_set_pwrsave(mmc, prev_pwrsave);
spin_unlock_irqrestore(&host->lock, flags);
out:
return rc;
@@ -3877,17 +3883,24 @@
int rc = 0;
unsigned long flags;
u32 wait_cnt;
+ bool prev_pwrsave, curr_pwrsave;
spin_lock_irqsave(&host->lock, flags);
+ prev_pwrsave = !!(readl_relaxed(host->base + MMCICLOCK) &
+ MCI_CLK_PWRSAVE);
+ curr_pwrsave = prev_pwrsave;
/*
* Make sure that clock is always enabled when DLL
* tuning is in progress. Keeping PWRSAVE ON may
* turn off the clock. So let's disable the PWRSAVE
* here and re-enable it once tuning is completed.
*/
- writel_relaxed((readl_relaxed(host->base + MMCICLOCK)
- & ~MCI_CLK_PWRSAVE), host->base + MMCICLOCK);
- msmsdcc_sync_reg_wr(host);
+ if (prev_pwrsave) {
+ writel_relaxed((readl_relaxed(host->base + MMCICLOCK)
+ & ~MCI_CLK_PWRSAVE), host->base + MMCICLOCK);
+ msmsdcc_sync_reg_wr(host);
+ curr_pwrsave = false;
+ }
/* Write 1 to DLL_RST bit of MCI_DLL_CONFIG register */
writel_relaxed((readl_relaxed(host->base + MCI_DLL_CONFIG)
@@ -3930,10 +3943,9 @@
}
out:
- /* re-enable PWRSAVE */
- writel_relaxed((readl_relaxed(host->base + MMCICLOCK) |
- MCI_CLK_PWRSAVE), host->base + MMCICLOCK);
- msmsdcc_sync_reg_wr(host);
+ /* Restore the correct PWRSAVE state */
+ if (prev_pwrsave ^ curr_pwrsave)
+ msmsdcc_set_pwrsave(host->mmc, prev_pwrsave);
spin_unlock_irqrestore(&host->lock, flags);
return rc;
diff --git a/drivers/mmc/host/sdhci-msm.c b/drivers/mmc/host/sdhci-msm.c
index 232b99b..4ff8fea 100644
--- a/drivers/mmc/host/sdhci-msm.c
+++ b/drivers/mmc/host/sdhci-msm.c
@@ -512,19 +512,25 @@
int rc = 0;
unsigned long flags;
u32 wait_cnt;
+ bool prev_pwrsave, curr_pwrsave;
pr_debug("%s: Enter %s\n", mmc_hostname(mmc), __func__);
spin_lock_irqsave(&host->lock, flags);
-
+ prev_pwrsave = !!(readl_relaxed(host->ioaddr + CORE_VENDOR_SPEC) &
+ CORE_CLK_PWRSAVE);
+ curr_pwrsave = prev_pwrsave;
/*
* Make sure that clock is always enabled when DLL
* tuning is in progress. Keeping PWRSAVE ON may
* turn off the clock. So let's disable the PWRSAVE
* here and re-enable it once tuning is completed.
*/
- writel_relaxed((readl_relaxed(host->ioaddr + CORE_VENDOR_SPEC)
- & ~CORE_CLK_PWRSAVE),
- host->ioaddr + CORE_VENDOR_SPEC);
+ if (prev_pwrsave) {
+ writel_relaxed((readl_relaxed(host->ioaddr + CORE_VENDOR_SPEC)
+ & ~CORE_CLK_PWRSAVE),
+ host->ioaddr + CORE_VENDOR_SPEC);
+ curr_pwrsave = false;
+ }
/* Write 1 to DLL_RST bit of DLL_CONFIG register */
writel_relaxed((readl_relaxed(host->ioaddr + CORE_DLL_CONFIG)
@@ -567,10 +573,18 @@
}
out:
- /* re-enable PWRSAVE */
- writel_relaxed((readl_relaxed(host->ioaddr + CORE_VENDOR_SPEC) |
- CORE_CLK_PWRSAVE),
- host->ioaddr + CORE_VENDOR_SPEC);
+ /* Restore the correct PWRSAVE state */
+ if (prev_pwrsave ^ curr_pwrsave) {
+ u32 reg = readl_relaxed(host->ioaddr + CORE_VENDOR_SPEC);
+
+ if (prev_pwrsave)
+ reg |= CORE_CLK_PWRSAVE;
+ else
+ reg &= ~CORE_CLK_PWRSAVE;
+
+ writel_relaxed(reg, host->ioaddr + CORE_VENDOR_SPEC);
+ }
+
spin_unlock_irqrestore(&host->lock, flags);
pr_debug("%s: Exit %s\n", mmc_hostname(mmc), __func__);
return rc;
@@ -2238,16 +2252,16 @@
goto pclk_disable;
}
- ret = clk_prepare_enable(msm_host->clk);
- if (ret)
- goto pclk_disable;
-
/* Set to the minimum supported clock frequency */
ret = clk_set_rate(msm_host->clk, sdhci_msm_get_min_clock(host));
if (ret) {
dev_err(&pdev->dev, "MClk rate set failed (%d)\n", ret);
- goto clk_disable;
+ goto pclk_disable;
}
+ ret = clk_prepare_enable(msm_host->clk);
+ if (ret)
+ goto pclk_disable;
+
msm_host->clk_rate = sdhci_msm_get_min_clock(host);
atomic_set(&msm_host->clks_on, 1);
@@ -2334,6 +2348,9 @@
host->quirks2 |= SDHCI_QUIRK2_BROKEN_PRESET_VALUE;
host->quirks2 |= SDHCI_QUIRK2_USE_RESERVED_MAX_TIMEOUT;
+ if (host->quirks2 & SDHCI_QUIRK2_ALWAYS_USE_BASE_CLOCK)
+ host->quirks2 |= SDHCI_QUIRK2_DIVIDE_TOUT_BY_4;
+
host_version = readw_relaxed((host->ioaddr + SDHCI_HOST_VERSION));
dev_dbg(&pdev->dev, "Host Version: 0x%x Vendor Version 0x%x\n",
host_version, ((host_version & SDHCI_VENDOR_VER_MASK) >>
@@ -2405,6 +2422,7 @@
msm_host->mmc->caps2 |= MMC_CAP2_POWEROFF_NOTIFY;
msm_host->mmc->caps2 |= MMC_CAP2_CLK_SCALE;
msm_host->mmc->caps2 |= MMC_CAP2_STOP_REQUEST;
+ msm_host->mmc->caps2 |= MMC_CAP2_ASYNC_SDIO_IRQ_4BIT_MODE;
if (msm_host->pdata->nonremovable)
msm_host->mmc->caps |= MMC_CAP_NONREMOVABLE;
diff --git a/drivers/mmc/host/sdhci.c b/drivers/mmc/host/sdhci.c
index 4f9bbad..ce1c536 100644
--- a/drivers/mmc/host/sdhci.c
+++ b/drivers/mmc/host/sdhci.c
@@ -700,6 +700,7 @@
u8 count;
struct mmc_data *data = cmd->data;
unsigned target_timeout, current_timeout;
+ u32 curr_clk = 0; /* In KHz */
/*
* If the host controller provides us with an incorrect timeout
@@ -734,7 +735,14 @@
* (1) / (2) > 2^6
*/
count = 0;
- current_timeout = (1 << 13) * 1000 / host->timeout_clk;
+ if (host->quirks2 & SDHCI_QUIRK2_ALWAYS_USE_BASE_CLOCK) {
+ curr_clk = host->clock / 1000;
+ if (host->quirks2 & SDHCI_QUIRK2_DIVIDE_TOUT_BY_4)
+ curr_clk /= 4;
+ current_timeout = (1 << 13) * 1000 / curr_clk;
+ } else {
+ current_timeout = (1 << 13) * 1000 / host->timeout_clk;
+ }
while (current_timeout < target_timeout) {
count++;
current_timeout <<= 1;
diff --git a/drivers/net/ethernet/msm/ecm_ipa.c b/drivers/net/ethernet/msm/ecm_ipa.c
index be9058b..f000df7 100644
--- a/drivers/net/ethernet/msm/ecm_ipa.c
+++ b/drivers/net/ethernet/msm/ecm_ipa.c
@@ -47,27 +47,50 @@
#define ECM_IPA_LOG_EXIT() pr_debug("end\n")
/**
- * enum ecm_ipa_state - specify the current driver internal state.
+ * enum ecm_ipa_state - specify the current driver internal state
+ * which is guarded by a state machine.
*
- * The driver internal state changes due to its API usage.
+ * The driver internal state changes due to its external API usage.
* The driver saves its internal state to guard from caller illegal
* call sequence.
- * LOADED is the first state which is the default one.
+ * states:
+ * UNLOADED is the first state which is the default one and is also the state
+ * after the driver gets unloaded(cleanup).
* INITIALIZED is the driver state once it finished registering
- * the network device
+ * the network device and all internal data struct were initialized
* CONNECTED is the driver state once the USB pipes were connected to IPA
- * UP is the driver state when it allows Linux network stack start
- * data transfer
+ * UP is the driver state after the interface mode was set to UP but the
+ * pipes are not connected yet - this state is meta-stable state.
+ * CONNECTED_AND_UP is the driver state when the pipe were connected and
+ * the interface got UP request from the network stack. this is the driver
+ * idle operation state which allows it to transmit/receive data.
+ * INVALID is a state which is not allowed.
*/
-enum ecm_ipa_mode {
- ECM_IPA_LOADED,
+enum ecm_ipa_state {
+ ECM_IPA_UNLOADED = 0,
ECM_IPA_INITIALIZED,
ECM_IPA_CONNECTED,
ECM_IPA_UP,
+ ECM_IPA_CONNECTED_AND_UP,
+ ECM_IPA_INVALID,
};
-#define ECM_IPA_MODE(ecm_ipa_ctx) \
- pr_debug("Driver mode changed - %d", ecm_ipa_ctx->mode);
+/**
+ * enum ecm_ipa_operation - enumerations used to descibe the API operation
+ *
+ * Those enums are used as input for the driver state machine.
+ */
+enum ecm_ipa_operation {
+ ECM_IPA_INITIALIZE,
+ ECM_IPA_CONNECT,
+ ECM_IPA_OPEN,
+ ECM_IPA_STOP,
+ ECM_IPA_DISCONNECT,
+ ECM_IPA_CLEANUP,
+};
+
+#define ECM_IPA_STATE_DEBUG(ecm_ipa_ctx) \
+ pr_debug("Driver state - %s", ecm_ipa_state_string(ecm_ipa_ctx->state));
/**
* struct ecm_ipa_dev - main driver context parameters
@@ -85,7 +108,7 @@
* @outstanding_high: number of outstanding packets allowed
* @outstanding_low: number of outstanding packets which shall cause
* to netdev queue start (after stopped due to outstanding_high reached)
- * @mode: current mode of ecm_ipa driver
+ * @state: current state of ecm_ipa driver
*/
struct ecm_ipa_dev {
struct net_device *net;
@@ -101,7 +124,7 @@
atomic_t outstanding_pkts;
u8 outstanding_high;
u8 outstanding_low;
- enum ecm_ipa_mode mode;
+ enum ecm_ipa_state state;
};
static int ecm_ipa_open(struct net_device *net);
@@ -142,8 +165,9 @@
static int ecm_ipa_ep_registers_dma_cfg(u32 usb_to_ipa_hdl);
static int ecm_ipa_set_device_ethernet_addr(u8 *dev_ethaddr,
u8 device_ethaddr[]);
-static bool ecm_ipa_state_validate(enum ecm_ipa_mode current_mode,
- enum ecm_ipa_mode new_mode);
+static enum ecm_ipa_state ecm_ipa_next_state(enum ecm_ipa_state current_state,
+ enum ecm_ipa_operation operation);
+static const char *ecm_ipa_state_string(enum ecm_ipa_state state);
static int ecm_ipa_init_module(void);
static void ecm_ipa_cleanup_module(void);
@@ -270,8 +294,8 @@
params->ecm_ipa_rx_dp_notify = ecm_ipa_packet_receive_notify;
params->ecm_ipa_tx_dp_notify = ecm_ipa_tx_complete_notify;
params->private = (void *)ecm_ipa_ctx;
- ecm_ipa_ctx->mode = ECM_IPA_INITIALIZED;
- ECM_IPA_MODE(ecm_ipa_ctx);
+ ecm_ipa_ctx->state = ECM_IPA_INITIALIZED;
+ ECM_IPA_STATE_DEBUG(ecm_ipa_ctx);
ECM_IPA_LOG_EXIT();
@@ -314,16 +338,20 @@
void *priv)
{
struct ecm_ipa_dev *ecm_ipa_ctx = priv;
+ int next_state;
ECM_IPA_LOG_ENTRY();
NULL_CHECK(priv);
pr_debug("usb_to_ipa_hdl = %d, ipa_to_usb_hdl = %d, priv=0x%p\n",
usb_to_ipa_hdl, ipa_to_usb_hdl, priv);
- if (!ecm_ipa_state_validate(ecm_ipa_ctx->mode, ECM_IPA_CONNECTED)) {
- ECM_IPA_ERROR("can't call connect before driver init\n");
+ next_state = ecm_ipa_next_state(ecm_ipa_ctx->state, ECM_IPA_CONNECT);
+ if (next_state == ECM_IPA_INVALID) {
+ ECM_IPA_ERROR("can't call connect before calling initialize\n");
return -EPERM;
}
+ ecm_ipa_ctx->state = next_state;
+ ECM_IPA_STATE_DEBUG(ecm_ipa_ctx);
if (!usb_to_ipa_hdl || usb_to_ipa_hdl >= IPA_CLIENT_MAX) {
ECM_IPA_ERROR("usb_to_ipa_hdl(%d) is not a valid ipa handle\n",
@@ -347,8 +375,10 @@
}
pr_debug("carrier_on notified, ecm_ipa is operational\n");
- ecm_ipa_ctx->mode = ECM_IPA_CONNECTED;
- ECM_IPA_MODE(ecm_ipa_ctx);
+ if (ecm_ipa_ctx->state == ECM_IPA_CONNECTED_AND_UP) {
+ netif_start_queue(ecm_ipa_ctx->net);
+ pr_debug("queue started\n");
+ }
ECM_IPA_LOG_EXIT();
@@ -368,24 +398,26 @@
static int ecm_ipa_open(struct net_device *net)
{
struct ecm_ipa_dev *ecm_ipa_ctx;
+ int next_state;
ECM_IPA_LOG_ENTRY();
ecm_ipa_ctx = netdev_priv(net);
- if (!ecm_ipa_state_validate(ecm_ipa_ctx->mode, ECM_IPA_UP)) {
- ECM_IPA_ERROR("can't bring driver up before cable connect\n");
+ next_state = ecm_ipa_next_state(ecm_ipa_ctx->state, ECM_IPA_OPEN);
+ if (next_state == ECM_IPA_INVALID) {
+ ECM_IPA_ERROR("can't bring driver up before initialize\n");
return -EPERM;
}
+ ecm_ipa_ctx->state = next_state;
+ ECM_IPA_STATE_DEBUG(ecm_ipa_ctx);
- if (!netif_carrier_ok(net))
- pr_debug("carrier is not ON yet - continuing\n");
-
- netif_start_queue(net);
- pr_debug("queue started\n");
-
- ecm_ipa_ctx->mode = ECM_IPA_UP;
- ECM_IPA_MODE(ecm_ipa_ctx);
+ if (ecm_ipa_ctx->state == ECM_IPA_CONNECTED_AND_UP) {
+ netif_start_queue(net);
+ pr_debug("queue started\n");
+ } else {
+ pr_debug("queue was not started due to meta-stabilie state\n");
+ }
ECM_IPA_LOG_EXIT();
@@ -424,8 +456,8 @@
goto out;
}
- if (unlikely(ecm_ipa_ctx->mode != ECM_IPA_UP)) {
- ECM_IPA_ERROR("can't send without network interface up\n");
+ if (unlikely(ecm_ipa_ctx->state != ECM_IPA_CONNECTED_AND_UP)) {
+ ECM_IPA_ERROR("Missing pipe connected and/or iface up\n");
return -NETDEV_TX_BUSY;
}
@@ -488,6 +520,11 @@
struct ecm_ipa_dev *ecm_ipa_ctx = priv;
int result;
+ if (unlikely(ecm_ipa_ctx->state != ECM_IPA_CONNECTED_AND_UP)) {
+ ECM_IPA_ERROR("Missing pipe connected and/or iface up\n");
+ return;
+ }
+
if (evt != IPA_RECEIVE) {
ECM_IPA_ERROR("A none IPA_RECEIVE event in ecm_ipa_receive\n");
return;
@@ -522,20 +559,21 @@
static int ecm_ipa_stop(struct net_device *net)
{
struct ecm_ipa_dev *ecm_ipa_ctx = netdev_priv(net);
+ int next_state;
ECM_IPA_LOG_ENTRY();
- if (!ecm_ipa_state_validate(ecm_ipa_ctx->mode, ECM_IPA_CONNECTED)) {
+ next_state = ecm_ipa_next_state(ecm_ipa_ctx->state, ECM_IPA_STOP);
+ if (next_state == ECM_IPA_INVALID) {
ECM_IPA_ERROR("can't do network interface down without up\n");
return -EPERM;
}
+ ecm_ipa_ctx->state = next_state;
+ ECM_IPA_STATE_DEBUG(ecm_ipa_ctx);
netif_stop_queue(net);
pr_debug("network device stopped\n");
- ecm_ipa_ctx->mode = ECM_IPA_CONNECTED;
- ECM_IPA_MODE(ecm_ipa_ctx);
-
ECM_IPA_LOG_EXIT();
return 0;
}
@@ -553,15 +591,19 @@
int ecm_ipa_disconnect(void *priv)
{
struct ecm_ipa_dev *ecm_ipa_ctx = priv;
+ int next_state;
ECM_IPA_LOG_ENTRY();
NULL_CHECK(ecm_ipa_ctx);
pr_debug("priv=0x%p\n", priv);
- if (!ecm_ipa_state_validate(ecm_ipa_ctx->mode, ECM_IPA_INITIALIZED)) {
- ECM_IPA_ERROR("can't disconnect without connect first\n");
+ next_state = ecm_ipa_next_state(ecm_ipa_ctx->state, ECM_IPA_DISCONNECT);
+ if (next_state == ECM_IPA_INVALID) {
+ ECM_IPA_ERROR("can't disconnect before connect\n");
return -EPERM;
}
+ ecm_ipa_ctx->state = next_state;
+ ECM_IPA_STATE_DEBUG(ecm_ipa_ctx);
netif_carrier_off(ecm_ipa_ctx->net);
pr_debug("carrier_off notifcation was sent\n");
@@ -569,9 +611,6 @@
netif_stop_queue(ecm_ipa_ctx->net);
pr_debug("queue stopped\n");
- ecm_ipa_ctx->mode = ECM_IPA_INITIALIZED;
- ECM_IPA_MODE(ecm_ipa_ctx);
-
ECM_IPA_LOG_EXIT();
return 0;
@@ -598,6 +637,7 @@
void ecm_ipa_cleanup(void *priv)
{
struct ecm_ipa_dev *ecm_ipa_ctx = priv;
+ int next_state;
ECM_IPA_LOG_ENTRY();
@@ -608,9 +648,13 @@
return;
}
- if (!ecm_ipa_state_validate(ecm_ipa_ctx->mode, ECM_IPA_LOADED))
+ next_state = ecm_ipa_next_state(ecm_ipa_ctx->state, ECM_IPA_CLEANUP);
+ if (next_state == ECM_IPA_INVALID) {
ECM_IPA_ERROR("can't clean driver without cable disconnect\n");
-
+ return;
+ }
+ ecm_ipa_ctx->state = next_state;
+ ECM_IPA_STATE_DEBUG(ecm_ipa_ctx);
ecm_ipa_destory_rm_resource(ecm_ipa_ctx);
ecm_ipa_debugfs_destroy(ecm_ipa_ctx);
@@ -619,7 +663,6 @@
free_netdev(ecm_ipa_ctx->net);
pr_debug("cleanup done\n");
- ecm_ipa_ctx = NULL;
ECM_IPA_LOG_EXIT();
return ;
@@ -1224,46 +1267,87 @@
return 0;
}
-/** ecm_ipa_state_validate - check if a state transition is allowed
+/** ecm_ipa_next_state - return the next state of the driver
+ * @current_state: the current state of the driver
+ * @operation: an enum which represent the operation being made on the driver
+ * by its API.
*
- * Allowed transition:
- * LOADED->INITIALIZED: ecm_ipa_init()
- * INITIALIZED->CONNECTED: ecm_ipa_connect()
- * CONNECTED->INITIALIZED: ecm_ipa_disconnect()
- * CONNECTED->UP: ecm_ipa_open()
- * UP->CONNECTED: ecm_ipa_stop()
- * UP->INITIALIZED: ecm_ipa_disconnect()
- * INITIALIZED-> LOADED
+ * This function implements the driver internal state machine.
+ * Its decisions are based on the driver current state and the operation
+ * being made.
+ * In case the operation is invalid this state machine will return
+ * the value ECM_IPA_INVALID to inform the caller for a forbidden sequence.
*/
-static bool ecm_ipa_state_validate(enum ecm_ipa_mode current_mode,
- enum ecm_ipa_mode new_mode)
+static enum ecm_ipa_state ecm_ipa_next_state(enum ecm_ipa_state current_state,
+ enum ecm_ipa_operation operation)
{
- bool result;
+ int next_state = ECM_IPA_INVALID;
- switch (current_mode) {
- case ECM_IPA_LOADED:
- result = (new_mode == ECM_IPA_INITIALIZED);
+ switch (current_state) {
+ case ECM_IPA_UNLOADED:
+ if (operation == ECM_IPA_INITIALIZE)
+ next_state = ECM_IPA_INITIALIZED;
break;
case ECM_IPA_INITIALIZED:
- result = (new_mode == ECM_IPA_CONNECTED ||
- new_mode == ECM_IPA_LOADED);
+ if (operation == ECM_IPA_CONNECT)
+ next_state = ECM_IPA_CONNECTED;
+ else if (operation == ECM_IPA_OPEN)
+ next_state = ECM_IPA_UP;
+ else if (operation == ECM_IPA_CLEANUP)
+ next_state = ECM_IPA_UNLOADED;
break;
case ECM_IPA_CONNECTED:
- result = (new_mode == ECM_IPA_INITIALIZED ||
- new_mode == ECM_IPA_UP);
+ if (operation == ECM_IPA_DISCONNECT)
+ next_state = ECM_IPA_INITIALIZED;
+ else if (operation == ECM_IPA_OPEN)
+ next_state = ECM_IPA_CONNECTED_AND_UP;
break;
case ECM_IPA_UP:
- result = (new_mode == ECM_IPA_CONNECTED ||
- new_mode == ECM_IPA_INITIALIZED);
+ if (operation == ECM_IPA_STOP)
+ next_state = ECM_IPA_INITIALIZED;
+ else if (operation == ECM_IPA_CONNECT)
+ next_state = ECM_IPA_CONNECTED_AND_UP;
+ break;
+ case ECM_IPA_CONNECTED_AND_UP:
+ if (operation == ECM_IPA_STOP)
+ next_state = ECM_IPA_CONNECTED;
+ else if (operation == ECM_IPA_DISCONNECT)
+ next_state = ECM_IPA_UP;
break;
default:
- result = false;
+ ECM_IPA_ERROR("State is not supported\n");
break;
}
- pr_debug("state transition (%d->%d)- %s\n", current_mode,
- new_mode , result ? "Allowed" : "Forbidden");
- return result;
+ pr_debug("state transition ( %s -> %s )- %s\n",
+ ecm_ipa_state_string(current_state),
+ ecm_ipa_state_string(next_state) ,
+ next_state == ECM_IPA_INVALID ?
+ "Forbidden" : "Allowed");
+
+ return next_state;
+}
+
+/**
+ * ecm_ipa_state_string - return the state string representation
+ * @state: enum which describe the state
+ */
+static const char *ecm_ipa_state_string(enum ecm_ipa_state state)
+{
+ switch (state) {
+ case ECM_IPA_UNLOADED:
+ return "ECM_IPA_UNLOADED";
+ case ECM_IPA_INITIALIZED:
+ return "ECM_IPA_INITIALIZED";
+ case ECM_IPA_CONNECTED:
+ return "ECM_IPA_CONNECTED";
+ case ECM_IPA_UP:
+ return "ECM_IPA_UP";
+ case ECM_IPA_CONNECTED_AND_UP:
+ return "ECM_IPA_CONNECTED_AND_UP";
+ default:
+ return "Not supported";
+ }
}
/**
diff --git a/drivers/net/ethernet/msm/msm_rmnet_smux.c b/drivers/net/ethernet/msm/msm_rmnet_smux.c
index 5fe724e..e2bd82d 100644
--- a/drivers/net/ethernet/msm/msm_rmnet_smux.c
+++ b/drivers/net/ethernet/msm/msm_rmnet_smux.c
@@ -55,7 +55,7 @@
#define DBG2(x...) DBG(DEBUG_MASK_LVL2, x)
/* Configure device instances */
-#define RMNET_SMUX_DEVICE_COUNT (1)
+#define RMNET_SMUX_DEVICE_COUNT (2)
/* allow larger frames */
#define RMNET_DATA_LEN 2000
diff --git a/drivers/net/ethernet/msm/qfec.c b/drivers/net/ethernet/msm/qfec.c
index a1ba0dc..164b734 100644
--- a/drivers/net/ethernet/msm/qfec.c
+++ b/drivers/net/ethernet/msm/qfec.c
@@ -1,4 +1,4 @@
-/* Copyright (c) 2010-2012, The Linux Foundation. All rights reserved.
+/* Copyright (c) 2010-2013, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -30,11 +30,12 @@
#include <linux/net_tstamp.h>
#include <linux/phy.h>
#include <linux/inet.h>
+#include <asm/div64.h>
#include "qfec.h"
#define QFEC_NAME "qfec"
-#define QFEC_DRV_VER "Nov 29 2011"
+#define QFEC_DRV_VER "Apr 09 2013"
#define ETH_BUF_SIZE 0x600
#define MAX_N_BD 50
@@ -646,7 +647,7 @@
{ 1, TS_HI_UPDT_REG, "TS_HI_UPDATE_REG", 0 },
{ 1, TS_LO_UPDT_REG, "TS_LO_UPDATE_REG", 0 },
- { 0, TS_SUB_SEC_INCR_REG, "TS_SUB_SEC_INCR_REG", 1 },
+ { 0, TS_SUB_SEC_INCR_REG, "TS_SUB_SEC_INCR_REG", 40 },
{ 0, TS_CTL_REG, "TS_CTL_REG", TS_CTL_TSENALL
| TS_CTL_TSCTRLSSR
| TS_CTL_TSINIT
@@ -1025,13 +1026,18 @@
/*
* configure PTP divider for 25 MHz assuming EMAC PLL 250 MHz
*/
-
static struct qfec_pll_cfg qfec_pll_ptp = {
- /* 19.2 MHz tcxo */
- 0, 0, ETH_NS_PRE_DIV(0)
- | EMAC_PTP_NS_ROOT_EN
- | EMAC_PTP_NS_CLK_EN
- | CLK_SRC_TCXO
+ 0,
+
+ ETH_MD_M(1) | ETH_MD_2D_N(10),
+
+ ETH_NS_NM(10-1) |
+ EMAC_PTP_NS_ROOT_EN |
+ EMAC_PTP_NS_CLK_EN |
+ ETH_NS_MCNTR_EN |
+ ETH_NS_MCNTR_MODE_DUAL |
+ ETH_NS_PRE_DIV(0) |
+ CLK_SRC_PLL_EMAC
};
#define PLLTEST_PAD_CFG 0x01E0
@@ -1404,93 +1410,189 @@
}
/*
- * process timestamp values
- * The pbuf and next fields of the buffer descriptors are overwritten
- * with the timestamp high and low register values.
+ * The Ethernet core includes IEEE-1588 support. This includes
+ * TS_HIGH_REG and TS_LOW_REG registers driven by an external clock.
+ * Each external clock cycle causes the TS_LOW_REG register to
+ * increment by the value in TS_SUB_SEC_INCR_REG (e.g. set to 40 using
+ * a 25 MHz clock). Unfortunately, TS_HIGH_REG increments when
+ * TS_LOW_REG overflows at 2^31 instead of 10^9.
*
- * The low register is incremented by the value in the subsec_increment
- * register and overflows at 0x8000 0000 causing the high register to
- * increment.
+ * Conversion requires scaling (dividing) the 63-bit concatenated
+ * timestamp register value by 10^9 to determine seconds, and taking
+ * the remainder to determine nsec. Since division is to be avoided,
+ * a combination of multiplication and shift (>>) minimizes the number
+ * of operations.
*
- * The subsec_increment register is recommended to be set to the number
- * of nanosec corresponding to each clock tic, scaled by 2^31 / 10^9
- * (e.g. 40 * 2^32 / 10^9 = 85.9, or 86 for 25 MHz). However, the
- * rounding error in this case will result in a 1 sec error / ~14 mins.
- *
- * An alternate approach is used. The subsec_increment is set to 1,
- * and the concatenation of the 2 timestamp registers used to count
- * clock tics. The 63-bit result is manipulated to determine the number
- * of sec and ns.
+ * To avoid loss of data, the timestamp value is multipled by 2<<30 /
+ * 10^9, and the result scaled by 2<<30 (i.e. >> 30). The shift value
+ * of 30 is determining the log-2 value of the denominator (10^9),
+ * 29.9, and rounding up, 30.
*/
-
-/*
- * convert 19.2 MHz clock tics into sec/ns
+/* ------------------------------------------------
+ * conversion factors
*/
#define TS_LOW_REG_BITS 31
+#define TS_LOW_REG_MASK (((uint64_t)1 << TS_LOW_REG_BITS) - 1)
#define MILLION 1000000UL
#define BILLION 1000000000UL
-#define F_CLK 19200000UL
-#define F_CLK_PRE_SC 24
-#define F_CLK_INV_Q 56
-#define F_CLK_INV (((unsigned long long)1 << F_CLK_INV_Q) / F_CLK)
+#define F_CLK BILLION
+#define F_CLK_PRE_SC 30
+#define F_CLK_INV_Q 60
+#define F_CLK_INV (((uint64_t)1 << F_CLK_INV_Q) / F_CLK)
+
#define F_CLK_TO_NS_Q 25
#define F_CLK_TO_NS \
- (((((unsigned long long)1<<F_CLK_TO_NS_Q)*BILLION)+(F_CLK-1))/F_CLK)
-#define US_TO_F_CLK_Q 20
-#define US_TO_F_CLK \
- (((((unsigned long long)1<<US_TO_F_CLK_Q)*F_CLK)+(MILLION-1))/MILLION)
+ (((((uint64_t)1<<F_CLK_TO_NS_Q)*BILLION)+(F_CLK/2))/F_CLK)
-static inline void qfec_get_sec(uint64_t *cnt,
- uint32_t *sec, uint32_t *ns)
+#define NS_TO_F_CLK_Q 30
+#define NS_TO_F_CLK \
+ (((((uint64_t)1<<NS_TO_F_CLK_Q)*F_CLK)+(BILLION/2))/BILLION)
+
+/*
+ * qfec_hilo_collapse - The ptp timestamp low register is a 31 bit
+ * quantity. Its high order bit is a control bit, thus unused in time
+ * representation. This routine combines the high and low registers,
+ * collapsing out said bit (ie. making a 63 bit quantity), and then
+ * separates the new 63 bit value into high and low 32 bit values...
+ */
+static inline void qfec_hilo_collapse(
+ uint32_t tsRegHi,
+ uint32_t tsRegLo,
+ uint32_t *tsRegHiPtr,
+ uint32_t *tsRegLoPtr)
{
- unsigned long long t;
- unsigned long long subsec;
+ uint64_t cnt;
- t = *cnt >> F_CLK_PRE_SC;
- t *= F_CLK_INV;
- t >>= F_CLK_INV_Q - F_CLK_PRE_SC;
- *sec = t;
+ cnt = tsRegHi;
+ cnt <<= TS_LOW_REG_BITS;
+ cnt |= tsRegLo;
- t = *cnt - (t * F_CLK);
- subsec = t;
+ *tsRegHiPtr = cnt >> 32;
+ *tsRegLoPtr = cnt & 0xffffffff;
+}
- if (subsec >= F_CLK) {
- subsec -= F_CLK;
- *sec += 1;
+/*
+ * qfec_hilo_2secnsec - converts Etherent timestamp register values to
+ * sec and nsec
+ */
+static inline void qfec_hilo_2secnsec(
+ uint32_t tsRegHi,
+ uint32_t tsRegLo,
+ uint32_t *secPtr,
+ uint32_t *nsecPtr)
+{
+ uint64_t cnt;
+ uint64_t hi;
+ uint64_t subsec = 0;
+
+ cnt = tsRegHi;
+ cnt <<= TS_LOW_REG_BITS;
+ cnt += tsRegLo;
+
+ hi = cnt >> F_CLK_PRE_SC;
+ hi *= F_CLK_INV;
+ hi >>= F_CLK_INV_Q - F_CLK_PRE_SC;
+
+ *secPtr = hi;
+ subsec = cnt - (hi * F_CLK);
+
+ while (subsec > F_CLK) {
+ subsec -= F_CLK;
+ *secPtr += 1;
}
- subsec *= F_CLK_TO_NS;
- subsec >>= F_CLK_TO_NS_Q;
- *ns = subsec;
+ *nsecPtr = subsec;
+}
+
+/*
+ * qfec_secnsec_2hilo - converts sec and nsec to Etherent timestamp
+ * register values
+ */
+static inline void qfec_secnsec_2hilo(
+ uint32_t sec,
+ uint32_t nsec,
+ uint32_t *tsRegHiPtr,
+ uint32_t *tsRegLoPtr)
+{
+ uint64_t cnt;
+ uint64_t subsec;
+
+ subsec = nsec;
+
+ cnt = F_CLK;
+ cnt *= sec;
+ cnt += subsec;
+
+ *tsRegHiPtr = cnt >> TS_LOW_REG_BITS;
+ *tsRegLoPtr = cnt & TS_LOW_REG_MASK;
+}
+
+/*
+ * qfec_reg_and_time --
+ *
+ * This function does two things:
+ *
+ * 1) Retrieves and returns the high and low time registers, and
+ *
+ * 2) Converts then returns those high and low register values as
+ * their seconds and nanoseconds equivalents.
+ */
+static inline void qfec_reg_and_time(
+ struct qfec_priv *privPtr,
+ uint32_t *tsHiPtr,
+ uint32_t *tsLoPtr,
+ uint32_t *secPtr,
+ uint32_t *nsecPtr)
+{
+ /*
+ * Read/capture the high and low timestamp registers values.
+ *
+ * Insure that the high register's value doesn't increment during read.
+ */
+ do {
+ *tsHiPtr = qfec_reg_read(privPtr, TS_HIGH_REG);
+ *tsLoPtr = qfec_reg_read(privPtr, TS_LOW_REG);
+ } while (*tsHiPtr != qfec_reg_read(privPtr, TS_HIGH_REG));
+
+ /*
+ * Convert high and low time registers to secs and nsecs...
+ */
+ qfec_hilo_2secnsec(*tsHiPtr, *tsLoPtr, secPtr, nsecPtr);
}
/*
* read ethernet timestamp registers, pass up raw register values
* and values converted to sec/ns
*/
-static void qfec_read_timestamp(struct buf_desc *p_bd,
+static void qfec_read_timestamp(
+ struct buf_desc *p_bd,
struct skb_shared_hwtstamps *ts)
{
- unsigned long long cnt;
- unsigned int sec;
- unsigned int subsec;
+ uint32_t ts_hi;
+ uint32_t ts_lo;
+ uint32_t ts_hi63;
+ uint32_t ts_lo63;
+ uint32_t sec;
+ uint32_t nsec;
- cnt = (unsigned long)qfec_bd_next_get(p_bd);
- cnt <<= TS_LOW_REG_BITS;
- cnt |= (unsigned long)qfec_bd_pbuf_get(p_bd);
+ ts_hi = (uint32_t) qfec_bd_next_get(p_bd);
+ ts_lo = (uint32_t) qfec_bd_pbuf_get(p_bd);
- /* report raw counts as concatenated 63 bits */
- sec = cnt >> 32;
- subsec = cnt & 0xffffffff;
+ /*
+ * Combine (then separate) raw registers into 63 (then 32) bit...
+ */
+ qfec_hilo_collapse(ts_hi, ts_lo, &ts_hi63, &ts_lo63);
- ts->hwtstamp = ktime_set(sec, subsec);
+ ts->hwtstamp = ktime_set(ts_hi63, ts_lo63);
- /* translate counts to sec and ns */
- qfec_get_sec(&cnt, &sec, &subsec);
+ /*
+ * Translate raw registers to sec and ns
+ */
+ qfec_hilo_2secnsec(ts_hi, ts_lo, &sec, &nsec);
- ts->syststamp = ktime_set(sec, subsec);
+ ts->syststamp = ktime_set(sec, nsec);
}
/*
@@ -1502,31 +1604,28 @@
struct qfec_priv *priv = netdev_priv(to_net_dev(dev));
struct timeval tv;
- if (!strncmp(buf, "setTs", 5)) {
- unsigned long long cnt;
- uint32_t ts_hi;
- uint32_t ts_lo;
- unsigned long long subsec;
+ if (!strncmp(buf, "setTs", 5)) {
+ uint32_t ts_hi;
+ uint32_t ts_lo;
+ uint32_t cr;
do_gettimeofday(&tv);
- /* convert raw sec/usec to ns */
- subsec = tv.tv_usec;
- subsec *= US_TO_F_CLK;
- subsec >>= US_TO_F_CLK_Q;
-
- cnt = tv.tv_sec;
- cnt *= F_CLK;
- cnt += subsec;
-
- ts_hi = cnt >> 31;
- ts_lo = cnt & 0x7FFFFFFF;
+ /* convert raw sec/usec to hi/low registers */
+ qfec_secnsec_2hilo(tv.tv_sec, tv.tv_usec * 1000,
+ &ts_hi, &ts_lo);
qfec_reg_write(priv, TS_HI_UPDT_REG, ts_hi);
qfec_reg_write(priv, TS_LO_UPDT_REG, ts_lo);
- qfec_reg_write(priv, TS_CTL_REG,
- qfec_reg_read(priv, TS_CTL_REG) | TS_CTL_TSINIT);
+ /*
+ * TS_CTL_TSINIT bit cannot be written until it is 0, hence the
+ * following while loop will run until the bit transitions to 0
+ */
+ while ((cr = qfec_reg_read(priv, TS_CTL_REG)) & TS_CTL_TSINIT)
+ ;
+
+ qfec_reg_write(priv, TS_CTL_REG, cr | TS_CTL_TSINIT);
} else
pr_err("%s: unknown cmd, %s.\n", __func__, buf);
@@ -1534,6 +1633,139 @@
}
/*
+ * Do a "slam" of a very particular time into the time registers...
+ */
+static int qfec_slam(
+ struct device *dev,
+ struct device_attribute *attr,
+ const char *buf,
+ size_t count)
+{
+ struct qfec_priv *priv = netdev_priv(to_net_dev(dev));
+ uint32_t sec = 0;
+ uint32_t nsec = 0;
+
+ if (sscanf(buf, "%u %u", &sec, &nsec) == 2) {
+ uint32_t ts_hi;
+ uint32_t ts_lo;
+ uint32_t cr;
+
+ qfec_secnsec_2hilo(sec, nsec, &ts_hi, &ts_lo);
+
+ qfec_reg_write(priv, TS_HI_UPDT_REG, ts_hi);
+ qfec_reg_write(priv, TS_LO_UPDT_REG, ts_lo);
+
+ /*
+ * TS_CTL_TSINIT bit cannot be written until it is 0, hence the
+ * following while loop will run until the bit transitions to 0
+ */
+ while ((cr = qfec_reg_read(priv, TS_CTL_REG)) & TS_CTL_TSINIT)
+ ;
+
+ qfec_reg_write(priv, TS_CTL_REG, cr | TS_CTL_TSINIT);
+ } else
+ pr_err("%s: bad offset value, %s.\n", __func__, buf);
+
+ return strnlen(buf, count);
+}
+
+/*
+ * Do a coarse time ajustment (ie. coarsely adjust (+/-) the time
+ * registers by the passed offset)
+ */
+static int qfec_cadj(
+ struct device *dev,
+ struct device_attribute *attr,
+ const char *buf,
+ size_t count)
+{
+ struct qfec_priv *priv = netdev_priv(to_net_dev(dev));
+ int64_t offset = 0;
+
+ if (sscanf(buf, "%lld", &offset) == 1) {
+ uint64_t newOffset;
+ uint32_t sec;
+ uint32_t nsec;
+ uint32_t ts_hi;
+ uint32_t ts_lo;
+ uint32_t cr;
+
+ qfec_reg_and_time(priv, &ts_hi, &ts_lo, &sec, &nsec);
+
+ newOffset = (((uint64_t) sec * BILLION) + (uint64_t) nsec)
+ + offset;
+
+ nsec = do_div(newOffset, BILLION);
+ sec = newOffset;
+
+ qfec_secnsec_2hilo(sec, nsec, &ts_hi, &ts_lo);
+
+ qfec_reg_write(priv, TS_HI_UPDT_REG, ts_hi);
+ qfec_reg_write(priv, TS_LO_UPDT_REG, ts_lo);
+
+ /*
+ * The TS_CTL_TSINIT bit cannot be written until it is 0,
+ * hence the following while loop will run until the bit
+ * transitions to 0
+ */
+ while ((cr = qfec_reg_read(priv, TS_CTL_REG)) & TS_CTL_TSINIT)
+ ;
+
+ qfec_reg_write(priv, TS_CTL_REG, cr | TS_CTL_TSINIT);
+ } else
+ pr_err("%s: bad offset value, %s.\n", __func__, buf);
+
+ return strnlen(buf, count);
+}
+
+/*
+ * Do a fine time ajustment (ie. have the timestamp registers adjust
+ * themselves by the passed amount).
+ */
+static int qfec_fadj(
+ struct device *dev,
+ struct device_attribute *attr,
+ const char *buf,
+ size_t count)
+{
+ struct qfec_priv *priv = netdev_priv(to_net_dev(dev));
+ int64_t offset = 0;
+
+ if (sscanf(buf, "%lld", &offset) == 1) {
+ uint32_t direction = 0;
+ uint32_t cr;
+ uint32_t sec, nsec;
+ uint32_t ts_hi, ts_lo;
+
+ if (offset < 0) {
+ direction = 1 << TS_LOW_REG_BITS;
+ offset *= -1;
+ }
+
+ nsec = do_div(offset, BILLION);
+ sec = offset;
+
+ qfec_secnsec_2hilo(sec, nsec, &ts_hi, &ts_lo);
+
+ qfec_reg_write(priv, TS_HI_UPDT_REG, ts_hi);
+ qfec_reg_write(priv, TS_LO_UPDT_REG, ts_lo | direction);
+
+ /*
+ * As per the hardware documentation, the TS_CTL_TSUPDT bit
+ * cannot be written until it is 0, hence the following while
+ * loop will run until the bit transitions to 0...
+ */
+ while ((cr = qfec_reg_read(priv, TS_CTL_REG)) & TS_CTL_TSUPDT)
+ ;
+
+ qfec_reg_write(priv, TS_CTL_REG, cr | TS_CTL_TSUPDT);
+ } else
+ pr_err("%s: bad offset value, %s.\n", __func__, buf);
+
+ return strnlen(buf, count);
+}
+
+/*
* display ethernet tstamp and system time
*/
static int qfec_tstamp_show(struct device *dev, struct device_attribute *attr,
@@ -1543,32 +1775,54 @@
int count = PAGE_SIZE;
int l;
struct timeval tv;
- unsigned long long cnt;
uint32_t sec;
- uint32_t ns;
+ uint32_t nsec;
uint32_t ts_hi;
uint32_t ts_lo;
- /* insure that ts_hi didn't increment during read */
- do {
- ts_hi = qfec_reg_read(priv, TS_HIGH_REG);
- ts_lo = qfec_reg_read(priv, TS_LOW_REG);
- } while (ts_hi != qfec_reg_read(priv, TS_HIGH_REG));
+ qfec_reg_and_time(priv, &ts_hi, &ts_lo, &sec, &nsec);
- cnt = ts_hi;
- cnt <<= TS_LOW_REG_BITS;
- cnt |= ts_lo;
+ qfec_hilo_collapse(ts_hi, ts_lo, &ts_hi, &ts_lo);
do_gettimeofday(&tv);
- ts_hi = cnt >> 32;
- ts_lo = cnt & 0xffffffff;
-
- qfec_get_sec(&cnt, &sec, &ns);
-
l = snprintf(buf, count,
"%12u.%09u sec 0x%08x 0x%08x tstamp %12u.%06u time-of-day\n",
- sec, ns, ts_hi, ts_lo, (int)tv.tv_sec, (int)tv.tv_usec);
+ sec, nsec, ts_hi, ts_lo, (int)tv.tv_sec, (int)tv.tv_usec);
+
+ return l;
+}
+
+/*
+ * display ethernet mac time as well as the time of the next mac pps
+ * pulse...
+ */
+static int qfec_mtnp_show(
+ struct device *dev,
+ struct device_attribute *attr,
+ char *buf)
+{
+ struct qfec_priv *priv = netdev_priv(to_net_dev(dev));
+ int count = PAGE_SIZE;
+ int l;
+ uint32_t ts_hi;
+ uint32_t ts_lo;
+ uint32_t sec;
+ uint32_t nsec;
+ uint32_t ppsSec;
+ uint32_t ppsNsec;
+
+ qfec_reg_and_time(priv, &ts_hi, &ts_lo, &sec, &nsec);
+
+ /*
+ * Convert high and low to time of next rollover (ie. PPS
+ * pulse)...
+ */
+ qfec_hilo_2secnsec(ts_hi + 1, 0, &ppsSec, &ppsNsec);
+
+ l = snprintf(buf, count,
+ "%u %u %u %u\n",
+ sec, nsec, ppsSec, ppsNsec);
return l;
}
@@ -2549,6 +2803,10 @@
static DEVICE_ATTR(mdio, 0444, qfec_mdio_show, NULL);
static DEVICE_ATTR(stats, 0444, qfec_stats_show, NULL);
static DEVICE_ATTR(tstamp, 0444, qfec_tstamp_show, NULL);
+static DEVICE_ATTR(slam, 0222, NULL, qfec_slam);
+static DEVICE_ATTR(cadj, 0222, NULL, qfec_cadj);
+static DEVICE_ATTR(fadj, 0222, NULL, qfec_fadj);
+static DEVICE_ATTR(mtnp, 0444, qfec_mtnp_show, NULL);
static void qfec_sysfs_create(struct net_device *dev)
{
@@ -2561,7 +2819,11 @@
device_create_file(&(dev->dev), &dev_attr_mdio) ||
device_create_file(&(dev->dev), &dev_attr_reg) ||
device_create_file(&(dev->dev), &dev_attr_stats) ||
- device_create_file(&(dev->dev), &dev_attr_tstamp))
+ device_create_file(&(dev->dev), &dev_attr_tstamp) ||
+ device_create_file(&(dev->dev), &dev_attr_slam) ||
+ device_create_file(&(dev->dev), &dev_attr_cadj) ||
+ device_create_file(&(dev->dev), &dev_attr_fadj) ||
+ device_create_file(&(dev->dev), &dev_attr_mtnp))
pr_err("qfec_sysfs_create failed to create sysfs files\n");
}
diff --git a/drivers/net/usb/rmnet_usb_ctrl.h b/drivers/net/usb/rmnet_usb.h
similarity index 61%
rename from drivers/net/usb/rmnet_usb_ctrl.h
rename to drivers/net/usb/rmnet_usb.h
index f0c169f..36002df 100644
--- a/drivers/net/usb/rmnet_usb_ctrl.h
+++ b/drivers/net/usb/rmnet_usb.h
@@ -1,4 +1,4 @@
-/* Copyright (c) 2011-2012, The Linux Foundation. All rights reserved.
+/* Copyright (c) 2011-2013, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -10,8 +10,8 @@
* GNU General Public License for more details.
*/
-#ifndef __RMNET_USB_CTRL_H
-#define __RMNET_USB_CTRL_H
+#ifndef __RMNET_USB_H
+#define __RMNET_USB_H
#include <linux/mutex.h>
#include <linux/usb.h>
@@ -19,7 +19,36 @@
#include <linux/usb/ch9.h>
#include <linux/usb/cdc.h>
-#define CTRL_DEV_MAX_LEN 10
+#define MAX_RMNET_DEVS 4
+#define MAX_RMNET_INSTS_PER_DEV 17
+#define TOTAL_RMNET_DEV_COUNT (MAX_RMNET_DEVS * MAX_RMNET_INSTS_PER_DEV)
+
+#define CTRL_DEV_MAX_LEN 10
+
+#define RMNET_CTRL_DEV_OPEN 0
+#define RMNET_CTRL_DEV_READY 1
+#define RMNET_CTRL_DEV_MUX_EN 2
+
+/*MUX header bit masks*/
+#define MUX_CTRL_MASK 0x1
+#define MUX_PAD_SHIFT 0x2
+
+/*max padding bytes for n byte alignment*/
+#define MAX_PAD_BYTES(n) (n-1)
+
+/*
+ *MUX Header Format
+ *BIT 0 : Mux type 0: Data, 1: control
+ *BIT 1: Reserved
+ *BIT 2-7: Pad bytes
+ *BIT 8-15: Mux ID
+ *BIT 16-31: PACKET_LEN_WITH_PADDING (Bytes)
+ */
+struct mux_hdr {
+ __u8 padding_info;
+ __u8 mux_id;
+ __le16 pkt_len_w_padding;
+} __packed;
struct rmnet_ctrl_dev {
@@ -28,6 +57,10 @@
struct cdev cdev;
struct device *devicep;
+ unsigned ch_id;
+
+ /*to identify the usb device*/
+ unsigned id;
struct usb_interface *intf;
unsigned int int_pipe;
@@ -48,24 +81,17 @@
struct workqueue_struct *wq;
struct work_struct get_encap_work;
- unsigned is_opened;
+ unsigned long status;
- bool is_connected;
+ bool claimed;
+
+ unsigned int mdm_wait_timeout;
/*input control lines (DSR, CTS, CD, RI)*/
unsigned int cbits_tolocal;
-
/*output control lines (DTR, RTS)*/
unsigned int cbits_tomdm;
- /*
- * track first resp available from mdm when it boots up
- * to avoid bigger timeout value used by qmuxd
- */
- bool resp_available;
-
- unsigned int mdm_wait_timeout;
-
/*counters*/
unsigned int snd_encap_cmd_cnt;
unsigned int get_encap_resp_cnt;
@@ -76,15 +102,16 @@
unsigned int zlp_cnt;
};
-extern struct rmnet_ctrl_dev *ctrl_dev[];
+extern struct workqueue_struct *usbnet_wq;
extern int rmnet_usb_ctrl_start_rx(struct rmnet_ctrl_dev *);
extern int rmnet_usb_ctrl_suspend(struct rmnet_ctrl_dev *dev);
-extern int rmnet_usb_ctrl_init(void);
-extern void rmnet_usb_ctrl_exit(void);
+extern int rmnet_usb_ctrl_init(int num_devs, int insts_per_dev);
+extern void rmnet_usb_ctrl_exit(int num_devs, int insts_per_dev);
extern int rmnet_usb_ctrl_probe(struct usb_interface *intf,
- struct usb_host_endpoint *status,
- struct rmnet_ctrl_dev *dev);
+ struct usb_host_endpoint *int_in,
+ unsigned long rmnet_devnum,
+ unsigned long *data);
extern void rmnet_usb_ctrl_disconnect(struct rmnet_ctrl_dev *);
#endif /* __RMNET_USB_H*/
diff --git a/drivers/net/usb/rmnet_usb_ctrl.c b/drivers/net/usb/rmnet_usb_ctrl.c
index 283c6b0..0772592 100644
--- a/drivers/net/usb/rmnet_usb_ctrl.c
+++ b/drivers/net/usb/rmnet_usb_ctrl.c
@@ -1,4 +1,4 @@
-/* Copyright (c) 2011-2012, The Linux Foundation. All rights reserved.
+/* Copyright (c) 2011-2013, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -19,10 +19,11 @@
#include <linux/poll.h>
#include <linux/ratelimit.h>
#include <linux/debugfs.h>
-#include "rmnet_usb_ctrl.h"
+#include "rmnet_usb.h"
-#define DEVICE_NAME "hsicctl"
-#define NUM_CTRL_CHANNELS 4
+static char *rmnet_dev_names[MAX_RMNET_DEVS] = {"hsicctl"};
+module_param_array(rmnet_dev_names, charp, NULL, S_IRUGO | S_IWUSR);
+
#define DEFAULT_READ_URB_LENGTH 0x1000
#define UNLINK_TIMEOUT_MS 500 /*random value*/
@@ -93,13 +94,19 @@
pr_info(x); \
} while (0)
-struct rmnet_ctrl_dev *ctrl_dev[NUM_CTRL_CHANNELS];
-struct class *ctrldev_classp;
-static dev_t ctrldev_num;
+/* passed in rmnet_usb_ctrl_init */
+static int num_devs;
+static int insts_per_dev;
+
+/* dynamically allocated 2-D array of num_devs*insts_per_dev ctrl_devs */
+static struct rmnet_ctrl_dev **ctrl_devs;
+static struct class *ctrldev_classp[MAX_RMNET_DEVS];
+static dev_t ctrldev_num[MAX_RMNET_DEVS];
struct ctrl_pkt {
size_t data_size;
void *data;
+ void *ctxt;
};
struct ctrl_pkt_list_elem {
@@ -109,18 +116,56 @@
static void resp_avail_cb(struct urb *);
-static int is_dev_connected(struct rmnet_ctrl_dev *dev)
+static int rmnet_usb_ctrl_dmux(struct ctrl_pkt_list_elem *clist)
{
- if (dev) {
- mutex_lock(&dev->dev_lock);
- if (!dev->is_connected) {
- mutex_unlock(&dev->dev_lock);
- return 0;
- }
- mutex_unlock(&dev->dev_lock);
- return 1;
+ struct mux_hdr *hdr;
+ size_t pad_len;
+ size_t total_len;
+ unsigned int mux_id;
+
+ hdr = (struct mux_hdr *)clist->cpkt.data;
+ pad_len = hdr->padding_info >> MUX_PAD_SHIFT;
+ if (pad_len > MAX_PAD_BYTES(4)) {
+ pr_err_ratelimited("%s: Invalid pad len %d\n", __func__,
+ pad_len);
+ return -EINVAL;
}
- return 0;
+
+ mux_id = hdr->mux_id;
+ if (!mux_id || mux_id > insts_per_dev) {
+ pr_err_ratelimited("%s: Invalid mux id %d\n", __func__, mux_id);
+ return -EINVAL;
+ }
+
+ total_len = le16_to_cpu(hdr->pkt_len_w_padding);
+ if (!total_len || !(total_len - pad_len)) {
+ pr_err_ratelimited("%s: Invalid pkt length %d\n", __func__,
+ total_len);
+ return -EINVAL;
+ }
+
+ clist->cpkt.data_size = total_len - pad_len;
+
+ return mux_id - 1;
+}
+
+static void rmnet_usb_ctrl_mux(unsigned int id, struct ctrl_pkt *cpkt)
+{
+ struct mux_hdr *hdr;
+ size_t len;
+ size_t pad_len = 0;
+
+ hdr = (struct mux_hdr *)cpkt->data;
+ hdr->mux_id = id + 1;
+ len = cpkt->data_size - sizeof(struct mux_hdr) - MAX_PAD_BYTES(4);
+
+ /*add padding if len is not 4 byte aligned*/
+ pad_len = ALIGN(len, 4) - len;
+
+ hdr->pkt_len_w_padding = cpu_to_le16(len + pad_len);
+ hdr->padding_info = (pad_len << MUX_PAD_SHIFT) | MUX_CTRL_MASK;
+
+ cpkt->data_size = sizeof(struct mux_hdr) + hdr->pkt_len_w_padding;
}
static void get_encap_work(struct work_struct *w)
@@ -130,6 +175,9 @@
container_of(w, struct rmnet_ctrl_dev, get_encap_work);
int status;
+ if (!test_bit(RMNET_CTRL_DEV_READY, &dev->status))
+ return;
+
udev = interface_to_usbdev(dev->intf);
status = usb_autopm_get_interface(dev->intf);
@@ -216,14 +264,17 @@
case USB_CDC_NOTIFY_RESPONSE_AVAILABLE:
dev->resp_avail_cnt++;
- usb_mark_last_busy(udev);
- queue_work(dev->wq, &dev->get_encap_work);
-
- if (!dev->resp_available) {
- dev->resp_available = true;
+ /* If MUX is not enabled, wakeup up the open process
+ * upon first notify response available.
+ */
+ if (!test_bit(RMNET_CTRL_DEV_READY, &dev->status)) {
+ set_bit(RMNET_CTRL_DEV_READY, &dev->status);
wake_up(&dev->open_wait_queue);
}
+ usb_mark_last_busy(udev);
+ queue_work(dev->wq, &dev->get_encap_work);
+
return;
default:
dev_err(dev->devicep,
@@ -246,9 +297,9 @@
{
struct usb_device *udev;
struct ctrl_pkt_list_elem *list_elem = NULL;
- struct rmnet_ctrl_dev *dev = urb->context;
+ struct rmnet_ctrl_dev *rx_dev, *dev = urb->context;
void *cpkt;
- int status = 0;
+ int ch_id, status = 0;
size_t cpkt_size = 0;
udev = interface_to_usbdev(dev->intf);
@@ -258,7 +309,6 @@
switch (urb->status) {
case 0:
/*success*/
- dev->get_encap_resp_cnt++;
break;
/*do not resubmit*/
@@ -303,11 +353,27 @@
}
memcpy(list_elem->cpkt.data, cpkt, cpkt_size);
list_elem->cpkt.data_size = cpkt_size;
- spin_lock(&dev->rx_lock);
- list_add_tail(&list_elem->list, &dev->rx_list);
- spin_unlock(&dev->rx_lock);
- wake_up(&dev->read_wait_queue);
+ rx_dev = dev;
+
+ if (test_bit(RMNET_CTRL_DEV_MUX_EN, &dev->status)) {
+ ch_id = rmnet_usb_ctrl_dmux(list_elem);
+ if (ch_id < 0) {
+ kfree(list_elem->cpkt.data);
+ kfree(list_elem);
+ goto resubmit_int_urb;
+ }
+
+ rx_dev = &ctrl_devs[dev->id][ch_id];
+ }
+
+ rx_dev->get_encap_resp_cnt++;
+
+ spin_lock(&rx_dev->rx_lock);
+ list_add_tail(&list_elem->list, &rx_dev->rx_list);
+ spin_unlock(&rx_dev->rx_lock);
+
+ wake_up(&rx_dev->read_wait_queue);
resubmit_int_urb:
/*check if it is already submitted in resume*/
@@ -340,8 +406,6 @@
static int rmnet_usb_ctrl_alloc_rx(struct rmnet_ctrl_dev *dev)
{
- int retval = -ENOMEM;
-
dev->rcvurb = usb_alloc_urb(0, GFP_KERNEL);
if (!dev->rcvurb) {
pr_err("%s: Error allocating read urb\n", __func__);
@@ -367,14 +431,14 @@
kfree(dev->rcvbuf);
kfree(dev->in_ctlreq);
- return retval;
+ return -ENOMEM;
}
static int rmnet_usb_ctrl_write_cmd(struct rmnet_ctrl_dev *dev)
{
struct usb_device *udev;
- if (!is_dev_connected(dev))
+ if (!test_bit(RMNET_CTRL_DEV_READY, &dev->status))
return -ENODEV;
udev = interface_to_usbdev(dev->intf);
@@ -389,7 +453,8 @@
static void ctrl_write_callback(struct urb *urb)
{
- struct rmnet_ctrl_dev *dev = urb->context;
+ struct ctrl_pkt *cpkt = urb->context;
+ struct rmnet_ctrl_dev *dev = cpkt->ctxt;
if (urb->status) {
dev->tx_ctrl_err_cnt++;
@@ -400,18 +465,19 @@
kfree(urb->setup_packet);
kfree(urb->transfer_buffer);
usb_free_urb(urb);
+ kfree(cpkt);
usb_autopm_put_interface_async(dev->intf);
}
-static int rmnet_usb_ctrl_write(struct rmnet_ctrl_dev *dev, char *buf,
- size_t size)
+static int rmnet_usb_ctrl_write(struct rmnet_ctrl_dev *dev,
+ struct ctrl_pkt *cpkt, size_t size)
{
int result;
struct urb *sndurb;
struct usb_ctrlrequest *out_ctlreq;
struct usb_device *udev;
- if (!is_dev_connected(dev))
+ if (!test_bit(RMNET_CTRL_DEV_READY, &dev->status))
return -ENETRESET;
udev = interface_to_usbdev(dev->intf);
@@ -435,12 +501,12 @@
out_ctlreq->bRequest = USB_CDC_SEND_ENCAPSULATED_COMMAND;
out_ctlreq->wValue = 0;
out_ctlreq->wIndex = dev->intf->cur_altsetting->desc.bInterfaceNumber;
- out_ctlreq->wLength = cpu_to_le16(size);
+ out_ctlreq->wLength = cpu_to_le16(cpkt->data_size);
usb_fill_control_urb(sndurb, udev,
usb_sndctrlpipe(udev, 0),
- (unsigned char *)out_ctlreq, (void *)buf, size,
- ctrl_write_callback, dev);
+ (unsigned char *)out_ctlreq, (void *)cpkt->data,
+ cpkt->data_size, ctrl_write_callback, cpkt);
result = usb_autopm_get_interface(dev->intf);
if (result < 0) {
@@ -483,16 +549,15 @@
if (!dev)
return -ENODEV;
- if (dev->is_opened)
+ if (test_bit(RMNET_CTRL_DEV_OPEN, &dev->status))
goto already_opened;
- /*block open to get first response available from mdm*/
- if (dev->mdm_wait_timeout && !dev->resp_available) {
+ if (dev->mdm_wait_timeout &&
+ !test_bit(RMNET_CTRL_DEV_READY, &dev->status)) {
retval = wait_event_interruptible_timeout(
- dev->open_wait_queue,
- dev->resp_available,
- msecs_to_jiffies(dev->mdm_wait_timeout *
- 1000));
+ dev->open_wait_queue,
+ test_bit(RMNET_CTRL_DEV_READY, &dev->status),
+ msecs_to_jiffies(dev->mdm_wait_timeout * 1000));
if (retval == 0) {
dev_err(dev->devicep, "%s: Timeout opening %s\n",
__func__, dev->name);
@@ -504,15 +569,13 @@
}
}
- if (!dev->resp_available) {
+ if (!test_bit(RMNET_CTRL_DEV_READY, &dev->status)) {
dev_dbg(dev->devicep, "%s: Connection timedout opening %s\n",
__func__, dev->name);
return -ETIMEDOUT;
}
- mutex_lock(&dev->dev_lock);
- dev->is_opened = 1;
- mutex_unlock(&dev->dev_lock);
+ set_bit(RMNET_CTRL_DEV_OPEN, &dev->status);
file->private_data = dev;
@@ -547,9 +610,7 @@
}
spin_unlock_irqrestore(&dev->rx_lock, flag);
- mutex_lock(&dev->dev_lock);
- dev->is_opened = 0;
- mutex_unlock(&dev->dev_lock);
+ clear_bit(RMNET_CTRL_DEV_OPEN, &dev->status);
time = usb_wait_anchor_empty_timeout(&dev->tx_submitted,
UNLINK_TIMEOUT_MS);
@@ -571,7 +632,7 @@
return POLLERR;
poll_wait(file, &dev->read_wait_queue, wait);
- if (!is_dev_connected(dev)) {
+ if (!test_bit(RMNET_CTRL_DEV_READY, &dev->status)) {
dev_dbg(dev->devicep, "%s: Device not connected\n",
__func__);
return POLLERR;
@@ -588,6 +649,7 @@
{
int retval = 0;
int bytes_to_read;
+ unsigned int hdr_len = 0;
struct rmnet_ctrl_dev *dev;
struct ctrl_pkt_list_elem *list_elem = NULL;
unsigned long flags;
@@ -599,7 +661,7 @@
DBG("%s: Read from %s\n", __func__, dev->name);
ctrl_read:
- if (!is_dev_connected(dev)) {
+ if (!test_bit(RMNET_CTRL_DEV_READY, &dev->status)) {
dev_dbg(dev->devicep, "%s: Device not connected\n",
__func__);
return -ENETRESET;
@@ -609,8 +671,8 @@
spin_unlock_irqrestore(&dev->rx_lock, flags);
retval = wait_event_interruptible(dev->read_wait_queue,
- !list_empty(&dev->rx_list) ||
- !is_dev_connected(dev));
+ !list_empty(&dev->rx_list) ||
+ !test_bit(RMNET_CTRL_DEV_READY, &dev->status));
if (retval < 0)
return retval;
@@ -628,7 +690,10 @@
}
spin_unlock_irqrestore(&dev->rx_lock, flags);
- if (copy_to_user(buf, list_elem->cpkt.data, bytes_to_read)) {
+ if (test_bit(RMNET_CTRL_DEV_MUX_EN, &dev->status))
+ hdr_len = sizeof(struct mux_hdr);
+
+ if (copy_to_user(buf, list_elem->cpkt.data + hdr_len, bytes_to_read)) {
dev_err(dev->devicep,
"%s: copy_to_user failed for %s\n",
__func__, dev->name);
@@ -651,7 +716,10 @@
size_t size, loff_t *pos)
{
int status;
+ size_t total_len;
void *wbuf;
+ void *actual_data;
+ struct ctrl_pkt *cpkt;
struct rmnet_ctrl_dev *dev = file->private_data;
if (!dev)
@@ -660,26 +728,46 @@
if (size <= 0)
return -EINVAL;
- if (!is_dev_connected(dev))
+ if (!test_bit(RMNET_CTRL_DEV_READY, &dev->status))
return -ENETRESET;
DBG("%s: Writing %i bytes on %s\n", __func__, size, dev->name);
- wbuf = kmalloc(size , GFP_KERNEL);
+ total_len = size;
+
+ if (test_bit(RMNET_CTRL_DEV_MUX_EN, &dev->status))
+ total_len += sizeof(struct mux_hdr) + MAX_PAD_BYTES(4);
+
+ wbuf = kmalloc(total_len , GFP_KERNEL);
if (!wbuf)
return -ENOMEM;
- status = copy_from_user(wbuf , buf, size);
+ cpkt = kmalloc(sizeof(struct ctrl_pkt), GFP_KERNEL);
+ if (!cpkt) {
+ kfree(wbuf);
+ return -ENOMEM;
+ }
+ actual_data = cpkt->data = wbuf;
+ cpkt->data_size = total_len;
+ cpkt->ctxt = dev;
+
+ if (test_bit(RMNET_CTRL_DEV_MUX_EN, &dev->status)) {
+ actual_data = wbuf + sizeof(struct mux_hdr);
+ rmnet_usb_ctrl_mux(dev->ch_id, cpkt);
+ }
+
+ status = copy_from_user(actual_data, buf, size);
if (status) {
dev_err(dev->devicep,
"%s: Unable to copy data from userspace %d\n",
__func__, status);
kfree(wbuf);
+ kfree(cpkt);
return status;
}
DUMP_BUFFER("Write: ", size, buf);
- status = rmnet_usb_ctrl_write(dev, wbuf, size);
+ status = rmnet_usb_ctrl_write(dev, cpkt, size);
if (status == size)
return size;
@@ -780,51 +868,43 @@
};
int rmnet_usb_ctrl_probe(struct usb_interface *intf,
- struct usb_host_endpoint *int_in, struct rmnet_ctrl_dev *dev)
+ struct usb_host_endpoint *int_in,
+ unsigned long rmnet_devnum,
+ unsigned long *data)
{
+ struct rmnet_ctrl_dev *dev = NULL;
u16 wMaxPacketSize;
struct usb_endpoint_descriptor *ep;
- struct usb_device *udev;
+ struct usb_device *udev = interface_to_usbdev(intf);
int interval;
- int ret = 0;
+ int ret = 0, n;
- udev = interface_to_usbdev(intf);
+ /* Find next available ctrl_dev */
+ for (n = 0; n < insts_per_dev; n++) {
+ dev = &ctrl_devs[rmnet_devnum][n];
+ if (!dev->claimed)
+ break;
+ }
- if (!dev) {
- pr_err("%s: Ctrl device not found\n", __func__);
+ if (!dev || n == insts_per_dev) {
+ pr_err("%s: No available ctrl devices for %lu\n", __func__,
+ rmnet_devnum);
return -ENODEV;
}
+
dev->int_pipe = usb_rcvintpipe(udev,
int_in->desc.bEndpointAddress & USB_ENDPOINT_NUMBER_MASK);
- mutex_lock(&dev->dev_lock);
dev->intf = intf;
- /*TBD: for now just update CD status*/
- dev->cbits_tolocal = ACM_CTRL_CD;
+ dev->id = rmnet_devnum;
- /*send DTR high to modem*/
- dev->cbits_tomdm = ACM_CTRL_DTR;
- mutex_unlock(&dev->dev_lock);
-
- dev->resp_available = false;
dev->snd_encap_cmd_cnt = 0;
dev->get_encap_resp_cnt = 0;
dev->resp_avail_cnt = 0;
dev->tx_ctrl_err_cnt = 0;
dev->set_ctrl_line_state_cnt = 0;
- ret = usb_control_msg(udev, usb_rcvctrlpipe(udev, 0),
- USB_CDC_REQ_SET_CONTROL_LINE_STATE,
- (USB_DIR_OUT | USB_TYPE_CLASS | USB_RECIP_INTERFACE),
- dev->cbits_tomdm,
- dev->intf->cur_altsetting->desc.bInterfaceNumber,
- NULL, 0, USB_CTRL_SET_TIMEOUT);
- if (ret < 0)
- return ret;
-
- dev->set_ctrl_line_state_cnt++;
-
dev->inturb = usb_alloc_urb(0, GFP_KERNEL);
if (!dev->inturb) {
dev_err(dev->devicep, "Error allocating int urb\n");
@@ -861,22 +941,39 @@
usb_mark_last_busy(udev);
ret = rmnet_usb_ctrl_start_rx(dev);
- if (!ret)
- dev->is_connected = true;
+ if (ret) {
+ usb_free_urb(dev->inturb);
+ kfree(dev->intbuf);
+ return ret;
+ }
- return ret;
+ dev->claimed = true;
+
+ /*mux info is passed to data parameter*/
+ if (*data)
+ set_bit(RMNET_CTRL_DEV_MUX_EN, &dev->status);
+
+ *data = (unsigned long)dev;
+
+ /* If MUX is enabled, wakeup the open process here */
+ if (test_bit(RMNET_CTRL_DEV_MUX_EN, &dev->status)) {
+ set_bit(RMNET_CTRL_DEV_READY, &dev->status);
+ wake_up(&dev->open_wait_queue);
+ }
+
+ return 0;
}
void rmnet_usb_ctrl_disconnect(struct rmnet_ctrl_dev *dev)
{
+ dev->claimed = false;
+
+ clear_bit(RMNET_CTRL_DEV_READY, &dev->status);
mutex_lock(&dev->dev_lock);
-
/*TBD: for now just update CD status*/
dev->cbits_tolocal = ~ACM_CTRL_CD;
-
dev->cbits_tomdm = ~ACM_CTRL_DTR;
- dev->is_connected = false;
mutex_unlock(&dev->dev_lock);
wake_up(&dev->read_wait_queue);
@@ -901,50 +998,53 @@
struct rmnet_ctrl_dev *dev;
char *buf;
int ret;
- int i;
+ int i, n;
int temp = 0;
buf = kzalloc(sizeof(char) * DEBUG_BUF_SIZE, GFP_KERNEL);
if (!buf)
return -ENOMEM;
- for (i = 0; i < NUM_CTRL_CHANNELS; i++) {
- dev = ctrl_dev[i];
- if (!dev)
- continue;
-
- temp += scnprintf(buf + temp, DEBUG_BUF_SIZE - temp,
- "\n#ctrl_dev: %p Name: %s#\n"
- "snd encap cmd cnt %u\n"
- "resp avail cnt: %u\n"
- "get encap resp cnt: %u\n"
- "set ctrl line state cnt: %u\n"
- "tx_err_cnt: %u\n"
- "cbits_tolocal: %d\n"
- "cbits_tomdm: %d\n"
- "mdm_wait_timeout: %u\n"
- "zlp_cnt: %u\n"
- "get_encap_failure_cnt %u\n"
- "dev opened: %s\n",
- dev, dev->name,
- dev->snd_encap_cmd_cnt,
- dev->resp_avail_cnt,
- dev->get_encap_resp_cnt,
- dev->set_ctrl_line_state_cnt,
- dev->tx_ctrl_err_cnt,
- dev->cbits_tolocal,
- dev->cbits_tomdm,
- dev->mdm_wait_timeout,
- dev->zlp_cnt,
- dev->get_encap_failure_cnt,
- dev->is_opened ? "OPEN" : "CLOSE");
-
+ for (i = 0; i < num_devs; i++) {
+ for (n = 0; n < insts_per_dev; n++) {
+ dev = &ctrl_devs[i][n];
+ temp += scnprintf(buf + temp, DEBUG_BUF_SIZE - temp,
+ "\n#ctrl_dev: %p Name: %s#\n"
+ "snd encap cmd cnt %u\n"
+ "resp avail cnt: %u\n"
+ "get encap resp cnt: %u\n"
+ "set ctrl line state cnt: %u\n"
+ "tx_err_cnt: %u\n"
+ "cbits_tolocal: %d\n"
+ "cbits_tomdm: %d\n"
+ "mdm_wait_timeout: %u\n"
+ "zlp_cnt: %u\n"
+ "get_encap_failure_cnt %u\n"
+ "RMNET_CTRL_DEV_MUX_EN: %d\n"
+ "RMNET_CTRL_DEV_OPEN: %d\n"
+ "RMNET_CTRL_DEV_READY: %d\n",
+ dev, dev->name,
+ dev->snd_encap_cmd_cnt,
+ dev->resp_avail_cnt,
+ dev->get_encap_resp_cnt,
+ dev->set_ctrl_line_state_cnt,
+ dev->tx_ctrl_err_cnt,
+ dev->cbits_tolocal,
+ dev->cbits_tomdm,
+ dev->mdm_wait_timeout,
+ dev->zlp_cnt,
+ dev->get_encap_failure_cnt,
+ test_bit(RMNET_CTRL_DEV_MUX_EN,
+ &dev->status),
+ test_bit(RMNET_CTRL_DEV_OPEN,
+ &dev->status),
+ test_bit(RMNET_CTRL_DEV_READY,
+ &dev->status));
+ }
}
ret = simple_read_from_buffer(ubuf, count, ppos, buf, temp);
-
kfree(buf);
-
return ret;
}
@@ -952,19 +1052,19 @@
buf, size_t count, loff_t *ppos)
{
struct rmnet_ctrl_dev *dev;
- int i;
+ int i, n;
- for (i = 0; i < NUM_CTRL_CHANNELS; i++) {
- dev = ctrl_dev[i];
- if (!dev)
- continue;
+ for (i = 0; i < num_devs; i++) {
+ for (n = 0; n < insts_per_dev; n++) {
+ dev = &ctrl_devs[i][n];
- dev->snd_encap_cmd_cnt = 0;
- dev->resp_avail_cnt = 0;
- dev->get_encap_resp_cnt = 0;
- dev->set_ctrl_line_state_cnt = 0;
- dev->tx_ctrl_err_cnt = 0;
- dev->zlp_cnt = 0;
+ dev->snd_encap_cmd_cnt = 0;
+ dev->resp_avail_cnt = 0;
+ dev->get_encap_resp_cnt = 0;
+ dev->set_ctrl_line_state_cnt = 0;
+ dev->tx_ctrl_err_cnt = 0;
+ dev->zlp_cnt = 0;
+ }
}
return count;
}
@@ -999,144 +1099,152 @@
static void rmnet_usb_ctrl_debugfs_exit(void) { }
#endif
-int rmnet_usb_ctrl_init(void)
+int rmnet_usb_ctrl_init(int no_rmnet_devs, int no_rmnet_insts_per_dev)
{
struct rmnet_ctrl_dev *dev;
- int n;
+ int i, n;
int status;
- for (n = 0; n < NUM_CTRL_CHANNELS; ++n) {
+ num_devs = no_rmnet_devs;
+ insts_per_dev = no_rmnet_insts_per_dev;
- dev = kzalloc(sizeof(*dev), GFP_KERNEL);
- if (!dev) {
- status = -ENOMEM;
- goto error0;
- }
- /*for debug purpose*/
- snprintf(dev->name, CTRL_DEV_MAX_LEN, "hsicctl%d", n);
+ ctrl_devs = kzalloc(num_devs * sizeof(*ctrl_devs), GFP_KERNEL);
+ if (!ctrl_devs)
+ return -ENOMEM;
- dev->wq = create_singlethread_workqueue(dev->name);
- if (!dev->wq) {
- pr_err("unable to allocate workqueue");
- kfree(dev);
- goto error0;
- }
+ for (i = 0; i < num_devs; i++) {
+ ctrl_devs[i] = kzalloc(insts_per_dev * sizeof(*ctrl_devs[i]),
+ GFP_KERNEL);
+ if (!ctrl_devs[i])
+ return -ENOMEM;
- mutex_init(&dev->dev_lock);
- spin_lock_init(&dev->rx_lock);
- init_waitqueue_head(&dev->read_wait_queue);
- init_waitqueue_head(&dev->open_wait_queue);
- INIT_LIST_HEAD(&dev->rx_list);
- init_usb_anchor(&dev->tx_submitted);
- init_usb_anchor(&dev->rx_submitted);
- INIT_WORK(&dev->get_encap_work, get_encap_work);
-
- status = rmnet_usb_ctrl_alloc_rx(dev);
- if (status < 0) {
- kfree(dev);
- goto error0;
- }
-
- ctrl_dev[n] = dev;
- }
-
- status = alloc_chrdev_region(&ctrldev_num, 0, NUM_CTRL_CHANNELS,
- DEVICE_NAME);
- if (IS_ERR_VALUE(status)) {
- pr_err("ERROR:%s: alloc_chrdev_region() ret %i.\n",
- __func__, status);
- goto error0;
- }
-
- ctrldev_classp = class_create(THIS_MODULE, DEVICE_NAME);
- if (IS_ERR(ctrldev_classp)) {
- pr_err("ERROR:%s: class_create() ENOMEM\n", __func__);
- status = -ENOMEM;
- goto error1;
- }
- for (n = 0; n < NUM_CTRL_CHANNELS; ++n) {
- cdev_init(&ctrl_dev[n]->cdev, &ctrldev_fops);
- ctrl_dev[n]->cdev.owner = THIS_MODULE;
-
- status = cdev_add(&ctrl_dev[n]->cdev, (ctrldev_num + n), 1);
-
+ status = alloc_chrdev_region(&ctrldev_num[i], 0, insts_per_dev,
+ rmnet_dev_names[i]);
if (IS_ERR_VALUE(status)) {
- pr_err("%s: cdev_add() ret %i\n", __func__, status);
- kfree(ctrl_dev[n]);
- goto error2;
+ pr_err("ERROR:%s: alloc_chrdev_region() ret %i.\n",
+ __func__, status);
+ return status;
}
- ctrl_dev[n]->devicep =
- device_create(ctrldev_classp, NULL,
- (ctrldev_num + n), NULL,
- DEVICE_NAME "%d", n);
+ ctrldev_classp[i] = class_create(THIS_MODULE,
+ rmnet_dev_names[i]);
+ if (IS_ERR(ctrldev_classp[i])) {
+ pr_err("ERROR:%s: class_create() ENOMEM\n", __func__);
+ status = PTR_ERR(ctrldev_classp[i]);
+ return status;
+ }
- if (IS_ERR(ctrl_dev[n]->devicep)) {
- pr_err("%s: device_create() ENOMEM\n", __func__);
- status = -ENOMEM;
- cdev_del(&ctrl_dev[n]->cdev);
- kfree(ctrl_dev[n]);
- goto error2;
+ for (n = 0; n < insts_per_dev; n++) {
+ dev = &ctrl_devs[i][n];
+
+ /*for debug purpose*/
+ snprintf(dev->name, CTRL_DEV_MAX_LEN, "%s%d",
+ rmnet_dev_names[i], n);
+
+ dev->wq = create_singlethread_workqueue(dev->name);
+ if (!dev->wq) {
+ pr_err("unable to allocate workqueue");
+ kfree(dev);
+ return -ENOMEM;
+ }
+
+ dev->ch_id = n;
+
+ mutex_init(&dev->dev_lock);
+ spin_lock_init(&dev->rx_lock);
+ init_waitqueue_head(&dev->read_wait_queue);
+ init_waitqueue_head(&dev->open_wait_queue);
+ INIT_LIST_HEAD(&dev->rx_list);
+ init_usb_anchor(&dev->tx_submitted);
+ init_usb_anchor(&dev->rx_submitted);
+ INIT_WORK(&dev->get_encap_work, get_encap_work);
+
+ cdev_init(&dev->cdev, &ctrldev_fops);
+ dev->cdev.owner = THIS_MODULE;
+
+ status = cdev_add(&dev->cdev, (ctrldev_num[i] + n), 1);
+ if (status) {
+ pr_err("%s: cdev_add() ret %i\n", __func__,
+ status);
+ destroy_workqueue(dev->wq);
+ kfree(dev);
+ return status;
+ }
+
+ dev->devicep = device_create(ctrldev_classp[i], NULL,
+ (ctrldev_num[i] + n), NULL,
+ "%s%d", rmnet_dev_names[i],
+ n);
+ if (IS_ERR(dev->devicep)) {
+ pr_err("%s: device_create() returned %ld\n",
+ __func__, PTR_ERR(dev->devicep));
+ cdev_del(&dev->cdev);
+ destroy_workqueue(dev->wq);
+ kfree(dev);
+ return PTR_ERR(dev->devicep);
+ }
+
+ /*create /sys/class/hsicctl/hsicctlx/modem_wait*/
+ status = device_create_file(dev->devicep,
+ &dev_attr_modem_wait);
+ if (status) {
+ device_destroy(dev->devicep->class,
+ dev->devicep->devt);
+ cdev_del(&dev->cdev);
+ destroy_workqueue(dev->wq);
+ kfree(dev);
+ return status;
+ }
+ dev_set_drvdata(dev->devicep, dev);
+
+ status = rmnet_usb_ctrl_alloc_rx(dev);
+ if (status) {
+ device_remove_file(dev->devicep,
+ &dev_attr_modem_wait);
+ device_destroy(dev->devicep->class,
+ dev->devicep->devt);
+ cdev_del(&dev->cdev);
+ destroy_workqueue(dev->wq);
+ kfree(dev);
+ return status;
+ }
}
- /*create /sys/class/hsicctl/hsicctlx/modem_wait*/
- status = device_create_file(ctrl_dev[n]->devicep,
- &dev_attr_modem_wait);
- if (status) {
- device_destroy(ctrldev_classp,
- MKDEV(MAJOR(ctrldev_num), n));
- cdev_del(&ctrl_dev[n]->cdev);
- kfree(ctrl_dev[n]);
- goto error2;
- }
- dev_set_drvdata(ctrl_dev[n]->devicep, ctrl_dev[n]);
}
rmnet_usb_ctrl_debugfs_init();
pr_info("rmnet usb ctrl Initialized.\n");
return 0;
-
-error2:
- while (--n >= 0) {
- cdev_del(&ctrl_dev[n]->cdev);
- device_destroy(ctrldev_classp,
- MKDEV(MAJOR(ctrldev_num), n));
- }
-
- class_destroy(ctrldev_classp);
- n = NUM_CTRL_CHANNELS;
-error1:
- unregister_chrdev_region(MAJOR(ctrldev_num), NUM_CTRL_CHANNELS);
-error0:
- while (--n >= 0)
- kfree(ctrl_dev[n]);
-
- return status;
}
-void rmnet_usb_ctrl_exit(void)
+static void free_rmnet_ctrl_dev(struct rmnet_ctrl_dev *dev)
{
- int i;
+ kfree(dev->in_ctlreq);
+ kfree(dev->rcvbuf);
+ kfree(dev->intbuf);
+ usb_free_urb(dev->rcvurb);
+ usb_free_urb(dev->inturb);
+ device_remove_file(dev->devicep, &dev_attr_modem_wait);
+ cdev_del(&dev->cdev);
+ destroy_workqueue(dev->wq);
+ device_destroy(dev->devicep->class,
+ dev->devicep->devt);
+}
- for (i = 0; i < NUM_CTRL_CHANNELS; ++i) {
- if (!ctrl_dev[i])
- return;
+void rmnet_usb_ctrl_exit(int no_rmnet_devs, int no_rmnet_insts_per_dev)
+{
+ int i, n;
- kfree(ctrl_dev[i]->in_ctlreq);
- kfree(ctrl_dev[i]->rcvbuf);
- kfree(ctrl_dev[i]->intbuf);
- usb_free_urb(ctrl_dev[i]->rcvurb);
- usb_free_urb(ctrl_dev[i]->inturb);
-#if defined(DEBUG)
- device_remove_file(ctrl_dev[i]->devicep, &dev_attr_modem_wait);
-#endif
- cdev_del(&ctrl_dev[i]->cdev);
- destroy_workqueue(ctrl_dev[i]->wq);
- kfree(ctrl_dev[i]);
- ctrl_dev[i] = NULL;
- device_destroy(ctrldev_classp, MKDEV(MAJOR(ctrldev_num), i));
+ for (i = 0; i < no_rmnet_devs; i++) {
+ for (n = 0; n < no_rmnet_insts_per_dev; n++)
+ free_rmnet_ctrl_dev(&ctrl_devs[i][n]);
+
+ kfree(ctrl_devs[i]);
+
+ class_destroy(ctrldev_classp[i]);
+ if (ctrldev_num[i])
+ unregister_chrdev_region(ctrldev_num[i], insts_per_dev);
}
- class_destroy(ctrldev_classp);
- unregister_chrdev_region(MAJOR(ctrldev_num), NUM_CTRL_CHANNELS);
+ kfree(ctrl_devs);
rmnet_usb_ctrl_debugfs_exit();
}
diff --git a/drivers/net/usb/rmnet_usb_data.c b/drivers/net/usb/rmnet_usb_data.c
index 2a57b36..f9bb5c8 100644
--- a/drivers/net/usb/rmnet_usb_data.c
+++ b/drivers/net/usb/rmnet_usb_data.c
@@ -1,4 +1,4 @@
-/* Copyright (c) 2011-2012, The Linux Foundation. All rights reserved.
+/* Copyright (c) 2011-2013, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -17,14 +17,48 @@
#include <linux/debugfs.h>
#include <linux/seq_file.h>
#include <linux/usb.h>
+#include <linux/ratelimit.h>
#include <linux/usb/usbnet.h>
#include <linux/msm_rmnet.h>
-#include "rmnet_usb_ctrl.h"
+#include "rmnet_usb.h"
#define RMNET_DATA_LEN 2000
-#define HEADROOM_FOR_QOS 8
+#define RMNET_HEADROOM_W_MUX (sizeof(struct mux_hdr) + \
+ sizeof(struct QMI_QOS_HDR_S))
+#define RMNET_HEADROOM sizeof(struct QMI_QOS_HDR_S)
+#define RMNET_TAILROOM MAX_PAD_BYTES(4);
+static unsigned int no_rmnet_devs = 1;
+module_param(no_rmnet_devs, uint, S_IRUGO | S_IWUSR);
+
+unsigned int no_rmnet_insts_per_dev = 4;
+module_param(no_rmnet_insts_per_dev, uint, S_IRUGO | S_IWUSR);
+
+/*
+ * To support mux on multiple devices, bit position represents device
+ * and value represnts if mux is enabled or disabled.
+ * e.g. bit 0: mdm over HSIC, bit1: mdm over hsusb
+ */
+static unsigned long mux_enabled;
+module_param(mux_enabled, ulong, S_IRUGO | S_IWUSR);
+
+static unsigned int no_fwd_rmnet_links;
+module_param(no_fwd_rmnet_links, uint, S_IRUGO | S_IWUSR);
+
+struct usbnet *unet_list[TOTAL_RMNET_DEV_COUNT];
+
+/* net device name prefixes, indexed by driver_info->data */
+static const char * const rmnet_names[] = {
+ "rmnet_usb%d",
+ "rmnet2_usb%d",
+};
+
+/* net device reverse link name prefixes, indexed by driver_info->data */
+static const char * const rev_rmnet_names[] = {
+ "rev_rmnet_usb%d",
+ "rev_rmnet2_usb%d",
+};
static int data_msg_dbg_mask;
enum {
@@ -80,43 +114,121 @@
#define DBG1(x...) DBG(DEBUG_MASK_LVL1, x)
#define DBG2(x...) DBG(DEBUG_MASK_LVL2, x)
-static void rmnet_usb_setup(struct net_device *);
+static int rmnet_data_start(void);
+static bool rmnet_data_init;
+
+static int rmnet_init(const char *val, const struct kernel_param *kp)
+{
+ int ret = 0;
+
+ if (rmnet_data_init) {
+ pr_err("dynamic setting rmnet params currently unsupported\n");
+ return -EINVAL;
+ }
+
+ ret = param_set_bool(val, kp);
+ if (ret)
+ return ret;
+
+ rmnet_data_start();
+
+ return ret;
+}
+
+static struct kernel_param_ops rmnet_init_ops = {
+ .set = rmnet_init,
+ .get = param_get_bool,
+};
+module_param_cb(rmnet_data_init, &rmnet_init_ops, &rmnet_data_init,
+ S_IRUGO | S_IWUSR);
+
+static void rmnet_usb_setup(struct net_device *, int mux_enabled);
static int rmnet_ioctl(struct net_device *, struct ifreq *, int);
static int rmnet_usb_suspend(struct usb_interface *iface, pm_message_t message)
{
- struct usbnet *unet;
+ struct usbnet *unet = usb_get_intfdata(iface);
struct rmnet_ctrl_dev *dev;
+ int i, n, rdev_cnt, unet_id;
+ int retval = 0;
- unet = usb_get_intfdata(iface);
+ rdev_cnt = unet->data[4] ? no_rmnet_insts_per_dev : 1;
- dev = (struct rmnet_ctrl_dev *)unet->data[1];
+ for (n = 0; n < rdev_cnt; n++) {
+ unet_id = n + unet->driver_info->data * no_rmnet_insts_per_dev;
+ unet =
+ unet->data[4] ? unet_list[unet_id] : usb_get_intfdata(iface);
- if (work_busy(&dev->get_encap_work))
- return -EBUSY;
+ dev = (struct rmnet_ctrl_dev *)unet->data[1];
+ spin_lock_irq(&unet->txq.lock);
+ if (work_busy(&dev->get_encap_work) || unet->txq.qlen) {
+ spin_unlock_irq(&unet->txq.lock);
+ retval = -EBUSY;
+ goto abort_suspend;
+ }
- if (usbnet_suspend(iface, message))
- return -EBUSY;
+ set_bit(EVENT_DEV_ASLEEP, &unet->flags);
+ spin_unlock_irq(&unet->txq.lock);
- usb_kill_anchored_urbs(&dev->rx_submitted);
+ usb_kill_anchored_urbs(&dev->rx_submitted);
+ if (work_busy(&dev->get_encap_work)) {
+ spin_lock_irq(&unet->txq.lock);
+ clear_bit(EVENT_DEV_ASLEEP, &unet->flags);
+ spin_unlock_irq(&unet->txq.lock);
+ retval = -EBUSY;
+ goto abort_suspend;
+ }
+ }
+
+ for (n = 0; n < rdev_cnt; n++) {
+ unet_id = n + unet->driver_info->data * no_rmnet_insts_per_dev;
+ unet =
+ unet->data[4] ? unet_list[unet_id] : usb_get_intfdata(iface);
+
+ dev = (struct rmnet_ctrl_dev *)unet->data[1];
+ netif_device_detach(unet->net);
+ usbnet_terminate_urbs(unet);
+ netif_device_attach(unet->net);
+ }
return 0;
+
+abort_suspend:
+ for (i = 0; i < n; i++) {
+ unet_id = i + unet->driver_info->data * no_rmnet_insts_per_dev;
+ unet =
+ unet->data[4] ? unet_list[unet_id] : usb_get_intfdata(iface);
+
+ dev = (struct rmnet_ctrl_dev *)unet->data[1];
+ rmnet_usb_ctrl_start_rx(dev);
+ spin_lock_irq(&unet->txq.lock);
+ clear_bit(EVENT_DEV_ASLEEP, &unet->flags);
+ spin_unlock_irq(&unet->txq.lock);
+ }
+ return retval;
}
static int rmnet_usb_resume(struct usb_interface *iface)
{
- int retval = 0;
- struct usbnet *unet;
+ struct usbnet *unet = usb_get_intfdata(iface);
struct rmnet_ctrl_dev *dev;
+ int n, rdev_cnt, unet_id;
- unet = usb_get_intfdata(iface);
+ rdev_cnt = unet->data[4] ? no_rmnet_insts_per_dev : 1;
- dev = (struct rmnet_ctrl_dev *)unet->data[1];
+ for (n = 0; n < rdev_cnt; n++) {
+ unet_id = n + unet->driver_info->data * no_rmnet_insts_per_dev;
+ unet =
+ unet->data[4] ? unet_list[unet_id] : usb_get_intfdata(iface);
- usbnet_resume(iface);
- retval = rmnet_usb_ctrl_start_rx(dev);
+ dev = (struct rmnet_ctrl_dev *)unet->data[1];
+ rmnet_usb_ctrl_start_rx(dev);
+ usb_set_intfdata(iface, unet);
+ unet->suspend_count = 1;
+ usbnet_resume(iface);
+ }
- return retval;
+ return 0;
}
static int rmnet_usb_bind(struct usbnet *usbnet, struct usb_interface *iface)
@@ -125,9 +237,13 @@
struct usb_host_endpoint *bulk_in = NULL;
struct usb_host_endpoint *bulk_out = NULL;
struct usb_host_endpoint *int_in = NULL;
+ struct driver_info *info = usbnet->driver_info;
int status = 0;
int i;
int numends;
+ bool mux;
+
+ mux = test_bit(info->data, &mux_enabled);
numends = iface->cur_altsetting->desc.bNumEndpoints;
for (i = 0; i < numends; i++) {
@@ -158,13 +274,72 @@
usbnet->status = int_in;
/*change name of net device to rmnet_usbx here*/
- strlcpy(usbnet->net->name, "rmnet_usb%d", IFNAMSIZ);
+ if (mux && (info->in > no_fwd_rmnet_links))
+ strlcpy(usbnet->net->name, rev_rmnet_names[info->data],
+ IFNAMSIZ);
+ else
+ strlcpy(usbnet->net->name, rmnet_names[info->data],
+ IFNAMSIZ);
- /*TBD: update rx_urb_size, curently set to eth frame len by usbnet*/
+ if (mux)
+ usbnet->rx_urb_size = usbnet->hard_mtu + sizeof(struct mux_hdr)
+ + MAX_PAD_BYTES(4);
out:
return status;
}
+static int rmnet_usb_data_dmux(struct sk_buff *skb, struct urb *rx_urb)
+{
+ struct mux_hdr *hdr;
+ size_t pad_len;
+ size_t total_len;
+ unsigned int mux_id;
+
+ hdr = (struct mux_hdr *)skb->data;
+ mux_id = hdr->mux_id;
+ if (!mux_id || mux_id > no_rmnet_insts_per_dev) {
+ pr_err_ratelimited("%s: Invalid data channel id %u.\n",
+ __func__, mux_id);
+ return -EINVAL;
+ }
+
+ pad_len = hdr->padding_info >> MUX_PAD_SHIFT;
+ if (pad_len > MAX_PAD_BYTES(4)) {
+ pr_err_ratelimited("%s: Invalid pad len %d\n",
+ __func__, pad_len);
+ return -EINVAL;
+ }
+
+ total_len = le16_to_cpu(hdr->pkt_len_w_padding);
+ if (!total_len || !(total_len - pad_len)) {
+ pr_err_ratelimited("%s: Invalid pkt length %d\n", __func__,
+ total_len);
+ return -EINVAL;
+ }
+
+ skb->data = (unsigned char *)(hdr + 1);
+ skb_reset_tail_pointer(skb);
+ rx_urb->actual_length = total_len - pad_len;
+
+ return mux_id - 1;
+}
+
+static void rmnet_usb_data_mux(struct sk_buff *skb, unsigned int id)
+{
+ struct mux_hdr *hdr;
+ size_t len;
+
+ hdr = (struct mux_hdr *)skb_push(skb, sizeof(struct mux_hdr));
+ hdr->mux_id = id + 1;
+ len = skb->len - sizeof(struct mux_hdr);
+
+ /*add padding if len is not 4 byte aligned*/
+ skb_put(skb, ALIGN(len, 4) - len);
+
+ hdr->pkt_len_w_padding = cpu_to_le16(skb->len - sizeof(struct mux_hdr));
+ hdr->padding_info = (ALIGN(len, 4) - len) << MUX_PAD_SHIFT;
+}
+
static struct sk_buff *rmnet_usb_tx_fixup(struct usbnet *dev,
struct sk_buff *skb, gfp_t flags)
{
@@ -178,6 +353,9 @@
qmih->flow_id = skb->mark;
}
+ if (dev->data[4])
+ rmnet_usb_data_mux(skb, dev->data[3]);
+
DBG1("[%s] Tx packet #%lu len=%d mark=0x%x\n",
dev->net->name, dev->net->stats.tx_packets, skb->len, skb->mark);
@@ -206,10 +384,35 @@
return protocol;
}
-static int rmnet_usb_rx_fixup(struct usbnet *dev,
- struct sk_buff *skb)
+static void rmnet_usb_rx_complete(struct urb *rx_urb)
{
+ struct sk_buff *skb = (struct sk_buff *) rx_urb->context;
+ struct skb_data *entry = (struct skb_data *) skb->cb;
+ struct usbnet *dev = entry->dev;
+ unsigned int unet_offset;
+ unsigned int unet_id;
+ int mux_id;
+ unet_offset = dev->driver_info->data * no_rmnet_insts_per_dev;
+
+ if (!rx_urb->status && dev->data[4]) {
+ mux_id = rmnet_usb_data_dmux(skb, rx_urb);
+ if (mux_id < 0) {
+ /*resubmit urb and free skb in rx_complete*/
+ rx_urb->status = -EINVAL;
+ } else {
+ /*map urb to actual network iface based on mux id*/
+ unet_id = unet_offset + mux_id;
+ skb->dev = unet_list[unet_id]->net;
+ entry->dev = unet_list[unet_id];
+ }
+ }
+
+ rx_complete(rx_urb);
+}
+
+static int rmnet_usb_rx_fixup(struct usbnet *dev, struct sk_buff *skb)
+{
if (test_bit(RMNET_MODE_LLP_IP, &dev->data[0]))
skb->protocol = rmnet_ip_type_trans(skb, dev->net);
else /*set zero for eth mode*/
@@ -270,7 +473,6 @@
.ndo_validate_addr = 0,
};
-
static int rmnet_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd)
{
struct usbnet *unet = netdev_priv(dev);
@@ -306,7 +508,6 @@
dev->mtu = prev_mtu;
dev->addr_len = 0;
dev->flags &= ~(IFF_BROADCAST | IFF_MULTICAST);
- dev->needed_headroom = HEADROOM_FOR_QOS;
dev->netdev_ops = &rmnet_usb_ops_ip;
clear_bit(RMNET_MODE_LLP_ETH, &unet->data[0]);
set_bit(RMNET_MODE_LLP_IP, &unet->data[0]);
@@ -365,7 +566,7 @@
return rc;
}
-static void rmnet_usb_setup(struct net_device *dev)
+static void rmnet_usb_setup(struct net_device *dev, int mux_enabled)
{
/* Using Ethernet mode by default */
dev->netdev_ops = &rmnet_usb_ops_ether;
@@ -373,7 +574,15 @@
/* set this after calling ether_setup */
dev->mtu = RMNET_DATA_LEN;
- dev->needed_headroom = HEADROOM_FOR_QOS;
+ if (mux_enabled) {
+ dev->needed_headroom = RMNET_HEADROOM_W_MUX;
+
+ /*max pad bytes for 4 byte alignment*/
+ dev->needed_tailroom = RMNET_TAILROOM;
+ } else {
+ dev->needed_headroom = RMNET_HEADROOM;
+ }
+
random_ether_addr(dev->dev_addr);
dev->watchdog_timeo = 1000; /* 10 seconds? */
}
@@ -403,7 +612,6 @@
seq_printf(s, "tx errors: %lu\n", unet->net->stats.tx_errors);
seq_printf(s, "tx packets: %lu\n", unet->net->stats.tx_packets);
seq_printf(s, "tx bytes: %lu\n", unet->net->stats.tx_bytes);
- seq_printf(s, "suspend count: %d\n", unet->suspend_count);
seq_printf(s, "EVENT_DEV_OPEN: %d\n",
test_bit(EVENT_DEV_OPEN, &unet->flags));
seq_printf(s, "EVENT_TX_HALT: %d\n",
@@ -458,21 +666,25 @@
{
struct dentry *root = (struct dentry *)unet->data[2];
- debugfs_remove_recursive(root);
- unet->data[2] = 0;
+ if (root) {
+ debugfs_remove_recursive(root);
+ unet->data[2] = 0;
+ }
}
static int rmnet_usb_probe(struct usb_interface *iface,
const struct usb_device_id *prod)
{
struct usbnet *unet;
- struct driver_info *info;
+ struct driver_info *info = (struct driver_info *)prod->driver_info;
struct usb_device *udev;
- unsigned int iface_num;
- static int first_rmnet_iface_num = -EINVAL;
int status = 0;
+ unsigned int i, unet_id, rdev_cnt, n = 0;
+ bool mux;
+ struct rmnet_ctrl_dev *dev;
- iface_num = iface->cur_altsetting->desc.bInterfaceNumber;
+ udev = interface_to_usbdev(iface);
+
if (iface->num_altsetting != 1) {
dev_err(&iface->dev, "%s invalid num_altsetting %u\n",
__func__, iface->num_altsetting);
@@ -480,45 +692,61 @@
goto out;
}
- info = (struct driver_info *)prod->driver_info;
- if (!test_bit(iface_num, &info->data))
- return -ENODEV;
+ mux = test_bit(info->data, &mux_enabled);
+ rdev_cnt = mux ? no_rmnet_insts_per_dev : 1;
+ info->in = 0;
- status = usbnet_probe(iface, prod);
- if (status < 0) {
- dev_err(&iface->dev, "usbnet_probe failed %d\n", status);
- goto out;
+ for (n = 0; n < rdev_cnt; n++) {
+
+ /* Use this filed to increment device count this will be
+ * used by bind to determin the forward link and reverse
+ * link network interface names.
+ */
+ info->in++;
+ status = usbnet_probe(iface, prod);
+ if (status < 0) {
+ dev_err(&iface->dev, "usbnet_probe failed %d\n",
+ status);
+ goto out;
+ }
+
+ unet_id = n + info->data * no_rmnet_insts_per_dev;
+
+ unet_list[unet_id] = unet = usb_get_intfdata(iface);
+
+ /*store mux id for later access*/
+ unet->data[3] = n;
+
+ /*save mux info for control and usbnet devices*/
+ unet->data[1] = unet->data[4] = mux;
+
+ /*set rmnet operation mode to eth by default*/
+ set_bit(RMNET_MODE_LLP_ETH, &unet->data[0]);
+
+ /*update net device*/
+ rmnet_usb_setup(unet->net, mux);
+
+ /*create /sys/class/net/rmnet_usbx/dbg_mask*/
+ status = device_create_file(&unet->net->dev,
+ &dev_attr_dbg_mask);
+ if (status) {
+ usbnet_disconnect(iface);
+ goto out;
+ }
+
+ status = rmnet_usb_ctrl_probe(iface, unet->status, info->data,
+ &unet->data[1]);
+ if (status) {
+ device_remove_file(&unet->net->dev, &dev_attr_dbg_mask);
+ usbnet_disconnect(iface);
+ goto out;
+ }
+
+ status = rmnet_usb_data_debugfs_init(unet);
+ if (status)
+ dev_dbg(&iface->dev,
+ "mode debugfs file is not available\n");
}
- unet = usb_get_intfdata(iface);
-
- /*set rmnet operation mode to eth by default*/
- set_bit(RMNET_MODE_LLP_ETH, &unet->data[0]);
-
- /*update net device*/
- rmnet_usb_setup(unet->net);
-
- /*create /sys/class/net/rmnet_usbx/dbg_mask*/
- status = device_create_file(&unet->net->dev, &dev_attr_dbg_mask);
- if (status)
- goto out;
-
- if (first_rmnet_iface_num == -EINVAL)
- first_rmnet_iface_num = iface_num;
-
- /*save control device intstance */
- unet->data[1] = (unsigned long)ctrl_dev \
- [iface_num - first_rmnet_iface_num];
-
- status = rmnet_usb_ctrl_probe(iface, unet->status,
- (struct rmnet_ctrl_dev *)unet->data[1]);
- if (status)
- goto out;
-
- status = rmnet_usb_data_debugfs_init(unet);
- if (status)
- dev_dbg(&iface->dev, "mode debugfs file is not available\n");
-
- udev = unet->udev;
usb_enable_autosuspend(udev);
@@ -528,83 +756,123 @@
device_set_wakeup_enable(&udev->parent->dev, 1);
}
+ return 0;
+
out:
+ for (i = 0; i < n; i++) {
+ /* This cleanup happens only for MUX case */
+ unet_id = i + info->data * no_rmnet_insts_per_dev;
+ unet = unet_list[unet_id];
+ dev = (struct rmnet_ctrl_dev *)unet->data[1];
+
+ rmnet_usb_data_debugfs_cleanup(unet);
+ rmnet_usb_ctrl_disconnect(dev);
+ device_remove_file(&unet->net->dev, &dev_attr_dbg_mask);
+ usb_set_intfdata(iface, unet_list[unet_id]);
+ usbnet_disconnect(iface);
+ unet_list[unet_id] = NULL;
+ }
+
return status;
}
static void rmnet_usb_disconnect(struct usb_interface *intf)
{
- struct usbnet *unet;
+ struct usbnet *unet = usb_get_intfdata(intf);
struct rmnet_ctrl_dev *dev;
+ unsigned int n, rdev_cnt, unet_id;
- unet = usb_get_intfdata(intf);
- if (!unet) {
- dev_err(&intf->dev, "%s:data device not found\n", __func__);
- return;
- }
+ rdev_cnt = unet->data[4] ? no_rmnet_insts_per_dev : 1;
device_set_wakeup_enable(&unet->udev->dev, 0);
- rmnet_usb_data_debugfs_cleanup(unet);
- dev = (struct rmnet_ctrl_dev *)unet->data[1];
- if (!dev) {
- dev_err(&intf->dev, "%s:ctrl device not found\n", __func__);
- return;
+ for (n = 0; n < rdev_cnt; n++) {
+ unet_id = n + unet->driver_info->data * no_rmnet_insts_per_dev;
+ unet =
+ unet->data[4] ? unet_list[unet_id] : usb_get_intfdata(intf);
+ device_remove_file(&unet->net->dev, &dev_attr_dbg_mask);
+
+ dev = (struct rmnet_ctrl_dev *)unet->data[1];
+ rmnet_usb_ctrl_disconnect(dev);
+ unet->data[0] = 0;
+ unet->data[1] = 0;
+ rmnet_usb_data_debugfs_cleanup(unet);
+ usb_set_intfdata(intf, unet);
+ usbnet_disconnect(intf);
+ unet_list[unet_id] = NULL;
}
- unet->data[0] = 0;
- unet->data[1] = 0;
- rmnet_usb_ctrl_disconnect(dev);
- device_remove_file(&unet->net->dev, &dev_attr_dbg_mask);
- usbnet_disconnect(intf);
}
-/*bit position represents interface number*/
-#define PID9034_IFACE_MASK 0xF0
-#define PID9048_IFACE_MASK 0x1E0
-#define PID904C_IFACE_MASK 0x1C0
-
-static const struct driver_info rmnet_info_pid9034 = {
+static struct driver_info rmnet_info = {
.description = "RmNET net device",
.flags = FLAG_SEND_ZLP,
.bind = rmnet_usb_bind,
.tx_fixup = rmnet_usb_tx_fixup,
.rx_fixup = rmnet_usb_rx_fixup,
+ .rx_complete = rmnet_usb_rx_complete,
.manage_power = rmnet_usb_manage_power,
- .data = PID9034_IFACE_MASK,
+ .data = 0,
};
-static const struct driver_info rmnet_info_pid9048 = {
+static struct driver_info rmnet_usb_info = {
.description = "RmNET net device",
.flags = FLAG_SEND_ZLP,
.bind = rmnet_usb_bind,
.tx_fixup = rmnet_usb_tx_fixup,
.rx_fixup = rmnet_usb_rx_fixup,
+ .rx_complete = rmnet_usb_rx_complete,
.manage_power = rmnet_usb_manage_power,
- .data = PID9048_IFACE_MASK,
-};
-
-static const struct driver_info rmnet_info_pid904c = {
- .description = "RmNET net device",
- .flags = FLAG_SEND_ZLP,
- .bind = rmnet_usb_bind,
- .tx_fixup = rmnet_usb_tx_fixup,
- .rx_fixup = rmnet_usb_rx_fixup,
- .manage_power = rmnet_usb_manage_power,
- .data = PID904C_IFACE_MASK,
+ .data = 1,
};
static const struct usb_device_id vidpids[] = {
- {
- USB_DEVICE(0x05c6, 0x9034), /* MDM9x15*/
- .driver_info = (unsigned long)&rmnet_info_pid9034,
+ { USB_DEVICE_INTERFACE_NUMBER(0x05c6, 0x9034, 4),
+ .driver_info = (unsigned long)&rmnet_info,
},
- {
- USB_DEVICE(0x05c6, 0x9048), /* MDM9x15*/
- .driver_info = (unsigned long)&rmnet_info_pid9048,
+ { USB_DEVICE_INTERFACE_NUMBER(0x05c6, 0x9034, 5),
+ .driver_info = (unsigned long)&rmnet_info,
},
- {
- USB_DEVICE(0x05c6, 0x904c), /* MDM9x15*/
- .driver_info = (unsigned long)&rmnet_info_pid904c,
+ { USB_DEVICE_INTERFACE_NUMBER(0x05c6, 0x9034, 6),
+ .driver_info = (unsigned long)&rmnet_info,
+ },
+ { USB_DEVICE_INTERFACE_NUMBER(0x05c6, 0x9034, 7),
+ .driver_info = (unsigned long)&rmnet_info,
+ },
+ { USB_DEVICE_INTERFACE_NUMBER(0x05c6, 0x9048, 5),
+ .driver_info = (unsigned long)&rmnet_info,
+ },
+ { USB_DEVICE_INTERFACE_NUMBER(0x05c6, 0x9048, 6),
+ .driver_info = (unsigned long)&rmnet_info,
+ },
+ { USB_DEVICE_INTERFACE_NUMBER(0x05c6, 0x9048, 7),
+ .driver_info = (unsigned long)&rmnet_info,
+ },
+ { USB_DEVICE_INTERFACE_NUMBER(0x05c6, 0x9048, 8),
+ .driver_info = (unsigned long)&rmnet_info,
+ },
+ { USB_DEVICE_INTERFACE_NUMBER(0x05c6, 0x904c, 6),
+ .driver_info = (unsigned long)&rmnet_info,
+ },
+ { USB_DEVICE_INTERFACE_NUMBER(0x05c6, 0x904c, 7),
+ .driver_info = (unsigned long)&rmnet_info,
+ },
+ { USB_DEVICE_INTERFACE_NUMBER(0x05c6, 0x904c, 8),
+ .driver_info = (unsigned long)&rmnet_info,
+ },
+ { USB_DEVICE_INTERFACE_NUMBER(0x05c6, 0x9075, 6), /*mux over hsic mdm*/
+ .driver_info = (unsigned long)&rmnet_info,
+ },
+ { USB_DEVICE_INTERFACE_NUMBER(0x05c6, 0x9079, 5),
+ .driver_info = (unsigned long)&rmnet_usb_info,
+ },
+ { USB_DEVICE_INTERFACE_NUMBER(0x05c6, 0x9079, 6),
+ .driver_info = (unsigned long)&rmnet_usb_info,
+ },
+ { USB_DEVICE_INTERFACE_NUMBER(0x05c6, 0x9079, 7),
+ .driver_info = (unsigned long)&rmnet_usb_info,
+ },
+ { USB_DEVICE_INTERFACE_NUMBER(0x05c6, 0x9079, 8),
+ .driver_info = (unsigned long)&rmnet_usb_info,
},
{ }, /* Terminating entry */
@@ -622,31 +890,36 @@
.supports_autosuspend = true,
};
-static int __init rmnet_usb_init(void)
+static int rmnet_data_start(void)
{
int retval;
+ if (no_rmnet_devs > MAX_RMNET_DEVS) {
+ pr_err("ERROR:%s: param no_rmnet_devs(%d) > than maximum(%d)",
+ __func__, no_rmnet_devs, MAX_RMNET_DEVS);
+ return -EINVAL;
+ }
+
+ /* initialize ctrl devices */
+ retval = rmnet_usb_ctrl_init(no_rmnet_devs, no_rmnet_insts_per_dev);
+ if (retval) {
+ err("rmnet_usb_cmux_init failed: %d", retval);
+ return retval;
+ }
+
retval = usb_register(&rmnet_usb);
if (retval) {
err("usb_register failed: %d", retval);
return retval;
}
- /* initialize rmnet ctrl device here*/
- retval = rmnet_usb_ctrl_init();
- if (retval) {
- usb_deregister(&rmnet_usb);
- err("rmnet_usb_cmux_init failed: %d", retval);
- return retval;
- }
- return 0;
+ return retval;
}
-module_init(rmnet_usb_init);
static void __exit rmnet_usb_exit(void)
{
- rmnet_usb_ctrl_exit();
usb_deregister(&rmnet_usb);
+ rmnet_usb_ctrl_exit(no_rmnet_devs, no_rmnet_insts_per_dev);
}
module_exit(rmnet_usb_exit);
diff --git a/drivers/net/usb/usbnet.c b/drivers/net/usb/usbnet.c
index fa0c568..b42050c 100644
--- a/drivers/net/usb/usbnet.c
+++ b/drivers/net/usb/usbnet.c
@@ -86,7 +86,7 @@
static const char driver_name [] = "usbnet";
-static struct workqueue_struct *usbnet_wq;
+struct workqueue_struct *usbnet_wq;
static DECLARE_WAIT_QUEUE_HEAD(unlink_wakeup);
@@ -343,12 +343,11 @@
/*-------------------------------------------------------------------------*/
-static void rx_complete (struct urb *urb);
-
static int rx_submit (struct usbnet *dev, struct urb *urb, gfp_t flags)
{
struct sk_buff *skb;
struct skb_data *entry;
+ usb_complete_t complete_fn;
int retval = 0;
unsigned long lockflags;
size_t size = dev->rx_urb_size;
@@ -366,8 +365,13 @@
entry->dev = dev;
entry->length = 0;
+ if (dev->driver_info->rx_complete)
+ complete_fn = dev->driver_info->rx_complete;
+ else
+ complete_fn = rx_complete;
+
usb_fill_bulk_urb (urb, dev->udev, dev->in,
- skb->data, size, rx_complete, skb);
+ skb->data, size, complete_fn, skb);
spin_lock_irqsave (&dev->rxq.lock, lockflags);
@@ -441,7 +445,7 @@
/*-------------------------------------------------------------------------*/
-static void rx_complete (struct urb *urb)
+void rx_complete(struct urb *urb)
{
struct sk_buff *skb = (struct sk_buff *) urb->context;
struct skb_data *entry = (struct skb_data *) skb->cb;
@@ -527,6 +531,7 @@
}
netif_dbg(dev, rx_err, dev->net, "no read resubmitted\n");
}
+EXPORT_SYMBOL_GPL(rx_complete);
static void intr_complete (struct urb *urb)
{
@@ -662,7 +667,7 @@
/*-------------------------------------------------------------------------*/
// precondition: never called in_interrupt
-static void usbnet_terminate_urbs(struct usbnet *dev)
+void usbnet_terminate_urbs(struct usbnet *dev)
{
DECLARE_WAITQUEUE(wait, current);
int temp;
@@ -687,6 +692,7 @@
dev->wait = NULL;
remove_wait_queue(&unlink_wakeup, &wait);
}
+EXPORT_SYMBOL_GPL(usbnet_terminate_urbs);
int usbnet_stop (struct net_device *net)
{
diff --git a/drivers/net/wireless/wcnss/wcnss_prealloc.c b/drivers/net/wireless/wcnss/wcnss_prealloc.c
index 7d10657..c450bcb 100644
--- a/drivers/net/wireless/wcnss/wcnss_prealloc.c
+++ b/drivers/net/wireless/wcnss/wcnss_prealloc.c
@@ -13,8 +13,9 @@
#include <linux/slab.h>
#include <linux/err.h>
#include <linux/wcnss_wlan.h>
+#include <linux/spinlock.h>
-static DEFINE_MUTEX(alloc_lock);
+static DEFINE_SPINLOCK(alloc_lock);
struct wcnss_prealloc {
int occupied;
@@ -57,15 +58,18 @@
{
int i = 0;
- for (i = 0; i < ARRAY_SIZE(wcnss_allocs); i++)
+ for (i = 0; i < ARRAY_SIZE(wcnss_allocs); i++) {
kfree(wcnss_allocs[i].ptr);
+ wcnss_allocs[i].ptr = NULL;
+ }
}
void *wcnss_prealloc_get(unsigned int size)
{
int i = 0;
+ unsigned long flags;
- mutex_lock(&alloc_lock);
+ spin_lock_irqsave(&alloc_lock, flags);
for (i = 0; i < ARRAY_SIZE(wcnss_allocs); i++) {
if (wcnss_allocs[i].occupied)
continue;
@@ -73,12 +77,13 @@
if (wcnss_allocs[i].size > size) {
/* we found the slot */
wcnss_allocs[i].occupied = 1;
- mutex_unlock(&alloc_lock);
+ spin_unlock_irqrestore(&alloc_lock, flags);
return wcnss_allocs[i].ptr;
}
}
- pr_err("wcnss: %s: prealloc not available\n", __func__);
- mutex_unlock(&alloc_lock);
+ spin_unlock_irqrestore(&alloc_lock, flags);
+ pr_err("wcnss: %s: prealloc not available for size: %d\n",
+ __func__, size);
return NULL;
}
@@ -87,16 +92,17 @@
int wcnss_prealloc_put(void *ptr)
{
int i = 0;
+ unsigned long flags;
- mutex_lock(&alloc_lock);
+ spin_lock_irqsave(&alloc_lock, flags);
for (i = 0; i < ARRAY_SIZE(wcnss_allocs); i++) {
if (wcnss_allocs[i].ptr == ptr) {
wcnss_allocs[i].occupied = 0;
- mutex_unlock(&alloc_lock);
+ spin_unlock_irqrestore(&alloc_lock, flags);
return 1;
}
}
- mutex_unlock(&alloc_lock);
+ spin_unlock_irqrestore(&alloc_lock, flags);
return 0;
}
diff --git a/drivers/net/wireless/wcnss/wcnss_vreg.c b/drivers/net/wireless/wcnss/wcnss_vreg.c
index c02daa4..4713d29 100644
--- a/drivers/net/wireless/wcnss/wcnss_vreg.c
+++ b/drivers/net/wireless/wcnss/wcnss_vreg.c
@@ -100,7 +100,7 @@
{"qcom,iris-vddpa", VREG_NULL_CONFIG, 2900000, 0,
3000000, 515000, NULL},
{"qcom,iris-vdddig", VREG_NULL_CONFIG, 1225000, 0,
- 1300000, 10000, NULL},
+ 1800000, 10000, NULL},
};
/* WCNSS regulators for Pronto hardware */
@@ -120,12 +120,6 @@
};
enum {
- WCNSS_XO_48MHZ = 1,
- WCNSS_XO_19MHZ,
- WCNSS_XO_INVALID,
-};
-
-enum {
IRIS_3660, /* also 3660A and 3680 */
IRIS_3620
};
@@ -147,7 +141,8 @@
}
}
-static int configure_iris_xo(struct device *dev, bool use_48mhz_xo, int on)
+static int configure_iris_xo(struct device *dev, bool use_48mhz_xo, int on,
+ int *iris_xo_set)
{
u32 reg = 0;
u32 iris_reg = WCNSS_INVALID_IRIS_REG;
@@ -254,9 +249,13 @@
reg &= ~(WCNSS_PMU_CFG_IRIS_XO_MODE);
if ((use_48mhz_xo && auto_detect == WCNSS_XO_INVALID)
- || auto_detect == WCNSS_XO_48MHZ)
+ || auto_detect == WCNSS_XO_48MHZ) {
reg |= WCNSS_PMU_CFG_IRIS_XO_MODE_48;
+ if (iris_xo_set)
+ *iris_xo_set = WCNSS_XO_48MHZ;
+ }
+
writel_relaxed(reg, pmu_conf_reg);
/* Start IRIS XO configuration */
@@ -288,6 +287,8 @@
pr_err("clk_rf enable failed\n");
goto fail;
}
+ if (iris_xo_set)
+ *iris_xo_set = WCNSS_XO_19MHZ;
}
} else if ((!use_48mhz_xo && auto_detect == WCNSS_XO_INVALID)
@@ -491,7 +492,7 @@
int wcnss_wlan_power(struct device *dev,
struct wcnss_wlan_config *cfg,
- enum wcnss_opcode on)
+ enum wcnss_opcode on, int *iris_xo_set)
{
int rc = 0;
enum wcnss_hw_type hw_type = wcnss_hardware_type();
@@ -510,14 +511,14 @@
/* Configure IRIS XO */
rc = configure_iris_xo(dev, cfg->use_48mhz_xo,
- WCNSS_WLAN_SWITCH_ON);
+ WCNSS_WLAN_SWITCH_ON, iris_xo_set);
if (rc)
goto fail_iris_xo;
up(&wcnss_power_on_lock);
} else {
configure_iris_xo(dev, cfg->use_48mhz_xo,
- WCNSS_WLAN_SWITCH_OFF);
+ WCNSS_WLAN_SWITCH_OFF, NULL);
wcnss_iris_vregs_off(hw_type);
wcnss_core_vregs_off(hw_type);
}
diff --git a/drivers/net/wireless/wcnss/wcnss_wlan.c b/drivers/net/wireless/wcnss/wcnss_wlan.c
index e8b8fc2..a3d7f12 100644
--- a/drivers/net/wireless/wcnss/wcnss_wlan.c
+++ b/drivers/net/wireless/wcnss/wcnss_wlan.c
@@ -79,6 +79,15 @@
#define CCU_RIVA_LAST_ADDR1_OFFSET 0x108
#define CCU_RIVA_LAST_ADDR2_OFFSET 0x10c
+#define PRONTO_PMU_SPARE_OFFSET 0x1088
+
+#define PRONTO_PMU_GDSCR_OFFSET 0x0024
+#define PRONTO_PMU_GDSCR_SW_COLLAPSE BIT(0)
+#define PRONTO_PMU_GDSCR_HW_CTRL BIT(1)
+
+#define PRONTO_PMU_CBCR_OFFSET 0x0008
+#define PRONTO_PMU_CBCR_CLK_EN BIT(0)
+
#define MSM_PRONTO_A2XB_BASE 0xfb100400
#define A2XB_CFG_OFFSET 0x00
#define A2XB_INT_SRC_OFFSET 0x0c
@@ -292,6 +301,7 @@
int user_cal_rcvd;
int user_cal_exp_size;
int device_opened;
+ int iris_xo_mode_set;
struct mutex dev_lock;
wait_queue_head_t read_wait;
} *penv = NULL;
@@ -419,6 +429,28 @@
void __iomem *reg_addr, *tst_addr, *tst_ctrl_addr;
u32 reg = 0;
+
+ reg_addr = penv->msm_wcnss_base + PRONTO_PMU_SPARE_OFFSET;
+ reg = readl_relaxed(reg_addr);
+ pr_info_ratelimited("%s: PRONTO_PMU_SPARE %08x\n", __func__, reg);
+
+ reg_addr = penv->msm_wcnss_base + PRONTO_PMU_GDSCR_OFFSET;
+ reg = readl_relaxed(reg_addr);
+ reg >>= 31;
+
+ if (!reg) {
+ pr_info_ratelimited("%s: Cannot log, Pronto common SS is power collapsed\n",
+ __func__);
+ return;
+ }
+ reg &= ~(PRONTO_PMU_GDSCR_SW_COLLAPSE | PRONTO_PMU_GDSCR_HW_CTRL);
+ writel_relaxed(reg, reg_addr);
+
+ reg_addr = penv->msm_wcnss_base + PRONTO_PMU_CBCR_OFFSET;
+ reg = readl_relaxed(reg_addr);
+ reg |= PRONTO_PMU_CBCR_CLK_EN;
+ writel_relaxed(reg, reg_addr);
+
reg_addr = penv->pronto_a2xb_base + A2XB_CFG_OFFSET;
reg = readl_relaxed(reg_addr);
pr_info_ratelimited("%s: A2XB_CFG_OFFSET %08x\n", __func__, reg);
@@ -613,7 +645,7 @@
/* Since WCNSS is up, cancel any APPS vote for Iris & WCNSS VREGs */
wcnss_wlan_power(&penv->pdev->dev, &penv->wlan_config,
- WCNSS_WLAN_SWITCH_OFF);
+ WCNSS_WLAN_SWITCH_OFF, NULL);
}
@@ -675,7 +707,7 @@
static int __devinit
wcnss_wlan_ctrl_probe(struct platform_device *pdev)
{
- if (!penv)
+ if (!penv || !penv->triggered)
return -ENODEV;
penv->smd_channel_ready = 1;
@@ -730,7 +762,7 @@
{
int ret = 0;
- if (!penv)
+ if (!penv || !penv->triggered)
return -ENODEV;
ret = smd_named_open_on_edge(WCNSS_CTRL_CHANNEL, SMD_APPS_WCNSS,
@@ -885,6 +917,14 @@
return (has_autodetect_xo == 1 ? 1 : 0);
}
+int wcnss_wlan_iris_xo_mode(void)
+{
+ if (penv && penv->pdev && penv->smd_channel_ready)
+ return penv->iris_xo_mode_set;
+ return -ENODEV;
+}
+EXPORT_SYMBOL(wcnss_wlan_iris_xo_mode);
+
void wcnss_suspend_notify(void)
{
@@ -1567,21 +1607,13 @@
/* power up the WCNSS */
ret = wcnss_wlan_power(&pdev->dev, &penv->wlan_config,
- WCNSS_WLAN_SWITCH_ON);
+ WCNSS_WLAN_SWITCH_ON,
+ &penv->iris_xo_mode_set);
if (ret) {
dev_err(&pdev->dev, "WCNSS Power-up failed.\n");
goto fail_power;
}
- /* trigger initialization of the WCNSS */
- penv->pil = subsystem_get(WCNSS_PIL_DEVICE);
- if (IS_ERR(penv->pil)) {
- dev_err(&pdev->dev, "Peripheral Loader failed on WCNSS.\n");
- ret = PTR_ERR(penv->pil);
- penv->pil = NULL;
- goto fail_pil;
- }
-
/* allocate resources */
penv->mmio_res = platform_get_resource_byname(pdev, IORESOURCE_MEM,
"wcnss_mmio");
@@ -1613,7 +1645,7 @@
if (!penv->msm_wcnss_base) {
ret = -ENOMEM;
pr_err("%s: ioremap wcnss physical failed\n", __func__);
- goto fail_wake;
+ goto fail_ioremap;
}
if (wcnss_hardware_type() == WCNSS_RIVA_HW) {
@@ -1621,20 +1653,20 @@
if (!penv->riva_ccu_base) {
ret = -ENOMEM;
pr_err("%s: ioremap wcnss physical failed\n", __func__);
- goto fail_ioremap;
+ goto fail_ioremap2;
}
} else {
penv->pronto_a2xb_base = ioremap(MSM_PRONTO_A2XB_BASE, SZ_512);
if (!penv->pronto_a2xb_base) {
ret = -ENOMEM;
pr_err("%s: ioremap wcnss physical failed\n", __func__);
- goto fail_ioremap;
+ goto fail_ioremap2;
}
penv->pronto_ccpu_base = ioremap(MSM_PRONTO_CCPU_BASE, SZ_512);
if (!penv->pronto_ccpu_base) {
ret = -ENOMEM;
pr_err("%s: ioremap wcnss physical failed\n", __func__);
- goto fail_ioremap2;
+ goto fail_ioremap3;
}
/* for reset FIQ */
res = platform_get_resource_byname(penv->pdev,
@@ -1642,33 +1674,47 @@
if (!res) {
dev_err(&pdev->dev, "insufficient irq mem resources\n");
ret = -ENOENT;
- goto fail_ioremap3;
+ goto fail_ioremap4;
}
penv->fiq_reg = ioremap_nocache(res->start, resource_size(res));
if (!penv->fiq_reg) {
pr_err("wcnss: %s: ioremap_nocache() failed fiq_reg addr:%pr\n",
__func__, &res->start);
ret = -ENOMEM;
- goto fail_ioremap3;
+ goto fail_ioremap4;
}
}
+ /* trigger initialization of the WCNSS */
+ penv->pil = subsystem_get(WCNSS_PIL_DEVICE);
+ if (IS_ERR(penv->pil)) {
+ dev_err(&pdev->dev, "Peripheral Loader failed on WCNSS.\n");
+ ret = PTR_ERR(penv->pil);
+ penv->pil = NULL;
+ goto fail_pil;
+ }
+
return 0;
+fail_pil:
+ if (penv->riva_ccu_base)
+ iounmap(penv->riva_ccu_base);
+ if (penv->fiq_reg)
+ iounmap(penv->fiq_reg);
+fail_ioremap4:
+ if (penv->pronto_ccpu_base)
+ iounmap(penv->pronto_ccpu_base);
fail_ioremap3:
- iounmap(penv->pronto_ccpu_base);
+ if (penv->pronto_a2xb_base)
+ iounmap(penv->pronto_a2xb_base);
fail_ioremap2:
- iounmap(penv->pronto_a2xb_base);
+ if (penv->msm_wcnss_base)
+ iounmap(penv->msm_wcnss_base);
fail_ioremap:
- iounmap(penv->msm_wcnss_base);
-fail_wake:
wake_lock_destroy(&penv->wcnss_wake_lock);
fail_res:
- if (penv->pil)
- subsystem_put(penv->pil);
-fail_pil:
wcnss_wlan_power(&pdev->dev, &penv->wlan_config,
- WCNSS_WLAN_SWITCH_OFF);
+ WCNSS_WLAN_SWITCH_OFF, NULL);
fail_power:
if (has_pronto_hw)
wcnss_pronto_gpios_config(&pdev->dev, false);
diff --git a/drivers/nfc/Kconfig b/drivers/nfc/Kconfig
index 5af95927..3039b0d 100644
--- a/drivers/nfc/Kconfig
+++ b/drivers/nfc/Kconfig
@@ -39,3 +39,12 @@
into the kernel or say M to compile it as module.
endmenu
+
+config NFC_QNCI
+ bool "Qualcomm NCI based NFC Controller Driver for qca199x"
+ depends on I2C
+ select CRC_CCITT
+ help
+ This enables the NFC driver for QCA199x based devices.
+ This is for i2c connected version. NCI protocol logic
+ resides in the usermode and it has no other NFC dependencies.
diff --git a/drivers/nfc/Makefile b/drivers/nfc/Makefile
index ab99e85..35a71e8 100644
--- a/drivers/nfc/Makefile
+++ b/drivers/nfc/Makefile
@@ -5,5 +5,6 @@
obj-$(CONFIG_PN544_NFC) += pn544.o
obj-$(CONFIG_NFC_PN533) += pn533.o
obj-$(CONFIG_NFC_WILINK) += nfcwilink.o
+obj-$(CONFIG_NFC_QNCI) += nfc-nci.o
ccflags-$(CONFIG_NFC_DEBUG) := -DDEBUG
diff --git a/drivers/nfc/nfc-nci.c b/drivers/nfc/nfc-nci.c
new file mode 100644
index 0000000..9e9a4ea
--- /dev/null
+++ b/drivers/nfc/nfc-nci.c
@@ -0,0 +1,764 @@
+/* Copyright (c) 2013, The Linux Foundation. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 and
+ * only version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#include <linux/kernel.h>
+#include <linux/module.h>
+#include <linux/fs.h>
+#include <linux/slab.h>
+#include <linux/i2c.h>
+#include <linux/irq.h>
+#include <linux/delay.h>
+#include <linux/interrupt.h>
+#include <linux/gpio.h>
+#include <linux/spinlock.h>
+#include <linux/poll.h>
+#include <linux/of_gpio.h>
+#include <linux/clk.h>
+#include <linux/of_device.h>
+#include <linux/regulator/consumer.h>
+#include "nfc-nci.h"
+
+
+struct qca199x_platform_data {
+ unsigned int irq_gpio;
+ unsigned int dis_gpio;
+ unsigned int ven_gpio;
+ unsigned int reg;
+};
+
+static struct of_device_id msm_match_table[] = {
+ {.compatible = "qcom,nfc-nci"},
+ {}
+};
+
+MODULE_DEVICE_TABLE(of, msm_match_table);
+
+#define MAX_BUFFER_SIZE (780)
+/* Read data */
+#define PACKET_HEADER_SIZE_NCI (4)
+#define PACKET_TYPE_NCI (16)
+#define MAX_PACKET_SIZE (PACKET_HEADER_SIZE_NCI + 255)
+#define MAX_QCA_REG (116)
+
+static int nfc_i2c_write(struct i2c_client *client, u8 *buf, int len);
+
+struct qca199x_dev {
+ wait_queue_head_t read_wq;
+ struct mutex read_mutex;
+ struct i2c_client *client;
+ struct miscdevice qca199x_device;
+ unsigned int irq_gpio;
+ unsigned int dis_gpio;
+ unsigned int ven_gpio;
+ bool irq_enabled;
+ spinlock_t irq_enabled_lock;
+ unsigned int count_irq;
+};
+
+/*
+ * To allow filtering of nfc logging from user. This is set via
+ * IOCTL NFC_KERNEL_LOGGING_MODE.
+ */
+static int logging_level;
+
+static void qca199x_init_stat(struct qca199x_dev *qca199x_dev)
+{
+ qca199x_dev->count_irq = 0;
+}
+
+static void qca199x_disable_irq(struct qca199x_dev *qca199x_dev)
+{
+ unsigned long flags;
+
+ spin_lock_irqsave(&qca199x_dev->irq_enabled_lock, flags);
+ if (qca199x_dev->irq_enabled) {
+ disable_irq_nosync(qca199x_dev->client->irq);
+ qca199x_dev->irq_enabled = false;
+ }
+ spin_unlock_irqrestore(&qca199x_dev->irq_enabled_lock, flags);
+}
+
+static void qca199x_enable_irq(struct qca199x_dev *qca199x_dev)
+{
+ unsigned long flags;
+
+ spin_lock_irqsave(&qca199x_dev->irq_enabled_lock, flags);
+ if (!qca199x_dev->irq_enabled) {
+ qca199x_dev->irq_enabled = true;
+ enable_irq(qca199x_dev->client->irq);
+ }
+ spin_unlock_irqrestore(&qca199x_dev->irq_enabled_lock, flags);
+}
+
+static irqreturn_t qca199x_dev_irq_handler(int irq, void *dev_id)
+{
+ struct qca199x_dev *qca199x_dev = dev_id;
+ unsigned long flags;
+
+
+ spin_lock_irqsave(&qca199x_dev->irq_enabled_lock, flags);
+ qca199x_dev->count_irq++;
+ spin_unlock_irqrestore(&qca199x_dev->irq_enabled_lock, flags);
+ wake_up(&qca199x_dev->read_wq);
+
+ return IRQ_HANDLED;
+}
+
+static unsigned int nfc_poll(struct file *filp, poll_table *wait)
+{
+ struct qca199x_dev *qca199x_dev = filp->private_data;
+ unsigned int mask = 0;
+ unsigned long flags;
+
+
+ poll_wait(filp, &qca199x_dev->read_wq, wait);
+
+ spin_lock_irqsave(&qca199x_dev->irq_enabled_lock, flags);
+ if (qca199x_dev->count_irq > 0) {
+ qca199x_dev->count_irq--;
+ mask |= POLLIN | POLLRDNORM;
+ }
+ spin_unlock_irqrestore(&qca199x_dev->irq_enabled_lock, flags);
+
+
+ return mask;
+}
+
+static ssize_t nfc_read(struct file *filp, char __user *buf,
+ size_t count, loff_t *offset)
+{
+ struct qca199x_dev *qca199x_dev = filp->private_data;
+ unsigned char tmp[MAX_BUFFER_SIZE];
+ unsigned char len[PAYLOAD_HEADER_LENGTH];
+ int total, length, ret;
+
+ total = 0;
+ length = 0;
+ if (count > MAX_BUFFER_SIZE)
+ count = MAX_BUFFER_SIZE;
+
+ mutex_lock(&qca199x_dev->read_mutex);
+ /* Read the header */
+ ret = i2c_master_recv(qca199x_dev->client, len, PAYLOAD_HEADER_LENGTH);
+ if (ret != PAYLOAD_HEADER_LENGTH)
+ goto err;
+ length = len[PAYLOAD_HEADER_LENGTH - 1];
+
+ /** make sure full packet fits in the buffer **/
+ if ((length > 0) && ((length + PAYLOAD_HEADER_LENGTH) <= count)) {
+ /* Read the packet */
+ ret = i2c_master_recv(qca199x_dev->client, tmp, (length +
+ PAYLOAD_HEADER_LENGTH));
+ if (ret < 0)
+ goto err;
+ total = (length + PAYLOAD_HEADER_LENGTH);
+ }
+ mutex_unlock(&qca199x_dev->read_mutex);
+ if (total > 0) {
+ if ((total > count) || copy_to_user(buf, tmp, total)) {
+ dev_err(&qca199x_dev->client->dev,
+ "failed to copy to user space, total = %d\n",
+ total);
+ total = -EFAULT;
+ }
+ }
+err:
+ if (ret < 0)
+ mutex_unlock(&qca199x_dev->read_mutex);
+
+ return total;
+}
+
+static ssize_t nfc_write(struct file *filp, const char __user *buf,
+ size_t count, loff_t *offset)
+{
+ struct qca199x_dev *qca199x_dev = filp->private_data;
+ char tmp[MAX_BUFFER_SIZE];
+ int ret;
+
+ if (count > MAX_BUFFER_SIZE) {
+ dev_err(&qca199x_dev->client->dev, "out of memory\n");
+ return -ENOMEM;
+ }
+ if (copy_from_user(tmp, buf, count)) {
+ dev_err(&qca199x_dev->client->dev,
+ "nfc-nci write: failed to copy from user space\n");
+ return -EFAULT;
+ }
+ mutex_lock(&qca199x_dev->read_mutex);
+ ret = i2c_master_send(qca199x_dev->client, tmp, count);
+ if (ret != count) {
+ dev_err(&qca199x_dev->client->dev,
+ "NFC: failed to write %d\n", ret);
+ ret = -EIO;
+ }
+ mutex_unlock(&qca199x_dev->read_mutex);
+
+ return ret;
+}
+
+static int nfc_open(struct inode *inode, struct file *filp)
+{
+ int ret = 0;
+
+ struct qca199x_dev *qca199x_dev = container_of(filp->private_data,
+ struct qca199x_dev,
+ qca199x_device);
+
+ filp->private_data = qca199x_dev;
+ qca199x_init_stat(qca199x_dev);
+ qca199x_enable_irq(qca199x_dev);
+ dev_dbg(&qca199x_dev->client->dev,
+ "%d,%d\n", imajor(inode), iminor(inode));
+ return ret;
+}
+
+/*
+ * Wake/Sleep Mode
+ */
+int nfcc_wake(int level, struct nfc_info *info)
+{
+ int r = 0;
+ unsigned char raw_nci_sleep[] = {0x2F, 0x03, 0x00};
+ /* Change slave address to 0xE */
+ unsigned char raw_nci_wake[] = {0x10, 0x0F};
+ unsigned short slave_addr = 0xE;
+ unsigned short curr_addr;
+
+ struct i2c_client *client = info->i2c_dev;
+
+ dev_dbg(&client->dev, "nfcc_wake: %s: info: %p\n", __func__, info);
+
+ if (level == NFCC_SLEEP) {
+ r = nfc_i2c_write(client, &raw_nci_sleep[0],
+ sizeof(raw_nci_sleep));
+
+ if (r != sizeof(raw_nci_sleep))
+ return -EMSGSIZE;
+ info->state = NFCC_STATE_NORMAL_SLEEP;
+ } else {
+ curr_addr = client->addr;
+ client->addr = slave_addr;
+ r = nfc_i2c_write(client, &raw_nci_wake[0],
+ sizeof(raw_nci_wake));
+ /* Restore original NFCC slave I2C address */
+ client->addr = curr_addr;
+
+ if (r != sizeof(raw_nci_sleep))
+ return -EMSGSIZE;
+
+ info->state = NFCC_STATE_NORMAL_WAKE;
+ }
+ msleep(20);
+ return r;
+}
+
+/*
+ * Inside nfc_ioctl_power_states
+ *
+ * @brief ioctl functions
+ *
+ *
+ * Device control
+ * remove control via ioctl
+ * (arg = 0): NFC_DISABLE GPIO = 0
+ * (arg = 1): NFC_DISABLE GPIO = 1
+ * NOT USED (arg = 2): FW_DL GPIO = 0
+ * NOT USED (arg = 3): FW_DL GPIO = 1
+ * (arg = 4): NFCC_WAKE = 1
+ * (arg = 5): NFCC_WAKE = 0
+ *
+ *
+ */
+int nfc_ioctl_power_states(struct file *filp, unsigned int cmd,
+ unsigned long arg)
+{
+ int r = 0;
+ struct qca199x_dev *qca199x_dev = filp->private_data;
+ struct nfc_info *info = container_of(filp->private_data,
+ struct nfc_info, miscdev);
+
+ struct i2c_client *client = info->i2c_dev;
+
+ r = gpio_request(qca199x_dev->dis_gpio, "nfc_reset_gpio");
+ if (r) {
+ dev_err(&client->dev, "unable to request gpio [%d]\n",
+ qca199x_dev->dis_gpio);
+ goto err_req;
+ }
+ gpio_set_value(qca199x_dev->dis_gpio, 0);
+ r = gpio_direction_output(qca199x_dev->dis_gpio, 1);
+ if (r) {
+ dev_err(&client->dev, "unable to set direction for gpio [%d]\n",
+ qca199x_dev->irq_gpio);
+ goto err_req;
+ }
+
+ if (arg == 0) {
+ gpio_set_value(qca199x_dev->dis_gpio, 0);
+ msleep(20);
+ } else if (arg == 1) {
+ gpio_set_value(qca199x_dev->dis_gpio, 1);
+ msleep(20);
+ } else if (arg == 2) {
+ msleep(20);
+ } else if (arg == 3) {
+ msleep(20);
+ } else if (arg == 4) {
+ nfcc_wake(NFCC_WAKE, info);
+ msleep(20);
+ } else if (arg == 5) {
+ nfcc_wake(NFCC_SLEEP, info);
+ msleep(20);
+ } else {
+ r = -ENOIOCTLCMD;
+ }
+
+err_req:
+ return r;
+}
+
+/*
+ * Inside nfc_ioctl_kernel_logging
+ *
+ * @brief nfc_ioctl_kernel_logging
+ *
+ * (arg = 0) ; NO_LOGGING
+ * (arg = 1) ; COMMS_LOGGING - BASIC LOGGING - Mainly just comms over I2C
+ * (arg = 2) ; FULL_LOGGING - ENABLE ALL - DBG messages for handlers etc.
+ * ; ! Be aware as amount of logging could impact behaviour !
+ *
+ *
+ */
+int nfc_ioctl_kernel_logging(unsigned long arg, struct file *filp)
+{
+ int retval = 0;
+ struct qca199x_dev *qca199x_dev = container_of(filp->private_data,
+ struct qca199x_dev,
+ qca199x_device);
+ if (arg == 0) {
+ dev_dbg(&qca199x_dev->client->dev,
+ "nfc_ioctl_kernel_logging : level = NO_LOGGING\n");
+ logging_level = 0;
+ } else if (arg == 1) {
+ dev_dbg(&qca199x_dev->client->dev,
+ "nfc_ioctl_kernel_logging: level = COMMS_LOGGING only\n");
+ logging_level = 1;
+ } else if (arg == 2) {
+ dev_dbg(&qca199x_dev->client->dev,
+ "nfc_ioctl_kernel_logging: level = FULL_LOGGING\n");
+ logging_level = 2;
+ }
+ return retval;
+}
+
+static long nfc_ioctl(struct file *pfile, unsigned int cmd, unsigned long arg)
+{
+ int r = 0;
+
+ switch (cmd) {
+
+ case NFC_SET_PWR:
+ nfc_ioctl_power_states(pfile, cmd, arg);
+ break;
+ case NFCC_MODE:
+ break;
+ case NFC_KERNEL_LOGGING_MODE:
+ nfc_ioctl_kernel_logging(arg, pfile);
+ break;
+ case SET_RX_BLOCK:
+ break;
+ case SET_EMULATOR_TEST_POINT:
+ break;
+ default:
+ r = -ENOIOCTLCMD;
+ }
+ return r;
+}
+
+static const struct file_operations nfc_dev_fops = {
+ .owner = THIS_MODULE,
+ .llseek = no_llseek,
+ .poll = nfc_poll,
+ .read = nfc_read,
+ .write = nfc_write,
+ .open = nfc_open,
+ .unlocked_ioctl = nfc_ioctl
+};
+
+void dumpqca1990(struct i2c_client *client)
+{
+ int r = 0;
+ int i = 0;
+ unsigned char raw_reg_rd = {0x0};
+ unsigned short temp_addr;
+
+ temp_addr = client->addr;
+ client->addr = 0x0E;
+
+ for (i = 0; i < MAX_QCA_REG; i++) {
+ raw_reg_rd = i;
+ if (((i >= 0x0) && (i < 0x4)) || ((i > 0x7) && (i < 0xA)) ||
+ ((i > 0xF) && (i < 0x12)) || ((i > 0x39) && (i < 0x4d)) ||
+ ((i > 0x69) && (i < 0x74)) || (i == 0x18) || (i == 0x30) ||
+ (i == 0x58)) {
+ r = nfc_i2c_write(client, &raw_reg_rd, 1);
+ msleep(20);
+ r = i2c_master_recv(client, &raw_reg_rd, 1);
+ }
+ }
+ client->addr = temp_addr;
+}
+
+static int nfc_i2c_write(struct i2c_client *client, u8 *buf, int len)
+{
+ int r;
+
+ r = i2c_master_send(client, buf, len);
+ dev_dbg(&client->dev, "send: %d\n", r);
+ if (r == -EREMOTEIO) { /* Retry, chip was in standby */
+ usleep_range(6000, 10000);
+ r = i2c_master_send(client, buf, len);
+ dev_dbg(&client->dev, "send2: %d\n", r);
+ }
+ if (r != len)
+ return -EREMOTEIO;
+
+ return r;
+}
+
+int nfcc_initialise(struct i2c_client *client, unsigned short curr_addr)
+{
+ int r = 0;
+ unsigned char raw_1p8_CONTROL_011[] = {0x11, XTAL_CLOCK};
+ unsigned char raw_1P8_CONTROL_010[] = {0x10, PWR_EN};
+ unsigned char raw_1P8_X0_0B0[] = {0xB0, (FREQ_SEL)};
+ unsigned char raw_slave1[] = {0x09, NCI_I2C_SLAVE};
+ unsigned char raw_slave2[] = {0x8, 0x10};
+ unsigned char raw_s73[] = {0x73, 0x02};
+ unsigned char raw_slave1_rd = {0x0};
+ unsigned char raw_1P8_PAD_CFG_CLK_REQ[] = {0xA5, 0x1};
+ unsigned char buf[4];
+
+ /* Set I2C address to enable configuration of QCA1990 */
+ client->addr = curr_addr;
+ RAW(s73, 0x02);
+
+ r = nfc_i2c_write(client, &raw_s73[0], sizeof(raw_s73));
+ usleep(1000);
+ RAW(1p8_CONTROL_011, XTAL_CLOCK | 0x01);
+
+ r = nfc_i2c_write(client, &raw_1p8_CONTROL_011[0],
+ sizeof(raw_1p8_CONTROL_011));
+ usleep(1000);
+ RAW(1P8_CONTROL_010, (0x8));
+ r = nfc_i2c_write(client, &raw_1P8_CONTROL_010[0],
+ sizeof(raw_1P8_CONTROL_010));
+
+ usleep(10000); /* 10ms wait */
+ RAW(1P8_CONTROL_010, (0xC));
+ r = nfc_i2c_write(client, &raw_1P8_CONTROL_010[0],
+ sizeof(raw_1P8_CONTROL_010));
+ usleep(100); /* 100uS wait */
+ RAW(1P8_X0_0B0, (FREQ_SEL_19));
+ r = nfc_i2c_write(client, &raw_1P8_X0_0B0[0], sizeof(raw_1P8_X0_0B0));
+ usleep(1000);
+
+ /* PWR_EN = 1 */
+ RAW(1P8_CONTROL_010, (0xd));
+ r = nfc_i2c_write(client, &raw_1P8_CONTROL_010[0],
+ sizeof(raw_1P8_CONTROL_010));
+ usleep(20000); /* 20ms wait */
+ /* LS_EN = 1 */
+ RAW(1P8_CONTROL_010, 0xF);
+ r = nfc_i2c_write(client, &raw_1P8_CONTROL_010[0],
+ sizeof(raw_1P8_CONTROL_010));
+ usleep(20000); /* 20ms wait */
+
+ /* Enable the PMIC clock */
+ RAW(1P8_PAD_CFG_CLK_REQ, (0x1));
+ r = nfc_i2c_write(client, &raw_1P8_PAD_CFG_CLK_REQ[0],
+ sizeof(raw_1P8_PAD_CFG_CLK_REQ));
+ usleep(1000);
+
+ RAW(slave2, 0x10);
+ r = nfc_i2c_write(client, &raw_slave2[0], sizeof(raw_slave2));
+ usleep(1000);
+ {
+ r = i2c_master_send(client, buf, 1);
+ memset(buf, 0xAA, sizeof(buf));
+ r = i2c_master_recv(client, buf, 1);
+ }
+ RAW(slave1, NCI_I2C_SLAVE);
+ r = nfc_i2c_write(client, &raw_slave1[0], sizeof(raw_slave1));
+ usleep(1000);
+
+ /* QCA199x NFCC CPU should now boot... */
+ r = i2c_master_recv(client, &raw_slave1_rd, 1);
+ /* Talk on NCI slave address NCI_I2C_SLAVE 0x2C*/
+ client->addr = NCI_I2C_SLAVE;
+
+ return r;
+}
+
+static int nfc_parse_dt(struct device *dev, struct qca199x_platform_data *pdata)
+{
+ int r = 0;
+ struct device_node *np = dev->of_node;
+
+ r = of_property_read_u32(np, "reg", &pdata->reg);
+ if (r)
+ return -EINVAL;
+
+ r = of_property_read_u32(np, "qcom,clk-gpio", &pdata->ven_gpio);
+ if (r)
+ return -EINVAL;
+
+ pdata->dis_gpio = of_get_named_gpio(np, "qcom,dis-gpio", 0);
+ if ((!gpio_is_valid(pdata->dis_gpio)))
+ return -EINVAL;
+
+ pdata->irq_gpio = of_get_named_gpio(np, "qcom,irq-gpio", 0);
+ if ((!gpio_is_valid(pdata->irq_gpio)))
+ return -EINVAL;
+
+ return r;
+}
+
+static int qca199x_probe(struct i2c_client *client,
+ const struct i2c_device_id *id)
+{
+ int r = 0;
+ int irqn = 0;
+ struct clk *nfc_clk;
+ struct device_node *node = client->dev.of_node;
+ struct qca199x_platform_data *platform_data;
+ struct qca199x_dev *qca199x_dev;
+
+ if (client->dev.of_node) {
+ platform_data = devm_kzalloc(&client->dev,
+ sizeof(struct qca199x_platform_data), GFP_KERNEL);
+ if (!platform_data) {
+ dev_err(&client->dev,
+ "nfc-nci probe: Failed to allocate memory\n");
+ return -ENOMEM;
+ }
+ r = nfc_parse_dt(&client->dev, platform_data);
+ if (r)
+ return r;
+ } else {
+ platform_data = client->dev.platform_data;
+ }
+ if (!platform_data)
+ return -EINVAL;
+ dev_dbg(&client->dev,
+ "nfc-nci probe: %s, inside nfc-nci flags = %x\n",
+ __func__, client->flags);
+ if (platform_data == NULL) {
+ dev_err(&client->dev, "nfc-nci probe: failed\n");
+ return -ENODEV;
+ }
+ if (!i2c_check_functionality(client->adapter, I2C_FUNC_I2C)) {
+ dev_err(&client->dev, "nfc-nci probe: need I2C_FUNC_I2C\n");
+ return -ENODEV;
+ }
+ qca199x_dev = kzalloc(sizeof(*qca199x_dev), GFP_KERNEL);
+ if (qca199x_dev == NULL) {
+ dev_err(&client->dev,
+ "nfc-nci probe: failed to allocate memory for module data\n");
+ return -ENOMEM;
+ }
+ if (gpio_is_valid(platform_data->irq_gpio)) {
+ r = gpio_request(platform_data->irq_gpio, "nfc_irq_gpio");
+ if (r) {
+ dev_err(&client->dev, "unable to request gpio [%d]\n",
+ platform_data->irq_gpio);
+ goto err_irq;
+ }
+ r = gpio_direction_input(platform_data->irq_gpio);
+ if (r) {
+
+ dev_err(&client->dev,
+ "unable to set direction for gpio [%d]\n",
+ platform_data->irq_gpio);
+ goto err_irq;
+ }
+ gpio_to_irq(0);
+ irqn = gpio_to_irq(platform_data->irq_gpio);
+ if (irqn < 0) {
+ r = irqn;
+ goto err_irq;
+ }
+ client->irq = irqn;
+
+ } else {
+ dev_err(&client->dev, "irq gpio not provided\n");
+ goto err_free_dev;
+ }
+ if (gpio_is_valid(platform_data->dis_gpio)) {
+ r = gpio_request(platform_data->dis_gpio, "nfc_reset_gpio");
+ if (r) {
+ dev_err(&client->dev,
+ "NFC: unable to request gpio [%d]\n",
+ platform_data->dis_gpio);
+ goto err_dis_gpio;
+ }
+ r = gpio_direction_output(platform_data->dis_gpio, 1);
+ if (r) {
+ dev_err(&client->dev,
+ "NFC: unable to set direction for gpio [%d]\n",
+ platform_data->dis_gpio);
+ goto err_dis_gpio;
+ }
+ } else {
+ dev_err(&client->dev, "dis gpio not provided\n");
+ goto err_irq;
+ }
+
+ nfc_clk = clk_get(&client->dev, "ref_clk");
+
+ if (nfc_clk == NULL)
+ goto err_dis_gpio;
+
+ r = clk_prepare_enable(nfc_clk);
+ if (r)
+ goto err_dis_gpio;
+
+ platform_data->ven_gpio = of_get_named_gpio(node,
+ "qcom,clk-gpio", 0);
+
+ if (gpio_is_valid(platform_data->ven_gpio)) {
+ r = gpio_request(platform_data->ven_gpio, "nfc_ven_gpio");
+ if (r) {
+ dev_err(&client->dev, "unable to request gpio [%d]\n",
+ platform_data->irq_gpio);
+ goto err_ven_gpio;
+ }
+ r = gpio_direction_input(platform_data->ven_gpio);
+ if (r) {
+
+ dev_err(&client->dev,
+ "unable to set direction for gpio [%d]\n",
+ platform_data->irq_gpio);
+ goto err_ven_gpio;
+ }
+
+ } else {
+
+ dev_err(&client->dev, "ven gpio not provided\n");
+ goto err_dis_gpio;
+ }
+ qca199x_dev->dis_gpio = platform_data->dis_gpio;
+ qca199x_dev->irq_gpio = platform_data->irq_gpio;
+ qca199x_dev->ven_gpio = platform_data->ven_gpio;
+ qca199x_dev->client = client;
+
+ /* init mutex and queues */
+ init_waitqueue_head(&qca199x_dev->read_wq);
+ mutex_init(&qca199x_dev->read_mutex);
+ spin_lock_init(&qca199x_dev->irq_enabled_lock);
+
+ qca199x_dev->qca199x_device.minor = MISC_DYNAMIC_MINOR;
+ qca199x_dev->qca199x_device.name = "nfc-nci";
+ qca199x_dev->qca199x_device.fops = &nfc_dev_fops;
+
+ r = misc_register(&qca199x_dev->qca199x_device);
+ if (r) {
+ dev_err(&client->dev, "misc_register failed\n");
+ goto err_misc_register;
+ }
+
+ logging_level = 0;
+ /* request irq. The irq is set whenever the chip has data available
+ * for reading. It is cleared when all data has been read.
+ */
+ nfcc_initialise(client, platform_data->reg);
+
+ qca199x_dev->irq_enabled = true;
+ r = request_irq(client->irq, qca199x_dev_irq_handler,
+ IRQF_TRIGGER_RISING, client->name, qca199x_dev);
+ if (r) {
+ dev_err(&client->dev, "nfc-nci probe: request_irq failed\n");
+ goto err_request_irq_failed;
+ }
+ qca199x_disable_irq(qca199x_dev);
+ i2c_set_clientdata(client, qca199x_dev);
+ dev_dbg(&client->dev,
+ "nfc-nci probe: %s, probing qca1990 exited successfully\n",
+ __func__);
+ return 0;
+
+err_request_irq_failed:
+ misc_deregister(&qca199x_dev->qca199x_device);
+err_misc_register:
+ mutex_destroy(&qca199x_dev->read_mutex);
+err_ven_gpio:
+ gpio_free(platform_data->ven_gpio);
+err_dis_gpio:
+ gpio_free(platform_data->dis_gpio);
+err_irq:
+ gpio_free(platform_data->irq_gpio);
+err_free_dev:
+ kfree(qca199x_dev);
+ return r;
+}
+
+static int qca199x_remove(struct i2c_client *client)
+{
+ struct qca199x_dev *qca199x_dev;
+
+ qca199x_dev = i2c_get_clientdata(client);
+ free_irq(client->irq, qca199x_dev);
+ misc_deregister(&qca199x_dev->qca199x_device);
+ mutex_destroy(&qca199x_dev->read_mutex);
+ gpio_free(qca199x_dev->irq_gpio);
+ gpio_free(qca199x_dev->dis_gpio);
+ gpio_free(qca199x_dev->ven_gpio);
+ kfree(qca199x_dev);
+
+ return 0;
+}
+
+static const struct i2c_device_id qca199x_id[] = {
+ {"qca199x-i2c", 0},
+ {}
+};
+
+static struct i2c_driver qca199x = {
+ .id_table = qca199x_id,
+ .probe = qca199x_probe,
+ .remove = qca199x_remove,
+ .driver = {
+ .owner = THIS_MODULE,
+ .name = "nfc-nci",
+ .of_match_table = msm_match_table,
+ },
+};
+
+/*
+ * module load/unload record keeping
+ */
+static int __init qca199x_dev_init(void)
+{
+ return i2c_add_driver(&qca199x);
+}
+module_init(qca199x_dev_init);
+
+static void __exit qca199x_dev_exit(void)
+{
+ i2c_del_driver(&qca199x);
+}
+module_exit(qca199x_dev_exit);
+
+MODULE_DESCRIPTION("NFC QCA199x");
+MODULE_LICENSE("GPL v2");
+
diff --git a/drivers/nfc/nfc-nci.h b/drivers/nfc/nfc-nci.h
new file mode 100644
index 0000000..4398df7
--- /dev/null
+++ b/drivers/nfc/nfc-nci.h
@@ -0,0 +1,222 @@
+/* Copyright (c) 2013, The Linux Foundation. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 and
+ * only version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#ifndef __NFC_NCI_H
+#define __NFC_NCI_H
+
+#include <linux/i2c.h>
+#include <linux/types.h>
+#include <linux/version.h>
+
+#include <linux/semaphore.h>
+#include <linux/completion.h>
+
+#include <linux/ioctl.h>
+#include <linux/cdev.h>
+#include <linux/miscdevice.h>
+
+struct nfc_device {
+ struct cdev cdev;
+ struct class *char_class;
+};
+
+enum ehandler_mode {
+ UNSOLICITED_READ_MODE = 0,
+ SOLICITED_READ_MODE
+};
+
+enum ekernel_logging_mode {
+ LEVEL_0 = 0, /* For Basic Comms, such asNCI TX/TX to NFCC */
+ LEVEL_1, /* Other Debug e.g. Notifications, ISR hit, etc ..*/
+ LEVEL_2,
+ LEVEL_3,
+ LEVEL_4,
+ LEVEL_5
+};
+
+struct DeviceMode {
+ enum ehandler_mode handle_flavour;
+} tDeviceMode;
+
+#define NFC_DRIVER_NAME "nfc-nci"
+#define NFC_I2C_DRIVER_NAME "NCI NFC I2C Interface",
+
+#define NCI_I2C_SLAVE (0x2C)
+#define NFC_I2C_BUS 3 /* 6, 10, 4, 5 */
+#define NFC_SET_PWR _IOW(0xE9, 0x01, unsigned int)
+#define NFCC_MODE _IOW(0xE9, 0x02, unsigned int)
+#define NFC_KERNEL_LOGGING_MODE _IOW(0xE9, 0x03, unsigned int)
+#define SET_RX_BLOCK _IOW(0xE9, 0x04, unsigned int)
+#define SET_EMULATOR_TEST_POINT _IOW(0xE9, 0x05, unsigned int)
+
+#define NFC_MAX_I2C_TRANSFER (0x0400)
+#define NFC_MSG_MAX_SIZE (0x21)
+
+#define NFC_RX_BUFFER_CNT_START (0x0)
+
+#define NFC_RX_BUFFER_BLOCK_SIZE (0x120) /* Bytes per Block */
+#define NFC_RX_BUFFER_PAGE_SIZE (0x1000) /* Page size Bytes */
+#define NFC_RX_BUFFER_PAGES (0x8)
+#define NFC_RX_ORDER_FREE_PAGES (0x3) /* Free 8 Pages */
+
+/* The total no. of Blocks */
+#define NFC_RX_BUFFER_CNT_LIMIT (unsigned short)( \
+ ( \
+ ((NFC_RX_BUFFER_PAGE_SIZE) *\
+ (NFC_RX_BUFFER_PAGES))/\
+ (NFC_RX_BUFFER_BLOCK_SIZE)\
+ ) \
+ ) \
+
+#define PAYLOAD_HEADER_LENGTH (0x3)
+#define PAYLOAD_LENGTH_MAX (256)
+#define BYTE (0x8)
+#define NCI_IDENTIFIER (0x10)
+
+/** Power Management Related **/
+
+#define NFCC_WAKE (0x01)
+#define NFCC_SLEEP (0x00)
+
+#define XTAL_CLOCK (0X00)
+#define REFERENCE_CLOCK (0X01)
+
+/* LDO Trim Settings */
+#define IPTAT_TRIM (0x1F)
+#define V1P1_TRIM (0x0F)
+#define V1P8_TRIM (0x0F)
+#define VBATT_OK_THRESHOLD (0x07)
+
+#define PWR_EN (0x08) /* Enable 1.1V LDO Regulator */
+#define LS_EN (0x04) /* Enable 1.1V->1.8V Level Shifters */
+
+/* Write '1' to cause wake event to NFCC. If set NFCC will not go to SLEEP */
+#define NCI_WAKE (0x02)
+
+#define NCI_ENA (0x01) /* Write '1' to enable PLL */
+#define FREQ_SEL (0x00) /* XO Frequency Select */
+#define FREQ_SEL_13 (0x00) /* XO Frequency Select = 13.56MHz */
+#define FREQ_SEL_19 (0x01) /* XO Frequency Select = 19.20 MHz */
+#define FREQ_SEL_26 (0x02) /* XO Frequency Select = 26.00 MHz */
+#define FREQ_SEL_27 (0x03) /* XO Frequency Select = 27.12 MHz */
+#define FREQ_SEL_37 (0x04) /* XO Frequency Select = 37.40 MHz */
+#define FREQ_SEL_38 (0x05) /* XO Frequency Select = 38.40 MHz */
+#define FREQ_SEL_40 (0x06) /* XO Frequency Select = 40.00 MHz */
+#define FREQ_SEL_48 (0x07) /* XO Frequency Select = 48.00 MHz */
+#define FREQ_SEL_27 (0x03) /* XO Frequency Select */
+
+
+#define QUALIFY_REFCLK (0x80)
+#define QUALIFY_OSC (0x40)
+#define LOCALBIASXTAL (0x20)
+#define BIAS2X_FORCE (0x10)
+#define BIAS2X (0x08)
+#define LBIAS2X (0x04)
+#define SMALLRF (0x02)
+#define SMALLRBIAS (0x01)
+
+/* Select as appropriate */
+#define CRYSTAL_OSC ((QUALIFY_REFCLK) | (QUALIFY_OSC) | \
+ (LOCALBIASXTAL) | (BIAS2X_FORCE) | \
+ (BIAS2X) | (LBIAS2X) | (SMALLRF) | (SMALLRBIAS))
+
+#define CDACIN (0x3F) /* Tuning range for load capacitor at X1*/
+#define CDACOUT (0x3F) /* Tuning range for load capacitor at X2*/
+
+#define RAW(reg, value) (raw_##reg[1] = value)
+
+/* Logging macro with threshold control */
+#define PRINTK(LEVEL, THRESHOLD, pString, ...) ( \
+ if (LEVEL > THRESHOLD) { \
+ pr_info(pString, ##__VA_ARGS__); \
+ } \
+ )
+
+/* board config */
+struct nfc_platform_data {
+ int (*request_resources) (struct i2c_client *client);
+ void (*free_resources) (void);
+ void (*enable) (int fw);
+ int (*test) (void);
+ void (*disable) (void);
+};
+/*
+ * Internal NFCC Hardware states. At present these may not be possible to
+ * detect in software as possibly no power when
+ * in monitor state! Also, need to detect DISABLE control GPIO from PMIC.
+ */
+enum nfcc_hardware_state {
+ NFCC_STATE_MONITOR, /* VBAT < h/w Critcal Voltage */
+ /* VBAT > H/W Critical Voltage;
+ Lowest Power Mode - DISABLE = 1; only
+ possible when phone is ON */
+ NFCC_STATE_HPD,
+ /* VBAT > H/W Critical Voltage; DISABLE = 0;
+ Only possible when phone is ON */
+ NFCC_STSTE_ULPM,
+ /* VBAT > H/W Critical Voltage; DISABLE = 0;
+ Powered by PMIC & VBAT; 1.8V I/O supply on; VDDPX available, boot is
+ initiated by host over I2C */
+ NFCC_STATE_NORMAL_REGION1,
+ /* VBAT > H/W Critical Voltage; DISABLE = 0;
+ Powered by VBAT; 1.8V I/O supply on; VDDPX available, boot is initiated
+ by host over I2C */
+ NFCC_STATE_NORMAL_REGION2,
+};
+
+/* We assume here that VBATT > h/w Critical Voltage */
+enum nfcc_state {
+ /* Assume In ULPM state, ready for initialisation, cannot detect for
+ Monitor or HPD states */
+ NFCC_STATE_COLD,
+ /* (VDDPX==1) && (Following I2C initialisation). In Region 1 or Region2
+ state WAKE */
+ NFCC_STATE_NORMAL_WAKE,
+ /* (VDDPX==1) && (Following I2C initialisation). In Region 1 or Region2
+ state SLEEP */
+ NFCC_STATE_NORMAL_SLEEP,
+};
+
+
+enum nfcc_irq {
+ NFCC_NO_INT,
+ NFCC_INT,
+};
+
+
+struct nfc_info {
+ struct miscdevice miscdev;
+ struct i2c_client *i2c_dev;
+ struct regulator_bulk_data regs[3];
+ enum nfcc_state state;
+ wait_queue_head_t read_wait;
+ loff_t read_offset;
+ struct mutex read_mutex;
+ struct mutex mutex;
+ u8 *buf;
+ size_t buflen;
+ spinlock_t irq_enabled_lock;
+ unsigned int count_irq;
+ enum nfcc_irq read_irq;
+};
+
+
+struct nfc_i2c_platform_data {
+ unsigned int nfc_irq_gpio;
+ unsigned int nfc_clk_en_gpio;
+ unsigned int dis_gpio;
+ unsigned int irq_gpio;
+ unsigned int ven_gpio;
+ unsigned int firm_gpio;
+ unsigned int reg;
+};
+#endif
diff --git a/drivers/of/gpio.c b/drivers/of/gpio.c
index 94e76d8..7b41fd8 100644
--- a/drivers/of/gpio.c
+++ b/drivers/of/gpio.c
@@ -18,6 +18,7 @@
#include <linux/of.h>
#include <linux/of_address.h>
#include <linux/of_gpio.h>
+#include <linux/pinctrl/pinctrl.h>
#include <linux/slab.h>
/**
@@ -206,6 +207,53 @@
}
EXPORT_SYMBOL(of_mm_gpiochip_add);
+#ifdef CONFIG_PINCTRL
+void of_gpiochip_add_pin_range(struct gpio_chip *chip)
+{
+ struct device_node *np = chip->of_node;
+ struct of_phandle_args pinspec;
+ struct pinctrl_dev *pctldev;
+ int index = 0, ret;
+
+ if (!np)
+ return;
+
+ do {
+ ret = of_parse_phandle_with_args(np, "gpio-ranges",
+ "#gpio-range-cells", index, &pinspec);
+ if (ret)
+ break;
+
+ pctldev = of_pinctrl_get(pinspec.np);
+ if (!pctldev)
+ break;
+
+ ret = gpiochip_add_pin_range(chip,
+ pinctrl_dev_get_name(pctldev),
+ pinspec.args[0],
+ pinspec.args[1]);
+
+ if (ret)
+ break;
+
+ } while (index++);
+}
+
+void of_gpiochip_remove_pin_range(struct gpio_chip *chip)
+{
+ struct gpio_pin_range *pin_range, *tmp;
+
+ list_for_each_entry_safe(pin_range, tmp, &chip->pin_ranges, node) {
+ list_del(&pin_range->node);
+ pinctrl_remove_gpio_range(pin_range->pctldev,
+ &pin_range->range);
+ }
+}
+#else
+void of_gpiochip_add_pin_range(struct gpio_chip *chip) {}
+void of_gpiochip_remove_pin_range(struct gpio_chip *chip) {}
+#endif
+
void of_gpiochip_add(struct gpio_chip *chip)
{
if ((!chip->of_node) && (chip->dev))
@@ -219,11 +267,14 @@
chip->of_xlate = of_gpio_simple_xlate;
}
+ of_gpiochip_add_pin_range(chip);
of_node_get(chip->of_node);
}
void of_gpiochip_remove(struct gpio_chip *chip)
{
+ of_gpiochip_remove_pin_range(chip);
+
if (chip->of_node)
of_node_put(chip->of_node);
}
diff --git a/drivers/pinctrl/Kconfig b/drivers/pinctrl/Kconfig
index abfb964..3671ac2 100644
--- a/drivers/pinctrl/Kconfig
+++ b/drivers/pinctrl/Kconfig
@@ -4,7 +4,6 @@
config PINCTRL
bool
- depends on EXPERIMENTAL
if PINCTRL
@@ -35,19 +34,16 @@
bool "MMP2 pin controller driver"
depends on ARCH_MMP
select PINCTRL_PXA3xx
- select PINCONF
config PINCTRL_PXA168
bool "PXA168 pin controller driver"
depends on ARCH_MMP
select PINCTRL_PXA3xx
- select PINCONF
config PINCTRL_PXA910
bool "PXA910 pin controller driver"
depends on ARCH_MMP
select PINCTRL_PXA3xx
- select PINCONF
config PINCTRL_SIRF
bool "CSR SiRFprimaII pin controller driver"
@@ -56,17 +52,15 @@
config PINCTRL_TEGRA
bool
+ select PINMUX
+ select PINCONF
config PINCTRL_TEGRA20
bool
- select PINMUX
- select PINCONF
select PINCTRL_TEGRA
config PINCTRL_TEGRA30
bool
- select PINMUX
- select PINCONF
select PINCTRL_TEGRA
config PINCTRL_U300
@@ -77,7 +71,7 @@
config PINCTRL_COH901
bool "ST-Ericsson U300 COH 901 335/571 GPIO"
- depends on GPIOLIB && ARCH_U300 && PINMUX_U300
+ depends on GPIOLIB && ARCH_U300 && PINCTRL_U300
help
Say yes here to support GPIO interface on ST-Ericsson U300.
The names of the two IP block variants supported are
diff --git a/drivers/pinctrl/Makefile b/drivers/pinctrl/Makefile
index 6d4150b..8e3c95a 100644
--- a/drivers/pinctrl/Makefile
+++ b/drivers/pinctrl/Makefile
@@ -5,6 +5,9 @@
obj-$(CONFIG_PINCTRL) += core.o
obj-$(CONFIG_PINMUX) += pinmux.o
obj-$(CONFIG_PINCONF) += pinconf.o
+ifeq ($(CONFIG_OF),y)
+obj-$(CONFIG_PINCTRL) += devicetree.o
+endif
obj-$(CONFIG_GENERIC_PINCONF) += pinconf-generic.o
obj-$(CONFIG_PINCTRL_PXA3xx) += pinctrl-pxa3xx.o
obj-$(CONFIG_PINCTRL_MMP2) += pinctrl-mmp2.o
diff --git a/drivers/pinctrl/core.c b/drivers/pinctrl/core.c
index df6296c..b0de6e7 100644
--- a/drivers/pinctrl/core.c
+++ b/drivers/pinctrl/core.c
@@ -14,6 +14,7 @@
#define pr_fmt(fmt) "pinctrl core: " fmt
#include <linux/kernel.h>
+#include <linux/kref.h>
#include <linux/export.h>
#include <linux/init.h>
#include <linux/device.h>
@@ -23,41 +24,42 @@
#include <linux/sysfs.h>
#include <linux/debugfs.h>
#include <linux/seq_file.h>
+#include <linux/pinctrl/consumer.h>
#include <linux/pinctrl/pinctrl.h>
#include <linux/pinctrl/machine.h>
#include "core.h"
+#include "devicetree.h"
#include "pinmux.h"
#include "pinconf.h"
-/**
- * struct pinctrl_maps - a list item containing part of the mapping table
- * @node: mapping table list node
- * @maps: array of mapping table entries
- * @num_maps: the number of entries in @maps
- */
-struct pinctrl_maps {
- struct list_head node;
- struct pinctrl_map const *maps;
- unsigned num_maps;
-};
+
+static bool pinctrl_dummy_state;
/* Mutex taken by all entry points */
DEFINE_MUTEX(pinctrl_mutex);
/* Global list of pin control devices (struct pinctrl_dev) */
-static LIST_HEAD(pinctrldev_list);
+LIST_HEAD(pinctrldev_list);
/* List of pin controller handles (struct pinctrl) */
static LIST_HEAD(pinctrl_list);
/* List of pinctrl maps (struct pinctrl_maps) */
-static LIST_HEAD(pinctrl_maps);
+LIST_HEAD(pinctrl_maps);
-#define for_each_maps(_maps_node_, _i_, _map_) \
- list_for_each_entry(_maps_node_, &pinctrl_maps, node) \
- for (_i_ = 0, _map_ = &_maps_node_->maps[_i_]; \
- _i_ < _maps_node_->num_maps; \
- i++, _map_ = &_maps_node_->maps[_i_])
+
+/**
+ * pinctrl_provide_dummies() - indicate if pinctrl provides dummy state support
+ *
+ * Usually this function is called by platforms without pinctrl driver support
+ * but run with some shared drivers using pinctrl APIs.
+ * After calling this function, the pinctrl core will return successfully
+ * with creating a dummy state for the driver to keep going smoothly.
+ */
+void pinctrl_provide_dummies(void)
+{
+ pinctrl_dummy_state = true;
+}
const char *pinctrl_dev_get_name(struct pinctrl_dev *pctldev)
{
@@ -66,6 +68,12 @@
}
EXPORT_SYMBOL_GPL(pinctrl_dev_get_name);
+const char *pinctrl_dev_get_devname(struct pinctrl_dev *pctldev)
+{
+ return dev_name(pctldev->dev);
+}
+EXPORT_SYMBOL_GPL(pinctrl_dev_get_devname);
+
void *pinctrl_dev_get_drvdata(struct pinctrl_dev *pctldev)
{
return pctldev->driver_data;
@@ -124,6 +132,25 @@
}
/**
+ * pin_get_name_from_id() - look up a pin name from a pin id
+ * @pctldev: the pin control device to lookup the pin on
+ * @name: the name of the pin to look up
+ */
+const char *pin_get_name(struct pinctrl_dev *pctldev, const unsigned pin)
+{
+ const struct pin_desc *desc;
+
+ desc = pin_desc_get(pctldev, pin);
+ if (desc == NULL) {
+ dev_err(pctldev->dev, "failed to get pin(%d) name\n",
+ pin);
+ return NULL;
+ }
+
+ return desc->name;
+}
+
+/**
* pin_is_valid() - check if pin exists on controller
* @pctldev: the pin control device to check the pin on
* @pin: pin to check, use the local pin controller index number
@@ -194,8 +221,10 @@
pindesc->name = name;
} else {
pindesc->name = kasprintf(GFP_KERNEL, "PIN%u", number);
- if (pindesc->name == NULL)
+ if (pindesc->name == NULL) {
+ kfree(pindesc);
return -ENOMEM;
+ }
pindesc->dynamic_name = true;
}
@@ -255,7 +284,8 @@
*
* Find the pin controller handling a certain GPIO pin from the pinspace of
* the GPIO subsystem, return the device and the matching GPIO range. Returns
- * negative if the GPIO range could not be found in any device.
+ * -EPROBE_DEFER if the GPIO range could not be found in any device since it
+ * may still have not been registered.
*/
static int pinctrl_get_device_gpio_range(unsigned gpio,
struct pinctrl_dev **outdev,
@@ -275,7 +305,7 @@
}
}
- return -EINVAL;
+ return -EPROBE_DEFER;
}
/**
@@ -295,6 +325,59 @@
}
EXPORT_SYMBOL_GPL(pinctrl_add_gpio_range);
+void pinctrl_add_gpio_ranges(struct pinctrl_dev *pctldev,
+ struct pinctrl_gpio_range *ranges,
+ unsigned nranges)
+{
+ int i;
+
+ for (i = 0; i < nranges; i++)
+ pinctrl_add_gpio_range(pctldev, &ranges[i]);
+}
+EXPORT_SYMBOL_GPL(pinctrl_add_gpio_ranges);
+
+struct pinctrl_dev *pinctrl_find_and_add_gpio_range(const char *devname,
+ struct pinctrl_gpio_range *range)
+{
+ struct pinctrl_dev *pctldev = get_pinctrl_dev_from_devname(devname);
+
+ /*
+ * If we can't find this device, let's assume that is because
+ * it has not probed yet, so the driver trying to register this
+ * range need to defer probing.
+ */
+ if (!pctldev)
+ return ERR_PTR(-EPROBE_DEFER);
+
+ pinctrl_add_gpio_range(pctldev, range);
+ return pctldev;
+}
+EXPORT_SYMBOL_GPL(pinctrl_find_and_add_gpio_range);
+
+/**
+ * pinctrl_find_gpio_range_from_pin() - locate the GPIO range for a pin
+ * @pctldev: the pin controller device to look in
+ * @pin: a controller-local number to find the range for
+ */
+struct pinctrl_gpio_range *
+pinctrl_find_gpio_range_from_pin(struct pinctrl_dev *pctldev,
+ unsigned int pin)
+{
+ struct pinctrl_gpio_range *range = NULL;
+
+ /* Loop over the ranges */
+ list_for_each_entry(range, &pctldev->gpio_ranges, node) {
+ /* Check if we're in the valid range */
+ if (pin >= range->pin_base &&
+ pin < range->pin_base + range->npins) {
+ return range;
+ }
+ }
+
+ return NULL;
+}
+EXPORT_SYMBOL_GPL(pinctrl_find_gpio_range_from_pin);
+
/**
* pinctrl_remove_gpio_range() - remove a range of GPIOs fro a pin controller
* @pctldev: pin controller device to remove the range from
@@ -318,9 +401,10 @@
const char *pin_group)
{
const struct pinctrl_ops *pctlops = pctldev->desc->pctlops;
+ unsigned ngroups = pctlops->get_groups_count(pctldev);
unsigned group_selector = 0;
- while (pctlops->list_groups(pctldev, group_selector) >= 0) {
+ while (group_selector < ngroups) {
const char *gname = pctlops->get_group_name(pctldev,
group_selector);
if (!strcmp(gname, pin_group)) {
@@ -360,7 +444,7 @@
ret = pinctrl_get_device_gpio_range(gpio, &pctldev, &range);
if (ret) {
mutex_unlock(&pinctrl_mutex);
- return -EINVAL;
+ return ret;
}
/* Convert to the pin controllers number space */
@@ -516,13 +600,21 @@
setting->pctldev = get_pinctrl_dev_from_devname(map->ctrl_dev_name);
if (setting->pctldev == NULL) {
- dev_err(p->dev, "unknown pinctrl device %s in map entry",
- map->ctrl_dev_name);
kfree(setting);
- /* Eventually, this should trigger deferred probe */
- return -ENODEV;
+ /* Do not defer probing of hogs (circular loop) */
+ if (!strcmp(map->ctrl_dev_name, map->dev_name))
+ return -ENODEV;
+ /*
+ * OK let us guess that the driver is not there yet, and
+ * let's defer obtaining this pinctrl handle to later...
+ */
+ dev_info(p->dev, "unknown pinctrl device %s in map entry, deferring probe",
+ map->ctrl_dev_name);
+ return -EPROBE_DEFER;
}
+ setting->dev_name = map->dev_name;
+
switch (map->type) {
case PIN_MAP_TYPE_MUX_GROUP:
ret = pinmux_map_to_setting(map, setting);
@@ -579,6 +671,13 @@
}
p->dev = dev;
INIT_LIST_HEAD(&p->states);
+ INIT_LIST_HEAD(&p->dt_maps);
+
+ ret = pinctrl_dt_to_map(p);
+ if (ret < 0) {
+ kfree(p);
+ return ERR_PTR(ret);
+ }
devname = dev_name(dev);
@@ -589,13 +688,33 @@
continue;
ret = add_setting(p, map);
- if (ret < 0) {
+ /*
+ * At this point the adding of a setting may:
+ *
+ * - Defer, if the pinctrl device is not yet available
+ * - Fail, if the pinctrl device is not yet available,
+ * AND the setting is a hog. We cannot defer that, since
+ * the hog will kick in immediately after the device
+ * is registered.
+ *
+ * If the error returned was not -EPROBE_DEFER then we
+ * accumulate the errors to see if we end up with
+ * an -EPROBE_DEFER later, as that is the worst case.
+ */
+ if (ret == -EPROBE_DEFER) {
pinctrl_put_locked(p, false);
return ERR_PTR(ret);
}
}
+ if (ret < 0) {
+ /* If some other error than deferral occured, return here */
+ pinctrl_put_locked(p, false);
+ return ERR_PTR(ret);
+ }
- /* Add the pinmux to the global list */
+ kref_init(&p->users);
+
+ /* Add the pinctrl handle to the global list */
list_add_tail(&p->node, &pinctrl_list);
return p;
@@ -608,15 +727,19 @@
if (WARN_ON(!dev))
return ERR_PTR(-EINVAL);
+ /*
+ * See if somebody else (such as the device core) has already
+ * obtained a handle to the pinctrl for this device. In that case,
+ * return another pointer to it.
+ */
p = find_pinctrl(dev);
- if (p != NULL)
- return ERR_PTR(-EBUSY);
-
- p = create_pinctrl(dev);
- if (IS_ERR(p))
+ if (p != NULL) {
+ dev_dbg(dev, "obtain a copy of previously claimed pinctrl\n");
+ kref_get(&p->users);
return p;
+ }
- return p;
+ return create_pinctrl(dev);
}
/**
@@ -662,19 +785,32 @@
kfree(state);
}
+ pinctrl_dt_free_maps(p);
+
if (inlist)
list_del(&p->node);
kfree(p);
}
/**
- * pinctrl_put() - release a previously claimed pinctrl handle
+ * pinctrl_release() - release the pinctrl handle
+ * @kref: the kref in the pinctrl being released
+ */
+static void pinctrl_release(struct kref *kref)
+{
+ struct pinctrl *p = container_of(kref, struct pinctrl, users);
+
+ pinctrl_put_locked(p, true);
+}
+
+/**
+ * pinctrl_put() - decrease use count on a previously claimed pinctrl handle
* @p: the pinctrl handle to release
*/
void pinctrl_put(struct pinctrl *p)
{
mutex_lock(&pinctrl_mutex);
- pinctrl_put_locked(p, true);
+ kref_put(&p->users, pinctrl_release);
mutex_unlock(&pinctrl_mutex);
}
EXPORT_SYMBOL_GPL(pinctrl_put);
@@ -685,8 +821,15 @@
struct pinctrl_state *state;
state = find_state(p, name);
- if (!state)
- return ERR_PTR(-ENODEV);
+ if (!state) {
+ if (pinctrl_dummy_state) {
+ /* create dummy state */
+ dev_dbg(p->dev, "using pinctrl dummy state (%s)\n",
+ name);
+ state = create_state(p, name);
+ } else
+ state = ERR_PTR(-ENODEV);
+ }
return state;
}
@@ -787,15 +930,63 @@
}
EXPORT_SYMBOL_GPL(pinctrl_select_state);
+static void devm_pinctrl_release(struct device *dev, void *res)
+{
+ pinctrl_put(*(struct pinctrl **)res);
+}
+
/**
- * pinctrl_register_mappings() - register a set of pin controller mappings
- * @maps: the pincontrol mappings table to register. This should probably be
- * marked with __initdata so it can be discarded after boot. This
- * function will perform a shallow copy for the mapping entries.
- * @num_maps: the number of maps in the mapping table
+ * struct devm_pinctrl_get() - Resource managed pinctrl_get()
+ * @dev: the device to obtain the handle for
+ *
+ * If there is a need to explicitly destroy the returned struct pinctrl,
+ * devm_pinctrl_put() should be used, rather than plain pinctrl_put().
*/
-int pinctrl_register_mappings(struct pinctrl_map const *maps,
- unsigned num_maps)
+struct pinctrl *devm_pinctrl_get(struct device *dev)
+{
+ struct pinctrl **ptr, *p;
+
+ ptr = devres_alloc(devm_pinctrl_release, sizeof(*ptr), GFP_KERNEL);
+ if (!ptr)
+ return ERR_PTR(-ENOMEM);
+
+ p = pinctrl_get(dev);
+ if (!IS_ERR(p)) {
+ *ptr = p;
+ devres_add(dev, ptr);
+ } else {
+ devres_free(ptr);
+ }
+
+ return p;
+}
+EXPORT_SYMBOL_GPL(devm_pinctrl_get);
+
+static int devm_pinctrl_match(struct device *dev, void *res, void *data)
+{
+ struct pinctrl **p = res;
+
+ return *p == data;
+}
+
+/**
+ * devm_pinctrl_put() - Resource managed pinctrl_put()
+ * @p: the pinctrl handle to release
+ *
+ * Deallocate a struct pinctrl obtained via devm_pinctrl_get(). Normally
+ * this function will not need to be called and the resource management
+ * code will ensure that the resource is freed.
+ */
+void devm_pinctrl_put(struct pinctrl *p)
+{
+ WARN_ON(devres_destroy(p->dev, devm_pinctrl_release,
+ devm_pinctrl_match, p));
+ pinctrl_put(p);
+}
+EXPORT_SYMBOL_GPL(devm_pinctrl_put);
+
+int pinctrl_register_map(struct pinctrl_map const *maps, unsigned num_maps,
+ bool dup, bool locked)
{
int i, ret;
struct pinctrl_maps *maps_node;
@@ -829,13 +1020,13 @@
case PIN_MAP_TYPE_MUX_GROUP:
ret = pinmux_validate_map(&maps[i], i);
if (ret < 0)
- return 0;
+ return ret;
break;
case PIN_MAP_TYPE_CONFIGS_PIN:
case PIN_MAP_TYPE_CONFIGS_GROUP:
ret = pinconf_validate_map(&maps[i], i);
if (ret < 0)
- return 0;
+ return ret;
break;
default:
pr_err("failed to register map %s (%d): invalid type given\n",
@@ -851,20 +1042,76 @@
}
maps_node->num_maps = num_maps;
- maps_node->maps = kmemdup(maps, sizeof(*maps) * num_maps, GFP_KERNEL);
- if (!maps_node->maps) {
- pr_err("failed to duplicate mapping table\n");
- kfree(maps_node);
- return -ENOMEM;
+ if (dup) {
+ maps_node->maps = kmemdup(maps, sizeof(*maps) * num_maps,
+ GFP_KERNEL);
+ if (!maps_node->maps) {
+ pr_err("failed to duplicate mapping table\n");
+ kfree(maps_node);
+ return -ENOMEM;
+ }
+ } else {
+ maps_node->maps = maps;
}
- mutex_lock(&pinctrl_mutex);
+ if (!locked)
+ mutex_lock(&pinctrl_mutex);
list_add_tail(&maps_node->node, &pinctrl_maps);
- mutex_unlock(&pinctrl_mutex);
+ if (!locked)
+ mutex_unlock(&pinctrl_mutex);
return 0;
}
+/**
+ * pinctrl_register_mappings() - register a set of pin controller mappings
+ * @maps: the pincontrol mappings table to register. This should probably be
+ * marked with __initdata so it can be discarded after boot. This
+ * function will perform a shallow copy for the mapping entries.
+ * @num_maps: the number of maps in the mapping table
+ */
+int pinctrl_register_mappings(struct pinctrl_map const *maps,
+ unsigned num_maps)
+{
+ return pinctrl_register_map(maps, num_maps, true, false);
+}
+
+void pinctrl_unregister_map(struct pinctrl_map const *map)
+{
+ struct pinctrl_maps *maps_node;
+
+ list_for_each_entry(maps_node, &pinctrl_maps, node) {
+ if (maps_node->maps == map) {
+ list_del(&maps_node->node);
+ return;
+ }
+ }
+}
+
+/**
+ * pinctrl_force_sleep() - turn a given controller device into sleep state
+ * @pctldev: pin controller device
+ */
+int pinctrl_force_sleep(struct pinctrl_dev *pctldev)
+{
+ if (!IS_ERR(pctldev->p) && !IS_ERR(pctldev->hog_sleep))
+ return pinctrl_select_state(pctldev->p, pctldev->hog_sleep);
+ return 0;
+}
+EXPORT_SYMBOL_GPL(pinctrl_force_sleep);
+
+/**
+ * pinctrl_force_default() - turn a given controller device into default state
+ * @pctldev: pin controller device
+ */
+int pinctrl_force_default(struct pinctrl_dev *pctldev)
+{
+ if (!IS_ERR(pctldev->p) && !IS_ERR(pctldev->hog_default))
+ return pinctrl_select_state(pctldev->p, pctldev->hog_default);
+ return 0;
+}
+EXPORT_SYMBOL_GPL(pinctrl_force_default);
+
#ifdef CONFIG_DEBUG_FS
static int pinctrl_pins_show(struct seq_file *s, void *what)
@@ -906,15 +1153,17 @@
{
struct pinctrl_dev *pctldev = s->private;
const struct pinctrl_ops *ops = pctldev->desc->pctlops;
- unsigned selector = 0;
+ unsigned ngroups, selector = 0;
+ ngroups = ops->get_groups_count(pctldev);
mutex_lock(&pinctrl_mutex);
seq_puts(s, "registered pin groups:\n");
- while (ops->list_groups(pctldev, selector) >= 0) {
+ while (selector < ngroups) {
const unsigned *pins;
unsigned num_pins;
const char *gname = ops->get_group_name(pctldev, selector);
+ const char *pname;
int ret;
int i;
@@ -924,10 +1173,16 @@
seq_printf(s, "%s [ERROR GETTING PINS]\n",
gname);
else {
- seq_printf(s, "group: %s, pins = [ ", gname);
- for (i = 0; i < num_pins; i++)
- seq_printf(s, "%d ", pins[i]);
- seq_puts(s, "]\n");
+ seq_printf(s, "group: %s\n", gname);
+ for (i = 0; i < num_pins; i++) {
+ pname = pin_get_name(pctldev, pins[i]);
+ if (WARN_ON(!pname)) {
+ mutex_unlock(&pinctrl_mutex);
+ return -EINVAL;
+ }
+ seq_printf(s, "pin %d (%s)\n", pins[i], pname);
+ }
+ seq_puts(s, "\n");
}
selector++;
}
@@ -1226,11 +1481,14 @@
const struct pinctrl_ops *ops = pctldev->desc->pctlops;
if (!ops ||
- !ops->list_groups ||
+ !ops->get_groups_count ||
!ops->get_group_name ||
!ops->get_group_pins)
return -EINVAL;
+ if (ops->dt_node_to_map && !ops->dt_free_map)
+ return -EINVAL;
+
return 0;
}
@@ -1246,9 +1504,9 @@
struct pinctrl_dev *pctldev;
int ret;
- if (pctldesc == NULL)
+ if (!pctldesc)
return NULL;
- if (pctldesc->name == NULL)
+ if (!pctldesc->name)
return NULL;
pctldev = kzalloc(sizeof(*pctldev), GFP_KERNEL);
@@ -1266,39 +1524,28 @@
pctldev->dev = dev;
/* check core ops for sanity */
- ret = pinctrl_check_ops(pctldev);
- if (ret) {
- pr_err("%s pinctrl ops lacks necessary functions\n",
- pctldesc->name);
+ if (pinctrl_check_ops(pctldev)) {
+ dev_err(dev, "pinctrl ops lacks necessary functions\n");
goto out_err;
}
/* If we're implementing pinmuxing, check the ops for sanity */
if (pctldesc->pmxops) {
- ret = pinmux_check_ops(pctldev);
- if (ret) {
- pr_err("%s pinmux ops lacks necessary functions\n",
- pctldesc->name);
+ if (pinmux_check_ops(pctldev))
goto out_err;
- }
}
/* If we're implementing pinconfig, check the ops for sanity */
if (pctldesc->confops) {
- ret = pinconf_check_ops(pctldev);
- if (ret) {
- pr_err("%s pin config ops lacks necessary functions\n",
- pctldesc->name);
+ if (pinconf_check_ops(pctldev))
goto out_err;
- }
}
/* Register all the pins */
- pr_debug("try to register %d pins on %s...\n",
- pctldesc->npins, pctldesc->name);
+ dev_dbg(dev, "try to register %d pins ...\n", pctldesc->npins);
ret = pinctrl_register_pins(pctldev, pctldesc->pins, pctldesc->npins);
if (ret) {
- pr_err("error during pin registration\n");
+ dev_err(dev, "error during pin registration\n");
pinctrl_free_pindescs(pctldev, pctldesc->pins,
pctldesc->npins);
goto out_err;
@@ -1310,11 +1557,23 @@
pctldev->p = pinctrl_get_locked(pctldev->dev);
if (!IS_ERR(pctldev->p)) {
- struct pinctrl_state *s =
+ pctldev->hog_default =
pinctrl_lookup_state_locked(pctldev->p,
PINCTRL_STATE_DEFAULT);
- if (!IS_ERR(s))
- pinctrl_select_state_locked(pctldev->p, s);
+ if (IS_ERR(pctldev->hog_default)) {
+ dev_dbg(dev, "failed to lookup the default state\n");
+ } else {
+ if (pinctrl_select_state_locked(pctldev->p,
+ pctldev->hog_default))
+ dev_err(dev,
+ "failed to select default state\n");
+ }
+
+ pctldev->hog_sleep =
+ pinctrl_lookup_state_locked(pctldev->p,
+ PINCTRL_STATE_SLEEP);
+ if (IS_ERR(pctldev->hog_sleep))
+ dev_dbg(dev, "failed to lookup the sleep state\n");
}
mutex_unlock(&pinctrl_mutex);
@@ -1337,6 +1596,7 @@
*/
void pinctrl_unregister(struct pinctrl_dev *pctldev)
{
+ struct pinctrl_gpio_range *range, *n;
if (pctldev == NULL)
return;
@@ -1352,6 +1612,10 @@
/* Destroy descriptor tree */
pinctrl_free_pindescs(pctldev, pctldev->desc->pins,
pctldev->desc->npins);
+ /* remove gpio ranges map */
+ list_for_each_entry_safe(range, n, &pctldev->gpio_ranges, node)
+ list_del(&range->node);
+
kfree(pctldev);
mutex_unlock(&pinctrl_mutex);
diff --git a/drivers/pinctrl/core.h b/drivers/pinctrl/core.h
index 17ecf65..ee72f1f 100644
--- a/drivers/pinctrl/core.h
+++ b/drivers/pinctrl/core.h
@@ -9,6 +9,7 @@
* License terms: GNU General Public License (GPL) version 2
*/
+#include <linux/kref.h>
#include <linux/mutex.h>
#include <linux/radix-tree.h>
#include <linux/pinctrl/pinconf.h>
@@ -30,6 +31,8 @@
* @driver_data: driver data for drivers registering to the pin controller
* subsystem
* @p: result of pinctrl_get() for this device
+ * @hog_default: default state for pins hogged by this device
+ * @hog_sleep: sleep state for pins hogged by this device
* @device_root: debugfs root for this device
*/
struct pinctrl_dev {
@@ -41,6 +44,8 @@
struct module *owner;
void *driver_data;
struct pinctrl *p;
+ struct pinctrl_state *hog_default;
+ struct pinctrl_state *hog_sleep;
#ifdef CONFIG_DEBUG_FS
struct dentry *device_root;
#endif
@@ -52,12 +57,17 @@
* @dev: the device using this pin control handle
* @states: a list of states for this device
* @state: the current state
+ * @dt_maps: the mapping table chunks dynamically parsed from device tree for
+ * this device, if any
+ * @users: reference count
*/
struct pinctrl {
struct list_head node;
struct device *dev;
struct list_head states;
struct pinctrl_state *state;
+ struct list_head dt_maps;
+ struct kref users;
};
/**
@@ -100,13 +110,16 @@
* struct pinctrl_setting - an individual mux or config setting
* @node: list node for struct pinctrl_settings's @settings field
* @type: the type of setting
- * @pctldev: pin control device handling to be programmed
+ * @pctldev: pin control device handling to be programmed. Not used for
+ * PIN_MAP_TYPE_DUMMY_STATE.
+ * @dev_name: the name of the device using this state
* @data: Data specific to the setting type
*/
struct pinctrl_setting {
struct list_head node;
enum pinctrl_map_type type;
struct pinctrl_dev *pctldev;
+ const char *dev_name;
union {
struct pinctrl_setting_mux mux;
struct pinctrl_setting_configs configs;
@@ -142,8 +155,21 @@
#endif
};
+/**
+ * struct pinctrl_maps - a list item containing part of the mapping table
+ * @node: mapping table list node
+ * @maps: array of mapping table entries
+ * @num_maps: the number of entries in @maps
+ */
+struct pinctrl_maps {
+ struct list_head node;
+ struct pinctrl_map const *maps;
+ unsigned num_maps;
+};
+
struct pinctrl_dev *get_pinctrl_dev_from_devname(const char *dev_name);
int pin_get_from_name(struct pinctrl_dev *pctldev, const char *name);
+const char *pin_get_name(struct pinctrl_dev *pctldev, const unsigned pin);
int pinctrl_get_group_selector(struct pinctrl_dev *pctldev,
const char *pin_group);
@@ -153,4 +179,19 @@
return radix_tree_lookup(&pctldev->pin_desc_tree, pin);
}
+int pinctrl_register_map(struct pinctrl_map const *maps, unsigned num_maps,
+ bool dup, bool locked);
+void pinctrl_unregister_map(struct pinctrl_map const *map);
+
+extern int pinctrl_force_sleep(struct pinctrl_dev *pctldev);
+extern int pinctrl_force_default(struct pinctrl_dev *pctldev);
+
extern struct mutex pinctrl_mutex;
+extern struct list_head pinctrldev_list;
+extern struct list_head pinctrl_maps;
+
+#define for_each_maps(_maps_node_, _i_, _map_) \
+ list_for_each_entry(_maps_node_, &pinctrl_maps, node) \
+ for (_i_ = 0, _map_ = &_maps_node_->maps[_i_]; \
+ _i_ < _maps_node_->num_maps; \
+ _i_++, _map_ = &_maps_node_->maps[_i_])
diff --git a/drivers/pinctrl/devicetree.c b/drivers/pinctrl/devicetree.c
new file mode 100644
index 0000000..fd40a11
--- /dev/null
+++ b/drivers/pinctrl/devicetree.c
@@ -0,0 +1,265 @@
+/*
+ * Device tree integration for the pin control subsystem
+ *
+ * Copyright (C) 2012 NVIDIA CORPORATION. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms and conditions of the GNU General Public License,
+ * version 2, as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ */
+
+#include <linux/device.h>
+#include <linux/of.h>
+#include <linux/pinctrl/pinctrl.h>
+#include <linux/slab.h>
+
+#include "core.h"
+#include "devicetree.h"
+
+/**
+ * struct pinctrl_dt_map - mapping table chunk parsed from device tree
+ * @node: list node for struct pinctrl's @dt_maps field
+ * @pctldev: the pin controller that allocated this struct, and will free it
+ * @maps: the mapping table entries
+ */
+struct pinctrl_dt_map {
+ struct list_head node;
+ struct pinctrl_dev *pctldev;
+ struct pinctrl_map *map;
+ unsigned num_maps;
+};
+
+static void dt_free_map(struct pinctrl_dev *pctldev,
+ struct pinctrl_map *map, unsigned num_maps)
+{
+ if (pctldev) {
+ struct pinctrl_ops *ops = pctldev->desc->pctlops;
+ ops->dt_free_map(pctldev, map, num_maps);
+ } else {
+ /* There is no pctldev for PIN_MAP_TYPE_DUMMY_STATE */
+ kfree(map);
+ }
+}
+
+void pinctrl_dt_free_maps(struct pinctrl *p)
+{
+ struct pinctrl_dt_map *dt_map, *n1;
+
+ list_for_each_entry_safe(dt_map, n1, &p->dt_maps, node) {
+ pinctrl_unregister_map(dt_map->map);
+ list_del(&dt_map->node);
+ dt_free_map(dt_map->pctldev, dt_map->map,
+ dt_map->num_maps);
+ kfree(dt_map);
+ }
+
+ of_node_put(p->dev->of_node);
+}
+
+static int dt_remember_or_free_map(struct pinctrl *p, const char *statename,
+ struct pinctrl_dev *pctldev,
+ struct pinctrl_map *map, unsigned num_maps)
+{
+ int i;
+ struct pinctrl_dt_map *dt_map;
+
+ /* Initialize common mapping table entry fields */
+ for (i = 0; i < num_maps; i++) {
+ map[i].dev_name = dev_name(p->dev);
+ map[i].name = statename;
+ if (pctldev)
+ map[i].ctrl_dev_name = dev_name(pctldev->dev);
+ }
+
+ /* Remember the converted mapping table entries */
+ dt_map = kzalloc(sizeof(*dt_map), GFP_KERNEL);
+ if (!dt_map) {
+ dev_err(p->dev, "failed to alloc struct pinctrl_dt_map\n");
+ dt_free_map(pctldev, map, num_maps);
+ return -ENOMEM;
+ }
+
+ dt_map->pctldev = pctldev;
+ dt_map->map = map;
+ dt_map->num_maps = num_maps;
+ list_add_tail(&dt_map->node, &p->dt_maps);
+
+ return pinctrl_register_map(map, num_maps, false, true);
+}
+
+static struct pinctrl_dev *find_pinctrl_by_of_node(struct device_node *np)
+{
+ struct pinctrl_dev *pctldev;
+
+ list_for_each_entry(pctldev, &pinctrldev_list, node)
+ if (pctldev->dev->of_node == np)
+ return pctldev;
+
+ return NULL;
+}
+
+struct pinctrl_dev *of_pinctrl_get(struct device_node *np)
+{
+ struct pinctrl_dev *pctldev;
+
+ pctldev = find_pinctrl_by_of_node(np);
+ if (!pctldev)
+ return NULL;
+
+ return pctldev;
+}
+
+static int dt_to_map_one_config(struct pinctrl *p, const char *statename,
+ struct device_node *np_config)
+{
+ struct device_node *np_pctldev;
+ struct pinctrl_dev *pctldev;
+ struct pinctrl_ops *ops;
+ int ret;
+ struct pinctrl_map *map;
+ unsigned num_maps;
+
+ /* Find the pin controller containing np_config */
+ np_pctldev = of_node_get(np_config);
+ for (;;) {
+ np_pctldev = of_get_next_parent(np_pctldev);
+ if (!np_pctldev || of_node_is_root(np_pctldev)) {
+ dev_info(p->dev, "could not find pctldev for node %s, deferring probe\n",
+ np_config->full_name);
+ of_node_put(np_pctldev);
+ /* OK let's just assume this will appear later then */
+ return -EPROBE_DEFER;
+ }
+ pctldev = find_pinctrl_by_of_node(np_pctldev);
+ if (pctldev)
+ break;
+ /* Do not defer probing of hogs (circular loop) */
+ if (np_pctldev == p->dev->of_node) {
+ of_node_put(np_pctldev);
+ return -ENODEV;
+ }
+ }
+ of_node_put(np_pctldev);
+
+ /*
+ * Call pinctrl driver to parse device tree node, and
+ * generate mapping table entries
+ */
+ ops = pctldev->desc->pctlops;
+ if (!ops->dt_node_to_map) {
+ dev_err(p->dev, "pctldev %s doesn't support DT\n",
+ dev_name(pctldev->dev));
+ return -ENODEV;
+ }
+ ret = ops->dt_node_to_map(pctldev, np_config, &map, &num_maps);
+ if (ret < 0)
+ return ret;
+
+ /* Stash the mapping table chunk away for later use */
+ return dt_remember_or_free_map(p, statename, pctldev, map, num_maps);
+}
+
+static int dt_remember_dummy_state(struct pinctrl *p, const char *statename)
+{
+ struct pinctrl_map *map;
+
+ map = kzalloc(sizeof(*map), GFP_KERNEL);
+ if (!map) {
+ dev_err(p->dev, "failed to alloc struct pinctrl_map\n");
+ return -ENOMEM;
+ }
+
+ /* There is no pctldev for PIN_MAP_TYPE_DUMMY_STATE */
+ map->type = PIN_MAP_TYPE_DUMMY_STATE;
+
+ return dt_remember_or_free_map(p, statename, NULL, map, 1);
+}
+
+int pinctrl_dt_to_map(struct pinctrl *p)
+{
+ struct device_node *np = p->dev->of_node;
+ int state, ret;
+ char *propname;
+ struct property *prop;
+ const char *statename;
+ const __be32 *list;
+ int size, config;
+ phandle phandle;
+ struct device_node *np_config;
+
+ /* CONFIG_OF enabled, p->dev not instantiated from DT */
+ if (!np) {
+ dev_dbg(p->dev, "no of_node; not parsing pinctrl DT\n");
+ return 0;
+ }
+
+ /* We may store pointers to property names within the node */
+ of_node_get(np);
+
+ /* For each defined state ID */
+ for (state = 0; ; state++) {
+ /* Retrieve the pinctrl-* property */
+ propname = kasprintf(GFP_KERNEL, "pinctrl-%d", state);
+ prop = of_find_property(np, propname, &size);
+ kfree(propname);
+ if (!prop)
+ break;
+ list = prop->value;
+ size /= sizeof(*list);
+
+ /* Determine whether pinctrl-names property names the state */
+ ret = of_property_read_string_index(np, "pinctrl-names",
+ state, &statename);
+ /*
+ * If not, statename is just the integer state ID. But rather
+ * than dynamically allocate it and have to free it later,
+ * just point part way into the property name for the string.
+ */
+ if (ret < 0) {
+ /* strlen("pinctrl-") == 8 */
+ statename = prop->name + 8;
+ }
+
+ /* For every referenced pin configuration node in it */
+ for (config = 0; config < size; config++) {
+ phandle = be32_to_cpup(list++);
+
+ /* Look up the pin configuration node */
+ np_config = of_find_node_by_phandle(phandle);
+ if (!np_config) {
+ dev_err(p->dev,
+ "prop %s index %i invalid phandle\n",
+ prop->name, config);
+ ret = -EINVAL;
+ goto err;
+ }
+
+ /* Parse the node */
+ ret = dt_to_map_one_config(p, statename, np_config);
+ of_node_put(np_config);
+ if (ret < 0)
+ goto err;
+ }
+
+ /* No entries in DT? Generate a dummy state table entry */
+ if (!size) {
+ ret = dt_remember_dummy_state(p, statename);
+ if (ret < 0)
+ goto err;
+ }
+ }
+
+ return 0;
+
+err:
+ pinctrl_dt_free_maps(p);
+ return ret;
+}
diff --git a/drivers/pinctrl/devicetree.h b/drivers/pinctrl/devicetree.h
new file mode 100644
index 0000000..760bc49
--- /dev/null
+++ b/drivers/pinctrl/devicetree.h
@@ -0,0 +1,35 @@
+/*
+ * Internal interface to pinctrl device tree integration
+ *
+ * Copyright (C) 2012 NVIDIA CORPORATION. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms and conditions of the GNU General Public License,
+ * version 2, as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ */
+
+#ifdef CONFIG_OF
+
+void pinctrl_dt_free_maps(struct pinctrl *p);
+int pinctrl_dt_to_map(struct pinctrl *p);
+
+#else
+
+static inline int pinctrl_dt_to_map(struct pinctrl *p)
+{
+ return 0;
+}
+
+static inline void pinctrl_dt_free_maps(struct pinctrl *p)
+{
+}
+
+#endif
diff --git a/drivers/pinctrl/pinconf-generic.c b/drivers/pinctrl/pinconf-generic.c
index 33fbaea..06c304a 100644
--- a/drivers/pinctrl/pinconf-generic.c
+++ b/drivers/pinctrl/pinconf-generic.c
@@ -41,10 +41,13 @@
PCONFDUMP(PIN_CONFIG_DRIVE_PUSH_PULL, "output drive push pull", NULL),
PCONFDUMP(PIN_CONFIG_DRIVE_OPEN_DRAIN, "output drive open drain", NULL),
PCONFDUMP(PIN_CONFIG_DRIVE_OPEN_SOURCE, "output drive open source", NULL),
+ PCONFDUMP(PIN_CONFIG_INPUT_SCHMITT_ENABLE, "input schmitt enabled", NULL),
PCONFDUMP(PIN_CONFIG_INPUT_SCHMITT, "input schmitt trigger", NULL),
PCONFDUMP(PIN_CONFIG_INPUT_DEBOUNCE, "input debounce", "time units"),
PCONFDUMP(PIN_CONFIG_POWER_SOURCE, "pin power source", "selector"),
+ PCONFDUMP(PIN_CONFIG_SLEW_RATE, "slew rate", NULL),
PCONFDUMP(PIN_CONFIG_LOW_POWER_MODE, "pin low power", "mode"),
+ PCONFDUMP(PIN_CONFIG_OUTPUT, "pin output", "level"),
};
void pinconf_generic_dump_pin(struct pinctrl_dev *pctldev,
diff --git a/drivers/pinctrl/pinconf.c b/drivers/pinctrl/pinconf.c
index 7321e86..d611ecf 100644
--- a/drivers/pinctrl/pinconf.c
+++ b/drivers/pinctrl/pinconf.c
@@ -28,11 +28,17 @@
const struct pinconf_ops *ops = pctldev->desc->confops;
/* We must be able to read out pin status */
- if (!ops->pin_config_get && !ops->pin_config_group_get)
+ if (!ops->pin_config_get && !ops->pin_config_group_get) {
+ dev_err(pctldev->dev,
+ "pinconf must be able to read out pin status\n");
return -EINVAL;
+ }
/* We have to be able to config the pins in SOME way */
- if (!ops->pin_config_set && !ops->pin_config_group_set)
+ if (!ops->pin_config_set && !ops->pin_config_group_set) {
+ dev_err(pctldev->dev,
+ "pinconf has to be able to set a pins config\n");
return -EINVAL;
+ }
return 0;
}
@@ -44,9 +50,9 @@
return -EINVAL;
}
- if (map->data.configs.num_configs &&
+ if (!map->data.configs.num_configs ||
!map->data.configs.configs) {
- pr_err("failed to register map %s (%d): no configs ptr given\n",
+ pr_err("failed to register map %s (%d): no configs given\n",
map->name, i);
return -EINVAL;
}
@@ -379,8 +385,16 @@
void pinconf_show_map(struct seq_file *s, struct pinctrl_map const *map)
{
+ struct pinctrl_dev *pctldev;
+ const struct pinconf_ops *confops;
int i;
+ pctldev = get_pinctrl_dev_from_devname(map->ctrl_dev_name);
+ if (pctldev)
+ confops = pctldev->desc->confops;
+ else
+ confops = NULL;
+
switch (map->type) {
case PIN_MAP_TYPE_CONFIGS_PIN:
seq_printf(s, "pin ");
@@ -394,8 +408,15 @@
seq_printf(s, "%s\n", map->data.configs.group_or_pin);
- for (i = 0; i < map->data.configs.num_configs; i++)
- seq_printf(s, "config %08lx\n", map->data.configs.configs[i]);
+ for (i = 0; i < map->data.configs.num_configs; i++) {
+ seq_printf(s, "config ");
+ if (confops && confops->pin_config_config_dbg_show)
+ confops->pin_config_config_dbg_show(pctldev, s,
+ map->data.configs.configs[i]);
+ else
+ seq_printf(s, "%08lx", map->data.configs.configs[i]);
+ seq_printf(s, "\n");
+ }
}
void pinconf_show_setting(struct seq_file *s,
@@ -403,6 +424,7 @@
{
struct pinctrl_dev *pctldev = setting->pctldev;
const struct pinctrl_ops *pctlops = pctldev->desc->pctlops;
+ const struct pinconf_ops *confops = pctldev->desc->confops;
struct pin_desc *desc;
int i;
@@ -428,8 +450,15 @@
* FIXME: We should really get the pin controler to dump the config
* values, so they can be decoded to something meaningful.
*/
- for (i = 0; i < setting->data.configs.num_configs; i++)
- seq_printf(s, " %08lx", setting->data.configs.configs[i]);
+ for (i = 0; i < setting->data.configs.num_configs; i++) {
+ seq_printf(s, " ");
+ if (confops && confops->pin_config_config_dbg_show)
+ confops->pin_config_config_dbg_show(pctldev, s,
+ setting->data.configs.configs[i]);
+ else
+ seq_printf(s, "%08lx",
+ setting->data.configs.configs[i]);
+ }
seq_printf(s, "\n");
}
@@ -448,10 +477,14 @@
static int pinconf_pins_show(struct seq_file *s, void *what)
{
struct pinctrl_dev *pctldev = s->private;
+ const struct pinconf_ops *ops = pctldev->desc->confops;
unsigned i, pin;
+ if (!ops || !ops->pin_config_get)
+ return 0;
+
seq_puts(s, "Pin config settings per pin\n");
- seq_puts(s, "Format: pin (name): pinmux setting array\n");
+ seq_puts(s, "Format: pin (name): configs\n");
mutex_lock(&pinctrl_mutex);
@@ -495,17 +528,16 @@
struct pinctrl_dev *pctldev = s->private;
const struct pinctrl_ops *pctlops = pctldev->desc->pctlops;
const struct pinconf_ops *ops = pctldev->desc->confops;
+ unsigned ngroups = pctlops->get_groups_count(pctldev);
unsigned selector = 0;
if (!ops || !ops->pin_config_group_get)
return 0;
seq_puts(s, "Pin config settings per pin group\n");
- seq_puts(s, "Format: group (name): pinmux setting array\n");
+ seq_puts(s, "Format: group (name): configs\n");
- mutex_lock(&pinctrl_mutex);
-
- while (pctlops->list_groups(pctldev, selector) >= 0) {
+ while (selector < ngroups) {
const char *gname = pctlops->get_group_name(pctldev, selector);
seq_printf(s, "%u (%s):", selector, gname);
@@ -515,8 +547,6 @@
selector++;
}
- mutex_unlock(&pinctrl_mutex);
-
return 0;
}
@@ -544,6 +574,207 @@
.release = single_release,
};
+/* 32bit read/write ressources */
+#define MAX_NAME_LEN 16
+char dbg_pinname[MAX_NAME_LEN]; /* shared: name of the state of the pin*/
+char dbg_state_name[MAX_NAME_LEN]; /* shared: state of the pin*/
+static u32 dbg_config; /* shared: config to be read/set for the pin & state*/
+
+static int pinconf_dbg_pinname_print(struct seq_file *s, void *d)
+{
+ if (strlen(dbg_pinname))
+ seq_printf(s, "%s\n", dbg_pinname);
+ else
+ seq_printf(s, "No pin name set\n");
+ return 0;
+}
+
+static int pinconf_dbg_pinname_open(struct inode *inode, struct file *file)
+{
+ return single_open(file, pinconf_dbg_pinname_print, inode->i_private);
+}
+
+static int pinconf_dbg_pinname_write(struct file *file,
+ const char __user *user_buf, size_t count, loff_t *ppos)
+{
+ int err;
+
+ if (count > MAX_NAME_LEN)
+ return -EINVAL;
+
+ err = sscanf(user_buf, "%15s", dbg_pinname);
+
+ if (err != 1)
+ return -EINVAL;
+
+ return count;
+}
+
+static const struct file_operations pinconf_dbg_pinname_fops = {
+ .open = pinconf_dbg_pinname_open,
+ .write = pinconf_dbg_pinname_write,
+ .read = seq_read,
+ .llseek = seq_lseek,
+ .release = single_release,
+ .owner = THIS_MODULE,
+};
+
+static int pinconf_dbg_state_print(struct seq_file *s, void *d)
+{
+ if (strlen(dbg_state_name))
+ seq_printf(s, "%s\n", dbg_state_name);
+ else
+ seq_printf(s, "No pin state set\n");
+ return 0;
+}
+
+static int pinconf_dbg_state_open(struct inode *inode, struct file *file)
+{
+ return single_open(file, pinconf_dbg_state_print, inode->i_private);
+}
+
+static int pinconf_dbg_state_write(struct file *file,
+ const char __user *user_buf, size_t count, loff_t *ppos)
+{
+ int err;
+
+ if (count > MAX_NAME_LEN)
+ return -EINVAL;
+
+ err = sscanf(user_buf, "%15s", dbg_state_name);
+
+ if (err != 1)
+ return -EINVAL;
+
+ return count;
+}
+
+static const struct file_operations pinconf_dbg_pinstate_fops = {
+ .open = pinconf_dbg_state_open,
+ .write = pinconf_dbg_state_write,
+ .read = seq_read,
+ .llseek = seq_lseek,
+ .release = single_release,
+ .owner = THIS_MODULE,
+};
+
+/**
+ * pinconf_dbg_config_print() - display the pinctrl config from the pinctrl
+ * map, of a pin/state pair based on pinname and state that have been
+ * selected with the debugfs entries pinconf-name and pinconf-state
+ * @s: contains the 32bits config to be written
+ * @d: not used
+ */
+static int pinconf_dbg_config_print(struct seq_file *s, void *d)
+{
+ struct pinctrl_maps *maps_node;
+ struct pinctrl_map const *map;
+ struct pinctrl_dev *pctldev = NULL;
+ struct pinconf_ops *confops = NULL;
+ int i, j;
+ bool found = false;
+
+ mutex_lock(&pinctrl_mutex);
+
+ /* Parse the pinctrl map and look for the elected pin/state */
+ for_each_maps(maps_node, i, map) {
+ if (map->type != PIN_MAP_TYPE_CONFIGS_PIN)
+ continue;
+
+ if (strncmp(map->name, dbg_state_name, MAX_NAME_LEN) > 0)
+ continue;
+
+ for (j = 0; j < map->data.configs.num_configs; j++) {
+ if (0 == strncmp(map->data.configs.group_or_pin,
+ dbg_pinname, MAX_NAME_LEN)) {
+ /* We found the right pin / state, read the
+ * config and store the pctldev */
+ dbg_config = map->data.configs.configs[j];
+ pctldev = get_pinctrl_dev_from_devname
+ (map->ctrl_dev_name);
+ found = true;
+ break;
+ }
+ }
+ }
+
+ mutex_unlock(&pinctrl_mutex);
+
+ if (found) {
+ seq_printf(s, "Config of %s in state %s: 0x%08X\n", dbg_pinname,
+ dbg_state_name, dbg_config);
+
+ if (pctldev)
+ confops = pctldev->desc->confops;
+
+ if (confops && confops->pin_config_config_dbg_show)
+ confops->pin_config_config_dbg_show(pctldev,
+ s, dbg_config);
+ } else {
+ seq_printf(s, "No pin found for defined name/state\n");
+ }
+
+ return 0;
+}
+
+static int pinconf_dbg_config_open(struct inode *inode, struct file *file)
+{
+ return single_open(file, pinconf_dbg_config_print, inode->i_private);
+}
+
+/**
+ * pinconf_dbg_config_write() - overwrite the pinctrl config in thepinctrl
+ * map, of a pin/state pair based on pinname and state that have been
+ * selected with the debugfs entries pinconf-name and pinconf-state
+ */
+static int pinconf_dbg_config_write(struct file *file,
+ const char __user *user_buf, size_t count, loff_t *ppos)
+{
+ int err;
+ unsigned long config;
+ struct pinctrl_maps *maps_node;
+ struct pinctrl_map const *map;
+ int i, j;
+
+ err = kstrtoul_from_user(user_buf, count, 0, &config);
+
+ if (err)
+ return err;
+
+ dbg_config = config;
+
+ mutex_lock(&pinctrl_mutex);
+
+ /* Parse the pinctrl map and look for the selected pin/state */
+ for_each_maps(maps_node, i, map) {
+ if (map->type != PIN_MAP_TYPE_CONFIGS_PIN)
+ continue;
+
+ if (strncmp(map->name, dbg_state_name, MAX_NAME_LEN) > 0)
+ continue;
+
+ /* we found the right pin / state, so overwrite config */
+ for (j = 0; j < map->data.configs.num_configs; j++) {
+ if (strncmp(map->data.configs.group_or_pin, dbg_pinname,
+ MAX_NAME_LEN) == 0)
+ map->data.configs.configs[j] = dbg_config;
+ }
+ }
+
+ mutex_unlock(&pinctrl_mutex);
+
+ return count;
+}
+
+static const struct file_operations pinconf_dbg_pinconfig_fops = {
+ .open = pinconf_dbg_config_open,
+ .write = pinconf_dbg_config_write,
+ .read = seq_read,
+ .llseek = seq_lseek,
+ .release = single_release,
+ .owner = THIS_MODULE,
+};
+
void pinconf_init_device_debugfs(struct dentry *devroot,
struct pinctrl_dev *pctldev)
{
@@ -551,6 +782,12 @@
devroot, pctldev, &pinconf_pins_ops);
debugfs_create_file("pinconf-groups", S_IFREG | S_IRUGO,
devroot, pctldev, &pinconf_groups_ops);
+ debugfs_create_file("pinconf-name", (S_IRUGO | S_IWUSR | S_IWGRP),
+ devroot, pctldev, &pinconf_dbg_pinname_fops);
+ debugfs_create_file("pinconf-state", (S_IRUGO | S_IWUSR | S_IWGRP),
+ devroot, pctldev, &pinconf_dbg_pinstate_fops);
+ debugfs_create_file("pinconf-config", (S_IRUGO | S_IWUSR | S_IWGRP),
+ devroot, pctldev, &pinconf_dbg_pinconfig_fops);
}
#endif
diff --git a/drivers/pinctrl/pinconf.h b/drivers/pinctrl/pinconf.h
index 54510de..bfda73d 100644
--- a/drivers/pinctrl/pinconf.h
+++ b/drivers/pinctrl/pinconf.h
@@ -19,11 +19,6 @@
struct pinctrl_setting *setting);
void pinconf_free_setting(struct pinctrl_setting const *setting);
int pinconf_apply_setting(struct pinctrl_setting const *setting);
-void pinconf_show_map(struct seq_file *s, struct pinctrl_map const *map);
-void pinconf_show_setting(struct seq_file *s,
- struct pinctrl_setting const *setting);
-void pinconf_init_device_debugfs(struct dentry *devroot,
- struct pinctrl_dev *pctldev);
/*
* You will only be interested in these if you're using PINCONF
@@ -61,6 +56,18 @@
return 0;
}
+#endif
+
+#if defined(CONFIG_PINCONF) && defined(CONFIG_DEBUG_FS)
+
+void pinconf_show_map(struct seq_file *s, struct pinctrl_map const *map);
+void pinconf_show_setting(struct seq_file *s,
+ struct pinctrl_setting const *setting);
+void pinconf_init_device_debugfs(struct dentry *devroot,
+ struct pinctrl_dev *pctldev);
+
+#else
+
static inline void pinconf_show_map(struct seq_file *s,
struct pinctrl_map const *map)
{
@@ -83,7 +90,7 @@
* pin config.
*/
-#ifdef CONFIG_GENERIC_PINCONF
+#if defined(CONFIG_GENERIC_PINCONF) && defined(CONFIG_DEBUG_FS)
void pinconf_generic_dump_pin(struct pinctrl_dev *pctldev,
struct seq_file *s, unsigned pin);
diff --git a/drivers/pinctrl/pinctrl-pxa3xx.c b/drivers/pinctrl/pinctrl-pxa3xx.c
index 079dce0..7644e42 100644
--- a/drivers/pinctrl/pinctrl-pxa3xx.c
+++ b/drivers/pinctrl/pinctrl-pxa3xx.c
@@ -25,20 +25,18 @@
.pin_base = 0,
};
-static int pxa3xx_list_groups(struct pinctrl_dev *pctrldev, unsigned selector)
+static int pxa3xx_get_groups_count(struct pinctrl_dev *pctrldev)
{
struct pxa3xx_pinmux_info *info = pinctrl_dev_get_drvdata(pctrldev);
- if (selector >= info->num_grps)
- return -EINVAL;
- return 0;
+
+ return info->num_grps;
}
static const char *pxa3xx_get_group_name(struct pinctrl_dev *pctrldev,
unsigned selector)
{
struct pxa3xx_pinmux_info *info = pinctrl_dev_get_drvdata(pctrldev);
- if (selector >= info->num_grps)
- return NULL;
+
return info->grps[selector].name;
}
@@ -48,25 +46,23 @@
unsigned *num_pins)
{
struct pxa3xx_pinmux_info *info = pinctrl_dev_get_drvdata(pctrldev);
- if (selector >= info->num_grps)
- return -EINVAL;
+
*pins = info->grps[selector].pins;
*num_pins = info->grps[selector].npins;
return 0;
}
static struct pinctrl_ops pxa3xx_pctrl_ops = {
- .list_groups = pxa3xx_list_groups,
+ .get_groups_count = pxa3xx_get_groups_count,
.get_group_name = pxa3xx_get_group_name,
.get_group_pins = pxa3xx_get_group_pins,
};
-static int pxa3xx_pmx_list_func(struct pinctrl_dev *pctrldev, unsigned func)
+static int pxa3xx_pmx_get_funcs_count(struct pinctrl_dev *pctrldev)
{
struct pxa3xx_pinmux_info *info = pinctrl_dev_get_drvdata(pctrldev);
- if (func >= info->num_funcs)
- return -EINVAL;
- return 0;
+
+ return info->num_funcs;
}
static const char *pxa3xx_pmx_get_func_name(struct pinctrl_dev *pctrldev,
@@ -170,7 +166,7 @@
}
static struct pinmux_ops pxa3xx_pmx_ops = {
- .list_functions = pxa3xx_pmx_list_func,
+ .get_functions_count = pxa3xx_pmx_get_funcs_count,
.get_function_name = pxa3xx_pmx_get_func_name,
.get_function_groups = pxa3xx_pmx_get_groups,
.enable = pxa3xx_pmx_enable,
diff --git a/drivers/pinctrl/pinctrl-sirf.c b/drivers/pinctrl/pinctrl-sirf.c
index 6b3534c..ba15b1a 100644
--- a/drivers/pinctrl/pinctrl-sirf.c
+++ b/drivers/pinctrl/pinctrl-sirf.c
@@ -853,18 +853,14 @@
SIRFSOC_PIN_GROUP("gpsgrp", gps_pins),
};
-static int sirfsoc_list_groups(struct pinctrl_dev *pctldev, unsigned selector)
+static int sirfsoc_get_groups_count(struct pinctrl_dev *pctldev)
{
- if (selector >= ARRAY_SIZE(sirfsoc_pin_groups))
- return -EINVAL;
- return 0;
+ return ARRAY_SIZE(sirfsoc_pin_groups);
}
static const char *sirfsoc_get_group_name(struct pinctrl_dev *pctldev,
unsigned selector)
{
- if (selector >= ARRAY_SIZE(sirfsoc_pin_groups))
- return NULL;
return sirfsoc_pin_groups[selector].name;
}
@@ -872,8 +868,6 @@
const unsigned **pins,
unsigned *num_pins)
{
- if (selector >= ARRAY_SIZE(sirfsoc_pin_groups))
- return -EINVAL;
*pins = sirfsoc_pin_groups[selector].pins;
*num_pins = sirfsoc_pin_groups[selector].num_pins;
return 0;
@@ -886,7 +880,7 @@
}
static struct pinctrl_ops sirfsoc_pctrl_ops = {
- .list_groups = sirfsoc_list_groups,
+ .get_groups_count = sirfsoc_get_groups_count,
.get_group_name = sirfsoc_get_group_name,
.get_group_pins = sirfsoc_get_group_pins,
.pin_dbg_show = sirfsoc_pin_dbg_show,
@@ -1033,11 +1027,9 @@
sirfsoc_pinmux_endisable(spmx, selector, false);
}
-static int sirfsoc_pinmux_list_funcs(struct pinctrl_dev *pmxdev, unsigned selector)
+static int sirfsoc_pinmux_get_funcs_count(struct pinctrl_dev *pmxdev)
{
- if (selector >= ARRAY_SIZE(sirfsoc_pmx_functions))
- return -EINVAL;
- return 0;
+ return ARRAY_SIZE(sirfsoc_pmx_functions);
}
static const char *sirfsoc_pinmux_get_func_name(struct pinctrl_dev *pctldev,
@@ -1074,9 +1066,9 @@
}
static struct pinmux_ops sirfsoc_pinmux_ops = {
- .list_functions = sirfsoc_pinmux_list_funcs,
.enable = sirfsoc_pinmux_enable,
.disable = sirfsoc_pinmux_disable,
+ .get_functions_count = sirfsoc_pinmux_get_funcs_count,
.get_function_name = sirfsoc_pinmux_get_func_name,
.get_function_groups = sirfsoc_pinmux_get_groups,
.gpio_request_enable = sirfsoc_pinmux_request_gpio,
diff --git a/drivers/pinctrl/pinctrl-tegra.c b/drivers/pinctrl/pinctrl-tegra.c
index 9b32968..c4c47c5 100644
--- a/drivers/pinctrl/pinctrl-tegra.c
+++ b/drivers/pinctrl/pinctrl-tegra.c
@@ -53,15 +53,11 @@
writel(val, pmx->regs[bank] + reg);
}
-static int tegra_pinctrl_list_groups(struct pinctrl_dev *pctldev,
- unsigned group)
+static int tegra_pinctrl_get_groups_count(struct pinctrl_dev *pctldev)
{
struct tegra_pmx *pmx = pinctrl_dev_get_drvdata(pctldev);
- if (group >= pmx->soc->ngroups)
- return -EINVAL;
-
- return 0;
+ return pmx->soc->ngroups;
}
static const char *tegra_pinctrl_get_group_name(struct pinctrl_dev *pctldev,
@@ -69,9 +65,6 @@
{
struct tegra_pmx *pmx = pinctrl_dev_get_drvdata(pctldev);
- if (group >= pmx->soc->ngroups)
- return NULL;
-
return pmx->soc->groups[group].name;
}
@@ -82,9 +75,6 @@
{
struct tegra_pmx *pmx = pinctrl_dev_get_drvdata(pctldev);
- if (group >= pmx->soc->ngroups)
- return -EINVAL;
-
*pins = pmx->soc->groups[group].pins;
*num_pins = pmx->soc->groups[group].npins;
@@ -99,21 +89,17 @@
}
static struct pinctrl_ops tegra_pinctrl_ops = {
- .list_groups = tegra_pinctrl_list_groups,
+ .get_groups_count = tegra_pinctrl_get_groups_count,
.get_group_name = tegra_pinctrl_get_group_name,
.get_group_pins = tegra_pinctrl_get_group_pins,
.pin_dbg_show = tegra_pinctrl_pin_dbg_show,
};
-static int tegra_pinctrl_list_funcs(struct pinctrl_dev *pctldev,
- unsigned function)
+static int tegra_pinctrl_get_funcs_count(struct pinctrl_dev *pctldev)
{
struct tegra_pmx *pmx = pinctrl_dev_get_drvdata(pctldev);
- if (function >= pmx->soc->nfunctions)
- return -EINVAL;
-
- return 0;
+ return pmx->soc->nfunctions;
}
static const char *tegra_pinctrl_get_func_name(struct pinctrl_dev *pctldev,
@@ -121,9 +107,6 @@
{
struct tegra_pmx *pmx = pinctrl_dev_get_drvdata(pctldev);
- if (function >= pmx->soc->nfunctions)
- return NULL;
-
return pmx->soc->functions[function].name;
}
@@ -134,9 +117,6 @@
{
struct tegra_pmx *pmx = pinctrl_dev_get_drvdata(pctldev);
- if (function >= pmx->soc->nfunctions)
- return -EINVAL;
-
*groups = pmx->soc->functions[function].groups;
*num_groups = pmx->soc->functions[function].ngroups;
@@ -151,8 +131,6 @@
int i;
u32 val;
- if (group >= pmx->soc->ngroups)
- return -EINVAL;
g = &pmx->soc->groups[group];
if (g->mux_reg < 0)
@@ -180,8 +158,6 @@
const struct tegra_pingroup *g;
u32 val;
- if (group >= pmx->soc->ngroups)
- return;
g = &pmx->soc->groups[group];
if (g->mux_reg < 0)
@@ -194,7 +170,7 @@
}
static struct pinmux_ops tegra_pinmux_ops = {
- .list_functions = tegra_pinctrl_list_funcs,
+ .get_functions_count = tegra_pinctrl_get_funcs_count,
.get_function_name = tegra_pinctrl_get_func_name,
.get_function_groups = tegra_pinctrl_get_func_groups,
.enable = tegra_pinctrl_enable,
@@ -324,8 +300,6 @@
s16 reg;
u32 val, mask;
- if (group >= pmx->soc->ngroups)
- return -EINVAL;
g = &pmx->soc->groups[group];
ret = tegra_pinconf_reg(pmx, g, param, &bank, ®, &bit, &width);
@@ -353,8 +327,6 @@
s16 reg;
u32 val, mask;
- if (group >= pmx->soc->ngroups)
- return -EINVAL;
g = &pmx->soc->groups[group];
ret = tegra_pinconf_reg(pmx, g, param, &bank, ®, &bit, &width);
@@ -525,7 +497,6 @@
{
struct tegra_pmx *pmx = platform_get_drvdata(pdev);
- pinctrl_remove_gpio_range(pmx->pctl, &tegra_pinctrl_gpio_range);
pinctrl_unregister(pmx->pctl);
return 0;
diff --git a/drivers/pinctrl/pinctrl-u300.c b/drivers/pinctrl/pinctrl-u300.c
index 26eb8cc..10de43c 100644
--- a/drivers/pinctrl/pinctrl-u300.c
+++ b/drivers/pinctrl/pinctrl-u300.c
@@ -836,18 +836,14 @@
},
};
-static int u300_list_groups(struct pinctrl_dev *pctldev, unsigned selector)
+static int u300_get_groups_count(struct pinctrl_dev *pctldev)
{
- if (selector >= ARRAY_SIZE(u300_pin_groups))
- return -EINVAL;
- return 0;
+ return ARRAY_SIZE(u300_pin_groups);
}
static const char *u300_get_group_name(struct pinctrl_dev *pctldev,
unsigned selector)
{
- if (selector >= ARRAY_SIZE(u300_pin_groups))
- return NULL;
return u300_pin_groups[selector].name;
}
@@ -855,8 +851,6 @@
const unsigned **pins,
unsigned *num_pins)
{
- if (selector >= ARRAY_SIZE(u300_pin_groups))
- return -EINVAL;
*pins = u300_pin_groups[selector].pins;
*num_pins = u300_pin_groups[selector].num_pins;
return 0;
@@ -869,7 +863,7 @@
}
static struct pinctrl_ops u300_pctrl_ops = {
- .list_groups = u300_list_groups,
+ .get_groups_count = u300_get_groups_count,
.get_group_name = u300_get_group_name,
.get_group_pins = u300_get_group_pins,
.pin_dbg_show = u300_pin_dbg_show,
@@ -991,11 +985,9 @@
u300_pmx_endisable(upmx, selector, false);
}
-static int u300_pmx_list_funcs(struct pinctrl_dev *pctldev, unsigned selector)
+static int u300_pmx_get_funcs_count(struct pinctrl_dev *pctldev)
{
- if (selector >= ARRAY_SIZE(u300_pmx_functions))
- return -EINVAL;
- return 0;
+ return ARRAY_SIZE(u300_pmx_functions);
}
static const char *u300_pmx_get_func_name(struct pinctrl_dev *pctldev,
@@ -1014,7 +1006,7 @@
}
static struct pinmux_ops u300_pmx_ops = {
- .list_functions = u300_pmx_list_funcs,
+ .get_functions_count = u300_pmx_get_funcs_count,
.get_function_name = u300_pmx_get_func_name,
.get_function_groups = u300_pmx_get_groups,
.enable = u300_pmx_enable,
@@ -1185,8 +1177,6 @@
struct u300_pmx *upmx = platform_get_drvdata(pdev);
int i;
- for (i = 0; i < ARRAY_SIZE(u300_gpio_ranges); i++)
- pinctrl_remove_gpio_range(upmx->pctl, &u300_gpio_ranges[i]);
pinctrl_unregister(upmx->pctl);
iounmap(upmx->virtbase);
release_mem_region(upmx->phybase, upmx->physize);
diff --git a/drivers/pinctrl/pinmux.c b/drivers/pinctrl/pinmux.c
index 4e62783..bd83c8b 100644
--- a/drivers/pinctrl/pinmux.c
+++ b/drivers/pinctrl/pinmux.c
@@ -33,22 +33,25 @@
int pinmux_check_ops(struct pinctrl_dev *pctldev)
{
const struct pinmux_ops *ops = pctldev->desc->pmxops;
+ unsigned nfuncs;
unsigned selector = 0;
/* Check that we implement required operations */
- if (!ops->list_functions ||
+ if (!ops ||
+ !ops->get_functions_count ||
!ops->get_function_name ||
!ops->get_function_groups ||
- !ops->enable ||
- !ops->disable)
+ !ops->enable) {
+ dev_err(pctldev->dev, "pinmux ops lacks necessary functions\n");
return -EINVAL;
-
+ }
/* Check that all functions registered have names */
- while (ops->list_functions(pctldev, selector) >= 0) {
+ nfuncs = ops->get_functions_count(pctldev);
+ while (selector < nfuncs) {
const char *fname = ops->get_function_name(pctldev,
selector);
if (!fname) {
- pr_err("pinmux ops has no name for function%u\n",
+ dev_err(pctldev->dev, "pinmux ops has no name for function%u\n",
selector);
return -EINVAL;
}
@@ -85,20 +88,23 @@
const struct pinmux_ops *ops = pctldev->desc->pmxops;
int status = -EINVAL;
- dev_dbg(pctldev->dev, "request pin %d for %s\n", pin, owner);
-
desc = pin_desc_get(pctldev, pin);
if (desc == NULL) {
dev_err(pctldev->dev,
- "pin is not registered so it cannot be requested\n");
+ "pin %d is not registered so it cannot be requested\n",
+ pin);
goto out;
}
+ dev_dbg(pctldev->dev, "request pin %d (%s) for %s\n",
+ pin, desc->name, owner);
+
if (gpio_range) {
/* There's no need to support multiple GPIO requests */
if (desc->gpio_owner) {
dev_err(pctldev->dev,
- "pin already requested\n");
+ "pin %s already requested by %s; cannot claim for %s\n",
+ desc->name, desc->gpio_owner, owner);
goto out;
}
@@ -106,7 +112,8 @@
} else {
if (desc->mux_usecount && strcmp(desc->mux_owner, owner)) {
dev_err(pctldev->dev,
- "pin already requested\n");
+ "pin %s already requested by %s; cannot claim for %s\n",
+ desc->name, desc->mux_owner, owner);
goto out;
}
@@ -139,8 +146,7 @@
status = 0;
if (status) {
- dev_err(pctldev->dev, "->request on device %s failed for pin %d\n",
- pctldev->desc->name, pin);
+ dev_err(pctldev->dev, "request() failed for pin %d\n", pin);
module_put(pctldev->owner);
}
@@ -157,7 +163,7 @@
out:
if (status)
dev_err(pctldev->dev, "pin-%d (%s) status %d\n",
- pin, owner, status);
+ pin, owner, status);
return status;
}
@@ -188,6 +194,11 @@
}
if (!gpio_range) {
+ /*
+ * A pin should not be freed more times than allocated.
+ */
+ if (WARN_ON(!desc->mux_usecount))
+ return NULL;
desc->mux_usecount--;
if (desc->mux_usecount)
return NULL;
@@ -226,14 +237,11 @@
struct pinctrl_gpio_range *range,
unsigned pin, unsigned gpio)
{
- char gpiostr[16];
const char *owner;
int ret;
/* Conjure some name stating what chip and pin this is taken by */
- snprintf(gpiostr, 15, "%s:%d", range->name, gpio);
-
- owner = kstrdup(gpiostr, GFP_KERNEL);
+ owner = kasprintf(GFP_KERNEL, "%s:%d", range->name, gpio);
if (!owner)
return -EINVAL;
@@ -287,10 +295,11 @@
const char *function)
{
const struct pinmux_ops *ops = pctldev->desc->pmxops;
+ unsigned nfuncs = ops->get_functions_count(pctldev);
unsigned selector = 0;
/* See if this pctldev has this function */
- while (ops->list_functions(pctldev, selector) >= 0) {
+ while (selector < nfuncs) {
const char *fname = ops->get_function_name(pctldev,
selector);
@@ -310,27 +319,38 @@
{
struct pinctrl_dev *pctldev = setting->pctldev;
const struct pinmux_ops *pmxops = pctldev->desc->pmxops;
- const struct pinctrl_ops *pctlops = pctldev->desc->pctlops;
char const * const *groups;
unsigned num_groups;
int ret;
const char *group;
int i;
- const unsigned *pins;
- unsigned num_pins;
- setting->data.mux.func =
- pinmux_func_name_to_selector(pctldev, map->data.mux.function);
- if (setting->data.mux.func < 0)
- return setting->data.mux.func;
+ if (!pmxops) {
+ dev_err(pctldev->dev, "does not support mux function\n");
+ return -EINVAL;
+ }
+
+ ret = pinmux_func_name_to_selector(pctldev, map->data.mux.function);
+ if (ret < 0) {
+ dev_err(pctldev->dev, "invalid function %s in map table\n",
+ map->data.mux.function);
+ return ret;
+ }
+ setting->data.mux.func = ret;
ret = pmxops->get_function_groups(pctldev, setting->data.mux.func,
&groups, &num_groups);
- if (ret < 0)
+ if (ret < 0) {
+ dev_err(pctldev->dev, "can't query groups for function %s\n",
+ map->data.mux.function);
return ret;
- if (!num_groups)
+ }
+ if (!num_groups) {
+ dev_err(pctldev->dev,
+ "function %s can't be selected on any group\n",
+ map->data.mux.function);
return -EINVAL;
-
+ }
if (map->data.mux.group) {
bool found = false;
group = map->data.mux.group;
@@ -340,63 +360,30 @@
break;
}
}
- if (!found)
+ if (!found) {
+ dev_err(pctldev->dev,
+ "invalid group \"%s\" for function \"%s\"\n",
+ group, map->data.mux.function);
return -EINVAL;
+ }
} else {
group = groups[0];
}
- setting->data.mux.group = pinctrl_get_group_selector(pctldev, group);
- if (setting->data.mux.group < 0)
- return setting->data.mux.group;
-
- ret = pctlops->get_group_pins(pctldev, setting->data.mux.group, &pins,
- &num_pins);
- if (ret) {
- dev_err(pctldev->dev,
- "could not get pins for device %s group selector %d\n",
- pinctrl_dev_get_name(pctldev), setting->data.mux.group);
- return -ENODEV;
+ ret = pinctrl_get_group_selector(pctldev, group);
+ if (ret < 0) {
+ dev_err(pctldev->dev, "invalid group %s in map table\n",
+ map->data.mux.group);
+ return ret;
}
-
- /* Try to allocate all pins in this group, one by one */
- for (i = 0; i < num_pins; i++) {
- ret = pin_request(pctldev, pins[i], map->dev_name, NULL);
- if (ret) {
- dev_err(pctldev->dev,
- "could not get request pin %d on device %s\n",
- pins[i], pinctrl_dev_get_name(pctldev));
- /* On error release all taken pins */
- i--; /* this pin just failed */
- for (; i >= 0; i--)
- pin_free(pctldev, pins[i], NULL);
- return -ENODEV;
- }
- }
+ setting->data.mux.group = ret;
return 0;
}
void pinmux_free_setting(struct pinctrl_setting const *setting)
{
- struct pinctrl_dev *pctldev = setting->pctldev;
- const struct pinctrl_ops *pctlops = pctldev->desc->pctlops;
- const unsigned *pins;
- unsigned num_pins;
- int ret;
- int i;
-
- ret = pctlops->get_group_pins(pctldev, setting->data.mux.group,
- &pins, &num_pins);
- if (ret) {
- dev_err(pctldev->dev,
- "could not get pins for device %s group selector %d\n",
- pinctrl_dev_get_name(pctldev), setting->data.mux.group);
- return;
- }
-
- for (i = 0; i < num_pins; i++)
- pin_free(pctldev, pins[i], NULL);
+ /* This function is currently unused */
}
int pinmux_enable_setting(struct pinctrl_setting const *setting)
@@ -420,6 +407,18 @@
num_pins = 0;
}
+ /* Try to allocate all pins in this group, one by one */
+ for (i = 0; i < num_pins; i++) {
+ ret = pin_request(pctldev, pins[i], setting->dev_name, NULL);
+ if (ret) {
+ dev_err(pctldev->dev,
+ "could not request pin %d on device %s\n",
+ pins[i], pinctrl_dev_get_name(pctldev));
+ goto err_pin_request;
+ }
+ }
+
+ /* Now that we have acquired the pins, encode the mux setting */
for (i = 0; i < num_pins; i++) {
desc = pin_desc_get(pctldev, pins[i]);
if (desc == NULL) {
@@ -431,8 +430,26 @@
desc->mux_setting = &(setting->data.mux);
}
- return ops->enable(pctldev, setting->data.mux.func,
- setting->data.mux.group);
+ ret = ops->enable(pctldev, setting->data.mux.func,
+ setting->data.mux.group);
+
+ if (ret)
+ goto err_enable;
+
+ return 0;
+
+err_enable:
+ for (i = 0; i < num_pins; i++) {
+ desc = pin_desc_get(pctldev, pins[i]);
+ if (desc)
+ desc->mux_setting = NULL;
+ }
+err_pin_request:
+ /* On error release all taken pins */
+ while (--i >= 0)
+ pin_free(pctldev, pins[i], NULL);
+
+ return ret;
}
void pinmux_disable_setting(struct pinctrl_setting const *setting)
@@ -456,6 +473,7 @@
num_pins = 0;
}
+ /* Flag the descs that no setting is active */
for (i = 0; i < num_pins; i++) {
desc = pin_desc_get(pctldev, pins[i]);
if (desc == NULL) {
@@ -467,7 +485,12 @@
desc->mux_setting = NULL;
}
- ops->disable(pctldev, setting->data.mux.func, setting->data.mux.group);
+ /* And release the pins */
+ for (i = 0; i < num_pins; i++)
+ pin_free(pctldev, pins[i], NULL);
+
+ if (ops->disable)
+ ops->disable(pctldev, setting->data.mux.func, setting->data.mux.group);
}
#ifdef CONFIG_DEBUG_FS
@@ -477,11 +500,15 @@
{
struct pinctrl_dev *pctldev = s->private;
const struct pinmux_ops *pmxops = pctldev->desc->pmxops;
+ unsigned nfuncs;
unsigned func_selector = 0;
- mutex_lock(&pinctrl_mutex);
+ if (!pmxops)
+ return 0;
- while (pmxops->list_functions(pctldev, func_selector) >= 0) {
+ mutex_lock(&pinctrl_mutex);
+ nfuncs = pmxops->get_functions_count(pctldev);
+ while (func_selector < nfuncs) {
const char *func = pmxops->get_function_name(pctldev,
func_selector);
const char * const *groups;
@@ -515,6 +542,9 @@
const struct pinmux_ops *pmxops = pctldev->desc->pmxops;
unsigned i, pin;
+ if (!pmxops)
+ return 0;
+
seq_puts(s, "Pinmux settings per pin\n");
seq_puts(s, "Format: pin (name): mux_owner gpio_owner hog?\n");
diff --git a/drivers/pinctrl/pinmux.h b/drivers/pinctrl/pinmux.h
index 6fc4700..d1a98b1 100644
--- a/drivers/pinctrl/pinmux.h
+++ b/drivers/pinctrl/pinmux.h
@@ -31,12 +31,6 @@
int pinmux_enable_setting(struct pinctrl_setting const *setting);
void pinmux_disable_setting(struct pinctrl_setting const *setting);
-void pinmux_show_map(struct seq_file *s, struct pinctrl_map const *map);
-void pinmux_show_setting(struct seq_file *s,
- struct pinctrl_setting const *setting);
-void pinmux_init_device_debugfs(struct dentry *devroot,
- struct pinctrl_dev *pctldev);
-
#else
static inline int pinmux_check_ops(struct pinctrl_dev *pctldev)
@@ -89,6 +83,18 @@
{
}
+#endif
+
+#if defined(CONFIG_PINMUX) && defined(CONFIG_DEBUG_FS)
+
+void pinmux_show_map(struct seq_file *s, struct pinctrl_map const *map);
+void pinmux_show_setting(struct seq_file *s,
+ struct pinctrl_setting const *setting);
+void pinmux_init_device_debugfs(struct dentry *devroot,
+ struct pinctrl_dev *pctldev);
+
+#else
+
static inline void pinmux_show_map(struct seq_file *s,
struct pinctrl_map const *map)
{
diff --git a/drivers/platform/msm/ipa/a2_service.c b/drivers/platform/msm/ipa/a2_service.c
index 0d77741..4921ec2 100644
--- a/drivers/platform/msm/ipa/a2_service.c
+++ b/drivers/platform/msm/ipa/a2_service.c
@@ -112,7 +112,7 @@
};
static struct a2_mux_context_type *a2_mux_ctx;
-static void handle_bam_mux_cmd(struct sk_buff *rx_skb);
+static void handle_a2_mux_cmd(struct sk_buff *rx_skb);
static bool bam_ch_is_open(int index)
{
@@ -278,7 +278,8 @@
A2_MUX_COMPLETION_TIMEOUT);
a2_mux_ctx->wait_for_ack = 0;
if (unlikely(ret == 0)) {
- IPADBG("%s timeout previous ack\n", __func__);
+ IPAERR("%s previous ack from modem timed out\n",
+ __func__);
goto bail;
}
}
@@ -288,7 +289,7 @@
ret = wait_for_completion_timeout(&a2_mux_ctx->ul_wakeup_ack_completion,
A2_MUX_COMPLETION_TIMEOUT);
if (unlikely(ret == 0)) {
- IPADBG("%s timeout wakeup ack\n", __func__);
+ IPAERR("%s wakup ack from modem timed out\n", __func__);
goto bail;
}
INIT_COMPLETION(a2_mux_ctx->bam_connection_completion);
@@ -297,7 +298,7 @@
&a2_mux_ctx->bam_connection_completion,
A2_MUX_COMPLETION_TIMEOUT);
if (unlikely(ret == 0)) {
- IPADBG("%s timeout power on\n", __func__);
+ IPAERR("%s modem power on timed out\n", __func__);
goto bail;
}
}
@@ -310,7 +311,7 @@
return;
}
-static void bam_mux_write_done(bool is_tethered, struct sk_buff *skb)
+static void a2_mux_write_done(bool is_tethered, struct sk_buff *skb)
{
struct tx_pkt_info *info;
enum a2_mux_logical_channel_id lcid;
@@ -369,7 +370,7 @@
dev_kfree_skb_any(skb);
}
-static bool msm_bam_dmux_kickoff_ul_power_down(void)
+static bool a2_mux_kickoff_ul_power_down(void)
{
bool is_connected;
@@ -391,7 +392,7 @@
return is_connected;
}
-static bool msm_bam_dmux_kickoff_ul_wakeup(void)
+static bool a2_mux_kickoff_ul_wakeup(void)
{
bool is_connected;
@@ -424,7 +425,7 @@
a2_mux_ctx->bam_connect_in_progress = false;
write_unlock(&a2_mux_ctx->ul_wakeup_lock);
if (is_connected)
- msm_bam_dmux_kickoff_ul_wakeup();
+ a2_mux_kickoff_ul_wakeup();
else
ipa_rm_notify_completion(IPA_RM_RESOURCE_RELEASED,
IPA_RM_RESOURCE_A2_CONS);
@@ -450,13 +451,14 @@
&a2_mux_ctx->dl_wakeup_completion,
A2_MUX_COMPLETION_TIMEOUT);
if (unlikely(ret == 0)) {
- IPAERR("%s timeout A2 PROD\n", __func__);
+ IPAERR("%s timeout waiting for A2 PROD granted\n",
+ __func__);
BUG();
return;
}
}
if (!is_connected)
- msm_bam_dmux_kickoff_ul_power_down();
+ a2_mux_kickoff_ul_power_down();
}
static void kickoff_ul_request_resource_func(struct work_struct *work)
@@ -475,8 +477,8 @@
&a2_mux_ctx->request_resource_completion,
A2_MUX_COMPLETION_TIMEOUT);
if (unlikely(ret == 0)) {
- IPADBG("%s timeout request A2 PROD resource\n",
- __func__);
+ IPAERR("%s timeout waiting for A2 PROD granted\n",
+ __func__);
BUG();
return;
}
@@ -492,10 +494,10 @@
{
switch (evt) {
case IPA_RECEIVE:
- handle_bam_mux_cmd((struct sk_buff *)data);
+ handle_a2_mux_cmd((struct sk_buff *)data);
break;
case IPA_WRITE_DONE:
- bam_mux_write_done(false, (struct sk_buff *)data);
+ a2_mux_write_done(false, (struct sk_buff *)data);
break;
default:
IPAERR("%s: Unknown event %d\n", __func__, evt);
@@ -517,7 +519,7 @@
data);
break;
case IPA_WRITE_DONE:
- bam_mux_write_done(true, (struct sk_buff *)data);
+ a2_mux_write_done(true, (struct sk_buff *)data);
break;
default:
IPAERR("%s: Unknown event %d\n", __func__, evt);
@@ -663,7 +665,7 @@
return 0;
}
-static void bam_dmux_smsm_cb(void *priv,
+static void a2_mux_smsm_cb(void *priv,
u32 old_state,
u32 new_state)
{
@@ -696,7 +698,7 @@
mutex_unlock(&a2_mux_ctx->smsm_cb_lock);
}
-static void bam_dmux_smsm_ack_cb(void *priv, u32 old_state,
+static void a2_mux_smsm_ack_cb(void *priv, u32 old_state,
u32 new_state)
{
IPADBG("%s: 0x%08x -> 0x%08x\n", __func__, old_state,
@@ -710,7 +712,7 @@
int result = 0;
bool is_connected;
- is_connected = msm_bam_dmux_kickoff_ul_wakeup();
+ is_connected = a2_mux_kickoff_ul_wakeup();
if (!is_connected)
result = -EINPROGRESS;
return result;
@@ -721,7 +723,7 @@
int result = 0;
bool is_connected;
- is_connected = msm_bam_dmux_kickoff_ul_power_down();
+ is_connected = a2_mux_kickoff_ul_power_down();
if (is_connected)
result = -EINPROGRESS;
return result;
@@ -763,7 +765,7 @@
return result;
}
-static void bam_mux_process_data(struct sk_buff *rx_skb)
+static void a2_mux_process_data(struct sk_buff *rx_skb)
{
unsigned long flags;
struct bam_mux_hdr *rx_hdr;
@@ -787,7 +789,7 @@
flags);
}
-static void handle_bam_mux_cmd_open(struct bam_mux_hdr *rx_hdr)
+static void handle_a2_mux_cmd_open(struct bam_mux_hdr *rx_hdr)
{
unsigned long flags;
@@ -798,7 +800,7 @@
flags);
}
-static void handle_bam_mux_cmd(struct sk_buff *rx_skb)
+static void handle_a2_mux_cmd(struct sk_buff *rx_skb)
{
unsigned long flags;
struct bam_mux_hdr *rx_hdr;
@@ -828,12 +830,12 @@
}
switch (rx_hdr->cmd) {
case BAM_MUX_HDR_CMD_DATA:
- bam_mux_process_data(rx_skb);
+ a2_mux_process_data(rx_skb);
break;
case BAM_MUX_HDR_CMD_OPEN:
IPADBG("%s: opening cid %d PC enabled\n", __func__,
rx_hdr->ch_id);
- handle_bam_mux_cmd_open(rx_hdr);
+ handle_a2_mux_cmd_open(rx_hdr);
if (!(rx_hdr->reserved & ENABLE_DISCONNECT_ACK)) {
IPADBG("%s: deactivating disconnect ack\n",
__func__);
@@ -852,7 +854,7 @@
a2_mux_ctx->a2_pc_disabled = 1;
ul_wakeup();
}
- handle_bam_mux_cmd_open(rx_hdr);
+ handle_a2_mux_cmd_open(rx_hdr);
dev_kfree_skb_any(rx_skb);
break;
case BAM_MUX_HDR_CMD_CLOSE:
@@ -877,7 +879,7 @@
}
}
-static int bam_mux_write_cmd(void *data, u32 len)
+static int a2_mux_write_cmd(void *data, u32 len)
{
int rc;
struct tx_pkt_info *pkt;
@@ -1312,7 +1314,7 @@
hdr->pkt_len = htons(hdr->pkt_len);
IPADBG("convert to network order magic_num=%d, pkt_len=%d\n",
hdr->magic_num, hdr->pkt_len);
- rc = bam_mux_write_cmd((void *)hdr,
+ rc = a2_mux_write_cmd((void *)hdr,
sizeof(struct bam_mux_hdr));
if (rc) {
IPAERR("%s: bam_mux_write_cmd failed %d; ch: %d\n",
@@ -1384,7 +1386,7 @@
hdr->pkt_len = htons(hdr->pkt_len);
IPADBG("convert to network order magic_num=%d, pkt_len=%d\n",
hdr->magic_num, hdr->pkt_len);
- rc = bam_mux_write_cmd((void *)hdr, sizeof(struct bam_mux_hdr));
+ rc = a2_mux_write_cmd((void *)hdr, sizeof(struct bam_mux_hdr));
if (rc) {
IPAERR("%s: bam_mux_write_cmd failed %d; ch: %d\n",
__func__, rc, lcid);
@@ -1578,7 +1580,7 @@
goto ctx_alloc_failed;
}
rc = smsm_state_cb_register(SMSM_MODEM_STATE, SMSM_A2_POWER_CONTROL,
- bam_dmux_smsm_cb, NULL);
+ a2_mux_smsm_cb, NULL);
if (rc) {
IPAERR("%s: smsm cb register failed, rc: %d\n", __func__, rc);
rc = -ENOMEM;
@@ -1586,7 +1588,7 @@
}
rc = smsm_state_cb_register(SMSM_MODEM_STATE,
SMSM_A2_POWER_CONTROL_ACK,
- bam_dmux_smsm_ack_cb, NULL);
+ a2_mux_smsm_ack_cb, NULL);
if (rc) {
IPAERR("%s: smsm ack cb register failed, rc: %d\n",
__func__, rc);
@@ -1594,7 +1596,7 @@
goto smsm_ack_cb_reg_failed;
}
if (smsm_get_state(SMSM_MODEM_STATE) & SMSM_A2_POWER_CONTROL)
- bam_dmux_smsm_cb(NULL, 0, smsm_get_state(SMSM_MODEM_STATE));
+ a2_mux_smsm_cb(NULL, 0, smsm_get_state(SMSM_MODEM_STATE));
/*
* Set remote channel open for tethered channel since there is
@@ -1608,7 +1610,7 @@
smsm_ack_cb_reg_failed:
smsm_state_cb_deregister(SMSM_MODEM_STATE,
SMSM_A2_POWER_CONTROL,
- bam_dmux_smsm_cb, NULL);
+ a2_mux_smsm_cb, NULL);
ctx_alloc_failed:
kfree(a2_mux_ctx);
register_bam_failed:
@@ -1626,11 +1628,11 @@
{
smsm_state_cb_deregister(SMSM_MODEM_STATE,
SMSM_A2_POWER_CONTROL_ACK,
- bam_dmux_smsm_ack_cb,
+ a2_mux_smsm_ack_cb,
NULL);
smsm_state_cb_deregister(SMSM_MODEM_STATE,
SMSM_A2_POWER_CONTROL,
- bam_dmux_smsm_cb,
+ a2_mux_smsm_cb,
NULL);
if (a2_mux_ctx->a2_mux_tx_workqueue)
destroy_workqueue(a2_mux_ctx->a2_mux_tx_workqueue);
diff --git a/drivers/platform/msm/ipa/ipa.c b/drivers/platform/msm/ipa/ipa.c
index 67c86b9..f5d7b6e 100644
--- a/drivers/platform/msm/ipa/ipa.c
+++ b/drivers/platform/msm/ipa/ipa.c
@@ -50,7 +50,6 @@
#define IPA_AGGR_STR_IN_BYTES(str) \
(strnlen((str), IPA_AGGR_MAX_STR_LENGTH - 1) + 1)
-
static struct ipa_plat_drv_res ipa_res = {0, };
static struct of_device_id ipa_plat_drv_match[] = {
{
@@ -141,7 +140,7 @@
static bool hdr_tbl_lcl = 1;
module_param(hdr_tbl_lcl, bool, 0644);
MODULE_PARM_DESC(hdr_tbl_lcl, "where hdr tbl resides 1-local; 0-system");
-static bool ip4_rt_tbl_lcl = 1;
+static bool ip4_rt_tbl_lcl;
module_param(ip4_rt_tbl_lcl, bool, 0644);
MODULE_PARM_DESC(ip4_rt_tbl_lcl,
"where ip4 rt tables reside 1-local; 0-system");
@@ -197,6 +196,8 @@
if (_IOC_NR(cmd) >= IPA_IOCTL_MAX)
return -ENOTTY;
+ ipa_inc_client_enable_clks();
+
switch (cmd) {
case IPA_IOC_ALLOC_NAT_MEM:
if (copy_from_user((u8 *)&nat_mem, (u8 *)arg,
@@ -639,10 +640,13 @@
rm_depend.depends_on_name);
break;
default: /* redundant, as cmd was checked against MAXNR */
+ ipa_dec_client_disable_clks();
return -ENOTTY;
}
kfree(param);
+ ipa_dec_client_disable_clks();
+
return retval;
}
@@ -1730,6 +1734,22 @@
result = -ENOMEM;
goto fail_rt_tbl_cache;
}
+ ipa_ctx->tx_pkt_wrapper_cache =
+ kmem_cache_create("IPA TX PKT WRAPPER",
+ sizeof(struct ipa_tx_pkt_wrapper), 0, 0, NULL);
+ if (!ipa_ctx->tx_pkt_wrapper_cache) {
+ IPAERR(":ipa tx pkt wrapper cache create failed\n");
+ result = -ENOMEM;
+ goto fail_tx_pkt_wrapper_cache;
+ }
+ ipa_ctx->rx_pkt_wrapper_cache =
+ kmem_cache_create("IPA RX PKT WRAPPER",
+ sizeof(struct ipa_rx_pkt_wrapper), 0, 0, NULL);
+ if (!ipa_ctx->rx_pkt_wrapper_cache) {
+ IPAERR(":ipa rx pkt wrapper cache create failed\n");
+ result = -ENOMEM;
+ goto fail_rx_pkt_wrapper_cache;
+ }
ipa_ctx->tree_node_cache =
kmem_cache_create("IPA TREE", sizeof(struct ipa_tree_node), 0, 0,
NULL);
@@ -1798,8 +1818,6 @@
mutex_init(&ipa_ctx->lock);
mutex_init(&ipa_ctx->nat_mem.lock);
- skb_queue_head_init(&ipa_ctx->rx_list);
-
for (i = 0; i < IPA_A5_SYS_MAX; i++) {
INIT_LIST_HEAD(&ipa_ctx->sys[i].head_desc_list);
spin_lock_init(&ipa_ctx->sys[i].spinlock);
@@ -1813,15 +1831,15 @@
atomic_set(&ipa_ctx->sys[i].curr_polling_state, 0);
}
- ipa_ctx->rx_wq = alloc_workqueue("ipa rx wq", WQ_MEM_RECLAIM |
- WQ_CPU_INTENSIVE, 1);
+ ipa_ctx->rx_wq = create_singlethread_workqueue("ipa rx wq");
if (!ipa_ctx->rx_wq) {
IPAERR(":fail to create rx wq\n");
result = -ENOMEM;
goto fail_rx_wq;
}
- ipa_ctx->tx_wq = create_singlethread_workqueue("ipa tx wq");
+ ipa_ctx->tx_wq = alloc_workqueue("ipa tx wq", WQ_MEM_RECLAIM |
+ WQ_CPU_INTENSIVE, 1);
if (!ipa_ctx->tx_wq) {
IPAERR(":fail to create tx wq\n");
result = -ENOMEM;
@@ -1832,7 +1850,6 @@
ipa_ctx->rt_rule_hdl_tree = RB_ROOT;
ipa_ctx->rt_tbl_hdl_tree = RB_ROOT;
ipa_ctx->flt_rule_hdl_tree = RB_ROOT;
- ipa_ctx->tag_tree = RB_ROOT;
mutex_init(&ipa_ctx->ipa_active_clients_lock);
ipa_ctx->ipa_active_clients = 0;
@@ -1974,6 +1991,10 @@
fail_dma_pool:
kmem_cache_destroy(ipa_ctx->tree_node_cache);
fail_tree_node_cache:
+ kmem_cache_destroy(ipa_ctx->rx_pkt_wrapper_cache);
+fail_rx_pkt_wrapper_cache:
+ kmem_cache_destroy(ipa_ctx->tx_pkt_wrapper_cache);
+fail_tx_pkt_wrapper_cache:
kmem_cache_destroy(ipa_ctx->rt_tbl_cache);
fail_rt_tbl_cache:
kmem_cache_destroy(ipa_ctx->hdr_offset_cache);
diff --git a/drivers/platform/msm/ipa/ipa_client.c b/drivers/platform/msm/ipa/ipa_client.c
index ae59f37..e98c9b7 100644
--- a/drivers/platform/msm/ipa/ipa_client.c
+++ b/drivers/platform/msm/ipa/ipa_client.c
@@ -9,7 +9,6 @@
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
-
#include <linux/delay.h>
#include "ipa_i.h"
@@ -19,8 +18,8 @@
*/
#define IPA_A2_HOLB_TMR_EN 0x1
#define IPA_A2_HOLB_TMR_DEFAULT_VAL 0x1ff
-#define IPA_WLAN_HOLB_TMR_EN 0x1
-#define IPA_WLAN_HOLB_TMR_DEFAULT_VAL 0x7f
+
+#define IPA_PKT_FLUSH_TO_US 100
static void ipa_enable_data_path(u32 clnt_hdl)
{
@@ -36,56 +35,17 @@
static int ipa_disable_data_path(u32 clnt_hdl)
{
- DECLARE_COMPLETION_ONSTACK(tag_rsp);
- struct ipa_desc desc = {0};
- struct ipa_ip_packet_tag cmd;
struct ipa_ep_context *ep = &ipa_ctx->ep[clnt_hdl];
- struct ipa_tree_node *node;
- int result = 0;
if (ipa_ctx->ipa_hw_mode == IPA_HW_MODE_VIRTUAL) {
/* IPA_HW_MODE_VIRTUAL lacks support for TAG IC & EP suspend */
return 0;
}
- node = kmem_cache_zalloc(ipa_ctx->tree_node_cache, GFP_KERNEL);
- if (!node) {
- IPAERR("failed to alloc tree node object\n");
- result = -ENOMEM;
- goto fail_alloc;
- }
-
if (ipa_ctx->ipa_hw_type == IPA_HW_v1_1) {
ipa_write_reg(ipa_ctx->mmio,
IPA_ENDP_INIT_CTRL_n_OFST(clnt_hdl), 1);
-
- cmd.tag = (u32) &tag_rsp;
-
- desc.pyld = &cmd;
- desc.len = sizeof(struct ipa_ip_packet_tag);
- desc.type = IPA_IMM_CMD_DESC;
- desc.opcode = IPA_IP_PACKET_TAG;
-
- IPADBG("Wait on TAG %p clnt=%d\n", &tag_rsp, clnt_hdl);
-
- node->hdl = cmd.tag;
- mutex_lock(&ipa_ctx->lock);
- if (ipa_insert(&ipa_ctx->tag_tree, node)) {
- IPAERR("failed to add to tree\n");
- result = -EINVAL;
- mutex_unlock(&ipa_ctx->lock);
- goto fail_insert;
- }
- mutex_unlock(&ipa_ctx->lock);
-
- if (ipa_send_cmd(1, &desc)) {
- ipa_write_reg(ipa_ctx->mmio,
- IPA_ENDP_INIT_CTRL_n_OFST(clnt_hdl), 0);
- IPAERR("fail to send TAG command\n");
- result = -EPERM;
- goto fail_send;
- }
- wait_for_completion(&tag_rsp);
+ usleep(IPA_PKT_FLUSH_TO_US);
if (IPA_CLIENT_IS_CONS(ep->client) &&
ep->cfg.aggr.aggr_en == IPA_ENABLE_AGGR &&
ep->cfg.aggr.aggr_time_limit)
@@ -93,13 +53,6 @@
}
return 0;
-
-fail_send:
- rb_erase(&node->node, &ipa_ctx->tag_tree);
-fail_insert:
- kmem_cache_free(ipa_ctx->tree_node_cache, node);
-fail_alloc:
- return result;
}
static int ipa_connect_configure_sps(const struct ipa_connect_params *in,
@@ -251,26 +204,6 @@
memset(&ipa_ctx->ep[ipa_ep_idx], 0, sizeof(struct ipa_ep_context));
- if (IPA_CLIENT_IS_CONS(in->client)) {
- ep->cmd = kzalloc(sizeof(struct ipa_ip_packet_init),
- GFP_KERNEL);
- if (!ep->cmd) {
- IPAERR("failed to alloc immediate command object\n");
- result = -ENOMEM;
- goto fail;
- }
- ep->cmd->destination_pipe_index = ipa_ep_idx;
- ep->dma_addr = dma_map_single(NULL, ep->cmd,
- sizeof(struct ipa_ip_packet_init),
- DMA_TO_DEVICE);
- if (ep->dma_addr == 0 || ep->dma_addr == ~0) {
- IPAERR("failed to DMA MAP pkt_init\n");
- result = -ENOMEM;
- kfree(ep->cmd);
- goto fail;
- }
- }
-
ep->valid = 1;
ep->client = in->client;
ep->client_notify = in->notify;
@@ -447,13 +380,6 @@
return -EPERM;
}
- if (IPA_CLIENT_IS_CONS(ep->client)) {
- dma_unmap_single(NULL, ep->dma_addr,
- sizeof(struct ipa_ip_packet_init),
- DMA_TO_DEVICE);
- kfree(ep->cmd);
- }
-
ipa_enable_data_path(clnt_hdl);
memset(&ipa_ctx->ep[clnt_hdl], 0, sizeof(struct ipa_ep_context));
diff --git a/drivers/platform/msm/ipa/ipa_debugfs.c b/drivers/platform/msm/ipa/ipa_debugfs.c
index aaf5cc0..c429414 100644
--- a/drivers/platform/msm/ipa/ipa_debugfs.c
+++ b/drivers/platform/msm/ipa/ipa_debugfs.c
@@ -113,6 +113,7 @@
{
int nbytes;
+ ipa_inc_client_enable_clks();
if (ipa_ctx->ipa_hw_type == IPA_HW_v1_0)
nbytes = scnprintf(dbg_buff, IPA_MAX_MSG_LEN,
"IPA_VERSION=0x%x\n"
@@ -143,6 +144,7 @@
ipa_read_reg(ipa_ctx->mmio, IPA_FILTER_OFST_v2),
ipa_read_reg(ipa_ctx->mmio, IPA_SHARED_MEM_SIZE_OFST_v2)
);
+ ipa_dec_client_disable_clks();
return simple_read_from_buffer(ubuf, count, ppos, dbg_buff, nbytes);
}
@@ -241,6 +243,7 @@
end_idx = start_idx + 1;
}
pos = *ppos;
+ ipa_inc_client_enable_clks();
for (i = start_idx; i < end_idx; i++) {
if (ipa_ctx->ipa_hw_type == IPA_HW_v1_0) {
@@ -292,13 +295,16 @@
*ppos = pos;
ret = simple_read_from_buffer(ubuf, count, ppos, dbg_buff,
nbytes);
- if (ret < 0)
+ if (ret < 0) {
+ ipa_dec_client_disable_clks();
return ret;
+ }
size += ret;
ubuf += nbytes;
count -= nbytes;
}
+ ipa_dec_client_disable_clks();
*ppos = pos + size;
return size;
@@ -346,11 +352,18 @@
uint32_t mask[4];
int i;
- if (attrib->attrib_mask & IPA_FLT_TOS) {
- nbytes = scnprintf(buff + cnt, sz - cnt, "tos:%d ",
- attrib->u.v4.tos);
+
+ if (attrib->attrib_mask & IPA_FLT_TOS_MASKED) {
+ nbytes = scnprintf(buff + cnt, sz - cnt, "tos_value:%d ",
+ attrib->tos_value);
cnt += nbytes;
}
+ if (attrib->attrib_mask & IPA_FLT_TOS_MASKED) {
+ nbytes = scnprintf(buff + cnt, sz - cnt, "tos_mask:%d ",
+ attrib->tos_mask);
+ cnt += nbytes;
+ }
+
if (attrib->attrib_mask & IPA_FLT_PROTOCOL) {
nbytes = scnprintf(buff + cnt, sz - cnt, "protocol:%d ",
attrib->u.v4.protocol);
@@ -493,6 +506,32 @@
set = &ipa_ctx->rt_tbl_set[ip];
mutex_lock(&ipa_ctx->lock);
+ if (ip == IPA_IP_v6) {
+ if (ipa_ctx->ip6_rt_tbl_lcl) {
+ nbytes = scnprintf(dbg_buff + cnt,
+ IPA_MAX_MSG_LEN - cnt,
+ "Table Resides on local memory\n");
+ cnt += nbytes;
+ } else {
+ nbytes = scnprintf(dbg_buff + cnt,
+ IPA_MAX_MSG_LEN - cnt,
+ "Table Resides on system(ddr) memory\n");
+ cnt += nbytes;
+ }
+ } else if (ip == IPA_IP_v4) {
+ if (ipa_ctx->ip4_rt_tbl_lcl) {
+ nbytes = scnprintf(dbg_buff + cnt,
+ IPA_MAX_MSG_LEN - cnt,
+ "Table Resides on local memory\n");
+ cnt += nbytes;
+ } else {
+ nbytes = scnprintf(dbg_buff + cnt,
+ IPA_MAX_MSG_LEN - cnt,
+ "Table Resides on system(ddr) memory\n");
+ cnt += nbytes;
+ }
+ }
+
list_for_each_entry(tbl, &set->head_rt_tbl_list, link) {
i = 0;
list_for_each_entry(entry, &tbl->head_rt_rule_list, link) {
@@ -676,12 +715,14 @@
if (kstrtou32(dbg_buff, 0, &option))
return -EFAULT;
+ ipa_inc_client_enable_clks();
if (option == 1)
ipa_write_reg(ipa_ctx->mmio, IPA_DEBUG_CNT_CTRL_n_OFST(0),
IPA_DBG_CNTR_ON);
else
ipa_write_reg(ipa_ctx->mmio, IPA_DEBUG_CNT_CTRL_n_OFST(0),
IPA_DBG_CNTR_OFF);
+ ipa_dec_client_disable_clks();
return count;
}
@@ -691,10 +732,12 @@
{
int nbytes;
+ ipa_inc_client_enable_clks();
nbytes = scnprintf(dbg_buff, IPA_MAX_MSG_LEN,
"IPA_DEBUG_CNT_REG_0=0x%x\n",
ipa_read_reg(ipa_ctx->mmio,
IPA_DEBUG_CNT_REG_n_OFST(0)));
+ ipa_dec_client_disable_clks();
return simple_read_from_buffer(ubuf, count, ppos, dbg_buff, nbytes);
}
diff --git a/drivers/platform/msm/ipa/ipa_dp.c b/drivers/platform/msm/ipa/ipa_dp.c
index c564922..1f232d4 100644
--- a/drivers/platform/msm/ipa/ipa_dp.c
+++ b/drivers/platform/msm/ipa/ipa_dp.c
@@ -17,15 +17,16 @@
#include <linux/netdevice.h>
#include "ipa_i.h"
+
#define list_next_entry(pos, member) \
list_entry(pos->member.next, typeof(*pos), member)
+#define IPA_LAST_DESC_CNT 0xFFFF
#define POLLING_INACTIVITY_RX 40
-#define POLLING_MIN_SLEEP_RX 2350
-#define POLLING_MAX_SLEEP_RX 2450
-#define POLLING_INACTIVITY_TX 10
-#define POLLING_MIN_SLEEP_TX 100
-#define POLLING_MAX_SLEEP_TX 200
-#define RX_MAX_IND 40
+#define POLLING_MIN_SLEEP_RX 950
+#define POLLING_MAX_SLEEP_RX 1050
+#define POLLING_INACTIVITY_TX 40
+#define POLLING_MIN_SLEEP_TX 400
+#define POLLING_MAX_SLEEP_TX 500
static void replenish_rx_work_func(struct work_struct *work);
static struct delayed_work replenish_rx_work;
@@ -33,7 +34,6 @@
static DECLARE_WORK(rx_work, ipa_wq_handle_rx);
static void ipa_wq_handle_tx(struct work_struct *work);
static DECLARE_WORK(tx_work, ipa_wq_handle_tx);
-
/**
* ipa_write_done() - this function will be (eventually) called when a Tx
* operation is complete
@@ -83,7 +83,7 @@
if (tx_pkt->callback)
tx_pkt->callback(tx_pkt->user1, tx_pkt->user2);
- kfree(tx_pkt);
+ kmem_cache_free(ipa_ctx->tx_pkt_wrapper_cache, tx_pkt);
}
int ipa_handle_tx_core(struct ipa_sys_context *sys, bool process_all,
@@ -121,13 +121,23 @@
IPADBG("--curr_cnt=%d\n", sys->len);
- if (tx_pkt->callback) {
+ if (unlikely(ipa_ctx->ipa_hw_type == IPA_HW_v1_0))
+ dma_pool_free(ipa_ctx->dma_pool,
+ tx_pkt->bounce,
+ tx_pkt->mem.phys_base);
+ else
dma_unmap_single(NULL, tx_pkt->mem.phys_base,
- tx_pkt->mem.size, DMA_TO_DEVICE);
- tx_pkt->callback(tx_pkt->user1, tx_pkt->user2);
- }
+ tx_pkt->mem.size,
+ DMA_TO_DEVICE);
- kfree(tx_pkt);
+ if (tx_pkt->callback)
+ tx_pkt->callback(tx_pkt->user1, tx_pkt->user2);
+
+ if (tx_pkt->cnt > 1 && tx_pkt->cnt != IPA_LAST_DESC_CNT)
+ dma_pool_free(ipa_ctx->dma_pool, tx_pkt->mult.base,
+ tx_pkt->mult.phys_base);
+
+ kmem_cache_free(ipa_ctx->tx_pkt_wrapper_cache, tx_pkt);
cnt++;
};
@@ -146,6 +156,11 @@
goto fail;
}
+ ret = sps_get_config(sys->ep->ep_hdl, &sys->ep->connect);
+ if (ret) {
+ IPAERR("sps_get_config() failed %d\n", ret);
+ goto fail;
+ }
sys->event.options = SPS_O_EOT;
ret = sps_register_event(sys->ep->ep_hdl, &sys->event);
if (ret) {
@@ -225,7 +240,7 @@
if (unlikely(!in_atomic))
mem_flag = GFP_KERNEL;
- tx_pkt = kmalloc(sizeof(struct ipa_tx_pkt_wrapper), mem_flag);
+ tx_pkt = kmem_cache_zalloc(ipa_ctx->tx_pkt_wrapper_cache, mem_flag);
if (!tx_pkt) {
IPAERR("failed to alloc tx wrapper\n");
goto fail_mem_alloc;
@@ -309,12 +324,191 @@
else
dma_unmap_single(NULL, dma_address, desc->len, DMA_TO_DEVICE);
fail_dma_map:
- kfree(tx_pkt);
+ kmem_cache_free(ipa_ctx->tx_pkt_wrapper_cache, tx_pkt);
fail_mem_alloc:
return -EFAULT;
}
/**
+ * ipa_send() - Send multiple descriptors in one HW transaction
+ * @sys: system pipe context
+ * @num_desc: number of packets
+ * @desc: packets to send (may be immediate command or data)
+ * @in_atomic: whether caller is in atomic context
+ *
+ * This function is used for system-to-bam connection.
+ * - SPS driver expect struct sps_transfer which will contain all the data
+ * for a transaction
+ * - The sps_transfer struct will be pointing to bounce buffers for
+ * its DMA command (immediate command and data)
+ * - ipa_tx_pkt_wrapper will be used for each ipa
+ * descriptor (allocated from wrappers cache)
+ * - The wrapper struct will be configured for each ipa-desc payload and will
+ * contain information which will be later used by the user callbacks
+ * - each transfer will be made by calling to sps_transfer()
+ * - Each packet (command or data) that will be sent will also be saved in
+ * ipa_sys_context for later check that all data was sent
+ *
+ * Return codes: 0: success, -EFAULT: failure
+ */
+int ipa_send(struct ipa_sys_context *sys, u32 num_desc, struct ipa_desc *desc,
+ bool in_atomic)
+{
+ struct ipa_tx_pkt_wrapper *tx_pkt;
+ struct ipa_tx_pkt_wrapper *next_pkt;
+ struct sps_transfer transfer = { 0 };
+ struct sps_iovec *iovec;
+ unsigned long irq_flags;
+ dma_addr_t dma_addr;
+ int i = 0;
+ int j;
+ int result;
+ int fail_dma_wrap = 0;
+ uint size = num_desc * sizeof(struct sps_iovec);
+ u32 mem_flag = GFP_ATOMIC;
+
+ if (unlikely(!in_atomic))
+ mem_flag = GFP_KERNEL;
+
+ transfer.iovec = dma_pool_alloc(ipa_ctx->dma_pool, mem_flag, &dma_addr);
+ transfer.iovec_phys = dma_addr;
+ transfer.iovec_count = num_desc;
+ spin_lock_irqsave(&sys->spinlock, irq_flags);
+ if (!transfer.iovec) {
+ IPAERR("fail to alloc DMA mem for sps xfr buff\n");
+ goto failure_coherent;
+ }
+
+ for (i = 0; i < num_desc; i++) {
+ fail_dma_wrap = 0;
+ tx_pkt = kmem_cache_zalloc(ipa_ctx->tx_pkt_wrapper_cache,
+ mem_flag);
+ if (!tx_pkt) {
+ IPAERR("failed to alloc tx wrapper\n");
+ goto failure;
+ }
+ /*
+ * first desc of set is "special" as it holds the count and
+ * other info
+ */
+ if (i == 0) {
+ transfer.user = tx_pkt;
+ tx_pkt->mult.phys_base = dma_addr;
+ tx_pkt->mult.base = transfer.iovec;
+ tx_pkt->mult.size = size;
+ tx_pkt->cnt = num_desc;
+ }
+
+ iovec = &transfer.iovec[i];
+ iovec->flags = 0;
+
+ INIT_LIST_HEAD(&tx_pkt->link);
+ tx_pkt->type = desc[i].type;
+
+ tx_pkt->mem.base = desc[i].pyld;
+ tx_pkt->mem.size = desc[i].len;
+
+ if (unlikely(ipa_ctx->ipa_hw_type == IPA_HW_v1_0)) {
+ WARN_ON(tx_pkt->mem.size > 512);
+
+ /*
+ * Due to a HW limitation, we need to make sure that the
+ * packet does not cross a 1KB boundary
+ */
+ tx_pkt->bounce =
+ dma_pool_alloc(ipa_ctx->dma_pool,
+ mem_flag,
+ &tx_pkt->mem.phys_base);
+ if (!tx_pkt->bounce) {
+ tx_pkt->mem.phys_base = 0;
+ } else {
+ WARN_ON(!ipa_straddle_boundary(
+ (u32)tx_pkt->mem.phys_base,
+ (u32)tx_pkt->mem.phys_base +
+ tx_pkt->mem.size - 1, 1024));
+ memcpy(tx_pkt->bounce, tx_pkt->mem.base,
+ tx_pkt->mem.size);
+ }
+ } else {
+ tx_pkt->mem.phys_base =
+ dma_map_single(NULL, tx_pkt->mem.base,
+ tx_pkt->mem.size,
+ DMA_TO_DEVICE);
+ }
+ if (!tx_pkt->mem.phys_base) {
+ IPAERR("failed to alloc tx wrapper\n");
+ fail_dma_wrap = 1;
+ goto failure;
+ }
+
+ tx_pkt->sys = sys;
+ tx_pkt->callback = desc[i].callback;
+ tx_pkt->user1 = desc[i].user1;
+ tx_pkt->user2 = desc[i].user2;
+
+ /*
+ * Point the iovec to the bounce buffer and
+ * add this packet to system pipe context.
+ */
+ iovec->addr = tx_pkt->mem.phys_base;
+ list_add_tail(&tx_pkt->link, &sys->head_desc_list);
+
+ /*
+ * Special treatment for immediate commands, where the structure
+ * of the descriptor is different
+ */
+ if (desc[i].type == IPA_IMM_CMD_DESC) {
+ iovec->size = desc[i].opcode;
+ iovec->flags |= SPS_IOVEC_FLAG_IMME;
+ } else {
+ iovec->size = desc[i].len;
+ }
+
+ if (i == (num_desc - 1)) {
+ iovec->flags |= SPS_IOVEC_FLAG_EOT;
+ /* "mark" the last desc */
+ tx_pkt->cnt = IPA_LAST_DESC_CNT;
+ }
+ }
+
+ result = sps_transfer(sys->ep->ep_hdl, &transfer);
+ if (result) {
+ IPAERR("sps_transfer failed rc=%d\n", result);
+ goto failure;
+ }
+
+ spin_unlock_irqrestore(&sys->spinlock, irq_flags);
+ return 0;
+
+failure:
+ tx_pkt = transfer.user;
+ for (j = 0; j < i; j++) {
+ next_pkt = list_next_entry(tx_pkt, link);
+ list_del(&tx_pkt->link);
+ if (unlikely(ipa_ctx->ipa_hw_type == IPA_HW_v1_0))
+ dma_pool_free(ipa_ctx->dma_pool,
+ tx_pkt->bounce,
+ tx_pkt->mem.phys_base);
+ else
+ dma_unmap_single(NULL, tx_pkt->mem.phys_base,
+ tx_pkt->mem.size,
+ DMA_TO_DEVICE);
+ kmem_cache_free(ipa_ctx->tx_pkt_wrapper_cache, tx_pkt);
+ tx_pkt = next_pkt;
+ }
+ if (i < num_desc)
+ /* last desc failed */
+ if (fail_dma_wrap)
+ kmem_cache_free(ipa_ctx->tx_pkt_wrapper_cache, tx_pkt);
+ if (transfer.iovec_phys)
+ dma_pool_free(ipa_ctx->dma_pool, transfer.iovec,
+ transfer.iovec_phys);
+failure_coherent:
+ spin_unlock_irqrestore(&sys->spinlock, irq_flags);
+ return -EFAULT;
+}
+
+/**
* ipa_sps_irq_cmd_ack - callback function which will be called by SPS driver after an
* immediate command is complete.
* @user1: pointer to the descriptor of the transfer
@@ -345,6 +539,7 @@
*/
int ipa_send_cmd(u16 num_desc, struct ipa_desc *descr)
{
+ struct ipa_desc *desc;
int result = 0;
ipa_inc_client_enable_clks();
@@ -364,10 +559,22 @@
}
wait_for_completion(&descr->xfer_done);
} else {
- IPAERR("unsupported chaining multiple IC\n");
+ desc = &descr[num_desc - 1];
+ init_completion(&desc->xfer_done);
+
+ if (desc->callback || desc->user1)
+ WARN_ON(1);
+
+ desc->callback = ipa_sps_irq_cmd_ack;
+ desc->user1 = desc;
+ if (ipa_send(&ipa_ctx->sys[IPA_A5_CMD], num_desc,
+ descr, false)) {
+ IPAERR("fail to send multiple immediate command set\n");
result = -EFAULT;
goto bail;
}
+ wait_for_completion(&desc->xfer_done);
+ }
IPA_STATS_INC_IC_CNT(num_desc, descr, ipa_ctx->stats.imm_cmds);
bail:
@@ -393,6 +600,12 @@
switch (notify->event_id) {
case SPS_EVENT_EOT:
if (!atomic_read(&sys->curr_polling_state)) {
+ ret = sps_get_config(sys->ep->ep_hdl,
+ &sys->ep->connect);
+ if (ret) {
+ IPAERR("sps_get_config() failed %d\n", ret);
+ break;
+ }
sys->ep->connect.options = SPS_O_AUTO_ENABLE |
SPS_O_ACK_TRANSFERS | SPS_O_POLL;
ret = sps_set_config(sys->ep->ep_hdl,
@@ -435,47 +648,6 @@
}
}
-static void ipa_handle_tag_rsp(struct ipa_a5_mux_hdr *mux_hdr)
-{
- struct completion *compl;
- struct ipa_tree_node *node;
-
- /* retrieve the compl object from tag value */
- mux_hdr++;
- compl = (struct completion *) ntohl(*((u32 *)mux_hdr));
- IPADBG("%x %x %p\n", *(u32 *)mux_hdr, *((u32 *)mux_hdr + 1), compl);
-
- mutex_lock(&ipa_ctx->lock);
- node = ipa_search(&ipa_ctx->tag_tree, (u32)compl);
- if (node) {
- complete_all(compl);
- rb_erase(&node->node, &ipa_ctx->tag_tree);
- kmem_cache_free(ipa_ctx->tree_node_cache, node);
- } else {
- WARN_ON(1);
- }
- mutex_unlock(&ipa_ctx->lock);
-}
-
-static void ipa_dejitter(bool limit)
-{
- struct sk_buff *skb;
- int len = skb_queue_len(&ipa_ctx->rx_list);
- int i;
- void *cookie;
- ipa_notify_cb cb;
-
- if (limit && len >= RX_MAX_IND)
- len = RX_MAX_IND;
-
- for (i = len; i > 0; i--) {
- skb = __skb_dequeue(&ipa_ctx->rx_list);
- cb = (ipa_notify_cb)*(u32 *)&(skb->cb[0]);
- cookie = (void *)*(u32 *)&(skb->cb[4]);
- cb(cookie, IPA_RECEIVE, (unsigned long)skb);
- }
-}
-
/**
* ipa_handle_rx_core() - The core functionality of packet reception. This
* function is read from multiple code paths.
@@ -497,6 +669,8 @@
struct ipa_rx_pkt_wrapper *rx_pkt;
struct sk_buff *rx_skb;
struct sps_iovec iov;
+ unsigned int pull_len;
+ unsigned int padding;
int ret;
struct ipa_ep_context *ep;
int cnt = 0;
@@ -539,7 +713,7 @@
rx_skb->tail = rx_skb->data + rx_pkt->len;
rx_skb->len = rx_pkt->len;
rx_skb->truesize = rx_pkt->len + sizeof(struct sk_buff);
- kfree(rx_pkt);
+ kmem_cache_free(ipa_ctx->rx_pkt_wrapper_cache, rx_pkt);
mux_hdr = (struct ipa_a5_mux_hdr *)rx_skb->data;
@@ -554,35 +728,42 @@
IPA_STATS_INC_CNT(ipa_ctx->stats.rx_pkts);
IPA_STATS_EXCP_CNT(mux_hdr->flags, ipa_ctx->stats.rx_excp_pkts);
- if (mux_hdr->flags & IPA_A5_MUX_HDR_EXCP_FLAG_TAG) {
- if (ipa_ctx->ipa_hw_mode != IPA_HW_MODE_VIRTUAL)
- ipa_handle_tag_rsp(mux_hdr);
+ /*
+ * Any packets arriving over AMPDU_TX should be dispatched
+ * to the regular WLAN RX data-path.
+ */
+ if (unlikely(src_pipe == WLAN_AMPDU_TX_EP))
+ src_pipe = WLAN_PROD_TX_EP;
+
+ if (unlikely(src_pipe >= IPA_NUM_PIPES ||
+ !ipa_ctx->ep[src_pipe].valid ||
+ !ipa_ctx->ep[src_pipe].client_notify)) {
+ IPAERR("drop pipe=%d ep_valid=%d client_notify=%p\n",
+ src_pipe, ipa_ctx->ep[src_pipe].valid,
+ ipa_ctx->ep[src_pipe].client_notify);
dev_kfree_skb(rx_skb);
ipa_replenish_rx_cache();
++cnt;
continue;
}
- /*
- * Any packets arriving over AMPDU_TX should be dispatched
- * to the regular WLAN RX data-path.
- */
- if (src_pipe == WLAN_AMPDU_TX_EP)
- src_pipe = WLAN_PROD_TX_EP;
-
- WARN_ON(src_pipe >= IPA_NUM_PIPES);
-
ep = &ipa_ctx->ep[src_pipe];
- IPADBG("pulling %d bytes from skb\n", ep->pull_len);
- skb_pull(rx_skb, ep->pull_len);
+ pull_len = sizeof(struct ipa_a5_mux_hdr);
+
+ /*
+ * IP packet starts on word boundary
+ * remove the MUX header and any padding and pass the frame to
+ * the client which registered a rx callback on the "src pipe"
+ */
+ padding = ep->cfg.hdr.hdr_len & 0x3;
+ if (padding)
+ pull_len += 4 - padding;
+
+ IPADBG("pulling %d bytes from skb\n", pull_len);
+ skb_pull(rx_skb, pull_len);
ipa_replenish_rx_cache();
- if (ep->client_notify) {
- __skb_queue_tail(&ipa_ctx->rx_list, rx_skb);
- *(u32 *)&(rx_skb->cb[0]) = (u32)ep->client_notify;
- *(u32 *)&(rx_skb->cb[4]) = (u32)ep->priv;
- } else {
- dev_kfree_skb(rx_skb);
- }
+ ep->client_notify(ep->priv, IPA_RECEIVE,
+ (unsigned long)(rx_skb));
cnt++;
};
@@ -601,6 +782,11 @@
goto fail;
}
+ ret = sps_get_config(sys->ep->ep_hdl, &sys->ep->connect);
+ if (ret) {
+ IPAERR("sps_get_config() failed %d\n", ret);
+ goto fail;
+ }
sys->event.options = SPS_O_EOT;
ret = sps_register_event(sys->ep->ep_hdl, &sys->event);
if (ret) {
@@ -647,6 +833,12 @@
switch (notify->event_id) {
case SPS_EVENT_EOT:
if (!atomic_read(&sys->curr_polling_state)) {
+ ret = sps_get_config(sys->ep->ep_hdl,
+ &sys->ep->connect);
+ if (ret) {
+ IPAERR("sps_get_config() failed %d\n", ret);
+ break;
+ }
sys->ep->connect.options = SPS_O_AUTO_ENABLE |
SPS_O_ACK_TRANSFERS | SPS_O_POLL;
ret = sps_set_config(sys->ep->ep_hdl,
@@ -696,10 +888,8 @@
} else {
inactive_cycles = 0;
}
- ipa_dejitter(true);
} while (inactive_cycles <= POLLING_INACTIVITY_RX);
- ipa_dejitter(false);
ipa_rx_switch_to_intr_mode(sys);
ipa_dec_client_disable_clks();
}
@@ -835,7 +1025,6 @@
break;
case 2:
sys_idx = ipa_ep_idx;
- ipa_ctx->sys[sys_idx].max_len = sys_in->desc_fifo_sz / 8 - 2;
INIT_DELAYED_WORK(&ipa_ctx->sys[sys_idx].switch_to_intr_work,
switch_to_intr_tx_work_func);
break;
@@ -950,87 +1139,9 @@
dev_kfree_skb(skb);
}
-static int ipa_send_two(struct sk_buff *skb, struct ipa_sys_context *sys,
- int dst_ep_idx)
+static void ipa_tx_cmd_comp(void *user1, void *user2)
{
- struct ipa_tx_pkt_wrapper *tx_pktc;
- struct ipa_tx_pkt_wrapper *tx_pktd;
- struct ipa_ep_context *ep = &ipa_ctx->ep[dst_ep_idx];
- unsigned long irq_flags;
- dma_addr_t dma_addrd;
- int rc = -ENOMEM;
-
- tx_pktc = kmalloc(sizeof(struct ipa_tx_pkt_wrapper), GFP_ATOMIC);
- if (!tx_pktc) {
- IPAERR("failed to alloc tx wrapper C\n");
- goto fail_mem_alloc_c;
- }
-
- tx_pktd = kmalloc(sizeof(struct ipa_tx_pkt_wrapper), GFP_ATOMIC);
- if (!tx_pktd) {
- IPAERR("failed to alloc tx wrapper D\n");
- goto fail_mem_alloc_d;
- }
-
- dma_addrd = dma_map_single(NULL, skb->data, skb->len, DMA_TO_DEVICE);
- if (!dma_addrd) {
- IPAERR("failed to DMA wrap\n");
- goto fail_dma_map_d;
- }
-
- INIT_LIST_HEAD(&tx_pktc->link);
- tx_pktc->callback = NULL;
-
- INIT_LIST_HEAD(&tx_pktd->link);
- tx_pktd->mem.phys_base = dma_addrd;
- tx_pktd->mem.base = skb->data;
- tx_pktd->mem.size = skb->len;
- tx_pktd->callback = ipa_tx_comp_usr_notify_release;
- tx_pktd->user1 = skb;
- tx_pktd->user2 = (void *)dst_ep_idx;
-
- spin_lock_irqsave(&sys->spinlock, irq_flags);
- if (sys->len >= sys->max_len)
- goto fail_oom;
- list_add_tail(&tx_pktc->link, &sys->head_desc_list);
- if (sps_transfer_one(sys->ep->ep_hdl, ep->dma_addr, IPA_IP_PACKET_INIT,
- tx_pktc, SPS_IOVEC_FLAG_IMME |
- SPS_IOVEC_FLAG_NO_SUBMIT))
- IPAERR("sps_transfer_one 0 failed\n");
- list_add_tail(&tx_pktd->link, &sys->head_desc_list);
- if (sps_transfer_one(sys->ep->ep_hdl, dma_addrd, skb->len, tx_pktd,
- SPS_IOVEC_FLAG_EOT | SPS_IOVEC_FLAG_INT))
- IPAERR("sps_transfer_one 1 failed\n");
- sys->len += 2;
- spin_unlock_irqrestore(&sys->spinlock, irq_flags);
- return 0;
-
-fail_oom:
- dma_unmap_single(NULL, dma_addrd, skb->len, DMA_TO_DEVICE);
-fail_dma_map_d:
- kfree(tx_pktd);
-fail_mem_alloc_d:
- kfree(tx_pktc);
-fail_mem_alloc_c:
- return rc;
-}
-
-static int ipa_send_data_hw_path(struct sk_buff *skb,
- struct ipa_sys_context *sys, int dst_ep_idx)
-{
- struct ipa_desc desc;
-
- desc.pyld = skb->data;
- desc.len = skb->len;
- desc.type = IPA_DATA_DESC_SKB;
- desc.callback = ipa_tx_comp_usr_notify_release;
- desc.user1 = skb;
- desc.user2 = (void *)dst_ep_idx;
-
- if (ipa_send_one(sys, &desc, true))
- return -EFAULT;
-
- return 0;
+ kfree(user1);
}
/**
@@ -1063,42 +1174,76 @@
int ipa_tx_dp(enum ipa_client_type dst, struct sk_buff *skb,
struct ipa_tx_meta *meta)
{
+ struct ipa_desc desc[2];
int ipa_ep_idx;
+ struct ipa_ip_packet_init *cmd;
+
+ memset(&desc, 0, 2 * sizeof(struct ipa_desc));
ipa_ep_idx = ipa_get_ep_mapping(ipa_ctx->mode, dst);
if (unlikely(ipa_ep_idx == -1)) {
IPAERR("dest EP does not exist.\n");
- goto fail;
+ goto fail_gen;
}
if (unlikely(ipa_ctx->ep[ipa_ep_idx].valid == 0)) {
IPAERR("dest EP not valid.\n");
- goto fail;
+ goto fail_gen;
}
if (IPA_CLIENT_IS_CONS(dst)) {
- if (ipa_send_two(skb, &ipa_ctx->sys[IPA_A5_LAN_WAN_OUT],
- ipa_ep_idx)) {
- IPAERR("fail to send pkt_init+skb dst=%d skb=%p\n",
- dst, skb);
- goto fail;
+ cmd = kzalloc(sizeof(struct ipa_ip_packet_init), GFP_ATOMIC);
+ if (!cmd) {
+ IPAERR("failed to alloc immediate command object\n");
+ goto fail_mem_alloc;
+ }
+
+ cmd->destination_pipe_index = ipa_ep_idx;
+ if (meta && meta->mbim_stream_id_valid)
+ cmd->metadata = meta->mbim_stream_id;
+ desc[0].opcode = IPA_IP_PACKET_INIT;
+ desc[0].pyld = cmd;
+ desc[0].len = sizeof(struct ipa_ip_packet_init);
+ desc[0].type = IPA_IMM_CMD_DESC;
+ desc[0].callback = ipa_tx_cmd_comp;
+ desc[0].user1 = cmd;
+ desc[1].pyld = skb->data;
+ desc[1].len = skb->len;
+ desc[1].type = IPA_DATA_DESC_SKB;
+ desc[1].callback = ipa_tx_comp_usr_notify_release;
+ desc[1].user1 = skb;
+ desc[1].user2 = (void *)ipa_ep_idx;
+
+ if (ipa_send(&ipa_ctx->sys[IPA_A5_LAN_WAN_OUT], 2, desc,
+ true)) {
+ IPAERR("fail to send immediate command\n");
+ goto fail_send;
}
IPA_STATS_INC_CNT(ipa_ctx->stats.imm_cmds[IPA_IP_PACKET_INIT]);
} else if (dst == IPA_CLIENT_A5_WLAN_AMPDU_PROD) {
- if (ipa_send_data_hw_path(skb,
- &ipa_ctx->sys[IPA_A5_WLAN_AMPDU_OUT],
- ipa_ep_idx)) {
- IPAERR("fail to send skb dst=%d skb=%p\n", dst, skb);
- goto fail;
+ desc[0].pyld = skb->data;
+ desc[0].len = skb->len;
+ desc[0].type = IPA_DATA_DESC_SKB;
+ desc[0].callback = ipa_tx_comp_usr_notify_release;
+ desc[0].user1 = skb;
+ desc[0].user2 = (void *)ipa_ep_idx;
+
+ if (ipa_send_one(&ipa_ctx->sys[IPA_A5_WLAN_AMPDU_OUT],
+ &desc[0], true)) {
+ IPAERR("fail to send skb\n");
+ goto fail_gen;
}
} else {
IPAERR("%d PROD is not supported.\n", dst);
- goto fail;
+ goto fail_gen;
}
return 0;
-fail:
+fail_send:
+ kfree(cmd);
+fail_mem_alloc:
+fail_gen:
return -EFAULT;
}
EXPORT_SYMBOL(ipa_tx_dp);
@@ -1134,7 +1279,8 @@
rx_len_cached = sys->len;
while (rx_len_cached < IPA_RX_POOL_CEIL) {
- rx_pkt = kmalloc(sizeof(struct ipa_rx_pkt_wrapper), flag);
+ rx_pkt = kmem_cache_zalloc(ipa_ctx->rx_pkt_wrapper_cache,
+ flag);
if (!rx_pkt) {
IPAERR("failed to alloc rx wrapper\n");
goto fail_kmem_cache_alloc;
@@ -1182,7 +1328,7 @@
fail_dma_mapping:
dev_kfree_skb(rx_pkt->skb);
fail_skb_alloc:
- kfree(rx_pkt);
+ kmem_cache_free(ipa_ctx->rx_pkt_wrapper_cache, rx_pkt);
fail_kmem_cache_alloc:
if (rx_len_cached == 0) {
IPA_STATS_INC_CNT(ipa_ctx->stats.rx_repl_repost);
@@ -1214,7 +1360,7 @@
dma_unmap_single(NULL, rx_pkt->dma_address, IPA_RX_SKB_SIZE,
DMA_FROM_DEVICE);
dev_kfree_skb(rx_pkt->skb);
- kfree(rx_pkt);
+ kmem_cache_free(ipa_ctx->rx_pkt_wrapper_cache, rx_pkt);
}
}
diff --git a/drivers/platform/msm/ipa/ipa_flt.c b/drivers/platform/msm/ipa/ipa_flt.c
index edb9fb1..2d75141 100644
--- a/drivers/platform/msm/ipa/ipa_flt.c
+++ b/drivers/platform/msm/ipa/ipa_flt.c
@@ -634,12 +634,13 @@
return -EINVAL;
}
ipa_ep_idx = ipa_get_ep_mapping(ipa_ctx->mode, ep);
- if (ipa_ep_idx == IPA_FLT_TABLE_INDEX_NOT_FOUND ||
- ipa_ctx->ep[ipa_ep_idx].valid == 0) {
- IPAERR("ep not valid and/or connected ep_idx=%d\n", ipa_ep_idx);
-
+ if (ipa_ep_idx == IPA_FLT_TABLE_INDEX_NOT_FOUND) {
+ IPAERR("ep not valid ep=%d\n", ep);
return -EINVAL;
}
+ if (ipa_ctx->ep[ipa_ep_idx].valid == 0)
+ IPADBG("ep not connected ep_idx=%d\n", ipa_ep_idx);
+
tbl = &ipa_ctx->flt_tbl[ipa_ep_idx][ip];
IPADBG("add ep flt rule ip=%d ep=%d\n", ip, ep);
diff --git a/drivers/platform/msm/ipa/ipa_i.h b/drivers/platform/msm/ipa/ipa_i.h
index 790898a..3994cc8 100644
--- a/drivers/platform/msm/ipa/ipa_i.h
+++ b/drivers/platform/msm/ipa/ipa_i.h
@@ -119,7 +119,6 @@
#define IPA_DFLT_HDR_NAME "ipa_excp_hdr"
#define IPA_INVALID_L4_PROTOCOL 0xFF
-
#define IPA_CLIENT_IS_PROD(x) (x >= IPA_CLIENT_PROD && x < IPA_CLIENT_CONS)
#define IPA_CLIENT_IS_CONS(x) (x >= IPA_CLIENT_CONS && x < IPA_CLIENT_MAX)
#define IPA_SETFIELD(val, shift, mask) (((val) << (shift)) & (mask))
@@ -364,9 +363,6 @@
bool desc_fifo_client_allocated;
bool data_fifo_client_allocated;
bool suspended;
- unsigned int pull_len;
- struct ipa_ip_packet_init *cmd;
- dma_addr_t dma_addr;
};
/**
@@ -382,7 +378,6 @@
struct ipa_sys_context {
struct list_head head_desc_list;
u32 len;
- u32 max_len;
spinlock_t spinlock;
struct sps_register_event event;
struct ipa_ep_context *ep;
@@ -641,6 +636,8 @@
struct kmem_cache *hdr_cache;
struct kmem_cache *hdr_offset_cache;
struct kmem_cache *rt_tbl_cache;
+ struct kmem_cache *tx_pkt_wrapper_cache;
+ struct kmem_cache *rx_pkt_wrapper_cache;
struct kmem_cache *tree_node_cache;
unsigned long rt_idx_bitmap[IPA_IP_MAX];
struct mutex lock;
@@ -652,7 +649,6 @@
struct rb_root rt_rule_hdl_tree;
struct rb_root rt_tbl_hdl_tree;
struct rb_root flt_rule_hdl_tree;
- struct rb_root tag_tree;
struct ipa_nat_mem nat_mem;
u32 excp_hdr_hdl;
u32 dflt_v4_rt_rule_hdl;
@@ -687,7 +683,6 @@
/* featurize if memory footprint becomes a concern */
struct ipa_stats stats;
void *smem_pipe_mem;
- struct sk_buff_head rx_list;
};
/**
@@ -776,6 +771,8 @@
u32 *consumer_handle);
int ipa_send_one(struct ipa_sys_context *sys, struct ipa_desc *desc,
bool in_atomic);
+int ipa_send(struct ipa_sys_context *sys, u32 num_desc, struct ipa_desc *desc,
+ bool in_atomic);
int ipa_get_ep_mapping(enum ipa_operating_mode mode,
enum ipa_client_type client);
int ipa_get_client_mapping(enum ipa_operating_mode mode, int pipe_idx);
diff --git a/drivers/platform/msm/ipa/ipa_ram_mmap.h b/drivers/platform/msm/ipa/ipa_ram_mmap.h
index 78093b8..20eb52a 100644
--- a/drivers/platform/msm/ipa/ipa_ram_mmap.h
+++ b/drivers/platform/msm/ipa/ipa_ram_mmap.h
@@ -21,16 +21,19 @@
#define IPA_RAM_NAT_OFST 0
#define IPA_RAM_NAT_SIZE 0
#define IPA_RAM_HDR_OFST (IPA_RAM_NAT_OFST + IPA_RAM_NAT_SIZE)
-#define IPA_RAM_HDR_SIZE 1280
+#define IPA_RAM_HDR_SIZE 1664
#define IPA_RAM_V4_FLT_OFST (IPA_RAM_HDR_OFST + IPA_RAM_HDR_SIZE)
-#define IPA_RAM_V4_FLT_SIZE 1408
+#define IPA_RAM_V4_FLT_SIZE 2176
#define IPA_RAM_V4_RT_OFST (IPA_RAM_V4_FLT_OFST + IPA_RAM_V4_FLT_SIZE)
-#define IPA_RAM_V4_RT_SIZE 2176
+#define IPA_RAM_V4_RT_SIZE 512
#define IPA_RAM_V6_FLT_OFST (IPA_RAM_V4_RT_OFST + IPA_RAM_V4_RT_SIZE)
-#define IPA_RAM_V6_FLT_SIZE 1280
+#define IPA_RAM_V6_FLT_SIZE 1792
#define IPA_RAM_V6_RT_OFST (IPA_RAM_V6_FLT_OFST + IPA_RAM_V6_FLT_SIZE)
#define IPA_RAM_V6_RT_SIZE 512
#define IPA_RAM_END_OFST (IPA_RAM_V6_RT_OFST + IPA_RAM_V6_RT_SIZE)
+
#define IPA_RAM_V6_RT_SIZE_DDR 16384
+#define IPA_RAM_V4_RT_SIZE_DDR 16384
#endif /* _IPA_RAM_MMAP_H_ */
+
diff --git a/drivers/platform/msm/ipa/ipa_rm.c b/drivers/platform/msm/ipa/ipa_rm.c
index e057c5a..64c77a0 100644
--- a/drivers/platform/msm/ipa/ipa_rm.c
+++ b/drivers/platform/msm/ipa/ipa_rm.c
@@ -119,12 +119,12 @@
{
int result;
- read_lock(&ipa_rm_ctx->lock);
+ write_lock(&ipa_rm_ctx->lock);
result = ipa_rm_dep_graph_add_dependency(
ipa_rm_ctx->dep_graph,
resource_name,
depends_on_name);
- read_unlock(&ipa_rm_ctx->lock);
+ write_unlock(&ipa_rm_ctx->lock);
return result;
}
EXPORT_SYMBOL(ipa_rm_add_dependency);
@@ -145,12 +145,12 @@
enum ipa_rm_resource_name depends_on_name)
{
int result;
- read_lock(&ipa_rm_ctx->lock);
+ write_lock(&ipa_rm_ctx->lock);
result = ipa_rm_dep_graph_delete_dependency(
ipa_rm_ctx->dep_graph,
resource_name,
depends_on_name);
- read_unlock(&ipa_rm_ctx->lock);
+ write_unlock(&ipa_rm_ctx->lock);
return result;
}
EXPORT_SYMBOL(ipa_rm_delete_dependency);
diff --git a/drivers/platform/msm/ipa/ipa_rm_resource.c b/drivers/platform/msm/ipa/ipa_rm_resource.c
index 7142dc7..dba4430 100644
--- a/drivers/platform/msm/ipa/ipa_rm_resource.c
+++ b/drivers/platform/msm/ipa/ipa_rm_resource.c
@@ -720,6 +720,7 @@
producer->resource.name,
IPA_RM_RESOURCE_GRANTED,
true);
+ result = 0;
}
unlock_and_bail:
spin_unlock_irqrestore(&producer->resource.state_lock, flags);
diff --git a/drivers/platform/msm/ipa/ipa_rt.c b/drivers/platform/msm/ipa/ipa_rt.c
index 6430c07..8c0adbd 100644
--- a/drivers/platform/msm/ipa/ipa_rt.c
+++ b/drivers/platform/msm/ipa/ipa_rt.c
@@ -67,13 +67,31 @@
}
rule_hdr->u.hdr.pipe_dest_idx = pipe_idx;
rule_hdr->u.hdr.system = !ipa_ctx->hdr_tbl_lcl;
- if (entry->hdr)
+ if (entry->hdr) {
rule_hdr->u.hdr.hdr_offset =
entry->hdr->offset_entry->offset >> 2;
- else
+ } else {
rule_hdr->u.hdr.hdr_offset = 0;
-
+ }
buf += sizeof(struct ipa_rt_rule_hw_hdr);
+ if ((ip == IPA_IP_v4) &&
+ (entry->rule.attrib.attrib_mask & IPA_FLT_TOS)) {
+ entry->rule.attrib.tos_value =
+ (entry->rule.attrib.u.v4.tos << 5);
+ entry->rule.attrib.tos_mask = 0xe0;
+ entry->rule.attrib.attrib_mask &= ~IPA_FLT_TOS;
+ entry->rule.attrib.attrib_mask |= IPA_FLT_TOS_MASKED;
+ }
+
+ if ((ip == IPA_IP_v6) &&
+ (entry->rule.attrib.attrib_mask & IPA_FLT_TC)) {
+ entry->rule.attrib.tos_value =
+ (entry->rule.attrib.u.v6.tc << 5);
+ entry->rule.attrib.tos_mask = 0xe0;
+ entry->rule.attrib.attrib_mask &= ~IPA_FLT_TC;
+ entry->rule.attrib.attrib_mask |= IPA_FLT_TOS_MASKED;
+ }
+
if (ipa_generate_hw_rule(ip, &rule->attrib, &buf, &en_rule)) {
IPAERR("fail to generate hw rule\n");
return -EPERM;
@@ -359,7 +377,8 @@
}
if (ip == IPA_IP_v4) {
- avail = IPA_RAM_V4_RT_SIZE;
+ avail = ipa_ctx->ip4_rt_tbl_lcl ? IPA_RAM_V4_RT_SIZE :
+ IPA_RAM_V4_RT_SIZE_DDR;
size = sizeof(struct ipa_ip_v4_routing_init);
} else {
avail = ipa_ctx->ip6_rt_tbl_lcl ? IPA_RAM_V6_RT_SIZE :
diff --git a/drivers/platform/msm/ipa/ipa_utils.c b/drivers/platform/msm/ipa/ipa_utils.c
index 912d93c..b1e2d93 100644
--- a/drivers/platform/msm/ipa/ipa_utils.c
+++ b/drivers/platform/msm/ipa/ipa_utils.c
@@ -32,24 +32,6 @@
{ 19, -1, -1, -1, -1, 11, 15, 8, 6, 2, 1, 5, 14, 16, 17, 18, -1, 10, 9, 7, 3, 4 },
};
-static unsigned int ipa_calc_pull_len(u32 hdr_len)
-{
- unsigned int pull_len, padding;
-
- pull_len = sizeof(struct ipa_a5_mux_hdr);
-
- /*
- * IP packet starts on word boundary
- * remove the MUX header and any padding and pass the frame to
- * the client which registered a rx callback on the "src pipe"
- */
- padding = hdr_len & 0x3;
- if (padding)
- pull_len += 4 - padding;
-
- return pull_len;
-}
-
/**
* ipa_cfg_route() - configure IPA route
* @route: IPA route
@@ -64,6 +46,7 @@
if (ipa_ctx->ipa_hw_type != IPA_HW_v1_0)
ipa_route_offset = IPA_ROUTE_OFST_v2;
+ ipa_inc_client_enable_clks();
ipa_write_reg(ipa_ctx->mmio, ipa_route_offset,
IPA_SETFIELD(route->route_dis,
IPA_ROUTE_ROUTE_DIS_SHFT,
@@ -77,6 +60,7 @@
IPA_SETFIELD(route->route_def_hdr_ofst,
IPA_ROUTE_ROUTE_DEF_HDR_OFST_SHFT,
IPA_ROUTE_ROUTE_DEF_HDR_OFST_BMSK));
+ ipa_dec_client_disable_clks();
return 0;
}
@@ -93,10 +77,12 @@
if (ipa_ctx->ipa_hw_type != IPA_HW_v1_0)
ipa_filter_ofst = IPA_FILTER_OFST_v2;
+ ipa_inc_client_enable_clks();
ipa_write_reg(ipa_ctx->mmio, ipa_filter_ofst,
IPA_SETFIELD(!disable,
IPA_FILTER_FILTER_EN_SHFT,
IPA_FILTER_FILTER_EN_BMSK));
+ ipa_dec_client_disable_clks();
return 0;
}
@@ -255,6 +241,20 @@
*buf = ipa_pad_to_32(*buf);
}
+ if (attrib->attrib_mask & IPA_FLT_TOS_MASKED) {
+ if (ipa_ofst_meq32[ofst_meq32] == -1) {
+ IPAERR("ran out of meq32 eq\n");
+ return -EPERM;
+ }
+ *en_rule |= ipa_ofst_meq32[ofst_meq32];
+ /* 0 => offset of TOS in v4 header */
+ *buf = ipa_write_8(0, *buf);
+ *buf = ipa_write_32((attrib->tos_mask << 16), *buf);
+ *buf = ipa_write_32(attrib->tos_value, *buf);
+ *buf = ipa_pad_to_32(*buf);
+ ofst_meq32++;
+ }
+
if (attrib->attrib_mask & IPA_FLT_PROTOCOL) {
*en_rule |= IPA_PROTOCOL_EQ;
*buf = ipa_write_8(attrib->u.v4.protocol, *buf);
@@ -586,6 +586,20 @@
*buf = ipa_pad_to_32(*buf);
}
+ if (attrib->attrib_mask & IPA_FLT_TOS_MASKED) {
+ if (ipa_ofst_meq32[ofst_meq32] == -1) {
+ IPAERR("ran out of meq32 eq\n");
+ return -EPERM;
+ }
+ *en_rule |= ipa_ofst_meq32[ofst_meq32];
+ /* 0 => offset of TOS in v4 header */
+ *buf = ipa_write_8(0, *buf);
+ *buf = ipa_write_32((attrib->tos_mask << 20), *buf);
+ *buf = ipa_write_32(attrib->tos_value, *buf);
+ *buf = ipa_pad_to_32(*buf);
+ ofst_meq32++;
+ }
+
if (attrib->attrib_mask & IPA_FLT_FLOW_LABEL) {
*en_rule |= IPA_FLT_FLOW_LABEL;
/* FIXME FL is only 20 bits */
@@ -697,6 +711,7 @@
}
/* copy over EP cfg */
ipa_ctx->ep[clnt_hdl].cfg.nat = *ipa_ep_cfg;
+ ipa_inc_client_enable_clks();
/* clnt_hdl is used as pipe_index */
if (ipa_ctx->ipa_hw_type == IPA_HW_v1_0)
ipa_write_reg(ipa_ctx->mmio,
@@ -710,6 +725,7 @@
IPA_SETFIELD(ipa_ctx->ep[clnt_hdl].cfg.nat.nat_en,
IPA_ENDP_INIT_NAT_n_NAT_EN_SHFT,
IPA_ENDP_INIT_NAT_n_NAT_EN_BMSK));
+ ipa_dec_client_disable_clks();
return 0;
}
@@ -762,15 +778,14 @@
IPA_ENDP_INIT_HDR_n_HDR_A5_MUX_SHFT,
IPA_ENDP_INIT_HDR_n_HDR_A5_MUX_BMSK);
+ ipa_inc_client_enable_clks();
if (ipa_ctx->ipa_hw_type == IPA_HW_v1_0)
ipa_write_reg(ipa_ctx->mmio,
IPA_ENDP_INIT_HDR_n_OFST_v1(clnt_hdl), val);
else
ipa_write_reg(ipa_ctx->mmio,
IPA_ENDP_INIT_HDR_n_OFST_v2(clnt_hdl), val);
-
- if (IPA_CLIENT_IS_PROD(ep->client))
- ep->pull_len = ipa_calc_pull_len(ipa_ep_cfg->hdr_len);
+ ipa_dec_client_disable_clks();
return 0;
}
@@ -819,12 +834,14 @@
IPA_ENDP_INIT_MODE_n_DEST_PIPE_INDEX_SHFT,
IPA_ENDP_INIT_MODE_n_DEST_PIPE_INDEX_BMSK);
+ ipa_inc_client_enable_clks();
if (ipa_ctx->ipa_hw_type == IPA_HW_v1_0)
ipa_write_reg(ipa_ctx->mmio,
IPA_ENDP_INIT_MODE_n_OFST_v1(clnt_hdl), val);
else
ipa_write_reg(ipa_ctx->mmio,
IPA_ENDP_INIT_MODE_n_OFST_v2(clnt_hdl), val);
+ ipa_dec_client_disable_clks();
return 0;
}
@@ -864,12 +881,14 @@
IPA_ENDP_INIT_AGGR_n_AGGR_TIME_LIMIT_SHFT,
IPA_ENDP_INIT_AGGR_n_AGGR_TIME_LIMIT_BMSK);
+ ipa_inc_client_enable_clks();
if (ipa_ctx->ipa_hw_type == IPA_HW_v1_0)
ipa_write_reg(ipa_ctx->mmio,
IPA_ENDP_INIT_AGGR_n_OFST_v1(clnt_hdl), val);
else
ipa_write_reg(ipa_ctx->mmio,
IPA_ENDP_INIT_AGGR_n_OFST_v2(clnt_hdl), val);
+ ipa_dec_client_disable_clks();
return 0;
}
@@ -912,6 +931,7 @@
/* always use the "default" routing tables whose indices are 0 */
ipa_ctx->ep[clnt_hdl].rt_tbl_idx = 0;
+ ipa_inc_client_enable_clks();
if (ipa_ctx->ipa_hw_type == IPA_HW_v1_0) {
ipa_write_reg(ipa_ctx->mmio,
IPA_ENDP_INIT_ROUTE_n_OFST_v1(clnt_hdl),
@@ -925,6 +945,7 @@
IPA_ENDP_INIT_ROUTE_n_ROUTE_TABLE_INDEX_SHFT,
IPA_ENDP_INIT_ROUTE_n_ROUTE_TABLE_INDEX_BMSK));
}
+ ipa_dec_client_disable_clks();
return 0;
}
@@ -963,12 +984,14 @@
return -EPERM;
} else {
ipa_ctx->ep[clnt_hdl].holb = *ipa_ep_cfg;
+ ipa_inc_client_enable_clks();
ipa_write_reg(ipa_ctx->mmio,
IPA_ENDP_INIT_HOL_BLOCK_EN_n_OFST(clnt_hdl),
ipa_ep_cfg->en);
ipa_write_reg(ipa_ctx->mmio,
IPA_ENDP_INIT_HOL_BLOCK_TIMER_n_OFST(clnt_hdl),
ipa_ep_cfg->tmr_val);
+ ipa_dec_client_disable_clks();
IPAERR("cfg holb %u ep=%d tmr=%d\n", ipa_ep_cfg->en, clnt_hdl,
ipa_ep_cfg->tmr_val);
}
@@ -1222,6 +1245,7 @@
{
u32 reg_val;
+ ipa_inc_client_enable_clks();
if (ipa_ctx->ipa_hw_type == IPA_HW_v1_0) {
reg_val = ipa_read_reg(ipa_ctx->mmio,
IPA_AGGREGATION_SPARE_REG_2_OFST);
@@ -1236,6 +1260,7 @@
(reg_val & 0xfffffffe));
}
+ ipa_dec_client_disable_clks();
return 0;
}
EXPORT_SYMBOL(ipa_set_aggr_mode);
@@ -1255,11 +1280,12 @@
{
u32 reg_val;
+ if (sig == NULL) {
+ IPAERR("bad argument for ipa_set_qcncm_ndp_sig/n");
+ return -EINVAL;
+ }
+ ipa_inc_client_enable_clks();
if (ipa_ctx->ipa_hw_type == IPA_HW_v1_0) {
- if (sig == NULL) {
- IPAERR("bad argument for ipa_set_qcncm_ndp_sig/n");
- return -EINVAL;
- }
reg_val = ipa_read_reg(ipa_ctx->mmio,
IPA_AGGREGATION_SPARE_REG_2_OFST);
ipa_write_reg(ipa_ctx->mmio,
@@ -1274,6 +1300,7 @@
(sig[1] << 12) | (sig[2] << 4) |
(reg_val & 0xf000000f));
}
+ ipa_dec_client_disable_clks();
return 0;
}
EXPORT_SYMBOL(ipa_set_qcncm_ndp_sig);
@@ -1289,6 +1316,7 @@
{
u32 reg_val;
+ ipa_inc_client_enable_clks();
if (ipa_ctx->ipa_hw_type == IPA_HW_v1_0) {
reg_val = ipa_read_reg(ipa_ctx->mmio,
IPA_AGGREGATION_SPARE_REG_1_OFST);
@@ -1301,6 +1329,7 @@
ipa_write_reg(ipa_ctx->mmio, IPA_SINGLE_NDP_MODE_OFST,
(enable & 0x1) | (reg_val & 0xfffffffe));
}
+ ipa_dec_client_disable_clks();
return 0;
}
EXPORT_SYMBOL(ipa_set_single_ndp_per_mbim);
@@ -1315,10 +1344,12 @@
int ipa_set_hw_timer_fix_for_mbim_aggr(bool enable)
{
u32 reg_val;
+ ipa_inc_client_enable_clks();
reg_val = ipa_read_reg(ipa_ctx->mmio, IPA_AGGREGATION_SPARE_REG_1_OFST);
ipa_write_reg(ipa_ctx->mmio, IPA_AGGREGATION_SPARE_REG_1_OFST,
(enable << IPA_AGGREGATION_HW_TIMER_FIX_MBIM_AGGR_SHFT) |
(reg_val & ~IPA_AGGREGATION_HW_TIMER_FIX_MBIM_AGGR_BMSK));
+ ipa_dec_client_disable_clks();
return 0;
}
EXPORT_SYMBOL(ipa_set_hw_timer_fix_for_mbim_aggr);
diff --git a/drivers/platform/msm/qpnp-power-on.c b/drivers/platform/msm/qpnp-power-on.c
index ac0b1d9..087cfa8 100644
--- a/drivers/platform/msm/qpnp-power-on.c
+++ b/drivers/platform/msm/qpnp-power-on.c
@@ -38,12 +38,19 @@
#define QPNP_PON_KPDPWR_S1_TIMER(base) (base + 0x40)
#define QPNP_PON_KPDPWR_S2_TIMER(base) (base + 0x41)
#define QPNP_PON_KPDPWR_S2_CNTL(base) (base + 0x42)
+#define QPNP_PON_KPDPWR_S2_CNTL2(base) (base + 0x43)
#define QPNP_PON_RESIN_S1_TIMER(base) (base + 0x44)
#define QPNP_PON_RESIN_S2_TIMER(base) (base + 0x45)
#define QPNP_PON_RESIN_S2_CNTL(base) (base + 0x46)
+#define QPNP_PON_RESIN_S2_CNTL2(base) (base + 0x47)
+#define QPNP_PON_KPDPWR_RESIN_S1_TIMER(base) (base + 0x48)
+#define QPNP_PON_KPDPWR_RESIN_S2_TIMER(base) (base + 0x49)
+#define QPNP_PON_KPDPWR_RESIN_S2_CNTL(base) (base + 0x4A)
+#define QPNP_PON_KPDPWR_RESIN_S2_CNTL2(base) (base + 0x4B)
#define QPNP_PON_PS_HOLD_RST_CTL(base) (base + 0x5A)
#define QPNP_PON_PS_HOLD_RST_CTL2(base) (base + 0x5B)
#define QPNP_PON_TRIGGER_EN(base) (base + 0x80)
+#define QPNP_PON_S3_DBC_CTL(base) (base + 0x75)
#define QPNP_PON_WARM_RESET_TFT BIT(4)
@@ -63,6 +70,7 @@
#define QPNP_PON_RESIN_N_SET BIT(1)
#define QPNP_PON_CBLPWR_N_SET BIT(2)
#define QPNP_PON_RESIN_BARK_N_SET BIT(4)
+#define QPNP_PON_KPDPWR_RESIN_BARK_N_SET BIT(5)
#define QPNP_PON_RESET_EN BIT(7)
#define QPNP_PON_WARM_RESET BIT(0)
@@ -71,15 +79,19 @@
/* Ranges */
#define QPNP_PON_S1_TIMER_MAX 10256
#define QPNP_PON_S2_TIMER_MAX 2000
+#define QPNP_PON_S3_TIMER_SECS_MAX 128
+#define QPNP_PON_S3_DBC_DELAY_MASK 0x07
#define QPNP_PON_RESET_TYPE_MAX 0xF
#define PON_S1_COUNT_MAX 0xF
#define QPNP_KEY_STATUS_DELAY msecs_to_jiffies(250)
+#define QPNP_PON_REV_B 0x01
enum pon_type {
PON_KPDPWR,
PON_RESIN,
PON_CBLPWR,
+ PON_KPDPWR_RESIN,
};
struct qpnp_pon_config {
@@ -92,6 +104,8 @@
u32 pull_up;
u32 state_irq;
u32 bark_irq;
+ u16 s2_cntl_addr;
+ u16 s2_cntl2_addr;
};
struct qpnp_pon {
@@ -320,6 +334,9 @@
case PON_CBLPWR:
pon_rt_bit = QPNP_PON_CBLPWR_N_SET;
break;
+ case PON_KPDPWR_RESIN:
+ pon_rt_bit = QPNP_PON_KPDPWR_RESIN_BARK_N_SET;
+ break;
default:
return -EINVAL;
}
@@ -359,6 +376,11 @@
return IRQ_HANDLED;
}
+static irqreturn_t qpnp_kpdpwr_resin_bark_irq(int irq, void *_pon)
+{
+ return IRQ_HANDLED;
+}
+
static irqreturn_t qpnp_cblpwr_irq(int irq, void *_pon)
{
int rc;
@@ -379,8 +401,14 @@
struct qpnp_pon *pon =
container_of(work, struct qpnp_pon, bark_work.work);
+ cfg = qpnp_get_cfg(pon, PON_RESIN);
+ if (!cfg) {
+ dev_err(&pon->spmi->dev, "Invalid config pointer\n");
+ goto err_return;
+ }
+
/* enable reset */
- rc = qpnp_pon_masked_write(pon, QPNP_PON_RESIN_S2_CNTL(pon->base),
+ rc = qpnp_pon_masked_write(pon, cfg->s2_cntl2_addr,
QPNP_PON_S2_CNTL_EN, QPNP_PON_S2_CNTL_EN);
if (rc) {
dev_err(&pon->spmi->dev, "Unable to configure S2 enable\n");
@@ -397,19 +425,13 @@
}
if (!(pon_rt_sts & QPNP_PON_RESIN_BARK_N_SET)) {
- cfg = qpnp_get_cfg(pon, PON_RESIN);
- if (!cfg) {
- dev_err(&pon->spmi->dev, "Invalid config pointer\n");
- goto err_return;
- }
/* report the key event and enable the bark IRQ */
input_report_key(pon->pon_input, cfg->key_code, 0);
input_sync(pon->pon_input);
enable_irq(cfg->bark_irq);
} else {
/* disable reset */
- rc = qpnp_pon_masked_write(pon,
- QPNP_PON_RESIN_S2_CNTL(pon->base),
+ rc = qpnp_pon_masked_write(pon, cfg->s2_cntl2_addr,
QPNP_PON_S2_CNTL_EN, 0);
if (rc) {
dev_err(&pon->spmi->dev,
@@ -433,20 +455,20 @@
/* disable the bark interrupt */
disable_irq_nosync(irq);
- /* disable reset */
- rc = qpnp_pon_masked_write(pon, QPNP_PON_RESIN_S2_CNTL(pon->base),
- QPNP_PON_S2_CNTL_EN, 0);
- if (rc) {
- dev_err(&pon->spmi->dev, "Unable to configure S2 enable\n");
- goto err_exit;
- }
-
cfg = qpnp_get_cfg(pon, PON_RESIN);
if (!cfg) {
dev_err(&pon->spmi->dev, "Invalid config pointer\n");
goto err_exit;
}
+ /* disable reset */
+ rc = qpnp_pon_masked_write(pon, cfg->s2_cntl2_addr,
+ QPNP_PON_S2_CNTL_EN, 0);
+ if (rc) {
+ dev_err(&pon->spmi->dev, "Unable to configure S2 enable\n");
+ goto err_exit;
+ }
+
/* report the key event */
input_report_key(pon->pon_input, cfg->key_code, 1);
input_sync(pon->pon_input);
@@ -472,6 +494,9 @@
case PON_CBLPWR:
pull_bit = QPNP_PON_CBLPWR_PULL_UP;
break;
+ case PON_KPDPWR_RESIN:
+ pull_bit = QPNP_PON_KPDPWR_PULL_UP | QPNP_PON_RESIN_PULL_UP;
+ break;
default:
return -EINVAL;
}
@@ -489,24 +514,26 @@
{
int rc;
u8 i;
- u16 s1_timer_addr, s2_cntl_addr, s2_timer_addr;
+ u16 s1_timer_addr, s2_timer_addr;
switch (cfg->pon_type) {
case PON_KPDPWR:
s1_timer_addr = QPNP_PON_KPDPWR_S1_TIMER(pon->base);
s2_timer_addr = QPNP_PON_KPDPWR_S2_TIMER(pon->base);
- s2_cntl_addr = QPNP_PON_KPDPWR_S2_CNTL(pon->base);
break;
case PON_RESIN:
s1_timer_addr = QPNP_PON_RESIN_S1_TIMER(pon->base);
s2_timer_addr = QPNP_PON_RESIN_S2_TIMER(pon->base);
- s2_cntl_addr = QPNP_PON_RESIN_S2_CNTL(pon->base);
+ break;
+ case PON_KPDPWR_RESIN:
+ s1_timer_addr = QPNP_PON_KPDPWR_RESIN_S1_TIMER(pon->base);
+ s2_timer_addr = QPNP_PON_KPDPWR_RESIN_S2_TIMER(pon->base);
break;
default:
return -EINVAL;
}
/* disable S2 reset */
- rc = qpnp_pon_masked_write(pon, s2_cntl_addr,
+ rc = qpnp_pon_masked_write(pon, cfg->s2_cntl2_addr,
QPNP_PON_S2_CNTL_EN, 0);
if (rc) {
dev_err(&pon->spmi->dev, "Unable to configure S2 enable\n");
@@ -540,7 +567,7 @@
return rc;
}
- rc = qpnp_pon_masked_write(pon, s2_cntl_addr,
+ rc = qpnp_pon_masked_write(pon, cfg->s2_cntl_addr,
QPNP_PON_S2_CNTL_TYPE_MASK, (u8)cfg->s2_type);
if (rc) {
dev_err(&pon->spmi->dev, "Unable to configure S2 reset type\n");
@@ -548,7 +575,7 @@
}
/* enable S2 reset */
- rc = qpnp_pon_masked_write(pon, s2_cntl_addr,
+ rc = qpnp_pon_masked_write(pon, cfg->s2_cntl2_addr,
QPNP_PON_S2_CNTL_EN, QPNP_PON_S2_CNTL_EN);
if (rc) {
dev_err(&pon->spmi->dev, "Unable to configure S2 enable\n");
@@ -621,6 +648,20 @@
return rc;
}
break;
+ case PON_KPDPWR_RESIN:
+ if (cfg->support_reset) {
+ rc = devm_request_irq(&pon->spmi->dev, cfg->bark_irq,
+ qpnp_kpdpwr_resin_bark_irq,
+ IRQF_TRIGGER_RISING,
+ "qpnp_kpdpwr_resin_bark", pon);
+ if (rc < 0) {
+ dev_err(&pon->spmi->dev,
+ "Can't request %d IRQ\n",
+ cfg->bark_irq);
+ return rc;
+ }
+ }
+ break;
default:
return -EINVAL;
}
@@ -660,6 +701,17 @@
int rc = 0, i = 0;
struct device_node *pp = NULL;
struct qpnp_pon_config *cfg;
+ u8 pon_ver;
+
+ /* Check if it is rev B */
+ rc = spmi_ext_register_readl(pon->spmi->ctrl, pon->spmi->sid,
+ QPNP_PON_REVISION2(pon->base), &pon_ver, 1);
+ if (rc) {
+ dev_err(&pon->spmi->dev,
+ "Unable to read addr=%x, rc(%d)\n",
+ QPNP_PON_REVISION2(pon->base), rc);
+ return rc;
+ }
/* iterate through the list of pon configs */
while ((pp = of_get_next_child(pon->spmi->dev.of_node, pp))) {
@@ -699,6 +751,17 @@
return cfg->bark_irq;
}
}
+
+ if (pon_ver == QPNP_PON_REV_B) {
+ cfg->s2_cntl_addr =
+ QPNP_PON_KPDPWR_S2_CNTL(pon->base);
+ cfg->s2_cntl2_addr =
+ QPNP_PON_KPDPWR_S2_CNTL2(pon->base);
+ } else {
+ cfg->s2_cntl_addr = cfg->s2_cntl2_addr =
+ QPNP_PON_KPDPWR_S2_CNTL(pon->base);
+ }
+
break;
case PON_RESIN:
cfg->state_irq = spmi_get_irq_byname(pon->spmi,
@@ -726,6 +789,17 @@
return cfg->bark_irq;
}
}
+
+ if (pon_ver == QPNP_PON_REV_B) {
+ cfg->s2_cntl_addr =
+ QPNP_PON_RESIN_S2_CNTL(pon->base);
+ cfg->s2_cntl2_addr =
+ QPNP_PON_RESIN_S2_CNTL2(pon->base);
+ } else {
+ cfg->s2_cntl_addr = cfg->s2_cntl2_addr =
+ QPNP_PON_RESIN_S2_CNTL(pon->base);
+ }
+
break;
case PON_CBLPWR:
cfg->state_irq = spmi_get_irq_byname(pon->spmi,
@@ -736,6 +810,36 @@
return rc;
}
break;
+ case PON_KPDPWR_RESIN:
+ rc = of_property_read_u32(pp, "qcom,support-reset",
+ &cfg->support_reset);
+ if (rc && rc != -EINVAL) {
+ dev_err(&pon->spmi->dev,
+ "Unable to read 'support-reset'\n");
+ return rc;
+ }
+
+ if (cfg->support_reset) {
+ cfg->bark_irq = spmi_get_irq_byname(pon->spmi,
+ NULL, "kpdpwr-resin-bark");
+ if (cfg->bark_irq < 0) {
+ dev_err(&pon->spmi->dev,
+ "Unable to get kpdpwr-resin-bark irq\n");
+ return cfg->bark_irq;
+ }
+ }
+
+ if (pon_ver == QPNP_PON_REV_B) {
+ cfg->s2_cntl_addr =
+ QPNP_PON_KPDPWR_RESIN_S2_CNTL(pon->base);
+ cfg->s2_cntl2_addr =
+ QPNP_PON_KPDPWR_RESIN_S2_CNTL2(pon->base);
+ } else {
+ cfg->s2_cntl_addr = cfg->s2_cntl2_addr =
+ QPNP_PON_KPDPWR_RESIN_S2_CNTL(pon->base);
+ }
+
+ break;
default:
dev_err(&pon->spmi->dev, "PON RESET %d not supported",
cfg->pon_type);
@@ -783,13 +887,14 @@
"Incorrect reset type specified\n");
return -EINVAL;
}
+
}
/*
* Get the standard-key parameters. This might not be
* specified if there is no key mapping on the reset line.
*/
rc = of_property_read_u32(pp, "linux,code", &cfg->key_code);
- if (rc && rc == -EINVAL) {
+ if (rc && rc != -EINVAL) {
dev_err(&pon->spmi->dev,
"Unable to read key-code\n");
return rc;
@@ -860,7 +965,7 @@
struct qpnp_pon *pon;
struct resource *pon_resource;
struct device_node *itr = NULL;
- u32 delay = 0;
+ u32 delay = 0, s3_debounce = 0;
int rc, sys_reset;
pon = devm_kzalloc(&spmi->dev, sizeof(struct qpnp_pon),
@@ -920,6 +1025,32 @@
}
}
+ /* program s3 debounce */
+ rc = of_property_read_u32(pon->spmi->dev.of_node,
+ "qcom,s3-debounce", &s3_debounce);
+ if (rc) {
+ if (rc != -EINVAL) {
+ dev_err(&pon->spmi->dev, "Unable to read s3 timer\n");
+ return rc;
+ }
+ } else {
+ if (s3_debounce > QPNP_PON_S3_TIMER_SECS_MAX) {
+ dev_info(&pon->spmi->dev,
+ "Exceeded S3 max value, set it to max\n");
+ s3_debounce = QPNP_PON_S3_TIMER_SECS_MAX;
+ }
+
+ /* 0 is a special value to indicate instant s3 reset */
+ if (s3_debounce != 0)
+ s3_debounce = ilog2(s3_debounce);
+ rc = qpnp_pon_masked_write(pon, QPNP_PON_S3_DBC_CTL(pon->base),
+ QPNP_PON_S3_DBC_DELAY_MASK, s3_debounce);
+ if (rc) {
+ dev_err(&spmi->dev, "Unable to set S3 debounce\n");
+ return rc;
+ }
+ }
+
dev_set_drvdata(&spmi->dev, pon);
INIT_DELAYED_WORK(&pon->bark_work, bark_work_func);
diff --git a/drivers/platform/msm/qpnp-pwm.c b/drivers/platform/msm/qpnp-pwm.c
index be62408..4e94b90 100644
--- a/drivers/platform/msm/qpnp-pwm.c
+++ b/drivers/platform/msm/qpnp-pwm.c
@@ -858,7 +858,7 @@
struct qpnp_lpg_chip *chip = pwm->chip;
u8 value1, value2, mask1, mask2;
u8 *reg1, *reg2;
- u16 addr;
+ u16 addr, addr1;
int rc;
value1 = pwm->chip->qpnp_lpg_registers[QPNP_RAMP_CONTROL];
@@ -878,7 +878,7 @@
value2 = QPNP_DISABLE_LPG_MODE;
}
mask1 = QPNP_RAMP_START_MASK;
- addr = SPMI_LPG_REG_ADDR(lpg_config->base_addr,
+ addr1 = SPMI_LPG_REG_ADDR(lpg_config->base_addr,
QPNP_RAMP_CONTROL);
break;
case QPNP_LPG_REVISION_1:
@@ -889,8 +889,8 @@
QPNP_DISABLE_LUT_V1(value1, pwm->pwm_config.channel_id);
value2 = QPNP_DISABLE_LPG_MODE;
}
- mask1 = BIT(pwm->pwm_config.channel_id);
- addr = lpg_config->lut_base_addr +
+ mask1 = value1;
+ addr1 = lpg_config->lut_base_addr +
SPMI_LPG_REV1_RAMP_CONTROL_OFFSET;
break;
default:
@@ -898,15 +898,16 @@
return -EINVAL;
}
- rc = qpnp_lpg_save_and_write(value1, mask1, reg1,
+ addr = SPMI_LPG_REG_ADDR(lpg_config->base_addr,
+ QPNP_ENABLE_CONTROL);
+
+ rc = qpnp_lpg_save_and_write(value2, mask2, reg2,
addr, 1, chip);
if (rc)
return rc;
- addr = SPMI_LPG_REG_ADDR(lpg_config->base_addr,
- QPNP_ENABLE_CONTROL);
- return qpnp_lpg_save_and_write(value2, mask2, reg2,
- addr, 1, chip);
+ return qpnp_lpg_save_and_write(value1, mask1, reg1,
+ addr1, 1, chip);
}
#define QPNP_GPLED_LPG_CHANNEL_RANGE_START 8
diff --git a/drivers/platform/msm/qpnp-revid.c b/drivers/platform/msm/qpnp-revid.c
index f218a5a..897dc2a 100644
--- a/drivers/platform/msm/qpnp-revid.c
+++ b/drivers/platform/msm/qpnp-revid.c
@@ -52,17 +52,20 @@
}
#define PM8941_PERIPHERAL_SUBTYPE 0x01
+#define PM8226_PERIPHERAL_SUBTYPE 0x04
static size_t build_pmic_string(char *buf, size_t n, int sid,
u8 subtype, u8 rev1, u8 rev2, u8 rev3, u8 rev4)
{
size_t pos = 0;
/*
- * In early versions of PM8941, the major revision number started
- * incrementing from 0 (eg 0 = v1.0, 1 = v2.0).
+ * In early versions of PM8941 and PM8226, the major revision number
+ * started incrementing from 0 (eg 0 = v1.0, 1 = v2.0).
* Increment the major revision number here if the chip is an early
- * version of PM8941.
+ * version of PM8941 or PM8226.
*/
- if ((int)subtype == PM8941_PERIPHERAL_SUBTYPE && rev4 < 0x02)
+ if (((int)subtype == PM8941_PERIPHERAL_SUBTYPE
+ || (int)subtype == PM8226_PERIPHERAL_SUBTYPE)
+ && rev4 < 0x02)
rev4++;
pos += snprintf(buf + pos, n - pos, "PMIC@SID%d", sid);
diff --git a/drivers/platform/msm/usb_bam.c b/drivers/platform/msm/usb_bam.c
index 6b77609..fae09fc 100644
--- a/drivers/platform/msm/usb_bam.c
+++ b/drivers/platform/msm/usb_bam.c
@@ -94,6 +94,7 @@
u8 pipes_enabled_per_bam[MAX_BAMS];
u32 inactivity_timer_ms[MAX_BAMS];
bool is_bam_inactivity[MAX_BAMS];
+ struct completion reset_done;
};
static char *bam_enable_strings[MAX_BAMS] = {
@@ -152,7 +153,6 @@
bool prod_stopped;
struct completion prod_avail[MAX_BAMS];
- struct completion cons_avail[MAX_BAMS];
struct completion cons_released[MAX_BAMS];
struct completion prod_released[MAX_BAMS];
@@ -171,7 +171,6 @@
static struct usb_bam_ctx_type ctx;
static struct device *hsic_host_dev;
-static bool hsic_host_dev_resumed_from_cons_request;
static int __usb_bam_register_wake_cb(u8 idx, int (*callback)(void *user),
void *param, bool trigger_cb_per_pipe);
@@ -641,7 +640,7 @@
pr_debug("%s: Going to LPM\n", __func__);
spin_lock(&usb_bam_ipa_handshake_info_lock);
info.lpm_wait_handshake[HSUSB_BAM] = false;
- info.lpm_wait_pipes = 0;
+ info.lpm_wait_pipes = 0;
if (disconnect)
pm_runtime_put_noidle(trans->dev);
spin_unlock(&usb_bam_ipa_handshake_info_lock);
@@ -878,7 +877,6 @@
spin_lock(&usb_bam_ipa_handshake_info_lock);
info.cur_cons_state[cur_bam] = IPA_RM_RESOURCE_GRANTED;
- complete_all(&info.cons_avail[cur_bam]);
spin_lock(&usb_bam_lock);
@@ -898,7 +896,6 @@
break;
case HSIC_BAM:
- hsic_host_dev_resumed_from_cons_request = true;
usb_bam_resume_hsic_host();
@@ -968,8 +965,6 @@
(int)hsic_host_dev);
pm_runtime_put(hsic_host_dev);
info.in_lpm[HSIC_BAM] = true;
- /* In case consumer release before resume happned */
- hsic_host_dev_resumed_from_cons_request = false;
}
}
@@ -1027,7 +1022,7 @@
}
}
-static void wait_for_prod_granted(enum usb_bam cur_bam, bool start_cons)
+static void wait_for_prod_granted(enum usb_bam cur_bam)
{
int ret;
@@ -1041,8 +1036,6 @@
__func__);
init_completion(&info.prod_avail[cur_bam]);
- if (start_cons)
- init_completion(&info.cons_avail[cur_bam]);
ret = ipa_rm_request_resource(ipa_rm_resource_prod[cur_bam]);
if (!ret) {
@@ -1059,21 +1052,14 @@
pr_err("%s: ipa_rm_request_resource ret =%d\n", __func__, ret);
}
-void wait_for_cons_granted(enum usb_bam cur_bam)
+void notify_usb_connected(enum usb_bam cur_bam)
{
- pr_debug("%s: Waiting for CONS\n", __func__);
- if (info.cur_cons_state[cur_bam] != IPA_RM_RESOURCE_GRANTED) {
- if (!wait_for_completion_timeout(&info.cons_avail[cur_bam],
- USB_BAM_TIMEOUT))
- pr_err("%s: Timeout wainting for CONS_REQUEST\n",
- __func__);
- pr_err("%s: Finished waiting for CONS\n", __func__);
- }
+ pr_debug("%s: enter\n", __func__);
spin_lock(&usb_bam_ipa_handshake_info_lock);
- info.connect_complete = 1;
+ if (cur_bam == HSUSB_BAM)
+ info.connect_complete = 1;
spin_unlock(&usb_bam_ipa_handshake_info_lock);
- pr_debug("%s: CONS is granted\n", __func__);
if (info.cur_cons_state[HSUSB_BAM] == IPA_RM_RESOURCE_GRANTED) {
pr_debug("%s: Notify CONS_GRANTED\n", __func__);
@@ -1082,20 +1068,6 @@
}
}
-void usb_bam_wait_for_cons_granted(
- struct usb_bam_connect_ipa_params *ipa_params)
-{
- struct usb_bam_pipe_connect *pipe_connect;
- enum usb_bam cur_bam;
- u8 src_idx;
-
- src_idx = ipa_params->src_idx;
- pipe_connect = &usb_bam_connections[src_idx];
- cur_bam = pipe_connect->bam_type;
-
- wait_for_cons_granted(cur_bam);
-}
-
static void wait_for_prod_release(enum usb_bam cur_bam)
{
int ret;
@@ -1272,8 +1244,8 @@
info.lpm_wait_handshake[HSUSB_BAM] = true;
spin_unlock(&usb_bam_ipa_handshake_info_lock);
- wait_for_prod_granted(HSUSB_BAM, true);
- wait_for_cons_granted(HSUSB_BAM);
+ wait_for_prod_granted(HSUSB_BAM);
+ notify_usb_connected(HSUSB_BAM);
if (info.cons_stopped) {
ipa_resume_pipes();
if (info.start) {
@@ -1335,16 +1307,13 @@
void msm_bam_wait_for_hsic_prod_granted(void)
{
- if (hsic_host_dev_resumed_from_cons_request)
- return;
-
ctx.is_bam_inactivity[HSIC_BAM] = false;
/* Get back to resume state including wakeup ipa */
usb_bam_resume_hsic_host();
/* Ensure getting the producer resource */
- wait_for_prod_granted(HSIC_BAM, false);
+ wait_for_prod_granted(HSIC_BAM);
}
void msm_bam_hsic_notify_on_resume(void)
@@ -1355,11 +1324,8 @@
* and clocked on. Therefore we can now set the inactivity
* timer to the hsic bam hw.
*/
- if (ctx.inactivity_timer_ms[HSIC_BAM] &&
- !hsic_host_dev_resumed_from_cons_request)
+ if (ctx.inactivity_timer_ms[HSIC_BAM])
usb_bam_set_inactivity_timer(HSIC_BAM);
-
- hsic_host_dev_resumed_from_cons_request = false;
}
bool msm_bam_hsic_lpm_ok(void)
@@ -1508,7 +1474,7 @@
if (ipa_params->dir == USB_TO_PEER_PERIPHERAL) {
pr_debug("%s: Starting connect sequence\n", __func__);
- wait_for_prod_granted(cur_bam, true);
+ wait_for_prod_granted(cur_bam);
}
ret = connect_pipe_ipa(idx, ipa_params);
@@ -1532,7 +1498,7 @@
ctx.pipes_enabled_per_bam[cur_bam] += 1;
spin_unlock(&usb_bam_lock);
if (ipa_params->dir == PEER_PERIPHERAL_TO_USB && cur_bam == HSUSB_BAM)
- wait_for_cons_granted(cur_bam);
+ notify_usb_connected(cur_bam);
if (cur_bam == HSUSB_BAM)
mutex_unlock(&info.suspend_resume_mutex);
@@ -1554,6 +1520,10 @@
}
peer_handshake_info.client_ready = ready;
+ if (peer_handshake_info.state == USB_BAM_SM_PLUG_ACKED && !ready) {
+ pr_debug("Starting reset sequence");
+ INIT_COMPLETION(ctx.reset_done);
+ }
spin_unlock(&usb_bam_peer_handshake_info_lock);
if (!queue_work(ctx.usb_bam_wq,
@@ -1590,7 +1560,7 @@
if (pipe_connect->peer_bam == IPA_P_BAM &&
pipe_connect->bam_type == HSIC_BAM &&
info.cur_prod_state[HSIC_BAM] != IPA_RM_RESOURCE_GRANTED) {
- wait_for_prod_granted(HSIC_BAM, false);
+ wait_for_prod_granted(HSIC_BAM);
}
/*
@@ -1622,7 +1592,7 @@
if (pipe_connect->bam_type == HSUSB_BAM) {
/* A2 wakeup not from LPM (CONS was up) */
- wait_for_prod_granted(pipe_connect->bam_type, true);
+ wait_for_prod_granted(pipe_connect->bam_type);
if (info.start) {
pr_debug("%s: Enqueue PROD transfer", __func__);
info.start(info.start_stop_param,
@@ -1755,6 +1725,7 @@
case USB_BAM_SM_PLUG_ACKED:
if (!peer_handshake_info.client_ready) {
spin_unlock(&usb_bam_peer_handshake_info_lock);
+ pr_debug("Starting A2 reset sequence");
smsm_change_state(SMSM_APPS_STATE,
SMSM_USB_PLUG_UNPLUG, 0);
spin_lock(&usb_bam_peer_handshake_info_lock);
@@ -1767,6 +1738,8 @@
peer_handshake_info.reset_event.
callback(peer_handshake_info.reset_event.param);
spin_lock(&usb_bam_peer_handshake_info_lock);
+ complete_all(&ctx.reset_done);
+ pr_debug("Finished reset sequence");
peer_handshake_info.state = USB_BAM_SM_INIT;
peer_handshake_info.ack_received = 0;
}
@@ -1962,9 +1935,6 @@
}
pr_debug("%s: Starting disconnect sequence\n", __func__);
- spin_lock(&usb_bam_ipa_handshake_info_lock);
- info.connect_complete = 0;
- spin_unlock(&usb_bam_ipa_handshake_info_lock);
mutex_lock(&info.suspend_resume_mutex);
/* Delay USB core to go into lpm before we finish our handshake */
@@ -1978,9 +1948,12 @@
/* Do the release handshake with the A2 via RM */
cur_bam = pipe_connect->bam_type;
- info.lpm_wait_pipes = 1;
spin_lock(&usb_bam_ipa_handshake_info_lock);
- info.disconnected = 1;
+ if (cur_bam == HSUSB_BAM) {
+ info.connect_complete = 0;
+ info.lpm_wait_pipes = 1;
+ info.disconnected = 1;
+ }
spin_unlock(&usb_bam_ipa_handshake_info_lock);
wait_for_prod_release(cur_bam);
/* close USB -> IPA pipe */
@@ -2054,7 +2027,17 @@
}
EXPORT_SYMBOL(usb_bam_disconnect_ipa);
-int usb_bam_a2_reset(void)
+void usb_bam_reset_complete(void)
+{
+ pr_debug("Waiting for reset compelte");
+ if (wait_for_completion_interruptible_timeout(&ctx.reset_done,
+ 10*HZ) <= 0)
+ pr_warn("Timeout while waiting for reset");
+
+ pr_debug("Finished Waiting for reset complete");
+}
+
+int usb_bam_a2_reset(bool to_reconnect)
{
struct usb_bam_pipe_connect *pipe_connect;
int i;
@@ -2095,6 +2078,9 @@
if (bam != -1 && sps_device_reset(ctx.h_bam[bam]))
pr_err("%s: BAM reset failed\n", __func__);
+ if (!to_reconnect)
+ return ret;
+
/* Reconnect A2 pipes */
for (i = 0; i < ctx.max_connections; i++) {
pipe_connect = &usb_bam_connections[i];
@@ -2556,8 +2542,6 @@
ctx.is_bam_inactivity[i] = false;
init_completion(&info.prod_avail[i]);
complete(&info.prod_avail[i]);
- init_completion(&info.cons_avail[i]);
- complete(&info.cons_avail[i]);
init_completion(&info.cons_released[i]);
complete(&info.cons_released[i]);
init_completion(&info.prod_released[i]);
@@ -2574,6 +2558,8 @@
spin_lock_init(&usb_bam_peer_handshake_info_lock);
INIT_WORK(&peer_handshake_info.reset_event.event_w, usb_bam_sm_work);
+ init_completion(&ctx.reset_done);
+ complete(&ctx.reset_done);
ctx.usb_bam_wq = alloc_workqueue("usb_bam_wq",
WQ_UNBOUND | WQ_MEM_RECLAIM, 1);
diff --git a/drivers/power/battery_current_limit.c b/drivers/power/battery_current_limit.c
index 69fa4a8..6b6b110 100644
--- a/drivers/power/battery_current_limit.c
+++ b/drivers/power/battery_current_limit.c
@@ -31,6 +31,7 @@
* Mininum BCL poll interval 10 msec
*/
#define MIN_BCL_POLL_INTERVAL 10
+#define BATTERY_VOLTAGE_MIN 3400
static const char bcl_type[] = "bcl";
@@ -43,20 +44,20 @@
};
/*
- * Battery Current Limit IBat Imax Threshold Mode
+ * Battery Current Limit Iavail Threshold Mode set
*/
-enum bcl_ibat_imax_threshold_mode {
- BCL_IBAT_IMAX_THRESHOLD_DISABLED = 0,
- BCL_IBAT_IMAX_THRESHOLD_ENABLED,
+enum bcl_iavail_threshold_mode {
+ BCL_IAVAIL_THRESHOLD_DISABLED = 0,
+ BCL_IAVAIL_THRESHOLD_ENABLED,
};
/*
- * Battery Current Limit Ibat Imax Trip Type (High and Low Threshold)
+ * Battery Current Limit Iavail Threshold Mode
*/
-enum bcl_ibat_imax_threshold_type {
- BCL_IBAT_IMAX_THRESHOLD_TYPE_LOW = 0,
- BCL_IBAT_IMAX_THRESHOLD_TYPE_HIGH,
- BCL_IBAT_IMAX_THRESHOLD_TYPE_MAX,
+enum bcl_iavail_threshold_type {
+ BCL_IAVAIL_LOW_THRESHOLD_TYPE = 0,
+ BCL_IAVAIL_HIGH_THRESHOLD_TYPE,
+ BCL_IAVAIL_THRESHOLD_TYPE_MAX,
};
/**
@@ -70,118 +71,137 @@
/* BCL related config parameter */
/* BCL mode enable or not */
enum bcl_device_mode bcl_mode;
- /* BCL Ibat/IMax Threshold Activate or Not */
- enum bcl_ibat_imax_threshold_mode
- bcl_threshold_mode[BCL_IBAT_IMAX_THRESHOLD_TYPE_MAX];
- /* BCL Ibat/IMax Threshold value in milli Amp */
- int bcl_threshold_value_ma[BCL_IBAT_IMAX_THRESHOLD_TYPE_MAX];
+ /* BCL Iavail Threshold Activate or Not */
+ enum bcl_iavail_threshold_mode
+ bcl_threshold_mode[BCL_IAVAIL_THRESHOLD_TYPE_MAX];
+ /* BCL Iavail Threshold value in milli Amp */
+ int bcl_threshold_value_ma[BCL_IAVAIL_THRESHOLD_TYPE_MAX];
/* BCL Type */
char bcl_type[BCL_NAME_LENGTH];
- /* BCL poll in usec */
+ /* BCL poll in msec */
int bcl_poll_interval_msec;
/* BCL realtime value based on poll */
- /* BCL realtime ibat in milli Amp*/
- int bcl_ibat_ma;
- /* BCL realtime calculated imax in milli Amp*/
- int bcl_imax_ma;
- /* BCL realtime calculated ocv in uV*/
- int bcl_ocv_uv;
/* BCL realtime vbat in mV*/
int bcl_vbat_mv;
/* BCL realtime rbat in mOhms*/
- int bcl_rbat;
+ int bcl_rbat_mohm;
+ /*BCL realtime iavail in milli Amp*/
+ int bcl_iavail;
+ /*BCL vbatt min in mV*/
+ int bcl_vbat_min;
/* BCL period poll delay work structure */
- struct delayed_work bcl_imax_work;
+ struct delayed_work bcl_iavail_work;
};
static struct bcl_context *gbcl;
-/*
- * BCL imax calculation and trigger notification to user space
- * if imax cross threshold
- */
-static void bcl_calculate_imax_trigger(void)
+static int bcl_get_battery_voltage(int *vbatt_mv)
{
- int ibatt_ua, vbatt_uv;
- int imax_ma;
- int ibatt_ma, vbatt_mv;
- int imax_low_threshold;
- int imax_high_threshold;
- bool threshold_cross = false;
- union power_supply_propval ret = {0,};
static struct power_supply *psy;
+ union power_supply_propval ret = {0,};
+
+ if (psy == NULL) {
+ psy = power_supply_get_by_name("battery");
+ if (psy == NULL) {
+ pr_err("failed to get ps battery\n");
+ return -EINVAL;
+ }
+ }
+
+ if (psy->get_property(psy, POWER_SUPPLY_PROP_VOLTAGE_NOW, &ret))
+ return -EINVAL;
+
+ if (ret.intval <= 0)
+ return -EINVAL;
+
+ *vbatt_mv = ret.intval / 1000;
+ return 0;
+}
+
+
+static int bcl_get_resistance(int *rbatt_mohm)
+{
+ static struct power_supply *psy;
+ union power_supply_propval ret = {0,};
+
+ if (psy == NULL) {
+ psy = power_supply_get_by_name("bms");
+ if (psy == NULL) {
+ pr_err("failed to get ps bms\n");
+ return -EINVAL;
+ }
+ }
+ if (psy->get_property(psy, POWER_SUPPLY_PROP_RESISTANCE, &ret))
+ return -EINVAL;
+
+ if (ret.intval <= 0)
+ return -EINVAL;
+
+ *rbatt_mohm = ret.intval / 1000;
+
+ return 0;
+}
+
+/*
+ * BCL iavail calculation and trigger notification to user space
+ * if iavail cross threshold
+ */
+static void bcl_calculate_iavail_trigger(void)
+{
+ int iavail_ma = 0;
+ int vbatt_mv;
+ int rbatt_mohm;
+ bool threshold_cross = false;
if (!gbcl) {
pr_err("called before initialization\n");
return;
}
- if (psy == NULL) {
- psy = power_supply_get_by_name("battery");
- if (psy == NULL) {
- pr_err("failed to get ps battery\n");
- return;
- }
- }
-
- if (psy->get_property(psy, POWER_SUPPLY_PROP_CURRENT_NOW, &ret))
+ if (bcl_get_battery_voltage(&vbatt_mv))
return;
- ibatt_ua = ret.intval;
- if (psy->get_property(psy, POWER_SUPPLY_PROP_VOLTAGE_NOW, &ret))
+ if (bcl_get_resistance(&rbatt_mohm))
return;
- vbatt_uv = ret.intval;
- if (psy->get_property(psy, POWER_SUPPLY_PROP_CURRENT_MAX, &ret))
- return;
- imax_ma = ret.intval/1000;
+ iavail_ma = (vbatt_mv - gbcl->bcl_vbat_min) * 1000 / rbatt_mohm;
- ibatt_ma = ibatt_ua/1000;
- vbatt_mv = vbatt_uv/1000;
-
- gbcl->bcl_ibat_ma = ibatt_ma;
- gbcl->bcl_imax_ma = imax_ma;
+ gbcl->bcl_rbat_mohm = rbatt_mohm;
gbcl->bcl_vbat_mv = vbatt_mv;
+ gbcl->bcl_iavail = iavail_ma;
- pr_debug("ibatt %d, imax %d, vbatt %d\n", ibatt_ma, imax_ma, vbatt_mv);
- if (gbcl->bcl_threshold_mode[BCL_IBAT_IMAX_THRESHOLD_TYPE_HIGH]
- == BCL_IBAT_IMAX_THRESHOLD_ENABLED) {
- imax_high_threshold =
- imax_ma - gbcl->bcl_threshold_value_ma
- [BCL_IBAT_IMAX_THRESHOLD_TYPE_HIGH];
- if (ibatt_ma >= imax_high_threshold)
- threshold_cross = true;
- }
+ pr_debug("iavail %d, vbatt %d rbatt %d\n", iavail_ma, vbatt_mv,
+ rbatt_mohm);
- if (gbcl->bcl_threshold_mode[BCL_IBAT_IMAX_THRESHOLD_TYPE_LOW]
- == BCL_IBAT_IMAX_THRESHOLD_ENABLED) {
- imax_low_threshold =
- imax_ma - gbcl->bcl_threshold_value_ma
- [BCL_IBAT_IMAX_THRESHOLD_TYPE_LOW];
- if (ibatt_ma <= imax_low_threshold)
- threshold_cross = true;
- }
+ if ((gbcl->bcl_threshold_mode[BCL_IAVAIL_HIGH_THRESHOLD_TYPE] ==
+ BCL_IAVAIL_THRESHOLD_ENABLED)
+ && (iavail_ma >=
+ gbcl->bcl_threshold_value_ma[BCL_IAVAIL_HIGH_THRESHOLD_TYPE]))
+ threshold_cross = true;
+ else if ((gbcl->bcl_threshold_mode[BCL_IAVAIL_LOW_THRESHOLD_TYPE]
+ == BCL_IAVAIL_THRESHOLD_ENABLED)
+ && (iavail_ma <=
+ gbcl->bcl_threshold_value_ma[BCL_IAVAIL_LOW_THRESHOLD_TYPE]))
+ threshold_cross = true;
- if (threshold_cross) {
- sysfs_notify(&gbcl->dev->kobj,
- NULL, "type");
- }
+ if (threshold_cross)
+ sysfs_notify(&gbcl->dev->kobj, NULL, "type");
}
/*
- * BCL imax work
+ * BCL iavail work
*/
-static void bcl_imax_work(struct work_struct *work)
+static void bcl_iavail_work(struct work_struct *work)
{
struct bcl_context *bcl = container_of(work,
- struct bcl_context, bcl_imax_work.work);
+ struct bcl_context, bcl_iavail_work.work);
if (gbcl->bcl_mode == BCL_DEVICE_ENABLED) {
- bcl_calculate_imax_trigger();
+ bcl_calculate_iavail_trigger();
/* restart the delay work for caculating imax */
- schedule_delayed_work(&bcl->bcl_imax_work,
+ schedule_delayed_work(&bcl->bcl_iavail_work,
msecs_to_jiffies(bcl->bcl_poll_interval_msec));
}
}
@@ -200,12 +220,12 @@
if (gbcl->bcl_mode == BCL_DEVICE_DISABLED
&& mode == BCL_DEVICE_ENABLED) {
gbcl->bcl_mode = mode;
- bcl_imax_work(&(gbcl->bcl_imax_work.work));
+ bcl_iavail_work(&(gbcl->bcl_iavail_work.work));
return;
} else if (gbcl->bcl_mode == BCL_DEVICE_ENABLED
&& mode == BCL_DEVICE_DISABLED) {
gbcl->bcl_mode = mode;
- cancel_delayed_work_sync(&(gbcl->bcl_imax_work));
+ cancel_delayed_work_sync(&(gbcl->bcl_iavail_work));
return;
}
@@ -223,11 +243,10 @@
}
show_bcl(type, bcl_type, "%s\n")
-show_bcl(ibat, bcl_ibat_ma, "%d\n")
-show_bcl(imax, bcl_imax_ma, "%d\n")
show_bcl(vbat, bcl_vbat_mv, "%d\n")
-show_bcl(rbat, bcl_rbat, "%d\n")
-show_bcl(ocv, bcl_ocv_uv, "%d\n")
+show_bcl(rbat, bcl_rbat_mohm, "%d\n")
+show_bcl(iavail, bcl_iavail, "%d\n")
+show_bcl(vbat_min, bcl_vbat_min, "%d\n");
show_bcl(poll_interval, bcl_poll_interval_msec, "%d\n")
static ssize_t
@@ -259,136 +278,6 @@
}
static ssize_t
-ibat_imax_low_threshold_mode_show(struct device *dev,
- struct device_attribute *attr, char *buf)
-{
- if (!gbcl)
- return -EPERM;
-
- return snprintf(buf, PAGE_SIZE, "%s\n",
- gbcl->bcl_threshold_mode[BCL_IBAT_IMAX_THRESHOLD_TYPE_LOW]
- == BCL_IBAT_IMAX_THRESHOLD_ENABLED ? "enabled" : "disabled");
-}
-
-static ssize_t
-ibat_imax_low_threshold_mode_store(struct device *dev,
- struct device_attribute *attr,
- const char *buf, size_t count)
-{
- if (!gbcl)
- return -EPERM;
-
- if (!strncmp(buf, "enabled", 7))
- gbcl->bcl_threshold_mode[BCL_IBAT_IMAX_THRESHOLD_TYPE_LOW]
- = BCL_IBAT_IMAX_THRESHOLD_ENABLED;
- else if (!strncmp(buf, "disabled", 8))
- gbcl->bcl_threshold_mode[BCL_IBAT_IMAX_THRESHOLD_TYPE_LOW]
- = BCL_IBAT_IMAX_THRESHOLD_DISABLED;
- else
- return -EINVAL;
-
- return count;
-}
-
-static ssize_t
-ibat_imax_low_threshold_value_show(struct device *dev,
- struct device_attribute *attr, char *buf)
-{
- if (!gbcl)
- return -EPERM;
-
- return snprintf(buf, PAGE_SIZE, "%d\n",
- gbcl->bcl_threshold_value_ma[BCL_IBAT_IMAX_THRESHOLD_TYPE_LOW]);
-}
-
-static ssize_t
-ibat_imax_low_threshold_value_store(struct device *dev,
- struct device_attribute *attr,
- const char *buf, size_t count)
-{
- int value;
-
- if (!gbcl)
- return -EPERM;
-
- if (!sscanf(buf, "%d", &value))
- return -EINVAL;
-
- if (value < 0)
- return -EINVAL;
-
- gbcl->bcl_threshold_value_ma[BCL_IBAT_IMAX_THRESHOLD_TYPE_LOW]
- = value;
-
- return count;
-}
-
-static ssize_t
-ibat_imax_high_threshold_mode_show(struct device *dev,
- struct device_attribute *attr, char *buf)
-{
- if (!gbcl)
- return -EPERM;
-
- return snprintf(buf, PAGE_SIZE, "%s\n",
- gbcl->bcl_threshold_mode[BCL_IBAT_IMAX_THRESHOLD_TYPE_HIGH]
- == BCL_IBAT_IMAX_THRESHOLD_ENABLED ? "enabled" : "disabled");
-}
-
-static ssize_t
-ibat_imax_high_threshold_mode_store(struct device *dev,
- struct device_attribute *attr,
- const char *buf, size_t count)
-{
- if (!gbcl)
- return -EPERM;
-
- if (!strncmp(buf, "enabled", 7))
- gbcl->bcl_threshold_mode[BCL_IBAT_IMAX_THRESHOLD_TYPE_HIGH]
- = BCL_IBAT_IMAX_THRESHOLD_ENABLED;
- else if (!strncmp(buf, "disabled", 8))
- gbcl->bcl_threshold_mode[BCL_IBAT_IMAX_THRESHOLD_TYPE_HIGH]
- = BCL_IBAT_IMAX_THRESHOLD_DISABLED;
- else
- return -EINVAL;
-
- return count;
-}
-
-static ssize_t
-ibat_imax_high_threshold_value_show(struct device *dev,
- struct device_attribute *attr, char *buf)
-{
- if (!gbcl)
- return -EPERM;
-
- return snprintf(buf, PAGE_SIZE, "%d\n",
- gbcl->bcl_threshold_value_ma[BCL_IBAT_IMAX_THRESHOLD_TYPE_HIGH]);
-}
-
-static ssize_t
-ibat_imax_high_threshold_value_store(struct device *dev,
- struct device_attribute *attr,
- const char *buf, size_t count)
-{
- int value;
-
- if (!gbcl)
- return -EPERM;
-
- if (!sscanf(buf, "%d", &value))
- return -EINVAL;
-
- if (value < 0)
- return -EINVAL;
-
- gbcl->bcl_threshold_value_ma[BCL_IBAT_IMAX_THRESHOLD_TYPE_HIGH]
- = value;
-
- return count;
-}
-
-static ssize_t
poll_interval_store(struct device *dev,
struct device_attribute *attr,
const char *buf, size_t count)
@@ -409,31 +298,168 @@
return count;
}
+static ssize_t vbat_min_store(struct device *dev,
+ struct device_attribute *attr,
+ const char *buf, size_t count)
+{
+ int value;
+ int ret;
+
+ if (!gbcl)
+ return -EPERM;
+
+ ret = kstrtoint(buf, 10, &value);
+
+ if (ret || (value < 0)) {
+ pr_err("Incorrect vbatt min value\n");
+ return -EINVAL;
+ }
+
+ gbcl->bcl_vbat_min = value;
+ return count;
+}
+
+static ssize_t iavail_low_threshold_mode_show(struct device *dev,
+ struct device_attribute *attr, char *buf)
+{
+ if (!gbcl)
+ return -EPERM;
+
+ return snprintf(buf, PAGE_SIZE, "%s\n",
+ gbcl->bcl_threshold_mode[BCL_IAVAIL_LOW_THRESHOLD_TYPE]
+ == BCL_IAVAIL_THRESHOLD_ENABLED ? "enabled" : "disabled");
+}
+
+static ssize_t iavail_low_threshold_mode_store(struct device *dev,
+ struct device_attribute *attr,
+ const char *buf, size_t count)
+{
+ if (!gbcl)
+ return -EPERM;
+
+ if (!strncmp(buf, "enabled", 7))
+ gbcl->bcl_threshold_mode[BCL_IAVAIL_LOW_THRESHOLD_TYPE]
+ = BCL_IAVAIL_THRESHOLD_ENABLED;
+ else if (!strncmp(buf, "disabled", 7))
+ gbcl->bcl_threshold_mode[BCL_IAVAIL_LOW_THRESHOLD_TYPE]
+ = BCL_IAVAIL_THRESHOLD_DISABLED;
+ else
+ return -EINVAL;
+
+ return count;
+}
+static ssize_t iavail_high_threshold_mode_show(struct device *dev,
+ struct device_attribute *attr, char *buf)
+{
+ if (!gbcl)
+ return -EPERM;
+
+ return snprintf(buf, PAGE_SIZE, "%s\n",
+ gbcl->bcl_threshold_mode[BCL_IAVAIL_HIGH_THRESHOLD_TYPE]
+ == BCL_IAVAIL_THRESHOLD_ENABLED ? "enabled" : "disabled");
+}
+
+static ssize_t iavail_high_threshold_mode_store(struct device *dev,
+ struct device_attribute *attr,
+ const char *buf, size_t count)
+{
+ if (!gbcl)
+ return -EPERM;
+
+ if (!strncmp(buf, "enabled", 7))
+ gbcl->bcl_threshold_mode[BCL_IAVAIL_HIGH_THRESHOLD_TYPE]
+ = BCL_IAVAIL_THRESHOLD_ENABLED;
+ else if (!strncmp(buf, "disabled", 7))
+ gbcl->bcl_threshold_mode[BCL_IAVAIL_HIGH_THRESHOLD_TYPE]
+ = BCL_IAVAIL_THRESHOLD_DISABLED;
+ else
+ return -EINVAL;
+
+ return count;
+}
+
+static ssize_t iavail_low_threshold_value_show(struct device *dev,
+ struct device_attribute *attr, char *buf)
+{
+ if (!gbcl)
+ return -EPERM;
+
+ return snprintf(buf, PAGE_SIZE, "%d\n",
+ gbcl->bcl_threshold_value_ma[BCL_IAVAIL_LOW_THRESHOLD_TYPE]);
+}
+
+
+static ssize_t iavail_low_threshold_value_store(struct device *dev,
+ struct device_attribute *attr,
+ const char *buf, size_t count)
+{
+ int val;
+ int ret;
+
+ ret = kstrtoint(buf, 10, &val);
+
+ if (ret || (val < 0)) {
+ pr_err("Incorrect available current threshold value\n");
+ return -EINVAL;
+ }
+
+ gbcl->bcl_threshold_value_ma[BCL_IAVAIL_LOW_THRESHOLD_TYPE] = val;
+
+ return count;
+}
+static ssize_t iavail_high_threshold_value_show(struct device *dev,
+ struct device_attribute *attr, char *buf)
+{
+ if (!gbcl)
+ return -EPERM;
+
+ return snprintf(buf, PAGE_SIZE, "%d\n",
+ gbcl->bcl_threshold_value_ma[BCL_IAVAIL_HIGH_THRESHOLD_TYPE]);
+}
+
+static ssize_t iavail_high_threshold_value_store(struct device *dev,
+ struct device_attribute *attr,
+ const char *buf, size_t count)
+{
+ int val;
+ int ret;
+
+ ret = kstrtoint(buf, 10, &val);
+
+ if (ret || (val < 0)) {
+ pr_err("Incorrect available current threshold value\n");
+ return -EINVAL;
+ }
+
+ gbcl->bcl_threshold_value_ma[BCL_IAVAIL_HIGH_THRESHOLD_TYPE] = val;
+
+ return count;
+}
+
/*
* BCL device attributes
*/
static struct device_attribute bcl_dev_attr[] = {
__ATTR(type, 0444, type_show, NULL),
- __ATTR(ibat, 0444, ibat_show, NULL),
+ __ATTR(iavail, 0444, iavail_show, NULL),
+ __ATTR(vbat_min, 0644, vbat_min_show, vbat_min_store),
__ATTR(vbat, 0444, vbat_show, NULL),
__ATTR(rbat, 0444, rbat_show, NULL),
- __ATTR(ocv, 0444, ocv_show, NULL),
- __ATTR(imax, 0444, imax_show, NULL),
__ATTR(mode, 0644, mode_show, mode_store),
__ATTR(poll_interval, 0644,
poll_interval_show, poll_interval_store),
- __ATTR(ibat_imax_low_threshold_mode, 0644,
- ibat_imax_low_threshold_mode_show,
- ibat_imax_low_threshold_mode_store),
- __ATTR(ibat_imax_high_threshold_mode, 0644,
- ibat_imax_high_threshold_mode_show,
- ibat_imax_high_threshold_mode_store),
- __ATTR(ibat_imax_low_threshold_value, 0644,
- ibat_imax_low_threshold_value_show,
- ibat_imax_low_threshold_value_store),
- __ATTR(ibat_imax_high_threshold_value, 0644,
- ibat_imax_high_threshold_value_show,
- ibat_imax_high_threshold_value_store)
+ __ATTR(iavail_low_threshold_mode, 0644,
+ iavail_low_threshold_mode_show,
+ iavail_low_threshold_mode_store),
+ __ATTR(iavail_high_threshold_mode, 0644,
+ iavail_high_threshold_mode_show,
+ iavail_high_threshold_mode_store),
+ __ATTR(iavail_low_threshold_value, 0644,
+ iavail_low_threshold_value_show,
+ iavail_low_threshold_value_store),
+ __ATTR(iavail_high_threshold_value, 0644,
+ iavail_high_threshold_value_show,
+ iavail_high_threshold_value_store),
};
static int create_bcl_sysfs(struct bcl_context *bcl)
@@ -480,12 +506,13 @@
/* Init default BCL params */
bcl->dev = &pdev->dev;
bcl->bcl_mode = BCL_DEVICE_DISABLED;
- bcl->bcl_threshold_mode[BCL_IBAT_IMAX_THRESHOLD_TYPE_LOW]
- = BCL_IBAT_IMAX_THRESHOLD_DISABLED;
- bcl->bcl_threshold_mode[BCL_IBAT_IMAX_THRESHOLD_TYPE_HIGH]
- = BCL_IBAT_IMAX_THRESHOLD_DISABLED;
- bcl->bcl_threshold_value_ma[BCL_IBAT_IMAX_THRESHOLD_TYPE_LOW] = 0;
- bcl->bcl_threshold_value_ma[BCL_IBAT_IMAX_THRESHOLD_TYPE_HIGH] = 0;
+ bcl->bcl_threshold_mode[BCL_IAVAIL_LOW_THRESHOLD_TYPE] =
+ BCL_IAVAIL_THRESHOLD_DISABLED;
+ bcl->bcl_threshold_mode[BCL_IAVAIL_HIGH_THRESHOLD_TYPE] =
+ BCL_IAVAIL_THRESHOLD_DISABLED;
+ bcl->bcl_threshold_value_ma[BCL_IAVAIL_LOW_THRESHOLD_TYPE] = 0;
+ bcl->bcl_threshold_value_ma[BCL_IAVAIL_HIGH_THRESHOLD_TYPE] = 0;
+ bcl->bcl_vbat_min = BATTERY_VOLTAGE_MIN;
snprintf(bcl->bcl_type, BCL_NAME_LENGTH, "%s", bcl_type);
bcl->bcl_poll_interval_msec = BCL_POLL_INTERVAL;
ret = create_bcl_sysfs(bcl);
@@ -495,7 +522,7 @@
return ret;
}
platform_set_drvdata(pdev, bcl);
- INIT_DELAYED_WORK(&bcl->bcl_imax_work, bcl_imax_work);
+ INIT_DELAYED_WORK_DEFERRABLE(&bcl->bcl_iavail_work, bcl_iavail_work);
return 0;
}
diff --git a/drivers/power/pm8921-bms.c b/drivers/power/pm8921-bms.c
index e244df4..1fd4434 100644
--- a/drivers/power/pm8921-bms.c
+++ b/drivers/power/pm8921-bms.c
@@ -156,7 +156,7 @@
int enable_fcc_learning;
int min_fcc_learning_soc;
int min_fcc_ocv_pc;
- int max_fcc_learning_samples;
+ int min_fcc_learning_samples;
struct fcc_data *fcc_table;
int fcc_new;
int start_real_soc;
@@ -223,7 +223,7 @@
static int last_chargecycles = DEFAULT_CHARGE_CYCLES;
static int last_charge_increase;
static int last_fcc_update_count;
-static int max_fcc_cycles = -EINVAL;
+static int min_fcc_cycles = -EINVAL;
module_param(last_chargecycles, int, 0644);
module_param(last_charge_increase, int, 0644);
module_param(last_fcc_update_count, int, 0644);
@@ -253,8 +253,7 @@
/* Make last_soc as read only as it is already calculated from shutdown_soc */
module_param_cb(last_soc, &bms_param_ops, &last_soc, 0644);
module_param_cb(battery_removed, &bms_param_ops, &battery_removed, 0644);
-module_param_cb(max_fcc_cycles, &bms_param_ops,
- &max_fcc_cycles, 0644);
+module_param_cb(min_fcc_cycles, &bms_param_ops, &min_fcc_cycles, 0644);
/*
* bms_fake_battery is set in setups where a battery emulator is used instead
@@ -2790,7 +2789,7 @@
static void invalidate_fcc(struct pm8921_bms_chip *chip)
{
- memset(chip->fcc_table, 0, chip->max_fcc_learning_samples *
+ memset(chip->fcc_table, 0, chip->min_fcc_learning_samples *
sizeof(*(chip->fcc_table)));
last_fcc_update_count = 0;
chip->adjusted_fcc_temp_lut = NULL;
@@ -2807,7 +2806,7 @@
struct fcc_data *ft;
/* Interpolate all the FCC entries to the same temperature */
- for (i = 0; i < chip->max_fcc_learning_samples; i++) {
+ for (i = 0; i < chip->min_fcc_learning_samples; i++) {
ft = &chip->fcc_table[i];
if (ft->batt_temp == batt_temp_final)
continue;
@@ -2825,7 +2824,7 @@
int i, temp_fcc_avg = 0, new_fcc_avg = 0, temp_fcc_delta = 0, count;
struct fcc_data *ft;
- count = last_fcc_update_count % chip->max_fcc_learning_samples;
+ count = last_fcc_update_count % chip->min_fcc_learning_samples;
ft = &chip->fcc_table[count];
ft->fcc_new = ft->fcc_real = new_fcc_uah;
ft->batt_temp = ft->temp_real = batt_temp;
@@ -2838,14 +2837,14 @@
pr_debug("Updated fcc table. new_fcc=%d, chargecycle=%d, temp=%d fcc_update_count=%d\n",
new_fcc_uah, chargecycles, batt_temp, last_fcc_update_count);
- if (last_fcc_update_count < chip->max_fcc_learning_samples) {
+ if (last_fcc_update_count < chip->min_fcc_learning_samples) {
pr_debug("Not enough FCC samples. Current count = %d\n",
last_fcc_update_count);
return; /* Not enough samples to update fcc */
}
/* reject entries if they are > 50 chargecycles apart */
- for (i = 0; i < chip->max_fcc_learning_samples; i++) {
+ for (i = 0; i < chip->min_fcc_learning_samples; i++) {
if ((chip->fcc_table[i].chargecycles + VALID_FCC_CHGCYL_RANGE)
< chargecycles) {
pr_debug("Charge cycle too old (> %d cycles apart)\n",
@@ -2857,20 +2856,20 @@
update_fcc_table_for_temp(chip, batt_temp);
/* Calculate the avg. and SD for all the fcc entries */
- for (i = 0; i < chip->max_fcc_learning_samples; i++)
+ for (i = 0; i < chip->min_fcc_learning_samples; i++)
temp_fcc_avg += chip->fcc_table[i].fcc_new;
- temp_fcc_avg /= chip->max_fcc_learning_samples;
+ temp_fcc_avg /= chip->min_fcc_learning_samples;
temp_fcc_delta = div_u64(temp_fcc_avg * DELTA_FCC_PERCENT, 100);
/* fix the fcc if its an outlier i.e. > 5% of the average */
- for (i = 0; i < chip->max_fcc_learning_samples; i++) {
+ for (i = 0; i < chip->min_fcc_learning_samples; i++) {
ft = &chip->fcc_table[i];
if (abs(ft->fcc_new - temp_fcc_avg) > temp_fcc_delta)
ft->fcc_new = temp_fcc_avg;
new_fcc_avg += ft->fcc_new;
}
- new_fcc_avg /= chip->max_fcc_learning_samples;
+ new_fcc_avg /= chip->min_fcc_learning_samples;
last_real_fcc_mah = new_fcc_avg/1000;
last_real_fcc_batt_temp = batt_temp;
@@ -2878,6 +2877,7 @@
pr_debug("FCC update: last_real_fcc_mah=%d, last_real_fcc_batt_temp=%d\n",
new_fcc_avg, batt_temp);
readjust_fcc_table();
+ sysfs_notify(&chip->dev->kobj, NULL, "fcc_data");
}
static bool is_new_fcc_valid(int new_fcc_uah, int fcc_uah)
@@ -3496,7 +3496,7 @@
return count;
}
- i %= chip->max_fcc_learning_samples;
+ i %= chip->min_fcc_learning_samples;
rc = sscanf(buf, "%d", &fcc_new);
if (rc != 1)
return -EINVAL;
@@ -3535,7 +3535,7 @@
int batt_temp = 0, rc;
struct pm8921_bms_chip *chip = dev_get_drvdata(dev);
- i %= chip->max_fcc_learning_samples;
+ i %= chip->min_fcc_learning_samples;
rc = sscanf(buf, "%d", &batt_temp);
if (rc != 1)
return -EINVAL;
@@ -3554,7 +3554,7 @@
int chargecycle = 0, rc;
struct pm8921_bms_chip *chip = dev_get_drvdata(dev);
- i %= chip->max_fcc_learning_samples;
+ i %= chip->min_fcc_learning_samples;
rc = sscanf(buf, "%d", &chargecycle);
if (rc != 1)
return -EINVAL;
@@ -3572,10 +3572,10 @@
struct fcc_data *ft;
int i = 0, j, count = 0;
- if (last_fcc_update_count < chip->max_fcc_learning_samples)
+ if (last_fcc_update_count < chip->min_fcc_learning_samples)
i = last_fcc_update_count;
else
- i = chip->max_fcc_learning_samples;
+ i = chip->min_fcc_learning_samples;
for (j = 0; j < i; j++) {
ft = &chip->fcc_table[j];
@@ -3733,7 +3733,7 @@
chip->enable_fcc_learning = pdata->enable_fcc_learning;
chip->min_fcc_learning_soc = pdata->min_fcc_learning_soc;
chip->min_fcc_ocv_pc = pdata->min_fcc_ocv_pc;
- chip->max_fcc_learning_samples = pdata->max_fcc_learning_samples;
+ chip->min_fcc_learning_samples = pdata->min_fcc_learning_samples;
if (chip->enable_fcc_learning) {
if (!chip->min_fcc_learning_soc)
chip->min_fcc_learning_soc =
@@ -3741,13 +3741,13 @@
if (!chip->min_fcc_ocv_pc)
chip->min_fcc_ocv_pc =
MIN_START_OCV_PERCENT_FOR_LEARNING;
- if (!chip->max_fcc_learning_samples ||
- chip->max_fcc_learning_samples > MAX_FCC_LEARNING_COUNT)
- chip->max_fcc_learning_samples = MAX_FCC_LEARNING_COUNT;
+ if (!chip->min_fcc_learning_samples ||
+ chip->min_fcc_learning_samples > MAX_FCC_LEARNING_COUNT)
+ chip->min_fcc_learning_samples = MAX_FCC_LEARNING_COUNT;
- max_fcc_cycles = chip->max_fcc_learning_samples;
+ min_fcc_cycles = chip->min_fcc_learning_samples;
chip->fcc_table = kzalloc(sizeof(struct fcc_data) *
- chip->max_fcc_learning_samples, GFP_KERNEL);
+ chip->min_fcc_learning_samples, GFP_KERNEL);
if (!chip->fcc_table) {
pr_err("Unable to allocate table for fcc learning\n");
rc = -ENOMEM;
diff --git a/drivers/power/power_supply_sysfs.c b/drivers/power/power_supply_sysfs.c
index 5cdb666..11e6cc1 100644
--- a/drivers/power/power_supply_sysfs.c
+++ b/drivers/power/power_supply_sysfs.c
@@ -159,6 +159,7 @@
POWER_SUPPLY_ATTR(charge_now),
POWER_SUPPLY_ATTR(charge_avg),
POWER_SUPPLY_ATTR(charge_counter),
+ POWER_SUPPLY_ATTR(charge_counter_shadow),
POWER_SUPPLY_ATTR(energy_full_design),
POWER_SUPPLY_ATTR(energy_empty_design),
POWER_SUPPLY_ATTR(energy_full),
diff --git a/drivers/power/qpnp-bms.c b/drivers/power/qpnp-bms.c
index 816aa4f..12aef1c 100644
--- a/drivers/power/qpnp-bms.c
+++ b/drivers/power/qpnp-bms.c
@@ -45,37 +45,32 @@
#define BMS1_OCV_USE_LIMIT_CTL 0x4C
/* Delay control */
#define BMS1_S1_DELAY_CTL 0x5A
-/* CC interrupt threshold */
-#define BMS1_CC_THR0 0x7A
-#define BMS1_CC_THR1 0x7B
-#define BMS1_CC_THR2 0x7C
-#define BMS1_CC_THR3 0x7D
-#define BMS1_CC_THR4 0x7E
+/* OCV interrupt threshold */
+#define BMS1_OCV_THR0 0x50
+/* SW CC interrupt threshold */
+#define BMS1_SW_CC_THR0 0xA0
/* OCV for r registers */
#define BMS1_OCV_FOR_R_DATA0 0x80
-#define BMS1_OCV_FOR_R_DATA1 0x81
#define BMS1_VSENSE_FOR_R_DATA0 0x82
-#define BMS1_VSENSE_FOR_R_DATA1 0x83
/* Coulomb counter data */
#define BMS1_CC_DATA0 0x8A
-#define BMS1_CC_DATA1 0x8B
-#define BMS1_CC_DATA2 0x8C
-#define BMS1_CC_DATA3 0x8D
-#define BMS1_CC_DATA4 0x8E
+/* Shadow Coulomb counter data */
+#define BMS1_SW_CC_DATA0 0xA8
/* OCV for soc data */
#define BMS1_OCV_FOR_SOC_DATA0 0x90
-#define BMS1_OCV_FOR_SOC_DATA1 0x91
#define BMS1_VSENSE_PON_DATA0 0x94
-#define BMS1_VSENSE_PON_DATA1 0x95
#define BMS1_VSENSE_AVG_DATA0 0x98
-#define BMS1_VSENSE_AVG_DATA1 0x99
#define BMS1_VBAT_AVG_DATA0 0x9E
-#define BMS1_VBAT_AVG_DATA1 0x9F
/* Extra bms registers */
#define SOC_STORAGE_REG 0xB0
#define IAVG_STORAGE_REG 0xB1
-#define BMS1_BMS_DATA_REG_2 0xB2
+#define BMS_BATT_REMOVED_REG 0xB2
#define BMS1_BMS_DATA_REG_3 0xB3
+#define CHARGE_INCREASE_STORAGE 0xB4
+#define FCC_BATT_TEMP_STORAGE 0xB5
+#define FCC_STORAGE_LSB 0xBC /* LSB=0xBC, MSB=0xBD */
+#define CHARGE_CYCLE_STORAGE_LSB 0xBE /* LSB=0xBE, MSB=0xBF */
+
/* IADC Channel Select */
#define IADC1_BMS_ADC_CH_SEL_CTL 0x48
@@ -88,8 +83,22 @@
#define IAVG_SAMPLES 16
+/* FCC learning constants */
+#define DELTA_FCC_PERCENT 5
+#define VALID_FCC_CHGCYL_RANGE 50
+
#define QPNP_BMS_DEV_NAME "qcom,qpnp-bms"
+enum {
+ SHDW_CC,
+ CC
+};
+
+enum {
+ NORESET,
+ RESET
+};
+
struct soc_params {
int fcc_uah;
int cc_uah;
@@ -103,9 +112,26 @@
struct raw_soc_params {
uint16_t last_good_ocv_raw;
int64_t cc;
+ int64_t shdw_cc;
int last_good_ocv_uv;
};
+struct fcc_data {
+ int fcc_new;
+ int batt_temp;
+ int chargecycles;
+};
+
+struct bms_irq {
+ unsigned int irq;
+ unsigned long disabled;
+};
+
+struct bms_wakeup_source {
+ struct wakeup_source source;
+ unsigned long disabled;
+};
+
struct qpnp_bms_chip {
struct device *dev;
struct power_supply bms_psy;
@@ -162,7 +188,7 @@
int low_soc_calc_threshold;
int low_soc_calculate_soc_ms;
int calculate_soc_ms;
- struct wake_lock soc_wake_lock;
+ struct bms_wakeup_source soc_wake_source;
struct wake_lock cv_wake_lock;
uint16_t ocv_reading_at_100;
@@ -177,6 +203,7 @@
bool first_time_calc_soc;
bool first_time_calc_uuc;
int64_t software_cc_uah;
+ int64_t software_shdw_cc_uah;
int iavg_samples_ma[IAVG_SAMPLES];
int iavg_index;
@@ -215,6 +242,26 @@
int ocv_high_threshold_uv;
int ocv_low_threshold_uv;
unsigned long last_recalc_time;
+
+ struct fcc_data *fcc_table;
+ int enable_fcc_learning;
+ int min_fcc_learning_soc;
+ int min_fcc_ocv_pc;
+ int min_fcc_learning_samples;
+ int start_soc;
+ int end_soc;
+ int start_pc;
+ int start_cc_uah;
+ int start_real_soc;
+ int end_cc_uah;
+ uint16_t fcc_new_mah;
+ int fcc_new_batt_temp;
+ uint16_t charge_cycles;
+ u8 charge_increase;
+ int fcc_new_sysfs;
+ int fcc_update_complete;
+ struct bms_irq sw_cc_thr_irq;
+ struct bms_irq ocv_thr_irq;
};
static struct of_device_id qpnp_bms_match_table[] = {
@@ -231,10 +278,50 @@
POWER_SUPPLY_PROP_CURRENT_NOW,
POWER_SUPPLY_PROP_RESISTANCE,
POWER_SUPPLY_PROP_CHARGE_COUNTER,
+ POWER_SUPPLY_PROP_CHARGE_COUNTER_SHADOW,
POWER_SUPPLY_PROP_CHARGE_FULL_DESIGN,
+ POWER_SUPPLY_PROP_CYCLE_COUNT,
};
static bool bms_reset;
+static int min_fcc_cycles = -EINVAL;
+static int last_fcc_update_count;
+static int battery_removed;
+
+static int
+bms_ro_ops_set(const char *val, const struct kernel_param *kp)
+{
+ return -EINVAL;
+}
+
+static int
+bms_last_fcc_count_set(const char *val, const struct kernel_param *kp)
+{
+ int rc;
+
+ if (battery_removed) {
+ last_fcc_update_count = 0;
+ return 0;
+ }
+ rc = param_set_int(val, kp);
+ if (rc)
+ pr_err("Failed to set last_fcc_update_count rc=%d\n", rc);
+
+ return rc;
+}
+
+static struct kernel_param_ops bms_ro_param_ops = {
+ .set = bms_ro_ops_set,
+ .get = param_get_int,
+};
+static struct kernel_param_ops bms_last_fcc_count_param_ops = {
+ .set = bms_last_fcc_count_set,
+ .get = param_get_int,
+};
+module_param_cb(min_fcc_cycles, &bms_ro_param_ops, &min_fcc_cycles, 0644);
+module_param_cb(battery_removed, &bms_ro_param_ops, &battery_removed, 0644);
+module_param_cb(last_fcc_update_count, &bms_last_fcc_count_param_ops,
+ &last_fcc_update_count, 0644);
static int qpnp_read_wrapper(struct qpnp_bms_chip *chip, u8 *val,
u16 base, int count)
@@ -298,6 +385,38 @@
return qpnp_masked_write_base(chip, chip->base + addr, mask, val);
}
+static void bms_stay_awake(struct bms_wakeup_source *source)
+{
+ if (__test_and_clear_bit(0, &source->disabled)) {
+ __pm_stay_awake(&source->source);
+ pr_debug("enabled source %s\n", source->source.name);
+ }
+}
+
+static void bms_relax(struct bms_wakeup_source *source)
+{
+ if (!__test_and_set_bit(0, &source->disabled)) {
+ __pm_relax(&source->source);
+ pr_debug("disabled source %s\n", source->source.name);
+ }
+}
+
+static void enable_bms_irq(struct bms_irq *irq)
+{
+ if (__test_and_clear_bit(0, &irq->disabled)) {
+ enable_irq(irq->irq);
+ pr_debug("enabled irq %d\n", irq->irq);
+ }
+}
+
+static void disable_bms_irq(struct bms_irq *irq)
+{
+ if (!__test_and_set_bit(0, &irq->disabled)) {
+ disable_irq(irq->irq);
+ pr_debug("disabled irq %d\n", irq->irq);
+ }
+}
+
#define HOLD_OREG_DATA BIT(0)
static int lock_output_data(struct qpnp_bms_chip *chip)
{
@@ -339,7 +458,6 @@
#define VADC_CALIB_UV 625000
#define VBATT_MUL_FACTOR 3
-
static int adjust_vbatt_reading(struct qpnp_bms_chip *chip, int reading_uv)
{
s64 numerator, denominator;
@@ -417,6 +535,30 @@
return result_uv;
}
+static s64 cc_reverse_adjust_for_gain(s64 uv)
+{
+ struct qpnp_iadc_calib calibration;
+ int gain;
+ s64 result_uv;
+
+ qpnp_iadc_get_gain_and_offset(&calibration);
+ gain = (int)calibration.gain_raw - (int)calibration.offset_raw;
+
+ pr_debug("reverse adjusting_uv = %lld\n", uv);
+ if (gain == 0) {
+ pr_debug("gain is %d, not adjusting\n", gain);
+ return uv;
+ }
+ pr_debug("adjusting by factor: %hu/%lld = %lld%%\n",
+ gain, QPNP_ADC_GAIN_IDEAL,
+ div64_s64((s64)gain * 100LL,
+ (s64)QPNP_ADC_GAIN_IDEAL));
+
+ result_uv = div64_s64(uv * (s64)gain, QPNP_ADC_GAIN_IDEAL);
+ pr_debug("result_uv = %lld\n", result_uv);
+ return result_uv;
+}
+
static int convert_vsense_to_uv(struct qpnp_bms_chip *chip,
int16_t reading)
{
@@ -492,25 +634,38 @@
}
#define CC_36_BIT_MASK 0xFFFFFFFFFLL
+static uint64_t convert_s64_to_s36(int64_t raw64)
+{
+ return (uint64_t) raw64 & CC_36_BIT_MASK;
+}
-static int read_cc_raw(struct qpnp_bms_chip *chip, int64_t *reading)
+#define SIGN_EXTEND_36_TO_64_MASK (-1LL ^ CC_36_BIT_MASK)
+static int64_t convert_s36_to_s64(uint64_t raw36)
+{
+ raw36 = raw36 & CC_36_BIT_MASK;
+ /* convert 36 bit signed value into 64 signed value */
+ return (raw36 >> 35) == 0LL ?
+ raw36 : (SIGN_EXTEND_36_TO_64_MASK | raw36);
+}
+
+static int read_cc_raw(struct qpnp_bms_chip *chip, int64_t *reading,
+ int cc_type)
{
int64_t raw_reading;
int rc;
- rc = qpnp_read_wrapper(chip, (u8 *)&raw_reading,
- chip->base + BMS1_CC_DATA0, 5);
+ if (cc_type == SHDW_CC)
+ rc = qpnp_read_wrapper(chip, (u8 *)&raw_reading,
+ chip->base + BMS1_SW_CC_DATA0, 5);
+ else
+ rc = qpnp_read_wrapper(chip, (u8 *)&raw_reading,
+ chip->base + BMS1_CC_DATA0, 5);
if (rc) {
pr_err("Error reading cc: rc = %d\n", rc);
return -ENXIO;
}
- raw_reading = raw_reading & CC_36_BIT_MASK;
- /* convert 36 bit signed value into 64 signed value */
- *reading = (raw_reading >> 35) == 0LL ?
- raw_reading : ((-1LL ^ CC_36_BIT_MASK) | raw_reading);
- pr_debug("before conversion: %llx, after conversion: %llx\n",
- raw_reading, *reading);
+ *reading = convert_s36_to_s64(raw_reading);
return 0;
}
@@ -563,21 +718,22 @@
}
#define CLEAR_CC BIT(7)
-#define CLEAR_SW_CC BIT(6)
+#define CLEAR_SHDW_CC BIT(6)
/**
* reset both cc and sw-cc.
* note: this should only be ever called from one thread
* or there may be a race condition where CC is never enabled
* again
*/
-static void reset_cc(struct qpnp_bms_chip *chip)
+static void reset_cc(struct qpnp_bms_chip *chip, u8 flags)
{
int rc;
- pr_debug("resetting cc manually\n");
+ pr_debug("resetting cc manually with flags %hhu\n", flags);
+ mutex_lock(&chip->bms_output_lock);
rc = qpnp_masked_write(chip, BMS1_CC_CLEAR_CTL,
- CLEAR_CC | CLEAR_SW_CC,
- CLEAR_CC | CLEAR_SW_CC);
+ flags,
+ flags);
if (rc)
pr_err("cc reset failed: %d\n", rc);
@@ -585,9 +741,10 @@
udelay(100);
rc = qpnp_masked_write(chip, BMS1_CC_CLEAR_CTL,
- CLEAR_CC | CLEAR_SW_CC, 0);
+ flags, 0);
if (rc)
pr_err("cc reenable failed: %d\n", rc);
+ mutex_unlock(&chip->bms_output_lock);
}
static int get_battery_status(struct qpnp_bms_chip *chip)
@@ -706,8 +863,9 @@
chip->shutdown_soc = 0;
chip->shutdown_iavg_ma = 0;
chip->prev_pc_unusable = -EINVAL;
- reset_cc(chip);
+ reset_cc(chip, CLEAR_CC | CLEAR_SHDW_CC);
chip->software_cc_uah = 0;
+ chip->software_shdw_cc_uah = 0;
chip->last_cc_uah = INT_MIN;
chip->last_ocv_temp = batt_temp;
chip->prev_batt_terminal_uv = 0;
@@ -724,14 +882,6 @@
mutex_lock(&chip->bms_output_lock);
- if (chip->prev_last_good_ocv_raw == OCV_RAW_UNINITIALIZED) {
- /* software workaround for BMS 1.0
- * The coulomb counter does not reset upon PON, so reset it
- * manually upon probe. */
- if (chip->revision1 == 0 && chip->revision2 == 0)
- reset_cc(chip);
- }
-
lock_output_data(chip);
rc = qpnp_read_wrapper(chip, (u8 *)&raw->last_good_ocv_raw,
@@ -741,7 +891,8 @@
return -ENXIO;
}
- rc = read_cc_raw(chip, &raw->cc);
+ rc = read_cc_raw(chip, &raw->cc, CC);
+ rc = read_cc_raw(chip, &raw->shdw_cc, SHDW_CC);
if (rc) {
pr_err("Failed to read raw cc data, rc = %d\n", rc);
return rc;
@@ -760,7 +911,7 @@
pr_debug("OCV is stale or bad, estimating new OCV.\n");
chip->last_ocv_uv = estimate_ocv(chip);
raw->last_good_ocv_uv = chip->last_ocv_uv;
- reset_cc(chip);
+ reset_cc(chip, CLEAR_CC | CLEAR_SHDW_CC);
pr_debug("New PON_OCV_UV = %d, cc = %llx\n",
chip->last_ocv_uv, raw->cc);
}
@@ -768,6 +919,7 @@
/* if a new battery was inserted, estimate the ocv */
reset_for_new_battery(chip, batt_temp);
raw->cc = 0;
+ raw->shdw_cc = 0;
raw->last_good_ocv_uv = chip->last_ocv_uv;
chip->new_battery = false;
} else if (chip->done_charging) {
@@ -777,9 +929,11 @@
chip->last_ocv_uv = chip->max_voltage_uv;
raw->last_good_ocv_uv = chip->max_voltage_uv;
raw->cc = 0;
- reset_cc(chip);
+ raw->shdw_cc = 0;
+ reset_cc(chip, CLEAR_CC | CLEAR_SHDW_CC);
chip->last_ocv_temp = batt_temp;
chip->software_cc_uah = 0;
+ chip->software_shdw_cc_uah = 0;
chip->last_cc_uah = INT_MIN;
pr_debug("EOC Battery full ocv_reading = 0x%x\n",
chip->ocv_reading_at_100);
@@ -865,6 +1019,7 @@
* calculate_cc() - converts a hardware coulomb counter reading into uah
* @chip: the bms chip pointer
* @cc: the cc reading from bms h/w
+ * @cc_type: calcualte cc from regular or shadow coulomb counter
* @clear_cc: whether this function should clear the hardware counter
* after reading
*
@@ -873,39 +1028,48 @@
*
* Return: the coulomb counter based charge in uAh (micro-amp hour)
*/
-static int calculate_cc(struct qpnp_bms_chip *chip, int64_t cc, bool clear_cc)
+static int calculate_cc(struct qpnp_bms_chip *chip, int64_t cc,
+ int cc_type, int clear_cc)
{
struct qpnp_iadc_calib calibration;
struct qpnp_vadc_result result;
- int64_t cc_voltage_uv, cc_pvh, cc_uah;
+ int64_t cc_voltage_uv, cc_pvh, cc_uah, *software_counter;
int rc;
+ software_counter = cc_type == SHDW_CC ?
+ &chip->software_shdw_cc_uah : &chip->software_cc_uah;
rc = qpnp_vadc_read(DIE_TEMP, &result);
if (rc) {
pr_err("could not read pmic die temperature: %d\n", rc);
- return chip->software_cc_uah;
+ return *software_counter;
}
qpnp_iadc_get_gain_and_offset(&calibration);
- pr_debug("cc = %lld, die_temp = %lld\n", cc, result.physical);
+ pr_debug("%scc = %lld, die_temp = %lld\n",
+ cc_type == SHDW_CC ? "shdw_" : "",
+ cc, result.physical);
cc_voltage_uv = cc_reading_to_uv(cc);
cc_voltage_uv = cc_adjust_for_gain(cc_voltage_uv,
calibration.gain_raw
- calibration.offset_raw);
- pr_debug("cc_voltage_uv = %lld uv\n", cc_voltage_uv);
cc_pvh = cc_uv_to_pvh(cc_voltage_uv);
- pr_debug("cc_pvh = %lld pvh\n", cc_pvh);
cc_uah = div_s64(cc_pvh, chip->r_sense_uohm);
rc = qpnp_iadc_comp_result(&cc_uah);
if (rc)
pr_debug("error compensation failed: %d\n", rc);
-
- if (clear_cc) {
- chip->software_cc_uah += cc_uah;
- reset_cc(chip);
- return (int)chip->software_cc_uah;
+ if (clear_cc == RESET) {
+ pr_debug("software_%scc = %lld, added cc_uah = %lld\n",
+ cc_type == SHDW_CC ? "sw_" : "",
+ *software_counter, cc_uah);
+ *software_counter += cc_uah;
+ reset_cc(chip, cc_type == SHDW_CC ? CLEAR_SHDW_CC : CLEAR_CC);
+ return (int)*software_counter;
} else {
- return chip->software_cc_uah + cc_uah;
+ pr_debug("software_%scc = %lld, cc_uah = %lld, total = %lld\n",
+ cc_type == SHDW_CC ? "shdw_" : "",
+ *software_counter, cc_uah,
+ *software_counter + cc_uah);
+ return *software_counter + cc_uah;
}
}
@@ -1196,6 +1360,59 @@
return rc;
}
+/* Returns estimated battery resistance */
+static int get_prop_bms_batt_resistance(struct qpnp_bms_chip *chip)
+{
+ return chip->rbatt_mohm * 1000;
+}
+
+/* Returns instantaneous current in uA */
+static int get_prop_bms_current_now(struct qpnp_bms_chip *chip)
+{
+ int rc, result_ua;
+
+ rc = get_battery_current(chip, &result_ua);
+ if (rc) {
+ pr_err("failed to get current: %d\n", rc);
+ return rc;
+ }
+ return result_ua;
+}
+
+/* Returns coulomb counter in uAh */
+static int get_prop_bms_charge_counter(struct qpnp_bms_chip *chip)
+{
+ int64_t cc_raw;
+
+ mutex_lock(&chip->bms_output_lock);
+ lock_output_data(chip);
+ read_cc_raw(chip, &cc_raw, false);
+ unlock_output_data(chip);
+ mutex_unlock(&chip->bms_output_lock);
+
+ return calculate_cc(chip, cc_raw, CC, NORESET);
+}
+
+/* Returns shadow coulomb counter in uAh */
+static int get_prop_bms_charge_counter_shadow(struct qpnp_bms_chip *chip)
+{
+ int64_t cc_raw;
+
+ mutex_lock(&chip->bms_output_lock);
+ lock_output_data(chip);
+ read_cc_raw(chip, &cc_raw, true);
+ unlock_output_data(chip);
+ mutex_unlock(&chip->bms_output_lock);
+
+ return calculate_cc(chip, cc_raw, SHDW_CC, NORESET);
+}
+
+/* Returns full charge design in uAh */
+static int get_prop_bms_charge_full_design(struct qpnp_bms_chip *chip)
+{
+ return chip->fcc_mah * 1000;
+}
+
static int calculate_delta_time(unsigned long *time_stamp, int *delta_time_s)
{
unsigned long now_tm_sec = 0;
@@ -1220,7 +1437,7 @@
struct soc_params *params,
int batt_temp)
{
- int soc_rbatt;
+ int soc_rbatt, shdw_cc_uah;
calculate_delta_time(&chip->tm_sec, ¶ms->delta_time_s);
pr_debug("tm_sec = %ld, delta_s = %d\n",
@@ -1235,8 +1452,11 @@
pr_debug("ocv_charge_uah = %uuAh\n", params->ocv_charge_uah);
/* calculate cc micro_volt_hour */
- params->cc_uah = calculate_cc(chip, raw->cc, true);
- pr_debug("cc_uah = %duAh raw->cc = %llx\n", params->cc_uah, raw->cc);
+ params->cc_uah = calculate_cc(chip, raw->cc, CC, RESET);
+ shdw_cc_uah = calculate_cc(chip, raw->shdw_cc, SHDW_CC, RESET);
+ pr_debug("cc_uah = %duAh raw->cc = %llx, shdw_cc_uah = %duAh raw->shdw_cc = %llx\n",
+ params->cc_uah, raw->cc,
+ shdw_cc_uah, raw->shdw_cc);
soc_rbatt = ((params->ocv_charge_uah - params->cc_uah) * 100)
/ params->fcc_uah;
@@ -1320,8 +1540,9 @@
chip->last_soc = -EINVAL;
chip->last_soc_invalid = true;
mutex_unlock(&chip->last_soc_mutex);
- reset_cc(chip);
+ reset_cc(chip, CLEAR_CC | CLEAR_SHDW_CC);
chip->software_cc_uah = 0;
+ chip->software_shdw_cc_uah = 0;
chip->last_cc_uah = INT_MIN;
stop_ocv_updates(chip);
@@ -1431,7 +1652,7 @@
#define SOC_CATCHUP_SEC_MAX 600
#define SOC_CATCHUP_SEC_PER_PERCENT 60
#define MAX_CATCHUP_SOC (SOC_CATCHUP_SEC_MAX / SOC_CATCHUP_SEC_PER_PERCENT)
-#define SOC_CHANGE_PER_SEC 20
+#define SOC_CHANGE_PER_SEC 5
static int report_cc_based_soc(struct qpnp_bms_chip *chip)
{
int soc, soc_change;
@@ -1443,8 +1664,6 @@
int rc;
bool charging, charging_since_last_report;
- soc = chip->calculated_soc;
-
rc = qpnp_vadc_read(LR_MUX1_BATT_THERM, &result);
if (rc) {
@@ -1457,6 +1676,8 @@
batt_temp = (int)result.physical;
mutex_lock(&chip->last_soc_mutex);
+ soc = chip->calculated_soc;
+
last_change_sec = chip->last_soc_change_sec;
calculate_delta_time(&last_change_sec, &time_since_last_change_sec);
@@ -1550,18 +1771,18 @@
return report_cc_based_soc(chip);
}
-#define VBATT_ERROR_MARGIN 20000
+#define VDD_MAX_ERR 5000
+#define VDD_STEP_SIZE 10000
static int charging_adjustments(struct qpnp_bms_chip *chip,
struct soc_params *params, int soc,
int vbat_uv, int ibat_ua, int batt_temp)
{
int chg_soc, soc_ibat, batt_terminal_uv, weight_ibat, weight_cc;
- batt_terminal_uv = vbat_uv + VBATT_ERROR_MARGIN
- + (ibat_ua * chip->r_conn_mohm) / 1000;
+ batt_terminal_uv = vbat_uv + (ibat_ua * chip->r_conn_mohm) / 1000;
if (chip->soc_at_cv == -EINVAL) {
- if (batt_terminal_uv >= chip->max_voltage_uv) {
+ if (batt_terminal_uv >= chip->max_voltage_uv - VDD_MAX_ERR) {
chip->soc_at_cv = soc;
chip->prev_chg_soc = soc;
chip->ibat_at_cv_ua = ibat_ua;
@@ -1585,7 +1806,7 @@
* if voltage lessened (possibly because of a system load)
* keep reporting the prev chg soc
*/
- if (batt_terminal_uv <= chip->prev_batt_terminal_uv) {
+ if (batt_terminal_uv <= chip->prev_batt_terminal_uv - VDD_STEP_SIZE) {
pr_debug("batt_terminal_uv %d < (max = %d - 10000); CC CHG SOC %d\n",
batt_terminal_uv, chip->prev_batt_terminal_uv,
chip->prev_chg_soc);
@@ -1600,7 +1821,9 @@
weight_ibat = bound_soc(linear_interpolate(1, chip->soc_at_cv,
100, 100, chip->prev_chg_soc));
weight_cc = 100 - weight_ibat;
- chg_soc = bound_soc((soc_ibat * weight_ibat + weight_cc * soc)/100);
+ chg_soc = bound_soc(DIV_ROUND_CLOSEST(soc_ibat * weight_ibat
+ + weight_cc * soc, 100));
+
pr_debug("weight_ibat = %d, weight_cc = %d, soc_ibat = %d, soc_cc = %d\n",
weight_ibat, weight_cc, soc_ibat, soc);
@@ -1828,12 +2051,98 @@
}
}
+static int64_t convert_cc_uah_to_raw(struct qpnp_bms_chip *chip, int64_t cc_uah)
+{
+ int64_t cc_uv, cc_pvh, cc_raw;
+
+ cc_pvh = cc_uah * chip->r_sense_uohm;
+ cc_uv = div_s64(cc_pvh * SLEEP_CLK_HZ * SECONDS_PER_HOUR,
+ CC_READING_TICKS * 1000000LL);
+ cc_raw = div_s64(cc_uv * CC_READING_RESOLUTION_D,
+ CC_READING_RESOLUTION_N);
+ return cc_raw;
+}
+
+#define CC_STEP_INCREMENT_UAH 1500
+#define OCV_STEP_INCREMENT 0x10
+static void configure_soc_wakeup(struct qpnp_bms_chip *chip,
+ struct soc_params *params,
+ int batt_temp, int target_soc)
+{
+ int target_ocv_uv;
+ int64_t target_cc_uah, cc_raw_64, current_shdw_cc_raw_64;
+ int64_t current_shdw_cc_uah, iadc_comp_factor;
+ uint64_t cc_raw, current_shdw_cc_raw;
+ int16_t ocv_raw, current_ocv_raw;
+
+ current_shdw_cc_raw = 0;
+ mutex_lock(&chip->bms_output_lock);
+ lock_output_data(chip);
+ qpnp_read_wrapper(chip, (u8 *)¤t_ocv_raw,
+ chip->base + BMS1_OCV_FOR_SOC_DATA0, 2);
+ unlock_output_data(chip);
+ mutex_unlock(&chip->bms_output_lock);
+ current_shdw_cc_uah = get_prop_bms_charge_counter_shadow(chip);
+ current_shdw_cc_raw_64 = convert_cc_uah_to_raw(chip,
+ current_shdw_cc_uah);
+
+ /*
+ * Calculate the target shadow coulomb counter threshold for when
+ * the SoC changes.
+ *
+ * Since the BMS driver resets the shadow coulomb counter every
+ * 20 seconds when the device is awake, calculate the threshold as
+ * a delta from the current shadow coulomb count.
+ */
+ target_cc_uah = (100 - target_soc)
+ * (params->fcc_uah - params->uuc_uah)
+ / 100 - current_shdw_cc_uah;
+ if (target_cc_uah < 0) {
+ /*
+ * If the target cc is below 0, that means we have already
+ * passed the point where SoC should have fallen.
+ * Set a wakeup in a few more mAh and check back again
+ */
+ target_cc_uah = CC_STEP_INCREMENT_UAH;
+ }
+ iadc_comp_factor = 100000;
+ qpnp_iadc_comp_result(&iadc_comp_factor);
+ target_cc_uah = div64_s64(target_cc_uah * 100000, iadc_comp_factor);
+ target_cc_uah = cc_reverse_adjust_for_gain(target_cc_uah);
+ cc_raw_64 = convert_cc_uah_to_raw(chip, target_cc_uah);
+ cc_raw = convert_s64_to_s36(cc_raw_64);
+
+ find_ocv_for_soc(chip, params, batt_temp, target_soc, &target_ocv_uv);
+ ocv_raw = convert_vbatt_uv_to_raw(chip, target_ocv_uv);
+
+ /*
+ * If the current_ocv_raw was updated since reaching 100% and is lower
+ * than the calculated target ocv threshold, set the new target
+ * threshold 1.5mAh lower in order to check if the SoC changed yet.
+ */
+ if (current_ocv_raw != chip->ocv_reading_at_100
+ && current_ocv_raw < ocv_raw)
+ ocv_raw = current_ocv_raw - OCV_STEP_INCREMENT;
+
+ qpnp_write_wrapper(chip, (u8 *)&cc_raw,
+ chip->base + BMS1_SW_CC_THR0, 5);
+ qpnp_write_wrapper(chip, (u8 *)&ocv_raw,
+ chip->base + BMS1_OCV_THR0, 2);
+
+ pr_debug("current sw_cc_raw = 0x%llx, current ocv = 0x%hx\n",
+ current_shdw_cc_raw, (uint16_t)current_ocv_raw);
+ pr_debug("target_cc_uah = %lld, raw64 = 0x%llx, raw 36 = 0x%llx, ocv_raw = 0x%hx\n",
+ target_cc_uah,
+ (uint64_t)cc_raw_64, cc_raw,
+ (uint16_t)ocv_raw);
+}
+
#define SLEEP_RECALC_INTERVAL 3
static int calculate_state_of_charge(struct qpnp_bms_chip *chip,
struct raw_soc_params *raw,
int batt_temp)
{
- int soc, new_ocv_uv;
+ int soc, new_ocv_uv, previous_soc;
int shutdown_soc, new_calculated_soc, remaining_usable_charge_uah;
struct soc_params params;
@@ -1930,11 +2239,18 @@
/* always clamp soc due to BMS hw/sw immaturities */
new_calculated_soc = clamp_soc_based_on_voltage(chip,
new_calculated_soc);
-
+ /*
+ * If the battery is full, configure the cc threshold so the system
+ * wakes up after SoC changes
+ */
+ if (is_battery_full(chip))
+ configure_soc_wakeup(chip, ¶ms,
+ batt_temp, bound_soc(new_calculated_soc - 1));
done_calculating:
+ mutex_lock(&chip->last_soc_mutex);
+ previous_soc = chip->calculated_soc;
chip->calculated_soc = new_calculated_soc;
pr_debug("CC based calculated SOC = %d\n", chip->calculated_soc);
- mutex_lock(&chip->last_soc_mutex);
if (chip->last_soc_invalid) {
chip->last_soc_invalid = false;
chip->last_soc = -EINVAL;
@@ -1956,7 +2272,7 @@
}
mutex_unlock(&chip->last_soc_mutex);
- if (new_calculated_soc != chip->calculated_soc
+ if (new_calculated_soc != previous_soc
&& chip->bms_psy.name != NULL) {
power_supply_changed(&chip->bms_psy);
pr_debug("power supply changed\n");
@@ -2008,8 +2324,7 @@
struct qpnp_vadc_result result;
struct raw_soc_params raw;
- if (!wake_lock_active(&chip->soc_wake_lock))
- wake_lock(&chip->soc_wake_lock);
+ bms_stay_awake(&chip->soc_wake_source);
mutex_lock(&chip->vbat_monitor_mutex);
qpnp_adc_tm_channel_measure(&chip->vbat_monitor_params);
mutex_unlock(&chip->vbat_monitor_mutex);
@@ -2034,7 +2349,7 @@
mutex_unlock(&chip->last_ocv_uv_mutex);
}
}
- wake_unlock(&chip->soc_wake_lock);
+ bms_relax(&chip->soc_wake_source);
return soc;
}
@@ -2199,7 +2514,8 @@
} else {
pr_debug("unknown voltage notification state: %d\n", state);
}
- power_supply_changed(&chip->bms_psy);
+ if (chip->bms_psy.name != NULL)
+ power_supply_changed(&chip->bms_psy);
}
static int reset_vbat_monitoring(struct qpnp_bms_chip *chip)
@@ -2212,7 +2528,6 @@
pr_err("tm measure failed: %d\n", rc);
return rc;
}
- mutex_lock(&chip->vbat_monitor_mutex);
if (wake_lock_active(&chip->low_voltage_wake_lock)) {
pr_debug("battery removed, releasing wakelock\n");
wake_unlock(&chip->low_voltage_wake_lock);
@@ -2221,7 +2536,6 @@
pr_debug("battery removed, removing in_cv_range state\n");
chip->in_cv_range = false;
}
- mutex_unlock(&chip->vbat_monitor_mutex);
return 0;
}
@@ -2260,14 +2574,275 @@
return 0;
}
+static void readjust_fcc_table(struct qpnp_bms_chip *chip)
+{
+ struct single_row_lut *temp, *old;
+ int i, fcc, ratio;
+
+ if (!chip->enable_fcc_learning)
+ return;
+
+ if (!chip->fcc_temp_lut) {
+ pr_err("The static fcc lut table is NULL\n");
+ return;
+ }
+
+ temp = kzalloc(sizeof(struct single_row_lut), GFP_KERNEL);
+ if (!temp) {
+ pr_err("Cannot allocate memory for adjusted fcc table\n");
+ return;
+ }
+
+ fcc = interpolate_fcc(chip->fcc_temp_lut, chip->fcc_new_batt_temp);
+
+ temp->cols = chip->fcc_temp_lut->cols;
+ for (i = 0; i < chip->fcc_temp_lut->cols; i++) {
+ temp->x[i] = chip->fcc_temp_lut->x[i];
+ ratio = div_u64(chip->fcc_temp_lut->y[i] * 1000, fcc);
+ temp->y[i] = (ratio * chip->fcc_new_mah);
+ temp->y[i] /= 1000;
+ }
+
+ old = chip->adjusted_fcc_temp_lut;
+ chip->adjusted_fcc_temp_lut = temp;
+ kfree(old);
+}
+
+
+static void backup_fcc_new(struct qpnp_bms_chip *chip)
+{
+ int rc = 0;
+ u8 temp = 0;
+
+ if (chip->fcc_new_mah > 0) {
+ rc = qpnp_write_wrapper(chip, (u8 *)&chip->fcc_new_mah,
+ chip->base + FCC_STORAGE_LSB, 2);
+ if (rc)
+ pr_err("Unable to backup new_fcc\n");
+
+ temp = chip->fcc_new_batt_temp / 10;
+ rc = qpnp_write_wrapper(chip, &temp,
+ chip->base + FCC_BATT_TEMP_STORAGE, 1);
+ if (rc)
+ pr_err("Unable to backup fcc temp.\n");
+ }
+}
+
+
+static void backup_charge_cycle(struct qpnp_bms_chip *chip)
+{
+ int rc = 0;
+
+ if (chip->charge_increase >= 0) {
+ rc = qpnp_write_wrapper(chip, &chip->charge_increase,
+ chip->base + CHARGE_INCREASE_STORAGE, 1);
+ if (rc)
+ pr_err("Unable to backup charge_increase\n");
+ }
+
+ if (chip->charge_cycles >= 0) {
+ rc = qpnp_write_wrapper(chip, (u8 *)&chip->charge_cycles,
+ chip->base + CHARGE_CYCLE_STORAGE_LSB, 2);
+ if (rc)
+ pr_err("Unable to backup charge_cycles\n");
+ }
+}
+
+static void restore_fcc_data(struct qpnp_bms_chip *chip)
+{
+ int rc = 0;
+ uint16_t temp_u16 = 0;
+ u8 temp_u8 = 0;
+
+ rc = qpnp_read_wrapper(chip, &temp_u8,
+ chip->base + CHARGE_INCREASE_STORAGE, 1);
+ if (!rc && temp_u8 != 0xFF)
+ chip->charge_increase = temp_u8;
+
+ rc = qpnp_read_wrapper(chip, (u8 *)&temp_u16,
+ chip->base + CHARGE_CYCLE_STORAGE_LSB, 2);
+ if (!rc && temp_u16 != 0xFFFF)
+ chip->charge_cycles = temp_u16;
+
+ rc = qpnp_read_wrapper(chip, (u8 *)&temp_u16,
+ chip->base + FCC_STORAGE_LSB, 2);
+ if (!rc && temp_u16 != 0xFFFF) {
+ chip->fcc_new_mah = temp_u16;
+ } else {
+ pr_debug("Backed-up FCC not initialized, FCC not updated\n");
+ return;
+ }
+
+ rc = qpnp_read_wrapper(chip, &temp_u8,
+ chip->base + FCC_BATT_TEMP_STORAGE, 1);
+ if (!rc && temp_u8 != 0xFF) {
+ chip->fcc_new_batt_temp = (s8)temp_u8 * 10;
+ } else {
+ pr_debug("Backed-up temp. not initialized, FCC not updated\n");
+ return;
+ }
+ /* readjust the FCC table if fcc and temp are valid */
+ readjust_fcc_table(chip);
+}
+
+static int calculate_real_soc(struct qpnp_bms_chip *chip,
+ int batt_temp, struct raw_soc_params *raw, int cc_uah)
+{
+ int fcc_uah, rc_uah;
+
+ fcc_uah = calculate_fcc(chip, batt_temp);
+ rc_uah = calculate_ocv_charge(chip, raw, fcc_uah);
+
+ return ((rc_uah - cc_uah) * 100) / fcc_uah;
+}
+
+static void update_fcc_table_for_temp(struct qpnp_bms_chip *chip,
+ int batt_temp_final)
+{
+ int i, fcc_t1, fcc_t2, fcc_final;
+ struct fcc_data *ft;
+
+ /* Interpolate all the FCC entries to the same temperature */
+ for (i = 0; i < chip->min_fcc_learning_samples; i++) {
+ ft = &chip->fcc_table[i];
+ if (ft->batt_temp == batt_temp_final)
+ continue;
+ fcc_t1 = interpolate_fcc(chip->fcc_temp_lut, ft->batt_temp);
+ fcc_t2 = interpolate_fcc(chip->fcc_temp_lut, batt_temp_final);
+ fcc_final = (ft->fcc_new / fcc_t1) * fcc_t2;
+ ft->fcc_new = fcc_final;
+ ft->batt_temp = batt_temp_final;
+ }
+}
+
+static void update_fcc_learning_table(struct qpnp_bms_chip *chip,
+ int fcc_uah, int new_fcc_uah, int chargecycles, int batt_temp)
+{
+ int i, count, new_fcc_avg = 0, temp_fcc_avg = 0, temp_fcc_delta = 0;
+ struct fcc_data *ft;
+
+ count = last_fcc_update_count % chip->min_fcc_learning_samples;
+ ft = &chip->fcc_table[count];
+ ft->fcc_new = chip->fcc_new_sysfs = new_fcc_uah;
+ ft->batt_temp = batt_temp;
+ ft->chargecycles = chargecycles;
+ last_fcc_update_count++;
+ /* update userspace */
+ sysfs_notify(&chip->dev->kobj, NULL, "fcc_data");
+
+ pr_debug("Updated fcc table. new_fcc=%d, chargecycle=%d, temp=%d fcc_update_count=%d\n",
+ new_fcc_uah, chargecycles, batt_temp, last_fcc_update_count);
+
+ if (last_fcc_update_count < chip->min_fcc_learning_samples) {
+ pr_debug("Not enough FCC samples. Current count = %d\n",
+ last_fcc_update_count);
+ return; /* Not enough samples to update fcc */
+ }
+
+ /* reject entries if they are > 50 chargecycles apart */
+ for (i = 0; i < chip->min_fcc_learning_samples; i++) {
+ if ((chip->fcc_table[i].chargecycles + VALID_FCC_CHGCYL_RANGE)
+ < chargecycles) {
+ pr_debug("Charge cycle too old (> %d cycles apart)\n",
+ VALID_FCC_CHGCYL_RANGE);
+ return; /* Samples old, > 50 cycles apart*/
+ }
+ }
+ /* update the fcc table for temperature difference*/
+ update_fcc_table_for_temp(chip, batt_temp);
+
+ for (i = 0; i < chip->min_fcc_learning_samples; i++)
+ temp_fcc_avg += chip->fcc_table[i].fcc_new;
+
+ temp_fcc_avg /= chip->min_fcc_learning_samples;
+ temp_fcc_delta = div_u64(temp_fcc_avg * DELTA_FCC_PERCENT, 100);
+
+ /* fix the fcc if its an outlier i.e. > 5% of the average */
+ for (i = 0; i < chip->min_fcc_learning_samples; i++) {
+ ft = &chip->fcc_table[i];
+ if (abs(ft->fcc_new - temp_fcc_avg) > temp_fcc_delta)
+ ft->fcc_new = temp_fcc_avg;
+ new_fcc_avg += ft->fcc_new;
+ }
+ new_fcc_avg /= chip->min_fcc_learning_samples;
+
+ chip->fcc_new_mah = new_fcc_avg / 1000;
+ chip->fcc_new_batt_temp = batt_temp;
+ pr_info("FCC update: New fcc_mah=%d, fcc_batt_temp=%d\n",
+ new_fcc_avg, batt_temp);
+ readjust_fcc_table(chip);
+ backup_fcc_new(chip);
+}
+
+static bool is_new_fcc_valid(int new_fcc_uah, int fcc_uah)
+{
+ if ((new_fcc_uah >= (fcc_uah / 2)) &&
+ ((new_fcc_uah * 100) <= (fcc_uah * 105)))
+ return true;
+
+ pr_debug("FCC rejected - not within valid limit\n");
+ return false;
+}
+
+static void fcc_learning_config(struct qpnp_bms_chip *chip, bool start)
+{
+ int rc, batt_temp;
+ struct raw_soc_params raw;
+ struct qpnp_vadc_result result;
+ int fcc_uah, new_fcc_uah, delta_cc_uah, delta_soc;
+
+ rc = qpnp_vadc_read(LR_MUX1_BATT_THERM, &result);
+ if (rc) {
+ pr_err("Unable to read batt_temp\n");
+ return;
+ } else {
+ batt_temp = (int)result.physical;
+ }
+
+ rc = read_soc_params_raw(chip, &raw, batt_temp);
+ if (rc) {
+ pr_err("Unable to read CC, cannot update FCC\n");
+ return;
+ }
+
+ if (start) {
+ chip->start_pc = interpolate_pc(chip->pc_temp_ocv_lut,
+ batt_temp / 10, raw.last_good_ocv_uv / 1000);
+ chip->start_cc_uah = calculate_cc(chip, raw.cc, CC, NORESET);
+ chip->start_real_soc = calculate_real_soc(chip,
+ batt_temp, &raw, chip->start_cc_uah);
+ pr_debug("start_pc=%d, start_cc=%d, start_soc=%d real_soc=%d\n",
+ chip->start_pc, chip->start_cc_uah,
+ chip->start_soc, chip->start_real_soc);
+ } else {
+ chip->end_cc_uah = calculate_cc(chip, raw.cc, CC, NORESET);
+ delta_soc = 100 - chip->start_real_soc;
+ delta_cc_uah = abs(chip->end_cc_uah - chip->start_cc_uah);
+ new_fcc_uah = div_u64(delta_cc_uah * 100, delta_soc);
+ fcc_uah = calculate_fcc(chip, batt_temp);
+ pr_debug("start_soc=%d, start_pc=%d, start_real_soc=%d, start_cc=%d, end_cc=%d, new_fcc=%d\n",
+ chip->start_soc, chip->start_pc, chip->start_real_soc,
+ chip->start_cc_uah, chip->end_cc_uah, new_fcc_uah);
+
+ if (is_new_fcc_valid(new_fcc_uah, fcc_uah))
+ update_fcc_learning_table(chip, fcc_uah,
+ new_fcc_uah, chip->charge_cycles, batt_temp);
+ }
+}
+
static void charging_began(struct qpnp_bms_chip *chip)
{
+
mutex_lock(&chip->last_soc_mutex);
chip->charge_start_tm_sec = 0;
chip->catch_up_time_sec = 0;
mutex_unlock(&chip->last_soc_mutex);
+ chip->start_soc = report_state_of_charge(chip);
+
mutex_lock(&chip->last_ocv_uv_mutex);
+ if (chip->enable_fcc_learning)
+ fcc_learning_config(chip, true);
chip->soc_at_cv = -EINVAL;
chip->prev_chg_soc = -EINVAL;
mutex_unlock(&chip->last_ocv_uv_mutex);
@@ -2280,10 +2855,28 @@
chip->catch_up_time_sec = 0;
mutex_unlock(&chip->last_soc_mutex);
+ chip->end_soc = report_state_of_charge(chip);
+
mutex_lock(&chip->last_ocv_uv_mutex);
chip->soc_at_cv = -EINVAL;
chip->prev_chg_soc = -EINVAL;
+
+ /* update the chargecycles */
+ if (chip->end_soc > chip->start_soc) {
+ chip->charge_increase += (chip->end_soc - chip->start_soc);
+ if (chip->charge_increase > 100) {
+ chip->charge_cycles++;
+ chip->charge_increase = chip->charge_increase % 100;
+ }
+ if (chip->enable_fcc_learning)
+ backup_charge_cycle(chip);
+ }
+
if (get_battery_status(chip) == POWER_SUPPLY_STATUS_FULL) {
+ if (chip->enable_fcc_learning &&
+ (chip->start_soc <= chip->min_fcc_learning_soc) &&
+ (chip->start_pc <= chip->min_fcc_ocv_pc))
+ fcc_learning_config(chip, false);
chip->done_charging = true;
chip->last_soc_invalid = true;
} else if (chip->charging_adjusted_ocv > 0) {
@@ -2291,6 +2884,7 @@
chip->charging_adjusted_ocv);
chip->last_ocv_uv = chip->charging_adjusted_ocv;
}
+
chip->charging_adjusted_ocv = -EINVAL;
mutex_unlock(&chip->last_ocv_uv_mutex);
@@ -2309,8 +2903,20 @@
pr_debug("charging ended\n");
charging_ended(chip);
}
+
+ if (status == POWER_SUPPLY_STATUS_FULL) {
+ pr_debug("battery full\n");
+ enable_bms_irq(&chip->ocv_thr_irq);
+ enable_bms_irq(&chip->sw_cc_thr_irq);
+ } else if (chip->battery_status
+ == POWER_SUPPLY_STATUS_FULL) {
+ pr_debug("battery not full any more\n");
+ disable_bms_irq(&chip->ocv_thr_irq);
+ disable_bms_irq(&chip->sw_cc_thr_irq);
+ }
+
chip->battery_status = status;
- /* a new battery was inserted or removed, so force a soc
+ /* battery charge status has changed, so force a soc
* recalculation to update the SoC */
schedule_work(&chip->recalc_work);
}
@@ -2344,45 +2950,6 @@
return report_state_of_charge(chip);
}
-/* Returns estimated battery resistance */
-static int get_prop_bms_batt_resistance(struct qpnp_bms_chip *chip)
-{
- return chip->rbatt_mohm * 1000;
-}
-
-/* Returns instantaneous current in uA */
-static int get_prop_bms_current_now(struct qpnp_bms_chip *chip)
-{
- int rc, result_ua;
-
- rc = get_battery_current(chip, &result_ua);
- if (rc) {
- pr_err("failed to get current: %d\n", rc);
- return rc;
- }
- return result_ua;
-}
-
-/* Returns coulomb counter in uAh */
-static int get_prop_bms_charge_counter(struct qpnp_bms_chip *chip)
-{
- int64_t cc_raw;
-
- mutex_lock(&chip->bms_output_lock);
- lock_output_data(chip);
- read_cc_raw(chip, &cc_raw);
- unlock_output_data(chip);
- mutex_unlock(&chip->bms_output_lock);
-
- return calculate_cc(chip, cc_raw, false);
-}
-
-/* Returns full charge design in uAh */
-static int get_prop_bms_charge_full_design(struct qpnp_bms_chip *chip)
-{
- return chip->fcc_mah * 1000;
-}
-
static void qpnp_bms_external_power_changed(struct power_supply *psy)
{
struct qpnp_bms_chip *chip = container_of(psy, struct qpnp_bms_chip,
@@ -2412,15 +2979,138 @@
case POWER_SUPPLY_PROP_CHARGE_COUNTER:
val->intval = get_prop_bms_charge_counter(chip);
break;
+ case POWER_SUPPLY_PROP_CHARGE_COUNTER_SHADOW:
+ val->intval = get_prop_bms_charge_counter_shadow(chip);
+ break;
case POWER_SUPPLY_PROP_CHARGE_FULL_DESIGN:
val->intval = get_prop_bms_charge_full_design(chip);
break;
+ case POWER_SUPPLY_PROP_CYCLE_COUNT:
+ val->intval = chip->charge_cycles;
+ break;
default:
return -EINVAL;
}
return 0;
}
+static ssize_t fcc_data_set(struct device *dev, struct device_attribute *attr,
+ const char *buf, size_t count)
+{
+ struct qpnp_bms_chip *chip = dev_get_drvdata(dev);
+ static int i;
+ int fcc_new = 0, rc;
+
+ if (chip->fcc_update_complete) {
+ pr_debug("Invalid FCC update\n");
+ return count;
+ }
+
+ i %= chip->min_fcc_learning_samples;
+ rc = sscanf(buf, "%d", &fcc_new);
+ if (rc != 1)
+ return -EINVAL;
+ chip->fcc_table[i].fcc_new = fcc_new;
+ pr_debug("Rcvd: [%d] fcc_new=%d\n", i, fcc_new);
+ i++;
+
+ return count;
+}
+
+static ssize_t fcc_data_get(struct device *dev, struct device_attribute *attr,
+ char *buf)
+{
+ int count = 0;
+ struct qpnp_bms_chip *chip = dev_get_drvdata(dev);
+
+ count = snprintf(buf, PAGE_SIZE, "%d", chip->fcc_new_sysfs);
+ pr_debug("Sent: fcc_new=%d\n", chip->fcc_new_sysfs);
+ chip->fcc_update_complete = 1;
+
+ return count;
+}
+
+static ssize_t fcc_temp_set(struct device *dev, struct device_attribute *attr,
+ const char *buf, size_t count)
+{
+ static int i;
+ int batt_temp = 0, rc;
+ struct qpnp_bms_chip *chip = dev_get_drvdata(dev);
+
+ if (chip->fcc_update_complete)
+ return count;
+
+ i %= chip->min_fcc_learning_samples;
+ rc = sscanf(buf, "%d", &batt_temp);
+ if (rc != 1)
+ return -EINVAL;
+ chip->fcc_table[i].batt_temp = batt_temp;
+ pr_debug("Rcvd: [%d] batt_temp=%d\n", i, batt_temp);
+ i++;
+
+ return count;
+}
+
+static ssize_t fcc_chgcyl_set(struct device *dev, struct device_attribute *attr,
+ const char *buf, size_t count)
+{
+ static int i;
+ int chargecycle = 0, rc;
+ struct qpnp_bms_chip *chip = dev_get_drvdata(dev);
+
+ if (chip->fcc_update_complete)
+ return count;
+
+ i %= chip->min_fcc_learning_samples;
+ rc = sscanf(buf, "%d", &chargecycle);
+ if (rc != 1)
+ return -EINVAL;
+ chip->fcc_table[i].chargecycles = chargecycle;
+ pr_debug("Rcvd: [%d] chargecycle=%d\n", i, chargecycle);
+ i++;
+
+ return count;
+}
+
+static ssize_t fcc_list_get(struct device *dev, struct device_attribute *attr,
+ char *buf)
+{
+ struct qpnp_bms_chip *chip = dev_get_drvdata(dev);
+ struct fcc_data *ft;
+ int i = 0, j, count = 0;
+
+ if (last_fcc_update_count < chip->min_fcc_learning_samples)
+ i = last_fcc_update_count;
+ else
+ i = chip->min_fcc_learning_samples;
+
+ for (j = 0; j < i; j++) {
+ ft = &chip->fcc_table[j];
+ count += snprintf(buf + count, PAGE_SIZE - count,
+ "%d %d %d\n", ft->fcc_new, ft->chargecycles,
+ ft->batt_temp);
+ }
+
+ return count;
+}
+
+static DEVICE_ATTR(fcc_data, 0664, fcc_data_get, fcc_data_set);
+static DEVICE_ATTR(fcc_temp, 0664, NULL, fcc_temp_set);
+static DEVICE_ATTR(fcc_chgcyl, 0664, NULL, fcc_chgcyl_set);
+static DEVICE_ATTR(fcc_list, 0664, fcc_list_get, NULL);
+
+static struct attribute *fcc_attrs[] = {
+ &dev_attr_fcc_data.attr,
+ &dev_attr_fcc_temp.attr,
+ &dev_attr_fcc_chgcyl.attr,
+ &dev_attr_fcc_list.attr,
+ NULL
+};
+
+static const struct attribute_group fcc_attr_group = {
+ .attrs = fcc_attrs,
+};
+
#define OCV_USE_LIMIT_EN BIT(7)
static int set_ocv_voltage_thresholds(struct qpnp_bms_chip *chip,
int low_voltage_threshold,
@@ -2510,6 +3200,26 @@
chip->shutdown_soc_invalid);
}
+static irqreturn_t bms_ocv_thr_irq_handler(int irq, void *_chip)
+{
+ struct qpnp_bms_chip *chip = _chip;
+
+ pr_debug("ocv_thr irq triggered\n");
+ bms_stay_awake(&chip->soc_wake_source);
+ schedule_work(&chip->recalc_work);
+ return IRQ_HANDLED;
+}
+
+static irqreturn_t bms_sw_cc_thr_irq_handler(int irq, void *_chip)
+{
+ struct qpnp_bms_chip *chip = _chip;
+
+ pr_debug("sw_cc_thr irq triggered\n");
+ bms_stay_awake(&chip->soc_wake_source);
+ schedule_work(&chip->recalc_work);
+ return IRQ_HANDLED;
+}
+
#define PALLADIUM_ID_MIN 0x7F40
#define PALLADIUM_ID_MAX 0x7F5A
#define DESAY_5200_ID_MIN 0x7F7F
@@ -2544,6 +3254,8 @@
batt_data = &oem_batt_data;
} else if (chip->batt_type == BATT_QRD_4V35_2000MAH) {
batt_data = &QRD_4v35_2000mAh_data;
+ } else if (chip->batt_type == BATT_QRD_4V2_1300MAH) {
+ batt_data = &qrd_4v2_1300mah_data;
} else {
battery_id = read_battery_id(chip);
if (battery_id < 0) {
@@ -2640,6 +3352,23 @@
if (chip->adjust_soc_low_threshold >= 45)
chip->adjust_soc_low_threshold = 45;
+ chip->enable_fcc_learning = of_property_read_bool(
+ chip->spmi->dev.of_node, "qcom,enable-fcc-learning");
+ if (chip->enable_fcc_learning) {
+ SPMI_PROP_READ(min_fcc_learning_soc,
+ "min-fcc-learning-soc", rc);
+ SPMI_PROP_READ(min_fcc_ocv_pc,
+ "min-fcc-ocv-pc", rc);
+ SPMI_PROP_READ(min_fcc_learning_samples,
+ "min-fcc-learning-samples", rc);
+ chip->fcc_table = kzalloc((sizeof(struct fcc_data) *
+ chip->min_fcc_learning_samples), GFP_KERNEL);
+ pr_debug("min-fcc-soc=%d, min-fcc-pc=%d, min-fcc-cycles=%d\n",
+ chip->min_fcc_learning_soc, chip->min_fcc_ocv_pc,
+ chip->min_fcc_learning_samples);
+ min_fcc_cycles = chip->min_fcc_learning_samples;
+ }
+
pr_debug("dts data: r_sense_uohm:%d, v_cutoff_uv:%d, max_v:%d\n",
chip->r_sense_uohm, chip->v_cutoff_uv,
chip->max_voltage_uv);
@@ -2671,6 +3400,35 @@
chip->first_time_calc_uuc = 1;
}
+#define SPMI_SETUP_IRQ(irq_name) \
+do { \
+ chip->irq_name##_irq.irq = spmi_get_irq_byname(chip->spmi, \
+ resource, #irq_name); \
+ if (chip->irq_name##_irq.irq < 0) { \
+ pr_err("Unable to get " #irq_name " irq\n"); \
+ return -ENXIO; \
+ } \
+ rc = devm_request_irq(chip->dev, chip->irq_name##_irq.irq, \
+ bms_##irq_name##_irq_handler, \
+ IRQF_TRIGGER_RISING, #irq_name, chip); \
+ if (rc < 0) { \
+ pr_err("Unable to request " #irq_name " irq: %d\n", rc);\
+ return -ENXIO; \
+ } \
+} while (0)
+
+static int bms_setup_irqs(struct qpnp_bms_chip *chip,
+ struct spmi_resource *resource)
+{
+ int rc;
+
+ SPMI_SETUP_IRQ(sw_cc_thr);
+ enable_irq_wake(chip->sw_cc_thr_irq.irq);
+ SPMI_SETUP_IRQ(ocv_thr);
+ enable_irq_wake(chip->ocv_thr_irq.irq);
+ return 0;
+}
+
#define REG_OFFSET_PERP_TYPE 0x04
#define REG_OFFSET_PERP_SUBTYPE 0x05
#define BMS_BMS_TYPE 0xD
@@ -2718,6 +3476,11 @@
if (type == BMS_BMS_TYPE && subtype == BMS_BMS1_SUBTYPE) {
chip->base = resource->start;
+ rc = bms_setup_irqs(chip, spmi_resource);
+ if (rc) {
+ pr_err("Could not register irqs\n");
+ return rc;
+ }
} else if (type == BMS_IADC_TYPE
&& (subtype == BMS_IADC1_SUBTYPE
|| subtype == BMS_IADC2_SUBTYPE)) {
@@ -2776,8 +3539,9 @@
EXTERNAL_RSENSE, rc);
return rc;
}
- reset_cc(chip);
+ reset_cc(chip, CLEAR_CC | CLEAR_SHDW_CC);
chip->software_cc_uah = 0;
+ chip->software_shdw_cc_uah = 0;
}
} else {
pr_debug("Internal rsense selected\n");
@@ -2793,8 +3557,8 @@
INTERNAL_RSENSE, rc);
return rc;
}
- reset_cc(chip);
- chip->software_cc_uah = 0;
+ reset_cc(chip, CLEAR_CC | CLEAR_SHDW_CC);
+ chip->software_shdw_cc_uah = 0;
}
rc = qpnp_iadc_get_rsense(&rds_rsense_nohm);
@@ -2868,6 +3632,28 @@
return 0;
}
+static void check_battery_removal(struct qpnp_bms_chip *chip)
+{
+ int rc;
+ u8 temp = 0;
+
+ /* check if battery was removed at PON */
+ rc = qpnp_read_wrapper(chip, &temp,
+ chip->base + BMS_BATT_REMOVED_REG, 1);
+ if (temp == 0xFF) {
+ pr_debug("New battery inserted at PON\n");
+ temp = battery_removed = 1;
+ rc = qpnp_write_wrapper(chip, &temp,
+ chip->base + BMS_BATT_REMOVED_REG, 1);
+ if (rc)
+ pr_err("Unable to set BMS_BATT_REMOVED_REG\n");
+ } else {
+ if (rc)
+ pr_err("Unable to read BMS_BATT_REMOVED_REG\n");
+ battery_removed = 0;
+ }
+}
+
static int __devinit qpnp_bms_probe(struct spmi_device *spmi)
{
struct qpnp_bms_chip *chip;
@@ -2958,8 +3744,7 @@
mutex_init(&chip->soc_invalidation_mutex);
mutex_init(&chip->last_soc_mutex);
- wake_lock_init(&chip->soc_wake_lock, WAKE_LOCK_SUSPEND,
- "qpnp_soc_lock");
+ wakeup_source_init(&chip->soc_wake_source.source, "qpnp_soc_wake");
wake_lock_init(&chip->low_voltage_wake_lock, WAKE_LOCK_SUSPEND,
"qpnp_low_voltage_lock");
wake_lock_init(&chip->cv_wake_lock, WAKE_LOCK_SUSPEND,
@@ -2970,9 +3755,21 @@
read_shutdown_soc_and_iavg(chip);
+ if (chip->enable_fcc_learning) {
+ restore_fcc_data(chip);
+ rc = sysfs_create_group(&spmi->dev.kobj, &fcc_attr_group);
+ if (rc) {
+ pr_err("Unable to create sysfs entries\n");
+ goto error_setup;
+ }
+ }
+
dev_set_drvdata(&spmi->dev, chip);
device_init_wakeup(&spmi->dev, 1);
+ check_battery_removal(chip);
+
+
rc = setup_vbat_monitoring(chip);
if (rc < 0) {
pr_err("failed to set up voltage notifications: %d\n", rc);
@@ -2985,6 +3782,9 @@
goto error_setup;
}
+ battery_insertion_check(chip);
+ battery_status_check(chip);
+
calculate_soc_work(&(chip->calculate_soc_delayed_work.work));
/* setup & register the battery power supply */
@@ -3022,7 +3822,7 @@
power_supply_unregister(&chip->bms_psy);
error_setup:
dev_set_drvdata(&spmi->dev, NULL);
- wake_lock_destroy(&chip->soc_wake_lock);
+ wakeup_source_trash(&chip->soc_wake_source.source);
wake_lock_destroy(&chip->low_voltage_wake_lock);
wake_lock_destroy(&chip->cv_wake_lock);
error_resource:
@@ -3074,9 +3874,8 @@
- (int)(time_since_last_recalc * 1000));
}
- if (!wake_lock_active(&chip->soc_wake_lock)
- && time_until_next_recalc == 0)
- wake_lock(&chip->soc_wake_lock);
+ if (time_until_next_recalc == 0)
+ bms_stay_awake(&chip->soc_wake_source);
schedule_delayed_work(&chip->calculate_soc_delayed_work,
round_jiffies_relative(msecs_to_jiffies
(time_until_next_recalc)));
diff --git a/drivers/power/qpnp-charger.c b/drivers/power/qpnp-charger.c
index ef3b12f..85bdd67 100644
--- a/drivers/power/qpnp-charger.c
+++ b/drivers/power/qpnp-charger.c
@@ -940,6 +940,20 @@
}
static int
+qpnp_dc_property_is_writeable(struct power_supply *psy,
+ enum power_supply_property psp)
+{
+ switch (psp) {
+ case POWER_SUPPLY_PROP_CURRENT_MAX:
+ return 1;
+ default:
+ break;
+ }
+
+ return 0;
+}
+
+static int
qpnp_batt_property_is_writeable(struct power_supply *psy,
enum power_supply_property psp)
{
@@ -1036,6 +1050,7 @@
static enum power_supply_property pm_power_props_mains[] = {
POWER_SUPPLY_PROP_PRESENT,
POWER_SUPPLY_PROP_ONLINE,
+ POWER_SUPPLY_PROP_CURRENT_MAX,
};
static enum power_supply_property msm_batt_power_props[] = {
@@ -1053,6 +1068,7 @@
POWER_SUPPLY_PROP_CHARGE_FULL_DESIGN,
POWER_SUPPLY_PROP_TEMP,
POWER_SUPPLY_PROP_SYSTEM_TEMP_LEVEL,
+ POWER_SUPPLY_PROP_CYCLE_COUNT,
};
static char *pm_power_supplied_to[] = {
@@ -1081,6 +1097,9 @@
val->intval = qpnp_chg_is_dc_chg_plugged_in(chip);
break;
+ case POWER_SUPPLY_PROP_CURRENT_MAX:
+ val->intval = chip->maxinput_dc_ma;
+ break;
default:
return -EINVAL;
}
@@ -1264,22 +1283,25 @@
if (chip->use_default_batt_values || !get_prop_batt_present(chip))
return DEFAULT_TEMP;
- if (chip->revision > 0) {
- rc = qpnp_vadc_read(LR_MUX1_BATT_THERM, &results);
- if (rc) {
- pr_debug("Unable to read batt temperature rc=%d\n", rc);
- return 0;
- }
- pr_debug("get_bat_temp %d %lld\n",
- results.adc_code, results.physical);
- return (int)results.physical;
- } else {
- pr_debug("batt temp not supported for PMIC 1.0 rc=%d\n", rc);
+ rc = qpnp_vadc_read(LR_MUX1_BATT_THERM, &results);
+ if (rc) {
+ pr_debug("Unable to read batt temperature rc=%d\n", rc);
+ return 0;
}
+ pr_debug("get_bat_temp %d %lld\n",
+ results.adc_code, results.physical);
- /* return default temperature to avoid userspace
- * from shutting down unecessarily */
- return DEFAULT_TEMP;
+ return (int)results.physical;
+}
+
+static int get_prop_cycle_count(struct qpnp_chg_chip *chip)
+{
+ union power_supply_propval ret = {0,};
+
+ if (chip->bms_psy)
+ chip->bms_psy->get_property(chip->bms_psy,
+ POWER_SUPPLY_PROP_CYCLE_COUNT, &ret);
+ return ret.intval;
}
static void
@@ -1364,6 +1386,9 @@
case POWER_SUPPLY_PROP_SYSTEM_TEMP_LEVEL:
val->intval = chip->therm_lvl_sel;
break;
+ case POWER_SUPPLY_PROP_CYCLE_COUNT:
+ val->intval = get_prop_cycle_count(chip);
+ break;
default:
return -EINVAL;
}
@@ -2042,6 +2067,36 @@
}
static int
+qpnp_dc_power_set_property(struct power_supply *psy,
+ enum power_supply_property psp,
+ const union power_supply_propval *val)
+{
+ struct qpnp_chg_chip *chip = container_of(psy, struct qpnp_chg_chip,
+ dc_psy);
+ int rc = 0;
+
+ switch (psp) {
+ case POWER_SUPPLY_PROP_CURRENT_MAX:
+ if (!val->intval)
+ break;
+
+ rc = qpnp_chg_idcmax_set(chip, val->intval / 1000);
+ if (rc) {
+ pr_err("Error setting idcmax property %d\n", rc);
+ return rc;
+ }
+ chip->maxinput_dc_ma = (val->intval / 1000);
+
+ break;
+ default:
+ return -EINVAL;
+ }
+
+ power_supply_changed(&chip->dc_psy);
+ return rc;
+}
+
+static int
qpnp_batt_power_set_property(struct power_supply *psy,
enum power_supply_property psp,
const union power_supply_propval *val)
@@ -2171,7 +2226,7 @@
rc |= devm_request_irq(chip->dev,
chip->chg_vbatdet_lo.irq,
qpnp_chg_vbatdet_lo_irq_handler,
- IRQF_TRIGGER_RISING,
+ IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING,
"vbat-det-lo", chip);
if (rc < 0) {
pr_err("Can't request %d vbat-det-lo: %d\n",
@@ -2345,7 +2400,7 @@
return rc;
rc = qpnp_chg_masked_write(chip,
- chip->chgr_base + CHGR_BUCK_BCK_VBAT_REG_MODE,
+ chip->buck_base + CHGR_BUCK_BCK_VBAT_REG_MODE,
BUCK_VBAT_REG_NODE_SEL_BIT,
BUCK_VBAT_REG_NODE_SEL_BIT, 1);
if (rc) {
@@ -2675,6 +2730,39 @@
if (rc)
goto fail_chg_enable;
+ /* Check if bat_if is set in DT and make sure VADC is present */
+ spmi_for_each_container_dev(spmi_resource, spmi) {
+ if (!spmi_resource) {
+ pr_err("qpnp_chg: spmi resource absent\n");
+ rc = -ENXIO;
+ goto fail_chg_enable;
+ }
+
+ resource = spmi_get_resource(spmi, spmi_resource,
+ IORESOURCE_MEM, 0);
+ if (!(resource && resource->start)) {
+ pr_err("node %s IO resource absent!\n",
+ spmi->dev.of_node->full_name);
+ rc = -ENXIO;
+ goto fail_chg_enable;
+ }
+
+ rc = qpnp_chg_read(chip, &subtype,
+ resource->start + REG_OFFSET_PERP_SUBTYPE, 1);
+ if (rc) {
+ pr_err("Peripheral subtype read failed rc=%d\n", rc);
+ goto fail_chg_enable;
+ }
+
+ if (subtype == SMBB_BAT_IF_SUBTYPE ||
+ subtype == SMBBP_BAT_IF_SUBTYPE ||
+ subtype == SMBCL_BAT_IF_SUBTYPE){
+ rc = qpnp_vadc_is_ready();
+ if (rc)
+ goto fail_chg_enable;
+ }
+ }
+
spmi_for_each_container_dev(spmi_resource, spmi) {
if (!spmi_resource) {
pr_err("qpnp_chg: spmi resource absent\n");
@@ -2806,10 +2894,6 @@
device_init_wakeup(&spmi->dev, 1);
if (chip->bat_if_base) {
- rc = qpnp_vadc_is_ready();
- if (rc)
- goto fail_chg_enable;
-
chip->batt_psy.name = "battery";
chip->batt_psy.type = POWER_SUPPLY_TYPE_BATTERY;
chip->batt_psy.properties = msm_batt_power_props;
@@ -2847,6 +2931,9 @@
chip->dc_psy.properties = pm_power_props_mains;
chip->dc_psy.num_properties = ARRAY_SIZE(pm_power_props_mains);
chip->dc_psy.get_property = qpnp_power_get_property_mains;
+ chip->dc_psy.set_property = qpnp_dc_power_set_property;
+ chip->dc_psy.property_is_writeable =
+ qpnp_dc_property_is_writeable;
rc = power_supply_register(chip->dev, &chip->dc_psy);
if (rc < 0) {
@@ -2866,7 +2953,8 @@
}
}
- if (chip->cool_bat_decidegc && chip->warm_bat_decidegc) {
+ if (chip->cool_bat_decidegc && chip->warm_bat_decidegc
+ && chip->bat_if_base) {
chip->adc_param.low_temp = chip->cool_bat_decidegc;
chip->adc_param.high_temp = chip->warm_bat_decidegc;
chip->adc_param.timer_interval = ADC_MEAS2_INTERVAL_1S;
@@ -2896,6 +2984,7 @@
}
qpnp_chg_usb_usbin_valid_irq_handler(USBIN_VALID_IRQ, chip);
+ qpnp_chg_dc_dcin_valid_irq_handler(DCIN_VALID_IRQ, chip);
power_supply_set_present(chip->usb_psy,
qpnp_chg_is_usb_chg_plugged_in(chip));
diff --git a/drivers/slimbus/slim-msm-ctrl.c b/drivers/slimbus/slim-msm-ctrl.c
index 4a3ea76..97d47db 100644
--- a/drivers/slimbus/slim-msm-ctrl.c
+++ b/drivers/slimbus/slim-msm-ctrl.c
@@ -325,35 +325,7 @@
}
pstat = readl_relaxed(PGD_THIS_EE(PGD_PORT_INT_ST_EEn, dev->ver));
if (pstat != 0) {
- int i = 0;
- for (i = dev->pipe_b; i < MSM_SLIM_NPORTS; i++) {
- if (pstat & 1 << i) {
- u32 val = readl_relaxed(PGD_PORT(PGD_PORT_STATn,
- i, dev->ver));
- if (val & (1 << 19)) {
- dev->ctrl.ports[i].err =
- SLIM_P_DISCONNECT;
- dev->pipes[i-dev->pipe_b].connected =
- false;
- /*
- * SPS will call completion since
- * ERROR flags are registered
- */
- } else if (val & (1 << 2))
- dev->ctrl.ports[i].err =
- SLIM_P_OVERFLOW;
- else if (val & (1 << 3))
- dev->ctrl.ports[i].err =
- SLIM_P_UNDERFLOW;
- }
- writel_relaxed(1, PGD_THIS_EE(PGD_PORT_INT_CL_EEn,
- dev->ver));
- }
- /*
- * Guarantee that port interrupt bit(s) clearing writes go
- * through before exiting ISR
- */
- mb();
+ return msm_slim_port_irq_handler(dev, pstat);
}
return IRQ_HANDLED;
@@ -446,16 +418,13 @@
if (mc != SLIM_MSG_MC_DISCONNECT_PORT)
dev->err = msm_slim_connect_pipe_port(dev, *puc);
else {
- struct msm_slim_endp *endpoint = &dev->pipes[*puc];
- struct sps_register_event sps_event;
- memset(&sps_event, 0, sizeof(sps_event));
- sps_register_event(endpoint->sps, &sps_event);
- sps_disconnect(endpoint->sps);
/*
* Remove channel disconnects master-side ports from
* channel. No need to send that again on the bus
+ * Only disable port
*/
- dev->pipes[*puc].connected = false;
+ writel_relaxed(0, PGD_PORT(PGD_PORT_CFGn,
+ (*puc + dev->port_b), dev->ver));
mutex_unlock(&dev->tx_lock);
if (msgv >= 0)
msm_slim_put_ctrl(dev);
@@ -468,7 +437,7 @@
msm_slim_put_ctrl(dev);
return dev->err;
}
- *(puc) = *(puc) + dev->pipe_b;
+ *(puc) = *(puc) + dev->port_b;
}
if (txn->mt == SLIM_MSG_MT_CORE &&
mc == SLIM_MSG_MC_BEGIN_RECONFIGURATION)
@@ -1258,7 +1227,8 @@
dev->ctrl.set_laddr = msm_set_laddr;
dev->ctrl.xfer_msg = msm_xfer_msg;
dev->ctrl.wakeup = msm_clk_pause_wakeup;
- dev->ctrl.config_port = msm_config_port;
+ dev->ctrl.alloc_port = msm_alloc_port;
+ dev->ctrl.dealloc_port = msm_dealloc_port;
dev->ctrl.port_xfer = msm_slim_port_xfer;
dev->ctrl.port_xfer_status = msm_slim_port_xfer_status;
/* Reserve some messaging BW for satellite-apps driver communication */
diff --git a/drivers/slimbus/slim-msm-ngd.c b/drivers/slimbus/slim-msm-ngd.c
index 6962d53..509c1e8 100644
--- a/drivers/slimbus/slim-msm-ngd.c
+++ b/drivers/slimbus/slim-msm-ngd.c
@@ -89,6 +89,7 @@
struct msm_slim_ctrl *dev = (struct msm_slim_ctrl *)d;
void __iomem *ngd = dev->base + NGD_BASE(dev->ctrl.nr, dev->ver);
u32 stat = readl_relaxed(ngd + NGD_INT_STAT);
+ u32 pstat;
if (stat & NGD_INT_TX_MSG_SENT) {
writel_relaxed(NGD_INT_TX_MSG_SENT, ngd + NGD_INT_CLR);
@@ -147,6 +148,10 @@
mb();
dev_err(dev->dev, "NGD IE VE change");
}
+
+ pstat = readl_relaxed(PGD_THIS_EE(PGD_PORT_INT_ST_EEn, dev->ver));
+ if (pstat != 0)
+ return msm_slim_port_irq_handler(dev, pstat);
return IRQ_HANDLED;
}
@@ -357,19 +362,16 @@
txn->mc == SLIM_USR_MC_CONNECT_SINK ||
txn->mc == SLIM_USR_MC_DISCONNECT_PORT) && txn->wbuf &&
wbuf[0] == dev->pgdla) {
- if (txn->mc != SLIM_MSG_MC_DISCONNECT_PORT)
+ if (txn->mc != SLIM_USR_MC_DISCONNECT_PORT)
dev->err = msm_slim_connect_pipe_port(dev, wbuf[1]);
else {
- struct msm_slim_endp *endpoint = &dev->pipes[wbuf[1]];
- struct sps_register_event sps_event;
- memset(&sps_event, 0, sizeof(sps_event));
- sps_register_event(endpoint->sps, &sps_event);
- sps_disconnect(endpoint->sps);
/*
* Remove channel disconnects master-side ports from
* channel. No need to send that again on the bus
+ * Only disable port
*/
- dev->pipes[wbuf[1]].connected = false;
+ writel_relaxed(0, PGD_PORT(PGD_PORT_CFGn,
+ (wbuf[1] + dev->port_b), dev->ver));
mutex_unlock(&dev->tx_lock);
msm_slim_put_ctrl(dev);
return 0;
@@ -1083,7 +1085,8 @@
dev->ctrl.allocbw = ngd_allocbw;
dev->ctrl.xfer_msg = ngd_xfer_msg;
dev->ctrl.wakeup = ngd_clk_pause_wakeup;
- dev->ctrl.config_port = msm_config_port;
+ dev->ctrl.alloc_port = msm_alloc_port;
+ dev->ctrl.dealloc_port = msm_dealloc_port;
dev->ctrl.port_xfer = msm_slim_port_xfer;
dev->ctrl.port_xfer_status = msm_slim_port_xfer_status;
dev->bam_mem = bam_mem;
diff --git a/drivers/slimbus/slim-msm.c b/drivers/slimbus/slim-msm.c
index 0166196..a63ee76 100644
--- a/drivers/slimbus/slim-msm.c
+++ b/drivers/slimbus/slim-msm.c
@@ -73,6 +73,52 @@
#endif
}
+irqreturn_t msm_slim_port_irq_handler(struct msm_slim_ctrl *dev, u32 pstat)
+{
+ int i;
+ u32 int_en = readl_relaxed(PGD_THIS_EE(PGD_PORT_INT_EN_EEn,
+ dev->ver));
+ /*
+ * different port-interrupt than what we enabled, ignore.
+ * This may happen if overflow/underflow is reported, but
+ * was disabled due to unavailability of buffers provided by
+ * client.
+ */
+ if ((pstat & int_en) == 0)
+ return IRQ_HANDLED;
+ for (i = dev->port_b; i < MSM_SLIM_NPORTS; i++) {
+ if (pstat & (1 << i)) {
+ u32 val = readl_relaxed(PGD_PORT(PGD_PORT_STATn,
+ i, dev->ver));
+ if (val & MSM_PORT_OVERFLOW) {
+ dev->ctrl.ports[i-dev->port_b].err =
+ SLIM_P_OVERFLOW;
+ } else if (val & MSM_PORT_UNDERFLOW) {
+ dev->ctrl.ports[i-dev->port_b].err =
+ SLIM_P_UNDERFLOW;
+ }
+ }
+ }
+ /*
+ * Disable port interrupt here. Re-enable when more
+ * buffers are provided for this port.
+ */
+ writel_relaxed((int_en & (~pstat)),
+ PGD_THIS_EE(PGD_PORT_INT_EN_EEn,
+ dev->ver));
+ /* clear port interrupts */
+ writel_relaxed(pstat, PGD_THIS_EE(PGD_PORT_INT_CL_EEn,
+ dev->ver));
+ pr_info("disabled overflow/underflow for port 0x%x", pstat);
+
+ /*
+ * Guarantee that port interrupt bit(s) clearing writes go
+ * through before exiting ISR
+ */
+ mb();
+ return IRQ_HANDLED;
+}
+
int msm_slim_init_endpoint(struct msm_slim_ctrl *dev, struct msm_slim_endp *ep)
{
int ret;
@@ -138,17 +184,27 @@
void msm_hw_set_port(struct msm_slim_ctrl *dev, u8 pn)
{
u32 set_cfg = DEF_WATERMARK | DEF_ALIGN | DEF_PACK | ENABLE_PORT;
- u32 int_port = readl_relaxed(PGD_THIS_EE(PGD_PORT_INT_EN_EEn,
- dev->ver));
writel_relaxed(set_cfg, PGD_PORT(PGD_PORT_CFGn, pn, dev->ver));
writel_relaxed(DEF_BLKSZ, PGD_PORT(PGD_PORT_BLKn, pn, dev->ver));
writel_relaxed(DEF_TRANSZ, PGD_PORT(PGD_PORT_TRANn, pn, dev->ver));
- writel_relaxed((int_port | 1 << pn) , PGD_THIS_EE(PGD_PORT_INT_EN_EEn,
- dev->ver));
/* Make sure that port registers are updated before returning */
mb();
}
+static void msm_slim_disconn_pipe_port(struct msm_slim_ctrl *dev, u8 pn)
+{
+ struct msm_slim_endp *endpoint = &dev->pipes[pn];
+ struct sps_register_event sps_event;
+ writel_relaxed(0, PGD_PORT(PGD_PORT_CFGn, (pn + dev->port_b),
+ dev->ver));
+ /* Make sure port register is updated */
+ mb();
+ memset(&sps_event, 0, sizeof(sps_event));
+ sps_register_event(endpoint->sps, &sps_event);
+ sps_disconnect(endpoint->sps);
+ dev->pipes[pn].connected = false;
+}
+
int msm_slim_connect_pipe_port(struct msm_slim_ctrl *dev, u8 pn)
{
struct msm_slim_endp *endpoint = &dev->pipes[pn];
@@ -162,16 +218,26 @@
cfg->options = SPS_O_DESC_DONE | SPS_O_ERROR |
SPS_O_ACK_TRANSFERS | SPS_O_AUTO_ENABLE;
- if (dev->pipes[pn].connected) {
- ret = sps_set_config(dev->pipes[pn].sps, cfg);
- if (ret) {
- dev_err(dev->dev, "sps pipe-port set config erro:%x\n",
- ret);
- return ret;
+ if (dev->pipes[pn].connected &&
+ dev->ctrl.ports[pn].state == SLIM_P_CFG) {
+ return -EISCONN;
+ } else if (dev->pipes[pn].connected) {
+ writel_relaxed(0, PGD_PORT(PGD_PORT_CFGn, (pn + dev->port_b),
+ dev->ver));
+ /* Make sure port disabling goes through */
+ mb();
+ /* Is pipe already connected in desired direction */
+ if ((dev->ctrl.ports[pn].flow == SLIM_SRC &&
+ cfg->mode == SPS_MODE_DEST) ||
+ (dev->ctrl.ports[pn].flow == SLIM_SINK &&
+ cfg->mode == SPS_MODE_SRC)) {
+ msm_hw_set_port(dev, pn + dev->port_b);
+ return 0;
}
+ msm_slim_disconn_pipe_port(dev, pn);
}
- stat = readl_relaxed(PGD_PORT(PGD_PORT_STATn, (pn + dev->pipe_b),
+ stat = readl_relaxed(PGD_PORT(PGD_PORT_STATn, (pn + dev->port_b),
dev->ver));
if (dev->ctrl.ports[pn].flow == SLIM_SRC) {
cfg->destination = dev->bam.hdl;
@@ -191,17 +257,21 @@
cfg->mode = SPS_MODE_SRC;
}
/* Space for desciptor FIFOs */
- cfg->desc.size = MSM_SLIM_DESC_NUM * sizeof(struct sps_iovec);
- cfg->config = SPS_CONFIG_DEFAULT;
- ret = sps_connect(dev->pipes[pn].sps, cfg);
+ ret = msm_slim_sps_mem_alloc(dev, &cfg->desc,
+ MSM_SLIM_DESC_NUM * sizeof(struct sps_iovec));
+ if (ret)
+ pr_err("mem alloc for descr failed:%d", ret);
+ else
+ ret = sps_connect(dev->pipes[pn].sps, cfg);
+
if (!ret) {
dev->pipes[pn].connected = true;
- msm_hw_set_port(dev, pn + dev->pipe_b);
+ msm_hw_set_port(dev, pn + dev->port_b);
}
return ret;
}
-int msm_config_port(struct slim_controller *ctrl, u8 pn)
+int msm_alloc_port(struct slim_controller *ctrl, u8 pn)
{
struct msm_slim_ctrl *dev = slim_get_ctrldata(ctrl);
struct msm_slim_endp *endpoint;
@@ -209,7 +279,7 @@
if (ctrl->ports[pn].req == SLIM_REQ_HALF_DUP ||
ctrl->ports[pn].req == SLIM_REQ_MULTI_CH)
return -EPROTONOSUPPORT;
- if (pn >= (MSM_SLIM_NPORTS - dev->pipe_b))
+ if (pn >= (MSM_SLIM_NPORTS - dev->port_b))
return -ENODEV;
endpoint = &dev->pipes[pn];
@@ -218,6 +288,22 @@
return ret;
}
+void msm_dealloc_port(struct slim_controller *ctrl, u8 pn)
+{
+ struct msm_slim_ctrl *dev = slim_get_ctrldata(ctrl);
+ struct msm_slim_endp *endpoint;
+ if (pn >= (MSM_SLIM_NPORTS - dev->port_b))
+ return;
+ endpoint = &dev->pipes[pn];
+ if (dev->pipes[pn].connected)
+ msm_slim_disconn_pipe_port(dev, pn);
+ if (endpoint->sps) {
+ struct sps_connect *config = &endpoint->config;
+ msm_slim_free_endpoint(endpoint);
+ msm_slim_sps_mem_free(dev, &config->desc);
+ }
+}
+
enum slim_port_err msm_slim_port_xfer_status(struct slim_controller *ctr,
u8 pn, u8 **done_buf, u32 *done_len)
{
@@ -241,6 +327,25 @@
return SLIM_P_INPROGRESS;
}
+static void msm_slim_port_cb(struct sps_event_notify *ev)
+{
+
+ struct completion *comp = ev->data.transfer.user;
+ struct sps_iovec *iovec = &ev->data.transfer.iovec;
+
+ if (ev->event_id == SPS_EVENT_DESC_DONE) {
+
+ pr_debug("desc done iovec = (0x%x 0x%x 0x%x)\n",
+ iovec->addr, iovec->size, iovec->flags);
+
+ } else {
+ pr_err("%s: ERR event %d\n",
+ __func__, ev->event_id);
+ }
+ if (comp)
+ complete(comp);
+}
+
int msm_slim_port_xfer(struct slim_controller *ctrl, u8 pn, u8 *iobuf,
u32 len, struct completion *comp)
{
@@ -251,20 +356,29 @@
return -ENODEV;
- ctrl->ports[pn].xcomp = comp;
sreg.options = (SPS_EVENT_DESC_DONE|SPS_EVENT_ERROR);
sreg.mode = SPS_TRIGGER_WAIT;
- sreg.xfer_done = comp;
- sreg.callback = NULL;
- sreg.user = &ctrl->ports[pn];
+ sreg.xfer_done = NULL;
+ sreg.callback = msm_slim_port_cb;
+ sreg.user = NULL;
ret = sps_register_event(dev->pipes[pn].sps, &sreg);
if (ret) {
dev_dbg(dev->dev, "sps register event error:%x\n", ret);
return ret;
}
- ret = sps_transfer_one(dev->pipes[pn].sps, (u32)iobuf, len, NULL,
+ ret = sps_transfer_one(dev->pipes[pn].sps, (u32)iobuf, len, comp,
SPS_IOVEC_FLAG_INT);
dev_dbg(dev->dev, "sps submit xfer error code:%x\n", ret);
+ if (!ret) {
+ /* Enable port interrupts */
+ u32 int_port = readl_relaxed(PGD_THIS_EE(PGD_PORT_INT_EN_EEn,
+ dev->ver));
+ if (!(int_port & (1 << (dev->port_b + pn))))
+ writel_relaxed((int_port | (1 << (dev->port_b + pn))),
+ PGD_THIS_EE(PGD_PORT_INT_EN_EEn, dev->ver));
+ /* Make sure that port registers are updated before returning */
+ mb();
+ }
return ret;
}
@@ -680,7 +794,7 @@
if ((sec_props.ees[dev->ee].pipe_mask >> i) & 0x1)
break;
}
- dev->pipe_b = i - 7;
+ dev->port_b = i - 7;
/* Register the BAM device with the SPS driver */
ret = sps_register_bam_device(&bam_props, &bam_handle);
@@ -750,6 +864,12 @@
if (dev->use_tx_msgqs >= MSM_MSGQ_ENABLED)
msm_slim_remove_ep(dev, &dev->tx_msgq, &dev->use_tx_msgqs);
if (dereg) {
+ int i;
+ for (i = dev->port_b; i < MSM_SLIM_NPORTS; i++) {
+ if (dev->pipes[i - dev->port_b].connected)
+ msm_dealloc_port(&dev->ctrl,
+ i - dev->port_b);
+ }
sps_deregister_bam_device(dev->bam.hdl);
dev->bam.hdl = 0L;
}
diff --git a/drivers/slimbus/slim-msm.h b/drivers/slimbus/slim-msm.h
index f8f625e..896e196 100644
--- a/drivers/slimbus/slim-msm.h
+++ b/drivers/slimbus/slim-msm.h
@@ -13,6 +13,7 @@
#ifndef _SLIM_MSM_H
#define _SLIM_MSM_H
+#include <linux/irq.h>
#include <linux/kthread.h>
#include <mach/msm_qmi_interface.h>
@@ -152,6 +153,12 @@
PGD_VE_STAT_V1 = 0x1710,
};
+enum msm_slim_port_status {
+ MSM_PORT_OVERFLOW = 1 << 2,
+ MSM_PORT_UNDERFLOW = 1 << 3,
+ MSM_PORT_DISCONNECT = 1 << 19,
+};
+
enum msm_ctrl_state {
MSM_CTRL_AWAKE,
MSM_CTRL_SLEEPING,
@@ -177,7 +184,6 @@
struct sps_connect config;
struct sps_register_event event;
struct sps_mem_buffer buf;
- struct completion *xcomp;
bool connected;
};
@@ -224,7 +230,7 @@
u8 pgdla;
enum msm_slim_msgq use_rx_msgqs;
enum msm_slim_msgq use_tx_msgqs;
- int pipe_b;
+ int port_b;
struct completion reconf;
bool reconf_busy;
bool chan_active;
@@ -271,11 +277,13 @@
int msm_slim_rx_dequeue(struct msm_slim_ctrl *dev, u8 *buf);
int msm_slim_get_ctrl(struct msm_slim_ctrl *dev);
void msm_slim_put_ctrl(struct msm_slim_ctrl *dev);
+irqreturn_t msm_slim_port_irq_handler(struct msm_slim_ctrl *dev, u32 pstat);
int msm_slim_init_endpoint(struct msm_slim_ctrl *dev, struct msm_slim_endp *ep);
void msm_slim_free_endpoint(struct msm_slim_endp *ep);
void msm_hw_set_port(struct msm_slim_ctrl *dev, u8 pn);
+int msm_alloc_port(struct slim_controller *ctrl, u8 pn);
+void msm_dealloc_port(struct slim_controller *ctrl, u8 pn);
int msm_slim_connect_pipe_port(struct msm_slim_ctrl *dev, u8 pn);
-int msm_config_port(struct slim_controller *ctrl, u8 pn);
enum slim_port_err msm_slim_port_xfer_status(struct slim_controller *ctr,
u8 pn, u8 **done_buf, u32 *done_len);
int msm_slim_port_xfer(struct slim_controller *ctrl, u8 pn, u8 *iobuf,
diff --git a/drivers/slimbus/slimbus.c b/drivers/slimbus/slimbus.c
index e9f056e..201470f 100644
--- a/drivers/slimbus/slimbus.c
+++ b/drivers/slimbus/slimbus.c
@@ -1089,8 +1089,11 @@
}
break;
}
- if (i >= ctrl->nports)
+ if (i >= ctrl->nports) {
ret = -EDQUOT;
+ goto alloc_err;
+ }
+ ret = 0;
for (j = i; j < i + nphysp; j++) {
ctrl->ports[j].state = SLIM_P_UNCFG;
ctrl->ports[j].req = req;
@@ -1098,7 +1101,8 @@
ctrl->ports[j].flow = SLIM_SINK;
else
ctrl->ports[j].flow = SLIM_SRC;
- ret = ctrl->config_port(ctrl, j);
+ if (ctrl->alloc_port)
+ ret = ctrl->alloc_port(ctrl, j);
if (ret) {
for (; j >= i; j--)
ctrl->ports[j].state = SLIM_P_FREE;
@@ -1126,17 +1130,26 @@
for (i = 0; i < nports; i++) {
u8 pn;
pn = SLIM_HDL_TO_PORT(hdl[i]);
- if (ctrl->ports[pn].state == SLIM_P_CFG) {
- int j;
- dev_err(&ctrl->dev, "Can't dealloc connected port:%d",
- i);
+
+ if (pn >= ctrl->nports || ctrl->ports[pn].state == SLIM_P_CFG) {
+ int j, ret;
+ if (pn >= ctrl->nports) {
+ dev_err(&ctrl->dev, "invalid port number");
+ ret = -EINVAL;
+ } else {
+ dev_err(&ctrl->dev,
+ "Can't dealloc connected port:%d", i);
+ ret = -EISCONN;
+ }
for (j = i - 1; j >= 0; j--) {
pn = SLIM_HDL_TO_PORT(hdl[j]);
ctrl->ports[pn].state = SLIM_P_UNCFG;
}
mutex_unlock(&ctrl->m_ctrl);
- return -EISCONN;
+ return ret;
}
+ if (ctrl->dealloc_port)
+ ctrl->dealloc_port(ctrl, pn);
ctrl->ports[pn].state = SLIM_P_FREE;
}
mutex_unlock(&ctrl->m_ctrl);
@@ -1215,6 +1228,8 @@
* Channel specified in chanh needs to be allocated first.
* Returns -EALREADY if source is already configured for this channel.
* Returns -ENOTCONN if channel is not allocated
+ * Returns -EINVAL if invalid direction is specified for non-manager port,
+ * or if the manager side port number is out of bounds, or in incorrect state
*/
int slim_connect_src(struct slim_device *sb, u32 srch, u16 chanh)
{
@@ -1223,12 +1238,23 @@
u8 chan = SLIM_HDL_TO_CHIDX(chanh);
struct slim_ich *slc = &ctrl->chans[chan];
enum slim_port_flow flow = SLIM_HDL_TO_FLOW(srch);
+ u8 la = SLIM_HDL_TO_LA(srch);
- if (flow != SLIM_SRC)
+ /* manager ports don't have direction when they are allocated */
+ if (la != SLIM_LA_MANAGER && flow != SLIM_SRC)
return -EINVAL;
mutex_lock(&ctrl->sched.m_reconf);
+ if (la == SLIM_LA_MANAGER) {
+ u8 pn = SLIM_HDL_TO_PORT(srch);
+ if (pn >= ctrl->nports ||
+ ctrl->ports[pn].state != SLIM_P_UNCFG) {
+ ret = -EINVAL;
+ goto connect_src_err;
+ }
+ }
+
if (slc->state == SLIM_CH_FREE) {
ret = -ENOTCONN;
goto connect_src_err;
@@ -1264,6 +1290,9 @@
* Channel specified in chanh needs to be allocated first.
* Returns -EALREADY if sink is already configured for this channel.
* Returns -ENOTCONN if channel is not allocated
+ * Returns -EINVAL if invalid parameters are passed, or invalid direction is
+ * specified for non-manager port, or if the manager side port number is out of
+ * bounds, or in incorrect state
*/
int slim_connect_sink(struct slim_device *sb, u32 *sinkh, int nsink, u16 chanh)
{
@@ -1290,8 +1319,14 @@
for (j = 0; j < nsink; j++) {
enum slim_port_flow flow = SLIM_HDL_TO_FLOW(sinkh[j]);
- if (flow != SLIM_SINK)
+ u8 la = SLIM_HDL_TO_LA(sinkh[j]);
+ u8 pn = SLIM_HDL_TO_PORT(sinkh[j]);
+ if (la != SLIM_LA_MANAGER && flow != SLIM_SINK)
ret = -EINVAL;
+ else if (la == SLIM_LA_MANAGER &&
+ (pn >= ctrl->nports ||
+ ctrl->ports[pn].state != SLIM_P_UNCFG))
+ ret = -EINVAL;
else
ret = connect_port_ch(ctrl, chan, sinkh[j], SLIM_SINK);
if (ret) {
diff --git a/drivers/spi/spi_qsd.c b/drivers/spi/spi_qsd.c
index 18dd054..53aa475 100644
--- a/drivers/spi/spi_qsd.c
+++ b/drivers/spi/spi_qsd.c
@@ -14,6 +14,7 @@
* SPI driver for Qualcomm MSM platforms
*
*/
+
#include <linux/version.h>
#include <linux/kernel.h>
#include <linux/module.h>
@@ -43,6 +44,8 @@
#include <mach/msm_spi.h>
#include <mach/sps.h>
#include <mach/dma.h>
+#include <mach/msm_bus.h>
+#include <mach/msm_bus_board.h>
#include "spi_qsd.h"
static int msm_spi_pm_resume_runtime(struct device *device);
@@ -200,6 +203,177 @@
dd->clock_speed = rate;
}
+static void msm_spi_clk_path_vote(struct msm_spi *dd)
+{
+ if (dd->clk_path_vote.client_hdl)
+ msm_bus_scale_client_update_request(
+ dd->clk_path_vote.client_hdl,
+ MSM_SPI_CLK_PATH_RESUME_VEC);
+}
+
+static void msm_spi_clk_path_unvote(struct msm_spi *dd)
+{
+ if (dd->clk_path_vote.client_hdl)
+ msm_bus_scale_client_update_request(
+ dd->clk_path_vote.client_hdl,
+ MSM_SPI_CLK_PATH_SUSPEND_VEC);
+}
+
+static void msm_spi_clk_path_teardown(struct msm_spi *dd)
+{
+ if (dd->pdata->active_only)
+ msm_spi_clk_path_unvote(dd);
+
+ if (dd->clk_path_vote.client_hdl) {
+ msm_bus_scale_unregister_client(dd->clk_path_vote.client_hdl);
+ dd->clk_path_vote.client_hdl = 0;
+ }
+}
+
+/**
+ * msm_spi_clk_path_init_structs: internal impl detail of msm_spi_clk_path_init
+ *
+ * allocates and initilizes the bus scaling vectors.
+ */
+static int msm_spi_clk_path_init_structs(struct msm_spi *dd)
+{
+ struct msm_bus_vectors *paths = NULL;
+ struct msm_bus_paths *usecases = NULL;
+
+ dev_dbg(dd->dev, "initialises path clock voting structs");
+
+ paths = devm_kzalloc(dd->dev, sizeof(*paths) * 2, GFP_KERNEL);
+ if (!paths) {
+ dev_err(dd->dev,
+ "msm_bus_paths.paths memory allocation failed");
+ return -ENOMEM;
+ }
+
+ usecases = devm_kzalloc(dd->dev, sizeof(*usecases) * 2, GFP_KERNEL);
+ if (!usecases) {
+ dev_err(dd->dev,
+ "msm_bus_scale_pdata.usecases memory allocation failed");
+ goto path_init_err;
+ }
+
+ dd->clk_path_vote.pdata = devm_kzalloc(dd->dev,
+ sizeof(*dd->clk_path_vote.pdata),
+ GFP_KERNEL);
+ if (!dd->clk_path_vote.pdata) {
+ dev_err(dd->dev,
+ "msm_bus_scale_pdata memory allocation failed");
+ goto path_init_err;
+ }
+
+ paths[MSM_SPI_CLK_PATH_SUSPEND_VEC] = (struct msm_bus_vectors) {
+ .src = dd->pdata->master_id,
+ .dst = MSM_BUS_SLAVE_EBI_CH0,
+ .ab = 0,
+ .ib = 0,
+ };
+
+ paths[MSM_SPI_CLK_PATH_RESUME_VEC] = (struct msm_bus_vectors) {
+ .src = dd->pdata->master_id,
+ .dst = MSM_BUS_SLAVE_EBI_CH0,
+ .ab = MSM_SPI_CLK_PATH_AVRG_BW(dd),
+ .ib = MSM_SPI_CLK_PATH_BRST_BW(dd),
+ };
+
+ usecases[MSM_SPI_CLK_PATH_SUSPEND_VEC] = (struct msm_bus_paths) {
+ .num_paths = 1,
+ .vectors = &paths[MSM_SPI_CLK_PATH_SUSPEND_VEC],
+ };
+
+ usecases[MSM_SPI_CLK_PATH_RESUME_VEC] = (struct msm_bus_paths) {
+ .num_paths = 1,
+ .vectors = &paths[MSM_SPI_CLK_PATH_RESUME_VEC],
+ };
+
+ *dd->clk_path_vote.pdata = (struct msm_bus_scale_pdata) {
+ .active_only = dd->pdata->active_only,
+ .name = dev_name(dd->dev),
+ .num_usecases = 2,
+ .usecase = usecases,
+ };
+
+ return 0;
+
+path_init_err:
+ devm_kfree(dd->dev, paths);
+ devm_kfree(dd->dev, usecases);
+ devm_kfree(dd->dev, dd->clk_path_vote.pdata);
+ dd->clk_path_vote.pdata = NULL;
+ return -ENOMEM;
+}
+
+/**
+ * msm_spi_clk_path_postponed_register: reg with bus-scaling after it is probed
+ *
+ * @return zero on success
+ *
+ * Workaround: SPI driver may be probed before the bus scaling driver. Calling
+ * msm_bus_scale_register_client() will fail if the bus scaling driver is not
+ * ready yet. Thus, this function should be called not from probe but from a
+ * later context. Also, this function may be called more then once before
+ * register succeed. At this case only one error message will be logged. At boot
+ * time all clocks are on, so earlier SPI transactions should succeed.
+ */
+static int msm_spi_clk_path_postponed_register(struct msm_spi *dd)
+{
+ dd->clk_path_vote.client_hdl = msm_bus_scale_register_client(
+ dd->clk_path_vote.pdata);
+
+ if (dd->clk_path_vote.client_hdl) {
+ if (dd->clk_path_vote.reg_err) {
+ /* log a success message if an error msg was logged */
+ dd->clk_path_vote.reg_err = false;
+ dev_info(dd->dev,
+ "msm_bus_scale_register_client(mstr-id:%d "
+ "actv-only:%d):0x%x",
+ dd->pdata->master_id, dd->pdata->active_only,
+ dd->clk_path_vote.client_hdl);
+ }
+
+ if (dd->pdata->active_only)
+ msm_spi_clk_path_vote(dd);
+ } else {
+ /* guard to log only one error on multiple failure */
+ if (!dd->clk_path_vote.reg_err) {
+ dd->clk_path_vote.reg_err = true;
+
+ dev_info(dd->dev,
+ "msm_bus_scale_register_client(mstr-id:%d "
+ "actv-only:%d):0",
+ dd->pdata->master_id, dd->pdata->active_only);
+ }
+ }
+
+ return dd->clk_path_vote.client_hdl ? 0 : -EAGAIN;
+}
+
+static void msm_spi_clk_path_init(struct msm_spi *dd)
+{
+ /*
+ * bail out if path voting is diabled (master_id == 0) or if it is
+ * already registered (client_hdl != 0)
+ */
+ if (!dd->pdata->master_id || dd->clk_path_vote.client_hdl)
+ return;
+
+ /* if fail once then try no more */
+ if (!dd->clk_path_vote.pdata && msm_spi_clk_path_init_structs(dd)) {
+ dd->pdata->master_id = 0;
+ return;
+ };
+
+ /* on failure try again later */
+ if (msm_spi_clk_path_postponed_register(dd))
+ return;
+
+ if (dd->pdata->active_only)
+ msm_spi_clk_path_vote(dd);
+}
+
static int msm_spi_calculate_size(int *fifo_size,
int *block_size,
int block,
@@ -481,6 +655,16 @@
else if (dd->mode == SPI_BAM_MODE)
spi_config |= SPI_CFG_INPUT_FIRST;
+ /*
+ * HS_MODE improves signal stability for spi-clk high rates
+ * but is invalid in LOOPBACK mode.
+ */
+ if ((dd->clock_speed >= SPI_HS_MIN_RATE) &&
+ !(dd->cur_msg->spi->mode & SPI_LOOP))
+ spi_config |= SPI_CFG_HS_MODE;
+ else
+ spi_config &= ~SPI_CFG_HS_MODE;
+
writel_relaxed(spi_config, dd->base + SPI_CONFIG);
}
@@ -1274,7 +1458,7 @@
}
if (tr->cs_change &&
- ((bpw != 8) || (bpw != 16) || (bpw != 32)))
+ ((bpw != 8) && (bpw != 16) && (bpw != 32)))
return false;
}
@@ -2349,49 +2533,148 @@
return 0;
}
-/**
- * msm_spi_dt_to_pdata: copy device-tree data to platfrom data struct
- */
-struct msm_spi_platform_data *
-__init msm_spi_dt_to_pdata(struct platform_device *pdev)
+enum msm_spi_dt_entry_status {
+ DT_REQ, /* Required: fail if missing */
+ DT_SGST, /* Suggested: warn if missing */
+ DT_OPT, /* Optional: don't warn if missing */
+};
+
+enum msm_spi_dt_entry_type {
+ DT_U32,
+ DT_GPIO,
+ DT_BOOL,
+};
+
+struct msm_spi_dt_to_pdata_map {
+ const char *dt_name;
+ void *ptr_data;
+ enum msm_spi_dt_entry_status status;
+ enum msm_spi_dt_entry_type type;
+ int default_val;
+};
+
+static int __init msm_spi_dt_to_pdata_populate(struct platform_device *pdev,
+ struct msm_spi_platform_data *pdata,
+ struct msm_spi_dt_to_pdata_map *itr)
{
+ int ret, err = 0;
struct device_node *node = pdev->dev.of_node;
+
+ for (; itr->dt_name ; ++itr) {
+ switch (itr->type) {
+ case DT_GPIO:
+ ret = of_get_named_gpio(node, itr->dt_name, 0);
+ if (ret >= 0) {
+ *((int *) itr->ptr_data) = ret;
+ ret = 0;
+ }
+ break;
+ case DT_U32:
+ ret = of_property_read_u32(node, itr->dt_name,
+ (u32 *) itr->ptr_data);
+ break;
+ case DT_BOOL:
+ *((bool *) itr->ptr_data) =
+ of_property_read_bool(node, itr->dt_name);
+ ret = 0;
+ break;
+ default:
+ dev_err(&pdev->dev, "%d is an unknown DT entry type\n",
+ itr->type);
+ ret = -EBADE;
+ }
+
+ dev_dbg(&pdev->dev, "DT entry ret:%d name:%s val:%d\n",
+ ret, itr->dt_name, *((int *)itr->ptr_data));
+
+ if (ret) {
+ *((int *)itr->ptr_data) = itr->default_val;
+
+ if (itr->status < DT_OPT) {
+ dev_err(&pdev->dev, "Missing '%s' DT entry\n",
+ itr->dt_name);
+
+ /* cont on err to dump all missing entries */
+ if (itr->status == DT_REQ && !err)
+ err = ret;
+ }
+ }
+ }
+
+ return err;
+}
+
+/**
+ * msm_spi_dt_to_pdata: create pdata and read gpio config from device tree
+ */
+struct msm_spi_platform_data * __init msm_spi_dt_to_pdata(
+ struct platform_device *pdev, struct msm_spi *dd)
+{
+ int i;
struct msm_spi_platform_data *pdata;
- int rc;
pdata = devm_kzalloc(&pdev->dev, sizeof(*pdata), GFP_KERNEL);
if (!pdata) {
pr_err("Unable to allocate platform data\n");
return NULL;
+ } else {
+ struct msm_spi_dt_to_pdata_map map[] = {
+ {"spi-max-frequency",
+ &pdata->max_clock_speed, DT_SGST, DT_U32, 0},
+ {"qcom,infinite-mode",
+ &pdata->infinite_mode, DT_OPT, DT_U32, 0},
+ {"qcom,active-only",
+ &pdata->active_only, DT_OPT, DT_BOOL, 0},
+ {"qcom,master-id",
+ &pdata->master_id, DT_SGST, DT_U32, 0},
+ {"qcom,ver-reg-exists",
+ &pdata->ver_reg_exists, DT_OPT, DT_BOOL, 0},
+ {"qcom,use-bam",
+ &pdata->use_bam, DT_OPT, DT_BOOL, 0},
+ {"qcom,bam-consumer-pipe-index",
+ &pdata->bam_consumer_pipe_index, DT_OPT, DT_U32, 0},
+ {"qcom,bam-producer-pipe-index",
+ &pdata->bam_producer_pipe_index, DT_OPT, DT_U32, 0},
+ {"qcom,gpio-clk",
+ &dd->spi_gpios[0], DT_OPT, DT_GPIO, -1},
+ {"qcom,gpio-miso",
+ &dd->spi_gpios[1], DT_OPT, DT_GPIO, -1},
+ {"qcom,gpio-mosi",
+ &dd->spi_gpios[2], DT_OPT, DT_GPIO, -1},
+ {"qcom,gpio-cs0",
+ &dd->cs_gpios[0].gpio_num, DT_OPT, DT_GPIO, -1},
+ {"qcom,gpio-cs1",
+ &dd->cs_gpios[1].gpio_num, DT_OPT, DT_GPIO, -1},
+ {"qcom,gpio-cs2",
+ &dd->cs_gpios[2].gpio_num, DT_OPT, DT_GPIO, -1},
+ {"qcom,gpio-cs3",
+ &dd->cs_gpios[3].gpio_num, DT_OPT, DT_GPIO, -1},
+ {NULL, NULL, 0, 0, 0},
+ };
+
+ if (msm_spi_dt_to_pdata_populate(pdev, pdata, map)) {
+ devm_kfree(&pdev->dev, pdata);
+ return NULL;
+ }
}
- of_property_read_u32(node, "spi-max-frequency",
- &pdata->max_clock_speed);
- of_property_read_u32(node, "qcom,infinite-mode",
- &pdata->infinite_mode);
-
- pdata->ver_reg_exists = of_property_read_bool(node
- , "qcom,ver-reg-exists");
-
- pdata->use_bam = of_property_read_bool(node, "qcom,use-bam");
-
if (pdata->use_bam) {
- rc = of_property_read_u32(node, "qcom,bam-consumer-pipe-index",
- &pdata->bam_consumer_pipe_index);
- if (rc) {
+ if (!pdata->bam_consumer_pipe_index) {
dev_warn(&pdev->dev,
"missing qcom,bam-consumer-pipe-index entry in device-tree\n");
pdata->use_bam = false;
}
- rc = of_property_read_u32(node, "qcom,bam-producer-pipe-index",
- &pdata->bam_producer_pipe_index);
- if (rc) {
+ if (pdata->bam_producer_pipe_index) {
dev_warn(&pdev->dev,
"missing qcom,bam-producer-pipe-index entry in device-tree\n");
pdata->use_bam = false;
}
}
+
+ for (i = 0; i < ARRAY_SIZE(spi_cs_rsrcs); ++i)
+ dd->cs_gpios[i].valid = (dd->cs_gpios[i].gpio_num >= 0);
+
return pdata;
}
@@ -2451,7 +2734,6 @@
int clk_enabled = 0;
int pclk_enabled = 0;
struct msm_spi_platform_data *pdata;
- enum of_gpio_flags flags;
master = spi_alloc_master(&pdev->dev, sizeof(struct msm_spi));
if (!master) {
@@ -2471,7 +2753,7 @@
if (pdev->dev.of_node) {
dd->qup_ver = SPI_QUP_VERSION_BFAM;
master->dev.of_node = pdev->dev.of_node;
- pdata = msm_spi_dt_to_pdata(pdev);
+ pdata = msm_spi_dt_to_pdata(pdev, dd);
if (!pdata) {
rc = -ENOMEM;
goto err_probe_exit;
@@ -2483,18 +2765,6 @@
"using default bus_num %d\n", pdev->id);
else
master->bus_num = pdev->id = rc;
-
- for (i = 0; i < ARRAY_SIZE(spi_rsrcs); ++i) {
- dd->spi_gpios[i] = of_get_gpio_flags(pdev->dev.of_node,
- i, &flags);
- }
-
- for (i = 0; i < ARRAY_SIZE(spi_cs_rsrcs); ++i) {
- dd->cs_gpios[i].gpio_num = of_get_named_gpio_flags(
- pdev->dev.of_node, "cs-gpios",
- i, &flags);
- dd->cs_gpios[i].valid = 0;
- }
} else {
pdata = pdev->dev.platform_data;
dd->qup_ver = SPI_QUP_VERSION_NONE;
@@ -2798,6 +3068,8 @@
msm_spi_disable_irqs(dd);
clk_disable_unprepare(dd->clk);
clk_disable_unprepare(dd->pclk);
+ if (!dd->pdata->active_only)
+ msm_spi_clk_path_unvote(dd);
/* Free the spi clk, miso, mosi, cs gpio */
if (dd->pdata && dd->pdata->gpio_release)
@@ -2848,10 +3120,14 @@
if (ret)
return ret;
+ msm_spi_clk_path_init(dd);
+ if (!dd->pdata->active_only)
+ msm_spi_clk_path_vote(dd);
clk_prepare_enable(dd->clk);
clk_prepare_enable(dd->pclk);
msm_spi_enable_irqs(dd);
dd->suspended = 0;
+
resume_exit:
return 0;
}
@@ -2907,6 +3183,7 @@
pm_runtime_set_suspended(&pdev->dev);
clk_put(dd->clk);
clk_put(dd->pclk);
+ msm_spi_clk_path_teardown(dd);
destroy_workqueue(dd->workqueue);
platform_set_drvdata(pdev, 0);
spi_unregister_master(master);
diff --git a/drivers/spi/spi_qsd.h b/drivers/spi/spi_qsd.h
index b749cc0..90d7481 100644
--- a/drivers/spi/spi_qsd.h
+++ b/drivers/spi/spi_qsd.h
@@ -72,14 +72,17 @@
#define SPI_INPUT_FIFO QSD_REG(0x0200) QUP_REG(0x0218)
#define SPI_STATE QSD_REG(SPI_OPERATIONAL) QUP_REG(0x0004)
-/* SPI_CONFIG fields */
-#define SPI_CFG_INPUT_FIRST 0x00000200
+/* QUP_CONFIG fields */
+#define SPI_CFG_N 0x0000001F
#define SPI_NO_INPUT 0x00000080
#define SPI_NO_OUTPUT 0x00000040
-#define SPI_CFG_LOOPBACK 0x00000100
-#define SPI_CFG_N 0x0000001F
#define SPI_EN_EXT_OUT_FLAG 0x00010000
+/* SPI_CONFIG fields */
+#define SPI_CFG_LOOPBACK 0x00000100
+#define SPI_CFG_INPUT_FIRST 0x00000200
+#define SPI_CFG_HS_MODE 0x00000400
+
/* SPI_IO_CONTROL fields */
#define SPI_IO_C_FORCE_CS 0x00000800
#define SPI_IO_C_CLK_IDLE_HIGH 0x00000400
@@ -143,6 +146,9 @@
#define SPI_NUM_CHIPSELECTS 4
#define SPI_SUPPORTED_MODES (SPI_CPOL | SPI_CPHA | SPI_CS_HIGH | SPI_LOOP)
+/* high speed mode is when bus rate is greater then 26MHz */
+#define SPI_HS_MIN_RATE (26000000)
+
#define SPI_DELAY_THRESHOLD 1
/* Default timeout is 10 milliseconds */
#define SPI_DEFAULT_TIMEOUT 10
@@ -167,6 +173,13 @@
#define SPI_BAM_MAX_DESC_NUM 32
#define SPI_MAX_TRFR_BTWN_RESETS ((64 * 1024) - 16) /* 64KB - 16byte */
+enum msm_spi_clk_path_vec_idx {
+ MSM_SPI_CLK_PATH_SUSPEND_VEC = 0,
+ MSM_SPI_CLK_PATH_RESUME_VEC = 1,
+};
+#define MSM_SPI_CLK_PATH_AVRG_BW(dd) (dd->pdata->max_clock_speed * 8)
+#define MSM_SPI_CLK_PATH_BRST_BW(dd) (dd->pdata->max_clock_speed * 8)
+
static char const * const spi_rsrcs[] = {
"spi_clk",
"spi_miso",
@@ -247,6 +260,22 @@
};
#endif
+/**
+ * qup_i2c_clk_path_vote: data to use bus scaling driver for clock path vote
+ *
+ * @client_hdl when zero, client is not registered with the bus scaling driver,
+ * and bus scaling functionality should not be used. When non zero, it
+ * is a bus scaling client id and may be used to vote for clock path.
+ * @reg_err when true, registration error was detected and an error message was
+ * logged. i2c will attempt to re-register but will log error only once.
+ * once registration succeed, the flag is set to false.
+ */
+struct qup_i2c_clk_path_vote {
+ u32 client_hdl;
+ struct msm_bus_scale_pdata *pdata;
+ bool reg_err;
+};
+
struct msm_spi_bam_pipe {
struct sps_pipe *handle;
struct sps_connect config;
@@ -278,6 +307,7 @@
struct completion transfer_complete;
struct clk *clk; /* core clock */
struct clk *pclk; /* interface clock */
+ struct qup_i2c_clk_path_vote clk_path_vote;
unsigned long mem_phys_addr;
size_t mem_size;
int input_fifo_size;
diff --git a/drivers/tty/serial/msm_serial_hs.c b/drivers/tty/serial/msm_serial_hs.c
index 4d464c1..7f669d8 100644
--- a/drivers/tty/serial/msm_serial_hs.c
+++ b/drivers/tty/serial/msm_serial_hs.c
@@ -245,6 +245,48 @@
#define UARTDM_TO_MSM(uart_port) \
container_of((uart_port), struct msm_hs_port, uport)
+
+static int msm_hs_ioctl(struct uart_port *uport, unsigned int cmd,
+ unsigned long arg)
+{
+ int ret = 0, state = 1;
+ enum msm_hs_clk_states_e clk_state;
+ unsigned long flags;
+ struct msm_hs_port *msm_uport = UARTDM_TO_MSM(uport);
+
+ switch (cmd) {
+ case MSM_ENABLE_UART_CLOCK: {
+ pr_debug("%s():ENABLE UART CLOCK: cmd=%d\n", __func__, cmd);
+ msm_hs_request_clock_on(&msm_uport->uport);
+ break;
+ }
+ case MSM_DISABLE_UART_CLOCK: {
+ pr_debug("%s():DISABLE UART CLOCK: cmd=%d\n", __func__, cmd);
+ msm_hs_request_clock_off(&msm_uport->uport);
+ break;
+ }
+ case MSM_GET_UART_CLOCK_STATUS: {
+ /* Return value 0 - UART CLOCK is OFF
+ * Return value 1 - UART CLOCK is ON */
+ pr_debug("%s():GET UART CLOCK STATUS: cmd=%d\n", __func__, cmd);
+ spin_lock_irqsave(&msm_uport->uport.lock, flags);
+ clk_state = msm_uport->clk_state;
+ spin_unlock_irqrestore(&msm_uport->uport.lock, flags);
+ if (clk_state <= MSM_HS_CLK_OFF)
+ state = 0;
+ ret = state;
+ break;
+ }
+ default: {
+ pr_debug("%s():Unknown cmd specified: cmd=%d\n", __func__, cmd);
+ ret = -ENOIOCTLCMD;
+ break;
+ }
+ }
+
+ return ret;
+}
+
static ssize_t show_clock(struct device *dev, struct device_attribute *attr,
char *buf)
{
@@ -3307,6 +3349,7 @@
.release_port = msm_hs_release_port,
.request_port = msm_hs_request_port,
.flush_buffer = msm_hs_flush_buffer,
+ .ioctl = msm_hs_ioctl,
};
module_init(msm_serial_hs_init);
diff --git a/drivers/tty/serial/msm_serial_hs_hwreg.h b/drivers/tty/serial/msm_serial_hs_hwreg.h
index cdd0450..cd24f23 100644
--- a/drivers/tty/serial/msm_serial_hs_hwreg.h
+++ b/drivers/tty/serial/msm_serial_hs_hwreg.h
@@ -32,6 +32,10 @@
#define ADM1_CRCI_GSBI6_RX_SEL 0x800
#define ADM1_CRCI_GSBI6_TX_SEL 0x400
+#define MSM_ENABLE_UART_CLOCK 13
+#define MSM_DISABLE_UART_CLOCK 14
+#define MSM_GET_UART_CLOCK_STATUS 15
+
enum msm_hsl_regs {
UARTDM_MR1,
UARTDM_MR2,
diff --git a/drivers/tty/smux_ctl.c b/drivers/tty/smux_ctl.c
index 1b3a7abe..dcbfe9a 100644
--- a/drivers/tty/smux_ctl.c
+++ b/drivers/tty/smux_ctl.c
@@ -50,6 +50,7 @@
static uint32_t smux_ctl_ch_id[] = {
SMUX_DATA_CTL_0,
+ SMUX_DATA_CTL_1,
};
#define SMUX_CTL_NUM_CHANNELS ARRAY_SIZE(smux_ctl_ch_id)
diff --git a/drivers/usb/dwc3/core.c b/drivers/usb/dwc3/core.c
index 04da6f8..bb2879b 100644
--- a/drivers/usb/dwc3/core.c
+++ b/drivers/usb/dwc3/core.c
@@ -427,6 +427,14 @@
reg &= ~DWC3_GUSB3PIPECTL_DIS_RXDET_U3_RXDET;
dwc3_writel(dwc->regs, DWC3_GUSB3PIPECTL(0), reg);
}
+ /*
+ * clear Elastic buffer mode in GUSBPIPE_CTRL(0) register, otherwise
+ * it results in high link errors and could cause SS mode transfer
+ * failure.
+ */
+ reg = dwc3_readl(dwc->regs, DWC3_GUSB3PIPECTL(0));
+ reg &= ~DWC3_GUSB3PIPECTL_ELASTIC_BUF_MODE;
+ dwc3_writel(dwc->regs, DWC3_GUSB3PIPECTL(0), reg);
if (!dwc->ev_buffs) {
ret = dwc3_alloc_event_buffers(dwc, DWC3_EVENT_BUFFERS_SIZE);
diff --git a/drivers/usb/dwc3/core.h b/drivers/usb/dwc3/core.h
index 3fb89cd..5db7420 100644
--- a/drivers/usb/dwc3/core.h
+++ b/drivers/usb/dwc3/core.h
@@ -195,6 +195,7 @@
#define DWC3_GUSB3PIPECTL_SUSPHY (1 << 17)
#define DWC3_GUSB3PIPECTL_DELAY_P1P2P3 (7 << 19)
#define DWC3_GUSB3PIPECTL_DIS_RXDET_U3_RXDET (1 << 22)
+#define DWC3_GUSB3PIPECTL_ELASTIC_BUF_MODE (1 << 0)
/* Global TX Fifo Size Register */
#define DWC3_GTXFIFOSIZ_TXFDEF(n) ((n) & 0xffff)
diff --git a/drivers/usb/dwc3/dwc3-msm.c b/drivers/usb/dwc3/dwc3-msm.c
index a27eb09..a5f586b 100644
--- a/drivers/usb/dwc3/dwc3-msm.c
+++ b/drivers/usb/dwc3/dwc3-msm.c
@@ -37,6 +37,8 @@
#include <linux/regulator/consumer.h>
#include <linux/power_supply.h>
#include <linux/qpnp/qpnp-adc.h>
+#include <linux/cdev.h>
+#include <linux/completion.h>
#include <mach/rpm-regulator.h>
#include <mach/rpm-regulator-smd.h>
@@ -134,6 +136,7 @@
*
*/
#define QSCRATCH_REG_OFFSET (0x000F8800)
+#define QSCRATCH_CTRL_REG (QSCRATCH_REG_OFFSET + 0x04)
#define QSCRATCH_GENERAL_CFG (QSCRATCH_REG_OFFSET + 0x08)
#define HS_PHY_CTRL_REG (QSCRATCH_REG_OFFSET + 0x10)
#define PARAMETER_OVERRIDE_X_REG (QSCRATCH_REG_OFFSET + 0x14)
@@ -218,6 +221,15 @@
unsigned long lpm_flags;
#define MDWC3_CORECLK_OFF BIT(0)
#define MDWC3_TCXO_SHUTDOWN BIT(1)
+
+ u32 qscratch_ctl_val;
+ dev_t ext_chg_dev;
+ struct cdev ext_chg_cdev;
+ struct class *ext_chg_class;
+ struct device *ext_chg_device;
+ bool ext_chg_opened;
+ bool ext_chg_active;
+ struct completion ext_chg_wait;
};
#define USB_HSPHY_3P3_VOL_MIN 3050000 /* uV */
@@ -369,15 +381,29 @@
*/
static u32 dwc3_msm_ssusb_read_phycreg(void *base, u32 addr)
{
+ bool first_read = true;
+
iowrite32(addr, base + SS_CR_PROTOCOL_DATA_IN_REG);
iowrite32(0x1, base + SS_CR_PROTOCOL_CAP_ADDR_REG);
while (ioread32(base + SS_CR_PROTOCOL_CAP_ADDR_REG))
cpu_relax();
+ /*
+ * Due to hardware bug, first read of SSPHY register might be
+ * incorrect. Hence as workaround, SW should perform SSPHY register
+ * read twice, but use only second read and ignore first read.
+ */
+retry:
iowrite32(0x1, base + SS_CR_PROTOCOL_READ_REG);
while (ioread32(base + SS_CR_PROTOCOL_READ_REG))
cpu_relax();
+ if (first_read) {
+ ioread32(base + SS_CR_PROTOCOL_DATA_OUT_REG);
+ first_read = false;
+ goto retry;
+ }
+
return ioread32(base + SS_CR_PROTOCOL_DATA_OUT_REG);
}
@@ -1362,6 +1388,11 @@
dwc3_msm_read_reg(msm->base, CGCTL_REG) | 0x18);
dwc3_msm_ss_phy_reg_init(msm);
+ /*
+ * This is required to restore the POR value after userspace
+ * is done with charger detection.
+ */
+ msm->qscratch_ctl_val = dwc3_msm_read_reg(msm->base, QSCRATCH_CTRL_REG);
}
static void dwc3_msm_block_reset(bool core_reset)
@@ -1469,6 +1500,8 @@
{
u32 chg_ctrl;
+ dwc3_msm_write_reg(mdwc->base, QSCRATCH_CTRL_REG,
+ mdwc->qscratch_ctl_val);
/* Clear charger detecting control bits */
dwc3_msm_write_reg(mdwc->base, CHARGING_DET_CTRL_REG, 0x0);
@@ -1492,7 +1525,8 @@
case DWC3_DCP_CHARGER: return "USB_DCP_CHARGER";
case DWC3_CDP_CHARGER: return "USB_CDP_CHARGER";
case DWC3_PROPRIETARY_CHARGER: return "USB_PROPRIETARY_CHARGER";
- default: return "INVALID_CHARGER";
+ case DWC3_UNSUPPORTED_CHARGER: return "INVALID_CHARGER";
+ default: return "UNKNOWN_CHARGER";
}
}
@@ -1522,9 +1556,17 @@
if (is_dcd || tmout) {
dwc3_chg_disable_dcd(mdwc);
if (dwc3_chg_det_check_linestate(mdwc)) {
- dev_dbg(mdwc->dev, "proprietary charger\n");
- mdwc->charger.chg_type =
+ dwc3_chg_enable_primary_det(mdwc);
+ usleep_range(1000, 1200);
+ vout = dwc3_chg_det_check_output(mdwc);
+ if (!vout)
+ mdwc->charger.chg_type =
+ DWC3_UNSUPPORTED_CHARGER;
+ else
+ mdwc->charger.chg_type =
DWC3_PROPRIETARY_CHARGER;
+ dwc3_msm_write_reg(mdwc->base,
+ CHARGING_DET_CTRL_REG, 0x0);
mdwc->chg_state = USB_CHG_STATE_DETECTED;
delay = 0;
break;
@@ -1562,9 +1604,14 @@
case USB_CHG_STATE_DETECTED:
dwc3_chg_block_reset(mdwc);
/* Enable VDP_SRC */
- if (mdwc->charger.chg_type == DWC3_DCP_CHARGER)
+ if (mdwc->charger.chg_type == DWC3_DCP_CHARGER) {
dwc3_msm_write_readback(mdwc->base,
CHARGING_DET_CTRL_REG, 0x1F, 0x10);
+ if (mdwc->ext_chg_opened) {
+ init_completion(&mdwc->ext_chg_wait);
+ mdwc->ext_chg_active = true;
+ }
+ }
dev_dbg(mdwc->dev, "chg_type = %s\n",
chg_to_string(mdwc->charger.chg_type));
mdwc->charger.notify_detection_complete(mdwc->otg_xceiv->otg,
@@ -1626,6 +1673,10 @@
(mdwc->charger.chg_type == DWC3_PROPRIETARY_CHARGER));
host_bus_suspend = mdwc->host_mode == 1;
+ if (!dcp && !host_bus_suspend)
+ dwc3_msm_write_reg(mdwc->base, QSCRATCH_CTRL_REG,
+ mdwc->qscratch_ctl_val);
+
/* Sequence to put SSPHY in low power state:
* 1. Clear REF_SS_PHY_EN in SS_PHY_CTRL_REG
* 2. Clear REF_USE_PAD in SS_PHY_CTRL_REG
@@ -1850,6 +1901,30 @@
return 0;
}
+static void dwc3_wait_for_ext_chg_done(struct dwc3_msm *mdwc)
+{
+ unsigned long t;
+
+ /*
+ * Defer next cable connect event till external charger
+ * detection is completed.
+ */
+
+ if (mdwc->ext_chg_active && (mdwc->ext_xceiv.bsv ||
+ !mdwc->ext_xceiv.id)) {
+
+ dev_dbg(mdwc->dev, "before ext chg wait\n");
+
+ t = wait_for_completion_timeout(&mdwc->ext_chg_wait,
+ msecs_to_jiffies(3000));
+ if (!t)
+ dev_err(mdwc->dev, "ext chg wait timeout\n");
+ else
+ dev_dbg(mdwc->dev, "ext chg wait done\n");
+ }
+
+}
+
static void dwc3_resume_work(struct work_struct *w)
{
struct dwc3_msm *mdwc = container_of(w, struct dwc3_msm,
@@ -1859,9 +1934,11 @@
/* handle any event that was queued while work was already running */
if (!atomic_read(&mdwc->in_lpm)) {
dev_dbg(mdwc->dev, "%s: notifying xceiv event\n", __func__);
- if (mdwc->otg_xceiv)
+ if (mdwc->otg_xceiv) {
+ dwc3_wait_for_ext_chg_done(mdwc);
mdwc->ext_xceiv.notify_ext_events(mdwc->otg_xceiv->otg,
DWC3_EVENT_XCEIV_STATE);
+ }
return;
}
@@ -1874,9 +1951,11 @@
mdwc->ext_xceiv.notify_ext_events(mdwc->otg_xceiv->otg,
DWC3_EVENT_PHY_RESUME);
pm_runtime_put_noidle(mdwc->dev);
- if (mdwc->otg_xceiv && (mdwc->ext_xceiv.otg_capability))
+ if (mdwc->otg_xceiv && (mdwc->ext_xceiv.otg_capability)) {
+ dwc3_wait_for_ext_chg_done(mdwc);
mdwc->ext_xceiv.notify_ext_events(mdwc->otg_xceiv->otg,
DWC3_EVENT_XCEIV_STATE);
+ }
}
}
@@ -2089,6 +2168,7 @@
POWER_SUPPLY_PROP_PRESENT,
POWER_SUPPLY_PROP_ONLINE,
POWER_SUPPLY_PROP_CURRENT_MAX,
+ POWER_SUPPLY_PROP_TYPE,
POWER_SUPPLY_PROP_SCOPE,
};
@@ -2261,6 +2341,131 @@
static DEVICE_ATTR(adc_enable, S_IRUGO | S_IWUSR, adc_enable_show,
adc_enable_store);
+static int dwc3_msm_ext_chg_open(struct inode *inode, struct file *file)
+{
+ struct dwc3_msm *mdwc = context;
+
+ pr_debug("dwc3-msm ext chg open\n");
+
+ mdwc->ext_chg_opened = true;
+ return 0;
+}
+
+static ssize_t
+dwc3_msm_ext_chg_write(struct file *file, const char __user *ubuf,
+ size_t size, loff_t *pos)
+{
+ struct dwc3_msm *mdwc = context;
+ char kbuf[16];
+
+ memset(kbuf, 0x00, sizeof(kbuf));
+ if (copy_from_user(&kbuf, ubuf, min_t(size_t, sizeof(kbuf) - 1, size)))
+ return -EFAULT;
+
+ pr_debug("%s: buf = %s\n", __func__, kbuf);
+
+ if (!strncmp(kbuf, "enable", 6)) {
+ pr_info("%s: on\n", __func__);
+ if (mdwc->charger.chg_type == DWC3_DCP_CHARGER) {
+ pm_runtime_get_sync(mdwc->dev);
+ } else {
+ mdwc->ext_chg_active = false;
+ complete(&mdwc->ext_chg_wait);
+ return -ENODEV;
+ }
+ } else if (!strncmp(kbuf, "disable", 7)) {
+ pr_info("%s: off\n", __func__);
+ mdwc->ext_chg_active = false;
+ complete(&mdwc->ext_chg_wait);
+ pm_runtime_put(mdwc->dev);
+ } else {
+ return -EINVAL;
+ }
+
+ return size;
+}
+
+static int dwc3_msm_ext_chg_mmap(struct file *file, struct vm_area_struct *vma)
+{
+ unsigned long vsize = vma->vm_end - vma->vm_start;
+ int ret;
+
+ pr_debug("%s: size = %lu %x\n", __func__, vsize, (int) vma->vm_pgoff);
+
+ vma->vm_page_prot = pgprot_noncached(vma->vm_page_prot);
+
+ ret = io_remap_pfn_range(vma, vma->vm_start, vma->vm_pgoff,
+ vsize, vma->vm_page_prot);
+ if (ret < 0)
+ pr_err("%s: failed with return val %d\n", __func__, ret);
+
+ return ret;
+}
+
+static int dwc3_msm_ext_chg_release(struct inode *inode, struct file *file)
+{
+ struct dwc3_msm *mdwc = context;
+
+ pr_debug("dwc3-msm ext chg release\n");
+
+ mdwc->ext_chg_opened = false;
+
+ return 0;
+}
+
+static const struct file_operations dwc3_msm_ext_chg_fops = {
+ .owner = THIS_MODULE,
+ .open = dwc3_msm_ext_chg_open,
+ .write = dwc3_msm_ext_chg_write,
+ .mmap = dwc3_msm_ext_chg_mmap,
+ .release = dwc3_msm_ext_chg_release,
+};
+
+static int dwc3_msm_setup_cdev(struct dwc3_msm *mdwc)
+{
+ int ret;
+
+ ret = alloc_chrdev_region(&mdwc->ext_chg_dev, 0, 1, "usb_ext_chg");
+ if (ret < 0) {
+ pr_err("Fail to allocate usb ext char dev region\n");
+ return ret;
+ }
+ mdwc->ext_chg_class = class_create(THIS_MODULE, "dwc_ext_chg");
+ if (ret < 0) {
+ pr_err("Fail to create usb ext chg class\n");
+ goto unreg_chrdev;
+ }
+ cdev_init(&mdwc->ext_chg_cdev, &dwc3_msm_ext_chg_fops);
+ mdwc->ext_chg_cdev.owner = THIS_MODULE;
+
+ ret = cdev_add(&mdwc->ext_chg_cdev, mdwc->ext_chg_dev, 1);
+ if (ret < 0) {
+ pr_err("Fail to add usb ext chg cdev\n");
+ goto destroy_class;
+ }
+ mdwc->ext_chg_device = device_create(mdwc->ext_chg_class,
+ NULL, mdwc->ext_chg_dev, NULL,
+ "usb_ext_chg");
+ if (IS_ERR(mdwc->ext_chg_device)) {
+ pr_err("Fail to create usb ext chg device\n");
+ ret = PTR_ERR(mdwc->ext_chg_device);
+ mdwc->ext_chg_device = NULL;
+ goto del_cdev;
+ }
+
+ pr_debug("dwc3 msm ext chg cdev setup success\n");
+ return 0;
+
+del_cdev:
+ cdev_del(&mdwc->ext_chg_cdev);
+destroy_class:
+ class_destroy(mdwc->ext_chg_class);
+unreg_chrdev:
+ unregister_chrdev_region(mdwc->ext_chg_dev, 1);
+
+ return ret;
+}
+
static int __devinit dwc3_msm_probe(struct platform_device *pdev)
{
struct device_node *node = pdev->dev.of_node;
@@ -2288,6 +2493,7 @@
INIT_WORK(&msm->restart_usb_work, dwc3_restart_usb_work);
INIT_WORK(&msm->id_work, dwc3_id_work);
INIT_DELAYED_WORK(&msm->init_adc_work, dwc3_init_adc_work);
+ init_completion(&msm->ext_chg_wait);
msm->xo_clk = clk_get(&pdev->dev, "xo");
if (IS_ERR(msm->xo_clk)) {
@@ -2651,6 +2857,11 @@
}
msm->otg_xceiv = NULL;
}
+ if (msm->ext_xceiv.otg_capability && msm->charger.start_detection) {
+ ret = dwc3_msm_setup_cdev(msm);
+ if (ret)
+ dev_err(&pdev->dev, "Fail to setup dwc3 setup cdev\n");
+ }
wake_lock_init(&msm->wlock, WAKE_LOCK_SUSPEND, "msm_dwc3");
wake_lock(&msm->wlock);
@@ -2703,6 +2914,13 @@
{
struct dwc3_msm *msm = platform_get_drvdata(pdev);
+ if (!msm->ext_chg_device) {
+ device_destroy(msm->ext_chg_class, msm->ext_chg_dev);
+ cdev_del(&msm->ext_chg_cdev);
+ class_destroy(msm->ext_chg_class);
+ unregister_chrdev_region(msm->ext_chg_dev, 1);
+ }
+
if (msm->id_adc_detect)
qpnp_adc_tm_usbid_end();
if (dwc3_debugfs_root)
@@ -2791,8 +3009,27 @@
static int dwc3_msm_runtime_idle(struct device *dev)
{
+ struct dwc3_msm *mdwc = dev_get_drvdata(dev);
+
dev_dbg(dev, "DWC3-msm runtime idle\n");
+ if (mdwc->ext_chg_active) {
+ dev_dbg(dev, "Deferring LPM\n");
+ /*
+ * Charger detection may happen in user space.
+ * Delay entering LPM by 3 sec. Otherwise we
+ * have to exit LPM when user space begins
+ * charger detection.
+ *
+ * This timer will be canceled when user space
+ * votes against LPM by incrementing PM usage
+ * counter. We enter low power mode when
+ * PM usage counter is decremented.
+ */
+ pm_schedule_suspend(dev, 3000);
+ return -EAGAIN;
+ }
+
return 0;
}
diff --git a/drivers/usb/dwc3/dwc3_otg.c b/drivers/usb/dwc3/dwc3_otg.c
index a3b2617..98c9b4c 100644
--- a/drivers/usb/dwc3/dwc3_otg.c
+++ b/drivers/usb/dwc3/dwc3_otg.c
@@ -13,6 +13,7 @@
* GNU General Public License for more details.
*/
+#include <linux/module.h>
#include <linux/usb.h>
#include <linux/usb/hcd.h>
#include <linux/platform_device.h>
@@ -23,6 +24,10 @@
#include "io.h"
#include "xhci.h"
+#define MAX_INVALID_CHRGR_RETRY 3
+static int max_chgr_retry_count = MAX_INVALID_CHRGR_RETRY;
+module_param(max_chgr_retry_count, int, S_IRUGO | S_IWUSR);
+MODULE_PARM_DESC(max_chgr_retry_count, "Max invalid charger retry count");
static void dwc3_otg_reset(struct dwc3_otg *dotg);
static void dwc3_otg_notify_host_mode(struct usb_otg *otg, int host_mode);
@@ -498,7 +503,7 @@
power_supply_set_supply_type(dotg->psy, power_supply_type);
- if ((dotg->charger->chg_type == DWC3_CDP_CHARGER) && mA > 2)
+ if (dotg->charger->chg_type == DWC3_CDP_CHARGER)
mA = DWC3_IDEV_CHG_MAX;
if (dotg->charger->max_power == mA)
@@ -686,6 +691,7 @@
dev_dbg(phy->dev, "!id\n");
phy->state = OTG_STATE_A_IDLE;
work = 1;
+ dotg->charger_retry_count = 0;
if (charger) {
if (charger->chg_type == DWC3_INVALID_CHARGER)
charger->start_detection(dotg->charger,
@@ -720,6 +726,17 @@
phy->state = OTG_STATE_B_PERIPHERAL;
work = 1;
break;
+ case DWC3_UNSUPPORTED_CHARGER:
+ dotg->charger_retry_count++;
+ if (dotg->charger_retry_count ==
+ max_chgr_retry_count) {
+ dwc3_otg_set_power(phy, 0);
+ pm_runtime_put_sync(phy->dev);
+ break;
+ }
+ charger->start_detection(dotg->charger,
+ false);
+
default:
dev_dbg(phy->dev, "chg_det started\n");
charger->start_detection(charger, true);
@@ -744,6 +761,7 @@
if (charger)
charger->start_detection(dotg->charger, false);
+ dotg->charger_retry_count = 0;
dwc3_otg_set_power(phy, 0);
dev_dbg(phy->dev, "No device, trying to suspend\n");
pm_runtime_put_sync(phy->dev);
diff --git a/drivers/usb/dwc3/dwc3_otg.h b/drivers/usb/dwc3/dwc3_otg.h
index 90e26cf..b00468e 100644
--- a/drivers/usb/dwc3/dwc3_otg.h
+++ b/drivers/usb/dwc3/dwc3_otg.h
@@ -50,6 +50,7 @@
struct power_supply *psy;
struct completion dwc3_xcvr_vbus_init;
int host_bus_suspend;
+ int charger_retry_count;
};
/**
@@ -70,6 +71,7 @@
DWC3_DCP_CHARGER,
DWC3_CDP_CHARGER,
DWC3_PROPRIETARY_CHARGER,
+ DWC3_UNSUPPORTED_CHARGER,
};
struct dwc3_charger {
diff --git a/drivers/usb/dwc3/ep0.c b/drivers/usb/dwc3/ep0.c
index bb0b2fb..0cfd515 100644
--- a/drivers/usb/dwc3/ep0.c
+++ b/drivers/usb/dwc3/ep0.c
@@ -393,6 +393,7 @@
u32 recip;
u32 wValue;
u32 wIndex;
+ u32 reg;
int ret;
wValue = le16_to_cpu(ctrl->wValue);
@@ -413,6 +414,13 @@
return -EINVAL;
if (dwc->speed != DWC3_DSTS_SUPERSPEED)
return -EINVAL;
+
+ reg = dwc3_readl(dwc->regs, DWC3_DCTL);
+ if (set)
+ reg |= DWC3_DCTL_INITU1ENA;
+ else
+ reg &= ~DWC3_DCTL_INITU1ENA;
+ dwc3_writel(dwc->regs, DWC3_DCTL, reg);
break;
case USB_DEVICE_U2_ENABLE:
@@ -420,6 +428,13 @@
return -EINVAL;
if (dwc->speed != DWC3_DSTS_SUPERSPEED)
return -EINVAL;
+
+ reg = dwc3_readl(dwc->regs, DWC3_DCTL);
+ if (set)
+ reg |= DWC3_DCTL_INITU2ENA;
+ else
+ reg &= ~DWC3_DCTL_INITU2ENA;
+ dwc3_writel(dwc->regs, DWC3_DCTL, reg);
break;
case USB_DEVICE_LTM_ENABLE:
@@ -524,6 +539,7 @@
{
u32 cfg;
int ret;
+ u32 reg;
dwc->start_config_issued = false;
cfg = le16_to_cpu(ctrl->wValue);
@@ -538,6 +554,14 @@
/* if the cfg matches and the cfg is non zero */
if (cfg && (!ret || (ret == USB_GADGET_DELAYED_STATUS))) {
dwc->dev_state = DWC3_CONFIGURED_STATE;
+ /*
+ * Enable transition to U1/U2 state when
+ * nothing is pending from application.
+ */
+ reg = dwc3_readl(dwc->regs, DWC3_DCTL);
+ reg |= (DWC3_DCTL_ACCEPTU1ENA | DWC3_DCTL_ACCEPTU2ENA);
+ dwc3_writel(dwc->regs, DWC3_DCTL, reg);
+
dwc->resize_fifos = true;
dev_dbg(dwc->dev, "resize fifos flag SET\n");
}
diff --git a/drivers/usb/dwc3/gadget.c b/drivers/usb/dwc3/gadget.c
index 1059a4d..63698de 100644
--- a/drivers/usb/dwc3/gadget.c
+++ b/drivers/usb/dwc3/gadget.c
@@ -36,6 +36,7 @@
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
+#include <linux/module.h>
#include <linux/kernel.h>
#include <linux/delay.h>
#include <linux/slab.h>
@@ -56,6 +57,11 @@
#include "debug.h"
#include "io.h"
+static bool tx_fifo_resize_enable;
+module_param(tx_fifo_resize_enable, bool, S_IRUGO|S_IWUSR);
+MODULE_PARM_DESC(tx_fifo_resize_enable,
+ "Enable allocating Tx fifo for endpoints");
+
/**
* dwc3_gadget_set_test_mode - Enables USB2 Test Modes
* @dwc: pointer to our context structure
@@ -178,7 +184,7 @@
int mdwidth;
int num;
- if (!dwc->needs_fifo_resize)
+ if (!dwc->needs_fifo_resize && !tx_fifo_resize_enable)
return 0;
ram1_depth = DWC3_RAM1_DEPTH(dwc->hwparams.hwparams7);
diff --git a/drivers/usb/gadget/android.c b/drivers/usb/gadget/android.c
index 36a43c3..38b1967 100644
--- a/drivers/usb/gadget/android.c
+++ b/drivers/usb/gadget/android.c
@@ -671,6 +671,9 @@
#define MAX_XPORT_STR_LEN 50
static char rmnet_transports[MAX_XPORT_STR_LEN];
+/*rmnet transport name string - "rmnet_hsic[,rmnet_hsusb]" */
+static char rmnet_xport_names[MAX_XPORT_STR_LEN];
+
static void rmnet_function_cleanup(struct android_usb_function *f)
{
frmnet_cleanup();
@@ -683,18 +686,28 @@
int err = 0;
char *ctrl_name;
char *data_name;
+ char *tname = NULL;
char buf[MAX_XPORT_STR_LEN], *b;
+ char xport_name_buf[MAX_XPORT_STR_LEN], *tb;
static int rmnet_initialized, ports;
if (!rmnet_initialized) {
rmnet_initialized = 1;
strlcpy(buf, rmnet_transports, sizeof(buf));
b = strim(buf);
+
+ strlcpy(xport_name_buf, rmnet_xport_names,
+ sizeof(xport_name_buf));
+ tb = strim(xport_name_buf);
+
while (b) {
ctrl_name = strsep(&b, ",");
data_name = strsep(&b, ",");
if (ctrl_name && data_name) {
- err = frmnet_init_port(ctrl_name, data_name);
+ if (tb)
+ tname = strsep(&tb, ",");
+ err = frmnet_init_port(ctrl_name, data_name,
+ tname);
if (err) {
pr_err("rmnet: Cannot open ctrl port:"
"'%s' data port:'%s'\n",
@@ -738,12 +751,34 @@
return size;
}
+static ssize_t rmnet_xport_names_show(struct device *dev,
+ struct device_attribute *attr, char *buf)
+{
+ return snprintf(buf, PAGE_SIZE, "%s\n", rmnet_xport_names);
+}
+
+static ssize_t rmnet_xport_names_store(
+ struct device *device, struct device_attribute *attr,
+ const char *buff, size_t size)
+{
+ strlcpy(rmnet_xport_names, buff, sizeof(rmnet_xport_names));
+
+ return size;
+}
+
static struct device_attribute dev_attr_rmnet_transports =
__ATTR(transports, S_IRUGO | S_IWUSR,
rmnet_transports_show,
rmnet_transports_store);
+
+static struct device_attribute dev_attr_rmnet_xport_names =
+ __ATTR(transport_names, S_IRUGO | S_IWUSR,
+ rmnet_xport_names_show,
+ rmnet_xport_names_store);
+
static struct device_attribute *rmnet_function_attributes[] = {
&dev_attr_rmnet_transports,
+ &dev_attr_rmnet_xport_names,
NULL };
static struct android_usb_function rmnet_function = {
@@ -1199,9 +1234,33 @@
return size;
}
+/*enabled FSERIAL transport names - "serial_hsic[,serial_hsusb]"*/
+static char serial_xport_names[32];
+static ssize_t serial_xport_names_store(
+ struct device *device, struct device_attribute *attr,
+ const char *buff, size_t size)
+{
+ strlcpy(serial_xport_names, buff, sizeof(serial_xport_names));
+
+ return size;
+}
+
+static ssize_t serial_xport_names_show(struct device *dev,
+ struct device_attribute *attr, char *buf)
+{
+ return snprintf(buf, PAGE_SIZE, "%s\n", serial_xport_names);
+}
+
static DEVICE_ATTR(transports, S_IWUSR, NULL, serial_transports_store);
-static struct device_attribute *serial_function_attributes[] =
- { &dev_attr_transports, NULL };
+static struct device_attribute dev_attr_serial_xport_names =
+ __ATTR(transport_names, S_IRUGO | S_IWUSR,
+ serial_xport_names_show,
+ serial_xport_names_store);
+
+static struct device_attribute *serial_function_attributes[] = {
+ &dev_attr_transports,
+ &dev_attr_serial_xport_names,
+ NULL };
static void serial_function_cleanup(struct android_usb_function *f)
{
@@ -1211,8 +1270,8 @@
static int serial_function_bind_config(struct android_usb_function *f,
struct usb_configuration *c)
{
- char *name;
- char buf[32], *b;
+ char *name, *xport_name = NULL;
+ char buf[32], *b, xport_name_buf[32], *tb;
int err = -1, i;
static int serial_initialized = 0, ports = 0;
@@ -1223,11 +1282,16 @@
strlcpy(buf, serial_transports, sizeof(buf));
b = strim(buf);
+ strlcpy(xport_name_buf, serial_xport_names, sizeof(xport_name_buf));
+ tb = strim(xport_name_buf);
+
while (b) {
name = strsep(&b, ",");
if (name) {
- err = gserial_init_port(ports, name);
+ if (tb)
+ xport_name = strsep(&tb, ",");
+ err = gserial_init_port(ports, name, xport_name);
if (err) {
pr_err("serial: Cannot open port '%s'", name);
goto out;
diff --git a/drivers/usb/gadget/ci13xxx_msm.c b/drivers/usb/gadget/ci13xxx_msm.c
index 3cad3ce..a9c073b 100644
--- a/drivers/usb/gadget/ci13xxx_msm.c
+++ b/drivers/usb/gadget/ci13xxx_msm.c
@@ -16,6 +16,8 @@
#define MSM_USB_BASE (udc->regs)
+#define CI13XXX_MSM_MAX_LOG2_ITC 7
+
struct ci13xxx_udc_context {
int irq;
void __iomem *regs;
@@ -67,6 +69,26 @@
ULPI_CLR(ULPI_MISC_A));
}
+/* Link power management will reduce power consumption by
+ * short time HW suspend/resume.
+ */
+static void ci13xxx_msm_set_l1(struct ci13xxx *udc)
+{
+ int temp;
+ struct device *dev = udc->gadget.dev.parent;
+
+ dev_dbg(dev, "Enable link power management\n");
+
+ /* Enable remote wakeup and L1 for IN EPs */
+ writel_relaxed(0xffff0000, USB_L1_EP_CTRL);
+
+ temp = readl_relaxed(USB_L1_CONFIG);
+ temp |= L1_CONFIG_LPM_EN | L1_CONFIG_REMOTE_WAKEUP |
+ L1_CONFIG_GATE_SYS_CLK | L1_CONFIG_PHY_LPM |
+ L1_CONFIG_PLL;
+ writel_relaxed(temp, USB_L1_CONFIG);
+}
+
static void ci13xxx_msm_connect(void)
{
struct ci13xxx *udc = _udc;
@@ -107,6 +129,9 @@
writel_relaxed(0, USB_AHBBURST);
writel_relaxed(0x08, USB_AHBMODE);
+ if (udc->gadget.l1_supported)
+ ci13xxx_msm_set_l1(udc);
+
if (phy && (phy->flags & ENABLE_SECONDARY_PHY)) {
int temp;
@@ -177,7 +202,7 @@
CI13XXX_ZERO_ITC |
CI13XXX_DISABLE_STREAMING |
CI13XXX_IS_OTG,
-
+ .nz_itc = 0,
.notify_event = ci13xxx_msm_notify_event,
};
@@ -231,9 +256,23 @@
{
struct resource *res;
int ret;
+ struct ci13xxx_platform_data *pdata = pdev->dev.platform_data;
+ bool is_l1_supported = false;
dev_dbg(&pdev->dev, "ci13xxx_msm_probe\n");
+ if (pdata) {
+ /* Acceptable values for nz_itc are: 0,1,2,4,8,16,32,64 */
+ if (pdata->log2_itc > CI13XXX_MSM_MAX_LOG2_ITC ||
+ pdata->log2_itc <= 0)
+ ci13xxx_msm_udc_driver.nz_itc = 0;
+ else
+ ci13xxx_msm_udc_driver.nz_itc =
+ 1 << (pdata->log2_itc-1);
+
+ is_l1_supported = pdata->l1_supported;
+ }
+
res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
if (!res) {
dev_err(&pdev->dev, "failed to get platform resource mem\n");
@@ -252,6 +291,8 @@
goto iounmap;
}
+ _udc->gadget.l1_supported = is_l1_supported;
+
_udc_ctxt.irq = platform_get_irq(pdev, 0);
if (_udc_ctxt.irq < 0) {
dev_err(&pdev->dev, "IRQ not found\n");
@@ -315,7 +356,9 @@
static struct platform_driver ci13xxx_msm_driver = {
.probe = ci13xxx_msm_probe,
- .driver = { .name = "msm_hsusb", },
+ .driver = {
+ .name = "msm_hsusb",
+ },
.remove = ci13xxx_msm_remove,
};
MODULE_ALIAS("platform:msm_hsusb");
diff --git a/drivers/usb/gadget/ci13xxx_udc.c b/drivers/usb/gadget/ci13xxx_udc.c
index 939eb6d..e7074a2 100644
--- a/drivers/usb/gadget/ci13xxx_udc.c
+++ b/drivers/usb/gadget/ci13xxx_udc.c
@@ -367,7 +367,10 @@
* 8 micro frames. If CPU can handle interrupts at faster rate, ITC
* can be set to lesser value to gain performance.
*/
- if (udc->udc_driver->flags & CI13XXX_ZERO_ITC)
+ if (udc->udc_driver->nz_itc)
+ hw_cwrite(CAP_USBCMD, USBCMD_ITC_MASK,
+ USBCMD_ITC(udc->udc_driver->nz_itc));
+ else if (udc->udc_driver->flags & CI13XXX_ZERO_ITC)
hw_cwrite(CAP_USBCMD, USBCMD_ITC_MASK, USBCMD_ITC(0));
if (hw_cread(CAP_USBMODE, USBMODE_CM) != USBMODE_CM_DEVICE) {
diff --git a/drivers/usb/gadget/ci13xxx_udc.h b/drivers/usb/gadget/ci13xxx_udc.h
index 4c5b38d..f90ea86 100644
--- a/drivers/usb/gadget/ci13xxx_udc.h
+++ b/drivers/usb/gadget/ci13xxx_udc.h
@@ -129,6 +129,7 @@
struct ci13xxx_udc_driver {
const char *name;
unsigned long flags;
+ unsigned int nz_itc;
#define CI13XXX_REGS_SHARED BIT(0)
#define CI13XXX_REQUIRE_TRANSCEIVER BIT(1)
#define CI13XXX_PULLUP_ON_VBUS BIT(2)
@@ -180,11 +181,6 @@
first EP. */
};
-struct ci13xxx_platform_data {
- u8 usb_core_id;
- void *prv_data;
-};
-
/******************************************************************************
* REGISTERS
*****************************************************************************/
diff --git a/drivers/usb/gadget/composite.c b/drivers/usb/gadget/composite.c
index de4a233..27d67e3 100644
--- a/drivers/usb/gadget/composite.c
+++ b/drivers/usb/gadget/composite.c
@@ -515,7 +515,8 @@
/*
* A SuperSpeed device shall include the USB2.0 extension descriptor
- * and shall support LPM when operating in USB2.0 HS mode.
+ * and shall support LPM when operating in USB2.0 HS mode, as well as
+ * a HS device when operating in USB2.1 HS mode.
*/
usb_ext = cdev->req->buf + le16_to_cpu(bos->wTotalLength);
bos->bNumDeviceCaps++;
@@ -525,33 +526,37 @@
usb_ext->bDevCapabilityType = USB_CAP_TYPE_EXT;
usb_ext->bmAttributes = cpu_to_le32(USB_LPM_SUPPORT);
- /*
- * The Superspeed USB Capability descriptor shall be implemented by all
- * SuperSpeed devices.
- */
- ss_cap = cdev->req->buf + le16_to_cpu(bos->wTotalLength);
- bos->bNumDeviceCaps++;
- le16_add_cpu(&bos->wTotalLength, USB_DT_USB_SS_CAP_SIZE);
- ss_cap->bLength = USB_DT_USB_SS_CAP_SIZE;
- ss_cap->bDescriptorType = USB_DT_DEVICE_CAPABILITY;
- ss_cap->bDevCapabilityType = USB_SS_CAP_TYPE;
- ss_cap->bmAttributes = 0; /* LTM is not supported yet */
- ss_cap->wSpeedSupported = cpu_to_le16(USB_LOW_SPEED_OPERATION |
- USB_FULL_SPEED_OPERATION |
- USB_HIGH_SPEED_OPERATION |
- USB_5GBPS_OPERATION);
- ss_cap->bFunctionalitySupport = USB_LOW_SPEED_OPERATION;
+ if (gadget_is_superspeed(cdev->gadget)) {
+ /*
+ * The Superspeed USB Capability descriptor shall be
+ * implemented by all SuperSpeed devices.
+ */
+ ss_cap = cdev->req->buf + le16_to_cpu(bos->wTotalLength);
+ bos->bNumDeviceCaps++;
+ le16_add_cpu(&bos->wTotalLength, USB_DT_USB_SS_CAP_SIZE);
+ ss_cap->bLength = USB_DT_USB_SS_CAP_SIZE;
+ ss_cap->bDescriptorType = USB_DT_DEVICE_CAPABILITY;
+ ss_cap->bDevCapabilityType = USB_SS_CAP_TYPE;
+ ss_cap->bmAttributes = 0; /* LTM is not supported yet */
+ ss_cap->wSpeedSupported = cpu_to_le16(USB_LOW_SPEED_OPERATION |
+ USB_FULL_SPEED_OPERATION |
+ USB_HIGH_SPEED_OPERATION |
+ USB_5GBPS_OPERATION);
+ ss_cap->bFunctionalitySupport = USB_LOW_SPEED_OPERATION;
- /* Get Controller configuration */
- if (cdev->gadget->ops->get_config_params)
- cdev->gadget->ops->get_config_params(&dcd_config_params);
- else {
- dcd_config_params.bU1devExitLat = USB_DEFAULT_U1_DEV_EXIT_LAT;
- dcd_config_params.bU2DevExitLat =
- cpu_to_le16(USB_DEFAULT_U2_DEV_EXIT_LAT);
+ /* Get Controller configuration */
+ if (cdev->gadget->ops->get_config_params)
+ cdev->gadget->ops->get_config_params
+ (&dcd_config_params);
+ else {
+ dcd_config_params.bU1devExitLat =
+ USB_DEFAULT_U1_DEV_EXIT_LAT;
+ dcd_config_params.bU2DevExitLat =
+ cpu_to_le16(USB_DEFAULT_U2_DEV_EXIT_LAT);
+ }
+ ss_cap->bU1devExitLat = dcd_config_params.bU1devExitLat;
+ ss_cap->bU2DevExitLat = dcd_config_params.bU2DevExitLat;
}
- ss_cap->bU1devExitLat = dcd_config_params.bU1devExitLat;
- ss_cap->bU2DevExitLat = dcd_config_params.bU2DevExitLat;
return le16_to_cpu(bos->wTotalLength);
}
@@ -1124,6 +1129,9 @@
cdev->desc.bcdUSB = cpu_to_le16(0x0210);
DBG(cdev, "Config SS device in HS\n");
}
+ } else if (gadget->l1_supported) {
+ cdev->desc.bcdUSB = cpu_to_le16(0x0210);
+ DBG(cdev, "Config HS device with LPM(L1)\n");
}
value = min(w_length, (u16) sizeof cdev->desc);
@@ -1164,7 +1172,8 @@
value = min(w_length, (u16) value);
break;
case USB_DT_BOS:
- if (gadget_is_superspeed(gadget)) {
+ if (gadget_is_superspeed(gadget) ||
+ gadget->l1_supported) {
value = bos_desc(cdev);
value = min(w_length, (u16) value);
}
@@ -1371,6 +1380,10 @@
reset_config(cdev);
if (composite->disconnect)
composite->disconnect(cdev);
+ if (cdev->delayed_status != 0) {
+ INFO(cdev, "delayed status mismatch..resetting\n");
+ cdev->delayed_status = 0;
+ }
spin_unlock_irqrestore(&cdev->lock, flags);
}
diff --git a/drivers/usb/gadget/f_adb.c b/drivers/usb/gadget/f_adb.c
index ff2287e..55f5b80 100644
--- a/drivers/usb/gadget/f_adb.c
+++ b/drivers/usb/gadget/f_adb.c
@@ -662,7 +662,7 @@
{
struct adb_dev *dev = _adb_dev;
- printk(KERN_INFO "adb_bind_config\n");
+ pr_debug("adb_bind_config\n");
dev->cdev = c->cdev;
dev->function.name = "adb";
diff --git a/drivers/usb/gadget/f_mbim.c b/drivers/usb/gadget/f_mbim.c
index aaacd43..15f20ca 100644
--- a/drivers/usb/gadget/f_mbim.c
+++ b/drivers/usb/gadget/f_mbim.c
@@ -74,7 +74,6 @@
struct usb_composite_dev *cdev;
atomic_t online;
- bool is_open;
atomic_t open_excl;
atomic_t ioctl_excl;
@@ -747,11 +746,6 @@
pr_debug("Queue empty packet for QBI");
spin_lock(&dev->lock);
- if (!dev->is_open) {
- pr_err("%s: mbim file handler %p is not open", __func__, dev);
- spin_unlock(&dev->lock);
- return;
- }
cpkt = mbim_alloc_ctrl_pkt(0, GFP_ATOMIC);
if (!cpkt) {
@@ -976,12 +970,6 @@
memcpy(cpkt->buf, req->buf, len);
spin_lock(&dev->lock);
- if (!dev->is_open) {
- pr_err("mbim file handler %p is not open", dev);
- spin_unlock(&dev->lock);
- mbim_free_ctrl_pkt(cpkt);
- return;
- }
list_add_tail(&cpkt->list, &dev->cpkt_req_q);
spin_unlock(&dev->lock);
@@ -1455,6 +1443,7 @@
mbim_union_desc.bSlaveInterface0 = status;
mbim->bam_port.cdev = cdev;
+ mbim->bam_port.func = &mbim->function;
status = -ENODEV;
@@ -1574,6 +1563,7 @@
{
struct f_mbim *mbim = func_to_mbim(f);
+ bam_data_destroy(mbim->port_num);
if (gadget_is_dualspeed(c->cdev->gadget))
usb_free_descriptors(f->hs_descriptors);
usb_free_descriptors(f->descriptors);
@@ -1844,10 +1834,6 @@
atomic_set(&_mbim_dev->error, 0);
- spin_lock(&_mbim_dev->lock);
- _mbim_dev->is_open = true;
- spin_unlock(&_mbim_dev->lock);
-
pr_info("Exit, mbim file opened\n");
return 0;
@@ -1855,14 +1841,8 @@
static int mbim_release(struct inode *ip, struct file *fp)
{
- struct f_mbim *mbim = fp->private_data;
-
pr_info("Close mbim file");
- spin_lock(&mbim->lock);
- mbim->is_open = false;
- spin_unlock(&mbim->lock);
-
mbim_unlock(&_mbim_dev->open_excl);
return 0;
diff --git a/drivers/usb/gadget/f_mtp.c b/drivers/usb/gadget/f_mtp.c
index 37189d8..a4192ca 100644
--- a/drivers/usb/gadget/f_mtp.c
+++ b/drivers/usb/gadget/f_mtp.c
@@ -558,17 +558,15 @@
struct mtp_dev *dev = fp->private_data;
struct usb_composite_dev *cdev = dev->cdev;
struct usb_request *req;
- int r = count, xfer;
+ int r = count, xfer, len;
int ret = 0;
DBG(cdev, "mtp_read(%d)\n", count);
- if (count > mtp_rx_req_len)
- return -EINVAL;
+ len = ALIGN(count, dev->ep_out->maxpacket);
- if (!IS_ALIGNED(count, dev->ep_out->maxpacket))
- DBG(cdev, "%s - count(%d) not multiple of mtu(%d)\n", __func__,
- count, dev->ep_out->maxpacket);
+ if (len > mtp_rx_req_len)
+ return -EINVAL;
/* we will block until we're online */
DBG(cdev, "mtp_read: waiting for online state\n");
@@ -591,7 +589,7 @@
requeue_req:
/* queue a request */
req = dev->rx_req[0];
- req->length = mtp_rx_req_len;
+ req->length = len;
dev->rx_done = 0;
ret = usb_ep_queue(dev->ep_out, req, GFP_KERNEL);
if (ret < 0) {
@@ -696,8 +694,8 @@
break;
}
- if (count > MTP_BULK_BUFFER_SIZE)
- xfer = MTP_BULK_BUFFER_SIZE;
+ if (count > mtp_tx_req_len)
+ xfer = mtp_tx_req_len;
else
xfer = count;
if (xfer && copy_from_user(req->buf, buf, xfer)) {
@@ -789,8 +787,8 @@
break;
}
- if (count > MTP_BULK_BUFFER_SIZE)
- xfer = MTP_BULK_BUFFER_SIZE;
+ if (count > mtp_tx_req_len)
+ xfer = mtp_tx_req_len;
else
xfer = count;
diff --git a/drivers/usb/gadget/f_qc_ecm.c b/drivers/usb/gadget/f_qc_ecm.c
index a6b443f..3db5b51 100644
--- a/drivers/usb/gadget/f_qc_ecm.c
+++ b/drivers/usb/gadget/f_qc_ecm.c
@@ -846,6 +846,7 @@
DBG(c->cdev, "ecm unbind\n");
+ bam_data_destroy(0);
if (gadget_is_dualspeed(c->cdev->gadget))
usb_free_descriptors(f->hs_descriptors);
usb_free_descriptors(f->descriptors);
diff --git a/drivers/usb/gadget/f_qc_rndis.c b/drivers/usb/gadget/f_qc_rndis.c
index 267cf53..c1ab552 100644
--- a/drivers/usb/gadget/f_qc_rndis.c
+++ b/drivers/usb/gadget/f_qc_rndis.c
@@ -725,14 +725,14 @@
*/
rndis->port.cdc_filter = 0;
+ if (rndis_qc_bam_connect(rndis))
+ goto fail;
+
DBG(cdev, "RNDIS RX/TX early activation ...\n");
net = gether_qc_connect_name(&rndis->port, "rndis0", false);
if (IS_ERR(net))
return PTR_ERR(net);
- if (rndis_qc_bam_connect(rndis))
- goto fail;
-
rndis_set_param_dev(rndis->config, net,
&rndis->port.cdc_filter);
} else
@@ -976,6 +976,8 @@
{
struct f_rndis_qc *rndis = func_to_rndis_qc(f);
+ pr_debug("rndis_qc_unbind: free");
+ bam_data_destroy(0);
rndis_deregister(rndis->config);
rndis_exit();
diff --git a/drivers/usb/gadget/f_rmnet.c b/drivers/usb/gadget/f_rmnet.c
index f095efb..6bfa203 100644
--- a/drivers/usb/gadget/f_rmnet.c
+++ b/drivers/usb/gadget/f_rmnet.c
@@ -1121,7 +1121,7 @@
goto fail;
}
- pr_info("%s: RmNet(%d) %s Speed, IN:%s OUT:%s\n",
+ pr_debug("%s: RmNet(%d) %s Speed, IN:%s OUT:%s\n",
__func__, dev->port_num,
gadget_is_dualspeed(cdev->gadget) ? "dual" : "full",
dev->port.in->name, dev->port.out->name);
@@ -1230,7 +1230,8 @@
no_data_hsuart_ports = 0;
}
-static int frmnet_init_port(const char *ctrl_name, const char *data_name)
+static int frmnet_init_port(const char *ctrl_name, const char *data_name,
+ const char *port_name)
{
struct f_rmnet *dev;
struct rmnet_ports *rmnet_port;
@@ -1272,6 +1273,7 @@
no_ctrl_qti_ports++;
break;
case USB_GADGET_XPORT_HSIC:
+ ghsic_ctrl_set_port_name(port_name, ctrl_name);
rmnet_port->ctrl_xport_num = no_ctrl_hsic_ports;
no_ctrl_hsic_ports++;
break;
@@ -1299,6 +1301,7 @@
no_data_bam2bam_ports++;
break;
case USB_GADGET_XPORT_HSIC:
+ ghsic_data_set_port_name(port_name, data_name);
rmnet_port->data_xport_num = no_data_hsic_ports;
no_data_hsic_ports++;
break;
diff --git a/drivers/usb/gadget/f_serial.c b/drivers/usb/gadget/f_serial.c
index 74dba07..57cbc03 100644
--- a/drivers/usb/gadget/f_serial.c
+++ b/drivers/usb/gadget/f_serial.c
@@ -985,9 +985,11 @@
/**
* gserial_init_port - bind a gserial_port to its transport
*/
-static int gserial_init_port(int port_num, const char *name)
+static int gserial_init_port(int port_num, const char *name,
+ const char *port_name)
{
enum transport_type transport;
+ int ret = 0;
if (port_num >= GSERIAL_NO_PORTS)
return -ENODEV;
@@ -1013,6 +1015,9 @@
no_smd_ports++;
break;
case USB_GADGET_XPORT_HSIC:
+ ghsic_ctrl_set_port_name(port_name, name);
+ ghsic_data_set_port_name(port_name, name);
+
/*client port number will be updated in gport_setup*/
no_hsic_sports++;
break;
@@ -1028,5 +1033,5 @@
nr_ports++;
- return 0;
+ return ret;
}
diff --git a/drivers/usb/gadget/u_bam.c b/drivers/usb/gadget/u_bam.c
index b71f903..a775459 100644
--- a/drivers/usb/gadget/u_bam.c
+++ b/drivers/usb/gadget/u_bam.c
@@ -215,6 +215,9 @@
req->no_interrupt = 1;
}
+ /* Send ZLP in case packet length is multiple of maxpacksize */
+ req->zero = 1;
+
list_del(&req->list);
spin_unlock(&port->port_lock_dl);
@@ -639,6 +642,7 @@
gbam_epout_complete, GFP_ATOMIC);
if (ret) {
pr_err("%s: rx req allocation failed\n", __func__);
+ spin_unlock_irqrestore(&port->port_lock_ul, flags);
return;
}
@@ -655,6 +659,7 @@
if (ret) {
pr_err("%s: tx req allocation failed\n", __func__);
gbam_free_requests(ep, &d->rx_idle);
+ spin_unlock_irqrestore(&port->port_lock_dl, flags);
return;
}
@@ -725,11 +730,11 @@
int ret;
if (d->trans == USB_GADGET_XPORT_BAM2BAM_IPA) {
- teth_bridge_disconnect();
ret = usb_bam_disconnect_ipa(&d->ipa_params);
if (ret)
pr_err("%s: usb_bam_disconnect_ipa failed: err:%d\n",
__func__, ret);
+ teth_bridge_disconnect();
}
}
@@ -778,6 +783,7 @@
unsigned long flags;
if (d->trans == USB_GADGET_XPORT_BAM2BAM) {
+ usb_bam_reset_complete();
ret = usb_bam_connect(d->src_connection_idx, &d->src_pipe_idx);
if (ret) {
pr_err("%s: usb_bam_connect (src) failed: err:%d\n",
@@ -847,6 +853,7 @@
d->rx_req->context = port;
d->rx_req->complete = gbam_endless_rx_complete;
d->rx_req->length = 0;
+ d->rx_req->no_interrupt = 1;
sps_params = (MSM_SPS_MODE | d->src_pipe_idx |
MSM_VENDOR_ID) & ~MSM_IS_FINITE_TRANSFER;
d->rx_req->udc_priv = sps_params;
@@ -862,6 +869,7 @@
d->tx_req->context = port;
d->tx_req->complete = gbam_endless_tx_complete;
d->tx_req->length = 0;
+ d->tx_req->no_interrupt = 1;
sps_params = (MSM_SPS_MODE | d->dst_pipe_idx |
MSM_VENDOR_ID) & ~MSM_IS_FINITE_TRANSFER;
d->tx_req->udc_priv = sps_params;
@@ -916,7 +924,7 @@
msm_hw_bam_disable(1);
/* Reset BAM */
- ret = usb_bam_a2_reset();
+ ret = usb_bam_a2_reset(0);
if (ret) {
pr_err("%s: BAM reset failed %d\n", __func__, ret);
goto reenable_eps;
diff --git a/drivers/usb/gadget/u_bam_data.c b/drivers/usb/gadget/u_bam_data.c
index c638164..3322da5 100644
--- a/drivers/usb/gadget/u_bam_data.c
+++ b/drivers/usb/gadget/u_bam_data.c
@@ -145,69 +145,24 @@
struct bam_data_port *port = (struct bam_data_port *)param;
struct bam_data_ch_info *d;
int ret;
- bool reenable_eps = false;
d = &port->data_ch;
pr_debug("%s: reset by peer\n", __func__);
- /* Disable the relevant EPs if currently EPs are enabled */
- if (port->port_usb && port->port_usb->in &&
- port->port_usb->in->driver_data) {
- usb_ep_disable(port->port_usb->out);
- usb_ep_disable(port->port_usb->in);
-
- port->port_usb->in->driver_data = NULL;
- port->port_usb->out->driver_data = NULL;
- reenable_eps = true;
- }
-
/* Disable BAM */
msm_hw_bam_disable(1);
/* Reset BAM */
- ret = usb_bam_a2_reset();
+ ret = usb_bam_a2_reset(0);
if (ret) {
pr_err("%s: BAM reset failed %d\n", __func__, ret);
- goto reenable_eps;
+ return ret;
}
/* Enable BAM */
msm_hw_bam_disable(0);
-reenable_eps:
- /* Re-Enable the relevant EPs, if EPs were originally enabled */
- if (reenable_eps) {
- if (config_ep_by_speed(port->port_usb->cdev->gadget,
- port->port_usb->func, port->port_usb->in) ||
- config_ep_by_speed(port->port_usb->cdev->gadget,
- port->port_usb->func, port->port_usb->out)) {
- pr_err("%s: config_ep_by_speed failed", __func__);
- port->port_usb->in->desc = NULL;
- port->port_usb->out->desc = NULL;
- return -EINVAL;
- }
- ret = usb_ep_enable(port->port_usb->in);
- if (ret) {
- pr_err("%s: usb_ep_enable failed eptype:IN ep:%p",
- __func__, port->port_usb->in);
- return ret;
- }
- port->port_usb->in->driver_data = port;
-
- ret = usb_ep_enable(port->port_usb->out);
- if (ret) {
- pr_err("%s: usb_ep_enable failed eptype:OUT ep:%p",
- __func__, port->port_usb->out);
- port->port_usb->in->driver_data = 0;
- return ret;
- }
- port->port_usb->out->driver_data = port;
-
- bam_data_start_endless_rx(port);
- bam_data_start_endless_tx(port);
- }
-
/* Unregister the peer reset callback */
usb_bam_register_peer_reset_cb(NULL, NULL);
@@ -222,13 +177,14 @@
int ret;
if (d->trans == USB_GADGET_XPORT_BAM2BAM_IPA) {
- if (d->func_type == USB_FUNC_MBIM)
- teth_bridge_disconnect();
if (d->func_type == USB_FUNC_ECM)
ecm_ipa_disconnect(d->ipa_params.priv);
ret = usb_bam_disconnect_ipa(&d->ipa_params);
if (ret)
pr_err("usb_bam_disconnect_ipa failed: err:%d\n", ret);
+ if (d->func_type == USB_FUNC_MBIM)
+ teth_bridge_disconnect();
+
}
}
@@ -244,6 +200,7 @@
int ret;
pr_debug("%s: Connect workqueue started", __func__);
+ usb_bam_reset_complete();
if (d->trans == USB_GADGET_XPORT_BAM2BAM_IPA) {
if (d->func_type == USB_FUNC_MBIM) {
@@ -340,6 +297,7 @@
d->rx_req->context = port;
d->rx_req->complete = bam_data_endless_rx_complete;
d->rx_req->length = 0;
+ d->rx_req->no_interrupt = 1;
sps_params = (SPS_PARAMS_SPS_MODE | d->src_pipe_idx |
MSM_VENDOR_ID) & ~SPS_PARAMS_TBE;
d->rx_req->udc_priv = sps_params;
@@ -350,6 +308,7 @@
d->tx_req->context = port;
d->tx_req->complete = bam_data_endless_tx_complete;
d->tx_req->length = 0;
+ d->tx_req->no_interrupt = 1;
sps_params = (SPS_PARAMS_SPS_MODE | d->dst_pipe_idx |
MSM_VENDOR_ID) & ~SPS_PARAMS_TBE;
d->tx_req->udc_priv = sps_params;
@@ -504,6 +463,23 @@
return 0;
}
+int bam_data_destroy(unsigned int no_bam2bam_port)
+{
+ struct bam_data_ch_info *d;
+ struct bam_data_port *port;
+
+ port = bam2bam_data_ports[no_bam2bam_port];
+ d = &port->data_ch;
+
+ pr_debug("bam_data_destroy: Freeing ports\n");
+ bam2bam_data_port_free(no_bam2bam_port);
+ if (bam_data_wq)
+ destroy_workqueue(bam_data_wq);
+ bam_data_wq = NULL;
+
+ return 0;
+}
+
int bam_data_setup(unsigned int no_bam2bam_port)
{
int i;
@@ -516,6 +492,11 @@
return -EINVAL;
}
+ if (bam_data_wq) {
+ pr_debug("bam_data is already setup");
+ return 0;
+ }
+
bam_data_wq = alloc_workqueue("k_bam_data",
WQ_UNBOUND | WQ_MEM_RECLAIM, 1);
if (!bam_data_wq) {
diff --git a/drivers/usb/gadget/u_bam_data.h b/drivers/usb/gadget/u_bam_data.h
index 5ce678d..61f653a 100644
--- a/drivers/usb/gadget/u_bam_data.h
+++ b/drivers/usb/gadget/u_bam_data.h
@@ -36,6 +36,8 @@
int bam_data_setup(unsigned int no_bam2bam_port);
+int bam_data_destroy(unsigned int no_bam2bam_port);
+
void bam_data_suspend(u8 port_num);
void bam_data_resume(u8 port_num);
diff --git a/drivers/usb/gadget/u_ctrl_hsic.c b/drivers/usb/gadget/u_ctrl_hsic.c
index 0f93ad4..6143d1b 100644
--- a/drivers/usb/gadget/u_ctrl_hsic.c
+++ b/drivers/usb/gadget/u_ctrl_hsic.c
@@ -36,12 +36,6 @@
static unsigned int no_ctrl_ports;
-static const char *ctrl_bridge_names[] = {
- "dun_ctrl_hsic0",
- "rmnet_ctrl_hsic0"
-};
-
-#define CTRL_BRIDGE_NAME_MAX_LEN 20
#define READ_BUF_LEN 1024
#define CH_OPENED 0
@@ -83,6 +77,7 @@
static struct {
struct gctrl_port *port;
struct platform_driver pdrv;
+ char port_name[BRIDGE_NAME_MAX_LEN];
} gctrl_ports[NUM_PORTS];
static int ghsic_ctrl_receive(void *dev, void *buf, size_t actual)
@@ -336,19 +331,35 @@
gser->send_modem_ctrl_bits(gser, ctrl_bits);
}
+static int ghsic_ctrl_get_port_id(const char *pdev_name)
+{
+ struct gctrl_port *port;
+ int i;
+
+ for (i = 0; i < no_ctrl_ports; i++) {
+ port = gctrl_ports[i].port;
+ if (!strncmp(port->brdg.name, pdev_name, BRIDGE_NAME_MAX_LEN))
+ return i;
+ }
+
+ return -EINVAL;
+}
+
static int ghsic_ctrl_probe(struct platform_device *pdev)
{
struct gctrl_port *port;
unsigned long flags;
+ int id;
pr_debug("%s: name:%s\n", __func__, pdev->name);
- if (pdev->id >= no_ctrl_ports) {
- pr_err("%s: invalid port: %d\n", __func__, pdev->id);
+ id = ghsic_ctrl_get_port_id(pdev->name);
+ if (id < 0 || id >= no_ctrl_ports) {
+ pr_err("%s: invalid port: %d\n", __func__, id);
return -EINVAL;
}
- port = gctrl_ports[pdev->id].port;
+ port = gctrl_ports[id].port;
set_bit(CH_READY, &port->bridge_sts);
/* if usb is online, start read */
@@ -366,15 +377,17 @@
struct gserial *gser = NULL;
struct grmnet *gr = NULL;
unsigned long flags;
+ int id;
pr_debug("%s: name:%s\n", __func__, pdev->name);
- if (pdev->id >= no_ctrl_ports) {
- pr_err("%s: invalid port: %d\n", __func__, pdev->id);
+ id = ghsic_ctrl_get_port_id(pdev->name);
+ if (id < 0 || id >= no_ctrl_ports) {
+ pr_err("%s: invalid port: %d\n", __func__, id);
return -EINVAL;
}
- port = gctrl_ports[pdev->id].port;
+ port = gctrl_ports[id].port;
spin_lock_irqsave(&port->port_lock, flags);
if (!port->port_usb) {
@@ -421,15 +434,17 @@
{
struct gctrl_port *port;
struct platform_driver *pdrv;
+ char *name;
port = kzalloc(sizeof(struct gctrl_port), GFP_KERNEL);
if (!port)
return -ENOMEM;
- port->wq = create_singlethread_workqueue(ctrl_bridge_names[portno]);
+ name = gctrl_ports[portno].port_name;
+
+ port->wq = create_singlethread_workqueue(name);
if (!port->wq) {
- pr_err("%s: Unable to create workqueue:%s\n",
- __func__, ctrl_bridge_names[portno]);
+ pr_err("%s: Unable to create workqueue:%s\n", __func__, name);
return -ENOMEM;
}
@@ -441,7 +456,7 @@
INIT_WORK(&port->connect_w, ghsic_ctrl_connect_w);
INIT_WORK(&port->disconnect_w, gctrl_disconnect_w);
- port->brdg.ch_id = portno;
+ port->brdg.name = name;
port->brdg.ctx = port;
port->brdg.ops.send_pkt = ghsic_ctrl_receive;
if (port->gtype == USB_GADGET_SERIAL)
@@ -451,7 +466,7 @@
pdrv = &gctrl_ports[portno].pdrv;
pdrv->probe = ghsic_ctrl_probe;
pdrv->remove = ghsic_ctrl_remove;
- pdrv->driver.name = ctrl_bridge_names[portno];
+ pdrv->driver.name = name;
pdrv->driver.owner = THIS_MODULE;
platform_driver_register(pdrv);
@@ -461,6 +476,31 @@
return 0;
}
+/*portname will be used to find the bridge channel index*/
+void ghsic_ctrl_set_port_name(const char *name, const char *xport_type)
+{
+ static unsigned int port_num;
+
+ if (port_num >= NUM_PORTS) {
+ pr_err("%s: setting xport name for invalid port num %d\n",
+ __func__, port_num);
+ return;
+ }
+
+ /*if no xport name is passed set it to xport type e.g. hsic*/
+ if (!name)
+ strlcpy(gctrl_ports[port_num].port_name, xport_type,
+ BRIDGE_NAME_MAX_LEN);
+ else
+ strlcpy(gctrl_ports[port_num].port_name, name,
+ BRIDGE_NAME_MAX_LEN);
+
+ /*append _ctrl to get ctrl bridge name e.g. serial_hsic_ctrl*/
+ strlcat(gctrl_ports[port_num].port_name, "_ctrl", BRIDGE_NAME_MAX_LEN);
+
+ port_num++;
+}
+
int ghsic_ctrl_setup(unsigned int num_ports, enum gadget_type gtype)
{
int first_port_id = no_ctrl_ports;
diff --git a/drivers/usb/gadget/u_data_hsic.c b/drivers/usb/gadget/u_data_hsic.c
index 3932bbc..92653db 100644
--- a/drivers/usb/gadget/u_data_hsic.c
+++ b/drivers/usb/gadget/u_data_hsic.c
@@ -25,13 +25,6 @@
static unsigned int no_data_ports;
-static const char *data_bridge_names[] = {
- "dun_data_hsic0",
- "rmnet_data_hsic0"
-};
-
-#define DATA_BRIDGE_NAME_MAX_LEN 20
-
#define GHSIC_DATA_RMNET_RX_Q_SIZE 50
#define GHSIC_DATA_RMNET_TX_Q_SIZE 300
#define GHSIC_DATA_SERIAL_RX_Q_SIZE 10
@@ -130,6 +123,7 @@
static struct {
struct gdata_port *port;
struct platform_driver pdrv;
+ char port_name[BRIDGE_NAME_MAX_LEN];
} gdata_ports[NUM_PORTS];
static unsigned int get_timestamp(void);
@@ -150,22 +144,25 @@
static int ghsic_data_alloc_requests(struct usb_ep *ep, struct list_head *head,
int num,
void (*cb)(struct usb_ep *ep, struct usb_request *),
- gfp_t flags)
+ spinlock_t *lock)
{
int i;
struct usb_request *req;
+ unsigned long flags;
pr_debug("%s: ep:%s head:%p num:%d cb:%p", __func__,
ep->name, head, num, cb);
for (i = 0; i < num; i++) {
- req = usb_ep_alloc_request(ep, flags);
+ req = usb_ep_alloc_request(ep, GFP_KERNEL);
if (!req) {
pr_debug("%s: req allocated:%d\n", __func__, i);
return list_empty(head) ? -ENOMEM : 0;
}
req->complete = cb;
+ spin_lock_irqsave(lock, flags);
list_add(&req->list, head);
+ spin_unlock_irqrestore(lock, flags);
}
return 0;
@@ -438,20 +435,23 @@
req = list_first_entry(&port->rx_idle,
struct usb_request, list);
+ list_del(&req->list);
+ spin_unlock_irqrestore(&port->rx_lock, flags);
created = get_timestamp();
- skb = alloc_skb(ghsic_data_rx_req_size, GFP_ATOMIC);
- if (!skb)
+ skb = alloc_skb(ghsic_data_rx_req_size, GFP_KERNEL);
+ if (!skb) {
+ spin_lock_irqsave(&port->rx_lock, flags);
+ list_add(&req->list, &port->rx_idle);
break;
+ }
info = (struct timestamp_info *)skb->cb;
info->created = created;
- list_del(&req->list);
req->buf = skb->data;
req->length = ghsic_data_rx_req_size;
req->context = skb;
info->rx_queued = get_timestamp();
- spin_unlock_irqrestore(&port->rx_lock, flags);
ret = usb_ep_queue(ep, req, GFP_KERNEL);
spin_lock_irqsave(&port->rx_lock, flags);
if (ret) {
@@ -472,7 +472,7 @@
static void ghsic_data_start_io(struct gdata_port *port)
{
unsigned long flags;
- struct usb_ep *ep;
+ struct usb_ep *ep_out, *ep_in;
int ret;
pr_debug("%s: port:%p\n", __func__, port);
@@ -481,37 +481,37 @@
return;
spin_lock_irqsave(&port->rx_lock, flags);
- ep = port->out;
- if (!ep) {
- spin_unlock_irqrestore(&port->rx_lock, flags);
+ ep_out = port->out;
+ spin_unlock_irqrestore(&port->rx_lock, flags);
+ if (!ep_out)
return;
- }
- ret = ghsic_data_alloc_requests(ep, &port->rx_idle,
- port->rx_q_size, ghsic_data_epout_complete, GFP_ATOMIC);
+ ret = ghsic_data_alloc_requests(ep_out, &port->rx_idle,
+ port->rx_q_size, ghsic_data_epout_complete, &port->rx_lock);
if (ret) {
pr_err("%s: rx req allocation failed\n", __func__);
+ return;
+ }
+
+ spin_lock_irqsave(&port->tx_lock, flags);
+ ep_in = port->in;
+ spin_unlock_irqrestore(&port->tx_lock, flags);
+ if (!ep_in) {
+ spin_lock_irqsave(&port->rx_lock, flags);
+ ghsic_data_free_requests(ep_out, &port->rx_idle);
spin_unlock_irqrestore(&port->rx_lock, flags);
return;
}
- spin_unlock_irqrestore(&port->rx_lock, flags);
- spin_lock_irqsave(&port->tx_lock, flags);
- ep = port->in;
- if (!ep) {
- spin_unlock_irqrestore(&port->tx_lock, flags);
- return;
- }
-
- ret = ghsic_data_alloc_requests(ep, &port->tx_idle,
- port->tx_q_size, ghsic_data_epin_complete, GFP_ATOMIC);
+ ret = ghsic_data_alloc_requests(ep_in, &port->tx_idle,
+ port->tx_q_size, ghsic_data_epin_complete, &port->tx_lock);
if (ret) {
pr_err("%s: tx req allocation failed\n", __func__);
- ghsic_data_free_requests(ep, &port->rx_idle);
- spin_unlock_irqrestore(&port->tx_lock, flags);
+ spin_lock_irqsave(&port->rx_lock, flags);
+ ghsic_data_free_requests(ep_out, &port->rx_idle);
+ spin_unlock_irqrestore(&port->rx_lock, flags);
return;
}
- spin_unlock_irqrestore(&port->tx_lock, flags);
/* queue out requests */
ghsic_data_start_rx(port);
@@ -586,19 +586,35 @@
spin_unlock_irqrestore(&port->rx_lock, flags);
}
+static int ghsic_data_get_port_id(const char *pdev_name)
+{
+ struct gdata_port *port;
+ int i;
+
+ for (i = 0; i < no_data_ports; i++) {
+ port = gdata_ports[i].port;
+ if (!strncmp(port->brdg.name, pdev_name, BRIDGE_NAME_MAX_LEN))
+ return i;
+ }
+
+ return -EINVAL;
+}
+
static int ghsic_data_probe(struct platform_device *pdev)
{
struct gdata_port *port;
+ int id;
- pr_debug("%s: name:%s no_data_ports= %d\n",
- __func__, pdev->name, no_data_ports);
+ pr_debug("%s: name:%s no_data_ports= %d\n", __func__, pdev->name,
+ no_data_ports);
- if (pdev->id >= no_data_ports) {
- pr_err("%s: invalid port: %d\n", __func__, pdev->id);
+ id = ghsic_data_get_port_id(pdev->name);
+ if (id < 0 || id >= no_data_ports) {
+ pr_err("%s: invalid port: %d\n", __func__, id);
return -EINVAL;
}
- port = gdata_ports[pdev->id].port;
+ port = gdata_ports[id].port;
set_bit(CH_READY, &port->bridge_sts);
/* if usb is online, try opening bridge */
@@ -614,15 +630,17 @@
struct gdata_port *port;
struct usb_ep *ep_in;
struct usb_ep *ep_out;
+ int id;
pr_debug("%s: name:%s\n", __func__, pdev->name);
- if (pdev->id >= no_data_ports) {
- pr_err("%s: invalid port: %d\n", __func__, pdev->id);
+ id = ghsic_data_get_port_id(pdev->name);
+ if (id < 0 || id >= no_data_ports) {
+ pr_err("%s: invalid port: %d\n", __func__, id);
return -EINVAL;
}
- port = gdata_ports[pdev->id].port;
+ port = gdata_ports[id].port;
ep_in = port->in;
if (ep_in)
@@ -632,6 +650,9 @@
if (ep_out)
usb_ep_fifo_flush(ep_out);
+ /* cancel pending writes to MDM */
+ cancel_work_sync(&port->write_tomdm_w);
+
ghsic_data_free_buffers(port);
cancel_work_sync(&port->connect_w);
@@ -658,15 +679,17 @@
{
struct gdata_port *port;
struct platform_driver *pdrv;
+ char *name;
port = kzalloc(sizeof(struct gdata_port), GFP_KERNEL);
if (!port)
return -ENOMEM;
- port->wq = create_singlethread_workqueue(data_bridge_names[port_num]);
+ name = gdata_ports[port_num].port_name;
+
+ port->wq = create_singlethread_workqueue(name);
if (!port->wq) {
- pr_err("%s: Unable to create workqueue:%s\n",
- __func__, data_bridge_names[port_num]);
+ pr_err("%s: Unable to create workqueue:%s\n", __func__, name);
kfree(port);
return -ENOMEM;
}
@@ -688,7 +711,7 @@
skb_queue_head_init(&port->rx_skb_q);
port->gtype = gtype;
- port->brdg.ch_id = port_num;
+ port->brdg.name = name;
port->brdg.ctx = port;
port->brdg.ops.send_pkt = ghsic_data_receive;
port->brdg.ops.unthrottle_tx = ghsic_data_unthrottle_tx;
@@ -697,7 +720,7 @@
pdrv = &gdata_ports[port_num].pdrv;
pdrv->probe = ghsic_data_probe;
pdrv->remove = ghsic_data_remove;
- pdrv->driver.name = data_bridge_names[port_num];
+ pdrv->driver.name = name;
pdrv->driver.owner = THIS_MODULE;
platform_driver_register(pdrv);
@@ -846,7 +869,7 @@
}
#if defined(CONFIG_DEBUG_FS)
-#define DEBUG_BUF_SIZE 1024
+#define DEBUG_DATA_BUF_SIZE 4096
static unsigned int record_timestamp;
module_param(record_timestamp, uint, S_IRUGO | S_IWUSR);
@@ -917,7 +940,7 @@
if (!record_timestamp)
return 0;
- buf = kzalloc(sizeof(char) * 4 * DEBUG_BUF_SIZE, GFP_KERNEL);
+ buf = kzalloc(sizeof(char) * DEBUG_DATA_BUF_SIZE, GFP_KERNEL);
if (!buf)
return -ENOMEM;
@@ -927,7 +950,7 @@
for (dbg_inc(&i); i != dbg_data.idx; dbg_inc(&i)) {
if (!strnlen(dbg_data.buf[i], DBG_DATA_MSG))
continue;
- j += scnprintf(buf + j, (4 * DEBUG_BUF_SIZE) - j,
+ j += scnprintf(buf + j, DEBUG_DATA_BUF_SIZE - j,
"%s\n", dbg_data.buf[i]);
}
@@ -955,7 +978,7 @@
int i;
int temp = 0;
- buf = kzalloc(sizeof(char) * DEBUG_BUF_SIZE, GFP_KERNEL);
+ buf = kzalloc(sizeof(char) * DEBUG_DATA_BUF_SIZE, GFP_KERNEL);
if (!buf)
return -ENOMEM;
@@ -966,7 +989,7 @@
pdrv = &gdata_ports[i].pdrv;
spin_lock_irqsave(&port->rx_lock, flags);
- temp += scnprintf(buf + temp, DEBUG_BUF_SIZE - temp,
+ temp += scnprintf(buf + temp, DEBUG_DATA_BUF_SIZE - temp,
"\nName: %s\n"
"#PORT:%d port#: %p\n"
"data_ch_open: %d\n"
@@ -991,7 +1014,7 @@
spin_unlock_irqrestore(&port->rx_lock, flags);
spin_lock_irqsave(&port->tx_lock, flags);
- temp += scnprintf(buf + temp, DEBUG_BUF_SIZE - temp,
+ temp += scnprintf(buf + temp, DEBUG_DATA_BUF_SIZE - temp,
"\n******DL INFO******\n\n"
"dpkts_to_usbhost: %lu\n"
"tx_buf_len: %u\n"
@@ -1094,6 +1117,31 @@
#endif
+/*portname will be used to find the bridge channel index*/
+void ghsic_data_set_port_name(const char *name, const char *xport_type)
+{
+ static unsigned int port_num;
+
+ if (port_num >= NUM_PORTS) {
+ pr_err("%s: setting xport name for invalid port num %d\n",
+ __func__, port_num);
+ return;
+ }
+
+ /*if no xport name is passed set it to xport type e.g. hsic*/
+ if (!name)
+ strlcpy(gdata_ports[port_num].port_name, xport_type,
+ BRIDGE_NAME_MAX_LEN);
+ else
+ strlcpy(gdata_ports[port_num].port_name, name,
+ BRIDGE_NAME_MAX_LEN);
+
+ /*append _data to get data bridge name: e.g. serial_hsic_data*/
+ strlcat(gdata_ports[port_num].port_name, "_data", BRIDGE_NAME_MAX_LEN);
+
+ port_num++;
+}
+
int ghsic_data_setup(unsigned num_ports, enum gadget_type gtype)
{
int first_port_id = no_data_ports;
diff --git a/drivers/usb/host/ehci-msm-hsic.c b/drivers/usb/host/ehci-msm-hsic.c
index c5304e1..14c3323 100644
--- a/drivers/usb/host/ehci-msm-hsic.c
+++ b/drivers/usb/host/ehci-msm-hsic.c
@@ -1878,6 +1878,10 @@
&pdata->strobe_pad_offset);
of_property_read_u32(node, "hsic,data-pad-offset",
&pdata->data_pad_offset);
+ of_property_read_u32(node, "hsic,log2-itc",
+ &pdata->log2_irq_thresh);
+ if (pdata->log2_irq_thresh > 6)
+ pdata->log2_irq_thresh = 0;
pdata->bus_scale_table = msm_bus_cl_get_pdata(pdev);
@@ -2130,7 +2134,8 @@
if (mehci->enable_hbm)
hbm_init(hcd, pdata->disable_park_mode);
- msm_bam_set_hsic_host_dev(&pdev->dev);
+ if (pdata && pdata->consider_ipa_handshake)
+ msm_bam_set_hsic_host_dev(&pdev->dev);
return 0;
@@ -2155,7 +2160,8 @@
struct msm_hsic_hcd *mehci = hcd_to_hsic(hcd);
struct msm_hsic_host_platform_data *pdata = mehci->dev->platform_data;
- msm_bam_set_hsic_host_dev(NULL);
+ if (pdata && pdata->consider_ipa_handshake)
+ msm_bam_set_hsic_host_dev(NULL);
/* If the device was removed no need to call pm_runtime_disable */
if (pdev->dev.power.power_state.event != PM_EVENT_INVALID)
diff --git a/drivers/usb/host/ehci-msm.c b/drivers/usb/host/ehci-msm.c
index c2e8943..0b89dd0 100644
--- a/drivers/usb/host/ehci-msm.c
+++ b/drivers/usb/host/ehci-msm.c
@@ -28,6 +28,7 @@
#include <linux/pm_runtime.h>
#include <linux/usb/otg.h>
+#include <linux/usb/msm_hsusb.h>
#include <linux/usb/msm_hsusb_hw.h>
#define MSM_USB_BASE (hcd->regs)
@@ -51,7 +52,13 @@
/* Use the AHB transactor */
writel_relaxed(0x08, USB_AHBMODE);
/* Disable streaming mode and select host mode */
- writel(0x13, USB_USBMODE);
+ writel_relaxed(0x13, USB_USBMODE);
+
+ if (ehci->transceiver->flags & ENABLE_SECONDARY_PHY) {
+ ehci_dbg(ehci, "using secondary hsphy\n");
+ writel_relaxed(readl_relaxed(USB_PHY_CTRL2) | (1<<16),
+ USB_PHY_CTRL2);
+ }
ehci_port_power(ehci, 1);
return 0;
diff --git a/drivers/usb/host/ehci-msm2.c b/drivers/usb/host/ehci-msm2.c
index 6727996..60788f5 100644
--- a/drivers/usb/host/ehci-msm2.c
+++ b/drivers/usb/host/ehci-msm2.c
@@ -36,6 +36,7 @@
#include <mach/clk.h>
#include <mach/msm_xo.h>
#include <mach/msm_iomap.h>
+#include <linux/debugfs.h>
#define MSM_USB_BASE (hcd->regs)
@@ -896,6 +897,135 @@
return 0;
}
+#if defined(CONFIG_DEBUG_FS)
+static u32 addr;
+#define BUF_SIZE 32
+static ssize_t debug_read_phy_data(struct file *file, char __user *ubuf,
+ size_t count, loff_t *ppos)
+{
+ struct msm_hcd *mhcd = file->private_data;
+ char *kbuf;
+ size_t c = 0;
+ u32 data = 0;
+ int ret = 0;
+
+ kbuf = kzalloc(sizeof(char) * BUF_SIZE, GFP_KERNEL);
+ pm_runtime_get(mhcd->dev);
+ data = msm_ulpi_read(mhcd, addr);
+ pm_runtime_put(mhcd->dev);
+ if (data < 0) {
+ dev_err(mhcd->dev,
+ "%s(): ulpi read timeout\n", __func__);
+ return -ETIMEDOUT;
+ }
+
+ c = scnprintf(kbuf, BUF_SIZE, "addr: 0x%x: data: 0x%x\n", addr, data);
+
+ ret = simple_read_from_buffer(ubuf, count, ppos, kbuf, c);
+
+ kfree(kbuf);
+
+ return ret;
+}
+
+static ssize_t debug_write_phy_data(struct file *file, const char __user *buf,
+ size_t count, loff_t *ppos)
+{
+ struct msm_hcd *mhcd = file->private_data;
+ char kbuf[10];
+ u32 data = 0;
+
+ memset(kbuf, 0, 10);
+
+ if (copy_from_user(kbuf, buf, count > 10 ? 10 : count))
+ return -EFAULT;
+
+ if (sscanf(kbuf, "%x", &data) != 1)
+ return -EINVAL;
+
+ pm_runtime_get(mhcd->dev);
+ if (msm_ulpi_write(mhcd, data, addr) < 0) {
+ dev_err(mhcd->dev,
+ "%s(): ulpi write timeout\n", __func__);
+ return -ETIMEDOUT;
+ }
+ pm_runtime_put(mhcd->dev);
+
+ return count;
+}
+
+static ssize_t debug_phy_write_addr(struct file *file, const char __user *buf,
+ size_t count, loff_t *ppos)
+{
+ char kbuf[10];
+ u32 temp;
+
+ memset(kbuf, 0, 10);
+
+ if (copy_from_user(kbuf, buf, count > 10 ? 10 : count))
+ return -EFAULT;
+
+ if (sscanf(kbuf, "%x", &temp) != 1)
+ return -EINVAL;
+
+ if (temp > 0x3F)
+ return -EINVAL;
+
+ addr = temp;
+
+ return count;
+}
+
+static int debug_open(struct inode *inode, struct file *file)
+{
+ file->private_data = inode->i_private;
+ return 0;
+}
+
+const struct file_operations debug_rw_phy_ops = {
+ .open = debug_open,
+ .read = debug_read_phy_data,
+ .write = debug_write_phy_data,
+};
+
+const struct file_operations debug_write_phy_ops = {
+ .open = debug_open,
+ .write = debug_phy_write_addr,
+};
+
+static struct dentry *dent_ehci;
+
+static int ehci_debugfs_init(struct msm_hcd *mhcd)
+{
+ struct dentry *debug_phy_data;
+ struct dentry *debug_phy_addr;
+
+ dent_ehci = debugfs_create_dir(dev_name(mhcd->dev), 0);
+ if (IS_ERR(dent_ehci))
+ return -ENOENT;
+
+ debug_phy_data = debugfs_create_file("phy_reg_data", 0666,
+ dent_ehci, mhcd, &debug_rw_phy_ops);
+ if (!debug_phy_data) {
+ debugfs_remove(dent_ehci);
+ return -ENOENT;
+ }
+
+ debug_phy_addr = debugfs_create_file("phy_reg_addr", 0666,
+ dent_ehci, mhcd, &debug_write_phy_ops);
+ if (!debug_phy_addr) {
+ debugfs_remove_recursive(dent_ehci);
+ return -ENOENT;
+ }
+ return 0;
+}
+#else
+static int ehci_debugfs_init(struct msm_hcd *mhcd)
+{
+ return 0;
+}
+#endif
+
static struct hc_driver msm_hc2_driver = {
.description = hcd_name,
.product_desc = "Qualcomm EHCI Host Controller",
@@ -1205,6 +1335,9 @@
pm_runtime_set_active(&pdev->dev);
pm_runtime_enable(&pdev->dev);
+ if (ehci_debugfs_init(mhcd) < 0)
+ dev_err(mhcd->dev, "%s: debugfs init failed\n", __func__);
+
return 0;
vbus_deinit:
@@ -1275,6 +1408,9 @@
iounmap(hcd->regs);
usb_put_hcd(hcd);
+#if defined(CONFIG_DEBUG_FS)
+ debugfs_remove_recursive(dent_ehci);
+#endif
return 0;
}
diff --git a/drivers/usb/misc/diag_bridge.c b/drivers/usb/misc/diag_bridge.c
index 1ee1c8e..22e2a25 100644
--- a/drivers/usb/misc/diag_bridge.c
+++ b/drivers/usb/misc/diag_bridge.c
@@ -45,6 +45,7 @@
struct diag_bridge_ops *ops;
struct platform_device *pdev;
unsigned default_autosusp_delay;
+ int id;
/* debugging counters */
unsigned long bytes_to_host;
@@ -92,7 +93,7 @@
static void diag_bridge_delete(struct kref *kref)
{
struct diag_bridge *dev = container_of(kref, struct diag_bridge, kref);
- int id = dev->pdev->id;
+ int id = dev->id;
usb_put_dev(dev->udev);
__dev[id] = 0;
@@ -470,6 +471,7 @@
return -ENOMEM;
}
__dev[devid] = dev;
+ dev->id = devid;
dev->udev = usb_get_dev(interface_to_usbdev(ifc));
dev->ifc = ifc;
diff --git a/drivers/usb/misc/mdm_ctrl_bridge.c b/drivers/usb/misc/mdm_ctrl_bridge.c
index 2a61501..75fce2f 100644
--- a/drivers/usb/misc/mdm_ctrl_bridge.c
+++ b/drivers/usb/misc/mdm_ctrl_bridge.c
@@ -1,4 +1,4 @@
-/* Copyright (c) 2011-2012, The Linux Foundation. All rights reserved.
+/* Copyright (c) 2011-2013, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -26,11 +26,6 @@
#include <asm/unaligned.h>
#include <mach/usb_bridge.h>
-static const char *ctrl_bridge_names[] = {
- "dun_ctrl_hsic0",
- "rmnet_ctrl_hsic0"
-};
-
/* polling interval for Interrupt ep */
#define HS_INTERVAL 7
#define FS_LS_INTERVAL 3
@@ -40,10 +35,18 @@
#define SUSPENDED BIT(0)
+enum ctrl_bridge_rx_state {
+ RX_IDLE, /* inturb is not queued */
+ RX_WAIT, /* inturb is queued and waiting for data */
+ RX_BUSY, /* inturb is completed. processing RX */
+};
+
struct ctrl_bridge {
struct usb_device *udev;
struct usb_interface *intf;
+ char *name;
+
unsigned int int_pipe;
struct urb *inturb;
void *intbuf;
@@ -66,6 +69,9 @@
/* output control lines (DTR, RTS) */
unsigned int cbits_tomdm;
+ spinlock_t lock;
+ enum ctrl_bridge_rx_state rx_state;
+
/* counters */
unsigned int snd_encap_cmd;
unsigned int get_encap_res;
@@ -76,8 +82,19 @@
static struct ctrl_bridge *__dev[MAX_BRIDGE_DEVICES];
-/* counter used for indexing ctrl bridge devices */
-static int ch_id;
+static int get_ctrl_bridge_chid(char *xport_name)
+{
+ struct ctrl_bridge *dev;
+ int i;
+
+ for (i = 0; i < MAX_BRIDGE_DEVICES; i++) {
+ dev = __dev[i];
+ if (!strncmp(dev->name, xport_name, BRIDGE_NAME_MAX_LEN))
+ return i;
+ }
+
+ return -ENODEV;
+}
unsigned int ctrl_bridge_get_cbits_tohost(unsigned int id)
{
@@ -125,12 +142,43 @@
}
EXPORT_SYMBOL(ctrl_bridge_set_cbits);
+static int ctrl_bridge_start_read(struct ctrl_bridge *dev, gfp_t gfp_flags)
+{
+ int retval = 0;
+ unsigned long flags;
+
+ if (!dev->inturb) {
+ dev_err(&dev->intf->dev, "%s: inturb is NULL\n", __func__);
+ return -ENODEV;
+ }
+
+ retval = usb_submit_urb(dev->inturb, gfp_flags);
+ if (retval < 0 && retval != -EPERM) {
+ dev_err(&dev->intf->dev,
+ "%s error submitting int urb %d\n",
+ __func__, retval);
+ }
+
+ spin_lock_irqsave(&dev->lock, flags);
+ if (retval)
+ dev->rx_state = RX_IDLE;
+ else
+ dev->rx_state = RX_WAIT;
+ spin_unlock_irqrestore(&dev->lock, flags);
+
+ return retval;
+}
+
static void resp_avail_cb(struct urb *urb)
{
struct ctrl_bridge *dev = urb->context;
- int status = 0;
int resubmit_urb = 1;
struct bridge *brdg = dev->brdg;
+ unsigned long flags;
+
+ /*usb device disconnect*/
+ if (urb->dev->state == USB_STATE_NOTATTACHED)
+ return;
switch (urb->status) {
case 0:
@@ -158,15 +206,14 @@
if (resubmit_urb) {
/*re- submit int urb to check response available*/
- usb_anchor_urb(dev->inturb, &dev->tx_submitted);
- status = usb_submit_urb(dev->inturb, GFP_ATOMIC);
- if (status) {
- dev_err(&dev->intf->dev,
- "%s: Error re-submitting Int URB %d\n",
- __func__, status);
- usb_unanchor_urb(dev->inturb);
- }
+ ctrl_bridge_start_read(dev, GFP_ATOMIC);
+ } else {
+ spin_lock_irqsave(&dev->lock, flags);
+ dev->rx_state = RX_IDLE;
+ spin_unlock_irqrestore(&dev->lock, flags);
}
+
+ usb_autopm_put_interface_async(dev->intf);
}
static void notification_available_cb(struct urb *urb)
@@ -177,6 +224,15 @@
struct bridge *brdg = dev->brdg;
unsigned int ctrl_bits;
unsigned char *data;
+ unsigned long flags;
+
+ /*usb device disconnect*/
+ if (urb->dev->state == USB_STATE_NOTATTACHED)
+ return;
+
+ spin_lock_irqsave(&dev->lock, flags);
+ dev->rx_state = RX_IDLE;
+ spin_unlock_irqrestore(&dev->lock, flags);
switch (urb->status) {
case 0:
@@ -204,7 +260,11 @@
switch (ctrl->bNotificationType) {
case USB_CDC_NOTIFY_RESPONSE_AVAILABLE:
+ spin_lock_irqsave(&dev->lock, flags);
+ dev->rx_state = RX_BUSY;
+ spin_unlock_irqrestore(&dev->lock, flags);
dev->resp_avail++;
+ usb_autopm_get_interface_no_resume(dev->intf);
usb_fill_control_urb(dev->readurb, dev->udev,
usb_rcvctrlpipe(dev->udev, 0),
(unsigned char *)dev->in_ctlreq,
@@ -212,13 +272,12 @@
DEFAULT_READ_URB_LENGTH,
resp_avail_cb, dev);
- usb_anchor_urb(dev->readurb, &dev->tx_submitted);
status = usb_submit_urb(dev->readurb, GFP_ATOMIC);
if (status) {
dev_err(&dev->intf->dev,
"%s: Error submitting Read URB %d\n",
__func__, status);
- usb_unanchor_urb(dev->readurb);
+ usb_autopm_put_interface_async(dev->intf);
goto resubmit_int_urb;
}
return;
@@ -242,56 +301,28 @@
}
resubmit_int_urb:
- usb_anchor_urb(urb, &dev->tx_submitted);
- status = usb_submit_urb(urb, GFP_ATOMIC);
- if (status) {
- dev_err(&dev->intf->dev, "%s: Error re-submitting Int URB %d\n",
- __func__, status);
- usb_unanchor_urb(urb);
- }
-}
-
-static int ctrl_bridge_start_read(struct ctrl_bridge *dev)
-{
- int retval = 0;
-
- if (!dev->inturb) {
- dev_err(&dev->intf->dev, "%s: inturb is NULL\n", __func__);
- return -ENODEV;
- }
-
- if (!dev->inturb->anchor) {
- usb_anchor_urb(dev->inturb, &dev->tx_submitted);
- retval = usb_submit_urb(dev->inturb, GFP_KERNEL);
- if (retval < 0) {
- dev_err(&dev->intf->dev,
- "%s error submitting int urb %d\n",
- __func__, retval);
- usb_unanchor_urb(dev->inturb);
- }
- }
-
- return retval;
+ ctrl_bridge_start_read(dev, GFP_ATOMIC);
}
int ctrl_bridge_open(struct bridge *brdg)
{
struct ctrl_bridge *dev;
+ int ch_id;
if (!brdg) {
err("bridge is null\n");
return -EINVAL;
}
- if (brdg->ch_id >= MAX_BRIDGE_DEVICES)
- return -EINVAL;
-
- dev = __dev[brdg->ch_id];
- if (!dev) {
- err("dev is null\n");
- return -ENODEV;
+ ch_id = get_ctrl_bridge_chid(brdg->name);
+ if (ch_id < 0 || ch_id >= MAX_BRIDGE_DEVICES) {
+ err("%s: %s dev not found\n", __func__, brdg->name);
+ return ch_id;
}
+ brdg->ch_id = ch_id;
+
+ dev = __dev[ch_id];
dev->brdg = brdg;
dev->snd_encap_cmd = 0;
dev->get_encap_res = 0;
@@ -337,7 +368,13 @@
kfree(urb->transfer_buffer);
kfree(urb->setup_packet);
usb_free_urb(urb);
- usb_autopm_put_interface_async(dev->intf);
+
+ /* if we are here after device disconnect
+ * usb_unbind_interface() takes care of
+ * residual pm_autopm_get_interface_* calls
+ */
+ if (urb->dev->state != USB_STATE_NOTATTACHED)
+ usb_autopm_put_interface_async(dev->intf);
}
int ctrl_bridge_write(unsigned int id, char *data, size_t size)
@@ -346,6 +383,7 @@
struct urb *writeurb;
struct usb_ctrlrequest *out_ctlreq;
struct ctrl_bridge *dev;
+ unsigned long flags;
if (id >= MAX_BRIDGE_DEVICES) {
result = -EINVAL;
@@ -414,12 +452,15 @@
goto free_ctrlreq;
}
+ spin_lock_irqsave(&dev->lock, flags);
if (test_bit(SUSPENDED, &dev->flags)) {
usb_anchor_urb(writeurb, &dev->tx_deferred);
+ spin_unlock_irqrestore(&dev->lock, flags);
goto deferred;
}
usb_anchor_urb(writeurb, &dev->tx_submitted);
+ spin_unlock_irqrestore(&dev->lock, flags);
result = usb_submit_urb(writeurb, GFP_ATOMIC);
if (result < 0) {
dev_err(&dev->intf->dev, "%s: submit URB error %d\n",
@@ -446,6 +487,7 @@
int ctrl_bridge_suspend(unsigned int id)
{
struct ctrl_bridge *dev;
+ unsigned long flags;
if (id >= MAX_BRIDGE_DEVICES)
return -EINVAL;
@@ -454,8 +496,27 @@
if (!dev)
return -ENODEV;
+ spin_lock_irqsave(&dev->lock, flags);
+ if (!usb_anchor_empty(&dev->tx_submitted) || dev->rx_state == RX_BUSY) {
+ spin_unlock_irqrestore(&dev->lock, flags);
+ return -EBUSY;
+ }
+ spin_unlock_irqrestore(&dev->lock, flags);
+
+ usb_kill_urb(dev->inturb);
+
+ spin_lock_irqsave(&dev->lock, flags);
+ if (dev->rx_state != RX_IDLE) {
+ spin_unlock_irqrestore(&dev->lock, flags);
+ return -EBUSY;
+ }
+ if (!usb_anchor_empty(&dev->tx_submitted)) {
+ spin_unlock_irqrestore(&dev->lock, flags);
+ ctrl_bridge_start_read(dev, GFP_KERNEL);
+ return -EBUSY;
+ }
set_bit(SUSPENDED, &dev->flags);
- usb_kill_anchored_urbs(&dev->tx_submitted);
+ spin_unlock_irqrestore(&dev->lock, flags);
return 0;
}
@@ -464,6 +525,8 @@
{
struct ctrl_bridge *dev;
struct urb *urb;
+ unsigned long flags;
+ int ret;
if (id >= MAX_BRIDGE_DEVICES)
return -EINVAL;
@@ -472,12 +535,19 @@
if (!dev)
return -ENODEV;
- if (!test_and_clear_bit(SUSPENDED, &dev->flags))
+ if (!test_bit(SUSPENDED, &dev->flags))
return 0;
+ spin_lock_irqsave(&dev->lock, flags);
/* submit pending write requests */
while ((urb = usb_get_from_anchor(&dev->tx_deferred))) {
- int ret;
+ spin_unlock_irqrestore(&dev->lock, flags);
+ /*
+ * usb_get_from_anchor() does not drop the
+ * ref count incremented by the usb_anchro_urb()
+ * called in Tx submission path. Let us do it.
+ */
+ usb_put_urb(urb);
usb_anchor_urb(urb, &dev->tx_submitted);
ret = usb_submit_urb(urb, GFP_ATOMIC);
if (ret < 0) {
@@ -487,9 +557,12 @@
usb_free_urb(urb);
usb_autopm_put_interface_async(dev->intf);
}
+ spin_lock_irqsave(&dev->lock, flags);
}
+ clear_bit(SUSPENDED, &dev->flags);
+ spin_unlock_irqrestore(&dev->lock, flags);
- return ctrl_bridge_start_read(dev);
+ return ctrl_bridge_start_read(dev, GFP_KERNEL);
}
#if defined(CONFIG_DEBUG_FS)
@@ -507,7 +580,7 @@
if (!buf)
return -ENOMEM;
- for (i = 0; i < ch_id; i++) {
+ for (i = 0; i < MAX_BRIDGE_DEVICES; i++) {
dev = __dev[i];
if (!dev)
continue;
@@ -522,7 +595,7 @@
"cbits_tomdm: %d\n"
"cbits_tohost: %d\n"
"suspended: %d\n",
- dev->pdev->name, dev,
+ dev->name, dev,
dev->snd_encap_cmd,
dev->get_encap_res,
dev->resp_avail,
@@ -546,7 +619,7 @@
struct ctrl_bridge *dev;
int i;
- for (i = 0; i < ch_id; i++) {
+ for (i = 0; i < MAX_BRIDGE_DEVICES; i++) {
dev = __dev[i];
if (!dev)
continue;
@@ -593,7 +666,7 @@
int
ctrl_bridge_probe(struct usb_interface *ifc, struct usb_host_endpoint *int_in,
- int id)
+ char *name, int id)
{
struct ctrl_bridge *dev;
struct usb_device *udev;
@@ -604,28 +677,28 @@
udev = interface_to_usbdev(ifc);
- dev = kzalloc(sizeof(*dev), GFP_KERNEL);
+ dev = __dev[id];
if (!dev) {
- dev_err(&ifc->dev, "%s: unable to allocate dev\n",
- __func__);
- return -ENOMEM;
- }
- dev->pdev = platform_device_alloc(ctrl_bridge_names[id], id);
- if (!dev->pdev) {
- dev_err(&ifc->dev, "%s: unable to allocate platform device\n",
- __func__);
- retval = -ENOMEM;
- goto nomem;
+ pr_err("%s:device not found\n", __func__);
+ return -ENODEV;
}
+ dev->name = name;
+
+ dev->pdev = platform_device_alloc(name, -1);
+ if (!dev->pdev) {
+ retval = -ENOMEM;
+ dev_err(&ifc->dev, "%s: unable to allocate platform device\n",
+ __func__);
+ goto free_name;
+ }
+
+ dev->flags = 0;
dev->udev = udev;
dev->int_pipe = usb_rcvintpipe(udev,
int_in->desc.bEndpointAddress & USB_ENDPOINT_NUMBER_MASK);
dev->intf = ifc;
- init_usb_anchor(&dev->tx_submitted);
- init_usb_anchor(&dev->tx_deferred);
-
/*use max pkt size from ep desc*/
ep = &dev->intf->cur_altsetting->endpoint[0].desc;
@@ -633,7 +706,7 @@
if (!dev->inturb) {
dev_err(&ifc->dev, "%s: error allocating int urb\n", __func__);
retval = -ENOMEM;
- goto pdev_del;
+ goto pdev_put;
}
wMaxPacketSize = le16_to_cpu(ep->wMaxPacketSize);
@@ -685,14 +758,24 @@
dev->intf->cur_altsetting->desc.bInterfaceNumber;
dev->in_ctlreq->wLength = cpu_to_le16(DEFAULT_READ_URB_LENGTH);
- __dev[id] = dev;
+ retval = platform_device_add(dev->pdev);
+ if (retval) {
+ dev_err(&ifc->dev, "%s:fail to add pdev\n", __func__);
+ goto free_ctrlreq;
+ }
- platform_device_add(dev->pdev);
+ retval = ctrl_bridge_start_read(dev, GFP_KERNEL);
+ if (retval) {
+ dev_err(&ifc->dev, "%s:fail to start reading\n", __func__);
+ goto pdev_del;
+ }
- ch_id++;
+ return 0;
- return ctrl_bridge_start_read(dev);
-
+pdev_del:
+ platform_device_del(dev->pdev);
+free_ctrlreq:
+ kfree(dev->in_ctlreq);
free_rbuf:
kfree(dev->readbuf);
free_rurb:
@@ -701,10 +784,10 @@
kfree(dev->intbuf);
free_inturb:
usb_free_urb(dev->inturb);
-pdev_del:
- platform_device_unregister(dev->pdev);
-nomem:
- kfree(dev);
+pdev_put:
+ platform_device_put(dev->pdev);
+free_name:
+ dev->name = "none";
return retval;
}
@@ -715,9 +798,18 @@
dev_dbg(&dev->intf->dev, "%s:\n", __func__);
+ /*set device name to none to get correct channel id
+ * at the time of bridge open
+ */
+ dev->name = "none";
+
platform_device_unregister(dev->pdev);
- usb_unlink_anchored_urbs(&dev->tx_submitted);
+ usb_scuttle_anchored_urbs(&dev->tx_deferred);
+ usb_kill_anchored_urbs(&dev->tx_submitted);
+
+ usb_kill_urb(dev->inturb);
+ usb_kill_urb(dev->readurb);
kfree(dev->in_ctlreq);
kfree(dev->readbuf);
@@ -725,26 +817,54 @@
usb_free_urb(dev->readurb);
usb_free_urb(dev->inturb);
-
- __dev[id] = NULL;
- ch_id--;
-
- kfree(dev);
}
-static int __init ctrl_bridge_init(void)
+int ctrl_bridge_init(void)
{
+ struct ctrl_bridge *dev;
+ int i;
+ int retval = 0;
+
+ for (i = 0; i < MAX_BRIDGE_DEVICES; i++) {
+
+ dev = kzalloc(sizeof(*dev), GFP_KERNEL);
+ if (!dev) {
+ pr_err("%s: unable to allocate dev\n", __func__);
+ retval = -ENOMEM;
+ goto error;
+ }
+
+ /*transport name will be set during probe*/
+ dev->name = "none";
+
+ spin_lock_init(&dev->lock);
+ init_usb_anchor(&dev->tx_submitted);
+ init_usb_anchor(&dev->tx_deferred);
+
+ __dev[i] = dev;
+ }
+
ctrl_bridge_debugfs_init();
return 0;
-}
-module_init(ctrl_bridge_init);
-static void __exit ctrl_bridge_exit(void)
+error:
+ while (--i >= 0) {
+ kfree(__dev[i]);
+ __dev[i] = NULL;
+ }
+
+ return retval;
+}
+
+void ctrl_bridge_exit(void)
{
- ctrl_bridge_debugfs_exit();
-}
-module_exit(ctrl_bridge_exit);
+ int i;
-MODULE_DESCRIPTION("Qualcomm modem control bridge driver");
-MODULE_LICENSE("GPL v2");
+ ctrl_bridge_debugfs_exit();
+
+ for (i = 0; i < MAX_BRIDGE_DEVICES; i++) {
+ kfree(__dev[i]);
+ __dev[i] = NULL;
+ }
+}
diff --git a/drivers/usb/misc/mdm_data_bridge.c b/drivers/usb/misc/mdm_data_bridge.c
index fcbf0e1..eea217a 100644
--- a/drivers/usb/misc/mdm_data_bridge.c
+++ b/drivers/usb/misc/mdm_data_bridge.c
@@ -29,11 +29,37 @@
#define FLOW_CTRL_DISABLE 300
#define FLOW_CTRL_SUPPORT 1
-static const char *data_bridge_names[] = {
- "dun_data_hsic0",
- "rmnet_data_hsic0"
+#define BRIDGE_DATA_IDX 0
+#define BRIDGE_CTRL_IDX 1
+
+/*for xport : HSIC*/
+static const char * const serial_hsic_bridge_names[] = {
+ "serial_hsic_data",
+ "serial_hsic_ctrl",
};
+static const char * const rmnet_hsic_bridge_names[] = {
+ "rmnet_hsic_data",
+ "rmnet_hsic_ctrl",
+};
+
+/*for xport : HSUSB*/
+static const char * const serial_hsusb_bridge_names[] = {
+ "serial_hsusb_data",
+ "serial_hsusb_ctrl",
+};
+
+static const char * const rmnet_hsusb_bridge_names[] = {
+ "rmnet_hsusb_data",
+ "rmnet_hsusb_ctrl",
+};
+
+/* since driver supports multiple instances, on smp systems
+ * probe might get called from multiple cores, hence use lock
+ * to identify unclaimed bridge device instance
+ */
+static DEFINE_MUTEX(brdg_claim_lock);
+
static struct workqueue_struct *bridge_wq;
static unsigned int fctrl_support = FLOW_CTRL_SUPPORT;
@@ -54,14 +80,16 @@
static unsigned tx_urb_mult = 20;
module_param(tx_urb_mult, uint, S_IRUGO|S_IWUSR);
-#define TX_HALT BIT(0)
-#define RX_HALT BIT(1)
-#define SUSPENDED BIT(2)
+#define TX_HALT 0
+#define RX_HALT 1
+#define SUSPENDED 2
+#define CLAIMED 3
struct data_bridge {
struct usb_interface *intf;
struct usb_device *udev;
int id;
+ char *name;
unsigned int bulk_in;
unsigned int bulk_out;
@@ -71,9 +99,6 @@
struct usb_anchor tx_active;
struct usb_anchor rx_active;
- /* keep track of outgoing URBs during suspend */
- struct usb_anchor delayed;
-
struct list_head rx_idle;
struct sk_buff_head rx_done;
@@ -102,14 +127,45 @@
static struct data_bridge *__dev[MAX_BRIDGE_DEVICES];
-/* counter used for indexing data bridge devices */
-static int ch_id;
-
static unsigned int get_timestamp(void);
static void dbg_timestamp(char *, struct sk_buff *);
static int submit_rx_urb(struct data_bridge *dev, struct urb *urb,
gfp_t flags);
+/* Find an unclaimed bridge device instance */
+static int get_bridge_dev_idx(void)
+{
+ struct data_bridge *dev;
+ int i;
+
+ mutex_lock(&brdg_claim_lock);
+ for (i = 0; i < MAX_BRIDGE_DEVICES; i++) {
+ dev = __dev[i];
+ if (!test_bit(CLAIMED, &dev->flags)) {
+ set_bit(CLAIMED, &dev->flags);
+ mutex_unlock(&brdg_claim_lock);
+ return i;
+ }
+ }
+ mutex_unlock(&brdg_claim_lock);
+
+ return -ENODEV;
+}
+
+static int get_data_bridge_chid(char *xport_name)
+{
+ struct data_bridge *dev;
+ int i;
+
+ for (i = 0; i < MAX_BRIDGE_DEVICES; i++) {
+ dev = __dev[i];
+ if (!strncmp(dev->name, xport_name, BRIDGE_NAME_MAX_LEN))
+ return i;
+ }
+
+ return -ENODEV;
+}
+
static inline bool rx_halted(struct data_bridge *dev)
{
return test_bit(RX_HALT, &dev->flags);
@@ -120,6 +176,22 @@
return test_bit(RX_THROTTLED, &brdg->flags);
}
+static void free_rx_urbs(struct data_bridge *dev)
+{
+ struct list_head *head;
+ struct urb *rx_urb;
+ unsigned long flags;
+
+ head = &dev->rx_idle;
+ spin_lock_irqsave(&dev->rx_done.lock, flags);
+ while (!list_empty(head)) {
+ rx_urb = list_entry(head->next, struct urb, urb_list);
+ list_del(&rx_urb->urb_list);
+ usb_free_urb(rx_urb);
+ }
+ spin_unlock_irqrestore(&dev->rx_done.lock, flags);
+}
+
int data_bridge_unthrottle_rx(unsigned int id)
{
struct data_bridge *dev;
@@ -193,6 +265,10 @@
struct data_bridge *dev = info->dev;
bool queue = 0;
+ /*usb device disconnect*/
+ if (urb->dev->state == USB_STATE_NOTATTACHED)
+ urb->status = -ECONNRESET;
+
brdg = dev->brdg;
skb_put(skb, urb->actual_length);
@@ -280,35 +356,45 @@
{
int i;
struct urb *rx_urb;
+ int retval = 0;
for (i = 0; i < max_rx_urbs; i++) {
rx_urb = usb_alloc_urb(0, GFP_KERNEL);
- if (!rx_urb)
- return -ENOMEM;
+ if (!rx_urb) {
+ retval = -ENOMEM;
+ goto free_urbs;
+ }
list_add_tail(&rx_urb->urb_list, &dev->rx_idle);
}
- return 0;
+
+ return 0;
+
+free_urbs:
+ free_rx_urbs(dev);
+ return retval;
}
int data_bridge_open(struct bridge *brdg)
{
struct data_bridge *dev;
+ int ch_id;
if (!brdg) {
err("bridge is null\n");
return -EINVAL;
}
- if (brdg->ch_id >= MAX_BRIDGE_DEVICES)
- return -EINVAL;
-
- dev = __dev[brdg->ch_id];
- if (!dev) {
- err("dev is null\n");
- return -ENODEV;
+ ch_id = get_data_bridge_chid(brdg->name);
+ if (ch_id < 0 || ch_id >= MAX_BRIDGE_DEVICES) {
+ err("%s: %s dev not found\n", __func__, brdg->name);
+ return ch_id;
}
+ brdg->ch_id = ch_id;
+
+ dev = __dev[ch_id];
+
dev_dbg(&dev->intf->dev, "%s: dev:%p\n", __func__, dev);
dev->brdg = brdg;
@@ -346,9 +432,8 @@
cancel_work_sync(&dev->kevent);
cancel_work_sync(&dev->process_rx_w);
- usb_unlink_anchored_urbs(&dev->tx_active);
- usb_unlink_anchored_urbs(&dev->rx_active);
- usb_unlink_anchored_urbs(&dev->delayed);
+ usb_kill_anchored_urbs(&dev->tx_active);
+ usb_kill_anchored_urbs(&dev->rx_active);
spin_lock_irqsave(&dev->rx_done.lock, flags);
while ((skb = __skb_dequeue(&dev->rx_done)))
@@ -457,7 +542,12 @@
brdg->ops.unthrottle_tx(brdg->ctx);
}
- usb_autopm_put_interface_async(dev->intf);
+ /* if we are here after device disconnect
+ * usb_unbind_interface() takes care of
+ * residual pm_autopm_get_interface_* calls
+ */
+ if (urb->dev->state != USB_STATE_NOTATTACHED)
+ usb_autopm_put_interface_async(dev->intf);
}
int data_bridge_write(unsigned int id, struct sk_buff *skb)
@@ -502,11 +592,6 @@
txurb->transfer_flags |= URB_ZERO_PACKET;
- if (test_bit(SUSPENDED, &dev->flags)) {
- usb_anchor_urb(txurb, &dev->delayed);
- goto free_urb;
- }
-
pending = atomic_inc_return(&dev->pending_txurbs);
usb_anchor_urb(txurb, &dev->tx_active);
@@ -546,110 +631,66 @@
}
EXPORT_SYMBOL(data_bridge_write);
-static int data_bridge_resume(struct data_bridge *dev)
+static int bridge_resume(struct usb_interface *iface)
{
- struct urb *urb;
- int retval;
+ int retval = 0;
+ struct data_bridge *dev = usb_get_intfdata(iface);
- if (!test_and_clear_bit(SUSPENDED, &dev->flags))
- return 0;
-
- while ((urb = usb_get_from_anchor(&dev->delayed))) {
- usb_anchor_urb(urb, &dev->tx_active);
- atomic_inc(&dev->pending_txurbs);
- retval = usb_submit_urb(urb, GFP_ATOMIC);
- if (retval < 0) {
- atomic_dec(&dev->pending_txurbs);
- usb_unanchor_urb(urb);
-
- /* TODO: need to free urb data */
- usb_scuttle_anchored_urbs(&dev->delayed);
- break;
- }
- dev->to_modem++;
- dev->txurb_drp_cnt--;
- }
+ clear_bit(SUSPENDED, &dev->flags);
if (dev->brdg)
queue_work(dev->wq, &dev->process_rx_w);
- return 0;
-}
-
-static int bridge_resume(struct usb_interface *iface)
-{
- int retval = 0;
- int oldstate;
- struct data_bridge *dev = usb_get_intfdata(iface);
-
- oldstate = iface->dev.power.power_state.event;
- iface->dev.power.power_state.event = PM_EVENT_ON;
-
- if (oldstate & PM_EVENT_SUSPEND) {
- retval = data_bridge_resume(dev);
- if (!retval)
- retval = ctrl_bridge_resume(dev->id);
- }
+ retval = ctrl_bridge_resume(dev->id);
return retval;
}
-static int data_bridge_suspend(struct data_bridge *dev, pm_message_t message)
-{
- if (atomic_read(&dev->pending_txurbs) &&
- (message.event & PM_EVENT_AUTO))
- return -EBUSY;
-
- set_bit(SUSPENDED, &dev->flags);
-
- usb_kill_anchored_urbs(&dev->tx_active);
- usb_kill_anchored_urbs(&dev->rx_active);
-
- return 0;
-}
-
static int bridge_suspend(struct usb_interface *intf, pm_message_t message)
{
int retval;
struct data_bridge *dev = usb_get_intfdata(intf);
- retval = data_bridge_suspend(dev, message);
- if (!retval) {
- retval = ctrl_bridge_suspend(dev->id);
- intf->dev.power.power_state.event = message.event;
- }
+ if (atomic_read(&dev->pending_txurbs))
+ return -EBUSY;
- return retval;
+ retval = ctrl_bridge_suspend(dev->id);
+ if (retval)
+ return retval;
+
+ set_bit(SUSPENDED, &dev->flags);
+ usb_kill_anchored_urbs(&dev->rx_active);
+
+ return 0;
}
static int data_bridge_probe(struct usb_interface *iface,
struct usb_host_endpoint *bulk_in,
- struct usb_host_endpoint *bulk_out, int id)
+ struct usb_host_endpoint *bulk_out, char *name, int id)
{
struct data_bridge *dev;
+ int retval;
- dev = kzalloc(sizeof(*dev), GFP_KERNEL);
+ dev = __dev[id];
if (!dev) {
- err("%s: unable to allocate dev\n", __func__);
- return -ENOMEM;
+ err("%s: device not found\n", __func__);
+ return -ENODEV;
}
- dev->pdev = platform_device_alloc(data_bridge_names[id], id);
+ dev->pdev = platform_device_alloc(name, -1);
if (!dev->pdev) {
err("%s: unable to allocate platform device\n", __func__);
kfree(dev);
return -ENOMEM;
}
- init_usb_anchor(&dev->tx_active);
- init_usb_anchor(&dev->rx_active);
- init_usb_anchor(&dev->delayed);
+ /*clear all bits except claimed bit*/
+ clear_bit(RX_HALT, &dev->flags);
+ clear_bit(TX_HALT, &dev->flags);
+ clear_bit(SUSPENDED, &dev->flags);
- INIT_LIST_HEAD(&dev->rx_idle);
- skb_queue_head_init(&dev->rx_done);
-
- dev->wq = bridge_wq;
dev->id = id;
+ dev->name = name;
dev->udev = interface_to_usbdev(iface);
dev->intf = iface;
@@ -661,13 +702,12 @@
usb_set_intfdata(iface, dev);
- INIT_WORK(&dev->kevent, defer_kevent);
- INIT_WORK(&dev->process_rx_w, data_bridge_process_rx);
-
- __dev[id] = dev;
-
/*allocate list of rx urbs*/
- data_bridge_prepare_rx(dev);
+ retval = data_bridge_prepare_rx(dev);
+ if (retval) {
+ platform_device_put(dev->pdev);
+ return retval;
+ }
platform_device_add(dev->pdev);
@@ -675,7 +715,7 @@
}
#if defined(CONFIG_DEBUG_FS)
-#define DEBUG_BUF_SIZE 1024
+#define DEBUG_BUF_SIZE 4096
static unsigned int record_timestamp;
module_param(record_timestamp, uint, S_IRUGO | S_IWUSR);
@@ -746,7 +786,7 @@
if (!record_timestamp)
return 0;
- buf = kzalloc(sizeof(char) * 4 * DEBUG_BUF_SIZE, GFP_KERNEL);
+ buf = kzalloc(sizeof(char) * DEBUG_BUF_SIZE, GFP_KERNEL);
if (!buf)
return -ENOMEM;
@@ -756,7 +796,7 @@
for (dbg_inc(&i); i != dbg_data.idx; dbg_inc(&i)) {
if (!strnlen(dbg_data.buf[i], DBG_DATA_MSG))
continue;
- j += scnprintf(buf + j, (4 * DEBUG_BUF_SIZE) - j,
+ j += scnprintf(buf + j, DEBUG_BUF_SIZE - j,
"%s\n", dbg_data.buf[i]);
}
@@ -786,7 +826,7 @@
if (!buf)
return -ENOMEM;
- for (i = 0; i < ch_id; i++) {
+ for (i = 0; i < MAX_BRIDGE_DEVICES; i++) {
dev = __dev[i];
if (!dev)
continue;
@@ -806,7 +846,7 @@
"suspended: %d\n"
"TX_HALT: %d\n"
"RX_HALT: %d\n",
- dev->pdev->name, dev,
+ dev->name, dev,
atomic_read(&dev->pending_txurbs),
dev->txurb_drp_cnt,
dev->to_host,
@@ -836,7 +876,7 @@
struct data_bridge *dev;
int i;
- for (i = 0; i < ch_id; i++) {
+ for (i = 0; i < MAX_BRIDGE_DEVICES; i++) {
dev = __dev[i];
if (!dev)
continue;
@@ -913,9 +953,8 @@
int i;
int status = 0;
int numends;
- unsigned int iface_num;
-
- iface_num = iface->cur_altsetting->desc.bInterfaceNumber;
+ int ch_id;
+ char **bname = (char **)id->driver_info;
if (iface->num_altsetting != 1) {
err("%s invalid num_altsetting %u\n",
@@ -923,9 +962,6 @@
return -EINVAL;
}
- if (!test_bit(iface_num, &id->driver_info))
- return -ENODEV;
-
udev = interface_to_usbdev(iface);
usb_get_dev(udev);
@@ -953,27 +989,32 @@
goto out;
}
- status = data_bridge_probe(iface, bulk_in, bulk_out, ch_id);
+ ch_id = get_bridge_dev_idx();
+ if (ch_id < 0) {
+ err("%s all bridge channels claimed. Probe failed\n", __func__);
+ return -ENODEV;
+ }
+
+ status = data_bridge_probe(iface, bulk_in, bulk_out,
+ bname[BRIDGE_DATA_IDX], ch_id);
if (status < 0) {
dev_err(&iface->dev, "data_bridge_probe failed %d\n", status);
goto out;
}
- status = ctrl_bridge_probe(iface, int_in, ch_id);
+ status = ctrl_bridge_probe(iface, int_in, bname[BRIDGE_CTRL_IDX],
+ ch_id);
if (status < 0) {
dev_err(&iface->dev, "ctrl_bridge_probe failed %d\n", status);
- goto free_data_bridge;
+ goto error;
}
- ch_id++;
-
return 0;
-free_data_bridge:
+error:
platform_device_unregister(__dev[ch_id]->pdev);
+ free_rx_urbs(__dev[ch_id]);
usb_set_intfdata(iface, NULL);
- kfree(__dev[ch_id]);
- __dev[ch_id] = NULL;
out:
usb_put_dev(udev);
@@ -983,57 +1024,65 @@
static void bridge_disconnect(struct usb_interface *intf)
{
struct data_bridge *dev = usb_get_intfdata(intf);
- struct list_head *head;
- struct urb *rx_urb;
- unsigned long flags;
if (!dev) {
err("%s: data device not found\n", __func__);
return;
}
- ch_id--;
+ /*set device name to none to get correct channel id
+ * at the time of bridge open
+ */
+ dev->name = "none";
+
ctrl_bridge_disconnect(dev->id);
platform_device_unregister(dev->pdev);
usb_set_intfdata(intf, NULL);
- __dev[dev->id] = NULL;
- /*free rx urbs*/
- head = &dev->rx_idle;
- spin_lock_irqsave(&dev->rx_done.lock, flags);
- while (!list_empty(head)) {
- rx_urb = list_entry(head->next, struct urb, urb_list);
- list_del(&rx_urb->urb_list);
- usb_free_urb(rx_urb);
- }
- spin_unlock_irqrestore(&dev->rx_done.lock, flags);
+ free_rx_urbs(dev);
usb_put_dev(dev->udev);
- kfree(dev);
+
+ clear_bit(CLAIMED, &dev->flags);
}
-/*bit position represents interface number*/
-#define PID9001_IFACE_MASK 0xC
-#define PID9034_IFACE_MASK 0xC
-#define PID9048_IFACE_MASK 0x18
-#define PID904C_IFACE_MASK 0x28
-#define PID9075_IFACE_MASK 0x28
-
+/*driver info stores data/ctrl bridge name used to match bridge xport name*/
static const struct usb_device_id bridge_ids[] = {
- { USB_DEVICE(0x5c6, 0x9001),
- .driver_info = PID9001_IFACE_MASK,
+ { USB_DEVICE_INTERFACE_NUMBER(0x5c6, 0x9001, 2),
+ .driver_info = (unsigned long)serial_hsic_bridge_names,
},
- { USB_DEVICE(0x5c6, 0x9034),
- .driver_info = PID9034_IFACE_MASK,
+ { USB_DEVICE_INTERFACE_NUMBER(0x5c6, 0x9001, 3),
+ .driver_info = (unsigned long)rmnet_hsic_bridge_names,
},
- { USB_DEVICE(0x5c6, 0x9048),
- .driver_info = PID9048_IFACE_MASK,
+ { USB_DEVICE_INTERFACE_NUMBER(0x5c6, 0x9034, 2),
+ .driver_info = (unsigned long)serial_hsic_bridge_names,
},
- { USB_DEVICE(0x5c6, 0x904c),
- .driver_info = PID904C_IFACE_MASK,
+ { USB_DEVICE_INTERFACE_NUMBER(0x5c6, 0x9034, 3),
+ .driver_info = (unsigned long)rmnet_hsic_bridge_names,
},
- { USB_DEVICE(0x5c6, 0x9075),
- .driver_info = PID9075_IFACE_MASK,
+ { USB_DEVICE_INTERFACE_NUMBER(0x5c6, 0x9048, 3),
+ .driver_info = (unsigned long)serial_hsic_bridge_names,
+ },
+ { USB_DEVICE_INTERFACE_NUMBER(0x5c6, 0x9048, 4),
+ .driver_info = (unsigned long)rmnet_hsic_bridge_names,
+ },
+ { USB_DEVICE_INTERFACE_NUMBER(0x5c6, 0x904c, 3),
+ .driver_info = (unsigned long)serial_hsic_bridge_names,
+ },
+ { USB_DEVICE_INTERFACE_NUMBER(0x5c6, 0x904c, 5),
+ .driver_info = (unsigned long)rmnet_hsic_bridge_names,
+ },
+ { USB_DEVICE_INTERFACE_NUMBER(0x5c6, 0x9075, 3),
+ .driver_info = (unsigned long)serial_hsic_bridge_names,
+ },
+ { USB_DEVICE_INTERFACE_NUMBER(0x5c6, 0x9075, 5),
+ .driver_info = (unsigned long)rmnet_hsic_bridge_names,
+ },
+ { USB_DEVICE_INTERFACE_NUMBER(0x5c6, 0x9079, 3),
+ .driver_info = (unsigned long)serial_hsusb_bridge_names,
+ },
+ { USB_DEVICE_INTERFACE_NUMBER(0x5c6, 0x9079, 4),
+ .driver_info = (unsigned long)rmnet_hsusb_bridge_names,
},
{ } /* Terminating entry */
@@ -1052,31 +1101,83 @@
static int __init bridge_init(void)
{
- int ret;
+ struct data_bridge *dev;
+ int ret;
+ int i = 0;
+
+ ret = ctrl_bridge_init();
+ if (ret)
+ return ret;
+
+ bridge_wq = create_singlethread_workqueue("mdm_bridge");
+ if (!bridge_wq) {
+ pr_err("%s: Unable to create workqueue:bridge\n", __func__);
+ ret = -ENOMEM;
+ goto free_ctrl;
+ }
+
+ for (i = 0; i < MAX_BRIDGE_DEVICES; i++) {
+
+ dev = kzalloc(sizeof(*dev), GFP_KERNEL);
+ if (!dev) {
+ err("%s: unable to allocate dev\n", __func__);
+ ret = -ENOMEM;
+ goto error;
+ }
+
+ dev->wq = bridge_wq;
+
+ /*transport name will be set during probe*/
+ dev->name = "none";
+
+ init_usb_anchor(&dev->tx_active);
+ init_usb_anchor(&dev->rx_active);
+
+ INIT_LIST_HEAD(&dev->rx_idle);
+
+ skb_queue_head_init(&dev->rx_done);
+
+ INIT_WORK(&dev->kevent, defer_kevent);
+ INIT_WORK(&dev->process_rx_w, data_bridge_process_rx);
+
+ __dev[i] = dev;
+ }
ret = usb_register(&bridge_driver);
if (ret) {
err("%s: unable to register mdm_bridge driver", __func__);
- return ret;
- }
-
- bridge_wq = create_singlethread_workqueue("mdm_bridge");
- if (!bridge_wq) {
- usb_deregister(&bridge_driver);
- pr_err("%s: Unable to create workqueue:bridge\n", __func__);
- return -ENOMEM;
+ goto error;
}
data_bridge_debugfs_init();
return 0;
+
+error:
+ while (--i >= 0) {
+ kfree(__dev[i]);
+ __dev[i] = NULL;
+ }
+ destroy_workqueue(bridge_wq);
+free_ctrl:
+ ctrl_bridge_exit();
+ return ret;
}
static void __exit bridge_exit(void)
{
+ int i;
+
+ usb_deregister(&bridge_driver);
data_bridge_debugfs_exit();
destroy_workqueue(bridge_wq);
- usb_deregister(&bridge_driver);
+
+ for (i = 0; i < MAX_BRIDGE_DEVICES; i++) {
+ kfree(__dev[i]);
+ __dev[i] = NULL;
+ }
+
+ ctrl_bridge_exit();
}
module_init(bridge_init);
diff --git a/drivers/usb/otg/msm_otg.c b/drivers/usb/otg/msm_otg.c
index 5055dcf..c0b2771 100644
--- a/drivers/usb/otg/msm_otg.c
+++ b/drivers/usb/otg/msm_otg.c
@@ -851,6 +851,24 @@
return 0;
}
+static void msm_otg_bus_vote(struct msm_otg *motg, enum usb_bus_vote vote)
+{
+ int ret;
+ struct msm_otg_platform_data *pdata = motg->pdata;
+
+ /* Check if target allows min_vote to be same as no_vote */
+ if (vote >= pdata->bus_scale_table->num_usecases)
+ vote = USB_NO_PERF_VOTE;
+
+ if (motg->bus_perf_client) {
+ ret = msm_bus_scale_client_update_request(
+ motg->bus_perf_client, vote);
+ if (ret)
+ dev_err(motg->phy.dev, "%s: Failed to vote (%d)\n"
+ "for bus bw %d\n", __func__, vote, ret);
+ }
+}
+
#define PHY_SUSPEND_TIMEOUT_USEC (500 * 1000)
#define PHY_RESUME_TIMEOUT_USEC (100 * 1000)
@@ -1040,6 +1058,8 @@
if (bus)
clear_bit(HCD_FLAG_HW_ACCESSIBLE, &(bus_to_hcd(bus))->flags);
+ msm_otg_bus_vote(motg, USB_NO_PERF_VOTE);
+
atomic_set(&motg->in_lpm, 1);
/* Enable ASYNC IRQ (if present) during LPM */
if (motg->async_irq)
@@ -1068,6 +1088,9 @@
disable_irq(motg->irq);
wake_lock(&motg->wlock);
+ /* Some platforms require BUS vote to enable/disable clocks */
+ msm_otg_bus_vote(motg, USB_MIN_PERF_VOTE);
+
/* Vote for TCXO when waking up the phy */
if (motg->lpm_flags & XO_SHUTDOWN) {
if (!IS_ERR(motg->xo_clk)) {
@@ -1550,7 +1573,6 @@
static void msm_otg_start_peripheral(struct usb_otg *otg, int on)
{
- int ret;
struct msm_otg *motg = container_of(otg->phy, struct msm_otg, phy);
struct msm_otg_platform_data *pdata = motg->pdata;
@@ -1568,29 +1590,18 @@
pdata->setup_gpio(OTG_STATE_B_PERIPHERAL);
/* Configure BUS performance parameters for MAX bandwidth */
- if (motg->bus_perf_client && debug_bus_voting_enabled) {
- ret = msm_bus_scale_client_update_request(
- motg->bus_perf_client, 1);
- if (ret)
- dev_err(motg->phy.dev, "%s: Failed to vote for "
- "bus bandwidth %d\n", __func__, ret);
- }
+ if (debug_bus_voting_enabled)
+ msm_otg_bus_vote(motg, USB_MAX_PERF_VOTE);
+
usb_gadget_vbus_connect(otg->gadget);
} else {
dev_dbg(otg->phy->dev, "gadget off\n");
usb_gadget_vbus_disconnect(otg->gadget);
/* Configure BUS performance parameters to default */
- if (motg->bus_perf_client) {
- ret = msm_bus_scale_client_update_request(
- motg->bus_perf_client, 0);
- if (ret)
- dev_err(motg->phy.dev, "%s: Failed to devote "
- "for bus bw %d\n", __func__, ret);
- }
+ msm_otg_bus_vote(motg, USB_MIN_PERF_VOTE);
if (pdata->setup_gpio)
pdata->setup_gpio(OTG_STATE_UNDEFINED);
}
-
}
static int msm_otg_set_peripheral(struct usb_otg *otg,
@@ -2770,6 +2781,9 @@
if (TA_WAIT_BCON > 0)
msm_otg_start_timer(motg, TA_WAIT_BCON,
A_WAIT_BCON);
+
+ /* Clear BSV in host mode */
+ clear_bit(B_SESS_VLD, &motg->inputs);
msm_otg_start_host(otg, 1);
msm_chg_enable_aca_det(motg);
msm_chg_disable_aca_intr(motg);
@@ -3466,7 +3480,6 @@
size_t count, loff_t *ppos)
{
char buf[8];
- int ret;
struct seq_file *s = file->private_data;
struct msm_otg *motg = s->private;
@@ -3480,13 +3493,7 @@
debug_bus_voting_enabled = true;
} else {
debug_bus_voting_enabled = false;
- if (motg->bus_perf_client) {
- ret = msm_bus_scale_client_update_request(
- motg->bus_perf_client, 0);
- if (ret)
- dev_err(motg->phy.dev, "%s: Failed to devote "
- "for bus bw %d\n", __func__, ret);
- }
+ msm_otg_bus_vote(motg, USB_MIN_PERF_VOTE);
}
return count;
@@ -3685,6 +3692,8 @@
const struct resource *res = ofdev->resource;
unsigned int num = ofdev->num_resources;
int retval;
+ struct ci13xxx_platform_data ci_pdata;
+ struct msm_otg_platform_data *otg_pdata;
pdev = platform_device_alloc(name, -1);
if (!pdev) {
@@ -3701,6 +3710,19 @@
goto error;
}
+ if (!strcmp(name, "msm_hsusb")) {
+ otg_pdata =
+ (struct msm_otg_platform_data *)
+ ofdev->dev.platform_data;
+ ci_pdata.log2_itc = otg_pdata->log2_itc;
+ ci_pdata.usb_core_id = 0;
+ ci_pdata.l1_supported = otg_pdata->l1_supported;
+ retval = platform_device_add_data(pdev, &ci_pdata,
+ sizeof(ci_pdata));
+ if (retval)
+ goto error;
+ }
+
retval = platform_device_add(pdev);
if (retval)
goto error;
@@ -3819,11 +3841,16 @@
"qcom,dp-manual-pullup");
pdata->enable_sec_phy = of_property_read_bool(node,
"qcom,usb2-enable-hsphy2");
+ of_property_read_u32(node, "qcom,hsusb-log2-itc",
+ &pdata->log2_itc);
pdata->pmic_id_irq = platform_get_irq_byname(pdev, "pmic_id_irq");
if (pdata->pmic_id_irq < 0)
pdata->pmic_id_irq = 0;
+ pdata->l1_supported = of_property_read_bool(node,
+ "qcom,hsusb-l1-supported");
+
return pdata;
}
@@ -3849,6 +3876,7 @@
if (!pdata->bus_scale_table)
dev_dbg(&pdev->dev, "bus scaling is disabled\n");
+ pdev->dev.platform_data = pdata;
ret = msm_otg_setup_devices(pdev, pdata->mode, true);
if (ret) {
dev_err(&pdev->dev, "devices setup failed\n");
@@ -3861,17 +3889,17 @@
pdata = pdev->dev.platform_data;
}
- motg = kzalloc(sizeof(struct msm_otg), GFP_KERNEL);
+ motg = devm_kzalloc(&pdev->dev, sizeof(struct msm_otg), GFP_KERNEL);
if (!motg) {
dev_err(&pdev->dev, "unable to allocate msm_otg\n");
return -ENOMEM;
}
- motg->phy.otg = kzalloc(sizeof(struct usb_otg), GFP_KERNEL);
+ motg->phy.otg = devm_kzalloc(&pdev->dev, sizeof(struct usb_otg),
+ GFP_KERNEL);
if (!motg->phy.otg) {
dev_err(&pdev->dev, "unable to allocate usb_otg\n");
- ret = -ENOMEM;
- goto free_motg;
+ return -ENOMEM;
}
the_msm_otg = motg;
@@ -3879,6 +3907,19 @@
phy = &motg->phy;
phy->dev = &pdev->dev;
+ if (motg->pdata->bus_scale_table) {
+ motg->bus_perf_client =
+ msm_bus_scale_register_client(motg->pdata->bus_scale_table);
+ if (!motg->bus_perf_client) {
+ dev_err(motg->phy.dev, "%s: Failed to register BUS\n"
+ "scaling client!!\n", __func__);
+ } else {
+ debug_bus_voting_enabled = true;
+ /* Some platforms require BUS vote to control clocks */
+ msm_otg_bus_vote(motg, USB_MIN_PERF_VOTE);
+ }
+ }
+
/*
* ACA ID_GND threshold range is overlapped with OTG ID_FLOAT. Hence
* PHY treat ACA ID_GND as float and no interrupt is generated. But
@@ -3887,7 +3928,7 @@
if (aca_enabled() && motg->pdata->otg_control != OTG_PMIC_CONTROL) {
dev_err(&pdev->dev, "ACA can not be enabled without PMIC\n");
ret = -EINVAL;
- goto free_otg;
+ goto devote_bus_bw;
}
/* initialize reset counter */
@@ -4182,16 +4223,6 @@
pm_runtime_use_autosuspend(&pdev->dev);
}
- if (motg->pdata->bus_scale_table) {
- motg->bus_perf_client =
- msm_bus_scale_register_client(motg->pdata->bus_scale_table);
- if (!motg->bus_perf_client)
- dev_err(motg->phy.dev, "%s: Failed to register BUS "
- "scaling client!!\n", __func__);
- else
- debug_bus_voting_enabled = true;
- }
-
motg->usb_psy.name = "usb";
motg->usb_psy.type = POWER_SUPPLY_TYPE_USB;
motg->usb_psy.supplied_to = otg_pm_power_supplied_to;
@@ -4259,10 +4290,12 @@
clk_put(motg->clk);
if (!IS_ERR(motg->phy_reset_clk))
clk_put(motg->phy_reset_clk);
-free_otg:
- kfree(motg->phy.otg);
-free_motg:
- kfree(motg);
+devote_bus_bw:
+ if (motg->bus_perf_client) {
+ msm_otg_bus_vote(motg, USB_NO_PERF_VOTE);
+ msm_bus_scale_unregister_client(motg->bus_perf_client);
+ }
+
return ret;
}
@@ -4343,11 +4376,11 @@
clk_put(motg->clk);
clk_put(motg->core_clk);
- if (motg->bus_perf_client)
+ if (motg->bus_perf_client) {
+ msm_otg_bus_vote(motg, USB_NO_PERF_VOTE);
msm_bus_scale_unregister_client(motg->bus_perf_client);
+ }
- kfree(motg->phy.otg);
- kfree(motg);
return 0;
}
diff --git a/drivers/video/msm/mdss/dsi_io_v2.c b/drivers/video/msm/mdss/dsi_io_v2.c
index cbdd241..273fb54 100644
--- a/drivers/video/msm/mdss/dsi_io_v2.c
+++ b/drivers/video/msm/mdss/dsi_io_v2.c
@@ -437,5 +437,9 @@
void msm_dsi_phy_off(unsigned char *ctrl_base)
{
+ MIPI_OUTP(ctrl_base + DSI_DSIPHY_PLL_CTRL_5, 0x05f);
+ MIPI_OUTP(ctrl_base + DSI_DSIPHY_REGULATOR_CTRL_0, 0x02);
MIPI_OUTP(ctrl_base + DSI_DSIPHY_CTRL_0, 0x00);
+ MIPI_OUTP(ctrl_base + DSI_DSIPHY_CTRL_1, 0x7f);
+ MIPI_OUTP(ctrl_base + DSI_CLK_CTRL, 0);
}
diff --git a/drivers/video/msm/mdss/dsi_panel_v2.c b/drivers/video/msm/mdss/dsi_panel_v2.c
index bb5d3ca..5c164e4 100644
--- a/drivers/video/msm/mdss/dsi_panel_v2.c
+++ b/drivers/video/msm/mdss/dsi_panel_v2.c
@@ -34,6 +34,7 @@
int rst_gpio;
int disp_en_gpio;
int video_mode_gpio;
+ int te_gpio;
char bl_ctrl;
struct regulator *vddio_vreg;
@@ -190,6 +191,8 @@
gpio_set_value(panel_private->video_mode_gpio,
0);
}
+ if (gpio_is_valid(panel_private->te_gpio))
+ gpio_request(panel_private->te_gpio, "panel_te");
} else {
gpio_set_value(panel_private->rst_gpio, 0);
gpio_free(panel_private->rst_gpio);
@@ -202,6 +205,8 @@
if (gpio_is_valid(panel_private->video_mode_gpio))
gpio_free(panel_private->video_mode_gpio);
+ if (gpio_is_valid(panel_private->te_gpio))
+ gpio_free(panel_private->te_gpio);
dsi_panel_power(0);
}
}
@@ -233,16 +238,10 @@
pr_debug("%s:%d, debug info (mode) : %d\n", __func__, __LINE__,
mipi->mode);
- if (mipi->mode == DSI_VIDEO_MODE) {
- dsi_cmds_tx_v2(pdata, &panel_private->dsi_panel_tx_buf,
- panel_private->on_cmds_list->buf,
- panel_private->on_cmds_list->size);
- } else {
- pr_err("%s:%d, CMD MODE NOT SUPPORTED", __func__, __LINE__);
- return -EINVAL;
- }
- return 0;
+ return dsi_cmds_tx_v2(pdata, &panel_private->dsi_panel_tx_buf,
+ panel_private->on_cmds_list->buf,
+ panel_private->on_cmds_list->size);
}
static int dsi_panel_off(struct mdss_panel_data *pdata)
@@ -252,16 +251,10 @@
pr_debug("%s:%d, debug info\n", __func__, __LINE__);
- if (mipi->mode == DSI_VIDEO_MODE) {
- dsi_cmds_tx_v2(pdata, &panel_private->dsi_panel_tx_buf,
- panel_private->off_cmds_list->buf,
- panel_private->off_cmds_list->size);
- } else {
- pr_debug("%s:%d, CMD mode not supported", __func__, __LINE__);
- return -EINVAL;
- }
- return 0;
+ return dsi_cmds_tx_v2(pdata, &panel_private->dsi_panel_tx_buf,
+ panel_private->off_cmds_list->buf,
+ panel_private->off_cmds_list->size);
}
static int dsi_panel_parse_gpio(struct platform_device *pdev)
@@ -272,6 +265,8 @@
panel_private->rst_gpio = of_get_named_gpio(np, "qcom,rst-gpio", 0);
panel_private->video_mode_gpio = of_get_named_gpio(np,
"qcom,mode-selection-gpio", 0);
+ panel_private->te_gpio = of_get_named_gpio(np,
+ "qcom,te-gpio", 0);
return 0;
}
@@ -364,86 +359,9 @@
struct dsi_panel_common_pdata *panel_data)
{
struct device_node *np = pdev->dev.of_node;
- u32 res[6], tmp;
- int i, len, rc;
+ int i, len;
const char *data;
- rc = of_property_read_u32(np, "qcom,mdss-pan-dsi-mode", &tmp);
- panel_data->panel_info.mipi.mode = (!rc ? tmp : DSI_VIDEO_MODE);
-
- rc = of_property_read_u32(np,
- "qcom,mdss-pan-dsi-h-pulse-mode", &tmp);
- panel_data->panel_info.mipi.pulse_mode_hsa_he = (!rc ? tmp : false);
-
- rc = of_property_read_u32_array(np,
- "qcom,mdss-pan-dsi-h-power-stop", res, 3);
- panel_data->panel_info.mipi.hbp_power_stop = (!rc ? res[0] : false);
- panel_data->panel_info.mipi.hsa_power_stop = (!rc ? res[1] : false);
- panel_data->panel_info.mipi.hfp_power_stop = (!rc ? res[2] : false);
-
- rc = of_property_read_u32_array(np,
- "qcom,mdss-pan-dsi-bllp-power-stop", res, 2);
- panel_data->panel_info.mipi.bllp_power_stop =
- (!rc ? res[0] : false);
- panel_data->panel_info.mipi.eof_bllp_power_stop =
- (!rc ? res[1] : false);
-
- rc = of_property_read_u32(np,
- "qcom,mdss-pan-dsi-traffic-mode", &tmp);
- panel_data->panel_info.mipi.traffic_mode =
- (!rc ? tmp : DSI_NON_BURST_SYNCH_PULSE);
-
- rc = of_property_read_u32(np,
- "qcom,mdss-pan-dsi-dst-format", &tmp);
- panel_data->panel_info.mipi.dst_format =
- (!rc ? tmp : DSI_VIDEO_DST_FORMAT_RGB888);
-
- rc = of_property_read_u32(np, "qcom,mdss-pan-dsi-vc", &tmp);
- panel_data->panel_info.mipi.vc = (!rc ? tmp : 0);
-
- rc = of_property_read_u32(np, "qcom,mdss-pan-dsi-rgb-swap", &tmp);
- panel_data->panel_info.mipi.rgb_swap = (!rc ? tmp : DSI_RGB_SWAP_RGB);
-
- rc = of_property_read_u32_array(np,
- "qcom,mdss-pan-dsi-data-lanes", res, 4);
- panel_data->panel_info.mipi.data_lane0 = (!rc ? res[0] : true);
- panel_data->panel_info.mipi.data_lane1 = (!rc ? res[1] : false);
- panel_data->panel_info.mipi.data_lane2 = (!rc ? res[2] : false);
- panel_data->panel_info.mipi.data_lane3 = (!rc ? res[3] : false);
-
- rc = of_property_read_u32(np, "qcom,mdss-pan-dsi-dlane-swap", &tmp);
- panel_data->panel_info.mipi.dlane_swap = (!rc ? tmp : 0);
-
- rc = of_property_read_u32_array(np, "qcom,mdss-pan-dsi-t-clk", res, 2);
- panel_data->panel_info.mipi.t_clk_pre = (!rc ? res[0] : 0x24);
- panel_data->panel_info.mipi.t_clk_post = (!rc ? res[1] : 0x03);
-
- rc = of_property_read_u32(np, "qcom,mdss-pan-dsi-stream", &tmp);
- panel_data->panel_info.mipi.stream = (!rc ? tmp : 0);
-
- rc = of_property_read_u32(np, "qcom,mdss-pan-dsi-mdp-tr", &tmp);
- panel_data->panel_info.mipi.mdp_trigger =
- (!rc ? tmp : DSI_CMD_TRIGGER_SW);
- if (panel_data->panel_info.mipi.mdp_trigger > 6) {
- pr_err("%s:%d, Invalid mdp trigger. Forcing to sw trigger",
- __func__, __LINE__);
- panel_data->panel_info.mipi.mdp_trigger =
- DSI_CMD_TRIGGER_SW;
- }
-
- rc = of_property_read_u32(np, "qcom,mdss-pan-dsi-dma-tr", &tmp);
- panel_data->panel_info.mipi.dma_trigger =
- (!rc ? tmp : DSI_CMD_TRIGGER_SW);
- if (panel_data->panel_info.mipi.dma_trigger > 6) {
- pr_err("%s:%d, Invalid dma trigger. Forcing to sw trigger",
- __func__, __LINE__);
- panel_data->panel_info.mipi.dma_trigger =
- DSI_CMD_TRIGGER_SW;
- }
-
- rc = of_property_read_u32(np, "qcom,mdss-pan-dsi-frame-rate", &tmp);
- panel_data->panel_info.mipi.frame_rate = (!rc ? tmp : 60);
-
data = of_get_property(np, "qcom,panel-phy-regulatorSettings", &len);
if ((!data) || (len != 6)) {
pr_err("%s:%d, Unable to read Phy regulator settings",
@@ -713,6 +631,102 @@
return rc;
}
+static int dsi_panel_parse_host_cfg(struct platform_device *pdev,
+ struct dsi_panel_common_pdata *panel_data)
+{
+ struct device_node *np = pdev->dev.of_node;
+ u32 res[6], tmp;
+ int rc;
+
+ rc = of_property_read_u32(np, "qcom,mdss-pan-dsi-mode", &tmp);
+ panel_data->panel_info.mipi.mode = (!rc ? tmp : DSI_VIDEO_MODE);
+
+ rc = of_property_read_u32(np,
+ "qcom,mdss-pan-dsi-h-pulse-mode", &tmp);
+ panel_data->panel_info.mipi.pulse_mode_hsa_he = (!rc ? tmp : false);
+
+ rc = of_property_read_u32_array(np,
+ "qcom,mdss-pan-dsi-h-power-stop", res, 3);
+ panel_data->panel_info.mipi.hbp_power_stop = (!rc ? res[0] : false);
+ panel_data->panel_info.mipi.hsa_power_stop = (!rc ? res[1] : false);
+ panel_data->panel_info.mipi.hfp_power_stop = (!rc ? res[2] : false);
+
+ rc = of_property_read_u32_array(np,
+ "qcom,mdss-pan-dsi-bllp-power-stop", res, 2);
+ panel_data->panel_info.mipi.bllp_power_stop =
+ (!rc ? res[0] : false);
+ panel_data->panel_info.mipi.eof_bllp_power_stop =
+ (!rc ? res[1] : false);
+
+ rc = of_property_read_u32(np,
+ "qcom,mdss-pan-dsi-traffic-mode", &tmp);
+ panel_data->panel_info.mipi.traffic_mode =
+ (!rc ? tmp : DSI_NON_BURST_SYNCH_PULSE);
+
+ rc = of_property_read_u32(np,
+ "qcom,mdss-pan-dsi-dst-format", &tmp);
+ panel_data->panel_info.mipi.dst_format =
+ (!rc ? tmp : DSI_VIDEO_DST_FORMAT_RGB888);
+
+ rc = of_property_read_u32(np, "qcom,mdss-pan-dsi-vc", &tmp);
+ panel_data->panel_info.mipi.vc = (!rc ? tmp : 0);
+
+ rc = of_property_read_u32(np, "qcom,mdss-pan-dsi-rgb-swap", &tmp);
+ panel_data->panel_info.mipi.rgb_swap = (!rc ? tmp : DSI_RGB_SWAP_RGB);
+
+ rc = of_property_read_u32_array(np,
+ "qcom,mdss-pan-dsi-data-lanes", res, 4);
+ panel_data->panel_info.mipi.data_lane0 = (!rc ? res[0] : true);
+ panel_data->panel_info.mipi.data_lane1 = (!rc ? res[1] : false);
+ panel_data->panel_info.mipi.data_lane2 = (!rc ? res[2] : false);
+ panel_data->panel_info.mipi.data_lane3 = (!rc ? res[3] : false);
+
+ rc = of_property_read_u32(np, "qcom,mdss-pan-dsi-dlane-swap", &tmp);
+ panel_data->panel_info.mipi.dlane_swap = (!rc ? tmp : 0);
+
+ rc = of_property_read_u32_array(np, "qcom,mdss-pan-dsi-t-clk", res, 2);
+ panel_data->panel_info.mipi.t_clk_pre = (!rc ? res[0] : 0x24);
+ panel_data->panel_info.mipi.t_clk_post = (!rc ? res[1] : 0x03);
+
+ rc = of_property_read_u32(np, "qcom,mdss-pan-dsi-stream", &tmp);
+ panel_data->panel_info.mipi.stream = (!rc ? tmp : 0);
+
+ rc = of_property_read_u32(np, "qcom,mdss-pan-te-sel", &tmp);
+ panel_data->panel_info.mipi.te_sel = (!rc ? tmp : 1);
+
+ rc = of_property_read_u32(np, "qcom,mdss-pan-insert-dcs-cmd", &tmp);
+ panel_data->panel_info.mipi.insert_dcs_cmd = (!rc ? tmp : 1);
+
+ rc = of_property_read_u32(np, "qcom,mdss-pan-wr-mem-continue", &tmp);
+ panel_data->panel_info.mipi.wr_mem_continue = (!rc ? tmp : 0x3c);
+ rc = of_property_read_u32(np, "qcom,mdss-pan-wr-mem-start", &tmp);
+ panel_data->panel_info.mipi.wr_mem_start = (!rc ? tmp : 0x2c);
+
+ rc = of_property_read_u32(np, "qcom,mdss-pan-dsi-mdp-tr", &tmp);
+ panel_data->panel_info.mipi.mdp_trigger =
+ (!rc ? tmp : DSI_CMD_TRIGGER_SW);
+ if (panel_data->panel_info.mipi.mdp_trigger > 6) {
+ pr_err("%s:%d, Invalid mdp trigger. Forcing to sw trigger",
+ __func__, __LINE__);
+ panel_data->panel_info.mipi.mdp_trigger =
+ DSI_CMD_TRIGGER_SW;
+ }
+
+ rc = of_property_read_u32(np, "qcom,mdss-pan-dsi-dma-tr", &tmp);
+ panel_data->panel_info.mipi.dma_trigger =
+ (!rc ? tmp : DSI_CMD_TRIGGER_SW);
+ if (panel_data->panel_info.mipi.dma_trigger > 6) {
+ pr_err("%s:%d, Invalid dma trigger. Forcing to sw trigger",
+ __func__, __LINE__);
+ panel_data->panel_info.mipi.dma_trigger =
+ DSI_CMD_TRIGGER_SW;
+ }
+
+ rc = of_property_read_u32(np, "qcom,mdss-pan-dsi-frame-rate", &tmp);
+ panel_data->panel_info.mipi.frame_rate = (!rc ? tmp : 60);
+ return rc;
+}
+
static int dsi_panel_parse_dt(struct platform_device *pdev,
struct dsi_panel_common_pdata *panel_data,
char *bl_ctrl)
@@ -755,6 +769,12 @@
return rc;
}
+ rc = dsi_panel_parse_host_cfg(pdev, panel_data);
+ if (rc) {
+ pr_err("fail to parse DSI host configs\n");
+ return rc;
+ }
+
rc = dsi_panel_parse_init_cmds(pdev, panel_data);
if (rc) {
pr_err("fail to parse DSI init commands\n");
diff --git a/drivers/video/msm/mdss/mdp3.c b/drivers/video/msm/mdss/mdp3.c
index e5b6603..aecb19d 100644
--- a/drivers/video/msm/mdss/mdp3.c
+++ b/drivers/video/msm/mdss/mdp3.c
@@ -826,20 +826,16 @@
struct ion_client *iclient = mdp3_res->ion_client;
int dom = (mdp3_res->domains + MDP3_IOMMU_DOMAIN)->domain_idx;
- if (!data->srcp_file) {
- pr_debug("No img to put\n");
- return 0;
- }
- if (data->flags & MDP_BLIT_SRC_GEM) {
- pr_debug("memory source MDP_BLIT_SRC_GEM\n");
- } else if (data->flags & MDP_MEMORY_ID_TYPE_FB) {
- pr_debug("fb mem buf=0x%x\n", data->addr);
+ if (data->flags & MDP_MEMORY_ID_TYPE_FB) {
+ pr_info("mdp3_put_img fb mem buf=0x%x\n", data->addr);
fput_light(data->srcp_file, data->p_need);
data->srcp_file = NULL;
- } else {
+ } else if (!IS_ERR_OR_NULL(data->srcp_ihdl)) {
ion_unmap_iommu(iclient, data->srcp_ihdl, dom, 0);
ion_free(iclient, data->srcp_ihdl);
data->srcp_ihdl = NULL;
+ } else {
+ return -EINVAL;
}
return 0;
}
@@ -855,16 +851,9 @@
start = (unsigned long *) &data->addr;
len = (unsigned long *) &data->len;
- data->flags |= img->flags;
+ data->flags = img->flags;
data->p_need = 0;
- if (img->flags & MDP_BLIT_SRC_GEM) {
- data->srcp_file = NULL;
- ret = kgsl_gem_obj_addr(img->memory_id, (int) img->priv,
- &data->addr, &data->len);
- if (!ret)
- goto done;
- }
if (img->flags & MDP_MEMORY_ID_TYPE_FB) {
file = fget_light(img->memory_id, &data->p_need);
if (file == NULL) {
@@ -889,8 +878,7 @@
data->srcp_file = file;
if (!ret)
goto done;
- }
- if (iclient) {
+ } else if (iclient) {
data->srcp_ihdl = ion_import_dma_buf(iclient, img->memory_id);
if (IS_ERR_OR_NULL(data->srcp_ihdl)) {
pr_err("error on ion_import_fd\n");
diff --git a/drivers/video/msm/mdss/mdp3_ctrl.c b/drivers/video/msm/mdss/mdp3_ctrl.c
index 734756c..f43d1ed 100644
--- a/drivers/video/msm/mdss/mdp3_ctrl.c
+++ b/drivers/video/msm/mdss/mdp3_ctrl.c
@@ -19,6 +19,7 @@
#include <linux/major.h>
#include <linux/module.h>
#include <linux/uaccess.h>
+#include <linux/delay.h>
#include "mdp3_ctrl.h"
#include "mdp3.h"
@@ -26,10 +27,11 @@
#define MDP_CORE_CLK_RATE 100000000
#define MDP_VSYNC_CLK_RATE 19200000
-#define VSYNC_PERIOD 16
static void mdp3_ctrl_pan_display(struct msm_fb_data_type *mfd);
static int mdp3_overlay_unset(struct msm_fb_data_type *mfd, int ndx);
+static int mdp3_histogram_stop(struct mdp3_session_data *session,
+ u32 block);
static void mdp3_bufq_init(struct mdp3_buffer_queue *bufq)
{
@@ -86,13 +88,20 @@
return bufq->count;
}
+static void mdp3_dispatch_vsync(struct work_struct *work)
+{
+ struct mdp3_session_data *mdp3_session;
+ mdp3_session = container_of(work, struct mdp3_session_data, vsync_work);
+ if (mdp3_session && mdp3_session->mfd)
+ sysfs_notify(&mdp3_session->mfd->fbi->dev->kobj, NULL,
+ "vsync_event");
+}
+
void vsync_notify_handler(void *arg)
{
struct mdp3_session_data *session = (struct mdp3_session_data *)arg;
- spin_lock(&session->vsync_lock);
session->vsync_time = ktime_get();
- complete(&session->vsync_comp);
- spin_unlock(&session->vsync_lock);
+ schedule_work(&session->vsync_work);
}
static int mdp3_ctrl_vsync_enable(struct msm_fb_data_type *mfd, int enable)
@@ -100,7 +109,6 @@
struct mdp3_session_data *mdp3_session;
struct mdp3_vsync_notification vsync_client;
struct mdp3_vsync_notification *arg = NULL;
- unsigned long flag;
pr_debug("mdp3_ctrl_vsync_enable =%d\n", enable);
mdp3_session = (struct mdp3_session_data *)mfd->mdp.private1;
@@ -120,16 +128,27 @@
mutex_lock(&mdp3_session->lock);
mdp3_session->dma->vsync_enable(mdp3_session->dma, arg);
+ if (enable && mdp3_session->status == 1 && !mdp3_session->intf->active)
+ mod_timer(&mdp3_session->vsync_timer,
+ jiffies + msecs_to_jiffies(mdp3_session->vsync_period));
+ else if (!enable)
+ del_timer(&mdp3_session->vsync_timer);
+
mutex_unlock(&mdp3_session->lock);
- spin_lock_irqsave(&mdp3_session->vsync_lock, flag);
- if (enable)
- INIT_COMPLETION(mdp3_session->vsync_comp);
- else
- complete_all(&mdp3_session->vsync_comp);
- spin_unlock_irqrestore(&mdp3_session->vsync_lock, flag);
return 0;
}
+void mdp3_vsync_timer_func(unsigned long arg)
+{
+ struct mdp3_session_data *session = (struct mdp3_session_data *)arg;
+ if (session->status == 1 && !session->intf->active) {
+ pr_debug("mdp3_vsync_timer_func trigger\n");
+ vsync_notify_handler(session);
+ mod_timer(&session->vsync_timer,
+ jiffies + msecs_to_jiffies(session->vsync_period));
+ }
+}
+
static int mdp3_ctrl_async_blit_req(struct msm_fb_data_type *mfd,
void __user *p)
{
@@ -175,23 +194,16 @@
struct mdp3_session_data *mdp3_session = NULL;
u64 vsync_ticks;
int rc;
- unsigned long flag;
if (!mfd || !mfd->mdp.private1)
- return 0;
+ return -EAGAIN;
mdp3_session = (struct mdp3_session_data *)mfd->mdp.private1;
- rc = wait_for_completion_interruptible(&mdp3_session->vsync_comp);
- if (rc < 0)
- return rc;
-
- spin_lock_irqsave(&mdp3_session->vsync_lock, flag);
vsync_ticks = ktime_to_ns(mdp3_session->vsync_time);
- spin_unlock_irqrestore(&mdp3_session->vsync_lock, flag);
pr_debug("fb%d vsync=%llu", mfd->index, vsync_ticks);
- rc = snprintf(buf, PAGE_SIZE, "VSYNC=%llu", vsync_ticks);
+ rc = scnprintf(buf, PAGE_SIZE, "VSYNC=%llu", vsync_ticks);
return rc;
}
@@ -353,6 +365,7 @@
struct fb_var_screeninfo *var;
struct mdp3_dma_output_config outputConfig;
struct mdp3_dma_source sourceConfig;
+ int frame_rate = mfd->panel_info->mipi.frame_rate;
fix = &fbi->fix;
var = &fbi->var;
@@ -364,6 +377,8 @@
sourceConfig.y = 0;
sourceConfig.stride = fix->line_length;
sourceConfig.buf = (void *)mfd->iova;
+ sourceConfig.vsync_count =
+ MDP_VSYNC_CLK_RATE / (frame_rate * sourceConfig.width);
outputConfig.dither_en = 0;
outputConfig.out_sel = mdp3_ctrl_get_intf_type(mfd);
@@ -442,10 +457,13 @@
goto on_error;
}
- rc = mdp3_session->dma->start(mdp3_session->dma, mdp3_session->intf);
- if (rc) {
- pr_err("fail to start the MDP display interface\n");
- goto on_error;
+ if (mfd->fbi->screen_base) {
+ rc = mdp3_session->dma->start(mdp3_session->dma,
+ mdp3_session->intf);
+ if (rc) {
+ pr_err("fail to start the MDP display interface\n");
+ goto on_error;
+ }
}
on_error:
@@ -479,6 +497,8 @@
pr_debug("mdp3_ctrl_off stop mdp3 dma engine\n");
+ mdp3_histogram_stop(mdp3_session, MDP_BLOCK_DMA_P);
+
rc = mdp3_session->dma->stop(mdp3_session->dma, mdp3_session->intf);
if (rc)
@@ -505,6 +525,7 @@
off_error:
mdp3_session->status = 0;
+ mdp3_bufq_deinit(&mdp3_session->bufq_out);
mutex_unlock(&mdp3_session->lock);
if (mdp3_session->overlay.id != MSMFB_NEW_REQUEST)
mdp3_overlay_unset(mfd, mdp3_session->overlay.id);
@@ -556,14 +577,11 @@
int rc = 0;
struct mdp3_session_data *mdp3_session = mfd->mdp.private1;
- mdp3_ctrl_pan_display(mfd);
-
mutex_lock(&mdp3_session->lock);
if (mdp3_session->overlay.id == ndx && ndx == 1) {
mdp3_session->overlay.id = MSMFB_NEW_REQUEST;
mdp3_bufq_deinit(&mdp3_session->bufq_in);
- mdp3_bufq_deinit(&mdp3_session->bufq_out);
} else {
rc = -EINVAL;
}
@@ -640,16 +658,19 @@
data = mdp3_bufq_pop(&mdp3_session->bufq_in);
if (data) {
mdp3_session->dma->update(mdp3_session->dma,
- (void *)data->addr);
+ (void *)data->addr,
+ mdp3_session->intf);
mdp3_bufq_push(&mdp3_session->bufq_out, data);
}
- if (mdp3_bufq_count(&mdp3_session->bufq_out) > 1) {
+ if (mdp3_bufq_count(&mdp3_session->bufq_out) > 2) {
data = mdp3_bufq_pop(&mdp3_session->bufq_out);
mdp3_put_img(data);
}
-
mutex_unlock(&mdp3_session->lock);
+
+ mdss_fb_update_notify_update(mfd);
+
return rc;
}
@@ -686,8 +707,14 @@
goto pan_error;
}
- mdp3_session->dma->update(mdp3_session->dma,
- (void *)mfd->iova + offset);
+ if (mfd->fbi->screen_base) {
+ mdp3_session->dma->update(mdp3_session->dma,
+ (void *)mfd->iova + offset,
+ mdp3_session->intf);
+ } else {
+ pr_debug("mdp3_ctrl_pan_display no memory, stop interface");
+ mdp3_session->dma->stop(mdp3_session->dma, mdp3_session->intf);
+ }
pan_error:
mutex_unlock(&mdp3_session->lock);
}
@@ -715,6 +742,288 @@
return ret;
}
+static int mdp3_histogram_start(struct mdp3_session_data *session,
+ struct mdp_histogram_start_req *req)
+{
+ int ret;
+ struct mdp3_dma_histogram_config histo_config;
+
+ pr_debug("mdp3_histogram_start\n");
+ if (req->block != MDP_BLOCK_DMA_P ||
+ req->num_bins != MDP_HISTOGRAM_BIN_NUM) {
+ pr_err("mdp3_histogram_start invalid request\n");
+ return -EINVAL;
+ }
+
+ if (!session->dma->histo_op ||
+ !session->dma->config_histo) {
+ pr_err("mdp3_histogram_start not supported\n");
+ return -EINVAL;
+ }
+
+ mutex_lock(&session->histo_lock);
+
+ if (session->histo_status) {
+ pr_err("mdp3_histogram_start already started\n");
+ ret = -EBUSY;
+ goto histogram_start_err;
+ }
+
+ ret = session->dma->histo_op(session->dma, MDP3_DMA_HISTO_OP_RESET);
+ if (ret) {
+ pr_err("mdp3_histogram_start reset error\n");
+ goto histogram_start_err;
+ }
+
+ histo_config.frame_count = req->frame_cnt;
+ histo_config.bit_mask = req->bit_mask;
+ histo_config.auto_clear_en = 1;
+ histo_config.bit_mask_polarity = 0;
+ ret = session->dma->config_histo(session->dma, &histo_config);
+ if (ret) {
+ pr_err("mdp3_histogram_start config error\n");
+ goto histogram_start_err;
+ }
+
+ ret = session->dma->histo_op(session->dma, MDP3_DMA_HISTO_OP_START);
+ if (ret) {
+ pr_err("mdp3_histogram_start config error\n");
+ goto histogram_start_err;
+ }
+
+ session->histo_status = 1;
+
+histogram_start_err:
+ mutex_unlock(&session->histo_lock);
+ return ret;
+}
+
+static int mdp3_histogram_stop(struct mdp3_session_data *session,
+ u32 block)
+{
+ int ret;
+ pr_debug("mdp3_histogram_stop\n");
+
+ if (!session->dma->histo_op || block != MDP_BLOCK_DMA_P) {
+ pr_err("mdp3_histogram_stop not supported\n");
+ return -EINVAL;
+ }
+
+ mutex_lock(&session->histo_lock);
+
+ if (!session->histo_status) {
+ ret = 0;
+ goto histogram_stop_err;
+ }
+
+ ret = session->dma->histo_op(session->dma, MDP3_DMA_HISTO_OP_CANCEL);
+ if (ret)
+ pr_err("mdp3_histogram_stop error\n");
+
+ session->histo_status = 0;
+
+histogram_stop_err:
+ mutex_unlock(&session->histo_lock);
+ return ret;
+}
+
+static int mdp3_histogram_collect(struct mdp3_session_data *session,
+ struct mdp_histogram_data *hist)
+{
+ int ret;
+ struct mdp3_dma_histogram_data *mdp3_histo;
+
+ if (!session->dma->get_histo) {
+ pr_err("mdp3_histogram_collect not supported\n");
+ return -EINVAL;
+ }
+
+ mutex_lock(&session->histo_lock);
+
+ if (!session->histo_status) {
+ pr_err("mdp3_histogram_collect not started\n");
+ mutex_unlock(&session->histo_lock);
+ return -EPERM;
+ }
+
+ mutex_unlock(&session->histo_lock);
+
+ ret = session->dma->get_histo(session->dma);
+ if (ret) {
+ pr_err("mdp3_histogram_collect error = %d\n", ret);
+ return ret;
+ }
+
+ mdp3_histo = &session->dma->histo_data;
+
+ ret = copy_to_user(hist->c0, mdp3_histo->r_data,
+ sizeof(uint32_t) * MDP_HISTOGRAM_BIN_NUM);
+ if (ret)
+ return ret;
+
+ ret = copy_to_user(hist->c1, mdp3_histo->g_data,
+ sizeof(uint32_t) * MDP_HISTOGRAM_BIN_NUM);
+ if (ret)
+ return ret;
+
+ ret = copy_to_user(hist->c2, mdp3_histo->b_data,
+ sizeof(uint32_t) * MDP_HISTOGRAM_BIN_NUM);
+ if (ret)
+ return ret;
+
+ ret = copy_to_user(hist->extra_info, mdp3_histo->extra,
+ sizeof(uint32_t) * 2);
+ if (ret)
+ return ret;
+
+ hist->bin_cnt = MDP_HISTOGRAM_BIN_NUM;
+ hist->block = MDP_BLOCK_DMA_P;
+ return ret;
+}
+
+static int mdp3_bl_scale_config(struct msm_fb_data_type *mfd,
+ struct mdp_bl_scale_data *data)
+{
+ int ret = 0;
+ int curr_bl;
+ mutex_lock(&mfd->bl_lock);
+ curr_bl = mfd->bl_level;
+ mfd->bl_scale = data->scale;
+ mfd->bl_min_lvl = data->min_lvl;
+ pr_debug("update scale = %d, min_lvl = %d\n", mfd->bl_scale,
+ mfd->bl_min_lvl);
+
+ /* update current backlight to use new scaling*/
+ mdss_fb_set_backlight(mfd, curr_bl);
+ mutex_unlock(&mfd->bl_lock);
+ return ret;
+}
+
+static int mdp3_pp_ioctl(struct msm_fb_data_type *mfd,
+ void __user *argp)
+{
+ int ret = -EINVAL;
+ struct msmfb_mdp_pp mdp_pp;
+
+ ret = copy_from_user(&mdp_pp, argp, sizeof(mdp_pp));
+ if (ret)
+ return ret;
+
+ switch (mdp_pp.op) {
+ case mdp_bl_scale_cfg:
+ ret = mdp3_bl_scale_config(mfd, (struct mdp_bl_scale_data *)
+ &mdp_pp.data.bl_scale_data);
+ break;
+ default:
+ pr_err("Unsupported request to MDP_PP IOCTL.\n");
+ ret = -EINVAL;
+ break;
+ }
+ if (!ret)
+ ret = copy_to_user(argp, &mdp_pp, sizeof(struct msmfb_mdp_pp));
+ return ret;
+}
+
+static int mdp3_histo_ioctl(struct msm_fb_data_type *mfd, u32 cmd,
+ void __user *argp)
+{
+ int ret = -ENOSYS;
+ struct mdp_histogram_data hist;
+ struct mdp_histogram_start_req hist_req;
+ u32 block;
+ struct mdp3_session_data *mdp3_session;
+
+ if (!mfd || !mfd->mdp.private1)
+ return -EINVAL;
+
+ mdp3_session = mfd->mdp.private1;
+
+ switch (cmd) {
+ case MSMFB_HISTOGRAM_START:
+ ret = copy_from_user(&hist_req, argp, sizeof(hist_req));
+ if (ret)
+ return ret;
+
+ ret = mdp3_histogram_start(mdp3_session, &hist_req);
+ break;
+
+ case MSMFB_HISTOGRAM_STOP:
+ ret = copy_from_user(&block, argp, sizeof(int));
+ if (ret)
+ return ret;
+
+ ret = mdp3_histogram_stop(mdp3_session, block);
+ break;
+
+ case MSMFB_HISTOGRAM:
+ ret = copy_from_user(&hist, argp, sizeof(hist));
+ if (ret)
+ return ret;
+
+ ret = mdp3_histogram_collect(mdp3_session, &hist);
+ if (!ret)
+ ret = copy_to_user(argp, &hist, sizeof(hist));
+ break;
+ default:
+ break;
+ }
+ return ret;
+}
+
+static int mdp3_ctrl_lut_update(struct msm_fb_data_type *mfd,
+ struct fb_cmap *cmap)
+{
+ int rc = 0;
+ struct mdp3_session_data *mdp3_session = mfd->mdp.private1;
+ struct mdp3_dma_lut_config lut_config;
+ struct mdp3_dma_lut lut;
+ static u16 r[MDP_LUT_SIZE];
+ static u16 g[MDP_LUT_SIZE];
+ static u16 b[MDP_LUT_SIZE];
+
+ if (!mdp3_session->dma->config_lut)
+ return -EINVAL;
+
+ if (cmap->start + cmap->len > MDP_LUT_SIZE) {
+ pr_err("mdp3_ctrl_lut_update invalid arguments\n");
+ return -EINVAL;
+ }
+
+ rc = copy_from_user(r + cmap->start,
+ cmap->red, sizeof(u16)*cmap->len);
+ rc |= copy_from_user(g + cmap->start,
+ cmap->green, sizeof(u16)*cmap->len);
+ rc |= copy_from_user(b + cmap->start,
+ cmap->blue, sizeof(u16)*cmap->len);
+ if (rc)
+ return rc;
+
+ lut_config.lut_enable = 7;
+ lut_config.lut_sel = mdp3_session->lut_sel;
+ lut_config.lut_position = 0;
+ lut.color0_lut = r;
+ lut.color1_lut = g;
+ lut.color2_lut = b;
+
+ mutex_lock(&mdp3_session->lock);
+
+ if (!mdp3_session->status) {
+ pr_err("%s, display off!\n", __func__);
+ mutex_unlock(&mdp3_session->lock);
+ return -EPERM;
+ }
+
+ rc = mdp3_session->dma->config_lut(mdp3_session->dma, &lut_config,
+ &lut);
+ if (rc)
+ pr_err("mdp3_ctrl_lut_update failed\n");
+
+ mdp3_session->lut_sel = (mdp3_session->lut_sel + 1) % 2;
+
+ mutex_unlock(&mdp3_session->lock);
+ return rc;
+}
+
static int mdp3_ctrl_ioctl_handler(struct msm_fb_data_type *mfd,
u32 cmd, void __user *argp)
{
@@ -725,18 +1034,25 @@
struct msmfb_overlay_data ov_data;
int val;
- pr_debug("mdp3_ctrl_ioctl_handler\n");
-
mdp3_session = (struct mdp3_session_data *)mfd->mdp.private1;
if (!mdp3_session)
return -ENODEV;
if (!mdp3_session->status) {
pr_err("mdp3_ctrl_ioctl_handler, display off!\n");
- return -EINVAL;
+ return -EPERM;
}
switch (cmd) {
+ case MSMFB_MDP_PP:
+ rc = mdp3_pp_ioctl(mfd, argp);
+ break;
+ case MSMFB_HISTOGRAM_START:
+ case MSMFB_HISTOGRAM_STOP:
+ case MSMFB_HISTOGRAM:
+ rc = mdp3_histo_ioctl(mfd, cmd, argp);
+ break;
+
case MSMFB_VSYNC_CTRL:
case MSMFB_OVERLAY_VSYNC_CTRL:
if (!copy_from_user(&val, argp, sizeof(val))) {
@@ -815,6 +1131,7 @@
mdp3_interface->dma_fnc = mdp3_ctrl_pan_display;
mdp3_interface->ioctl_handler = mdp3_ctrl_ioctl_handler;
mdp3_interface->kickoff_fnc = mdp3_ctrl_display_commit_kickoff;
+ mdp3_interface->lut_update = mdp3_ctrl_lut_update;
mdp3_session = kmalloc(sizeof(struct mdp3_session_data), GFP_KERNEL);
if (!mdp3_session) {
@@ -823,8 +1140,8 @@
}
memset(mdp3_session, 0, sizeof(struct mdp3_session_data));
mutex_init(&mdp3_session->lock);
- init_completion(&mdp3_session->vsync_comp);
- spin_lock_init(&mdp3_session->vsync_lock);
+ INIT_WORK(&mdp3_session->vsync_work, mdp3_dispatch_vsync);
+ mutex_init(&mdp3_session->histo_lock);
mdp3_session->dma = mdp3_get_dma_pipe(MDP3_DMA_CAP_ALL);
if (!mdp3_session->dma) {
rc = -ENODEV;
@@ -838,12 +1155,19 @@
goto init_done;
}
+ mdp3_session->mfd = mfd;
mdp3_session->panel = dev_get_platdata(&mfd->pdev->dev);
mdp3_session->status = 0;
mdp3_session->overlay.id = MSMFB_NEW_REQUEST;
mdp3_bufq_init(&mdp3_session->bufq_in);
mdp3_bufq_init(&mdp3_session->bufq_out);
+ mdp3_session->histo_status = 0;
+ mdp3_session->lut_sel = 0;
+ init_timer(&mdp3_session->vsync_timer);
+ mdp3_session->vsync_timer.function = mdp3_vsync_timer_func;
+ mdp3_session->vsync_timer.data = (u32)mdp3_session;
+ mdp3_session->vsync_period = 1000 / mfd->panel_info->mipi.frame_rate;
mfd->mdp.private1 = mdp3_session;
rc = sysfs_create_group(&dev->kobj, &vsync_fs_attr_group);
diff --git a/drivers/video/msm/mdss/mdp3_ctrl.h b/drivers/video/msm/mdss/mdp3_ctrl.h
index fb3bd36..0bbc2ac 100644
--- a/drivers/video/msm/mdss/mdp3_ctrl.h
+++ b/drivers/video/msm/mdss/mdp3_ctrl.h
@@ -17,6 +17,7 @@
#include <linux/types.h>
#include <linux/mutex.h>
#include <linux/completion.h>
+#include <linux/timer.h>
#include "mdp3.h"
#include "mdp3_dma.h"
@@ -40,11 +41,15 @@
struct mdp3_intf *intf;
struct msm_fb_data_type *mfd;
ktime_t vsync_time;
- spinlock_t vsync_lock;
- struct completion vsync_comp;
+ struct timer_list vsync_timer;
+ int vsync_period;
struct mdp_overlay overlay;
struct mdp3_buffer_queue bufq_in;
struct mdp3_buffer_queue bufq_out;
+ struct work_struct vsync_work;
+ int histo_status;
+ struct mutex histo_lock;
+ int lut_sel;
};
int mdp3_ctrl_init(struct msm_fb_data_type *mfd);
diff --git a/drivers/video/msm/mdss/mdp3_dma.c b/drivers/video/msm/mdss/mdp3_dma.c
index 94ad9be..3b65405 100644
--- a/drivers/video/msm/mdss/mdp3_dma.c
+++ b/drivers/video/msm/mdss/mdp3_dma.c
@@ -19,6 +19,10 @@
#define DMA_STOP_POLL_SLEEP_US 1000
#define DMA_STOP_POLL_TIMEOUT_US 16000
+#define DMA_HISTO_RESET_TIMEOUT_MS 40
+#define DMA_LUT_CONFIG_MASK 0xfffffbe8
+#define DMA_CCS_CONFIG_MASK 0xfffffc17
+#define HIST_WAIT_TIMEOUT(frame) ((75 * HZ * (frame)) / 1000)
static void mdp3_vsync_intr_handler(int type, void *arg)
{
@@ -45,12 +49,47 @@
mdp3_irq_disable_nosync(type);
}
+static void mdp3_hist_done_intr_handler(int type, void *arg)
+{
+ struct mdp3_dma *dma = (struct mdp3_dma *)arg;
+ u32 isr, mask;
+
+ isr = MDP3_REG_READ(MDP3_REG_DMA_P_HIST_INTR_STATUS);
+ mask = MDP3_REG_READ(MDP3_REG_DMA_P_HIST_INTR_ENABLE);
+ MDP3_REG_WRITE(MDP3_REG_DMA_P_HIST_INTR_CLEAR, isr);
+
+ isr &= mask;
+ if (isr == 0)
+ return;
+
+ if (isr & MDP3_DMA_P_HIST_INTR_HIST_DONE_BIT) {
+ spin_lock(&dma->histo_lock);
+ dma->histo_state = MDP3_DMA_HISTO_STATE_READY;
+ complete(&dma->histo_comp);
+ spin_unlock(&dma->histo_lock);
+ }
+ if (isr & MDP3_DMA_P_HIST_INTR_RESET_DONE_BIT) {
+ spin_lock(&dma->histo_lock);
+ dma->histo_state = MDP3_DMA_HISTO_STATE_IDLE;
+ complete(&dma->histo_comp);
+ spin_unlock(&dma->histo_lock);
+ }
+}
+
void mdp3_dma_callback_enable(struct mdp3_dma *dma, int type)
{
int irq_bit;
pr_debug("mdp3_dma_callback_enable type=%d\n", type);
+ if (dma->dma_sel == MDP3_DMA_P) {
+ if (type & MDP3_DMA_CALLBACK_TYPE_HIST_RESET_DONE)
+ mdp3_irq_enable(MDP3_INTR_DMA_P_HISTO);
+
+ if (type & MDP3_DMA_CALLBACK_TYPE_HIST_DONE)
+ mdp3_irq_enable(MDP3_INTR_DMA_P_HISTO);
+ }
+
if (dma->output_config.out_sel == MDP3_DMA_OUTPUT_SEL_DSI_VIDEO ||
dma->output_config.out_sel == MDP3_DMA_OUTPUT_SEL_LCDC) {
if (type & MDP3_DMA_CALLBACK_TYPE_VSYNC)
@@ -79,6 +118,14 @@
pr_debug("mdp3_dma_callback_disable type=%d\n", type);
+ if (dma->dma_sel == MDP3_DMA_P) {
+ if (type & MDP3_DMA_CALLBACK_TYPE_HIST_RESET_DONE)
+ mdp3_irq_disable(MDP3_INTR_DMA_P_HISTO);
+
+ if (type & MDP3_DMA_CALLBACK_TYPE_HIST_DONE)
+ mdp3_irq_disable(MDP3_INTR_DMA_P_HISTO);
+ }
+
if (dma->output_config.out_sel == MDP3_DMA_OUTPUT_SEL_DSI_VIDEO ||
dma->output_config.out_sel == MDP3_DMA_OUTPUT_SEL_LCDC) {
if (type & MDP3_DMA_CALLBACK_TYPE_VSYNC)
@@ -101,7 +148,7 @@
static int mdp3_dma_callback_setup(struct mdp3_dma *dma)
{
- int rc;
+ int rc = 0;
struct mdp3_intr_cb vsync_cb = {
.cb = mdp3_vsync_intr_handler,
.data = dma,
@@ -112,14 +159,22 @@
.data = dma,
};
+ struct mdp3_intr_cb hist_cb = {
+ .cb = mdp3_hist_done_intr_handler,
+ .data = dma,
+ };
+
+ if (dma->dma_sel == MDP3_DMA_P)
+ rc = mdp3_set_intr_callback(MDP3_INTR_DMA_P_HISTO, &hist_cb);
+
if (dma->output_config.out_sel == MDP3_DMA_OUTPUT_SEL_DSI_VIDEO ||
dma->output_config.out_sel == MDP3_DMA_OUTPUT_SEL_LCDC)
- rc = mdp3_set_intr_callback(MDP3_INTR_LCDC_START_OF_FRAME,
+ rc |= mdp3_set_intr_callback(MDP3_INTR_LCDC_START_OF_FRAME,
&vsync_cb);
else if (dma->output_config.out_sel == MDP3_DMA_OUTPUT_SEL_DSI_CMD) {
int irq_bit = MDP3_INTR_SYNC_PRIMARY_LINE;
irq_bit += dma->dma_sel;
- rc = mdp3_set_intr_callback(irq_bit, &vsync_cb);
+ rc |= mdp3_set_intr_callback(irq_bit, &vsync_cb);
irq_bit = MDP3_INTR_DMA_P_DONE;
if (dma->dma_sel == MDP3_DMA_S)
irq_bit = MDP3_INTR_DMA_S_DONE;
@@ -128,6 +183,7 @@
pr_err("mdp3_dma_callback_setup not suppported interface\n");
rc = -ENODEV;
}
+
return rc;
}
@@ -163,6 +219,29 @@
}
}
+static int mdp3_dma_sync_config(struct mdp3_dma *dma,
+ struct mdp3_dma_source *source_config)
+{
+ u32 sync_config;
+ int dma_sel = dma->dma_sel;
+
+ pr_debug("mdp3_dma_sync_config\n");
+
+ if (dma->output_config.out_sel == MDP3_DMA_OUTPUT_SEL_DSI_CMD) {
+ sync_config = (source_config->height - 1) << 21;
+ sync_config |= source_config->vsync_count;
+ sync_config |= BIT(19);
+ sync_config |= BIT(20);
+
+ MDP3_REG_WRITE(MDP3_REG_SYNC_CONFIG_0 + dma_sel, sync_config);
+ MDP3_REG_WRITE(MDP3_REG_VSYNC_SEL, 0x024);
+ MDP3_REG_WRITE(MDP3_REG_PRIMARY_VSYNC_INIT_VAL + dma_sel, 0);
+ MDP3_REG_WRITE(MDP3_REG_SYNC_THRESH_0 + dma_sel, 0x00100000);
+ MDP3_REG_WRITE(MDP3_REG_PRIMARY_START_P0S + dma_sel, 0x0);
+ }
+ return 0;
+}
+
static int mdp3_dmap_config(struct mdp3_dma *dma,
struct mdp3_dma_source *source_config,
struct mdp3_dma_output_config *output_config)
@@ -197,6 +276,7 @@
dma->source_config = *source_config;
dma->output_config = *output_config;
+ mdp3_dma_sync_config(dma, source_config);
mdp3_dma_callback_setup(dma);
return 0;
@@ -231,6 +311,7 @@
dma->source_config = *source_config;
dma->output_config = *output_config;
+ mdp3_dma_sync_config(dma, source_config);
mdp3_dma_callback_setup(dma);
return 0;
@@ -266,24 +347,54 @@
return 0;
}
-static int mdp3_dmap_ccs_config(struct mdp3_dma *dma,
- struct mdp3_dma_color_correct_config *config,
- struct mdp3_dma_ccs *ccs,
+static int mdp3_dmap_lut_config(struct mdp3_dma *dma,
+ struct mdp3_dma_lut_config *config,
struct mdp3_dma_lut *lut)
{
+ u32 cc_config, addr, color;
int i;
- u32 addr, cc_config, color;
- cc_config = config->lut_enable;
- if (config->ccs_enable)
- cc_config |= BIT(3);
+ if (config->lut_enable && lut) {
+ addr = MDP3_REG_DMA_P_CSC_LUT1;
+ if (config->lut_sel)
+ addr = MDP3_REG_DMA_P_CSC_LUT2;
+
+ for (i = 0; i < MDP_LUT_SIZE; i++) {
+ color = lut->color0_lut[i] & 0xff;
+ color |= (lut->color1_lut[i] & 0xff) << 8;
+ color |= (lut->color2_lut[i] & 0xff) << 16;
+ MDP3_REG_WRITE(addr, color);
+ addr += 4;
+ }
+ }
+
+ cc_config = MDP3_REG_READ(MDP3_REG_DMA_P_COLOR_CORRECT_CONFIG);
+ cc_config &= DMA_LUT_CONFIG_MASK;
+ cc_config |= config->lut_enable;
cc_config |= config->lut_position << 4;
+ cc_config |= config->lut_sel << 10;
+ MDP3_REG_WRITE(MDP3_REG_DMA_P_COLOR_CORRECT_CONFIG, cc_config);
+ wmb();
+
+ dma->lut_config = *config;
+ return 0;
+}
+
+static int mdp3_dmap_ccs_config(struct mdp3_dma *dma,
+ struct mdp3_dma_color_correct_config *config,
+ struct mdp3_dma_ccs *ccs)
+{
+ int i;
+ u32 cc_config, addr;
+
+ cc_config = MDP3_REG_READ(MDP3_REG_DMA_P_COLOR_CORRECT_CONFIG);
+ cc_config &= DMA_CCS_CONFIG_MASK;
+ cc_config |= BIT(3);
cc_config |= config->ccs_sel << 5;
cc_config |= config->pre_bias_sel << 6;
cc_config |= config->post_bias_sel << 7;
cc_config |= config->pre_limit_sel << 8;
cc_config |= config->post_limit_sel << 9;
- cc_config |= config->lut_sel << 10;
MDP3_REG_WRITE(MDP3_REG_DMA_P_COLOR_CORRECT_CONFIG, cc_config);
@@ -369,30 +480,6 @@
}
}
- if (config->lut_enable && lut) {
- if (lut->color0_lut1 && lut->color1_lut1 && lut->color2_lut1) {
- addr = MDP3_REG_DMA_P_CSC_LUT1;
- for (i = 0; i < 256; i++) {
- color = lut->color0_lut1[i];
- color |= lut->color1_lut1[i] << 8;
- color |= lut->color2_lut1[i] << 16;
- MDP3_REG_WRITE(addr, color);
- addr += 4;
- }
- }
-
- if (lut->color0_lut2 && lut->color1_lut2 && lut->color2_lut2) {
- addr = MDP3_REG_DMA_P_CSC_LUT2;
- for (i = 0; i < 256; i++) {
- color = lut->color0_lut2[i];
- color |= lut->color1_lut2[i] << 8;
- color |= lut->color2_lut2[i] << 16;
- MDP3_REG_WRITE(addr, color);
- addr += 4;
- }
- }
- }
-
dma->ccs_config = *config;
return 0;
}
@@ -400,22 +487,33 @@
static int mdp3_dmap_histo_config(struct mdp3_dma *dma,
struct mdp3_dma_histogram_config *histo_config)
{
- u32 hist_bit_mask, hist_control;
+ unsigned long flag;
+ u32 histo_bit_mask, histo_control;
+ u32 histo_isr_mask = MDP3_DMA_P_HIST_INTR_HIST_DONE_BIT |
+ MDP3_DMA_P_HIST_INTR_RESET_DONE_BIT;
+
+ spin_lock_irqsave(&dma->histo_lock, flag);
if (histo_config->bit_mask_polarity)
- hist_bit_mask = BIT(31);
- hist_bit_mask |= histo_config->bit_mask;
+ histo_bit_mask = BIT(31);
+ histo_bit_mask |= histo_config->bit_mask;
if (histo_config->auto_clear_en)
- hist_control = BIT(0);
+ histo_control = BIT(0);
MDP3_REG_WRITE(MDP3_REG_DMA_P_HIST_FRAME_CNT,
histo_config->frame_count);
- MDP3_REG_WRITE(MDP3_REG_DMA_P_HIST_BIT_MASK, hist_bit_mask);
- MDP3_REG_WRITE(MDP3_REG_DMA_P_HIST_CONTROL, hist_control);
+ MDP3_REG_WRITE(MDP3_REG_DMA_P_HIST_BIT_MASK, histo_bit_mask);
+ MDP3_REG_WRITE(MDP3_REG_DMA_P_HIST_CONTROL, histo_control);
+ MDP3_REG_WRITE(MDP3_REG_DMA_P_HIST_INTR_ENABLE, histo_isr_mask);
+
+ spin_unlock_irqrestore(&dma->histo_lock, flag);
+
+ dma->histogram_config = *histo_config;
return 0;
}
-static int mdp3_dmap_update(struct mdp3_dma *dma, void *buf)
+static int mdp3_dmap_update(struct mdp3_dma *dma, void *buf,
+ struct mdp3_intf *intf)
{
unsigned long flag;
int cb_type = MDP3_DMA_CALLBACK_TYPE_VSYNC;
@@ -424,15 +522,20 @@
if (dma->output_config.out_sel == MDP3_DMA_OUTPUT_SEL_DSI_CMD) {
cb_type |= MDP3_DMA_CALLBACK_TYPE_DMA_DONE;
- wait_for_completion_killable(&dma->dma_comp);
+ if (intf->active)
+ wait_for_completion_killable(&dma->dma_comp);
}
-
spin_lock_irqsave(&dma->dma_lock, flag);
MDP3_REG_WRITE(MDP3_REG_DMA_P_IBUF_ADDR, (u32)buf);
dma->source_config.buf = buf;
if (dma->output_config.out_sel == MDP3_DMA_OUTPUT_SEL_DSI_CMD)
MDP3_REG_WRITE(MDP3_REG_DMA_P_START, 1);
+ if (!intf->active) {
+ pr_debug("mdp3_dmap_update start interface\n");
+ intf->start(intf);
+ }
+
wmb();
init_completion(&dma->vsync_comp);
spin_unlock_irqrestore(&dma->dma_lock, flag);
@@ -444,14 +547,16 @@
return 0;
}
-static int mdp3_dmas_update(struct mdp3_dma *dma, void *buf)
+static int mdp3_dmas_update(struct mdp3_dma *dma, void *buf,
+ struct mdp3_intf *intf)
{
unsigned long flag;
int cb_type = MDP3_DMA_CALLBACK_TYPE_VSYNC;
if (dma->output_config.out_sel == MDP3_DMA_OUTPUT_SEL_DSI_CMD) {
cb_type |= MDP3_DMA_CALLBACK_TYPE_DMA_DONE;
- wait_for_completion_killable(&dma->dma_comp);
+ if (intf->active)
+ wait_for_completion_killable(&dma->dma_comp);
}
spin_lock_irqsave(&dma->dma_lock, flag);
@@ -459,6 +564,12 @@
dma->source_config.buf = buf;
if (dma->output_config.out_sel == MDP3_DMA_OUTPUT_SEL_DSI_CMD)
MDP3_REG_WRITE(MDP3_REG_DMA_S_START, 1);
+
+ if (!intf->active) {
+ pr_debug("mdp3_dmap_update start interface\n");
+ intf->start(intf);
+ }
+
wmb();
init_completion(&dma->vsync_comp);
spin_unlock_irqrestore(&dma->dma_lock, flag);
@@ -479,78 +590,174 @@
return 0;
}
-static int mdp3_dmap_histo_get(struct mdp3_dma *dma,
- struct mdp3_dma_histogram_data *data)
+static int mdp3_dmap_histo_get(struct mdp3_dma *dma)
{
- int i;
- u32 addr, extra;
+ int i, state, timeout, ret;
+ u32 addr;
+ unsigned long flag;
+
+ spin_lock_irqsave(&dma->histo_lock, flag);
+ state = dma->histo_state;
+ spin_unlock_irqrestore(&dma->histo_lock, flag);
+
+ if (state != MDP3_DMA_HISTO_STATE_START &&
+ state != MDP3_DMA_HISTO_STATE_READY) {
+ pr_err("mdp3_dmap_histo_get invalid state %d\n", state);
+ return -EINVAL;
+ }
+
+ timeout = HIST_WAIT_TIMEOUT(dma->histogram_config.frame_count);
+ ret = wait_for_completion_killable_timeout(&dma->histo_comp, timeout);
+
+ if (ret == 0) {
+ pr_err("mdp3_dmap_histo_get time out\n");
+ ret = -ETIMEDOUT;
+ } else if (ret < 0) {
+ pr_err("mdp3_dmap_histo_get interrupted\n");
+ }
+
+ if (ret < 0)
+ return ret;
+
+ if (dma->histo_state != MDP3_DMA_HISTO_STATE_READY) {
+ pr_err("mdp3_dmap_histo_get after dma shut down\n");
+ return -EPERM;
+ }
addr = MDP3_REG_DMA_P_HIST_R_DATA;
- for (i = 0; i < 32; i++) {
- data->r_data[i] = MDP3_REG_READ(addr);
+ for (i = 0; i < MDP_HISTOGRAM_BIN_NUM; i++) {
+ dma->histo_data.r_data[i] = MDP3_REG_READ(addr);
addr += 4;
}
addr = MDP3_REG_DMA_P_HIST_G_DATA;
- for (i = 0; i < 32; i++) {
- data->g_data[i] = MDP3_REG_READ(addr);
+ for (i = 0; i < MDP_HISTOGRAM_BIN_NUM; i++) {
+ dma->histo_data.g_data[i] = MDP3_REG_READ(addr);
addr += 4;
}
addr = MDP3_REG_DMA_P_HIST_B_DATA;
- for (i = 0; i < 32; i++) {
- data->b_data[i] = MDP3_REG_READ(addr);
+ for (i = 0; i < MDP_HISTOGRAM_BIN_NUM; i++) {
+ dma->histo_data.b_data[i] = MDP3_REG_READ(addr);
addr += 4;
}
- extra = MDP3_REG_READ(MDP3_REG_DMA_P_HIST_EXTRA_INFO_0);
- data->r_min_value = (extra & 0x1F0000) >> 16;
- data->r_max_value = (extra & 0x1F000000) >> 24;
- extra = MDP3_REG_READ(MDP3_REG_DMA_P_HIST_EXTRA_INFO_1);
- data->g_min_value = extra & 0x1F;
- data->g_max_value = (extra & 0x1F00) >> 8;
- data->b_min_value = (extra & 0x1F0000) >> 16;
- data->b_max_value = (extra & 0x1F000000) >> 24;
+ dma->histo_data.extra[0] =
+ MDP3_REG_READ(MDP3_REG_DMA_P_HIST_EXTRA_INFO_0);
+ dma->histo_data.extra[1] =
+ MDP3_REG_READ(MDP3_REG_DMA_P_HIST_EXTRA_INFO_1);
+
+ spin_lock_irqsave(&dma->histo_lock, flag);
+ init_completion(&dma->histo_comp);
+ MDP3_REG_WRITE(MDP3_REG_DMA_P_HIST_START, 1);
+ wmb();
+ dma->histo_state = MDP3_DMA_HISTO_STATE_START;
+ spin_unlock_irqrestore(&dma->histo_lock, flag);
+
+ return 0;
+}
+
+static int mdp3_dmap_histo_start(struct mdp3_dma *dma)
+{
+ unsigned long flag;
+
+ if (dma->histo_state != MDP3_DMA_HISTO_STATE_IDLE)
+ return -EINVAL;
+
+ spin_lock_irqsave(&dma->histo_lock, flag);
+
+ init_completion(&dma->histo_comp);
+ MDP3_REG_WRITE(MDP3_REG_DMA_P_HIST_START, 1);
+ wmb();
+ dma->histo_state = MDP3_DMA_HISTO_STATE_START;
+
+ spin_unlock_irqrestore(&dma->histo_lock, flag);
+
+ mdp3_dma_callback_enable(dma, MDP3_DMA_CALLBACK_TYPE_HIST_DONE);
+ return 0;
+
+}
+
+static int mdp3_dmap_histo_reset(struct mdp3_dma *dma)
+{
+ unsigned long flag;
+ int ret;
+ u32 cgc;
+
+ if (dma->histo_state == MDP3_DMA_HISTO_STATE_START)
+ return -EINVAL;
+
+ spin_lock_irqsave(&dma->histo_lock, flag);
+
+ init_completion(&dma->histo_comp);
+ cgc = MDP3_REG_READ(MDP3_REG_CGC_EN);
+ cgc &= ~BIT(10);
+ MDP3_REG_WRITE(MDP3_REG_CGC_EN, cgc);
+
+ MDP3_REG_WRITE(MDP3_REG_DMA_P_HIST_INTR_ENABLE, BIT(0)|BIT(1));
+ MDP3_REG_WRITE(MDP3_REG_DMA_P_HIST_RESET_SEQ_START, 1);
+ wmb();
+ dma->histo_state = MDP3_DMA_HISTO_STATE_RESET;
+
+ spin_unlock_irqrestore(&dma->histo_lock, flag);
+
+ mdp3_dma_callback_enable(dma, MDP3_DMA_CALLBACK_TYPE_HIST_RESET_DONE);
+ ret = wait_for_completion_killable_timeout(&dma->histo_comp,
+ msecs_to_jiffies(DMA_HISTO_RESET_TIMEOUT_MS));
+
+ if (ret == 0) {
+ pr_err("mdp3_dmap_histo_reset time out\n");
+ ret = -ETIMEDOUT;
+ } else if (ret < 0) {
+ pr_err("mdp3_dmap_histo_reset interrupted\n");
+ } else {
+ ret = 0;
+ }
+ mdp3_dma_callback_disable(dma, MDP3_DMA_CALLBACK_TYPE_HIST_RESET_DONE);
+ cgc |= BIT(10);
+ MDP3_REG_WRITE(MDP3_REG_CGC_EN, cgc);
+
+ return ret;
+}
+
+static int mdp3_dmap_histo_stop(struct mdp3_dma *dma)
+{
+ unsigned long flag;
+ int cb_type = MDP3_DMA_CALLBACK_TYPE_HIST_RESET_DONE |
+ MDP3_DMA_CALLBACK_TYPE_HIST_DONE;
+
+ spin_lock_irqsave(&dma->histo_lock, flag);
+
+ MDP3_REG_WRITE(MDP3_REG_DMA_P_HIST_CANCEL_REQ, 1);
+ MDP3_REG_WRITE(MDP3_REG_DMA_P_HIST_INTR_ENABLE, 0);
+ wmb();
+ dma->histo_state = MDP3_DMA_HISTO_STATE_IDLE;
+
+ spin_unlock_irqrestore(&dma->histo_lock, flag);
+
+ mdp3_dma_callback_disable(dma, cb_type);
return 0;
}
static int mdp3_dmap_histo_op(struct mdp3_dma *dma, u32 op)
{
+ int ret;
+
switch (op) {
case MDP3_DMA_HISTO_OP_START:
- MDP3_REG_WRITE(MDP3_REG_DMA_P_HIST_START, 1);
+ ret = mdp3_dmap_histo_start(dma);
break;
case MDP3_DMA_HISTO_OP_STOP:
- MDP3_REG_WRITE(MDP3_REG_DMA_P_HIST_STOP_REQ, 1);
- break;
case MDP3_DMA_HISTO_OP_CANCEL:
- MDP3_REG_WRITE(MDP3_REG_DMA_P_HIST_CANCEL_REQ, 1);
+ ret = mdp3_dmap_histo_stop(dma);
break;
case MDP3_DMA_HISTO_OP_RESET:
- MDP3_REG_WRITE(MDP3_REG_DMA_P_HIST_RESET_SEQ_START, 1);
+ ret = mdp3_dmap_histo_reset(dma);
break;
default:
- return -EINVAL;
+ ret = -EINVAL;
}
- return 0;
-}
-
-static int mdp3_dmap_histo_intr_status(struct mdp3_dma *dma, int *status)
-{
- *status = MDP3_REG_READ(MDP3_REG_DMA_P_HIST_INTR_STATUS);
- return 0;
-}
-
-static int mdp3_dmap_histo_intr_enable(struct mdp3_dma *dma, u32 mask)
-{
- MDP3_REG_WRITE(MDP3_REG_DMA_P_HIST_INTR_ENABLE, mask);
- return 0;
-}
-
-static int mdp3_dmap_histo_intr_clear(struct mdp3_dma *dma, u32 mask)
-{
- MDP3_REG_WRITE(MDP3_REG_DMA_P_HIST_INTR_CLEAR, mask);
- return 0;
+ return ret;
}
static int mdp3_dma_start(struct mdp3_dma *dma, struct mdp3_intf *intf)
@@ -609,6 +816,7 @@
mdp3_dma_callback_disable(dma, MDP3_DMA_CALLBACK_TYPE_VSYNC |
MDP3_DMA_CALLBACK_TYPE_DMA_DONE);
+ init_completion(&dma->dma_comp);
return ret;
}
@@ -628,13 +836,11 @@
dma->config_cursor = mdp3_dmap_cursor_config;
dma->config_ccs = mdp3_dmap_ccs_config;
dma->config_histo = mdp3_dmap_histo_config;
+ dma->config_lut = mdp3_dmap_lut_config;
dma->update = mdp3_dmap_update;
dma->update_cursor = mdp3_dmap_cursor_update;
dma->get_histo = mdp3_dmap_histo_get;
dma->histo_op = mdp3_dmap_histo_op;
- dma->histo_intr_status = mdp3_dmap_histo_intr_status;
- dma->histo_intr_enable = mdp3_dmap_histo_intr_enable;
- dma->histo_intr_clear = mdp3_dmap_histo_intr_clear;
dma->vsync_enable = mdp3_dma_vsync_enable;
dma->start = mdp3_dma_start;
dma->stop = mdp3_dma_stop;
@@ -647,13 +853,11 @@
dma->config_cursor = NULL;
dma->config_ccs = NULL;
dma->config_histo = NULL;
+ dma->config_lut = NULL;
dma->update = mdp3_dmas_update;
dma->update_cursor = NULL;
dma->get_histo = NULL;
dma->histo_op = NULL;
- dma->histo_intr_status = NULL;
- dma->histo_intr_enable = NULL;
- dma->histo_intr_clear = NULL;
dma->vsync_enable = mdp3_dma_vsync_enable;
dma->start = mdp3_dma_start;
dma->stop = mdp3_dma_stop;
@@ -665,10 +869,13 @@
}
spin_lock_init(&dma->dma_lock);
+ spin_lock_init(&dma->histo_lock);
init_completion(&dma->vsync_comp);
init_completion(&dma->dma_comp);
+ init_completion(&dma->histo_comp);
dma->vsync_client.handler = NULL;
dma->vsync_client.arg = NULL;
+ dma->histo_state = MDP3_DMA_HISTO_STATE_IDLE;
memset(&dma->cursor, 0, sizeof(dma->cursor));
memset(&dma->ccs_config, 0, sizeof(dma->ccs_config));
diff --git a/drivers/video/msm/mdss/mdp3_dma.h b/drivers/video/msm/mdss/mdp3_dma.h
index f86bea9..518bd58 100644
--- a/drivers/video/msm/mdss/mdp3_dma.h
+++ b/drivers/video/msm/mdss/mdp3_dma.h
@@ -16,6 +16,9 @@
#include <linux/sched.h>
+#define MDP_HISTOGRAM_BIN_NUM 32
+#define MDP_LUT_SIZE 256
+
enum {
MDP3_DMA_P,
MDP3_DMA_S,
@@ -119,8 +122,18 @@
};
enum {
+ MDP3_DMA_HISTO_STATE_UNKNOWN,
+ MDP3_DMA_HISTO_STATE_IDLE,
+ MDP3_DMA_HISTO_STATE_RESET,
+ MDP3_DMA_HISTO_STATE_START,
+ MDP3_DMA_HISTO_STATE_READY,
+};
+
+enum {
MDP3_DMA_CALLBACK_TYPE_VSYNC = 0x01,
MDP3_DMA_CALLBACK_TYPE_DMA_DONE = 0x02,
+ MDP3_DMA_CALLBACK_TYPE_HIST_RESET_DONE = 0x04,
+ MDP3_DMA_CALLBACK_TYPE_HIST_DONE = 0x08,
};
struct mdp3_dma_source {
@@ -131,6 +144,7 @@
int y;
void *buf;
int stride;
+ int vsync_count;
};
struct mdp3_dma_output_config {
@@ -175,24 +189,24 @@
};
struct mdp3_dma_lut {
- uint8_t *color0_lut1;
- uint8_t *color1_lut1;
- uint8_t *color2_lut1;
- uint8_t *color0_lut2;
- uint8_t *color1_lut2;
- uint8_t *color2_lut2;
+ u16 *color0_lut;
+ u16 *color1_lut;
+ u16 *color2_lut;
+};
+
+struct mdp3_dma_lut_config {
+ int lut_enable;
+ u32 lut_sel;
+ u32 lut_position;
};
struct mdp3_dma_color_correct_config {
int ccs_enable;
- int lut_enable;
- u32 lut_sel;
u32 post_limit_sel;
u32 pre_limit_sel;
u32 post_bias_sel;
u32 pre_bias_sel;
u32 ccs_sel;
- u32 lut_position;
};
struct mdp3_dma_histogram_config {
@@ -203,15 +217,10 @@
};
struct mdp3_dma_histogram_data {
- uint8_t r_max_value;
- uint8_t r_min_value;
- uint8_t b_max_value;
- uint8_t b_min_value;
- uint8_t g_max_value;
- uint8_t g_min_value;
- uint8_t r_data[32];
- uint8_t g_data[32];
- uint8_t b_data[32];
+ u32 r_data[MDP_HISTOGRAM_BIN_NUM];
+ u32 g_data[MDP_HISTOGRAM_BIN_NUM];
+ u32 b_data[MDP_HISTOGRAM_BIN_NUM];
+ u32 extra[2];
};
struct mdp3_vsync_notification {
@@ -228,8 +237,10 @@
int available;
spinlock_t dma_lock;
+ spinlock_t histo_lock;
struct completion vsync_comp;
struct completion dma_comp;
+ struct completion histo_comp;
struct mdp3_vsync_notification vsync_client;
struct mdp3_dma_output_config output_config;
@@ -237,7 +248,10 @@
struct mdp3_dma_cursor cursor;
struct mdp3_dma_color_correct_config ccs_config;
+ struct mdp3_dma_lut_config lut_config;
struct mdp3_dma_histogram_config histogram_config;
+ int histo_state;
+ struct mdp3_dma_histogram_data histo_data;
int (*start)(struct mdp3_dma *dma, struct mdp3_intf *intf);
@@ -248,27 +262,22 @@
int (*config_ccs)(struct mdp3_dma *dma,
struct mdp3_dma_color_correct_config *config,
- struct mdp3_dma_ccs *ccs,
+ struct mdp3_dma_ccs *ccs);
+
+ int (*config_lut)(struct mdp3_dma *dma,
+ struct mdp3_dma_lut_config *config,
struct mdp3_dma_lut *lut);
- int (*update)(struct mdp3_dma *dma, void *buf);
+ int (*update)(struct mdp3_dma *dma, void *buf, struct mdp3_intf *intf);
int (*update_cursor)(struct mdp3_dma *dma, int x, int y);
- int (*get_histo)(struct mdp3_dma *dma,
- struct mdp3_dma_histogram_data *data);
+ int (*get_histo)(struct mdp3_dma *dma);
int (*config_histo)(struct mdp3_dma *dma,
struct mdp3_dma_histogram_config *histo_config);
- int (*histo_op)(struct mdp3_dma *dma,
- u32 op);
-
- int (*histo_intr_status)(struct mdp3_dma *dma, int *status);
-
- int (*histo_intr_enable)(struct mdp3_dma *dma, u32 mask);
-
- int (*histo_intr_clear)(struct mdp3_dma *dma, u32 mask);
+ int (*histo_op)(struct mdp3_dma *dma, u32 op);
void (*vsync_enable)(struct mdp3_dma *dma,
struct mdp3_vsync_notification *vsync_client);
diff --git a/drivers/video/msm/mdss/mdp3_hwio.h b/drivers/video/msm/mdss/mdp3_hwio.h
index 1c5bf46..4afa37c 100644
--- a/drivers/video/msm/mdss/mdp3_hwio.h
+++ b/drivers/video/msm/mdss/mdp3_hwio.h
@@ -27,6 +27,16 @@
#define MDP3_REG_SECONDARY_VSYNC_OUT_CTRL 0x031c
#define MDP3_REG_EXTERNAL_VSYNC_OUT_CTRL 0x0320
#define MDP3_REG_VSYNC_SEL 0x0324
+#define MDP3_REG_PRIMARY_VSYNC_INIT_VAL 0x0328
+#define MDP3_REG_SECONDARY_VSYNC_INIT_VAL 0x032c
+#define MDP3_REG_EXTERNAL_VSYNC_INIT_VAL 0x0330
+#define MDP3_REG_SYNC_THRESH_0 0x0200
+#define MDP3_REG_SYNC_THRESH_1 0x0204
+#define MDP3_REG_SYNC_THRESH_2 0x0208
+#define MDP3_REG_TEAR_CHECK_EN 0x020C
+#define MDP3_REG_PRIMARY_START_P0S 0x0210
+#define MDP3_REG_SECONDARY_START_POS 0x0214
+#define MDP3_REG_EXTERNAL_START_POS 0x0218
/*interrupt*/
#define MDP3_REG_INTR_ENABLE 0x0020
@@ -50,6 +60,9 @@
#define MDP3_REG_EBI2_LCD0 0x003c
#define MDP3_REG_EBI2_LCD0_YSTRIDE 0x0050
+/*clock control*/
+#define MDP3_REG_CGC_EN 0x0100
+
/*DMA_P*/
#define MDP3_REG_DMA_P_CONFIG 0x90000
#define MDP3_REG_DMA_P_SIZE 0x90004
diff --git a/drivers/video/msm/mdss/mdp3_ppp.c b/drivers/video/msm/mdss/mdp3_ppp.c
index af316d3..48ffb72 100644
--- a/drivers/video/msm/mdss/mdp3_ppp.c
+++ b/drivers/video/msm/mdss/mdp3_ppp.c
@@ -959,17 +959,20 @@
req = &req_q->req[idx];
if (copy_from_user(&req->req_list, p,
- sizeof(struct mdp_blit_req) * count))
+ sizeof(struct mdp_blit_req) * count)) {
+ mutex_unlock(&ppp_stat->req_mutex);
return -EFAULT;
+ }
rc = mdp3_ppp_handle_buf_sync(req, &req_list_header->sync);
if (rc < 0) {
pr_err("%s: Failed create sync point\n", __func__);
+ mutex_unlock(&ppp_stat->req_mutex);
return rc;
}
req->count = count;
- /* We need to grab ion handle while client thread */
+ /* We need to grab ion handle while running in client thread */
for (i = 0; i < count; i++) {
rc = mdp3_ppp_get_img(&req->req_list[i].src,
&req->req_list[i], &req->src_data[i]);
@@ -1032,6 +1035,7 @@
mdp3_put_img(&req->dst_data[i]);
}
mdp3_ppp_deinit_buf_sync(req);
+ mutex_unlock(&ppp_stat->req_mutex);
return rc;
}
diff --git a/drivers/video/msm/mdss/mdss.h b/drivers/video/msm/mdss/mdss.h
index 3bb4bdc..1311dab 100644
--- a/drivers/video/msm/mdss/mdss.h
+++ b/drivers/video/msm/mdss/mdss.h
@@ -120,6 +120,7 @@
struct early_suspend early_suspend;
void *debug_data;
+ int current_bus_idx;
};
extern struct mdss_data_type *mdss_res;
diff --git a/drivers/video/msm/mdss/mdss_dsi.c b/drivers/video/msm/mdss/mdss_dsi.c
index afabc20..366209b 100644
--- a/drivers/video/msm/mdss/mdss_dsi.c
+++ b/drivers/video/msm/mdss/mdss_dsi.c
@@ -417,7 +417,7 @@
mdss_dsi_clk_ctrl(ctrl_pdata, 0);
/* disable DSI phy */
- mdss_dsi_phy_enable(ctrl_pdata->ctrl_base, 0);
+ mdss_dsi_phy_enable(ctrl_pdata, 0);
mdss_dsi_disable_bus_clocks(ctrl_pdata);
diff --git a/drivers/video/msm/mdss/mdss_dsi.h b/drivers/video/msm/mdss/mdss_dsi.h
index f612751..965a23f 100644
--- a/drivers/video/msm/mdss/mdss_dsi.h
+++ b/drivers/video/msm/mdss/mdss_dsi.h
@@ -412,7 +412,7 @@
int mdss_dsi_enable_bus_clocks(struct mdss_dsi_ctrl_pdata *ctrl_pdata);
void mdss_dsi_disable_bus_clocks(struct mdss_dsi_ctrl_pdata *ctrl_pdata);
void mdss_dsi_panel_reset(struct mdss_panel_data *pdata, int enable);
-void mdss_dsi_phy_enable(unsigned char *ctrl_base, int on);
+void mdss_dsi_phy_enable(struct mdss_dsi_ctrl_pdata *ctrl, int on);
void mdss_dsi_phy_init(struct mdss_panel_data *pdata);
void mdss_dsi_phy_sw_reset(unsigned char *ctrl_base);
void mdss_dsi_cmd_test_pattern(struct mdss_panel_data *pdata);
diff --git a/drivers/video/msm/mdss/mdss_dsi_host.c b/drivers/video/msm/mdss/mdss_dsi_host.c
index 6b210af..60b8b2e 100644
--- a/drivers/video/msm/mdss/mdss_dsi_host.c
+++ b/drivers/video/msm/mdss/mdss_dsi_host.c
@@ -212,7 +212,7 @@
int mdss_dsi_buf_alloc(struct dsi_buf *dp, int size)
{
- dp->start = kmalloc(size, GFP_KERNEL);
+ dp->start = dma_alloc_writecombine(NULL, size, &dp->dmap, GFP_KERNEL);
if (dp->start == NULL) {
pr_err("%s:%u\n", __func__, __LINE__);
return -ENOMEM;
@@ -237,7 +237,7 @@
struct dsi_ctrl_hdr *dchdr;
char *bp;
u32 *hp;
- int i, len;
+ int i, len = 0;
dchdr = &cm->dchdr;
bp = mdss_dsi_buf_reserve_hdr(dp, DSI_HOST_HDR_SIZE);
@@ -268,8 +268,9 @@
*hp |= DSI_HDR_LAST;
mdss_dsi_buf_push(dp, DSI_HOST_HDR_SIZE);
+ len += DSI_HOST_HDR_SIZE;
- return dp->len;
+ return len;
}
/*
@@ -312,8 +313,7 @@
}
mdss_dsi_buf_push(dp, DSI_HOST_HDR_SIZE);
-
- return dp->len; /* 4 bytes */
+ return DSI_HOST_HDR_SIZE; /* 4 bytes */
}
/*
@@ -356,7 +356,7 @@
}
mdss_dsi_buf_push(dp, DSI_HOST_HDR_SIZE);
- return dp->len; /* 4 bytes */
+ return DSI_HOST_HDR_SIZE; /* 4 bytes */
}
/*
@@ -367,7 +367,7 @@
struct dsi_ctrl_hdr *dchdr;
char *bp;
u32 *hp;
- int i, len;
+ int i, len = 0;
dchdr = &cm->dchdr;
bp = mdss_dsi_buf_reserve_hdr(dp, DSI_HOST_HDR_SIZE);
@@ -402,7 +402,8 @@
mdss_dsi_buf_push(dp, DSI_HOST_HDR_SIZE);
- return dp->len;
+ len += DSI_HOST_HDR_SIZE;
+ return len;
}
/*
@@ -436,7 +437,7 @@
*hp |= DSI_HDR_DATA2(0);
mdss_dsi_buf_push(dp, DSI_HOST_HDR_SIZE);
- return dp->len;
+ return DSI_HOST_HDR_SIZE; /* 4 bytes */
}
/*
@@ -467,8 +468,7 @@
*hp |= DSI_HDR_DATA2(cm->payload[1]); /* parameter */
mdss_dsi_buf_push(dp, DSI_HOST_HDR_SIZE);
-
- return dp->len;
+ return DSI_HOST_HDR_SIZE; /* 4 bytes */
}
/*
* mipi dsi dcs read with 0 parameters
@@ -498,8 +498,7 @@
*hp |= DSI_HDR_DATA2(0);
mdss_dsi_buf_push(dp, DSI_HOST_HDR_SIZE);
-
- return dp->len; /* 4 bytes */
+ return DSI_HOST_HDR_SIZE; /* 4 bytes */
}
static int mdss_dsi_cm_on(struct dsi_buf *dp, struct dsi_cmd_desc *cm)
@@ -517,8 +516,7 @@
*hp |= DSI_HDR_LAST;
mdss_dsi_buf_push(dp, DSI_HOST_HDR_SIZE);
-
- return dp->len; /* 4 bytes */
+ return DSI_HOST_HDR_SIZE; /* 4 bytes */
}
static int mdss_dsi_cm_off(struct dsi_buf *dp, struct dsi_cmd_desc *cm)
@@ -536,8 +534,7 @@
*hp |= DSI_HDR_LAST;
mdss_dsi_buf_push(dp, DSI_HOST_HDR_SIZE);
-
- return dp->len; /* 4 bytes */
+ return DSI_HOST_HDR_SIZE; /* 4 bytes */
}
static int mdss_dsi_peripheral_on(struct dsi_buf *dp, struct dsi_cmd_desc *cm)
@@ -555,8 +552,7 @@
*hp |= DSI_HDR_LAST;
mdss_dsi_buf_push(dp, DSI_HOST_HDR_SIZE);
-
- return dp->len; /* 4 bytes */
+ return DSI_HOST_HDR_SIZE; /* 4 bytes */
}
static int mdss_dsi_peripheral_off(struct dsi_buf *dp, struct dsi_cmd_desc *cm)
@@ -574,8 +570,7 @@
*hp |= DSI_HDR_LAST;
mdss_dsi_buf_push(dp, DSI_HOST_HDR_SIZE);
-
- return dp->len; /* 4 bytes */
+ return DSI_HOST_HDR_SIZE; /* 4 bytes */
}
static int mdss_dsi_set_max_pktsize(struct dsi_buf *dp, struct dsi_cmd_desc *cm)
@@ -601,8 +596,7 @@
*hp |= DSI_HDR_DATA2(cm->payload[1]);
mdss_dsi_buf_push(dp, DSI_HOST_HDR_SIZE);
-
- return dp->len; /* 4 bytes */
+ return DSI_HOST_HDR_SIZE; /* 4 bytes */
}
static int mdss_dsi_null_pkt(struct dsi_buf *dp, struct dsi_cmd_desc *cm)
@@ -622,8 +616,7 @@
*hp |= DSI_HDR_LAST;
mdss_dsi_buf_push(dp, DSI_HOST_HDR_SIZE);
-
- return dp->len; /* 4 bytes */
+ return DSI_HOST_HDR_SIZE; /* 4 bytes */
}
static int mdss_dsi_blank_pkt(struct dsi_buf *dp, struct dsi_cmd_desc *cm)
@@ -643,8 +636,7 @@
*hp |= DSI_HDR_LAST;
mdss_dsi_buf_push(dp, DSI_HOST_HDR_SIZE);
-
- return dp->len; /* 4 bytes */
+ return DSI_HOST_HDR_SIZE; /* 4 bytes */
}
/*
@@ -1134,12 +1126,44 @@
return 4;
}
-
static int mdss_dsi_cmd_dma_tx(struct mdss_dsi_ctrl_pdata *ctrl,
struct dsi_buf *tp);
static int mdss_dsi_cmd_dma_rx(struct mdss_dsi_ctrl_pdata *ctrl,
struct dsi_buf *rp, int rlen);
+
+static int mdss_dsi_cmds2buf_tx(struct mdss_dsi_ctrl_pdata *ctrl,
+ struct dsi_cmd_desc *cmds, int cnt)
+{
+ struct dsi_buf *tp;
+ struct dsi_cmd_desc *cm;
+ struct dsi_ctrl_hdr *dchdr;
+ int len, tot = 0;
+
+ tp = &ctrl->tx_buf;
+ mdss_dsi_buf_init(tp);
+ cm = cmds;
+ len = 0;
+ while (cnt--) {
+ dchdr = &cm->dchdr;
+ mdss_dsi_buf_reserve(tp, len);
+ len = mdss_dsi_cmd_dma_add(tp, cm);
+ tot += len;
+ if (dchdr->last) {
+ tp->data = tp->start; /* begin of buf */
+ mdss_dsi_enable_irq(ctrl, DSI_CMD_TERM);
+ mdss_dsi_cmd_dma_tx(ctrl, tp);
+ if (dchdr->wait)
+ usleep(dchdr->wait * 1000);
+
+ mdss_dsi_buf_init(tp);
+ len = 0;
+ }
+ cm++;
+ }
+ return tot;
+}
+
/*
* mdss_dsi_cmds_tx:
* thread context only
@@ -1147,11 +1171,8 @@
int mdss_dsi_cmds_tx(struct mdss_dsi_ctrl_pdata *ctrl,
struct dsi_cmd_desc *cmds, int cnt)
{
- struct dsi_buf *tp;
- struct dsi_cmd_desc *cm;
- struct dsi_ctrl_hdr *dchdr;
u32 dsi_ctrl, data;
- int i, video_mode;
+ int video_mode;
if (ctrl->shared_pdata.broadcast_enable) {
if (ctrl->ndx == DSI_CTRL_0) {
@@ -1187,18 +1208,7 @@
MIPI_OUTP((ctrl->ctrl_base) + 0x0004, data);
}
- tp = &ctrl->tx_buf;
- cm = cmds;
- for (i = 0; i < cnt; i++) {
- mdss_dsi_enable_irq(ctrl, DSI_CMD_TERM);
- mdss_dsi_buf_init(tp);
- mdss_dsi_cmd_dma_add(tp, cm);
- mdss_dsi_cmd_dma_tx(ctrl, tp);
- dchdr = &cm->dchdr;
- if (dchdr->wait)
- usleep(dchdr->wait * 1000);
- cm++;
- }
+ mdss_dsi_cmds2buf_tx(ctrl, cmds, cnt);
if (video_mode)
MIPI_OUTP((ctrl->ctrl_base) + 0x0004,
@@ -1350,11 +1360,6 @@
len = ALIGN(tp->len, 4);
size = ALIGN(tp->len, SZ_4K);
- tp->dmap = dma_map_single(&dsi_dev, tp->data, size, DMA_TO_DEVICE);
- if (dma_mapping_error(&dsi_dev, tp->dmap)) {
- pr_err("%s: dmap mapp failed\n", __func__);
- return -ENOMEM;
- }
if (is_mdss_iommu_attached()) {
int ret = msm_iommu_map_contig_buffer(tp->dmap,
@@ -1399,8 +1404,6 @@
msm_iommu_unmap_contig_buffer(addr,
mdss_get_iommu_domain(domain), 0, size);
- dma_unmap_single(&dsi_dev, tp->dmap, size, DMA_TO_DEVICE);
- tp->dmap = 0;
return tp->len;
}
@@ -1438,6 +1441,13 @@
void mdss_dsi_wait4video_done(struct mdss_dsi_ctrl_pdata *ctrl)
{
unsigned long flag;
+ u32 data;
+
+ /* DSI_INTL_CTRL */
+ data = MIPI_INP((ctrl->ctrl_base) + 0x0110);
+ data |= DSI_INTR_VIDEO_DONE_MASK;
+
+ MIPI_OUTP((ctrl->ctrl_base) + 0x0110, data);
spin_lock_irqsave(&ctrl->mdp_lock, flag);
INIT_COMPLETION(ctrl->video_comp);
@@ -1446,6 +1456,10 @@
wait_for_completion_timeout(&ctrl->video_comp,
msecs_to_jiffies(VSYNC_PERIOD * 4));
+
+ data = MIPI_INP((ctrl->ctrl_base) + 0x0110);
+ data &= ~DSI_INTR_VIDEO_DONE_MASK;
+ MIPI_OUTP((ctrl->ctrl_base) + 0x0110, data);
}
static void mdss_dsi_wait4video_eng_busy(struct mdss_dsi_ctrl_pdata *ctrl)
@@ -1624,7 +1638,7 @@
if (status) {
MIPI_OUTP(base + 0x0068, status);
- pr_debug("%s: status=%x\n", __func__, status);
+ pr_err("%s: status=%x\n", __func__, status);
}
}
@@ -1635,7 +1649,7 @@
status = MIPI_INP(base + 0x00c0);/* DSI_TIMEOUT_STATUS */
if (status & 0x0111) {
MIPI_OUTP(base + 0x00c0, status);
- pr_debug("%s: status=%x\n", __func__, status);
+ pr_err("%s: status=%x\n", __func__, status);
}
}
@@ -1647,7 +1661,7 @@
if (status & 0x011111) {
MIPI_OUTP(base + 0x00b4, status);
- pr_debug("%s: status=%x\n", __func__, status);
+ pr_err("%s: status=%x\n", __func__, status);
}
}
@@ -1659,7 +1673,7 @@
if (status & 0x44444489) {
MIPI_OUTP(base + 0x000c, status);
- pr_debug("%s: status=%x\n", __func__, status);
+ pr_err("%s: status=%x\n", __func__, status);
}
}
@@ -1671,7 +1685,7 @@
if (status & 0x80000000) {
MIPI_OUTP(base + 0x0008, status);
- pr_debug("%s: status=%x\n", __func__, status);
+ pr_err("%s: status=%x\n", __func__, status);
}
}
diff --git a/drivers/video/msm/mdss/mdss_fb.c b/drivers/video/msm/mdss/mdss_fb.c
index 61fb41c..d9fffa8 100644
--- a/drivers/video/msm/mdss/mdss_fb.c
+++ b/drivers/video/msm/mdss/mdss_fb.c
@@ -96,13 +96,14 @@
struct msm_fb_data_type *mfd = (struct msm_fb_data_type *)data;
if (!mfd)
pr_err("%s mfd NULL\n", __func__);
+ mfd->no_update.value = NOTIFY_TYPE_NO_UPDATE;
complete(&mfd->no_update.comp);
}
static int mdss_fb_notify_update(struct msm_fb_data_type *mfd,
unsigned long *argp)
{
- int ret, notify;
+ int ret, notify, to_user;
ret = copy_from_user(¬ify, argp, sizeof(int));
if (ret) {
@@ -117,14 +118,18 @@
INIT_COMPLETION(mfd->update.comp);
ret = wait_for_completion_interruptible_timeout(
&mfd->update.comp, 4 * HZ);
+ to_user = mfd->update.value;
} else {
INIT_COMPLETION(mfd->no_update.comp);
ret = wait_for_completion_interruptible_timeout(
&mfd->no_update.comp, 4 * HZ);
+ to_user = mfd->no_update.value;
}
if (ret == 0)
ret = -ETIMEDOUT;
- return (ret > 0) ? 0 : ret;
+ else if (ret > 0)
+ ret = copy_to_user(argp, &to_user, sizeof(int));
+ return ret;
}
static int lcd_backlight_registered;
@@ -140,15 +145,18 @@
/* This maps android backlight level 0 to 255 into
driver backlight level 0 to bl_max with rounding */
- bl_lvl = (2 * value * mfd->panel_info->bl_max +
- MDSS_MAX_BL_BRIGHTNESS) / (2 * MDSS_MAX_BL_BRIGHTNESS);
+ MDSS_BRIGHT_TO_BL(bl_lvl, value, mfd->panel_info->bl_max,
+ MDSS_MAX_BL_BRIGHTNESS);
if (!bl_lvl && value)
bl_lvl = 1;
- mutex_lock(&mfd->bl_lock);
- mdss_fb_set_backlight(mfd, bl_lvl);
- mutex_unlock(&mfd->bl_lock);
+ if (!IS_CALIB_MODE_BL(mfd) && (!mfd->ext_bl_ctrl || !value ||
+ !mfd->bl_level)) {
+ mutex_lock(&mfd->bl_lock);
+ mdss_fb_set_backlight(mfd, bl_lvl);
+ mutex_unlock(&mfd->bl_lock);
+ }
}
static struct led_classdev backlight_led = {
@@ -534,7 +542,7 @@
struct mdss_panel_data *pdata;
u32 temp = bkl_lvl;
- if (!mfd->panel_power_on || !bl_updated) {
+ if ((!mfd->panel_power_on || !bl_updated) && !IS_CALIB_MODE_BL(mfd)) {
unset_bl_level = bkl_lvl;
return;
} else {
@@ -544,7 +552,8 @@
pdata = dev_get_platdata(&mfd->pdev->dev);
if ((pdata) && (pdata->set_backlight)) {
- mdss_fb_scale_bl(mfd, &temp);
+ if (!IS_CALIB_MODE_BL(mfd))
+ mdss_fb_scale_bl(mfd, &temp);
/*
* Even though backlight has been scaled, want to show that
* backlight has been set to bkl_lvl to those that read from
@@ -602,6 +611,9 @@
ret = mfd->mdp.on_fnc(mfd);
if (ret == 0)
mfd->panel_power_on = true;
+ mutex_lock(&mfd->update.lock);
+ mfd->update.type = NOTIFY_TYPE_UPDATE;
+ mutex_unlock(&mfd->update.lock);
}
break;
@@ -613,13 +625,20 @@
if (mfd->panel_power_on && mfd->mdp.off_fnc) {
int curr_pwr_state;
+ mutex_lock(&mfd->update.lock);
+ mfd->update.type = NOTIFY_TYPE_SUSPEND;
+ mutex_unlock(&mfd->update.lock);
del_timer(&mfd->no_update.timer);
+ mfd->no_update.value = NOTIFY_TYPE_SUSPEND;
complete(&mfd->no_update.comp);
mfd->op_enable = false;
curr_pwr_state = mfd->panel_power_on;
+ mutex_lock(&mfd->bl_lock);
+ mdss_fb_set_backlight(mfd, 0);
mfd->panel_power_on = false;
bl_updated = 0;
+ mutex_unlock(&mfd->bl_lock);
ret = mfd->mdp.off_fnc(mfd);
if (ret)
@@ -964,6 +983,7 @@
mfd->op_enable = true;
+ mutex_init(&mfd->update.lock);
mutex_init(&mfd->no_update.lock);
mutex_init(&mfd->sync_mutex);
init_timer(&mfd->no_update.timer);
diff --git a/drivers/video/msm/mdss/mdss_fb.h b/drivers/video/msm/mdss/mdss_fb.h
index 31e4d86..98bca03 100644
--- a/drivers/video/msm/mdss/mdss_fb.h
+++ b/drivers/video/msm/mdss/mdss_fb.h
@@ -50,6 +50,7 @@
struct timer_list timer;
struct completion comp;
struct mutex lock;
+ int value;
};
struct msm_fb_data_type;
@@ -74,6 +75,12 @@
void *private1;
};
+#define IS_CALIB_MODE_BL(mfd) (((mfd)->calib_mode) & MDSS_CALIB_MODE_BL)
+#define MDSS_BRIGHT_TO_BL(out, v, bl_max, max_bright) do {\
+ out = (2 * (v) * (bl_max) + max_bright)\
+ / (2 * max_bright);\
+ } while (0)
+
struct msm_fb_data_type {
u32 key;
u32 index;
@@ -101,6 +108,8 @@
unsigned long cursor_buf_phys;
unsigned long cursor_buf_iova;
+ u32 ext_bl_ctrl;
+ u32 calib_mode;
u32 bl_level;
u32 bl_scale;
u32 bl_min_lvl;
@@ -141,6 +150,25 @@
struct mdp_display_commit disp_commit;
};
+static inline void mdss_fb_update_notify_update(struct msm_fb_data_type *mfd)
+{
+ int needs_complete = 0;
+ mutex_lock(&mfd->update.lock);
+ mfd->update.value = mfd->update.type;
+ needs_complete = mfd->update.value == NOTIFY_TYPE_UPDATE;
+ mutex_unlock(&mfd->update.lock);
+ if (needs_complete) {
+ complete(&mfd->update.comp);
+ mutex_lock(&mfd->no_update.lock);
+ if (mfd->no_update.timer.function)
+ del_timer(&(mfd->no_update.timer));
+
+ mfd->no_update.timer.expires = jiffies + (2 * HZ);
+ add_timer(&mfd->no_update.timer);
+ mutex_unlock(&mfd->no_update.lock);
+ }
+}
+
int mdss_fb_get_phys_info(unsigned long *start, unsigned long *len, int fb_num);
void mdss_fb_set_backlight(struct msm_fb_data_type *mfd, u32 bkl_lvl);
void mdss_fb_update_backlight(struct msm_fb_data_type *mfd);
diff --git a/drivers/video/msm/mdss/mdss_mdp.c b/drivers/video/msm/mdss/mdss_mdp.c
index d8ca555..c4bf67e 100644
--- a/drivers/video/msm/mdss/mdss_mdp.c
+++ b/drivers/video/msm/mdss/mdss_mdp.c
@@ -345,7 +345,6 @@
int mdss_mdp_bus_scale_set_quota(u64 ab_quota, u64 ib_quota)
{
- static int current_bus_idx;
int bus_idx;
if (mdss_res->bus_hdl < 1) {
@@ -359,9 +358,10 @@
int num_cases = mdp_bus_scale_table.num_usecases;
struct msm_bus_vectors *vect = NULL;
- bus_idx = (current_bus_idx % (num_cases - 1)) + 1;
+ bus_idx = (mdss_res->current_bus_idx % (num_cases - 1)) + 1;
- vect = mdp_bus_scale_table.usecase[current_bus_idx].vectors;
+ vect = mdp_bus_scale_table.usecase[mdss_res->current_bus_idx].
+ vectors;
/* avoid performing updates for small changes */
if ((ALIGN(ab_quota, SZ_64M) == ALIGN(vect->ab, SZ_64M)) &&
@@ -377,7 +377,7 @@
pr_debug("bus scale idx=%d ab=%llu ib=%llu\n", bus_idx,
vect->ab, vect->ib);
}
- current_bus_idx = bus_idx;
+ mdss_res->current_bus_idx = bus_idx;
return msm_bus_scale_client_update_request(mdss_res->bus_hdl, bus_idx);
}
@@ -626,8 +626,14 @@
if (mdata->vsync_ena)
mdss_mdp_clk_update(MDSS_CLK_MDP_VSYNC, enable);
- if (!enable)
+ if (!enable) {
+ msm_bus_scale_client_update_request(
+ mdss_res->bus_hdl, 0);
pm_runtime_put(&mdata->pdev->dev);
+ } else {
+ msm_bus_scale_client_update_request(
+ mdss_res->bus_hdl, mdss_res->current_bus_idx);
+ }
}
mutex_unlock(&mdp_clk_lock);
diff --git a/drivers/video/msm/mdss/mdss_mdp.h b/drivers/video/msm/mdss/mdss_mdp.h
index d9ec19b..52224e2 100644
--- a/drivers/video/msm/mdss/mdss_mdp.h
+++ b/drivers/video/msm/mdss/mdss_mdp.h
@@ -45,6 +45,9 @@
#define C1_B_Cb 1 /* B/Cb */
#define C0_G_Y 0 /* G/luma */
+/* wait for at most 2 vsync for lowest refresh rate (24hz) */
+#define KOFF_TIMEOUT msecs_to_jiffies(84)
+
#ifdef MDSS_MDP_DEBUG_REG
static inline void mdss_mdp_reg_write(u32 addr, u32 val)
{
@@ -309,6 +312,8 @@
u8 vert_deci;
struct mdss_mdp_img_rect src;
struct mdss_mdp_img_rect dst;
+ u32 phase_step_x;
+ u32 phase_step_y;
struct mdss_mdp_format_params *src_fmt;
struct mdss_mdp_plane_sizes src_planes;
@@ -347,8 +352,6 @@
struct mdss_overlay_private {
int vsync_pending;
ktime_t vsync_time;
- struct completion vsync_comp;
- spinlock_t vsync_lock;
int borderfill_enable;
int overlay_play_enable;
int hw_refresh;
@@ -361,9 +364,16 @@
struct list_head overlay_list;
struct list_head pipes_used;
struct list_head pipes_cleanup;
+ struct work_struct vsync_work;
bool mixer_swap;
};
+struct mdss_mdp_perf_params {
+ u32 ib_quota;
+ u32 ab_quota;
+ u32 mdp_clk_rate;
+};
+
#define is_vig_pipe(_pipe_id_) ((_pipe_id_) <= MDSS_MDP_SSPP_VIG2)
static inline void mdss_mdp_ctl_write(struct mdss_mdp_ctl *ctl,
u32 reg, u32 val)
@@ -430,6 +440,8 @@
int mdss_mdp_ctl_start(struct mdss_mdp_ctl *ctl);
int mdss_mdp_ctl_stop(struct mdss_mdp_ctl *ctl);
int mdss_mdp_ctl_intf_event(struct mdss_mdp_ctl *ctl, int event, void *arg);
+int mdss_mdp_perf_calc_pipe(struct mdss_mdp_pipe *pipe,
+ struct mdss_mdp_perf_params *perf);
struct mdss_mdp_mixer *mdss_mdp_wb_mixer_alloc(int rotator);
int mdss_mdp_wb_mixer_destroy(struct mdss_mdp_mixer *mixer);
@@ -496,6 +508,8 @@
int mdss_mdp_ad_input(struct msm_fb_data_type *mfd,
struct mdss_ad_input *input, int wait);
int mdss_mdp_ad_addr_setup(struct mdss_data_type *mdata, u32 *ad_off);
+int mdss_mdp_calib_mode(struct msm_fb_data_type *mfd,
+ struct mdss_calib_cfg *cfg);
struct mdss_mdp_pipe *mdss_mdp_pipe_alloc(struct mdss_mdp_mixer *mixer,
u32 type);
@@ -533,6 +547,7 @@
int mdss_mdp_put_img(struct mdss_mdp_img_data *data);
int mdss_mdp_get_img(struct msmfb_data *img, struct mdss_mdp_img_data *data);
u32 mdss_get_panel_framerate(struct msm_fb_data_type *mfd);
+int mdss_mdp_calc_phase_step(u32 src, u32 dst, u32 *out_phase);
int mdss_mdp_wb_kickoff(struct msm_fb_data_type *mfd);
int mdss_mdp_wb_ioctl_handler(struct msm_fb_data_type *mfd, u32 cmd, void *arg);
@@ -544,6 +559,8 @@
int mdss_mdp_limited_lut_igc_config(struct mdss_mdp_ctl *ctl);
int mdss_mdp_calib_config(struct mdp_calib_config_data *cfg, u32 *copyback);
+int mdss_mdp_pipe_is_staged(struct mdss_mdp_pipe *pipe);
+
#define mfd_to_mdp5_data(mfd) (mfd->mdp.private1)
#define mfd_to_mdata(mfd) (((struct mdss_overlay_private *)\
(mfd->mdp.private1))->mdata)
diff --git a/drivers/video/msm/mdss/mdss_mdp_ctl.c b/drivers/video/msm/mdss/mdss_mdp_ctl.c
index 1cd2dbd..9eaff61 100644
--- a/drivers/video/msm/mdss/mdss_mdp_ctl.c
+++ b/drivers/video/msm/mdss/mdss_mdp_ctl.c
@@ -41,6 +41,7 @@
static DEFINE_MUTEX(mdss_mdp_ctl_lock);
static int mdss_mdp_mixer_free(struct mdss_mdp_mixer *mixer);
+static inline int __mdss_mdp_ctl_get_mixer_off(struct mdss_mdp_mixer *mixer);
static inline void mdp_mixer_write(struct mdss_mdp_mixer *mixer,
u32 reg, u32 val)
@@ -98,13 +99,80 @@
return 0;
}
+/**
+ * mdss_mdp_perf_calc_pipe() - calculate performance numbers required by pipe
+ * @pipe: Source pipe struct containing updated pipe params
+ * @perf: Structure containing values that should be updated for
+ * performance tuning
+ *
+ * Function calculates the minimum required performance calculations in order
+ * to avoid MDP underflow. The calculations are based on the way MDP
+ * fetches (bandwidth requirement) and processes data through MDP pipeline
+ * (MDP clock requirement) based on frame size and scaling requirements.
+ */
+int mdss_mdp_perf_calc_pipe(struct mdss_mdp_pipe *pipe,
+ struct mdss_mdp_perf_params *perf)
+{
+ struct mdss_mdp_mixer *mixer;
+ int fps = DEFAULT_FRAME_RATE;
+ u32 quota, rate, v_total, src_h;
+
+ if (!pipe || !perf || !pipe->mixer)
+ return -EINVAL;
+
+ mixer = pipe->mixer;
+ if (mixer->rotator_mode) {
+ v_total = pipe->flags & MDP_ROT_90 ? pipe->dst.w : pipe->dst.h;
+ } else if (mixer->type == MDSS_MDP_MIXER_TYPE_INTF) {
+ struct mdss_panel_info *pinfo;
+
+ pinfo = &mixer->ctl->panel_data->panel_info;
+ fps = mdss_panel_get_framerate(pinfo);
+ v_total = mdss_panel_get_vtotal(pinfo);
+ } else {
+ v_total = mixer->height;
+ }
+
+ /*
+ * when doing vertical decimation lines will be skipped, hence there is
+ * no need to account for these lines in MDP clock or request bus
+ * bandwidth to fetch them.
+ */
+ src_h = pipe->src.h >> pipe->vert_deci;
+
+ quota = fps * pipe->src.w * src_h;
+ if (pipe->src_fmt->chroma_sample == MDSS_MDP_CHROMA_420)
+ quota = (quota * 3) / 2;
+ else
+ quota *= pipe->src_fmt->bpp;
+
+ rate = pipe->dst.w;
+ if (src_h > pipe->dst.h)
+ rate = (rate * src_h) / pipe->dst.h;
+
+ rate *= v_total * fps;
+ if (mixer->rotator_mode) {
+ rate /= 4; /* block mode fetch at 4 pix/clk */
+ quota *= 2; /* bus read + write */
+ perf->ib_quota = quota;
+ } else {
+ perf->ib_quota = (quota / pipe->dst.h) * v_total;
+ }
+ perf->ab_quota = quota;
+ perf->mdp_clk_rate = rate;
+
+ pr_debug("mixer=%d pnum=%d clk_rate=%u bus ab=%u ib=%u\n",
+ mixer->num, pipe->num, rate, perf->ab_quota, perf->ib_quota);
+
+ return 0;
+}
+
static void mdss_mdp_perf_mixer_update(struct mdss_mdp_mixer *mixer,
u32 *bus_ab_quota, u32 *bus_ib_quota,
u32 *clk_rate)
{
struct mdss_mdp_pipe *pipe;
- const int fps = 60;
- u32 quota, rate;
+ int fps = DEFAULT_FRAME_RATE;
u32 v_total;
int i;
u32 max_clk_rate = 0, ab_total = 0, ib_total = 0;
@@ -113,17 +181,13 @@
*bus_ib_quota = 0;
*clk_rate = 0;
- if (mixer->rotator_mode) {
- pipe = mixer->stage_pipe[0]; /* rotator pipe */
- v_total = pipe->flags & MDP_ROT_90 ? pipe->dst.w : pipe->dst.h;
- } else {
+ if (!mixer->rotator_mode) {
int is_writeback = false;
if (mixer->type == MDSS_MDP_MIXER_TYPE_INTF) {
struct mdss_panel_info *pinfo;
pinfo = &mixer->ctl->panel_data->panel_info;
- v_total = (pinfo->yres + pinfo->lcdc.v_back_porch +
- pinfo->lcdc.v_front_porch +
- pinfo->lcdc.v_pulse_width);
+ fps = mdss_panel_get_framerate(pinfo);
+ v_total = mdss_panel_get_vtotal(pinfo);
if (pinfo->type == WRITEBACK_PANEL)
is_writeback = true;
@@ -142,7 +206,7 @@
}
for (i = 0; i < MDSS_MDP_MAX_STAGE; i++) {
- u32 ib_quota;
+ struct mdss_mdp_perf_params perf;
pipe = mixer->stage_pipe[i];
if (pipe == NULL)
continue;
@@ -152,33 +216,13 @@
max_clk_rate = 0;
}
- quota = fps * pipe->src.w * pipe->src.h;
- if (pipe->src_fmt->chroma_sample == MDSS_MDP_CHROMA_420)
- quota = (quota * 3) / 2;
- else
- quota *= pipe->src_fmt->bpp;
+ if (mdss_mdp_perf_calc_pipe(pipe, &perf))
+ continue;
- rate = pipe->dst.w;
- if (pipe->src.h > pipe->dst.h)
- rate = (rate * pipe->src.h) / pipe->dst.h;
-
- rate *= v_total * fps;
- if (mixer->rotator_mode) {
- rate /= 4; /* block mode fetch at 4 pix/clk */
- quota *= 2; /* bus read + write */
- ib_quota = quota;
- } else {
- ib_quota = (quota / pipe->dst.h) * v_total;
- }
-
-
- pr_debug("mixer=%d pnum=%d clk_rate=%u bus ab=%u ib=%u\n",
- mixer->num, pipe->num, rate, quota, ib_quota);
-
- ab_total += quota >> MDSS_MDP_BUS_FACTOR_SHIFT;
- ib_total += ib_quota >> MDSS_MDP_BUS_FACTOR_SHIFT;
- if (rate > max_clk_rate)
- max_clk_rate = rate;
+ ab_total += perf.ab_quota >> MDSS_MDP_BUS_FACTOR_SHIFT;
+ ib_total += perf.ib_quota >> MDSS_MDP_BUS_FACTOR_SHIFT;
+ if (perf.mdp_clk_rate > max_clk_rate)
+ max_clk_rate = perf.mdp_clk_rate;
}
*bus_ab_quota += ab_total;
@@ -296,6 +340,7 @@
mutex_lock(&mdss_mdp_ctl_lock);
ctl->ref_cnt--;
ctl->intf_num = MDSS_MDP_NO_INTF;
+ ctl->intf_type = MDSS_MDP_NO_INTF;
ctl->is_secure = false;
ctl->power_on = false;
ctl->start_fnc = NULL;
@@ -1000,6 +1045,7 @@
{
struct mdss_mdp_ctl *sctl;
int ret = 0;
+ u32 off;
if (!ctl->power_on) {
pr_debug("%s %d already off!\n", __func__, __LINE__);
@@ -1033,12 +1079,13 @@
mdss_mdp_ctl_write(sctl, MDSS_MDP_REG_CTL_TOP, 0);
if (ctl->mixer_left) {
- mdss_mdp_ctl_write(ctl, MDSS_MDP_REG_CTL_LAYER(
- ctl->mixer_left->num), 0);
+ off = __mdss_mdp_ctl_get_mixer_off(ctl->mixer_left);
+ mdss_mdp_ctl_write(ctl, off, 0);
}
+
if (ctl->mixer_right) {
- mdss_mdp_ctl_write(ctl, MDSS_MDP_REG_CTL_LAYER(
- ctl->mixer_right->num), 0);
+ off = __mdss_mdp_ctl_get_mixer_off(ctl->mixer_right);
+ mdss_mdp_ctl_write(ctl, off, 0);
}
ctl->power_on = false;
@@ -1142,11 +1189,7 @@
ctl->flush_bits |= BIT(6) << mixer->num; /* LAYER_MIXER */
mdp_mixer_write(mixer, MDSS_MDP_REG_LM_OP_MODE, blend_color_out);
- if (mixer->type == MDSS_MDP_MIXER_TYPE_INTF)
- off = MDSS_MDP_REG_CTL_LAYER(mixer->num);
- else
- off = MDSS_MDP_REG_CTL_LAYER(mixer->num +
- MDSS_MDP_INTF_MAX_LAYERMIXER);
+ off = __mdss_mdp_ctl_get_mixer_off(mixer);
mdss_mdp_ctl_write(ctl, off, mixercfg);
return 0;
@@ -1577,3 +1620,11 @@
return mixer_cnt;
}
+static inline int __mdss_mdp_ctl_get_mixer_off(struct mdss_mdp_mixer *mixer)
+{
+ if (mixer->type == MDSS_MDP_MIXER_TYPE_INTF)
+ return MDSS_MDP_REG_CTL_LAYER(mixer->num);
+ else
+ return MDSS_MDP_REG_CTL_LAYER(mixer->num +
+ MDSS_MDP_INTF_MAX_LAYERMIXER);
+}
diff --git a/drivers/video/msm/mdss/mdss_mdp_hwio.h b/drivers/video/msm/mdss/mdss_mdp_hwio.h
index 741c7a7..4779d20 100644
--- a/drivers/video/msm/mdss/mdss_mdp_hwio.h
+++ b/drivers/video/msm/mdss/mdss_mdp_hwio.h
@@ -340,6 +340,7 @@
#define MDSS_MDP_REG_WB_DST_MATRIX_ROW1 0x034
#define MDSS_MDP_REG_WB_DST_MATRIX_ROW2 0x038
#define MDSS_MDP_REG_WB_DST_MATRIX_ROW3 0x03C
+#define MDSS_MDP_REG_WB_DST_WRITE_CONFIG 0x048
#define MDSS_MDP_REG_WB_ROTATION_DNSCALER 0x050
#define MDSS_MDP_REG_WB_N16_INIT_PHASE_X_C03 0x060
#define MDSS_MDP_REG_WB_N16_INIT_PHASE_X_C12 0x064
diff --git a/drivers/video/msm/mdss/mdss_mdp_intf_cmd.c b/drivers/video/msm/mdss/mdss_mdp_intf_cmd.c
index 238170d..bd4f3ea 100644
--- a/drivers/video/msm/mdss/mdss_mdp_intf_cmd.c
+++ b/drivers/video/msm/mdss/mdss_mdp_intf_cmd.c
@@ -440,7 +440,7 @@
null_handle.vsync_handler = NULL;
mdss_mdp_cmd_vsync_ctrl(ctl, &null_handle);
- mdss_mdp_set_intr_callback(MDSS_MDP_IRQ_PING_PONG_RD_PTR, ctl->intf_num,
+ mdss_mdp_set_intr_callback(MDSS_MDP_IRQ_PING_PONG_RD_PTR, ctx->pp_num,
NULL, NULL);
mdss_mdp_set_intr_callback(MDSS_MDP_IRQ_PING_PONG_COMP, ctx->pp_num,
NULL, NULL);
diff --git a/drivers/video/msm/mdss/mdss_mdp_intf_writeback.c b/drivers/video/msm/mdss/mdss_mdp_intf_writeback.c
index 0c08eda..b7fe1bd 100644
--- a/drivers/video/msm/mdss/mdss_mdp_intf_writeback.c
+++ b/drivers/video/msm/mdss/mdss_mdp_intf_writeback.c
@@ -17,9 +17,6 @@
#include "mdss_mdp.h"
#include "mdss_mdp_rotator.h"
-/* wait for at most 2 vsync for lowest refresh rate (24hz) */
-#define KOFF_TIMEOUT msecs_to_jiffies(84)
-
enum mdss_mdp_writeback_type {
MDSS_MDP_WRITEBACK_TYPE_ROTATOR,
MDSS_MDP_WRITEBACK_TYPE_LINE,
@@ -208,6 +205,7 @@
mdp_wb_write(ctx, MDSS_MDP_REG_WB_DST_YSTRIDE0, ystride0);
mdp_wb_write(ctx, MDSS_MDP_REG_WB_DST_YSTRIDE1, ystride1);
mdp_wb_write(ctx, MDSS_MDP_REG_WB_OUT_SIZE, outsize);
+ mdp_wb_write(ctx, MDSS_MDP_REG_WB_DST_WRITE_CONFIG, 0x58);
return 0;
}
@@ -349,8 +347,13 @@
rc = wait_for_completion_interruptible_timeout(&ctx->wb_comp,
KOFF_TIMEOUT);
- WARN(rc <= 0, "writeback kickoff timed out (%d) ctl=%d\n",
- rc, ctl->num);
+ if (rc <= 0) {
+ rc = -ENODEV;
+ WARN(1, "writeback kickoff timed out (%d) ctl=%d\n",
+ rc, ctl->num);
+ } else {
+ rc = 0;
+ }
mdss_mdp_clk_ctrl(MDP_BLOCK_POWER_OFF, false); /* clock off */
diff --git a/drivers/video/msm/mdss/mdss_mdp_overlay.c b/drivers/video/msm/mdss/mdss_mdp_overlay.c
index b09b647..780ff94 100644
--- a/drivers/video/msm/mdss/mdss_mdp_overlay.c
+++ b/drivers/video/msm/mdss/mdss_mdp_overlay.c
@@ -180,6 +180,11 @@
pr_err("BWC: unequal src img and rect w,h\n");
return -EINVAL;
}
+
+ if (req->flags & MDP_DECIMATION_EN) {
+ pr_err("Can't enable BWC decode && decimate\n");
+ return -EINVAL;
+ }
}
if (req->flags & MDP_DEINTERLACE) {
@@ -289,6 +294,56 @@
return ret;
}
+static int __mdp_pipe_tune_perf(struct mdss_mdp_pipe *pipe)
+{
+ struct mdss_data_type *mdata = pipe->mixer->ctl->mdata;
+ struct mdss_mdp_perf_params perf;
+ int rc;
+
+ for (;;) {
+ rc = mdss_mdp_perf_calc_pipe(pipe, &perf);
+
+ if (!rc && (perf.mdp_clk_rate <= mdata->max_mdp_clk_rate))
+ break;
+
+ /*
+ * if decimation is available try to reduce minimum clock rate
+ * requirement by applying vertical decimation and reduce
+ * mdp clock requirement
+ */
+ if (mdata->has_decimation && (pipe->vert_deci < MAX_DECIMATION))
+ pipe->vert_deci++;
+ else
+ return -EPERM;
+ }
+
+ return 0;
+}
+
+static int __mdss_mdp_overlay_setup_scaling(struct mdss_mdp_pipe *pipe)
+{
+ u32 src;
+ int rc;
+
+ src = pipe->src.w >> pipe->horz_deci;
+ rc = mdss_mdp_calc_phase_step(src, pipe->dst.w, &pipe->phase_step_x);
+ if (rc) {
+ pr_err("Horizontal scaling calculation failed=%d! %d->%d\n",
+ rc, src, pipe->dst.w);
+ return rc;
+ }
+
+ src = pipe->src.h >> pipe->vert_deci;
+ rc = mdss_mdp_calc_phase_step(src, pipe->dst.h, &pipe->phase_step_y);
+ if (rc) {
+ pr_err("Vertical scaling calculation failed=%d! %d->%d\n",
+ rc, src, pipe->dst.h);
+ return rc;
+ }
+
+ return 0;
+}
+
static int mdss_mdp_overlay_pipe_setup(struct msm_fb_data_type *mfd,
struct mdp_overlay *req,
struct mdss_mdp_pipe **ppipe)
@@ -450,13 +505,17 @@
ret = copy_from_user(pipe->pp_res.igc_c0_c1,
pipe->pp_cfg.igc_cfg.c0_c1_data,
sizeof(uint32_t) * len);
- if (ret)
- return -ENOMEM;
+ if (ret) {
+ ret = -ENOMEM;
+ goto exit_fail;
+ }
ret = copy_from_user(pipe->pp_res.igc_c2,
pipe->pp_cfg.igc_cfg.c2_data,
sizeof(uint32_t) * len);
- if (ret)
- return -ENOMEM;
+ if (ret) {
+ ret = -ENOMEM;
+ goto exit_fail;
+ }
pipe->pp_cfg.igc_cfg.c0_c1_data =
pipe->pp_res.igc_c0_c1;
pipe->pp_cfg.igc_cfg.c2_data = pipe->pp_res.igc_c2;
@@ -482,8 +541,10 @@
ret = copy_from_user(pipe->pp_res.hist_lut,
pipe->pp_cfg.hist_lut_cfg.data,
sizeof(uint32_t) * len);
- if (ret)
- return -ENOMEM;
+ if (ret) {
+ ret = -ENOMEM;
+ goto exit_fail;
+ }
pipe->pp_cfg.hist_lut_cfg.data = pipe->pp_res.hist_lut;
}
}
@@ -497,6 +558,16 @@
}
}
+ ret = __mdp_pipe_tune_perf(pipe);
+ if (ret) {
+ pr_debug("unable to satisfy performance. ret=%d\n", ret);
+ goto exit_fail;
+ }
+
+ ret = __mdss_mdp_overlay_setup_scaling(pipe);
+ if (ret)
+ goto exit_fail;
+
ret = mdss_mdp_smp_reserve(pipe);
if (ret) {
pr_debug("mdss_mdp_smp_reserve failed. ret=%d\n", ret);
@@ -506,6 +577,7 @@
pipe->params_changed++;
req->id = pipe->ndx;
+ req->vert_deci = pipe->vert_deci;
*ppipe = pipe;
@@ -692,7 +764,7 @@
int mdss_mdp_overlay_kickoff(struct msm_fb_data_type *mfd)
{
struct mdss_overlay_private *mdp5_data = mfd_to_mdp5_data(mfd);
- struct mdss_mdp_pipe *pipe;
+ struct mdss_mdp_pipe *pipe, *next;
struct mdss_mdp_ctl *ctl = mfd_to_ctl(mfd);
int ret;
@@ -706,7 +778,8 @@
return ret;
}
- list_for_each_entry(pipe, &mdp5_data->pipes_used, used_list) {
+ list_for_each_entry_safe(pipe, next, &mdp5_data->pipes_used,
+ used_list) {
struct mdss_mdp_data *buf;
if (pipe->back_buf.num_planes) {
buf = &pipe->back_buf;
@@ -714,6 +787,13 @@
pipe->params_changed++;
buf = &pipe->front_buf;
} else if (!pipe->params_changed) {
+ if (pipe->mixer) {
+ if (!mdss_mdp_pipe_is_staged(pipe)) {
+ list_del(&pipe->used_list);
+ list_add(&pipe->cleanup_list,
+ &mdp5_data->pipes_cleanup);
+ }
+ }
continue;
} else if (pipe->front_buf.num_planes) {
buf = &pipe->front_buf;
@@ -746,15 +826,7 @@
ret = mdss_mdp_display_wait4comp(mdp5_data->ctl);
- complete(&mfd->update.comp);
- mutex_lock(&mfd->no_update.lock);
- if (mfd->no_update.timer.function)
- del_timer(&(mfd->no_update.timer));
-
- mfd->no_update.timer.expires = jiffies + (2 * HZ);
- add_timer(&mfd->no_update.timer);
- mutex_unlock(&mfd->no_update.lock);
-
+ mdss_fb_update_notify_update(mfd);
commit_fail:
mdss_mdp_overlay_cleanup(mfd);
@@ -794,9 +866,14 @@
static int mdss_mdp_overlay_unset(struct msm_fb_data_type *mfd, int ndx)
{
int ret = 0;
- struct mdss_overlay_private *mdp5_data = mfd_to_mdp5_data(mfd);
+ struct mdss_overlay_private *mdp5_data;
- if (!mfd || !mdp5_data->ctl)
+ if (!mfd)
+ return -ENODEV;
+
+ mdp5_data = mfd_to_mdp5_data(mfd);
+
+ if (!mdp5_data || !mdp5_data->ctl)
return -ENODEV;
ret = mutex_lock_interruptible(&mdp5_data->ov_lock);
@@ -1125,14 +1202,18 @@
struct mdss_mdp_data data;
struct mdss_mdp_pipe *pipe;
struct fb_info *fbi;
- struct mdss_overlay_private *mdp5_data = mfd_to_mdp5_data(mfd);
+ struct mdss_overlay_private *mdp5_data;
u32 offset;
int bpp, ret;
- if (!mfd || !mdp5_data->ctl)
+ if (!mfd)
return;
fbi = mfd->fbi;
+ mdp5_data = mfd_to_mdp5_data(mfd);
+
+ if (!mdp5_data || !mdp5_data->ctl)
+ return;
if (!fbi->fix.smem_start || fbi->fix.smem_len == 0 ||
mdp5_data->borderfill_enable) {
@@ -1226,6 +1307,15 @@
mutex_unlock(&mdp5_data->ov_lock);
}
+static void mdss_mdp_overlay_dispatch_vsync(struct work_struct *work)
+{
+ struct mdss_overlay_private *mdp5_data;
+ mdp5_data = container_of(work, struct mdss_overlay_private, vsync_work);
+ if (mdp5_data->ctl && mdp5_data->ctl->mfd)
+ sysfs_notify(&mdp5_data->ctl->mfd->fbi->dev->kobj, NULL,
+ "vsync_event");
+}
+
/* function is called in irq context should have minimum processing */
static void mdss_mdp_overlay_handle_vsync(struct mdss_mdp_ctl *ctl,
ktime_t t)
@@ -1241,17 +1331,14 @@
mdp5_data = mfd_to_mdp5_data(mfd);
pr_debug("vsync on fb%d play_cnt=%d\n", mfd->index, ctl->play_cnt);
- spin_lock(&mdp5_data->vsync_lock);
mdp5_data->vsync_time = t;
- complete(&mdp5_data->vsync_comp);
- spin_unlock(&mdp5_data->vsync_lock);
+ schedule_work(&mdp5_data->vsync_work);
}
int mdss_mdp_overlay_vsync_ctrl(struct msm_fb_data_type *mfd, int en)
{
struct mdss_overlay_private *mdp5_data = mfd_to_mdp5_data(mfd);
struct mdss_mdp_ctl *ctl = mfd_to_ctl(mfd);
- unsigned long flags;
int rc;
if (!ctl)
@@ -1273,10 +1360,6 @@
pr_debug("fb%d vsync en=%d\n", mfd->index, en);
- spin_lock_irqsave(&mdp5_data->vsync_lock, flags);
- INIT_COMPLETION(mdp5_data->vsync_comp);
- spin_unlock_irqrestore(&mdp5_data->vsync_lock, flags);
-
mdss_mdp_clk_ctrl(MDP_BLOCK_POWER_ON, false);
if (en)
rc = ctl->add_vsync_handler(ctl, &ctl->vsync_handler);
@@ -1295,23 +1378,16 @@
struct fb_info *fbi = dev_get_drvdata(dev);
struct msm_fb_data_type *mfd = (struct msm_fb_data_type *)fbi->par;
struct mdss_overlay_private *mdp5_data = mfd_to_mdp5_data(mfd);
- unsigned long flags;
u64 vsync_ticks;
int ret;
if (!mdp5_data->ctl || !mdp5_data->ctl->power_on)
- return 0;
+ return -EAGAIN;
- ret = wait_for_completion_interruptible(&mdp5_data->vsync_comp);
- if (ret < 0)
- return ret;
-
- spin_lock_irqsave(&mdp5_data->vsync_lock, flags);
vsync_ticks = ktime_to_ns(mdp5_data->vsync_time);
- spin_unlock_irqrestore(&mdp5_data->vsync_lock, flags);
pr_debug("fb%d vsync=%llu", mfd->index, vsync_ticks);
- ret = snprintf(buf, PAGE_SIZE, "VSYNC=%llu", vsync_ticks);
+ ret = scnprintf(buf, PAGE_SIZE, "VSYNC=%llu", vsync_ticks);
return ret;
}
@@ -1563,6 +1639,9 @@
ret = mdss_mdp_calib_config((struct mdp_calib_config_data *)
&mdp_pp.data.calib_cfg, ©back);
break;
+ case mdp_op_calib_mode:
+ ret = mdss_mdp_calib_mode(mfd, &mdp_pp.data.mdss_calib_cfg);
+ break;
default:
pr_err("Unsupported request to MDP_PP IOCTL. %d = op\n",
mdp_pp.op);
@@ -1670,7 +1749,7 @@
switch (metadata->op) {
case metadata_op_frame_rate:
metadata->data.panel_frame_rate =
- mdss_get_panel_framerate(mfd);
+ mdss_panel_get_framerate(mfd->panel_info);
break;
case metadata_op_get_caps:
ret = mdss_fb_get_hw_caps(mfd, &metadata->data.caps);
@@ -1817,14 +1896,17 @@
static int mdss_mdp_overlay_on(struct msm_fb_data_type *mfd)
{
int rc;
- struct mdss_overlay_private *mdp5_data = mfd_to_mdp5_data(mfd);
-
+ struct mdss_overlay_private *mdp5_data;
if (!mfd)
return -ENODEV;
if (mfd->key != MFD_KEY)
return -EINVAL;
+ mdp5_data = mfd_to_mdp5_data(mfd);
+ if (!mdp5_data)
+ return -EINVAL;
+
if (!mdp5_data->ctl) {
struct mdss_mdp_ctl *ctl;
struct mdss_panel_data *pdata;
@@ -1879,15 +1961,16 @@
static int mdss_mdp_overlay_off(struct msm_fb_data_type *mfd)
{
int rc;
- struct mdss_overlay_private *mdp5_data = mfd_to_mdp5_data(mfd);
-
+ struct mdss_overlay_private *mdp5_data;
if (!mfd)
return -ENODEV;
if (mfd->key != MFD_KEY)
return -EINVAL;
- if (!mdp5_data->ctl) {
+ mdp5_data = mfd_to_mdp5_data(mfd);
+
+ if (!mdp5_data || !mdp5_data->ctl) {
pr_err("ctl not initialized\n");
return -ENODEV;
}
@@ -1895,6 +1978,7 @@
if (!mdp5_data->ctl->power_on)
return 0;
+ mdss_mdp_overlay_free_fb_pipe(mfd);
if (!mfd->ref_cnt) {
mdss_mdp_overlay_release_all(mfd);
} else {
@@ -1967,8 +2051,7 @@
INIT_LIST_HEAD(&mdp5_data->pipes_used);
INIT_LIST_HEAD(&mdp5_data->pipes_cleanup);
- init_completion(&mdp5_data->vsync_comp);
- spin_lock_init(&mdp5_data->vsync_lock);
+ INIT_WORK(&mdp5_data->vsync_work, mdss_mdp_overlay_dispatch_vsync);
mutex_init(&mdp5_data->ov_lock);
mdp5_data->hw_refresh = true;
mdp5_data->overlay_play_enable = true;
diff --git a/drivers/video/msm/mdss/mdss_mdp_pipe.c b/drivers/video/msm/mdss/mdss_mdp_pipe.c
index 0834823..3b91ced 100644
--- a/drivers/video/msm/mdss/mdss_mdp_pipe.c
+++ b/drivers/video/msm/mdss/mdss_mdp_pipe.c
@@ -725,3 +725,8 @@
return ret;
}
+
+int mdss_mdp_pipe_is_staged(struct mdss_mdp_pipe *pipe)
+{
+ return (pipe == pipe->mixer->stage_pipe[pipe->mixer_stage]);
+}
diff --git a/drivers/video/msm/mdss/mdss_mdp_pp.c b/drivers/video/msm/mdss/mdss_mdp_pp.c
index b6f91f4..75b6056 100644
--- a/drivers/video/msm/mdss/mdss_mdp_pp.c
+++ b/drivers/video/msm/mdss/mdss_mdp_pp.c
@@ -288,7 +288,8 @@
struct pp_sts_type *pp_sts,
struct mdp_sharp_cfg *sharp_config);
static int mdss_ad_init_checks(struct msm_fb_data_type *mfd);
-static struct mdss_ad_info *mdss_mdp_get_ad(struct msm_fb_data_type *mfd);
+static int mdss_mdp_get_ad(struct msm_fb_data_type *mfd,
+ struct mdss_ad_info **ad);
static int pp_update_ad_input(struct msm_fb_data_type *mfd);
static void pp_ad_vsync_handler(struct mdss_mdp_ctl *ctl, ktime_t t);
static void pp_ad_cfg_write(struct mdss_ad_info *ad);
@@ -606,39 +607,6 @@
return 0;
}
-static int mdss_mdp_leading_zero(u32 num)
-{
- u32 bit = 0x80000000;
- int i;
-
- for (i = 0; i < 32; i++) {
- if (bit & num)
- return i;
- bit >>= 1;
- }
-
- return i;
-}
-
-static u32 mdss_mdp_scale_phase_step(int f_num, u32 src, u32 dst)
-{
- u32 val, s;
- int n;
-
- n = mdss_mdp_leading_zero(src);
- if (n > f_num)
- n = f_num;
- s = src << n; /* maximum to reduce lose of resolution */
- val = s / dst;
- if (n < f_num) {
- n = f_num - n;
- val <<= n;
- val |= ((s % dst) << n) / dst;
- }
-
- return val;
-}
-
static int mdss_mdp_scale_setup(struct mdss_mdp_pipe *pipe)
{
u32 scale_config = 0;
@@ -704,13 +672,14 @@
}
scale_config |= MDSS_MDP_SCALEY_EN;
+ phasey_step = pipe->phase_step_y;
if (pipe->type == MDSS_MDP_PIPE_TYPE_VIG) {
- u32 chr_dst_h = pipe->dst.h;
+ u32 chroma_shift = 0;
if (!pipe->vert_deci &&
((chroma_sample == MDSS_MDP_CHROMA_420) ||
(chroma_sample == MDSS_MDP_CHROMA_H1V2)))
- chr_dst_h *= 2; /* 2x upsample chroma */
+ chroma_shift = 1; /* 2x upsample chroma */
if (src_h <= pipe->dst.h) {
scale_config |= /* G/Y, A */
@@ -721,17 +690,14 @@
(MDSS_MDP_SCALE_FILTER_PCMN << 10) |
(MDSS_MDP_SCALE_FILTER_PCMN << 18);
- if (src_h <= chr_dst_h)
+ if ((src_h >> chroma_shift) <= pipe->dst.h)
scale_config |= /* CrCb */
(MDSS_MDP_SCALE_FILTER_BIL << 14);
else
scale_config |= /* CrCb */
(MDSS_MDP_SCALE_FILTER_PCMN << 14);
- phasey_step = mdss_mdp_scale_phase_step(
- PHASE_STEP_SHIFT, src_h, chr_dst_h);
-
- writel_relaxed(phasey_step, pipe->base +
+ writel_relaxed(phasey_step >> chroma_shift, pipe->base +
MDSS_MDP_REG_VIG_QSEED2_C12_PHASESTEPY);
} else {
if (src_h <= pipe->dst.h)
@@ -743,9 +709,6 @@
(MDSS_MDP_SCALE_FILTER_PCMN << 10) |
(MDSS_MDP_SCALE_FILTER_PCMN << 18);
}
-
- phasey_step = mdss_mdp_scale_phase_step(
- PHASE_STEP_SHIFT, src_h, pipe->dst.h);
}
if ((src_w != pipe->dst.w) ||
@@ -761,14 +724,15 @@
}
scale_config |= MDSS_MDP_SCALEX_EN;
+ phasex_step = pipe->phase_step_x;
if (pipe->type == MDSS_MDP_PIPE_TYPE_VIG) {
- u32 chr_dst_w = pipe->dst.w;
+ u32 chroma_shift = 0;
if (!pipe->horz_deci &&
((chroma_sample == MDSS_MDP_CHROMA_420) ||
(chroma_sample == MDSS_MDP_CHROMA_H2V1)))
- chr_dst_w *= 2; /* 2x upsample chroma */
+ chroma_shift = 1; /* 2x upsample chroma */
if (src_w <= pipe->dst.w) {
scale_config |= /* G/Y, A */
@@ -779,16 +743,14 @@
(MDSS_MDP_SCALE_FILTER_PCMN << 8) |
(MDSS_MDP_SCALE_FILTER_PCMN << 16);
- if (src_w <= chr_dst_w)
+ if ((src_w >> chroma_shift) <= pipe->dst.w)
scale_config |= /* CrCb */
(MDSS_MDP_SCALE_FILTER_BIL << 12);
else
scale_config |= /* CrCb */
(MDSS_MDP_SCALE_FILTER_PCMN << 12);
- phasex_step = mdss_mdp_scale_phase_step(
- PHASE_STEP_SHIFT, src_w, chr_dst_w);
- writel_relaxed(phasex_step, pipe->base +
+ writel_relaxed(phasex_step >> chroma_shift, pipe->base +
MDSS_MDP_REG_VIG_QSEED2_C12_PHASESTEPX);
} else {
if (src_w <= pipe->dst.w)
@@ -800,9 +762,6 @@
(MDSS_MDP_SCALE_FILTER_PCMN << 8) |
(MDSS_MDP_SCALE_FILTER_PCMN << 16);
}
-
- phasex_step = mdss_mdp_scale_phase_step(
- PHASE_STEP_SHIFT, src_w, pipe->dst.w);
}
writel_relaxed(scale_config, pipe->base +
@@ -1055,6 +1014,10 @@
if (ret < 0)
pr_warn("ad_setup(dspp%d) returns %d", dspp_num, ret);
}
+ /* call calibration specific processing here */
+ if (ctl->mfd->calib_mode)
+ goto flush_exit;
+
/* nothing to update */
if ((!flags) && (!(opmode)) && (ret <= 0))
goto dspp_exit;
@@ -1145,6 +1108,7 @@
if (pp_sts->pgc_sts & PP_STS_ENABLE)
opmode |= (1 << 22);
+flush_exit:
writel_relaxed(opmode, basel + MDSS_MDP_REG_DSPP_OP_MODE);
mdss_mdp_ctl_write(ctl, MDSS_MDP_REG_CTL_FLUSH, BIT(13 + dspp_num));
wmb();
@@ -2543,7 +2507,7 @@
hist_info = &mdss_pp_res->dspp_hist[dspp_num];
mutex_lock(&hist_info->hist_mutex);
for (j = 0; j < HIST_V_SIZE; j++)
- hist_concat[i] += hist_info->data[i];
+ hist_concat[j] += hist_info->data[j];
mutex_unlock(&hist_info->hist_mutex);
}
hist_data_addr = hist_concat;
@@ -2726,8 +2690,12 @@
}
mixer_num = mdss_mdp_get_ctl_mixers(mfd->index, mixer_id);
- if (!mixer_num || mixer_num > MDSS_AD_MAX_MIXERS) {
- pr_err("invalid mixer_num, %d", mixer_num);
+ if (!mixer_num) {
+ pr_debug("no mixers connected, %d", mixer_num);
+ return -EHOSTDOWN;
+ }
+ if (mixer_num > MDSS_AD_MAX_MIXERS) {
+ pr_warn("too many mixers, not supported, %d", mixer_num);
return ret;
}
@@ -2742,9 +2710,10 @@
return mixer_id[0];
}
-static struct mdss_ad_info *mdss_mdp_get_ad(struct msm_fb_data_type *mfd)
+static int mdss_mdp_get_ad(struct msm_fb_data_type *mfd,
+ struct mdss_ad_info **ret_ad)
{
- int ad_num;
+ int ad_num, ret = 0;
struct mdss_data_type *mdata;
struct mdss_ad_info *ad = NULL;
mdata = mfd_to_mdata(mfd);
@@ -2752,11 +2721,15 @@
ad_num = mdss_ad_init_checks(mfd);
if (ad_num >= 0)
ad = &mdata->ad_cfgs[ad_num];
- return ad;
+ else
+ ret = ad_num;
+ *ret_ad = ad;
+ return ret;
}
static int pp_update_ad_input(struct msm_fb_data_type *mfd)
{
+ int ret;
struct mdss_ad_info *ad;
struct mdss_ad_input input;
struct mdss_mdp_ctl *ctl;
@@ -2767,11 +2740,14 @@
if (!ctl)
return -EINVAL;
- ad = mdss_mdp_get_ad(mfd);
+ ret = mdss_mdp_get_ad(mfd, &ad);
+ if (ret)
+ return ret;
if (!ad || ad->cfg.mode == MDSS_AD_MODE_AUTO_BL)
return -EINVAL;
- pr_debug("backlight level changed, trigger update to AD");
+ pr_debug("backlight level changed (%d), trigger update to AD",
+ mfd->bl_level);
input.mode = ad->cfg.mode;
if (MDSS_AD_MODE_DATA_MATCH(ad->cfg.mode, MDSS_AD_INPUT_AMBIENT))
input.in.amb_light = ad->ad_data;
@@ -2789,9 +2765,9 @@
int lin_ret = -1, inv_ret = -1, ret = 0;
u32 ratio_temp, shift = 0;
- ad = mdss_mdp_get_ad(mfd);
- if (!ad)
- return -EINVAL;
+ ret = mdss_mdp_get_ad(mfd, &ad);
+ if (ret)
+ return ret;
mutex_lock(&ad->lock);
if (init_cfg->ops & MDP_PP_AD_INIT) {
@@ -2854,14 +2830,16 @@
int ret = 0;
struct mdss_ad_info *ad;
struct mdss_mdp_ctl *ctl;
+ u32 bl;
- ad = mdss_mdp_get_ad(mfd);
- if (!ad)
- return -EINVAL;
+ ret = mdss_mdp_get_ad(mfd, &ad);
+ if (ret)
+ return ret;
mutex_lock(&ad->lock);
- if (!PP_AD_STATE_IS_INITCFG(ad->state) &&
- !PP_AD_STS_IS_DIRTY(ad->sts)) {
+ if ((!PP_AD_STATE_IS_INITCFG(ad->state) &&
+ !PP_AD_STS_IS_DIRTY(ad->sts)) &&
+ !input->mode == MDSS_AD_MODE_CALIB) {
pr_warn("AD not initialized or configured.");
ret = -EPERM;
goto error;
@@ -2894,6 +2872,25 @@
ad->sts |= PP_AD_STS_DIRTY_VSYNC;
ad->sts |= PP_AD_STS_DIRTY_DATA;
break;
+ case MDSS_AD_MODE_CALIB:
+ wait = 0;
+ if (mfd->calib_mode) {
+ bl = input->in.calib_bl;
+ if (bl >= AD_BL_LIN_LEN) {
+ pr_warn("calib_bl 255 max!");
+ break;
+ }
+ mutex_unlock(&ad->lock);
+ mutex_lock(&mfd->bl_lock);
+ MDSS_BRIGHT_TO_BL(bl, bl, mfd->panel_info->bl_max,
+ MDSS_MAX_BL_BRIGHTNESS);
+ mdss_fb_set_backlight(mfd, bl);
+ mutex_unlock(&mfd->bl_lock);
+ mutex_lock(&ad->lock);
+ } else {
+ pr_warn("should be in calib mode");
+ }
+ break;
default:
pr_warn("invalid default %d", input->mode);
ret = -EINVAL;
@@ -3047,9 +3044,9 @@
char __iomem *base;
u32 bypass = MDSS_PP_AD_BYPASS_DEF, bl;
- ad = mdss_mdp_get_ad(mfd);
- if (!ad)
- return -EINVAL;
+ ret = mdss_mdp_get_ad(mfd, &ad);
+ if (ret)
+ return ret;
base = ad->base;
@@ -3111,6 +3108,7 @@
ad->state |= PP_AD_STATE_RUN;
mutex_lock(&mfd->bl_lock);
mfd->mdp.update_ad_input = pp_update_ad_input;
+ mfd->ext_bl_ctrl = ad->cfg.bl_ctrl_mode;
mutex_unlock(&mfd->bl_lock);
} else {
@@ -3135,6 +3133,7 @@
memset(&ad->cfg, 0, sizeof(struct mdss_ad_cfg));
mutex_lock(&mfd->bl_lock);
mfd->mdp.update_ad_input = NULL;
+ mfd->ext_bl_ctrl = 0;
mutex_unlock(&mfd->bl_lock);
}
ad->state &= ~PP_AD_STATE_RUN;
@@ -3230,6 +3229,9 @@
mutex_lock(&mfd->lock);
mdss_mdp_ctl_write(ctl, MDSS_MDP_REG_CTL_FLUSH, BIT(13 + ad->num));
mutex_unlock(&mfd->lock);
+
+ /* Trigger update notify to wake up those waiting for display updates */
+ mdss_fb_update_notify_update(mfd);
}
#define PP_AD_LUT_LEN 33
@@ -3332,9 +3334,6 @@
return ret;
}
-
-
-
int mdss_mdp_calib_config(struct mdp_calib_config_data *cfg, u32 *copyback)
{
int ret = -1;
@@ -3358,3 +3357,14 @@
mdss_mdp_clk_ctrl(MDP_BLOCK_POWER_OFF, false);
return ret;
}
+
+int mdss_mdp_calib_mode(struct msm_fb_data_type *mfd,
+ struct mdss_calib_cfg *cfg)
+{
+ if (!mdss_pp_res || !mfd)
+ return -EINVAL;
+ mutex_lock(&mdss_pp_mutex);
+ mfd->calib_mode = cfg->calib_mask;
+ mutex_unlock(&mdss_pp_mutex);
+ return 0;
+}
diff --git a/drivers/video/msm/mdss/mdss_mdp_util.c b/drivers/video/msm/mdss/mdss_mdp_util.c
index 305c3cb..c7beb0e 100644
--- a/drivers/video/msm/mdss/mdss_mdp_util.c
+++ b/drivers/video/msm/mdss/mdss_mdp_util.c
@@ -28,7 +28,6 @@
#include "mdss_mdp.h"
#include "mdss_mdp_formats.h"
#include "mdss_debug.h"
-#define DEFAULT_FRAME_RATE 60
enum {
MDP_INTR_VSYNC_INTF_0,
@@ -246,6 +245,9 @@
ps->rau_h[1] = 4;
} else
ps->ystride[1] = 32 * 2;
+
+ /* account for both chroma components */
+ ps->ystride[1] <<= 1;
} else if (fmt->fetch_planes == MDSS_MDP_PLANE_INTERLEAVED) {
ps->rau_cnt = DIV_ROUND_UP(w, 32);
ps->ystride[0] = 32 * 4 * fmt->bpp;
@@ -261,6 +263,10 @@
ps->ystride[1] *= ps->rau_cnt;
ps->num_planes = 2;
+ pr_debug("BWC rau_cnt=%d strides={%d,%d} heights={%d,%d}\n",
+ ps->rau_cnt, ps->ystride[0], ps->ystride[1],
+ ps->rau_h[0], ps->rau_h[1]);
+
return 0;
}
@@ -269,7 +275,7 @@
{
struct mdss_mdp_format_params *fmt;
int i, rc;
- u32 bpp, ystride0_off, ystride1_off;
+ u32 bpp;
if (ps == NULL)
return -EINVAL;
@@ -284,24 +290,23 @@
memset(ps, 0, sizeof(struct mdss_mdp_plane_sizes));
if (bwc_mode) {
- u32 meta_size;
+ u32 height, meta_size;
rc = mdss_mdp_get_rau_strides(w, h, fmt, ps);
if (rc)
return rc;
+ height = DIV_ROUND_UP(h, ps->rau_h[0]);
meta_size = DIV_ROUND_UP(ps->rau_cnt, 8);
- ps->ystride[0] += meta_size;
ps->ystride[1] += meta_size;
+ ps->ystride[0] += ps->ystride[1] + meta_size;
+ ps->plane_size[0] = ps->ystride[0] * height;
- ystride0_off = DIV_ROUND_UP(h, ps->rau_h[0]);
- ystride1_off = DIV_ROUND_UP(h, ps->rau_h[1]);
- ps->plane_size[0] = (ps->ystride[0] * ystride0_off) +
- (ps->ystride[1] * ystride1_off);
- ps->ystride[0] += ps->ystride[1];
ps->ystride[1] = 2;
- ps->plane_size[1] = ps->rau_cnt * ps->ystride[1] *
- (ystride0_off + ystride1_off);
+ ps->plane_size[1] = 2 * ps->rau_cnt * height;
+
+ pr_debug("BWC data stride=%d size=%d meta size=%d\n",
+ ps->ystride[0], ps->plane_size[0], ps->plane_size[1]);
} else {
if (fmt->fetch_planes == MDSS_MDP_PLANE_INTERLEAVED) {
ps->num_planes = 1;
@@ -522,6 +527,9 @@
ret = ion_map_iommu(iclient, data->srcp_ihdl,
mdss_get_iommu_domain(domain),
0, SZ_4K, 0, start, len, 0, 0);
+ if (ret && (domain == MDSS_IOMMU_DOMAIN_SECURE))
+ msm_ion_unsecure_buffer(iclient,
+ data->srcp_ihdl);
} else {
ret = ion_phys(iclient, data->srcp_ihdl, start,
(size_t *) len);
@@ -536,6 +544,7 @@
if (!*start) {
pr_err("start address is zero!\n");
+ mdss_mdp_put_img(data);
return -ENOMEM;
}
@@ -546,32 +555,29 @@
pr_debug("mem=%d ihdl=%p buf=0x%x len=0x%x\n", img->memory_id,
data->srcp_ihdl, data->addr, data->len);
} else {
- return -EINVAL;
+ mdss_mdp_put_img(data);
+ return ret ? : -EOVERFLOW;
}
return ret;
}
-u32 mdss_get_panel_framerate(struct msm_fb_data_type *mfd)
+int mdss_mdp_calc_phase_step(u32 src, u32 dst, u32 *out_phase)
{
- u32 frame_rate = DEFAULT_FRAME_RATE;
- u32 pixel_total;
- struct mdss_panel_info *panel_info = mfd->panel_info;
+ u32 unit, residue;
- if ((panel_info->type == MIPI_VIDEO_PANEL) ||
- (panel_info->type == MIPI_CMD_PANEL)) {
- frame_rate = panel_info->mipi.frame_rate;
- } else {
- pixel_total = (panel_info->lcdc.h_back_porch +
- panel_info->lcdc.h_front_porch +
- panel_info->lcdc.h_pulse_width +
- panel_info->xres) *
- (panel_info->lcdc.v_back_porch +
- panel_info->lcdc.v_front_porch +
- panel_info->lcdc.v_pulse_width +
- panel_info->yres);
- if (pixel_total)
- frame_rate = panel_info->clk_rate / pixel_total;
+ if (dst == 0)
+ return -EINVAL;
+
+ unit = 1 << PHASE_STEP_SHIFT;
+ *out_phase = mult_frac(src, unit, dst);
+
+ /* check if overflow is possible */
+ if (src > dst) {
+ residue = *out_phase & (unit - 1);
+ if (residue && ((residue * dst) < (unit - residue)))
+ return -EOVERFLOW;
}
- return frame_rate;
+
+ return 0;
}
diff --git a/drivers/video/msm/mdss/mdss_mdp_wb.c b/drivers/video/msm/mdss/mdss_mdp_wb.c
index 1f8244d..a9deef2 100644
--- a/drivers/video/msm/mdss/mdss_mdp_wb.c
+++ b/drivers/video/msm/mdss/mdss_mdp_wb.c
@@ -251,8 +251,8 @@
if (wb->secure_pipe)
mdss_mdp_pipe_destroy(wb->secure_pipe);
mutex_unlock(&wb->lock);
-
- mdp5_data->ctl->is_secure = false;
+ if (mdp5_data->ctl)
+ mdp5_data->ctl->is_secure = false;
mdp5_data->wb = NULL;
mutex_unlock(&mdss_mdp_wb_buf_lock);
@@ -533,7 +533,12 @@
goto kickoff_fail;
}
- wait_for_completion_interruptible(&comp);
+ ret = wait_for_completion_interruptible_timeout(&comp, KOFF_TIMEOUT);
+ if (ret <= 0) {
+ WARN(1, "wfd kick off time out=%d ctl=%d", ret, ctl->num);
+ ret = 0;
+ }
+
if (wb && node) {
mutex_lock(&wb->lock);
list_add_tail(&node->active_entry, &wb->busy_queue);
diff --git a/drivers/video/msm/mdss/mdss_panel.h b/drivers/video/msm/mdss/mdss_panel.h
index 1bf414f..e8a6312 100644
--- a/drivers/video/msm/mdss/mdss_panel.h
+++ b/drivers/video/msm/mdss/mdss_panel.h
@@ -23,6 +23,8 @@
u16 type;
};
+#define DEFAULT_FRAME_RATE 60
+
/* panel type list */
#define NO_PANEL 0xffff /* No Panel */
#define MDDI_PANEL 1 /* MDDI */
@@ -270,6 +272,58 @@
struct mdss_panel_data *next;
};
+/**
+ * mdss_get_panel_framerate() - get panel frame rate based on panel information
+ * @panel_info: Pointer to panel info containing all panel information
+ */
+static inline u32 mdss_panel_get_framerate(struct mdss_panel_info *panel_info)
+{
+ u32 frame_rate, pixel_total;
+
+ if (panel_info == NULL)
+ return DEFAULT_FRAME_RATE;
+
+ switch (panel_info->type) {
+ case MIPI_VIDEO_PANEL:
+ case MIPI_CMD_PANEL:
+ frame_rate = panel_info->mipi.frame_rate;
+ break;
+ case WRITEBACK_PANEL:
+ frame_rate = DEFAULT_FRAME_RATE;
+ break;
+ default:
+ pixel_total = (panel_info->lcdc.h_back_porch +
+ panel_info->lcdc.h_front_porch +
+ panel_info->lcdc.h_pulse_width +
+ panel_info->xres) *
+ (panel_info->lcdc.v_back_porch +
+ panel_info->lcdc.v_front_porch +
+ panel_info->lcdc.v_pulse_width +
+ panel_info->yres);
+ if (pixel_total)
+ frame_rate = panel_info->clk_rate / pixel_total;
+ else
+ frame_rate = DEFAULT_FRAME_RATE;
+
+ break;
+ }
+ return frame_rate;
+}
+
+/*
+ * mdss_panel_get_vtotal() - return panel vertical height
+ * @pinfo: Pointer to panel info containing all panel information
+ *
+ * Returns the total height of the panel including any blanking regions
+ * which are not visible to user but used to calculate panel pixel clock.
+ */
+static inline int mdss_panel_get_vtotal(struct mdss_panel_info *pinfo)
+{
+ return pinfo->yres + pinfo->lcdc.v_back_porch +
+ pinfo->lcdc.v_front_porch +
+ pinfo->lcdc.v_pulse_width;
+}
+
int mdss_register_panel(struct platform_device *pdev,
struct mdss_panel_data *pdata);
#endif /* MDSS_PANEL_H */
diff --git a/drivers/video/msm/mdss/msm_mdss_io_8974.c b/drivers/video/msm/mdss/msm_mdss_io_8974.c
index d4eb716..aab67df 100644
--- a/drivers/video/msm/mdss/msm_mdss_io_8974.c
+++ b/drivers/video/msm/mdss/msm_mdss_io_8974.c
@@ -287,42 +287,66 @@
wmb();
}
-void mdss_dsi_phy_enable(unsigned char *ctrl_base, int on)
+void mdss_dsi_phy_enable(struct mdss_dsi_ctrl_pdata *ctrl, int on)
{
+ static struct mdss_dsi_ctrl_pdata *left_ctrl;
+
+ if (ctrl == NULL) {
+ pr_err("%s: Invalid input data\n", __func__);
+ return;
+ }
+
+ if (!left_ctrl
+ && ctrl->shared_pdata.broadcast_enable)
+ if ((ctrl->panel_data).panel_info.pdest
+ == DISPLAY_1)
+ left_ctrl = ctrl;
+
if (on) {
- MIPI_OUTP(ctrl_base + 0x03cc, 0x03);
+ MIPI_OUTP(ctrl->ctrl_base + 0x03cc, 0x03);
wmb();
usleep(100);
- MIPI_OUTP(ctrl_base + 0x0220, 0x006);
+ MIPI_OUTP(ctrl->ctrl_base + 0x0220, 0x006);
wmb();
usleep(100);
- MIPI_OUTP(ctrl_base + 0x0268, 0x001);
+ MIPI_OUTP(ctrl->ctrl_base + 0x0268, 0x001);
wmb();
usleep(100);
- MIPI_OUTP(ctrl_base + 0x0268, 0x000);
+ MIPI_OUTP(ctrl->ctrl_base + 0x0268, 0x000);
wmb();
usleep(100);
- MIPI_OUTP(ctrl_base + 0x0220, 0x007);
+ MIPI_OUTP(ctrl->ctrl_base + 0x0220, 0x007);
wmb();
- MIPI_OUTP(ctrl_base + 0x03cc, 0x01);
+ MIPI_OUTP(ctrl->ctrl_base + 0x03cc, 0x01);
wmb();
usleep(100);
/* MMSS_DSI_0_PHY_DSIPHY_CTRL_0 */
- MIPI_OUTP(ctrl_base + 0x0470, 0x07e);
- MIPI_OUTP(ctrl_base + 0x0470, 0x06e);
- MIPI_OUTP(ctrl_base + 0x0470, 0x06c);
- MIPI_OUTP(ctrl_base + 0x0470, 0x064);
- MIPI_OUTP(ctrl_base + 0x0470, 0x065);
- MIPI_OUTP(ctrl_base + 0x0470, 0x075);
- MIPI_OUTP(ctrl_base + 0x0470, 0x077);
- MIPI_OUTP(ctrl_base + 0x0470, 0x07f);
+ MIPI_OUTP(ctrl->ctrl_base + 0x0470, 0x07e);
+ MIPI_OUTP(ctrl->ctrl_base + 0x0470, 0x06e);
+ MIPI_OUTP(ctrl->ctrl_base + 0x0470, 0x06c);
+ MIPI_OUTP(ctrl->ctrl_base + 0x0470, 0x064);
+ MIPI_OUTP(ctrl->ctrl_base + 0x0470, 0x065);
+ MIPI_OUTP(ctrl->ctrl_base + 0x0470, 0x075);
+ MIPI_OUTP(ctrl->ctrl_base + 0x0470, 0x077);
+ MIPI_OUTP(ctrl->ctrl_base + 0x0470, 0x07f);
wmb();
-
} else {
- MIPI_OUTP(ctrl_base + 0x0220, 0x006);
- MIPI_OUTP(ctrl_base + 0x0470, 0x000);
- MIPI_OUTP(ctrl_base + 0x0598, 0x000);
+ if (left_ctrl &&
+ (ctrl->panel_data.panel_info.pdest
+ == DISPLAY_1))
+ return;
+
+ if (left_ctrl &&
+ (ctrl->panel_data.panel_info.pdest
+ == DISPLAY_2)) {
+ MIPI_OUTP(left_ctrl->ctrl_base + 0x0220, 0x006);
+ MIPI_OUTP(left_ctrl->ctrl_base + 0x0470, 0x000);
+ MIPI_OUTP(left_ctrl->ctrl_base + 0x0598, 0x000);
+ }
+ MIPI_OUTP(ctrl->ctrl_base + 0x0220, 0x006);
+ MIPI_OUTP(ctrl->ctrl_base + 0x0470, 0x000);
+ MIPI_OUTP(ctrl->ctrl_base + 0x0598, 0x000);
wmb();
}
}
diff --git a/fs/fat/misc.c b/fs/fat/misc.c
index a1d192d..0639666 100644
--- a/fs/fat/misc.c
+++ b/fs/fat/misc.c
@@ -271,7 +271,7 @@
int i, err = 0;
for (i = 0; i < nr_bhs; i++)
- write_dirty_buffer(bhs[i], WRITE);
+ write_dirty_buffer(bhs[i], WRITE_SYNC);
for (i = 0; i < nr_bhs; i++) {
wait_on_buffer(bhs[i]);
diff --git a/include/asm-generic/gpio.h b/include/asm-generic/gpio.h
index 5f52690..03efb50 100644
--- a/include/asm-generic/gpio.h
+++ b/include/asm-generic/gpio.h
@@ -5,6 +5,7 @@
#include <linux/types.h>
#include <linux/errno.h>
#include <linux/of.h>
+#include <linux/pinctrl/pinctrl.h>
#ifdef CONFIG_GPIOLIB
@@ -47,6 +48,26 @@
struct module;
struct device_node;
+#ifdef CONFIG_PINCTRL
+/**
+ * struct gpio_pin_range - pin range controlled by a gpio chip
+ * @head: list for maintaining set of pin ranges, used internally
+ * @pctldev: pinctrl device which handles corresponding pins
+ * @range: actual range of pins controlled by a gpio controller
+ */
+
+struct gpio_pin_range {
+ struct list_head node;
+ struct pinctrl_dev *pctldev;
+ struct pinctrl_gpio_range range;
+};
+
+int gpiochip_add_pin_range(struct gpio_chip *chip, const char *pinctl_name,
+ unsigned int pin_base, unsigned int npins);
+void gpiochip_remove_pin_ranges(struct gpio_chip *chip);
+
+#endif
+
/**
* struct gpio_chip - abstract a GPIO controller
* @label: for diagnostics
@@ -132,6 +153,15 @@
int (*of_xlate)(struct gpio_chip *gc,
const struct of_phandle_args *gpiospec, u32 *flags);
#endif
+#ifdef CONFIG_PINCTRL
+ /*
+ * If CONFIG_PINCTRL is enabled, then gpio controllers can optionally
+ * describe the actual pin range which they serve in an SoC. This
+ * information would be used by pinctrl subsystem to configure
+ * corresponding pins for gpio usage.
+ */
+ struct list_head pin_ranges;
+#endif
};
extern const char *gpiochip_is_requested(struct gpio_chip *chip,
diff --git a/include/linux/compaction.h b/include/linux/compaction.h
index 51a90b7..ee1c2ff 100644
--- a/include/linux/compaction.h
+++ b/include/linux/compaction.h
@@ -22,8 +22,9 @@
extern int fragmentation_index(struct zone *zone, unsigned int order);
extern unsigned long try_to_compact_pages(struct zonelist *zonelist,
int order, gfp_t gfp_mask, nodemask_t *mask,
- bool sync);
+ bool sync, bool *contended);
extern int compact_pgdat(pg_data_t *pgdat, int order);
+extern void reset_isolation_suitable(pg_data_t *pgdat);
extern unsigned long compaction_suitable(struct zone *zone, int order);
/* Do not skip compaction more than 64 times */
@@ -61,10 +62,20 @@
return zone->compact_considered < (1UL << zone->compact_defer_shift);
}
+/* Returns true if restarting compaction after many failures */
+static inline bool compaction_restarting(struct zone *zone, int order)
+{
+ if (order < zone->compact_order_failed)
+ return false;
+
+ return zone->compact_defer_shift == COMPACT_MAX_DEFER_SHIFT &&
+ zone->compact_considered >= 1UL << zone->compact_defer_shift;
+}
+
#else
static inline unsigned long try_to_compact_pages(struct zonelist *zonelist,
int order, gfp_t gfp_mask, nodemask_t *nodemask,
- bool sync)
+ bool sync, bool *contended)
{
return COMPACT_CONTINUE;
}
@@ -74,6 +85,10 @@
return COMPACT_CONTINUE;
}
+static inline void reset_isolation_suitable(pg_data_t *pgdat)
+{
+}
+
static inline unsigned long compaction_suitable(struct zone *zone, int order)
{
return COMPACT_SKIPPED;
diff --git a/include/linux/coresight-stm.h b/include/linux/coresight-stm.h
index 3f35dd9..298fc9a 100644
--- a/include/linux/coresight-stm.h
+++ b/include/linux/coresight-stm.h
@@ -7,6 +7,7 @@
OST_ENTITY_TRACE_PRINTK = 0x02,
OST_ENTITY_TRACE_MARKER = 0x04,
OST_ENTITY_DEV_NODE = 0x08,
+ OST_ENTITY_DIAG = 0xEE,
OST_ENTITY_QVIEW = 0xFE,
OST_ENTITY_MAX = 0xFF,
};
diff --git a/include/linux/devfreq.h b/include/linux/devfreq.h
index 235248c..9c74fbb 100644
--- a/include/linux/devfreq.h
+++ b/include/linux/devfreq.h
@@ -53,6 +53,20 @@
#define DEVFREQ_FLAG_LEAST_UPPER_BOUND 0x1
/**
+ * struct devfreq_governor_data - mapping to per device governor data
+ * @name: The name of the governor.
+ * @data: Private data for the governor.
+ *
+ * Devices may pass in an array of this structure to allow governors
+ * to get the correct data pointer when they are enabled after
+ * the devfreq_add_device() call.
+ */
+struct devfreq_governor_data {
+ const char *name;
+ void *data;
+};
+
+/**
* struct devfreq_dev_profile - Devfreq's user device profile
* @initial_freq: The operating frequency when devfreq_add_device() is
* called.
@@ -75,6 +89,11 @@
* this is the time to unregister it.
* @freq_table: Optional list of frequencies to support statistics.
* @max_state: The size of freq_table.
+ * @governor_data: Optional array of private data for governors.
+ * This is used to set devfreq->data correctly
+ * when a governor is enabled via sysfs or other
+ * mechanisms after the devfreq_add_device() call.
+ * @num_governor_data: Number of elements in governor_data.
*/
struct devfreq_dev_profile {
unsigned long initial_freq;
@@ -88,6 +107,8 @@
unsigned int *freq_table;
unsigned int max_state;
+ const struct devfreq_governor_data *governor_data;
+ unsigned int num_governor_data;
};
/**
diff --git a/include/linux/device.h b/include/linux/device.h
index 810337c..35862c3 100644
--- a/include/linux/device.h
+++ b/include/linux/device.h
@@ -21,6 +21,7 @@
#include <linux/compiler.h>
#include <linux/types.h>
#include <linux/mutex.h>
+#include <linux/pinctrl/devinfo.h>
#include <linux/pm.h>
#include <linux/atomic.h>
#include <asm/device.h>
@@ -595,6 +596,8 @@
* @pm_domain: Provide callbacks that are executed during system suspend,
* hibernation, system resume and during runtime PM transitions
* along with subsystem-level and driver-level callbacks.
+ * @pins: For device pin management.
+ * See Documentation/pinctrl.txt for details.
* @numa_node: NUMA node this device is close to.
* @dma_mask: Dma mask (if dma'ble device).
* @coherent_dma_mask: Like dma_mask, but for alloc_coherent mapping as not all
@@ -646,6 +649,10 @@
struct dev_pm_info power;
struct dev_pm_domain *pm_domain;
+#ifdef CONFIG_PINCTRL
+ struct dev_pin_info *pins;
+#endif
+
#ifdef CONFIG_NUMA
int numa_node; /* NUMA node this device is close to */
#endif
diff --git a/include/linux/dvb/dmx.h b/include/linux/dvb/dmx.h
index ce9e5b9..bd954ee 100644
--- a/include/linux/dvb/dmx.h
+++ b/include/linux/dvb/dmx.h
@@ -528,6 +528,9 @@
/* Indicates whether demux support sending data directly to subtitle decoder */
#define DMX_CAP_SUBTITLE_DECODER_DATA 0x10
+/* Indicates whether TS insertion is supported */
+#define DMX_CAP_TS_INSERTION 0x20
+
/* Number of decoders demux can output data to */
int num_decoders;
diff --git a/include/linux/gpio.h b/include/linux/gpio.h
index 6155ecf..eda50bd 100644
--- a/include/linux/gpio.h
+++ b/include/linux/gpio.h
@@ -172,6 +172,21 @@
return -EINVAL;
}
-#endif
+#ifdef CONFIG_PINCTRL
+
+static inline int
+gpiochip_add_pin_range(struct gpio_chip *chip, const char *pinctl_name,
+ unsigned int pin_base, unsigned int npins)
+{
+}
+
+static inline void
+gpiochip_remove_pin_ranges(struct gpio_chip *chip)
+{
+}
+
+#endif /* CONFIG_PINCTRL */
+
+#endif /* ! CONFIG_GENERIC_GPIO */
#endif /* __LINUX_GPIO_H */
diff --git a/include/linux/input/lis3dh.h b/include/linux/input/lis3dh.h
index f081b06..7c0172f 100644
--- a/include/linux/input/lis3dh.h
+++ b/include/linux/input/lis3dh.h
@@ -37,7 +37,7 @@
#define LIS3DH_ACC_I2C_SAD_L ((LIS3DH_ACC_I2C_SADROOT<<1)|SAD0L)
#define LIS3DH_ACC_I2C_SAD_H ((LIS3DH_ACC_I2C_SADROOT<<1)|SAD0H)
#define LIS3DH_ACC_DEV_NAME "lis3dh_acc"
-
+#define ACCEL_INPUT_DEV_NAME "accelerometer"
/************************************************/
/* Accelerometer defines section */
diff --git a/include/linux/input/synaptics_dsx.h b/include/linux/input/synaptics_dsx.h
index f90f59e..73016d6 100644
--- a/include/linux/input/synaptics_dsx.h
+++ b/include/linux/input/synaptics_dsx.h
@@ -35,7 +35,6 @@
* struct synaptics_rmi4_platform_data - rmi4 platform data
* @x_flip: x flip flag
* @y_flip: y flip flag
- * @regulator_en: regulator enable flag
* @irq_gpio: attention interrupt gpio
* @irq_flags: flags used by the irq
* @reset_gpio: reset gpio
@@ -47,7 +46,6 @@
struct synaptics_rmi4_platform_data {
bool x_flip;
bool y_flip;
- bool regulator_en;
bool i2c_pull_up;
unsigned irq_gpio;
u32 irq_flags;
diff --git a/include/linux/memcontrol.h b/include/linux/memcontrol.h
index f94efd2..14d38a5 100644
--- a/include/linux/memcontrol.h
+++ b/include/linux/memcontrol.h
@@ -66,7 +66,6 @@
struct lruvec *mem_cgroup_lru_add_list(struct zone *, struct page *,
enum lru_list);
void mem_cgroup_lru_del_list(struct page *, enum lru_list);
-void mem_cgroup_lru_del(struct page *);
struct lruvec *mem_cgroup_lru_move_lists(struct zone *, struct page *,
enum lru_list, enum lru_list);
@@ -79,6 +78,8 @@
extern void mem_cgroup_out_of_memory(struct mem_cgroup *memcg, gfp_t gfp_mask,
int order);
+bool __mem_cgroup_same_or_subtree(const struct mem_cgroup *root_memcg,
+ struct mem_cgroup *memcg);
int task_in_mem_cgroup(struct task_struct *task, const struct mem_cgroup *memcg);
extern struct mem_cgroup *try_get_mem_cgroup_from_page(struct page *page);
@@ -92,10 +93,13 @@
int mm_match_cgroup(const struct mm_struct *mm, const struct mem_cgroup *cgroup)
{
struct mem_cgroup *memcg;
+ int match;
+
rcu_read_lock();
memcg = mem_cgroup_from_task(rcu_dereference((mm)->owner));
+ match = __mem_cgroup_same_or_subtree(cgroup, memcg);
rcu_read_unlock();
- return cgroup == memcg;
+ return match;
}
extern struct cgroup_subsys_state *mem_cgroup_css(struct mem_cgroup *memcg);
@@ -262,10 +266,6 @@
{
}
-static inline void mem_cgroup_lru_del(struct page *page)
-{
-}
-
static inline struct lruvec *mem_cgroup_lru_move_lists(struct zone *zone,
struct page *page,
enum lru_list from,
diff --git a/include/linux/mfd/pm8xxx/batterydata-lib.h b/include/linux/mfd/pm8xxx/batterydata-lib.h
index 47a2b7b..644eede 100644
--- a/include/linux/mfd/pm8xxx/batterydata-lib.h
+++ b/include/linux/mfd/pm8xxx/batterydata-lib.h
@@ -75,6 +75,7 @@
BATT_DESAY,
BATT_OEM,
BATT_QRD_4V35_2000MAH,
+ BATT_QRD_4V2_1300MAH,
};
/**
@@ -116,6 +117,7 @@
extern struct bms_battery_data desay_5200_data;
extern struct bms_battery_data oem_batt_data;
extern struct bms_battery_data QRD_4v35_2000mAh_data;
+extern struct bms_battery_data qrd_4v2_1300mah_data;
int interpolate_fcc(struct single_row_lut *fcc_temp_lut, int batt_temp);
int interpolate_scalingfactor(struct sf_lut *sf_lut, int row_entry, int pc);
diff --git a/include/linux/mfd/pm8xxx/pm8921-bms.h b/include/linux/mfd/pm8xxx/pm8921-bms.h
index 7562166..cd70726 100644
--- a/include/linux/mfd/pm8xxx/pm8921-bms.h
+++ b/include/linux/mfd/pm8xxx/pm8921-bms.h
@@ -41,7 +41,7 @@
* learning can start
* @min_fcc_ocv_pc: minimum PC (lookup(OCV)) at which CC counting
* for FCC learning can start
- * @max_fcc_learning_samples: Maximum number of FCC measurement cycles to be
+ * @min_fcc_learning_samples: Minimum number of FCC measurement cycles to be
* used for FCC update
* @normal_voltage_calc_ms: The period of soc calculation in ms when battery
* voltage higher than cutoff voltage
@@ -74,7 +74,7 @@
int enable_fcc_learning;
int min_fcc_learning_soc;
int min_fcc_ocv_pc;
- int max_fcc_learning_samples;
+ int min_fcc_learning_samples;
int shutdown_soc_valid_limit;
int ignore_shutdown_soc;
int adjust_soc_low_threshold;
diff --git a/include/linux/mfd/pm8xxx/pwm.h b/include/linux/mfd/pm8xxx/pwm.h
index 6d95e3a..47ebe06 100644
--- a/include/linux/mfd/pm8xxx/pwm.h
+++ b/include/linux/mfd/pm8xxx/pwm.h
@@ -1,4 +1,4 @@
-/* Copyright (c) 2011-2012, The Linux Foundation. All rights reserved.
+/* Copyright (c) 2011-2013, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -32,6 +32,9 @@
#define PM_PWM_LUT_NO_TABLE 0x100
+#define PM_PWM_BANK_LO 0x1000
+#define PM_PWM_BANK_HI 0x2000
+
/**
* PWM frequency/period control
*
diff --git a/include/linux/mfd/wcd9xxx/core.h b/include/linux/mfd/wcd9xxx/core.h
index 0d1f49f..e688bd9 100644
--- a/include/linux/mfd/wcd9xxx/core.h
+++ b/include/linux/mfd/wcd9xxx/core.h
@@ -76,7 +76,8 @@
WCD9XXX_IRQ_EAR_PA_OCPL_FAULT,
WCD9XXX_IRQ_HPH_L_PA_STARTUP,
WCD9XXX_IRQ_HPH_R_PA_STARTUP,
- WCD9XXX_IRQ_EAR_PA_STARTUP,
+ WCD9320_IRQ_EAR_PA_STARTUP,
+ WCD9306_IRQ_MBHC_JACK_SWITCH = WCD9320_IRQ_EAR_PA_STARTUP,
WCD9310_NUM_IRQS,
WCD9XXX_IRQ_RESERVED_0 = WCD9310_NUM_IRQS,
WCD9XXX_IRQ_RESERVED_1,
@@ -85,7 +86,7 @@
WCD9XXX_IRQ_MAD_BEACON,
WCD9XXX_IRQ_MAD_ULTRASOUND,
WCD9XXX_IRQ_SPEAKER_CLIPPING,
- WCD9XXX_IRQ_MBHC_JACK_SWITCH,
+ WCD9320_IRQ_MBHC_JACK_SWITCH,
WCD9XXX_IRQ_VBAT_MONITOR_ATTACK,
WCD9XXX_IRQ_VBAT_MONITOR_RELEASE,
WCD9XXX_NUM_IRQS,
@@ -153,6 +154,13 @@
#define WCD9XXX_CH(xport, xshift) \
{.port = xport, .shift = xshift}
+enum wcd9xxx_chipid_major {
+ TABLA_MAJOR = cpu_to_le16(0x100),
+ SITAR_MAJOR = cpu_to_le16(0x101),
+ TAIKO_MAJOR = cpu_to_le16(0x102),
+ TAPAN_MAJOR = cpu_to_le16(0x103),
+};
+
struct wcd9xxx_codec_type {
u16 id_major;
u16 id_minor;
diff --git a/include/linux/mm_types.h b/include/linux/mm_types.h
index 3cc3062..b98b4b9 100644
--- a/include/linux/mm_types.h
+++ b/include/linux/mm_types.h
@@ -344,17 +344,6 @@
/* Architecture-specific MM context */
mm_context_t context;
- /* Swap token stuff */
- /*
- * Last value of global fault stamp as seen by this process.
- * In other words, this value gives an indication of how long
- * it has been since this task got the token.
- * Look at mm/thrash.c
- */
- unsigned int faultstamp;
- unsigned int token_priority;
- unsigned int last_interval;
-
unsigned long flags; /* Must use atomic bitops to access the bits */
struct core_state *core_state; /* coredumping support */
diff --git a/include/linux/mmc/sdhci.h b/include/linux/mmc/sdhci.h
index 4e30082..72e31b2 100644
--- a/include/linux/mmc/sdhci.h
+++ b/include/linux/mmc/sdhci.h
@@ -141,6 +141,19 @@
* specification.
*/
#define SDHCI_QUIRK2_USE_RESERVED_MAX_TIMEOUT (1<<8)
+/*
+ * This is applicable for controllers that advertize timeout clock
+ * value in capabilities register (bit 5-0) as just 50MHz whereas the
+ * base clock frequency is 200MHz. So, the controller internally
+ * multiplies the value in timeout control register by 4 with the
+ * assumption that driver always uses fixed timeout clock value from
+ * capabilities register to calculate the timeout. But when the driver
+ * uses SDHCI_QUIRK2_ALWAYS_USE_BASE_CLOCK base clock frequency is directly
+ * controller by driver and it's rate varies upto max. 200MHz. This new quirk
+ * will be used in such cases to avoid controller mulplication when timeout is
+ * calculated based on the base clock.
+ */
+#define SDHCI_QUIRK2_DIVIDE_TOUT_BY_4 (1 << 9)
int irq; /* Device IRQ */
void __iomem *ioaddr; /* Mapped address */
diff --git a/include/linux/mmzone.h b/include/linux/mmzone.h
index d63232a..7539e03 100644
--- a/include/linux/mmzone.h
+++ b/include/linux/mmzone.h
@@ -204,16 +204,14 @@
#define LRU_ALL_EVICTABLE (LRU_ALL_FILE | LRU_ALL_ANON)
#define LRU_ALL ((1 << NR_LRU_LISTS) - 1)
-/* Isolate inactive pages */
-#define ISOLATE_INACTIVE ((__force isolate_mode_t)0x1)
-/* Isolate active pages */
-#define ISOLATE_ACTIVE ((__force isolate_mode_t)0x2)
/* Isolate clean file */
-#define ISOLATE_CLEAN ((__force isolate_mode_t)0x4)
+#define ISOLATE_CLEAN ((__force isolate_mode_t)0x1)
/* Isolate unmapped file */
-#define ISOLATE_UNMAPPED ((__force isolate_mode_t)0x8)
+#define ISOLATE_UNMAPPED ((__force isolate_mode_t)0x2)
/* Isolate for asynchronous migration */
-#define ISOLATE_ASYNC_MIGRATE ((__force isolate_mode_t)0x10)
+#define ISOLATE_ASYNC_MIGRATE ((__force isolate_mode_t)0x4)
+/* Isolate unevictable pages */
+#define ISOLATE_UNEVICTABLE ((__force isolate_mode_t)0x8)
/* LRU Isolation modes. */
typedef unsigned __bitwise__ isolate_mode_t;
@@ -378,6 +376,14 @@
*/
spinlock_t lock;
int all_unreclaimable; /* All pages pinned */
+#if defined CONFIG_COMPACTION || defined CONFIG_CMA
+ /* Set to true when the PG_migrate_skip bits should be cleared */
+ bool compact_blockskip_flush;
+
+ /* pfns where compaction scanners should start */
+ unsigned long compact_cached_free_pfn;
+ unsigned long compact_cached_migrate_pfn;
+#endif
#ifdef CONFIG_MEMORY_HOTPLUG
/* see spanned/present_pages for more description */
seqlock_t span_seqlock;
diff --git a/include/linux/msm_ipa.h b/include/linux/msm_ipa.h
index 5151654..b2229d3 100644
--- a/include/linux/msm_ipa.h
+++ b/include/linux/msm_ipa.h
@@ -87,6 +87,7 @@
#define IPA_FLT_NEXT_HDR (1ul << 13)
#define IPA_FLT_META_DATA (1ul << 14)
#define IPA_FLT_FRAGMENT (1ul << 15)
+#define IPA_FLT_TOS_MASKED (1ul << 16)
/**
* enum ipa_client_type - names for the various IPA "clients"
@@ -243,6 +244,8 @@
uint16_t dst_port_hi;
uint8_t type;
uint8_t code;
+ uint8_t tos_value;
+ uint8_t tos_mask;
uint32_t spi;
uint16_t src_port;
uint16_t dst_port;
diff --git a/include/linux/msm_mdp.h b/include/linux/msm_mdp.h
index 6d41c13..18921a0 100644
--- a/include/linux/msm_mdp.h
+++ b/include/linux/msm_mdp.h
@@ -50,7 +50,7 @@
#define MSMFB_HISTOGRAM_START _IOR(MSMFB_IOCTL_MAGIC, 144, \
struct mdp_histogram_start_req)
#define MSMFB_HISTOGRAM_STOP _IOR(MSMFB_IOCTL_MAGIC, 145, unsigned int)
-#define MSMFB_NOTIFY_UPDATE _IOW(MSMFB_IOCTL_MAGIC, 146, unsigned int)
+#define MSMFB_NOTIFY_UPDATE _IOWR(MSMFB_IOCTL_MAGIC, 146, unsigned int)
#define MSMFB_OVERLAY_3D _IOWR(MSMFB_IOCTL_MAGIC, 147, \
struct msmfb_overlay_3d)
@@ -90,6 +90,12 @@
};
enum {
+ NOTIFY_TYPE_NO_UPDATE,
+ NOTIFY_TYPE_SUSPEND,
+ NOTIFY_TYPE_UPDATE,
+};
+
+enum {
MDP_RGB_565, /* RGB 565 planer */
MDP_XRGB_8888, /* RGB 888 padded */
MDP_Y_CBCR_H2V2, /* Y and CbCr, pseudo planer w/ Cb is in MSB */
@@ -607,6 +613,7 @@
#define MDSS_AD_MODE_AUTO_STR 0x1
#define MDSS_AD_MODE_TARG_STR 0x3
#define MDSS_AD_MODE_MAN_STR 0x7
+#define MDSS_AD_MODE_CALIB 0xF
#define MDP_PP_AD_INIT 0x10
#define MDP_PP_AD_CFG 0x20
@@ -634,6 +641,8 @@
uint32_t *bl_lin_inv;
};
+#define MDSS_AD_BL_CTRL_MODE_EN 1
+#define MDSS_AD_BL_CTRL_MODE_DIS 0
struct mdss_ad_cfg {
uint32_t mode;
uint32_t al_calib_lut[33];
@@ -646,6 +655,7 @@
uint8_t strength_limit;
uint8_t t_filter_recursion;
uint16_t stab_itr;
+ uint32_t bl_ctrl_mode;
};
/* ops uses standard MDP_PP_* flags */
@@ -663,10 +673,12 @@
union {
uint32_t amb_light;
uint32_t strength;
+ uint32_t calib_bl;
} in;
uint32_t output;
};
+#define MDSS_CALIB_MODE_BL 0x1
struct mdss_calib_cfg {
uint32_t ops;
uint32_t calib_mask;
diff --git a/include/linux/nl80211.h b/include/linux/nl80211.h
index 6d7d178..6a68b72 100644
--- a/include/linux/nl80211.h
+++ b/include/linux/nl80211.h
@@ -608,6 +608,13 @@
* with the relevant Information Elements. This event is used to report
* received FT IEs (MDIE, FTIE, RSN IE, TIE, RICIE).
*
+ * @NL80211_CMD_CRIT_PROTOCOL_START: Indicates user-space will start running
+ * a critical protocol that needs more reliability in the connection to
+ * complete.
+ *
+ * @NL80211_CMD_CRIT_PROTOCOL_STOP: Indicates the connection reliability can
+ * return back to normal.
+ *
* @NL80211_CMD_MAX: highest used command number
* @__NL80211_CMD_AFTER_LAST: internal use
*/
@@ -768,6 +775,9 @@
NL80211_CMD_UPDATE_FT_IES,
NL80211_CMD_FT_EVENT,
+ NL80211_CMD_CRIT_PROTOCOL_START,
+ NL80211_CMD_CRIT_PROTOCOL_STOP,
+
/* add new commands above here */
/* used to define NL80211_CMD_MAX below */
@@ -1360,6 +1370,16 @@
* @NL80211_ATTR_IE_RIC: Resource Information Container Information
* Element
*
+ * @NL80211_ATTR_CRIT_PROT_ID: critical protocol identifier requiring increased
+ * reliability, see &enum nl80211_crit_proto_id (u16).
+ * @NL80211_ATTR_MAX_CRIT_PROT_DURATION: duration in milliseconds in which
+ * the connection should have increased reliability (u16).
+ *
+ * @NL80211_ATTR_PEER_AID: Association ID for the peer TDLS station (u16).
+ * This is similar to @NL80211_ATTR_STA_AID but with a difference of being
+ * allowed to be used with the first @NL80211_CMD_SET_STATION command to
+ * update a TDLS peer STA entry.
+ *
* @NL80211_ATTR_MAX: highest attribute number currently defined
* @__NL80211_ATTR_AFTER_LAST: internal use
*/
@@ -1655,6 +1675,11 @@
NL80211_ATTR_MDID,
NL80211_ATTR_IE_RIC,
+ NL80211_ATTR_CRIT_PROT_ID,
+ NL80211_ATTR_MAX_CRIT_PROT_DURATION,
+
+ NL80211_ATTR_PEER_AID,
+
/* add attributes here, update the policy in nl80211.c */
__NL80211_ATTR_AFTER_LAST,
@@ -3097,4 +3122,25 @@
NL80211_ACL_POLICY_ACCEPT_UNLESS_LISTED,
NL80211_ACL_POLICY_DENY_UNLESS_LISTED,
};
+/**
+ * enum nl80211_crit_proto_id - nl80211 critical protocol identifiers
+ *
+ * @NL80211_CRIT_PROTO_UNSPEC: protocol unspecified.
+ * @NL80211_CRIT_PROTO_DHCP: BOOTP or DHCPv6 protocol.
+ * @NL80211_CRIT_PROTO_EAPOL: EAPOL protocol.
+ * @NL80211_CRIT_PROTO_APIPA: APIPA protocol.
+ * @NUM_NL80211_CRIT_PROTO: must be kept last.
+ */
+enum nl80211_crit_proto_id {
+ NL80211_CRIT_PROTO_UNSPEC,
+ NL80211_CRIT_PROTO_DHCP,
+ NL80211_CRIT_PROTO_EAPOL,
+ NL80211_CRIT_PROTO_APIPA,
+ /* add other protocols before this one */
+ NUM_NL80211_CRIT_PROTO
+};
+
+/* maximum duration for critical protocol measures */
+#define NL80211_CRIT_PROTO_MAX_DURATION 5000 /* msec */
+
#endif /* __LINUX_NL80211_H */
diff --git a/include/linux/pageblock-flags.h b/include/linux/pageblock-flags.h
index 19ef95d..eed27f4 100644
--- a/include/linux/pageblock-flags.h
+++ b/include/linux/pageblock-flags.h
@@ -30,6 +30,9 @@
PB_migrate,
PB_migrate_end = PB_migrate + 3 - 1,
/* 3 bits required for migrate types */
+#ifdef CONFIG_COMPACTION
+ PB_migrate_skip,/* If set the block is skipped by compaction */
+#endif /* CONFIG_COMPACTION */
NR_PAGEBLOCK_BITS
};
@@ -65,10 +68,22 @@
void set_pageblock_flags_group(struct page *page, unsigned long flags,
int start_bitidx, int end_bitidx);
+#ifdef CONFIG_COMPACTION
+#define get_pageblock_skip(page) \
+ get_pageblock_flags_group(page, PB_migrate_skip, \
+ PB_migrate_skip + 1)
+#define clear_pageblock_skip(page) \
+ set_pageblock_flags_group(page, 0, PB_migrate_skip, \
+ PB_migrate_skip + 1)
+#define set_pageblock_skip(page) \
+ set_pageblock_flags_group(page, 1, PB_migrate_skip, \
+ PB_migrate_skip + 1)
+#endif /* CONFIG_COMPACTION */
+
#define get_pageblock_flags(page) \
- get_pageblock_flags_group(page, 0, NR_PAGEBLOCK_BITS-1)
+ get_pageblock_flags_group(page, 0, PB_migrate_end)
#define set_pageblock_flags(page, flags) \
set_pageblock_flags_group(page, flags, \
- 0, NR_PAGEBLOCK_BITS-1)
+ 0, PB_migrate_end)
#endif /* PAGEBLOCK_FLAGS_H */
diff --git a/include/linux/pinctrl/consumer.h b/include/linux/pinctrl/consumer.h
index 191e726..d281645 100644
--- a/include/linux/pinctrl/consumer.h
+++ b/include/linux/pinctrl/consumer.h
@@ -20,6 +20,7 @@
/* This struct is private to the core and should be regarded as a cookie */
struct pinctrl;
struct pinctrl_state;
+struct device;
#ifdef CONFIG_PINCTRL
@@ -36,6 +37,9 @@
const char *name);
extern int pinctrl_select_state(struct pinctrl *p, struct pinctrl_state *s);
+extern struct pinctrl * __must_check devm_pinctrl_get(struct device *dev);
+extern void devm_pinctrl_put(struct pinctrl *p);
+
#else /* !CONFIG_PINCTRL */
static inline int pinctrl_request_gpio(unsigned gpio)
@@ -79,6 +83,15 @@
return 0;
}
+static inline struct pinctrl * __must_check devm_pinctrl_get(struct device *dev)
+{
+ return NULL;
+}
+
+static inline void devm_pinctrl_put(struct pinctrl *p)
+{
+}
+
#endif /* CONFIG_PINCTRL */
static inline struct pinctrl * __must_check pinctrl_get_select(
@@ -113,6 +126,38 @@
return pinctrl_get_select(dev, PINCTRL_STATE_DEFAULT);
}
+static inline struct pinctrl * __must_check devm_pinctrl_get_select(
+ struct device *dev, const char *name)
+{
+ struct pinctrl *p;
+ struct pinctrl_state *s;
+ int ret;
+
+ p = devm_pinctrl_get(dev);
+ if (IS_ERR(p))
+ return p;
+
+ s = pinctrl_lookup_state(p, name);
+ if (IS_ERR(s)) {
+ devm_pinctrl_put(p);
+ return ERR_CAST(s);
+ }
+
+ ret = pinctrl_select_state(p, s);
+ if (ret < 0) {
+ devm_pinctrl_put(p);
+ return ERR_PTR(ret);
+ }
+
+ return p;
+}
+
+static inline struct pinctrl * __must_check devm_pinctrl_get_select_default(
+ struct device *dev)
+{
+ return devm_pinctrl_get_select(dev, PINCTRL_STATE_DEFAULT);
+}
+
#ifdef CONFIG_PINCONF
extern int pin_config_get(const char *dev_name, const char *name,
diff --git a/include/linux/pinctrl/devinfo.h b/include/linux/pinctrl/devinfo.h
new file mode 100644
index 0000000..6e5f8a9
--- /dev/null
+++ b/include/linux/pinctrl/devinfo.h
@@ -0,0 +1,45 @@
+/*
+ * Per-device information from the pin control system.
+ * This is the stuff that get included into the device
+ * core.
+ *
+ * Copyright (C) 2012 ST-Ericsson SA
+ * Written on behalf of Linaro for ST-Ericsson
+ * This interface is used in the core to keep track of pins.
+ *
+ * Author: Linus Walleij <linus.walleij@linaro.org>
+ *
+ * License terms: GNU General Public License (GPL) version 2
+ */
+
+#ifndef PINCTRL_DEVINFO_H
+#define PINCTRL_DEVINFO_H
+
+#ifdef CONFIG_PINCTRL
+
+/* The device core acts as a consumer toward pinctrl */
+#include <linux/pinctrl/consumer.h>
+
+/**
+ * struct dev_pin_info - pin state container for devices
+ * @p: pinctrl handle for the containing device
+ * @default_state: the default state for the handle, if found
+ */
+struct dev_pin_info {
+ struct pinctrl *p;
+ struct pinctrl_state *default_state;
+};
+
+extern int pinctrl_bind_pins(struct device *dev);
+
+#else
+
+/* Stubs if we're not using pinctrl */
+
+static inline int pinctrl_bind_pins(struct device *dev)
+{
+ return 0;
+}
+
+#endif /* CONFIG_PINCTRL */
+#endif /* PINCTRL_DEVINFO_H */
diff --git a/include/linux/pinctrl/machine.h b/include/linux/pinctrl/machine.h
index e4d1de7..7d22ab0 100644
--- a/include/linux/pinctrl/machine.h
+++ b/include/linux/pinctrl/machine.h
@@ -154,7 +154,7 @@
extern int pinctrl_register_mappings(struct pinctrl_map const *map,
unsigned num_maps);
-
+extern void pinctrl_provide_dummies(void);
#else
static inline int pinctrl_register_mappings(struct pinctrl_map const *map,
@@ -163,5 +163,8 @@
return 0;
}
-#endif /* !CONFIG_PINMUX */
+static inline void pinctrl_provide_dummies(void)
+{
+}
+#endif /* !CONFIG_PINCTRL */
#endif
diff --git a/include/linux/pinctrl/pinconf-generic.h b/include/linux/pinctrl/pinconf-generic.h
index 4f0abb9..72474e1 100644
--- a/include/linux/pinctrl/pinconf-generic.h
+++ b/include/linux/pinctrl/pinconf-generic.h
@@ -46,11 +46,15 @@
* @PIN_CONFIG_DRIVE_OPEN_SOURCE: the pin will be driven with open source
* (open emitter). Sending this config will enabale open drain mode, the
* argument is ignored.
+ * @PIN_CONFIG_DRIVE_STRENGTH: the pin will output the current passed as
+ * argument. The argument is in mA.
+ * @PIN_CONFIG_INPUT_SCHMITT_ENABLE: control schmitt-trigger mode on the pin.
+ * If the argument != 0, schmitt-trigger mode is enabled. If it's 0,
+ * schmitt-trigger mode is disabled.
* @PIN_CONFIG_INPUT_SCHMITT: this will configure an input pin to run in
* schmitt-trigger mode. If the schmitt-trigger has adjustable hysteresis,
* the threshold value is given on a custom format as argument when
- * setting pins to this mode. The argument zero turns the schmitt trigger
- * off.
+ * setting pins to this mode.
* @PIN_CONFIG_INPUT_DEBOUNCE: this will configure the pin to debounce mode,
* which means it will wait for signals to settle when reading inputs. The
* argument gives the debounce time on a custom format. Setting the
@@ -58,10 +62,15 @@
* @PIN_CONFIG_POWER_SOURCE: if the pin can select between different power
* supplies, the argument to this parameter (on a custom format) tells
* the driver which alternative power source to use.
+ * @PIN_CONFIG_SLEW_RATE: if the pin can select slew rate, the argument to
+ * this parameter (on a custom format) tells the driver which alternative
+ * slew rate to use.
* @PIN_CONFIG_LOW_POWER_MODE: this will configure the pin for low power
* operation, if several modes of operation are supported these can be
* passed in the argument on a custom form, else just use argument 1
* to indicate low power mode, argument 0 turns low power mode off.
+ * @PIN_CONFIG_OUTPUT: this will configure the pin in output, use argument
+ * 1 to indicate high level, argument 0 to indicate low level.
* @PIN_CONFIG_END: this is the last enumerator for pin configurations, if
* you need to pass in custom configurations to the pin controller, use
* PIN_CONFIG_END+1 as the base offset.
@@ -74,10 +83,14 @@
PIN_CONFIG_DRIVE_PUSH_PULL,
PIN_CONFIG_DRIVE_OPEN_DRAIN,
PIN_CONFIG_DRIVE_OPEN_SOURCE,
+ PIN_CONFIG_DRIVE_STRENGTH,
+ PIN_CONFIG_INPUT_SCHMITT_ENABLE,
PIN_CONFIG_INPUT_SCHMITT,
PIN_CONFIG_INPUT_DEBOUNCE,
PIN_CONFIG_POWER_SOURCE,
+ PIN_CONFIG_SLEW_RATE,
PIN_CONFIG_LOW_POWER_MODE,
+ PIN_CONFIG_OUTPUT,
PIN_CONFIG_END = 0x7FFF,
};
diff --git a/include/linux/pinctrl/pinconf.h b/include/linux/pinctrl/pinconf.h
index ec431f0..e7a7201 100644
--- a/include/linux/pinctrl/pinconf.h
+++ b/include/linux/pinctrl/pinconf.h
@@ -25,7 +25,6 @@
* @pin_config_get: get the config of a certain pin, if the requested config
* is not available on this controller this should return -ENOTSUPP
* and if it is available but disabled it should return -EINVAL
- * @pin_config_get: get the config of a certain pin
* @pin_config_set: configure an individual pin
* @pin_config_group_get: get configurations for an entire pin group
* @pin_config_group_set: configure all pins in a group
@@ -33,6 +32,8 @@
* per-device info for a certain pin in debugfs
* @pin_config_group_dbg_show: optional debugfs display hook that will provide
* per-device info for a certain group in debugfs
+ * @pin_config_config_dbg_show: optional debugfs display hook that will decode
+ * and display a driver's pin configuration parameter
*/
struct pinconf_ops {
#ifdef CONFIG_GENERIC_PINCONF
@@ -56,6 +57,9 @@
void (*pin_config_group_dbg_show) (struct pinctrl_dev *pctldev,
struct seq_file *s,
unsigned selector);
+ void (*pin_config_config_dbg_show) (struct pinctrl_dev *pctldev,
+ struct seq_file *s,
+ unsigned long config);
};
#endif
diff --git a/include/linux/pinctrl/pinctrl-state.h b/include/linux/pinctrl/pinctrl-state.h
index 3920e28..b5919f8 100644
--- a/include/linux/pinctrl/pinctrl-state.h
+++ b/include/linux/pinctrl/pinctrl-state.h
@@ -2,5 +2,23 @@
* Standard pin control state definitions
*/
+/**
+ * @PINCTRL_STATE_DEFAULT: the state the pinctrl handle shall be put
+ * into as default, usually this means the pins are up and ready to
+ * be used by the device driver. This state is commonly used by
+ * hogs to configure muxing and pins at boot, and also as a state
+ * to go into when returning from sleep and idle in
+ * .pm_runtime_resume() or ordinary .resume() for example.
+ * @PINCTRL_STATE_IDLE: the state the pinctrl handle shall be put into
+ * when the pins are idle. This is a state where the system is relaxed
+ * but not fully sleeping - some power may be on but clocks gated for
+ * example. Could typically be set from a pm_runtime_suspend() or
+ * pm_runtime_idle() operation.
+ * @PINCTRL_STATE_SLEEP: the state the pinctrl handle shall be put into
+ * when the pins are sleeping. This is a state where the system is in
+ * its lowest sleep state. Could typically be set from an
+ * ordinary .suspend() function.
+ */
#define PINCTRL_STATE_DEFAULT "default"
#define PINCTRL_STATE_IDLE "idle"
+#define PINCTRL_STATE_SLEEP "sleep"
diff --git a/include/linux/pinctrl/pinctrl.h b/include/linux/pinctrl/pinctrl.h
index 4e9f078..d19ad40 100644
--- a/include/linux/pinctrl/pinctrl.h
+++ b/include/linux/pinctrl/pinctrl.h
@@ -21,9 +21,11 @@
struct device;
struct pinctrl_dev;
+struct pinctrl_map;
struct pinmux_ops;
struct pinconf_ops;
struct gpio_chip;
+struct device_node;
/**
* struct pinctrl_pin_desc - boards/machines provide information on their
@@ -64,17 +66,24 @@
/**
* struct pinctrl_ops - global pin control operations, to be implemented by
* pin controller drivers.
- * @list_groups: list the number of selectable named groups available
- * in this pinmux driver, the core will begin on 0 and call this
- * repeatedly as long as it returns >= 0 to enumerate the groups
+ * @get_groups_count: Returns the count of total number of groups registered.
* @get_group_name: return the group name of the pin group
* @get_group_pins: return an array of pins corresponding to a certain
* group selector @pins, and the size of the array in @num_pins
* @pin_dbg_show: optional debugfs display hook that will provide per-device
* info for a certain pin in debugfs
+ * @dt_node_to_map: parse a device tree "pin configuration node", and create
+ * mapping table entries for it. These are returned through the @map and
+ * @num_maps output parameters. This function is optional, and may be
+ * omitted for pinctrl drivers that do not support device tree.
+ * @dt_free_map: free mapping table entries created via @dt_node_to_map. The
+ * top-level @map pointer must be freed, along with any dynamically
+ * allocated members of the mapping table entries themselves. This
+ * function is optional, and may be omitted for pinctrl drivers that do
+ * not support device tree.
*/
struct pinctrl_ops {
- int (*list_groups) (struct pinctrl_dev *pctldev, unsigned selector);
+ int (*get_groups_count) (struct pinctrl_dev *pctldev);
const char *(*get_group_name) (struct pinctrl_dev *pctldev,
unsigned selector);
int (*get_group_pins) (struct pinctrl_dev *pctldev,
@@ -83,6 +92,11 @@
unsigned *num_pins);
void (*pin_dbg_show) (struct pinctrl_dev *pctldev, struct seq_file *s,
unsigned offset);
+ int (*dt_node_to_map) (struct pinctrl_dev *pctldev,
+ struct device_node *np_config,
+ struct pinctrl_map **map, unsigned *num_maps);
+ void (*dt_free_map) (struct pinctrl_dev *pctldev,
+ struct pinctrl_map *map, unsigned num_maps);
};
/**
@@ -117,9 +131,30 @@
extern bool pin_is_valid(struct pinctrl_dev *pctldev, int pin);
extern void pinctrl_add_gpio_range(struct pinctrl_dev *pctldev,
struct pinctrl_gpio_range *range);
+extern void pinctrl_add_gpio_ranges(struct pinctrl_dev *pctldev,
+ struct pinctrl_gpio_range *ranges,
+ unsigned nranges);
extern void pinctrl_remove_gpio_range(struct pinctrl_dev *pctldev,
struct pinctrl_gpio_range *range);
+
+extern struct pinctrl_dev *pinctrl_find_and_add_gpio_range(const char *devname,
+ struct pinctrl_gpio_range *range);
+extern struct pinctrl_gpio_range *
+pinctrl_find_gpio_range_from_pin(struct pinctrl_dev *pctldev,
+ unsigned int pin);
+
+#ifdef CONFIG_OF
+extern struct pinctrl_dev *of_pinctrl_get(struct device_node *np);
+#else
+static inline
+struct pinctrl_dev *of_pinctrl_get(struct device_node *np)
+{
+ return NULL;
+}
+#endif /* CONFIG_OF */
+
extern const char *pinctrl_dev_get_name(struct pinctrl_dev *pctldev);
+extern const char *pinctrl_dev_get_devname(struct pinctrl_dev *pctldev);
extern void *pinctrl_dev_get_drvdata(struct pinctrl_dev *pctldev);
#else
diff --git a/include/linux/pinctrl/pinmux.h b/include/linux/pinctrl/pinmux.h
index 47e9237..1818dcb 100644
--- a/include/linux/pinctrl/pinmux.h
+++ b/include/linux/pinctrl/pinmux.h
@@ -23,15 +23,14 @@
/**
* struct pinmux_ops - pinmux operations, to be implemented by pin controller
* drivers that support pinmuxing
- * @request: called by the core to see if a certain pin can be made available
+ * @request: called by the core to see if a certain pin can be made
* available for muxing. This is called by the core to acquire the pins
* before selecting any actual mux setting across a function. The driver
* is allowed to answer "no" by returning a negative error code
* @free: the reverse function of the request() callback, frees a pin after
* being requested
- * @list_functions: list the number of selectable named functions available
- * in this pinmux driver, the core will begin on 0 and call this
- * repeatedly as long as it returns >= 0 to enumerate mux settings
+ * @get_functions_count: returns number of selectable named functions available
+ * in this pinmux driver
* @get_function_name: return the function name of the muxing selector,
* called by the core to figure out which mux setting it shall map a
* certain device to
@@ -62,7 +61,7 @@
struct pinmux_ops {
int (*request) (struct pinctrl_dev *pctldev, unsigned offset);
int (*free) (struct pinctrl_dev *pctldev, unsigned offset);
- int (*list_functions) (struct pinctrl_dev *pctldev, unsigned selector);
+ int (*get_functions_count) (struct pinctrl_dev *pctldev);
const char *(*get_function_name) (struct pinctrl_dev *pctldev,
unsigned selector);
int (*get_function_groups) (struct pinctrl_dev *pctldev,
diff --git a/include/linux/power_supply.h b/include/linux/power_supply.h
index 1de9aaa..3d7b1c9 100644
--- a/include/linux/power_supply.h
+++ b/include/linux/power_supply.h
@@ -110,6 +110,7 @@
POWER_SUPPLY_PROP_CHARGE_NOW,
POWER_SUPPLY_PROP_CHARGE_AVG,
POWER_SUPPLY_PROP_CHARGE_COUNTER,
+ POWER_SUPPLY_PROP_CHARGE_COUNTER_SHADOW,
POWER_SUPPLY_PROP_ENERGY_FULL_DESIGN,
POWER_SUPPLY_PROP_ENERGY_EMPTY_DESIGN,
POWER_SUPPLY_PROP_ENERGY_FULL,
@@ -280,6 +281,7 @@
case POWER_SUPPLY_PROP_CHARGE_NOW:
case POWER_SUPPLY_PROP_CHARGE_AVG:
case POWER_SUPPLY_PROP_CHARGE_COUNTER:
+ case POWER_SUPPLY_PROP_CHARGE_COUNTER_SHADOW:
case POWER_SUPPLY_PROP_CURRENT_MAX:
case POWER_SUPPLY_PROP_CURRENT_NOW:
case POWER_SUPPLY_PROP_CURRENT_AVG:
diff --git a/include/linux/regulator/krait-regulator.h b/include/linux/regulator/krait-regulator.h
index 2683fd7..bd2ca82 100644
--- a/include/linux/regulator/krait-regulator.h
+++ b/include/linux/regulator/krait-regulator.h
@@ -26,14 +26,14 @@
#ifdef CONFIG_ARCH_MSM8974
int __init krait_power_init(void);
-void secondary_cpu_hs_init(void *base_ptr);
+void secondary_cpu_hs_init(void *base_ptr, int cpu);
#else
static inline int __init krait_power_init(void)
{
return -ENOSYS;
}
-static inline void secondary_cpu_hs_init(void *base_ptr) {}
+static inline void secondary_cpu_hs_init(void *base_ptr, int cpu) {}
#endif
#endif
diff --git a/include/linux/rmap.h b/include/linux/rmap.h
index fd07c45..a5ddc60 100644
--- a/include/linux/rmap.h
+++ b/include/linux/rmap.h
@@ -67,6 +67,17 @@
struct list_head same_anon_vma; /* locked by anon_vma->mutex */
};
+enum ttu_flags {
+ TTU_UNMAP = 0, /* unmap mode */
+ TTU_MIGRATION = 1, /* migration mode */
+ TTU_MUNLOCK = 2, /* munlock mode */
+ TTU_ACTION_MASK = 0xff,
+
+ TTU_IGNORE_MLOCK = (1 << 8), /* ignore mlock */
+ TTU_IGNORE_ACCESS = (1 << 9), /* don't age */
+ TTU_IGNORE_HWPOISON = (1 << 10),/* corrupted page is recoverable */
+};
+
#ifdef CONFIG_MMU
static inline void get_anon_vma(struct anon_vma *anon_vma)
{
@@ -161,16 +172,6 @@
int page_referenced_one(struct page *, struct vm_area_struct *,
unsigned long address, unsigned int *mapcount, unsigned long *vm_flags);
-enum ttu_flags {
- TTU_UNMAP = 0, /* unmap mode */
- TTU_MIGRATION = 1, /* migration mode */
- TTU_MUNLOCK = 2, /* munlock mode */
- TTU_ACTION_MASK = 0xff,
-
- TTU_IGNORE_MLOCK = (1 << 8), /* ignore mlock */
- TTU_IGNORE_ACCESS = (1 << 9), /* don't age */
- TTU_IGNORE_HWPOISON = (1 << 10),/* corrupted page is recoverable */
-};
#define TTU_ACTION(x) ((x) & TTU_ACTION_MASK)
bool is_vma_temporary_stack(struct vm_area_struct *vma);
diff --git a/include/linux/skbuff.h b/include/linux/skbuff.h
index 111f26b..c168907 100644
--- a/include/linux/skbuff.h
+++ b/include/linux/skbuff.h
@@ -1881,8 +1881,6 @@
{
int delta = 0;
- if (headroom < NET_SKB_PAD)
- headroom = NET_SKB_PAD;
if (headroom > skb_headroom(skb))
delta = headroom - skb_headroom(skb);
diff --git a/include/linux/slimbus/slimbus.h b/include/linux/slimbus/slimbus.h
index 5c5b777..132135e 100644
--- a/include/linux/slimbus/slimbus.h
+++ b/include/linux/slimbus/slimbus.h
@@ -511,8 +511,11 @@
* @wakeup: This function pointer implements controller-specific procedure
* to wake it up from clock-pause. Framework will call this to bring
* the controller out of clock pause.
- * @config_port: Configure a port and make it ready for data transfer. This is
- * called by framework after connect_port message is sent successfully.
+ * @alloc_port: Allocate a port and make it ready for data transfer. This is
+ * called by framework to make sure controller can take necessary steps
+ * to initialize its port
+ * @dealloc_port: Counter-part of alloc_port. This is called by framework so
+ * that controller can free resources associated with this port
* @framer_handover: If this controller has multiple framers, this API will
* be called to switch between framers if controller desires to change
* the active framer.
@@ -557,7 +560,9 @@
int (*get_laddr)(struct slim_controller *ctrl,
const u8 *ea, u8 elen, u8 *laddr);
int (*wakeup)(struct slim_controller *ctrl);
- int (*config_port)(struct slim_controller *ctrl,
+ int (*alloc_port)(struct slim_controller *ctrl,
+ u8 port);
+ void (*dealloc_port)(struct slim_controller *ctrl,
u8 port);
int (*framer_handover)(struct slim_controller *ctrl,
struct slim_framer *new_framer);
@@ -795,6 +800,8 @@
* Channel specified in chanh needs to be allocated first.
* Returns -EALREADY if source is already configured for this channel.
* Returns -ENOTCONN if channel is not allocated
+ * Returns -EINVAL if invalid direction is specified for non-manager port,
+ * or if the manager side port number is out of bounds, or in incorrect state
*/
extern int slim_connect_src(struct slim_device *sb, u32 srch, u16 chanh);
@@ -808,6 +815,9 @@
* Channel specified in chanh needs to be allocated first.
* Returns -EALREADY if sink is already configured for this channel.
* Returns -ENOTCONN if channel is not allocated
+ * Returns -EINVAL if invalid parameters are passed, or invalid direction is
+ * specified for non-manager port, or if the manager side port number is out of
+ * bounds, or in incorrect state
*/
extern int slim_connect_sink(struct slim_device *sb, u32 *sinkh, int nsink,
u16 chanh);
diff --git a/include/linux/swap.h b/include/linux/swap.h
index b1fd5c7..d5bd6ee 100644
--- a/include/linux/swap.h
+++ b/include/linux/swap.h
@@ -251,7 +251,7 @@
/* linux/mm/vmscan.c */
extern unsigned long try_to_free_pages(struct zonelist *zonelist, int order,
gfp_t gfp_mask, nodemask_t *mask);
-extern int __isolate_lru_page(struct page *page, isolate_mode_t mode, int file);
+extern int __isolate_lru_page(struct page *page, isolate_mode_t mode);
extern unsigned long try_to_free_mem_cgroup_pages(struct mem_cgroup *mem,
gfp_t gfp_mask, bool noswap);
extern unsigned long mem_cgroup_shrink_node_zone(struct mem_cgroup *mem,
@@ -355,23 +355,6 @@
extern int try_to_free_swap(struct page *);
struct backing_dev_info;
-/* linux/mm/thrash.c */
-extern struct mm_struct *swap_token_mm;
-extern void grab_swap_token(struct mm_struct *);
-extern void __put_swap_token(struct mm_struct *);
-extern void disable_swap_token(struct mem_cgroup *memcg);
-
-static inline int has_swap_token(struct mm_struct *mm)
-{
- return (mm == swap_token_mm);
-}
-
-static inline void put_swap_token(struct mm_struct *mm)
-{
- if (has_swap_token(mm))
- __put_swap_token(mm);
-}
-
#ifdef CONFIG_CGROUP_MEM_RES_CTLR
extern void
mem_cgroup_uncharge_swapcache(struct page *page, swp_entry_t ent, bool swapout);
@@ -476,24 +459,6 @@
return entry;
}
-/* linux/mm/thrash.c */
-static inline void put_swap_token(struct mm_struct *mm)
-{
-}
-
-static inline void grab_swap_token(struct mm_struct *mm)
-{
-}
-
-static inline int has_swap_token(struct mm_struct *mm)
-{
- return 0;
-}
-
-static inline void disable_swap_token(struct mem_cgroup *memcg)
-{
-}
-
static inline void
mem_cgroup_uncharge_swapcache(struct page *page, swp_entry_t ent)
{
diff --git a/include/linux/usb/gadget.h b/include/linux/usb/gadget.h
index 82044f7..fea832e 100644
--- a/include/linux/usb/gadget.h
+++ b/include/linux/usb/gadget.h
@@ -545,6 +545,7 @@
const char *name;
struct device dev;
u8 usb_core_id;
+ bool l1_supported;
};
static inline void set_gadget_data(struct usb_gadget *gadget, void *data)
diff --git a/include/linux/usb/msm_hsusb.h b/include/linux/usb/msm_hsusb.h
index f9729c4..44c6d7f 100644
--- a/include/linux/usb/msm_hsusb.h
+++ b/include/linux/usb/msm_hsusb.h
@@ -42,6 +42,20 @@
#define MSM_VENDOR_ID BIT(16)
/**
+ * Requested USB votes for BUS bandwidth
+ *
+ * USB_NO_PERF_VOTE BUS Vote for inactive USB session or disconnect
+ * USB_MAX_PERF_VOTE Maximum BUS bandwidth vote
+ * USB_MIN_PERF_VOTE Minimum BUS bandwidth vote (for some hw same as NO_PERF)
+ *
+ */
+enum usb_bus_vote {
+ USB_NO_PERF_VOTE = 0,
+ USB_MAX_PERF_VOTE,
+ USB_MIN_PERF_VOTE,
+};
+
+/**
* Supported USB modes
*
* USB_PERIPHERAL Only peripheral mode is supported.
@@ -204,6 +218,10 @@
* @enable_sec_phy: Use second HSPHY with USB2 core
* @bus_scale_table: parameters for bus bandwidth requirements
* @mhl_dev_name: MHL device name used to register with MHL driver.
+ * @log2_itc: value of 2^(log2_itc-1) will be used as the
+ * interrupt threshold (ITC), when log2_itc is
+ * between 1 to 7.
+ * @l1_supported: enable link power management support.
*/
struct msm_otg_platform_data {
int *phy_init_seq;
@@ -227,6 +245,8 @@
bool enable_sec_phy;
struct msm_bus_scale_pdata *bus_scale_table;
const char *mhl_dev_name;
+ int log2_itc;
+ bool l1_supported;
};
/* phy related flags */
@@ -402,6 +422,17 @@
unsigned int current_max;
};
+struct ci13xxx_platform_data {
+ u8 usb_core_id;
+ /*
+ * value of 2^(log2_itc-1) will be used as the interrupt threshold
+ * (ITC), when log2_itc is between 1 to 7.
+ */
+ int log2_itc;
+ void *prv_data;
+ bool l1_supported;
+};
+
struct msm_hsic_host_platform_data {
unsigned strobe;
unsigned data;
diff --git a/include/linux/usb/msm_hsusb_hw.h b/include/linux/usb/msm_hsusb_hw.h
index 0d57d93..f3f4c3b 100644
--- a/include/linux/usb/msm_hsusb_hw.h
+++ b/include/linux/usb/msm_hsusb_hw.h
@@ -39,6 +39,15 @@
#define USB_USBINTR (MSM_USB_BASE + 0x0148)
#define USB_FRINDEX (MSM_USB_BASE + 0x014C)
+#define USB_L1_EP_CTRL (MSM_USB_BASE + 0x0250)
+#define USB_L1_CONFIG (MSM_USB_BASE + 0x0254)
+
+#define L1_CONFIG_LPM_EN BIT(4)
+#define L1_CONFIG_REMOTE_WAKEUP BIT(5)
+#define L1_CONFIG_GATE_SYS_CLK BIT(7)
+#define L1_CONFIG_PHY_LPM BIT(10)
+#define L1_CONFIG_PLL BIT(11)
+
#define PORTSC_PHCD (1 << 23) /* phy suspend mode */
#define PORTSC_PTS_MASK (3 << 30)
#define PORTSC_PTS_ULPI (3 << 30)
diff --git a/include/linux/usb/usbnet.h b/include/linux/usb/usbnet.h
index 72f5c96..642c4fe 100644
--- a/include/linux/usb/usbnet.h
+++ b/include/linux/usb/usbnet.h
@@ -131,6 +131,9 @@
/* link reset handling, called from defer_kevent */
int (*link_reset)(struct usbnet *);
+ /*in case if usbnet wrapper wants to override rx_complete()*/
+ void (*rx_complete) (struct urb *);
+
/* fixup rx packet (strip framing) */
int (*rx_fixup)(struct usbnet *dev, struct sk_buff *skb);
@@ -228,5 +231,7 @@
extern void usbnet_set_msglevel(struct net_device *, u32);
extern void usbnet_get_drvinfo(struct net_device *, struct ethtool_drvinfo *);
extern int usbnet_nway_reset(struct net_device *net);
+extern void usbnet_terminate_urbs(struct usbnet *dev);
+extern void rx_complete(struct urb *urb);
#endif /* __LINUX_USB_USBNET_H */
diff --git a/include/linux/videodev2.h b/include/linux/videodev2.h
index e883ad7..5c7ae02 100644
--- a/include/linux/videodev2.h
+++ b/include/linux/videodev2.h
@@ -1576,6 +1576,7 @@
V4L2_MPEG_VIDEO_H264_PROFILE_SCALABLE_HIGH_INTRA = 14,
V4L2_MPEG_VIDEO_H264_PROFILE_STEREO_HIGH = 15,
V4L2_MPEG_VIDEO_H264_PROFILE_MULTIVIEW_HIGH = 16,
+ V4L2_MPEG_VIDEO_H264_PROFILE_CONSTRAINED_HIGH = 17,
};
#define V4L2_CID_MPEG_VIDEO_H264_VUI_EXT_SAR_HEIGHT (V4L2_CID_MPEG_BASE+364)
#define V4L2_CID_MPEG_VIDEO_H264_VUI_EXT_SAR_WIDTH (V4L2_CID_MPEG_BASE+365)
@@ -1844,9 +1845,11 @@
#define V4L2_CID_MPEG_VIDC_SET_PERF_LEVEL (V4L2_CID_MPEG_MSM_VIDC_BASE + 26)
enum v4l2_mpeg_vidc_perf_level {
- V4L2_CID_MPEG_VIDC_PERF_LEVEL_PERFORMANCE = 0,
- V4L2_CID_MPEG_VIDC_PERF_LEVEL_TURBO = 1,
+ V4L2_CID_MPEG_VIDC_PERF_LEVEL_NOMINAL = 0,
+ V4L2_CID_MPEG_VIDC_PERF_LEVEL_PERFORMANCE = 1,
+ V4L2_CID_MPEG_VIDC_PERF_LEVEL_TURBO = 2,
};
+
#define V4L2_CID_MPEG_VIDEO_MULTI_SLICE_GOB \
(V4L2_CID_MPEG_MSM_VIDC_BASE+27)
#define V4L2_CID_MPEG_VIDEO_MULTI_SLICE_DELIVERY_MODE \
diff --git a/include/linux/vm_event_item.h b/include/linux/vm_event_item.h
index 06f8e38..8bbb324 100644
--- a/include/linux/vm_event_item.h
+++ b/include/linux/vm_event_item.h
@@ -37,8 +37,12 @@
KSWAPD_LOW_WMARK_HIT_QUICKLY, KSWAPD_HIGH_WMARK_HIT_QUICKLY,
KSWAPD_SKIP_CONGESTION_WAIT,
PAGEOUTRUN, ALLOCSTALL, PGROTATED,
+#ifdef CONFIG_MIGRATION
+ PGMIGRATE_SUCCESS, PGMIGRATE_FAIL,
+#endif
#ifdef CONFIG_COMPACTION
- COMPACTBLOCKS, COMPACTPAGES, COMPACTPAGEFAILED,
+ COMPACTMIGRATE_SCANNED, COMPACTFREE_SCANNED,
+ COMPACTISOLATED,
COMPACTSTALL, COMPACTFAIL, COMPACTSUCCESS,
#endif
#ifdef CONFIG_HUGETLB_PAGE
diff --git a/include/linux/wcnss_wlan.h b/include/linux/wcnss_wlan.h
index 2ba585e..717bd73 100644
--- a/include/linux/wcnss_wlan.h
+++ b/include/linux/wcnss_wlan.h
@@ -30,6 +30,12 @@
int use_48mhz_xo;
};
+enum {
+ WCNSS_XO_48MHZ = 1,
+ WCNSS_XO_19MHZ,
+ WCNSS_XO_INVALID,
+};
+
#define WCNSS_WLAN_IRQ_INVALID -1
#define HAVE_WCNSS_SUSPEND_RESUME_NOTIFY 1
#define HAVE_WCNSS_RESET_INTR 1
@@ -52,7 +58,8 @@
struct wcnss_wlan_config *wcnss_get_wlan_config(void);
int wcnss_wlan_power(struct device *dev,
struct wcnss_wlan_config *cfg,
- enum wcnss_opcode opcode);
+ enum wcnss_opcode opcode,
+ int *iris_xo_mode_set);
int wcnss_req_power_on_lock(char *driver_name);
int wcnss_free_power_on_lock(char *driver_name);
unsigned int wcnss_get_serial_number(void);
@@ -71,6 +78,7 @@
void wcnss_riva_dump_pmic_regs(void);
int wcnss_xo_auto_detect_enabled(void);
u32 wcnss_get_wlan_rx_buff_count(void);
+int wcnss_wlan_iris_xo_mode(void);
#define wcnss_wlan_get_drvdata(dev) dev_get_drvdata(dev)
#define wcnss_wlan_set_drvdata(dev, data) dev_set_drvdata((dev), (data))
diff --git a/include/media/msmb_isp.h b/include/media/msmb_isp.h
index 25d528d7..4d36688 100644
--- a/include/media/msmb_isp.h
+++ b/include/media/msmb_isp.h
@@ -375,6 +375,7 @@
#define V4L2_PIX_FMT_QRGGB12 v4l2_fourcc('Q', 'R', 'G', '2')
#define V4L2_PIX_FMT_NV14 v4l2_fourcc('N', 'V', '1', '4')
#define V4L2_PIX_FMT_NV41 v4l2_fourcc('N', 'V', '4', '1')
+#define V4L2_PIX_FMT_META v4l2_fourcc('Q', 'M', 'E', 'T')
#define VIDIOC_MSM_VFE_REG_CFG \
_IOWR('V', BASE_VIDIOC_PRIVATE, struct msm_vfe_cfg_cmd2)
diff --git a/include/media/msmb_ispif.h b/include/media/msmb_ispif.h
index c9eb12a..61dfd52 100644
--- a/include/media/msmb_ispif.h
+++ b/include/media/msmb_ispif.h
@@ -1,8 +1,10 @@
#ifndef MSM_CAM_ISPIF_H
#define MSM_CAM_ISPIF_H
-#define CSID_VERSION_V2 0x02000011
-#define CSID_VERSION_V3 0x30000000
+#define CSID_VERSION_V20 0x02000011
+#define CSID_VERSION_V22 0x02001000
+#define CSID_VERSION_V30 0x30000000
+#define CSID_VERSION_V3 0x30000000
enum msm_ispif_vfe_intf {
VFE0,
diff --git a/include/media/msmb_pproc.h b/include/media/msmb_pproc.h
index 6cd4995..8e9aedf 100644
--- a/include/media/msmb_pproc.h
+++ b/include/media/msmb_pproc.h
@@ -69,6 +69,7 @@
int bytes_per_pixel;
unsigned int source_address;
unsigned int destination_address;
+ unsigned int compl_destination_address;
unsigned int src_stride;
unsigned int dst_stride;
int rotate_270;
diff --git a/include/sound/apr_audio-v2.h b/include/sound/apr_audio-v2.h
index 0d3b5a0..7e98ef3 100644
--- a/include/sound/apr_audio-v2.h
+++ b/include/sound/apr_audio-v2.h
@@ -6930,8 +6930,8 @@
} __packed;
/* Ultrasound supported formats */
-#define US_POINT_EPOS_FORMAT 0x00012310
-#define US_RAW_FORMAT 0x0001127C
-#define US_PROX_FORMAT 0x0001272B
+#define US_POINT_EPOS_FORMAT_V2 0x0001272D
+#define US_RAW_FORMAT_V2 0x0001272C
+#define US_PROX_FORMAT_V2 0x0001272E
#endif /*_APR_AUDIO_V2_H_ */
diff --git a/include/sound/compress_offload.h b/include/sound/compress_offload.h
index e59d29c..3034ddc 100644
--- a/include/sound/compress_offload.h
+++ b/include/sound/compress_offload.h
@@ -169,4 +169,6 @@
*
*/
#define SND_COMPR_TRIGGER_DRAIN 7 /*FIXME move this to pcm.h */
+
+#define SNDRV_COMPRESS_METADATA_MODE _IOW('C', 0x99, bool)
#endif
diff --git a/include/trace/events/vmscan.h b/include/trace/events/vmscan.h
index f64560e..bab3b87 100644
--- a/include/trace/events/vmscan.h
+++ b/include/trace/events/vmscan.h
@@ -13,7 +13,7 @@
#define RECLAIM_WB_ANON 0x0001u
#define RECLAIM_WB_FILE 0x0002u
#define RECLAIM_WB_MIXED 0x0010u
-#define RECLAIM_WB_SYNC 0x0004u
+#define RECLAIM_WB_SYNC 0x0004u /* Unused, all reclaim async */
#define RECLAIM_WB_ASYNC 0x0008u
#define show_reclaim_flags(flags) \
@@ -25,15 +25,15 @@
{RECLAIM_WB_ASYNC, "RECLAIM_WB_ASYNC"} \
) : "RECLAIM_WB_NONE"
-#define trace_reclaim_flags(page, sync) ( \
+#define trace_reclaim_flags(page) ( \
(page_is_file_cache(page) ? RECLAIM_WB_FILE : RECLAIM_WB_ANON) | \
- (sync & RECLAIM_MODE_SYNC ? RECLAIM_WB_SYNC : RECLAIM_WB_ASYNC) \
+ (RECLAIM_WB_ASYNC) \
)
-#define trace_shrink_flags(file, sync) ( \
- (sync & RECLAIM_MODE_SYNC ? RECLAIM_WB_MIXED : \
- (file ? RECLAIM_WB_FILE : RECLAIM_WB_ANON)) | \
- (sync & RECLAIM_MODE_SYNC ? RECLAIM_WB_SYNC : RECLAIM_WB_ASYNC) \
+#define trace_shrink_flags(file) \
+ ( \
+ (file ? RECLAIM_WB_FILE : RECLAIM_WB_ANON) | \
+ (RECLAIM_WB_ASYNC) \
)
TRACE_EVENT(mm_vmscan_kswapd_sleep,
@@ -263,22 +263,16 @@
unsigned long nr_requested,
unsigned long nr_scanned,
unsigned long nr_taken,
- unsigned long nr_lumpy_taken,
- unsigned long nr_lumpy_dirty,
- unsigned long nr_lumpy_failed,
isolate_mode_t isolate_mode,
int file),
- TP_ARGS(order, nr_requested, nr_scanned, nr_taken, nr_lumpy_taken, nr_lumpy_dirty, nr_lumpy_failed, isolate_mode, file),
+ TP_ARGS(order, nr_requested, nr_scanned, nr_taken, isolate_mode, file),
TP_STRUCT__entry(
__field(int, order)
__field(unsigned long, nr_requested)
__field(unsigned long, nr_scanned)
__field(unsigned long, nr_taken)
- __field(unsigned long, nr_lumpy_taken)
- __field(unsigned long, nr_lumpy_dirty)
- __field(unsigned long, nr_lumpy_failed)
__field(isolate_mode_t, isolate_mode)
__field(int, file)
),
@@ -288,22 +282,16 @@
__entry->nr_requested = nr_requested;
__entry->nr_scanned = nr_scanned;
__entry->nr_taken = nr_taken;
- __entry->nr_lumpy_taken = nr_lumpy_taken;
- __entry->nr_lumpy_dirty = nr_lumpy_dirty;
- __entry->nr_lumpy_failed = nr_lumpy_failed;
__entry->isolate_mode = isolate_mode;
__entry->file = file;
),
- TP_printk("isolate_mode=%d order=%d nr_requested=%lu nr_scanned=%lu nr_taken=%lu contig_taken=%lu contig_dirty=%lu contig_failed=%lu file=%d",
+ TP_printk("isolate_mode=%d order=%d nr_requested=%lu nr_scanned=%lu nr_taken=%lu file=%d",
__entry->isolate_mode,
__entry->order,
__entry->nr_requested,
__entry->nr_scanned,
__entry->nr_taken,
- __entry->nr_lumpy_taken,
- __entry->nr_lumpy_dirty,
- __entry->nr_lumpy_failed,
__entry->file)
);
@@ -313,13 +301,10 @@
unsigned long nr_requested,
unsigned long nr_scanned,
unsigned long nr_taken,
- unsigned long nr_lumpy_taken,
- unsigned long nr_lumpy_dirty,
- unsigned long nr_lumpy_failed,
isolate_mode_t isolate_mode,
int file),
- TP_ARGS(order, nr_requested, nr_scanned, nr_taken, nr_lumpy_taken, nr_lumpy_dirty, nr_lumpy_failed, isolate_mode, file)
+ TP_ARGS(order, nr_requested, nr_scanned, nr_taken, isolate_mode, file)
);
@@ -329,13 +314,10 @@
unsigned long nr_requested,
unsigned long nr_scanned,
unsigned long nr_taken,
- unsigned long nr_lumpy_taken,
- unsigned long nr_lumpy_dirty,
- unsigned long nr_lumpy_failed,
isolate_mode_t isolate_mode,
int file),
- TP_ARGS(order, nr_requested, nr_scanned, nr_taken, nr_lumpy_taken, nr_lumpy_dirty, nr_lumpy_failed, isolate_mode, file)
+ TP_ARGS(order, nr_requested, nr_scanned, nr_taken, isolate_mode, file)
);
@@ -395,88 +377,6 @@
show_reclaim_flags(__entry->reclaim_flags))
);
-TRACE_EVENT(replace_swap_token,
- TP_PROTO(struct mm_struct *old_mm,
- struct mm_struct *new_mm),
-
- TP_ARGS(old_mm, new_mm),
-
- TP_STRUCT__entry(
- __field(struct mm_struct*, old_mm)
- __field(unsigned int, old_prio)
- __field(struct mm_struct*, new_mm)
- __field(unsigned int, new_prio)
- ),
-
- TP_fast_assign(
- __entry->old_mm = old_mm;
- __entry->old_prio = old_mm ? old_mm->token_priority : 0;
- __entry->new_mm = new_mm;
- __entry->new_prio = new_mm->token_priority;
- ),
-
- TP_printk("old_token_mm=%p old_prio=%u new_token_mm=%p new_prio=%u",
- __entry->old_mm, __entry->old_prio,
- __entry->new_mm, __entry->new_prio)
-);
-
-DECLARE_EVENT_CLASS(put_swap_token_template,
- TP_PROTO(struct mm_struct *swap_token_mm),
-
- TP_ARGS(swap_token_mm),
-
- TP_STRUCT__entry(
- __field(struct mm_struct*, swap_token_mm)
- ),
-
- TP_fast_assign(
- __entry->swap_token_mm = swap_token_mm;
- ),
-
- TP_printk("token_mm=%p", __entry->swap_token_mm)
-);
-
-DEFINE_EVENT(put_swap_token_template, put_swap_token,
- TP_PROTO(struct mm_struct *swap_token_mm),
- TP_ARGS(swap_token_mm)
-);
-
-DEFINE_EVENT_CONDITION(put_swap_token_template, disable_swap_token,
- TP_PROTO(struct mm_struct *swap_token_mm),
- TP_ARGS(swap_token_mm),
- TP_CONDITION(swap_token_mm != NULL)
-);
-
-TRACE_EVENT_CONDITION(update_swap_token_priority,
- TP_PROTO(struct mm_struct *mm,
- unsigned int old_prio,
- struct mm_struct *swap_token_mm),
-
- TP_ARGS(mm, old_prio, swap_token_mm),
-
- TP_CONDITION(mm->token_priority != old_prio),
-
- TP_STRUCT__entry(
- __field(struct mm_struct*, mm)
- __field(unsigned int, old_prio)
- __field(unsigned int, new_prio)
- __field(struct mm_struct*, swap_token_mm)
- __field(unsigned int, swap_token_prio)
- ),
-
- TP_fast_assign(
- __entry->mm = mm;
- __entry->old_prio = old_prio;
- __entry->new_prio = mm->token_priority;
- __entry->swap_token_mm = swap_token_mm;
- __entry->swap_token_prio = swap_token_mm ? swap_token_mm->token_priority : 0;
- ),
-
- TP_printk("mm=%p old_prio=%u new_prio=%u swap_token_mm=%p token_prio=%u",
- __entry->mm, __entry->old_prio, __entry->new_prio,
- __entry->swap_token_mm, __entry->swap_token_prio)
-);
-
#endif /* _TRACE_VMSCAN_H */
/* This part must be outside protection */
diff --git a/include/video/msm_hdmi_modes.h b/include/video/msm_hdmi_modes.h
index ced6acb..87da941 100644
--- a/include/video/msm_hdmi_modes.h
+++ b/include/video/msm_hdmi_modes.h
@@ -211,53 +211,73 @@
LUT[MODE] = mode;\
} while (0)
-static inline void MSM_HDMI_MODES_INIT_TIMINGS(
- struct msm_hdmi_mode_timing_info *lut)
-{
- int i;
+#define MSM_HDMI_MODES_INIT_TIMINGS(__lut) \
+do { \
+ unsigned int i; \
+ for (i = 0; i < HDMI_VFRMT_MAX; i++) { \
+ struct msm_hdmi_mode_timing_info mode = \
+ VFRMT_NOT_SUPPORTED(i); \
+ (__lut)[i] = mode; \
+ } \
+} while (0)
- for (i = 0; i < HDMI_VFRMT_MAX; i++) {
- struct msm_hdmi_mode_timing_info mode = VFRMT_NOT_SUPPORTED(i);
- lut[i] = mode;
- }
-}
-
-static inline void MSM_HDMI_MODES_SET_SUPP_TIMINGS(
- struct msm_hdmi_mode_timing_info *lut, int type)
-{
- if (type & MSM_HDMI_MODES_CEA) {
- MSM_HDMI_MODES_SET_TIMING(lut, HDMI_VFRMT_640x480p60_4_3);
- MSM_HDMI_MODES_SET_TIMING(lut, HDMI_VFRMT_720x480p60_4_3);
- MSM_HDMI_MODES_SET_TIMING(lut, HDMI_VFRMT_720x480p60_16_9);
- MSM_HDMI_MODES_SET_TIMING(lut, HDMI_VFRMT_1280x720p60_16_9);
- MSM_HDMI_MODES_SET_TIMING(lut, HDMI_VFRMT_1920x1080i60_16_9);
- MSM_HDMI_MODES_SET_TIMING(lut, HDMI_VFRMT_1440x480i60_4_3);
- MSM_HDMI_MODES_SET_TIMING(lut, HDMI_VFRMT_1440x480i60_16_9);
- MSM_HDMI_MODES_SET_TIMING(lut, HDMI_VFRMT_1920x1080p60_16_9);
- MSM_HDMI_MODES_SET_TIMING(lut, HDMI_VFRMT_720x576p50_4_3);
- MSM_HDMI_MODES_SET_TIMING(lut, HDMI_VFRMT_720x576p50_16_9);
- MSM_HDMI_MODES_SET_TIMING(lut, HDMI_VFRMT_1280x720p50_16_9);
- MSM_HDMI_MODES_SET_TIMING(lut, HDMI_VFRMT_1440x576i50_4_3);
- MSM_HDMI_MODES_SET_TIMING(lut, HDMI_VFRMT_1440x576i50_16_9);
- MSM_HDMI_MODES_SET_TIMING(lut, HDMI_VFRMT_1920x1080p50_16_9);
- MSM_HDMI_MODES_SET_TIMING(lut, HDMI_VFRMT_1920x1080p24_16_9);
- MSM_HDMI_MODES_SET_TIMING(lut, HDMI_VFRMT_1920x1080p25_16_9);
- MSM_HDMI_MODES_SET_TIMING(lut, HDMI_VFRMT_1920x1080p30_16_9);
- }
-
- if (type & MSM_HDMI_MODES_XTND) {
- MSM_HDMI_MODES_SET_TIMING(lut, HDMI_VFRMT_3840x2160p30_16_9);
- MSM_HDMI_MODES_SET_TIMING(lut, HDMI_VFRMT_3840x2160p25_16_9);
- MSM_HDMI_MODES_SET_TIMING(lut, HDMI_VFRMT_3840x2160p24_16_9);
- MSM_HDMI_MODES_SET_TIMING(lut, HDMI_VFRMT_4096x2160p24_16_9);
- }
-
- if (type & MSM_HDMI_MODES_DVI) {
- MSM_HDMI_MODES_SET_TIMING(lut, HDMI_VFRMT_1024x768p60_4_3);
- MSM_HDMI_MODES_SET_TIMING(lut, HDMI_VFRMT_1280x1024p60_5_4);
- MSM_HDMI_MODES_SET_TIMING(lut, HDMI_VFRMT_2560x1600p60_16_9);
- }
-}
+#define MSM_HDMI_MODES_SET_SUPP_TIMINGS(__lut, __type) \
+do { \
+ if (__type & MSM_HDMI_MODES_CEA) { \
+ MSM_HDMI_MODES_SET_TIMING(__lut, \
+ HDMI_VFRMT_640x480p60_4_3); \
+ MSM_HDMI_MODES_SET_TIMING(__lut, \
+ HDMI_VFRMT_720x480p60_4_3); \
+ MSM_HDMI_MODES_SET_TIMING(__lut, \
+ HDMI_VFRMT_720x480p60_16_9); \
+ MSM_HDMI_MODES_SET_TIMING(__lut, \
+ HDMI_VFRMT_1280x720p60_16_9); \
+ MSM_HDMI_MODES_SET_TIMING(__lut, \
+ HDMI_VFRMT_1920x1080i60_16_9); \
+ MSM_HDMI_MODES_SET_TIMING(__lut, \
+ HDMI_VFRMT_1440x480i60_4_3); \
+ MSM_HDMI_MODES_SET_TIMING(__lut, \
+ HDMI_VFRMT_1440x480i60_16_9); \
+ MSM_HDMI_MODES_SET_TIMING(__lut, \
+ HDMI_VFRMT_1920x1080p60_16_9); \
+ MSM_HDMI_MODES_SET_TIMING(__lut, \
+ HDMI_VFRMT_720x576p50_4_3); \
+ MSM_HDMI_MODES_SET_TIMING(__lut, \
+ HDMI_VFRMT_720x576p50_16_9); \
+ MSM_HDMI_MODES_SET_TIMING(__lut, \
+ HDMI_VFRMT_1280x720p50_16_9); \
+ MSM_HDMI_MODES_SET_TIMING(__lut, \
+ HDMI_VFRMT_1440x576i50_4_3); \
+ MSM_HDMI_MODES_SET_TIMING(__lut, \
+ HDMI_VFRMT_1440x576i50_16_9); \
+ MSM_HDMI_MODES_SET_TIMING(__lut, \
+ HDMI_VFRMT_1920x1080p50_16_9); \
+ MSM_HDMI_MODES_SET_TIMING(__lut, \
+ HDMI_VFRMT_1920x1080p24_16_9); \
+ MSM_HDMI_MODES_SET_TIMING(__lut, \
+ HDMI_VFRMT_1920x1080p25_16_9); \
+ MSM_HDMI_MODES_SET_TIMING(__lut, \
+ HDMI_VFRMT_1920x1080p30_16_9); \
+ } \
+ if (__type & MSM_HDMI_MODES_XTND) { \
+ MSM_HDMI_MODES_SET_TIMING(__lut, \
+ HDMI_VFRMT_3840x2160p30_16_9); \
+ MSM_HDMI_MODES_SET_TIMING(__lut, \
+ HDMI_VFRMT_3840x2160p25_16_9); \
+ MSM_HDMI_MODES_SET_TIMING(__lut, \
+ HDMI_VFRMT_3840x2160p24_16_9); \
+ MSM_HDMI_MODES_SET_TIMING(__lut, \
+ HDMI_VFRMT_4096x2160p24_16_9); \
+ } \
+ if (__type & MSM_HDMI_MODES_DVI) { \
+ MSM_HDMI_MODES_SET_TIMING(__lut, \
+ HDMI_VFRMT_1024x768p60_4_3); \
+ MSM_HDMI_MODES_SET_TIMING(__lut, \
+ HDMI_VFRMT_1280x1024p60_5_4); \
+ MSM_HDMI_MODES_SET_TIMING(__lut, \
+ HDMI_VFRMT_2560x1600p60_16_9); \
+ } \
+} while (0)
static inline const char *msm_hdmi_mode_2string(uint32_t mode)
{
diff --git a/kernel/cgroup.c b/kernel/cgroup.c
index 2f0d7542..01f68c4 100644
--- a/kernel/cgroup.c
+++ b/kernel/cgroup.c
@@ -4902,7 +4902,7 @@
* @root: the css supporsed to be an ancestor of the child.
*
* Returns true if "root" is an ancestor of "child" in its hierarchy. Because
- * this function reads css->id, this use rcu_dereference() and rcu_read_lock().
+ * this function reads css->id, the caller must hold rcu_read_lock().
* But, considering usual usage, the csses should be valid objects after test.
* Assuming that the caller will do some action to the child if this returns
* returns true, the caller must take "child";s reference count.
@@ -4914,18 +4914,18 @@
{
struct css_id *child_id;
struct css_id *root_id;
- bool ret = true;
- rcu_read_lock();
child_id = rcu_dereference(child->id);
+ if (!child_id)
+ return false;
root_id = rcu_dereference(root->id);
- if (!child_id
- || !root_id
- || (child_id->depth < root_id->depth)
- || (child_id->stack[root_id->depth] != root_id->id))
- ret = false;
- rcu_read_unlock();
- return ret;
+ if (!root_id)
+ return false;
+ if (child_id->depth < root_id->depth)
+ return false;
+ if (child_id->stack[root_id->depth] != root_id->id)
+ return false;
+ return true;
}
void free_css_id(struct cgroup_subsys *ss, struct cgroup_subsys_state *css)
diff --git a/kernel/events/core.c b/kernel/events/core.c
index fd126f8..aafa4c1 100644
--- a/kernel/events/core.c
+++ b/kernel/events/core.c
@@ -5118,7 +5118,7 @@
static int perf_swevent_init(struct perf_event *event)
{
- int event_id = event->attr.config;
+ u64 event_id = event->attr.config;
if (event->attr.type != PERF_TYPE_SOFTWARE)
return -ENOENT;
diff --git a/kernel/fork.c b/kernel/fork.c
index 0de735c..a8bf721 100644
--- a/kernel/fork.c
+++ b/kernel/fork.c
@@ -597,7 +597,6 @@
list_del(&mm->mmlist);
spin_unlock(&mmlist_lock);
}
- put_swap_token(mm);
if (mm->binfmt)
module_put(mm->binfmt->module);
mmdrop(mm);
@@ -815,10 +814,6 @@
memcpy(mm, oldmm, sizeof(*mm));
mm_init_cpumask(mm);
- /* Initializing for Swap token stuff */
- mm->token_priority = 0;
- mm->last_interval = 0;
-
#ifdef CONFIG_TRANSPARENT_HUGEPAGE
mm->pmd_huge_pte = NULL;
#endif
@@ -896,10 +891,6 @@
goto fail_nomem;
good_mm:
- /* Initializing for Swap token stuff */
- mm->token_priority = 0;
- mm->last_interval = 0;
-
tsk->mm = mm;
tsk->active_mm = mm;
return 0;
diff --git a/kernel/sched/core.c b/kernel/sched/core.c
index 1a07d2e..3513fef 100644
--- a/kernel/sched/core.c
+++ b/kernel/sched/core.c
@@ -5890,6 +5890,7 @@
{
struct rq *rq = cpu_rq(cpu);
struct sched_domain *tmp;
+ unsigned long next_balance = rq->next_balance;
/* Remove the sched domains which do not contribute to scheduling. */
for (tmp = sd; tmp; ) {
@@ -5914,6 +5915,17 @@
sd->child = NULL;
}
+ for (tmp = sd; tmp; ) {
+ unsigned long interval;
+
+ interval = msecs_to_jiffies(tmp->balance_interval);
+ if (time_after(next_balance, tmp->last_balance + interval))
+ next_balance = tmp->last_balance + interval;
+
+ tmp = tmp->parent;
+ }
+ rq->next_balance = next_balance;
+
sched_domain_debug(sd, cpu);
rq_attach_root(rq, rd);
diff --git a/kernel/sched/fair.c b/kernel/sched/fair.c
index 103730d..5d6ab86 100644
--- a/kernel/sched/fair.c
+++ b/kernel/sched/fair.c
@@ -3671,15 +3671,22 @@
unsigned long scale_rt_power(int cpu)
{
struct rq *rq = cpu_rq(cpu);
- u64 total, available;
+ u64 total, available, age_stamp, avg;
- total = sched_avg_period() + (rq->clock - rq->age_stamp);
+ /*
+ * Since we're reading these variables without serialization make sure
+ * we read them once before doing sanity checks on them.
+ */
+ age_stamp = ACCESS_ONCE(rq->age_stamp);
+ avg = ACCESS_ONCE(rq->rt_avg);
- if (unlikely(total < rq->rt_avg)) {
+ total = sched_avg_period() + (rq->clock - age_stamp);
+
+ if (unlikely(total < avg)) {
/* Ensures that power won't end up being negative */
available = 0;
} else {
- available = total - rq->rt_avg;
+ available = total - avg;
}
if (unlikely((s64)total < SCHED_POWER_SCALE))
diff --git a/mm/Makefile b/mm/Makefile
index 8aada89..ccecbf9 100644
--- a/mm/Makefile
+++ b/mm/Makefile
@@ -25,7 +25,7 @@
obj-$(CONFIG_HAVE_MEMBLOCK) += memblock.o
obj-$(CONFIG_BOUNCE) += bounce.o
-obj-$(CONFIG_SWAP) += page_io.o swap_state.o swapfile.o thrash.o
+obj-$(CONFIG_SWAP) += page_io.o swap_state.o swapfile.o
obj-$(CONFIG_HAS_DMA) += dmapool.o
obj-$(CONFIG_HUGETLBFS) += hugetlb.o
obj-$(CONFIG_NUMA) += mempolicy.o
diff --git a/mm/compaction.c b/mm/compaction.c
index 353f1c5..673142d 100644
--- a/mm/compaction.c
+++ b/mm/compaction.c
@@ -16,6 +16,21 @@
#include <linux/sysfs.h>
#include "internal.h"
+#ifdef CONFIG_COMPACTION
+static inline void count_compact_event(enum vm_event_item item)
+{
+ count_vm_event(item);
+}
+
+static inline void count_compact_events(enum vm_event_item item, long delta)
+{
+ count_vm_events(item, delta);
+}
+#else
+#define count_compact_event(item) do { } while (0)
+#define count_compact_events(item, delta) do { } while (0)
+#endif
+
#if defined CONFIG_COMPACTION || defined CONFIG_CMA
#define CREATE_TRACE_POINTS
@@ -50,44 +65,228 @@
return is_migrate_cma(migratetype) || migratetype == MIGRATE_MOVABLE;
}
+#ifdef CONFIG_COMPACTION
+/* Returns true if the pageblock should be scanned for pages to isolate. */
+static inline bool isolation_suitable(struct compact_control *cc,
+ struct page *page)
+{
+ if (cc->ignore_skip_hint)
+ return true;
+
+ return !get_pageblock_skip(page);
+}
+
+/*
+ * This function is called to clear all cached information on pageblocks that
+ * should be skipped for page isolation when the migrate and free page scanner
+ * meet.
+ */
+static void __reset_isolation_suitable(struct zone *zone)
+{
+ unsigned long start_pfn = zone->zone_start_pfn;
+ unsigned long end_pfn = zone->zone_start_pfn + zone->spanned_pages;
+ unsigned long pfn;
+
+ zone->compact_cached_migrate_pfn = start_pfn;
+ zone->compact_cached_free_pfn = end_pfn;
+ zone->compact_blockskip_flush = false;
+
+ /* Walk the zone and mark every pageblock as suitable for isolation */
+ for (pfn = start_pfn; pfn < end_pfn; pfn += pageblock_nr_pages) {
+ struct page *page;
+
+ cond_resched();
+
+ if (!pfn_valid(pfn))
+ continue;
+
+ page = pfn_to_page(pfn);
+ if (zone != page_zone(page))
+ continue;
+
+ clear_pageblock_skip(page);
+ }
+}
+
+void reset_isolation_suitable(pg_data_t *pgdat)
+{
+ int zoneid;
+
+ for (zoneid = 0; zoneid < MAX_NR_ZONES; zoneid++) {
+ struct zone *zone = &pgdat->node_zones[zoneid];
+ if (!populated_zone(zone))
+ continue;
+
+ /* Only flush if a full compaction finished recently */
+ if (zone->compact_blockskip_flush)
+ __reset_isolation_suitable(zone);
+ }
+}
+
+/*
+ * If no pages were isolated then mark this pageblock to be skipped in the
+ * future. The information is later cleared by __reset_isolation_suitable().
+ */
+static void update_pageblock_skip(struct compact_control *cc,
+ struct page *page, unsigned long nr_isolated,
+ bool migrate_scanner)
+{
+ struct zone *zone = cc->zone;
+ if (!page)
+ return;
+
+ if (!nr_isolated) {
+ unsigned long pfn = page_to_pfn(page);
+ set_pageblock_skip(page);
+
+ /* Update where compaction should restart */
+ if (migrate_scanner) {
+ if (!cc->finished_update_migrate &&
+ pfn > zone->compact_cached_migrate_pfn)
+ zone->compact_cached_migrate_pfn = pfn;
+ } else {
+ if (!cc->finished_update_free &&
+ pfn < zone->compact_cached_free_pfn)
+ zone->compact_cached_free_pfn = pfn;
+ }
+ }
+}
+#else
+static inline bool isolation_suitable(struct compact_control *cc,
+ struct page *page)
+{
+ return true;
+}
+
+static void update_pageblock_skip(struct compact_control *cc,
+ struct page *page, unsigned long nr_isolated,
+ bool migrate_scanner)
+{
+}
+#endif /* CONFIG_COMPACTION */
+
+static inline bool should_release_lock(spinlock_t *lock)
+{
+ return need_resched() || spin_is_contended(lock);
+}
+
+/*
+ * Compaction requires the taking of some coarse locks that are potentially
+ * very heavily contended. Check if the process needs to be scheduled or
+ * if the lock is contended. For async compaction, back out in the event
+ * if contention is severe. For sync compaction, schedule.
+ *
+ * Returns true if the lock is held.
+ * Returns false if the lock is released and compaction should abort
+ */
+static bool compact_checklock_irqsave(spinlock_t *lock, unsigned long *flags,
+ bool locked, struct compact_control *cc)
+{
+ if (should_release_lock(lock)) {
+ if (locked) {
+ spin_unlock_irqrestore(lock, *flags);
+ locked = false;
+ }
+
+ /* async aborts if taking too long or contended */
+ if (!cc->sync) {
+ cc->contended = true;
+ return false;
+ }
+
+ cond_resched();
+ }
+
+ if (!locked)
+ spin_lock_irqsave(lock, *flags);
+ return true;
+}
+
+static inline bool compact_trylock_irqsave(spinlock_t *lock,
+ unsigned long *flags, struct compact_control *cc)
+{
+ return compact_checklock_irqsave(lock, flags, false, cc);
+}
+
+/* Returns true if the page is within a block suitable for migration to */
+static bool suitable_migration_target(struct page *page)
+{
+ int migratetype = get_pageblock_migratetype(page);
+
+ /* Don't interfere with memory hot-remove or the min_free_kbytes blocks */
+ if (migratetype == MIGRATE_ISOLATE || migratetype == MIGRATE_RESERVE)
+ return false;
+
+ /* If the page is a large free page, then allow migration */
+ if (PageBuddy(page) && page_order(page) >= pageblock_order)
+ return true;
+
+ /* If the block is MIGRATE_MOVABLE or MIGRATE_CMA, allow migration */
+ if (migrate_async_suitable(migratetype))
+ return true;
+
+ /* Otherwise skip the block */
+ return false;
+}
+
/*
* Isolate free pages onto a private freelist. Caller must hold zone->lock.
* If @strict is true, will abort returning 0 on any invalid PFNs or non-free
* pages inside of the pageblock (even though it may still end up isolating
* some pages).
*/
-static unsigned long isolate_freepages_block(unsigned long blockpfn,
+static unsigned long isolate_freepages_block(struct compact_control *cc,
+ unsigned long blockpfn,
unsigned long end_pfn,
struct list_head *freelist,
bool strict)
{
int nr_scanned = 0, total_isolated = 0;
- struct page *cursor;
+ struct page *cursor, *valid_page = NULL;
+ unsigned long nr_strict_required = end_pfn - blockpfn;
+ unsigned long flags;
+ bool locked = false;
cursor = pfn_to_page(blockpfn);
- /* Isolate free pages. This assumes the block is valid */
+ /* Isolate free pages. */
for (; blockpfn < end_pfn; blockpfn++, cursor++) {
int isolated, i;
struct page *page = cursor;
- if (!pfn_valid_within(blockpfn)) {
- if (strict)
- return 0;
- continue;
- }
nr_scanned++;
-
- if (!PageBuddy(page)) {
- if (strict)
- return 0;
+ if (!pfn_valid_within(blockpfn))
continue;
- }
+ if (!valid_page)
+ valid_page = page;
+ if (!PageBuddy(page))
+ continue;
+
+ /*
+ * The zone lock must be held to isolate freepages.
+ * Unfortunately this is a very coarse lock and can be
+ * heavily contended if there are parallel allocations
+ * or parallel compactions. For async compaction do not
+ * spin on the lock and we acquire the lock as late as
+ * possible.
+ */
+ locked = compact_checklock_irqsave(&cc->zone->lock, &flags,
+ locked, cc);
+ if (!locked)
+ break;
+
+ /* Recheck this is a suitable migration target under lock */
+ if (!strict && !suitable_migration_target(page))
+ break;
+
+ /* Recheck this is a buddy page under lock */
+ if (!PageBuddy(page))
+ continue;
/* Found a free page, break it into order-0 pages */
isolated = split_free_page(page);
if (!isolated && strict)
- return 0;
+ break;
total_isolated += isolated;
for (i = 0; i < isolated; i++) {
list_add(&page->lru, freelist);
@@ -102,6 +301,25 @@
}
trace_mm_compaction_isolate_freepages(nr_scanned, total_isolated);
+
+ /*
+ * If strict isolation is requested by CMA then check that all the
+ * pages requested were isolated. If there were any failures, 0 is
+ * returned and CMA will fail.
+ */
+ if (strict && nr_strict_required > total_isolated)
+ total_isolated = 0;
+
+ if (locked)
+ spin_unlock_irqrestore(&cc->zone->lock, flags);
+
+ /* Update the pageblock-skip if the whole pageblock was scanned */
+ if (blockpfn == end_pfn)
+ update_pageblock_skip(cc, valid_page, total_isolated, false);
+
+ count_compact_events(COMPACTFREE_SCANNED, nr_scanned);
+ if (total_isolated)
+ count_compact_events(COMPACTISOLATED, total_isolated);
return total_isolated;
}
@@ -119,17 +337,14 @@
* a free page).
*/
unsigned long
-isolate_freepages_range(unsigned long start_pfn, unsigned long end_pfn)
+isolate_freepages_range(struct compact_control *cc,
+ unsigned long start_pfn, unsigned long end_pfn)
{
- unsigned long isolated, pfn, block_end_pfn, flags;
- struct zone *zone = NULL;
+ unsigned long isolated, pfn, block_end_pfn;
LIST_HEAD(freelist);
- if (pfn_valid(start_pfn))
- zone = page_zone(pfn_to_page(start_pfn));
-
for (pfn = start_pfn; pfn < end_pfn; pfn += isolated) {
- if (!pfn_valid(pfn) || zone != page_zone(pfn_to_page(pfn)))
+ if (!pfn_valid(pfn) || cc->zone != page_zone(pfn_to_page(pfn)))
break;
/*
@@ -139,10 +354,8 @@
block_end_pfn = ALIGN(pfn + 1, pageblock_nr_pages);
block_end_pfn = min(block_end_pfn, end_pfn);
- spin_lock_irqsave(&zone->lock, flags);
- isolated = isolate_freepages_block(pfn, block_end_pfn,
+ isolated = isolate_freepages_block(cc, pfn, block_end_pfn,
&freelist, true);
- spin_unlock_irqrestore(&zone->lock, flags);
/*
* In strict mode, isolate_freepages_block() returns 0 if
@@ -173,7 +386,7 @@
}
/* Update the number of anon and file isolated pages in the zone */
-static void acct_isolated(struct zone *zone, struct compact_control *cc)
+static void acct_isolated(struct zone *zone, bool locked, struct compact_control *cc)
{
struct page *page;
unsigned int count[2] = { 0, };
@@ -181,8 +394,14 @@
list_for_each_entry(page, &cc->migratepages, lru)
count[!!page_is_file_cache(page)]++;
- __mod_zone_page_state(zone, NR_ISOLATED_ANON, count[0]);
- __mod_zone_page_state(zone, NR_ISOLATED_FILE, count[1]);
+ /* If locked we can use the interrupt unsafe versions */
+ if (locked) {
+ __mod_zone_page_state(zone, NR_ISOLATED_ANON, count[0]);
+ __mod_zone_page_state(zone, NR_ISOLATED_FILE, count[1]);
+ } else {
+ mod_zone_page_state(zone, NR_ISOLATED_ANON, count[0]);
+ mod_zone_page_state(zone, NR_ISOLATED_FILE, count[1]);
+ }
}
/* Similar to reclaim, but different enough that they don't share logic */
@@ -206,6 +425,7 @@
* @cc: Compaction control structure.
* @low_pfn: The first PFN of the range.
* @end_pfn: The one-past-the-last PFN of the range.
+ * @unevictable: true if it allows to isolate unevictable pages
*
* Isolate all pages that can be migrated from the range specified by
* [low_pfn, end_pfn). Returns zero if there is a fatal signal
@@ -221,12 +441,15 @@
*/
unsigned long
isolate_migratepages_range(struct zone *zone, struct compact_control *cc,
- unsigned long low_pfn, unsigned long end_pfn)
+ unsigned long low_pfn, unsigned long end_pfn, bool unevictable)
{
unsigned long last_pageblock_nr = 0, pageblock_nr;
unsigned long nr_scanned = 0, nr_isolated = 0;
struct list_head *migratelist = &cc->migratepages;
- isolate_mode_t mode = ISOLATE_ACTIVE|ISOLATE_INACTIVE;
+ isolate_mode_t mode = 0;
+ unsigned long flags;
+ bool locked = false;
+ struct page *page = NULL, *valid_page = NULL;
/*
* Ensure that there are not too many pages isolated from the LRU
@@ -246,25 +469,14 @@
/* Time to isolate some pages for migration */
cond_resched();
- spin_lock_irq(&zone->lru_lock);
for (; low_pfn < end_pfn; low_pfn++) {
- struct page *page;
- bool locked = true;
-
/* give a chance to irqs before checking need_resched() */
- if (!((low_pfn+1) % SWAP_CLUSTER_MAX)) {
- spin_unlock_irq(&zone->lru_lock);
- locked = false;
+ if (locked && !((low_pfn+1) % SWAP_CLUSTER_MAX)) {
+ if (should_release_lock(&zone->lru_lock)) {
+ spin_unlock_irqrestore(&zone->lru_lock, flags);
+ locked = false;
+ }
}
- if (need_resched() || spin_is_contended(&zone->lru_lock)) {
- if (locked)
- spin_unlock_irq(&zone->lru_lock);
- cond_resched();
- spin_lock_irq(&zone->lru_lock);
- if (fatal_signal_pending(current))
- break;
- } else if (!locked)
- spin_lock_irq(&zone->lru_lock);
/*
* migrate_pfn does not necessarily start aligned to a
@@ -293,6 +505,14 @@
if (page_zone(page) != zone)
continue;
+ if (!valid_page)
+ valid_page = page;
+
+ /* If isolation recently failed, do not retry */
+ pageblock_nr = low_pfn >> pageblock_order;
+ if (!isolation_suitable(cc, page))
+ goto next_pageblock;
+
/* Skip if free */
if (PageBuddy(page))
continue;
@@ -302,24 +522,43 @@
* migration is optimistic to see if the minimum amount of work
* satisfies the allocation
*/
- pageblock_nr = low_pfn >> pageblock_order;
if (!cc->sync && last_pageblock_nr != pageblock_nr &&
!migrate_async_suitable(get_pageblock_migratetype(page))) {
- low_pfn += pageblock_nr_pages;
- low_pfn = ALIGN(low_pfn, pageblock_nr_pages) - 1;
- last_pageblock_nr = pageblock_nr;
- continue;
+ cc->finished_update_migrate = true;
+ goto next_pageblock;
}
+ /* Check may be lockless but that's ok as we recheck later */
if (!PageLRU(page))
continue;
/*
- * PageLRU is set, and lru_lock excludes isolation,
- * splitting and collapsing (collapsing has already
- * happened if PageLRU is set).
+ * PageLRU is set. lru_lock normally excludes isolation
+ * splitting and collapsing (collapsing has already happened
+ * if PageLRU is set) but the lock is not necessarily taken
+ * here and it is wasteful to take it just to check transhuge.
+ * Check TransHuge without lock and skip the whole pageblock if
+ * it's either a transhuge or hugetlbfs page, as calling
+ * compound_order() without preventing THP from splitting the
+ * page underneath us may return surprising results.
*/
if (PageTransHuge(page)) {
+ if (!locked)
+ goto next_pageblock;
+ low_pfn += (1 << compound_order(page)) - 1;
+ continue;
+ }
+
+ /* Check if it is ok to still hold the lock */
+ locked = compact_checklock_irqsave(&zone->lru_lock, &flags,
+ locked, cc);
+ if (!locked || fatal_signal_pending(current))
+ break;
+
+ /* Recheck PageLRU and PageTransHuge under lock */
+ if (!PageLRU(page))
+ continue;
+ if (PageTransHuge(page)) {
low_pfn += (1 << compound_order(page)) - 1;
continue;
}
@@ -327,13 +566,17 @@
if (!cc->sync)
mode |= ISOLATE_ASYNC_MIGRATE;
+ if (unevictable)
+ mode |= ISOLATE_UNEVICTABLE;
+
/* Try isolate the page */
- if (__isolate_lru_page(page, mode, 0) != 0)
+ if (__isolate_lru_page(page, mode) != 0)
continue;
VM_BUG_ON(PageTransCompound(page));
/* Successfully isolated */
+ cc->finished_update_migrate = true;
del_page_from_lru_list(zone, page, page_lru(page));
list_add(&page->lru, migratelist);
cc->nr_migratepages++;
@@ -344,42 +587,35 @@
++low_pfn;
break;
}
+
+ continue;
+
+next_pageblock:
+ low_pfn += pageblock_nr_pages;
+ low_pfn = ALIGN(low_pfn, pageblock_nr_pages) - 1;
+ last_pageblock_nr = pageblock_nr;
}
- acct_isolated(zone, cc);
+ acct_isolated(zone, locked, cc);
- spin_unlock_irq(&zone->lru_lock);
+ if (locked)
+ spin_unlock_irqrestore(&zone->lru_lock, flags);
+
+ /* Update the pageblock-skip if the whole pageblock was scanned */
+ if (low_pfn == end_pfn)
+ update_pageblock_skip(cc, valid_page, nr_isolated, true);
trace_mm_compaction_isolate_migratepages(nr_scanned, nr_isolated);
+ count_compact_events(COMPACTMIGRATE_SCANNED, nr_scanned);
+ if (nr_isolated)
+ count_compact_events(COMPACTISOLATED, nr_isolated);
+
return low_pfn;
}
#endif /* CONFIG_COMPACTION || CONFIG_CMA */
#ifdef CONFIG_COMPACTION
-
-/* Returns true if the page is within a block suitable for migration to */
-static bool suitable_migration_target(struct page *page)
-{
-
- int migratetype = get_pageblock_migratetype(page);
-
- /* Don't interfere with memory hot-remove or the min_free_kbytes blocks */
- if (migratetype == MIGRATE_ISOLATE || migratetype == MIGRATE_RESERVE)
- return false;
-
- /* If the page is a large free page, then allow migration */
- if (PageBuddy(page) && page_order(page) >= pageblock_order)
- return true;
-
- /* If the block is MIGRATE_MOVABLE or MIGRATE_CMA, allow migration */
- if (migrate_async_suitable(migratetype))
- return true;
-
- /* Otherwise skip the block */
- return false;
-}
-
/*
* Based on information in the current compact_control, find blocks
* suitable for isolating free pages from and then isolate them.
@@ -389,7 +625,6 @@
{
struct page *page;
unsigned long high_pfn, low_pfn, pfn, zone_end_pfn, end_pfn;
- unsigned long flags;
int nr_freepages = cc->nr_freepages;
struct list_head *freelist = &cc->freepages;
@@ -437,29 +672,34 @@
if (!suitable_migration_target(page))
continue;
- /*
- * Found a block suitable for isolating free pages from. Now
- * we disabled interrupts, double check things are ok and
- * isolate the pages. This is to minimise the time IRQs
- * are disabled
- */
+ /* If isolation recently failed, do not retry */
+ if (!isolation_suitable(cc, page))
+ continue;
+
+ /* Found a block suitable for isolating free pages from */
isolated = 0;
- spin_lock_irqsave(&zone->lock, flags);
- if (suitable_migration_target(page)) {
- end_pfn = min(pfn + pageblock_nr_pages, zone_end_pfn);
- isolated = isolate_freepages_block(pfn, end_pfn,
- freelist, false);
- nr_freepages += isolated;
- }
- spin_unlock_irqrestore(&zone->lock, flags);
+
+ /*
+ * As pfn may not start aligned, pfn+pageblock_nr_page
+ * may cross a MAX_ORDER_NR_PAGES boundary and miss
+ * a pfn_valid check. Ensure isolate_freepages_block()
+ * only scans within a pageblock
+ */
+ end_pfn = ALIGN(pfn + 1, pageblock_nr_pages);
+ end_pfn = min(end_pfn, zone_end_pfn);
+ isolated = isolate_freepages_block(cc, pfn, end_pfn,
+ freelist, false);
+ nr_freepages += isolated;
/*
* Record the highest PFN we isolated pages from. When next
* looking for free pages, the search will restart here as
* page migration may have returned some pages to the allocator
*/
- if (isolated)
+ if (isolated) {
+ cc->finished_update_free = true;
high_pfn = max(high_pfn, pfn);
+ }
}
/* split_free_page does not map the pages */
@@ -544,8 +784,8 @@
}
/* Perform the isolation */
- low_pfn = isolate_migratepages_range(zone, cc, low_pfn, end_pfn);
- if (!low_pfn)
+ low_pfn = isolate_migratepages_range(zone, cc, low_pfn, end_pfn, false);
+ if (!low_pfn || cc->contended)
return ISOLATE_ABORT;
cc->migrate_pfn = low_pfn;
@@ -563,8 +803,18 @@
return COMPACT_PARTIAL;
/* Compaction run completes if the migrate and free scanner meet */
- if (cc->free_pfn <= cc->migrate_pfn)
+ if (cc->free_pfn <= cc->migrate_pfn) {
+ /*
+ * Mark that the PG_migrate_skip information should be cleared
+ * by kswapd when it goes to sleep. kswapd does not set the
+ * flag itself as the decision to be clear should be directly
+ * based on an allocation request.
+ */
+ if (!current_is_kswapd())
+ zone->compact_blockskip_flush = true;
+
return COMPACT_COMPLETE;
+ }
/*
* order == -1 is expected when compacting via
@@ -582,12 +832,14 @@
/* Direct compactor: Is a suitable page free? */
for (order = cc->order; order < MAX_ORDER; order++) {
+ struct free_area *area = &zone->free_area[order];
+
/* Job done if page is free of the right migratetype */
- if (!list_empty(&zone->free_area[order].free_list[cc->migratetype]))
+ if (!list_empty(&area->free_list[cc->migratetype]))
return COMPACT_PARTIAL;
/* Job done if allocation would set block type */
- if (order >= pageblock_order && zone->free_area[order].nr_free)
+ if (cc->order >= pageblock_order && area->nr_free)
return COMPACT_PARTIAL;
}
@@ -647,6 +899,8 @@
static int compact_zone(struct zone *zone, struct compact_control *cc)
{
int ret;
+ unsigned long start_pfn = zone->zone_start_pfn;
+ unsigned long end_pfn = zone->zone_start_pfn + zone->spanned_pages;
ret = compaction_suitable(zone, cc->order);
switch (ret) {
@@ -659,10 +913,29 @@
;
}
- /* Setup to move all movable pages to the end of the zone */
- cc->migrate_pfn = zone->zone_start_pfn;
- cc->free_pfn = cc->migrate_pfn + zone->spanned_pages;
- cc->free_pfn &= ~(pageblock_nr_pages-1);
+ /*
+ * Setup to move all movable pages to the end of the zone. Used cached
+ * information on where the scanners should start but check that it
+ * is initialised by ensuring the values are within zone boundaries.
+ */
+ cc->migrate_pfn = zone->compact_cached_migrate_pfn;
+ cc->free_pfn = zone->compact_cached_free_pfn;
+ if (cc->free_pfn < start_pfn || cc->free_pfn > end_pfn) {
+ cc->free_pfn = end_pfn & ~(pageblock_nr_pages-1);
+ zone->compact_cached_free_pfn = cc->free_pfn;
+ }
+ if (cc->migrate_pfn < start_pfn || cc->migrate_pfn > end_pfn) {
+ cc->migrate_pfn = start_pfn;
+ zone->compact_cached_migrate_pfn = cc->migrate_pfn;
+ }
+
+ /*
+ * Clear pageblock skip if there were failures recently and compaction
+ * is about to be retried after being deferred. kswapd does not do
+ * this reset as it'll reset the cached information when going to sleep.
+ */
+ if (compaction_restarting(zone, cc->order) && !current_is_kswapd())
+ __reset_isolation_suitable(zone);
migrate_prep_local();
@@ -673,6 +946,8 @@
switch (isolate_migratepages(zone, cc)) {
case ISOLATE_ABORT:
ret = COMPACT_PARTIAL;
+ putback_lru_pages(&cc->migratepages);
+ cc->nr_migratepages = 0;
goto out;
case ISOLATE_NONE:
continue;
@@ -687,10 +962,6 @@
update_nr_listpages(cc);
nr_remaining = cc->nr_migratepages;
- count_vm_event(COMPACTBLOCKS);
- count_vm_events(COMPACTPAGES, nr_migrate - nr_remaining);
- if (nr_remaining)
- count_vm_events(COMPACTPAGEFAILED, nr_remaining);
trace_mm_compaction_migratepages(nr_migrate - nr_remaining,
nr_remaining);
@@ -698,8 +969,11 @@
if (err) {
putback_lru_pages(&cc->migratepages);
cc->nr_migratepages = 0;
+ if (err == -ENOMEM) {
+ ret = COMPACT_PARTIAL;
+ goto out;
+ }
}
-
}
out:
@@ -712,8 +986,9 @@
static unsigned long compact_zone_order(struct zone *zone,
int order, gfp_t gfp_mask,
- bool sync)
+ bool sync, bool *contended)
{
+ unsigned long ret;
struct compact_control cc = {
.nr_freepages = 0,
.nr_migratepages = 0,
@@ -725,7 +1000,13 @@
INIT_LIST_HEAD(&cc.freepages);
INIT_LIST_HEAD(&cc.migratepages);
- return compact_zone(zone, &cc);
+ ret = compact_zone(zone, &cc);
+
+ VM_BUG_ON(!list_empty(&cc.freepages));
+ VM_BUG_ON(!list_empty(&cc.migratepages));
+
+ *contended = cc.contended;
+ return ret;
}
int sysctl_extfrag_threshold = 500;
@@ -737,12 +1018,14 @@
* @gfp_mask: The GFP mask of the current allocation
* @nodemask: The allowed nodes to allocate from
* @sync: Whether migration is synchronous or not
+ * @contended: Return value that is true if compaction was aborted due to lock contention
+ * @page: Optionally capture a free page of the requested order during compaction
*
* This is the main entry point for direct page compaction.
*/
unsigned long try_to_compact_pages(struct zonelist *zonelist,
int order, gfp_t gfp_mask, nodemask_t *nodemask,
- bool sync)
+ bool sync, bool *contended)
{
enum zone_type high_zoneidx = gfp_zone(gfp_mask);
int may_enter_fs = gfp_mask & __GFP_FS;
@@ -752,15 +1035,11 @@
int rc = COMPACT_SKIPPED;
int alloc_flags = 0;
- /*
- * Check whether it is worth even starting compaction. The order check is
- * made because an assumption is made that the page allocator can satisfy
- * the "cheaper" orders without taking special steps
- */
+ /* Check if the GFP flags allow compaction */
if (!order || !may_enter_fs || !may_perform_io)
return rc;
- count_vm_event(COMPACTSTALL);
+ count_compact_event(COMPACTSTALL);
#ifdef CONFIG_CMA
if (allocflags_to_migratetype(gfp_mask) == MIGRATE_MOVABLE)
@@ -771,7 +1050,8 @@
nodemask) {
int status;
- status = compact_zone_order(zone, order, gfp_mask, sync);
+ status = compact_zone_order(zone, order, gfp_mask, sync,
+ contended);
rc = max(status, rc);
/* If a normal allocation would succeed, stop compacting */
@@ -808,7 +1088,7 @@
if (cc->order > 0) {
int ok = zone_watermark_ok(zone, cc->order,
low_wmark_pages(zone), 0, 0);
- if (ok && cc->order > zone->compact_order_failed)
+ if (ok && cc->order >= zone->compact_order_failed)
zone->compact_order_failed = cc->order + 1;
/* Currently async compaction is never deferred. */
else if (!ok && cc->sync)
@@ -843,7 +1123,7 @@
}
/* Compact all nodes in the system */
-static int compact_nodes(void)
+static void compact_nodes(void)
{
int nid;
@@ -852,8 +1132,6 @@
for_each_online_node(nid)
compact_node(nid);
-
- return COMPACT_COMPLETE;
}
/* The written value is actually unused, all memory is compacted */
@@ -864,7 +1142,7 @@
void __user *buffer, size_t *length, loff_t *ppos)
{
if (write)
- return compact_nodes();
+ compact_nodes();
return 0;
}
diff --git a/mm/internal.h b/mm/internal.h
index 8c6fd44..3439ef4 100644
--- a/mm/internal.h
+++ b/mm/internal.h
@@ -120,17 +120,24 @@
unsigned long free_pfn; /* isolate_freepages search base */
unsigned long migrate_pfn; /* isolate_migratepages search base */
bool sync; /* Synchronous migration */
+ bool ignore_skip_hint; /* Scan blocks even if marked skip */
+ bool finished_update_free; /* True when the zone cached pfns are
+ * no longer being updated
+ */
+ bool finished_update_migrate;
int order; /* order a direct compactor needs */
int migratetype; /* MOVABLE, RECLAIMABLE etc */
struct zone *zone;
+ bool contended; /* True if a lock was contended */
};
unsigned long
-isolate_freepages_range(unsigned long start_pfn, unsigned long end_pfn);
+isolate_freepages_range(struct compact_control *cc,
+ unsigned long start_pfn, unsigned long end_pfn);
unsigned long
isolate_migratepages_range(struct zone *zone, struct compact_control *cc,
- unsigned long low_pfn, unsigned long end_pfn);
+ unsigned long low_pfn, unsigned long end_pfn, bool unevictable);
#endif
@@ -356,3 +363,6 @@
#define ALLOC_HIGH 0x20 /* __GFP_HIGH set */
#define ALLOC_CPUSET 0x40 /* check for correct cpuset */
#define ALLOC_CMA 0x80 /* allow allocations from CMA areas */
+
+unsigned long reclaim_clean_pages_from_list(struct zone *zone,
+ struct list_head *page_list);
diff --git a/mm/memcontrol.c b/mm/memcontrol.c
index 7685d4a..d436634 100644
--- a/mm/memcontrol.c
+++ b/mm/memcontrol.c
@@ -1116,11 +1116,6 @@
mz->lru_size[lru] -= 1 << compound_order(page);
}
-void mem_cgroup_lru_del(struct page *page)
-{
- mem_cgroup_lru_del_list(page, page_lru(page));
-}
-
/**
* mem_cgroup_lru_move_lists - account for moving a page between lrus
* @zone: zone of the page
@@ -1149,15 +1144,25 @@
* Checks whether given mem is same or in the root_mem_cgroup's
* hierarchy subtree
*/
-static bool mem_cgroup_same_or_subtree(const struct mem_cgroup *root_memcg,
- struct mem_cgroup *memcg)
+bool __mem_cgroup_same_or_subtree(const struct mem_cgroup *root_memcg,
+ struct mem_cgroup *memcg)
{
- if (root_memcg != memcg) {
- return (root_memcg->use_hierarchy &&
- css_is_ancestor(&memcg->css, &root_memcg->css));
- }
+ if (root_memcg == memcg)
+ return true;
+ if (!root_memcg->use_hierarchy)
+ return false;
+ return css_is_ancestor(&memcg->css, &root_memcg->css);
+}
- return true;
+static bool mem_cgroup_same_or_subtree(const struct mem_cgroup *root_memcg,
+ struct mem_cgroup *memcg)
+{
+ bool ret;
+
+ rcu_read_lock();
+ ret = __mem_cgroup_same_or_subtree(root_memcg, memcg);
+ rcu_read_unlock();
+ return ret;
}
int task_in_mem_cgroup(struct task_struct *task, const struct mem_cgroup *memcg)
@@ -5610,7 +5615,6 @@
if (mm) {
if (mc.to)
mem_cgroup_move_charge(mm);
- put_swap_token(mm);
mmput(mm);
}
if (mc.to)
diff --git a/mm/memory.c b/mm/memory.c
index 2111354..b6ab040 100644
--- a/mm/memory.c
+++ b/mm/memory.c
@@ -2935,7 +2935,6 @@
delayacct_set_flag(DELAYACCT_PF_SWAPIN);
page = lookup_swap_cache(entry);
if (!page) {
- grab_swap_token(mm); /* Contend for token _before_ read-in */
page = swapin_readahead(entry,
GFP_HIGHUSER_MOVABLE, vma, address);
if (!page) {
@@ -2965,6 +2964,7 @@
}
locked = lock_page_or_retry(page, mm, flags);
+
delayacct_clear_flag(DELAYACCT_PF_SWAPIN);
if (!locked) {
ret |= VM_FAULT_RETRY;
diff --git a/mm/migrate.c b/mm/migrate.c
index 79a791f..4f5c02e 100644
--- a/mm/migrate.c
+++ b/mm/migrate.c
@@ -969,6 +969,7 @@
{
int retry = 1;
int nr_failed = 0;
+ int nr_succeeded = 0;
int pass = 0;
struct page *page;
struct page *page2;
@@ -997,6 +998,7 @@
trace_migrate_retry(retry);
break;
case 0:
+ nr_succeeded++;
break;
default:
/* Permanent failure */
@@ -1007,6 +1009,10 @@
}
rc = 0;
out:
+ if (nr_succeeded)
+ count_vm_events(PGMIGRATE_SUCCESS, nr_succeeded);
+ if (nr_failed)
+ count_vm_events(PGMIGRATE_FAIL, nr_failed);
if (!swapwrite)
current->flags &= ~PF_SWAPWRITE;
diff --git a/mm/page_alloc.c b/mm/page_alloc.c
index 8a93508..5148c1a 100644
--- a/mm/page_alloc.c
+++ b/mm/page_alloc.c
@@ -1441,6 +1441,45 @@
set_page_refcounted(page + i);
}
+static int __isolate_free_page(struct page *page, unsigned int order)
+{
+ unsigned long watermark;
+ struct zone *zone;
+ int mt;
+
+ BUG_ON(!PageBuddy(page));
+
+ zone = page_zone(page);
+ mt = get_pageblock_migratetype(page);
+
+ if (mt != MIGRATE_ISOLATE && !is_migrate_cma(mt)) {
+ /* Obey watermarks as if the page was being allocated */
+ watermark = low_wmark_pages(zone) + (1 << order);
+ if (!zone_watermark_ok(zone, 0, watermark, 0, 0))
+ return 0;
+
+ __mod_zone_freepage_state(zone, -(1UL << order), mt);
+ }
+
+ /* Remove page from free list */
+ list_del(&page->lru);
+ zone->free_area[order].nr_free--;
+ rmv_page_order(page);
+
+ /* Set the pageblock if the isolated page is at least a pageblock */
+ if (order >= pageblock_order - 1) {
+ struct page *endpage = page + (1 << order) - 1;
+ for (; page < endpage; page += pageblock_nr_pages) {
+ mt = get_pageblock_migratetype(page);
+ if (mt != MIGRATE_ISOLATE && !is_migrate_cma(mt))
+ set_pageblock_migratetype(page,
+ MIGRATE_MOVABLE);
+ }
+ }
+
+ return 1UL << order;
+}
+
/*
* Similar to split_page except the page is already free. As this is only
* being used for migration, the migratetype of the block also changes.
@@ -1454,45 +1493,18 @@
int split_free_page(struct page *page)
{
unsigned int order;
- unsigned long watermark;
- struct zone *zone;
- int mt;
+ int nr_pages;
- BUG_ON(!PageBuddy(page));
-
- zone = page_zone(page);
order = page_order(page);
- mt = get_pageblock_migratetype(page);
- /* Obey watermarks as if the page was being allocated */
- watermark = low_wmark_pages(zone) + (1 << order);
- if (!is_migrate_cma(mt) && mt != MIGRATE_ISOLATE &&
- !zone_watermark_ok(zone, 0, watermark, 0, 0))
+ nr_pages = __isolate_free_page(page, order);
+ if (!nr_pages)
return 0;
- /* Remove page from free list */
- list_del(&page->lru);
- zone->free_area[order].nr_free--;
- rmv_page_order(page);
-
- if (unlikely(mt != MIGRATE_ISOLATE))
- __mod_zone_freepage_state(zone, -(1UL << order), mt);
-
/* Split into individual pages */
set_page_refcounted(page);
split_page(page, order);
-
- if (order >= pageblock_order - 1) {
- struct page *endpage = page + (1 << order) - 1;
- for (; page < endpage; page += pageblock_nr_pages) {
- mt = get_pageblock_migratetype(page);
- if (mt != MIGRATE_ISOLATE && !is_migrate_cma(mt))
- set_pageblock_migratetype(page,
- MIGRATE_MOVABLE);
- }
- }
-
- return 1 << order;
+ return nr_pages;
}
/*
@@ -2134,11 +2146,9 @@
struct zonelist *zonelist, enum zone_type high_zoneidx,
nodemask_t *nodemask, int alloc_flags, struct zone *preferred_zone,
int migratetype, bool sync_migration,
- bool *deferred_compaction,
+ bool *contended_compaction, bool *deferred_compaction,
unsigned long *did_some_progress)
{
- struct page *page;
-
if (!order)
return NULL;
@@ -2149,9 +2159,12 @@
current->flags |= PF_MEMALLOC;
*did_some_progress = try_to_compact_pages(zonelist, order, gfp_mask,
- nodemask, sync_migration);
+ nodemask, sync_migration,
+ contended_compaction);
current->flags &= ~PF_MEMALLOC;
+
if (*did_some_progress != COMPACT_SKIPPED) {
+ struct page *page;
/* Page migration frees to the PCP lists but we want merging */
drain_pages(get_cpu());
@@ -2162,6 +2175,7 @@
alloc_flags, preferred_zone,
migratetype);
if (page) {
+ preferred_zone->compact_blockskip_flush = false;
preferred_zone->compact_considered = 0;
preferred_zone->compact_defer_shift = 0;
if (order >= preferred_zone->compact_order_failed)
@@ -2195,7 +2209,7 @@
struct zonelist *zonelist, enum zone_type high_zoneidx,
nodemask_t *nodemask, int alloc_flags, struct zone *preferred_zone,
int migratetype, bool sync_migration,
- bool *deferred_compaction,
+ bool *contended_compaction, bool *deferred_compaction,
unsigned long *did_some_progress)
{
return NULL;
@@ -2362,6 +2376,7 @@
unsigned long did_some_progress;
bool sync_migration = false;
bool deferred_compaction = false;
+ bool contended_compaction = false;
/*
* In the slowpath, we sanity check order to avoid ever trying to
@@ -2443,6 +2458,7 @@
nodemask,
alloc_flags, preferred_zone,
migratetype, sync_migration,
+ &contended_compaction,
&deferred_compaction,
&did_some_progress);
if (page)
@@ -2452,10 +2468,11 @@
/*
* If compaction is deferred for high-order allocations, it is because
* sync compaction recently failed. In this is the case and the caller
- * has requested the system not be heavily disrupted, fail the
- * allocation now instead of entering direct reclaim
+ * requested a movable allocation that does not heavily disrupt the
+ * system then fail the allocation instead of entering direct reclaim.
*/
- if (deferred_compaction && (gfp_mask & __GFP_NO_KSWAPD))
+ if ((deferred_compaction || contended_compaction) &&
+ (gfp_mask & __GFP_NO_KSWAPD))
goto nopage;
/* Try direct reclaim and then allocating */
@@ -2526,6 +2543,7 @@
nodemask,
alloc_flags, preferred_zone,
migratetype, sync_migration,
+ &contended_compaction,
&deferred_compaction,
&did_some_progress);
if (page)
@@ -5592,26 +5610,28 @@
}
/*
- * This is designed as sub function...plz see page_isolation.c also.
- * set/clear page block's type to be ISOLATE.
- * page allocater never alloc memory from ISOLATE block.
+ * This function checks whether pageblock includes unmovable pages or not.
+ * If @count is not zero, it is okay to include less @count unmovable pages
+ *
+ * PageLRU check wihtout isolation or lru_lock could race so that
+ * MIGRATE_MOVABLE block might include unmovable pages. It means you can't
+ * expect this function should be exact.
*/
-
-static int
-__count_immobile_pages(struct zone *zone, struct page *page, int count)
+static bool
+__has_unmovable_pages(struct zone *zone, struct page *page, int count)
{
unsigned long pfn, iter, found;
int mt;
/*
* For avoiding noise data, lru_add_drain_all() should be called
- * If ZONE_MOVABLE, the zone never contains immobile pages
+ * If ZONE_MOVABLE, the zone never contains unmovable pages
*/
if (zone_idx(zone) == ZONE_MOVABLE)
- return true;
+ return false;
mt = get_pageblock_migratetype(page);
if (mt == MIGRATE_MOVABLE || is_migrate_cma(mt))
- return true;
+ return false;
pfn = page_to_pfn(page);
for (found = 0, iter = 0; iter < pageblock_nr_pages; iter++) {
@@ -5621,11 +5641,18 @@
continue;
page = pfn_to_page(check);
- if (!page_count(page)) {
+ /*
+ * We can't use page_count without pin a page
+ * because another CPU can free compound page.
+ * This check already skips compound tails of THP
+ * because their page->_count is zero at all time.
+ */
+ if (!atomic_read(&page->_count)) {
if (PageBuddy(page))
iter += (1 << page_order(page)) - 1;
continue;
}
+
if (!PageLRU(page))
found++;
/*
@@ -5642,9 +5669,9 @@
* page at boot.
*/
if (found > count)
- return false;
+ return true;
}
- return true;
+ return false;
}
bool is_pageblock_removable_nolock(struct page *page)
@@ -5668,7 +5695,7 @@
zone->zone_start_pfn + zone->spanned_pages <= pfn)
return false;
- return __count_immobile_pages(zone, page, 0);
+ return !__has_unmovable_pages(zone, page, 0);
}
int set_migratetype_isolate(struct page *page)
@@ -5707,12 +5734,12 @@
* FIXME: Now, memory hotplug doesn't call shrink_slab() by itself.
* We just check MOVABLE pages.
*/
- if (__count_immobile_pages(zone, page, arg.pages_found))
+ if (!__has_unmovable_pages(zone, page, arg.pages_found))
ret = 0;
-
/*
- * immobile means "not-on-lru" paes. If immobile is larger than
- * removable-by-driver pages reported by notifier, we'll fail.
+ * Unmovable means "not-on-lru" pages. If Unmovable pages are
+ * larger than removable-by-driver pages reported by notifier,
+ * we'll fail.
*/
out:
@@ -5775,34 +5802,27 @@
}
/* [start, end) must belong to a single zone. */
-static int __alloc_contig_migrate_range(unsigned long start, unsigned long end)
+static int __alloc_contig_migrate_range(struct compact_control *cc,
+ unsigned long start, unsigned long end)
{
/* This function is based on compact_zone() from compaction.c. */
-
+ unsigned long nr_reclaimed;
unsigned long pfn = start;
unsigned int tries = 0;
int ret = 0;
- struct compact_control cc = {
- .nr_migratepages = 0,
- .order = -1,
- .zone = page_zone(pfn_to_page(start)),
- .sync = true,
- };
- INIT_LIST_HEAD(&cc.migratepages);
-
migrate_prep();
- while (pfn < end || !list_empty(&cc.migratepages)) {
+ while (pfn < end || !list_empty(&cc->migratepages)) {
if (fatal_signal_pending(current)) {
ret = -EINTR;
break;
}
- if (list_empty(&cc.migratepages)) {
- cc.nr_migratepages = 0;
- pfn = isolate_migratepages_range(cc.zone, &cc,
- pfn, end);
+ if (list_empty(&cc->migratepages)) {
+ cc->nr_migratepages = 0;
+ pfn = isolate_migratepages_range(cc->zone, cc,
+ pfn, end, true);
if (!pfn) {
ret = -EINTR;
break;
@@ -5813,12 +5833,16 @@
break;
}
- ret = migrate_pages(&cc.migratepages,
+ nr_reclaimed = reclaim_clean_pages_from_list(cc->zone, &cc->migratepages);
+
+ cc->nr_migratepages -= nr_reclaimed;
+
+ ret = migrate_pages(&cc->migratepages,
__alloc_contig_migrate_alloc,
0, false, MIGRATE_SYNC);
}
- putback_lru_pages(&cc.migratepages);
+ putback_lru_pages(&cc->migratepages);
return ret > 0 ? 0 : ret;
}
@@ -5849,6 +5873,15 @@
unsigned long outer_start, outer_end;
int ret = 0, order;
+ struct compact_control cc = {
+ .nr_migratepages = 0,
+ .order = -1,
+ .zone = page_zone(pfn_to_page(start)),
+ .sync = true,
+ .ignore_skip_hint = true,
+ };
+ INIT_LIST_HEAD(&cc.migratepages);
+
/*
* What we do here is we mark all pageblocks in range as
* MIGRATE_ISOLATE. Because pageblock and max order pages may
@@ -5880,7 +5913,7 @@
zone->cma_alloc = 1;
- ret = __alloc_contig_migrate_range(start, end);
+ ret = __alloc_contig_migrate_range(&cc, start, end);
if (ret)
goto done;
@@ -5924,7 +5957,7 @@
/* Grab isolated pages from freelists. */
- outer_end = isolate_freepages_range(outer_start, end);
+ outer_end = isolate_freepages_range(&cc, outer_start, end);
if (!outer_end) {
ret = -EBUSY;
goto done;
@@ -5945,8 +5978,15 @@
void free_contig_range(unsigned long pfn, unsigned nr_pages)
{
- for (; nr_pages--; ++pfn)
- __free_page(pfn_to_page(pfn));
+ unsigned int count = 0;
+
+ for (; nr_pages--; pfn++) {
+ struct page *page = pfn_to_page(pfn);
+
+ count += page_count(page) != 1;
+ __free_page(page);
+ }
+ WARN(count != 0, "%d pages are still in use!\n", count);
}
#endif
diff --git a/mm/rmap.c b/mm/rmap.c
index 5b5ad58..0f3b7cd 100644
--- a/mm/rmap.c
+++ b/mm/rmap.c
@@ -755,12 +755,6 @@
pte_unmap_unlock(pte, ptl);
}
- /* Pretend the page is referenced if the task has the
- swap token and is in the middle of a page fault. */
- if (mm != current->mm && has_swap_token(mm) &&
- rwsem_is_locked(&mm->mmap_sem))
- referenced++;
-
(*mapcount)--;
if (referenced)
diff --git a/mm/thrash.c b/mm/thrash.c
deleted file mode 100644
index 57ad495..0000000
--- a/mm/thrash.c
+++ /dev/null
@@ -1,155 +0,0 @@
-/*
- * mm/thrash.c
- *
- * Copyright (C) 2004, Red Hat, Inc.
- * Copyright (C) 2004, Rik van Riel <riel@redhat.com>
- * Released under the GPL, see the file COPYING for details.
- *
- * Simple token based thrashing protection, using the algorithm
- * described in: http://www.cse.ohio-state.edu/hpcs/WWW/HTML/publications/abs05-1.html
- *
- * Sep 2006, Ashwin Chaugule <ashwin.chaugule@celunite.com>
- * Improved algorithm to pass token:
- * Each task has a priority which is incremented if it contended
- * for the token in an interval less than its previous attempt.
- * If the token is acquired, that task's priority is boosted to prevent
- * the token from bouncing around too often and to let the task make
- * some progress in its execution.
- */
-
-#include <linux/jiffies.h>
-#include <linux/mm.h>
-#include <linux/sched.h>
-#include <linux/swap.h>
-#include <linux/memcontrol.h>
-
-#include <trace/events/vmscan.h>
-
-#define TOKEN_AGING_INTERVAL (0xFF)
-
-static DEFINE_SPINLOCK(swap_token_lock);
-struct mm_struct *swap_token_mm;
-static struct mem_cgroup *swap_token_memcg;
-
-#ifdef CONFIG_CGROUP_MEM_RES_CTLR
-static struct mem_cgroup *swap_token_memcg_from_mm(struct mm_struct *mm)
-{
- struct mem_cgroup *memcg;
-
- memcg = try_get_mem_cgroup_from_mm(mm);
- if (memcg)
- css_put(mem_cgroup_css(memcg));
-
- return memcg;
-}
-#else
-static struct mem_cgroup *swap_token_memcg_from_mm(struct mm_struct *mm)
-{
- return NULL;
-}
-#endif
-
-void grab_swap_token(struct mm_struct *mm)
-{
- int current_interval;
- unsigned int old_prio = mm->token_priority;
- static unsigned int global_faults;
- static unsigned int last_aging;
-
- global_faults++;
-
- current_interval = global_faults - mm->faultstamp;
-
- if (!spin_trylock(&swap_token_lock))
- return;
-
- /* First come first served */
- if (!swap_token_mm)
- goto replace_token;
-
- /*
- * Usually, we don't need priority aging because long interval faults
- * makes priority decrease quickly. But there is one exception. If the
- * token owner task is sleeping, it never make long interval faults.
- * Thus, we need a priority aging mechanism instead. The requirements
- * of priority aging are
- * 1) An aging interval is reasonable enough long. Too short aging
- * interval makes quick swap token lost and decrease performance.
- * 2) The swap token owner task have to get priority aging even if
- * it's under sleep.
- */
- if ((global_faults - last_aging) > TOKEN_AGING_INTERVAL) {
- swap_token_mm->token_priority /= 2;
- last_aging = global_faults;
- }
-
- if (mm == swap_token_mm) {
- mm->token_priority += 2;
- goto update_priority;
- }
-
- if (current_interval < mm->last_interval)
- mm->token_priority++;
- else {
- if (likely(mm->token_priority > 0))
- mm->token_priority--;
- }
-
- /* Check if we deserve the token */
- if (mm->token_priority > swap_token_mm->token_priority)
- goto replace_token;
-
-update_priority:
- trace_update_swap_token_priority(mm, old_prio, swap_token_mm);
-
-out:
- mm->faultstamp = global_faults;
- mm->last_interval = current_interval;
- spin_unlock(&swap_token_lock);
- return;
-
-replace_token:
- mm->token_priority += 2;
- trace_replace_swap_token(swap_token_mm, mm);
- swap_token_mm = mm;
- swap_token_memcg = swap_token_memcg_from_mm(mm);
- last_aging = global_faults;
- goto out;
-}
-
-/* Called on process exit. */
-void __put_swap_token(struct mm_struct *mm)
-{
- spin_lock(&swap_token_lock);
- if (likely(mm == swap_token_mm)) {
- trace_put_swap_token(swap_token_mm);
- swap_token_mm = NULL;
- swap_token_memcg = NULL;
- }
- spin_unlock(&swap_token_lock);
-}
-
-static bool match_memcg(struct mem_cgroup *a, struct mem_cgroup *b)
-{
- if (!a)
- return true;
- if (!b)
- return true;
- if (a == b)
- return true;
- return false;
-}
-
-void disable_swap_token(struct mem_cgroup *memcg)
-{
- /* memcg reclaim don't disable unrelated mm token. */
- if (match_memcg(memcg, swap_token_memcg)) {
- spin_lock(&swap_token_lock);
- if (match_memcg(memcg, swap_token_memcg)) {
- trace_disable_swap_token(swap_token_mm);
- swap_token_mm = NULL;
- swap_token_memcg = NULL;
- }
- spin_unlock(&swap_token_lock);
- }
-}
diff --git a/mm/vmscan.c b/mm/vmscan.c
index 33dc256..c69f5e2 100644
--- a/mm/vmscan.c
+++ b/mm/vmscan.c
@@ -53,24 +53,6 @@
#define CREATE_TRACE_POINTS
#include <trace/events/vmscan.h>
-/*
- * reclaim_mode determines how the inactive list is shrunk
- * RECLAIM_MODE_SINGLE: Reclaim only order-0 pages
- * RECLAIM_MODE_ASYNC: Do not block
- * RECLAIM_MODE_SYNC: Allow blocking e.g. call wait_on_page_writeback
- * RECLAIM_MODE_LUMPYRECLAIM: For high-order allocations, take a reference
- * page from the LRU and reclaim all pages within a
- * naturally aligned range
- * RECLAIM_MODE_COMPACTION: For high-order allocations, reclaim a number of
- * order-0 pages and then compact the zone
- */
-typedef unsigned __bitwise__ reclaim_mode_t;
-#define RECLAIM_MODE_SINGLE ((__force reclaim_mode_t)0x01u)
-#define RECLAIM_MODE_ASYNC ((__force reclaim_mode_t)0x02u)
-#define RECLAIM_MODE_SYNC ((__force reclaim_mode_t)0x04u)
-#define RECLAIM_MODE_LUMPYRECLAIM ((__force reclaim_mode_t)0x08u)
-#define RECLAIM_MODE_COMPACTION ((__force reclaim_mode_t)0x10u)
-
struct scan_control {
/* Incremented by the number of inactive pages that were scanned */
unsigned long nr_scanned;
@@ -96,11 +78,8 @@
int order;
- /*
- * Intend to reclaim enough continuous memory rather than reclaim
- * enough amount of memory. i.e, mode for high order allocation.
- */
- reclaim_mode_t reclaim_mode;
+ /* Scan (total_size >> priority) pages at once */
+ int priority;
/*
* The memory cgroup that hit its limit and as a result is the
@@ -164,26 +143,16 @@
{
return !sc->target_mem_cgroup;
}
-
-static bool scanning_global_lru(struct mem_cgroup_zone *mz)
-{
- return !mz->mem_cgroup;
-}
#else
static bool global_reclaim(struct scan_control *sc)
{
return true;
}
-
-static bool scanning_global_lru(struct mem_cgroup_zone *mz)
-{
- return true;
-}
#endif
static struct zone_reclaim_stat *get_reclaim_stat(struct mem_cgroup_zone *mz)
{
- if (!scanning_global_lru(mz))
+ if (!mem_cgroup_disabled())
return mem_cgroup_get_reclaim_stat(mz->mem_cgroup, mz->zone);
return &mz->zone->reclaim_stat;
@@ -192,7 +161,7 @@
static unsigned long zone_nr_lru_pages(struct mem_cgroup_zone *mz,
enum lru_list lru)
{
- if (!scanning_global_lru(mz))
+ if (!mem_cgroup_disabled())
return mem_cgroup_zone_nr_lru_pages(mz->mem_cgroup,
zone_to_nid(mz->zone),
zone_idx(mz->zone),
@@ -364,39 +333,6 @@
return ret;
}
-static void set_reclaim_mode(int priority, struct scan_control *sc,
- bool sync)
-{
- reclaim_mode_t syncmode = sync ? RECLAIM_MODE_SYNC : RECLAIM_MODE_ASYNC;
-
- /*
- * Initially assume we are entering either lumpy reclaim or
- * reclaim/compaction.Depending on the order, we will either set the
- * sync mode or just reclaim order-0 pages later.
- */
- if (COMPACTION_BUILD)
- sc->reclaim_mode = RECLAIM_MODE_COMPACTION;
- else
- sc->reclaim_mode = RECLAIM_MODE_LUMPYRECLAIM;
-
- /*
- * Avoid using lumpy reclaim or reclaim/compaction if possible by
- * restricting when its set to either costly allocations or when
- * under memory pressure
- */
- if (sc->order > PAGE_ALLOC_COSTLY_ORDER)
- sc->reclaim_mode |= syncmode;
- else if (sc->order && priority < DEF_PRIORITY - 2)
- sc->reclaim_mode |= syncmode;
- else
- sc->reclaim_mode = RECLAIM_MODE_SINGLE | RECLAIM_MODE_ASYNC;
-}
-
-static void reset_reclaim_mode(struct scan_control *sc)
-{
- sc->reclaim_mode = RECLAIM_MODE_SINGLE | RECLAIM_MODE_ASYNC;
-}
-
static inline int is_page_cache_freeable(struct page *page)
{
/*
@@ -416,10 +352,6 @@
return 1;
if (bdi == current->backing_dev_info)
return 1;
-
- /* lumpy reclaim for hugepage often need a lot of write */
- if (sc->order > PAGE_ALLOC_COSTLY_ORDER)
- return 1;
return 0;
}
@@ -523,8 +455,7 @@
/* synchronous write or broken a_ops? */
ClearPageReclaim(page);
}
- trace_mm_vmscan_writepage(page,
- trace_reclaim_flags(page, sc->reclaim_mode));
+ trace_mm_vmscan_writepage(page, trace_reclaim_flags(page));
inc_zone_page_state(page, NR_VMSCAN_WRITE);
return PAGE_SUCCESS;
}
@@ -701,19 +632,15 @@
};
static enum page_references page_check_references(struct page *page,
- struct mem_cgroup_zone *mz,
struct scan_control *sc)
{
int referenced_ptes, referenced_page;
unsigned long vm_flags;
- referenced_ptes = page_referenced(page, 1, mz->mem_cgroup, &vm_flags);
+ referenced_ptes = page_referenced(page, 1, sc->target_mem_cgroup,
+ &vm_flags);
referenced_page = TestClearPageReferenced(page);
- /* Lumpy reclaim - ignore references */
- if (sc->reclaim_mode & RECLAIM_MODE_LUMPYRECLAIM)
- return PAGEREF_RECLAIM;
-
/*
* Mlock lost the isolation race with us. Let try_to_unmap()
* move the page to the unevictable list.
@@ -763,11 +690,12 @@
* shrink_page_list() returns the number of reclaimed pages
*/
static unsigned long shrink_page_list(struct list_head *page_list,
- struct mem_cgroup_zone *mz,
+ struct zone *zone,
struct scan_control *sc,
- int priority,
+ enum ttu_flags ttu_flags,
unsigned long *ret_nr_dirty,
- unsigned long *ret_nr_writeback)
+ unsigned long *ret_nr_writeback,
+ bool force_reclaim)
{
LIST_HEAD(ret_pages);
LIST_HEAD(free_pages);
@@ -780,10 +708,10 @@
cond_resched();
while (!list_empty(page_list)) {
- enum page_references references;
struct address_space *mapping;
struct page *page;
int may_enter_fs;
+ enum page_references references = PAGEREF_RECLAIM_CLEAN;
cond_resched();
@@ -794,7 +722,7 @@
goto keep;
VM_BUG_ON(PageActive(page));
- VM_BUG_ON(page_zone(page) != mz->zone);
+ VM_BUG_ON(page_zone(page) != zone);
sc->nr_scanned++;
@@ -813,22 +741,13 @@
if (PageWriteback(page)) {
nr_writeback++;
- /*
- * Synchronous reclaim cannot queue pages for
- * writeback due to the possibility of stack overflow
- * but if it encounters a page under writeback, wait
- * for the IO to complete.
- */
- if ((sc->reclaim_mode & RECLAIM_MODE_SYNC) &&
- may_enter_fs)
- wait_on_page_writeback(page);
- else {
- unlock_page(page);
- goto keep_lumpy;
- }
+ unlock_page(page);
+ goto keep;
}
- references = page_check_references(page, mz, sc);
+ if (!force_reclaim)
+ references = page_check_references(page, sc);
+
switch (references) {
case PAGEREF_ACTIVATE:
goto activate_locked;
@@ -858,7 +777,7 @@
* processes. Try to unmap it here.
*/
if (page_mapped(page) && mapping) {
- switch (try_to_unmap(page, TTU_UNMAP)) {
+ switch (try_to_unmap(page, ttu_flags)) {
case SWAP_FAIL:
goto activate_locked;
case SWAP_AGAIN:
@@ -879,7 +798,8 @@
* unless under significant pressure.
*/
if (page_is_file_cache(page) &&
- (!current_is_kswapd() || priority >= DEF_PRIORITY - 2)) {
+ (!current_is_kswapd() ||
+ sc->priority >= DEF_PRIORITY - 2)) {
/*
* Immediately reclaim when written back.
* Similar in principal to deactivate_page()
@@ -908,7 +828,7 @@
goto activate_locked;
case PAGE_SUCCESS:
if (PageWriteback(page))
- goto keep_lumpy;
+ goto keep;
if (PageDirty(page))
goto keep;
@@ -994,7 +914,6 @@
try_to_free_swap(page);
unlock_page(page);
putback_lru_page(page);
- reset_reclaim_mode(sc);
continue;
activate_locked:
@@ -1007,8 +926,6 @@
keep_locked:
unlock_page(page);
keep:
- reset_reclaim_mode(sc);
-keep_lumpy:
list_add(&page->lru, &ret_pages);
VM_BUG_ON(PageLRU(page) || PageUnevictable(page));
}
@@ -1020,7 +937,7 @@
* will encounter the same problem
*/
if (nr_dirty && nr_dirty == nr_congested && global_reclaim(sc))
- zone_set_flag(mz->zone, ZONE_CONGESTED);
+ zone_set_flag(zone, ZONE_CONGESTED);
free_hot_cold_page_list(&free_pages, 1);
@@ -1031,6 +948,33 @@
return nr_reclaimed;
}
+unsigned long reclaim_clean_pages_from_list(struct zone *zone,
+ struct list_head *page_list)
+{
+ struct scan_control sc = {
+ .gfp_mask = GFP_KERNEL,
+ .priority = DEF_PRIORITY,
+ .may_unmap = 1,
+ };
+ unsigned long ret, dummy1, dummy2;
+ struct page *page, *next;
+ LIST_HEAD(clean_pages);
+
+ list_for_each_entry_safe(page, next, page_list, lru) {
+ if (page_is_file_cache(page) && !PageDirty(page)) {
+ ClearPageActive(page);
+ list_move(&page->lru, &clean_pages);
+ }
+ }
+
+ ret = shrink_page_list(&clean_pages, zone, &sc,
+ TTU_UNMAP|TTU_IGNORE_ACCESS,
+ &dummy1, &dummy2, true);
+ list_splice(&clean_pages, page_list);
+ __mod_zone_page_state(zone, NR_ISOLATED_FILE, -ret);
+ return ret;
+}
+
/*
* Attempt to remove the specified page from its LRU. Only take this page
* if it is of the appropriate PageActive status. Pages which are being
@@ -1041,35 +985,16 @@
*
* returns 0 on success, -ve errno on failure.
*/
-int __isolate_lru_page(struct page *page, isolate_mode_t mode, int file)
+int __isolate_lru_page(struct page *page, isolate_mode_t mode)
{
- bool all_lru_mode;
int ret = -EINVAL;
/* Only take pages on the LRU. */
if (!PageLRU(page))
return ret;
- all_lru_mode = (mode & (ISOLATE_ACTIVE|ISOLATE_INACTIVE)) ==
- (ISOLATE_ACTIVE|ISOLATE_INACTIVE);
-
- /*
- * When checking the active state, we need to be sure we are
- * dealing with comparible boolean values. Take the logical not
- * of each.
- */
- if (!all_lru_mode && !PageActive(page) != !(mode & ISOLATE_ACTIVE))
- return ret;
-
- if (!all_lru_mode && !!page_is_file_cache(page) != file)
- return ret;
-
- /*
- * When this function is being called for lumpy reclaim, we
- * initially look into all LRU pages, active, inactive and
- * unevictable; only give shrink_page_list evictable pages.
- */
- if (PageUnevictable(page))
+ /* Compaction should not handle unevictable pages but CMA can do so */
+ if (PageUnevictable(page) && !(mode & ISOLATE_UNEVICTABLE))
return ret;
ret = -EBUSY;
@@ -1135,52 +1060,38 @@
* Appropriate locks must be held before calling this function.
*
* @nr_to_scan: The number of pages to look through on the list.
- * @mz: The mem_cgroup_zone to pull pages from.
+ * @lruvec: The LRU vector to pull pages from.
* @dst: The temp list to put pages on to.
* @nr_scanned: The number of pages that were scanned.
* @sc: The scan_control struct for this reclaim session
* @mode: One of the LRU isolation modes
- * @active: True [1] if isolating active pages
- * @file: True [1] if isolating file [!anon] pages
+ * @lru: LRU list id for isolating
*
* returns how many pages were moved onto *@dst.
*/
static unsigned long isolate_lru_pages(unsigned long nr_to_scan,
- struct mem_cgroup_zone *mz, struct list_head *dst,
+ struct lruvec *lruvec, struct list_head *dst,
unsigned long *nr_scanned, struct scan_control *sc,
- isolate_mode_t mode, int active, int file)
+ isolate_mode_t mode, enum lru_list lru)
{
- struct lruvec *lruvec;
struct list_head *src;
unsigned long nr_taken = 0;
- unsigned long nr_lumpy_taken = 0;
- unsigned long nr_lumpy_dirty = 0;
- unsigned long nr_lumpy_failed = 0;
unsigned long scan;
- int lru = LRU_BASE;
+ int file = is_file_lru(lru);
- lruvec = mem_cgroup_zone_lruvec(mz->zone, mz->mem_cgroup);
- if (active)
- lru += LRU_ACTIVE;
- if (file)
- lru += LRU_FILE;
src = &lruvec->lists[lru];
for (scan = 0; scan < nr_to_scan && !list_empty(src); scan++) {
struct page *page;
- unsigned long pfn;
- unsigned long end_pfn;
- unsigned long page_pfn;
- int zone_id;
page = lru_to_page(src);
prefetchw_prev_lru_page(page, src, flags);
VM_BUG_ON(!PageLRU(page));
- switch (__isolate_lru_page(page, mode, file)) {
+ switch (__isolate_lru_page(page, mode)) {
case 0:
- mem_cgroup_lru_del(page);
+ mem_cgroup_lru_del_list(page, lru);
list_move(&page->lru, dst);
nr_taken += hpage_nr_pages(page);
break;
@@ -1193,84 +1104,6 @@
default:
BUG();
}
-
- if (!sc->order || !(sc->reclaim_mode & RECLAIM_MODE_LUMPYRECLAIM))
- continue;
-
- /*
- * Attempt to take all pages in the order aligned region
- * surrounding the tag page. Only take those pages of
- * the same active state as that tag page. We may safely
- * round the target page pfn down to the requested order
- * as the mem_map is guaranteed valid out to MAX_ORDER,
- * where that page is in a different zone we will detect
- * it from its zone id and abort this block scan.
- */
- zone_id = page_zone_id(page);
- page_pfn = page_to_pfn(page);
- pfn = page_pfn & ~((1 << sc->order) - 1);
- end_pfn = pfn + (1 << sc->order);
- for (; pfn < end_pfn; pfn++) {
- struct page *cursor_page;
-
- /* The target page is in the block, ignore it. */
- if (unlikely(pfn == page_pfn))
- continue;
-
- /* Avoid holes within the zone. */
- if (unlikely(!pfn_valid_within(pfn)))
- break;
-
- cursor_page = pfn_to_page(pfn);
-
- /* Check that we have not crossed a zone boundary. */
- if (unlikely(page_zone_id(cursor_page) != zone_id))
- break;
-
- /*
- * If we don't have enough swap space, reclaiming of
- * anon page which don't already have a swap slot is
- * pointless.
- */
- if (nr_swap_pages <= 0 && PageSwapBacked(cursor_page) &&
- !PageSwapCache(cursor_page))
- break;
-
- if (__isolate_lru_page(cursor_page, mode, file) == 0) {
- unsigned int isolated_pages;
-
- mem_cgroup_lru_del(cursor_page);
- list_move(&cursor_page->lru, dst);
- isolated_pages = hpage_nr_pages(cursor_page);
- nr_taken += isolated_pages;
- nr_lumpy_taken += isolated_pages;
- if (PageDirty(cursor_page))
- nr_lumpy_dirty += isolated_pages;
- scan++;
- pfn += isolated_pages - 1;
- } else {
- /*
- * Check if the page is freed already.
- *
- * We can't use page_count() as that
- * requires compound_head and we don't
- * have a pin on the page here. If a
- * page is tail, we may or may not
- * have isolated the head, so assume
- * it's not free, it'd be tricky to
- * track the head status without a
- * page pin.
- */
- if (!PageTail(cursor_page) &&
- !atomic_read(&cursor_page->_count))
- continue;
- break;
- }
- }
-
- /* If we break out of the loop above, lumpy reclaim failed */
- if (pfn < end_pfn)
- nr_lumpy_failed++;
}
*nr_scanned = scan;
@@ -1278,7 +1111,6 @@
trace_mm_vmscan_lru_isolate(sc->order,
nr_to_scan, scan,
nr_taken,
- nr_lumpy_taken, nr_lumpy_dirty, nr_lumpy_failed,
mode, file);
return nr_taken;
}
@@ -1407,112 +1239,25 @@
list_splice(&pages_to_free, page_list);
}
-static noinline_for_stack void
-update_isolated_counts(struct mem_cgroup_zone *mz,
- struct list_head *page_list,
- unsigned long *nr_anon,
- unsigned long *nr_file)
-{
- struct zone *zone = mz->zone;
- unsigned int count[NR_LRU_LISTS] = { 0, };
- unsigned long nr_active = 0;
- struct page *page;
- int lru;
-
- /*
- * Count pages and clear active flags
- */
- list_for_each_entry(page, page_list, lru) {
- int numpages = hpage_nr_pages(page);
- lru = page_lru_base_type(page);
- if (PageActive(page)) {
- lru += LRU_ACTIVE;
- ClearPageActive(page);
- nr_active += numpages;
- }
- count[lru] += numpages;
- }
-
- preempt_disable();
- __count_vm_events(PGDEACTIVATE, nr_active);
-
- __mod_zone_page_state(zone, NR_ACTIVE_FILE,
- -count[LRU_ACTIVE_FILE]);
- __mod_zone_page_state(zone, NR_INACTIVE_FILE,
- -count[LRU_INACTIVE_FILE]);
- __mod_zone_page_state(zone, NR_ACTIVE_ANON,
- -count[LRU_ACTIVE_ANON]);
- __mod_zone_page_state(zone, NR_INACTIVE_ANON,
- -count[LRU_INACTIVE_ANON]);
-
- *nr_anon = count[LRU_ACTIVE_ANON] + count[LRU_INACTIVE_ANON];
- *nr_file = count[LRU_ACTIVE_FILE] + count[LRU_INACTIVE_FILE];
-
- __mod_zone_page_state(zone, NR_ISOLATED_ANON, *nr_anon);
- __mod_zone_page_state(zone, NR_ISOLATED_FILE, *nr_file);
- preempt_enable();
-}
-
-/*
- * Returns true if a direct reclaim should wait on pages under writeback.
- *
- * If we are direct reclaiming for contiguous pages and we do not reclaim
- * everything in the list, try again and wait for writeback IO to complete.
- * This will stall high-order allocations noticeably. Only do that when really
- * need to free the pages under high memory pressure.
- */
-static inline bool should_reclaim_stall(unsigned long nr_taken,
- unsigned long nr_freed,
- int priority,
- struct scan_control *sc)
-{
- int lumpy_stall_priority;
-
- /* kswapd should not stall on sync IO */
- if (current_is_kswapd())
- return false;
-
- /* Only stall on lumpy reclaim */
- if (sc->reclaim_mode & RECLAIM_MODE_SINGLE)
- return false;
-
- /* If we have reclaimed everything on the isolated list, no stall */
- if (nr_freed == nr_taken)
- return false;
-
- /*
- * For high-order allocations, there are two stall thresholds.
- * High-cost allocations stall immediately where as lower
- * order allocations such as stacks require the scanning
- * priority to be much higher before stalling.
- */
- if (sc->order > PAGE_ALLOC_COSTLY_ORDER)
- lumpy_stall_priority = DEF_PRIORITY;
- else
- lumpy_stall_priority = DEF_PRIORITY / 3;
-
- return priority <= lumpy_stall_priority;
-}
-
/*
* shrink_inactive_list() is a helper for shrink_zone(). It returns the number
* of reclaimed pages
*/
static noinline_for_stack unsigned long
shrink_inactive_list(unsigned long nr_to_scan, struct mem_cgroup_zone *mz,
- struct scan_control *sc, int priority, int file)
+ struct scan_control *sc, enum lru_list lru)
{
LIST_HEAD(page_list);
unsigned long nr_scanned;
unsigned long nr_reclaimed = 0;
unsigned long nr_taken;
- unsigned long nr_anon;
- unsigned long nr_file;
unsigned long nr_dirty = 0;
unsigned long nr_writeback = 0;
- isolate_mode_t isolate_mode = ISOLATE_INACTIVE;
+ isolate_mode_t isolate_mode = 0;
+ int file = is_file_lru(lru);
struct zone *zone = mz->zone;
struct zone_reclaim_stat *reclaim_stat = get_reclaim_stat(mz);
+ struct lruvec *lruvec = mem_cgroup_zone_lruvec(zone, mz->mem_cgroup);
while (unlikely(too_many_isolated(zone, file, sc))) {
congestion_wait(BLK_RW_ASYNC, HZ/10);
@@ -1522,10 +1267,6 @@
return SWAP_CLUSTER_MAX;
}
- set_reclaim_mode(priority, sc, false);
- if (sc->reclaim_mode & RECLAIM_MODE_LUMPYRECLAIM)
- isolate_mode |= ISOLATE_ACTIVE;
-
lru_add_drain();
if (!sc->may_unmap)
@@ -1535,8 +1276,12 @@
spin_lock_irq(&zone->lru_lock);
- nr_taken = isolate_lru_pages(nr_to_scan, mz, &page_list, &nr_scanned,
- sc, isolate_mode, 0, file);
+ nr_taken = isolate_lru_pages(nr_to_scan, lruvec, &page_list,
+ &nr_scanned, sc, isolate_mode, lru);
+
+ __mod_zone_page_state(zone, NR_LRU_BASE + lru, -nr_taken);
+ __mod_zone_page_state(zone, NR_ISOLATED_ANON + file, nr_taken);
+
if (global_reclaim(sc)) {
zone->pages_scanned += nr_scanned;
if (current_is_kswapd())
@@ -1551,22 +1296,12 @@
if (nr_taken == 0)
return 0;
- update_isolated_counts(mz, &page_list, &nr_anon, &nr_file);
-
- nr_reclaimed = shrink_page_list(&page_list, mz, sc, priority,
- &nr_dirty, &nr_writeback);
-
- /* Check if we should syncronously wait for writeback */
- if (should_reclaim_stall(nr_taken, nr_reclaimed, priority, sc)) {
- set_reclaim_mode(priority, sc, true);
- nr_reclaimed += shrink_page_list(&page_list, mz, sc,
- priority, &nr_dirty, &nr_writeback);
- }
+ nr_reclaimed = shrink_page_list(&page_list, zone, sc, TTU_UNMAP,
+ &nr_dirty, &nr_writeback, false);
spin_lock_irq(&zone->lru_lock);
- reclaim_stat->recent_scanned[0] += nr_anon;
- reclaim_stat->recent_scanned[1] += nr_file;
+ reclaim_stat->recent_scanned[file] += nr_taken;
if (global_reclaim(sc)) {
if (current_is_kswapd())
@@ -1579,8 +1314,7 @@
putback_inactive_pages(mz, &page_list);
- __mod_zone_page_state(zone, NR_ISOLATED_ANON, -nr_anon);
- __mod_zone_page_state(zone, NR_ISOLATED_FILE, -nr_file);
+ __mod_zone_page_state(zone, NR_ISOLATED_ANON + file, -nr_taken);
spin_unlock_irq(&zone->lru_lock);
@@ -1609,14 +1343,15 @@
* DEF_PRIORITY-6 For SWAP_CLUSTER_MAX isolated pages, throttle if any
* isolated page is PageWriteback
*/
- if (nr_writeback && nr_writeback >= (nr_taken >> (DEF_PRIORITY-priority)))
+ if (nr_writeback && nr_writeback >=
+ (nr_taken >> (DEF_PRIORITY - sc->priority)))
wait_iff_congested(zone, BLK_RW_ASYNC, HZ/10);
trace_mm_vmscan_lru_shrink_inactive(zone->zone_pgdat->node_id,
zone_idx(zone),
nr_scanned, nr_reclaimed,
- priority,
- trace_shrink_flags(file, sc->reclaim_mode));
+ sc->priority,
+ trace_shrink_flags(file));
return nr_reclaimed;
}
@@ -1679,7 +1414,7 @@
static void shrink_active_list(unsigned long nr_to_scan,
struct mem_cgroup_zone *mz,
struct scan_control *sc,
- int priority, int file)
+ enum lru_list lru)
{
unsigned long nr_taken;
unsigned long nr_scanned;
@@ -1690,13 +1425,13 @@
struct page *page;
struct zone_reclaim_stat *reclaim_stat = get_reclaim_stat(mz);
unsigned long nr_rotated = 0;
- isolate_mode_t isolate_mode = ISOLATE_ACTIVE;
+ isolate_mode_t isolate_mode = 0;
+ int file = is_file_lru(lru);
struct zone *zone = mz->zone;
+ struct lruvec *lruvec = mem_cgroup_zone_lruvec(zone, mz->mem_cgroup);
lru_add_drain();
- reset_reclaim_mode(sc);
-
if (!sc->may_unmap)
isolate_mode |= ISOLATE_UNMAPPED;
if (!sc->may_writepage)
@@ -1704,18 +1439,15 @@
spin_lock_irq(&zone->lru_lock);
- nr_taken = isolate_lru_pages(nr_to_scan, mz, &l_hold, &nr_scanned, sc,
- isolate_mode, 1, file);
+ nr_taken = isolate_lru_pages(nr_to_scan, lruvec, &l_hold,
+ &nr_scanned, sc, isolate_mode, lru);
if (global_reclaim(sc))
zone->pages_scanned += nr_scanned;
reclaim_stat->recent_scanned[file] += nr_taken;
__count_zone_vm_events(PGREFILL, zone, nr_scanned);
- if (file)
- __mod_zone_page_state(zone, NR_ACTIVE_FILE, -nr_taken);
- else
- __mod_zone_page_state(zone, NR_ACTIVE_ANON, -nr_taken);
+ __mod_zone_page_state(zone, NR_LRU_BASE + lru, -nr_taken);
__mod_zone_page_state(zone, NR_ISOLATED_ANON + file, nr_taken);
spin_unlock_irq(&zone->lru_lock);
@@ -1737,7 +1469,8 @@
}
}
- if (page_referenced(page, 0, mz->mem_cgroup, &vm_flags)) {
+ if (page_referenced(page, 0, sc->target_mem_cgroup,
+ &vm_flags)) {
nr_rotated += hpage_nr_pages(page);
/*
* Identify referenced, file-backed active pages and
@@ -1770,10 +1503,8 @@
*/
reclaim_stat->recent_rotated[file] += nr_rotated;
- move_active_pages_to_lru(zone, &l_active, &l_hold,
- LRU_ACTIVE + file * LRU_FILE);
- move_active_pages_to_lru(zone, &l_inactive, &l_hold,
- LRU_BASE + file * LRU_FILE);
+ move_active_pages_to_lru(zone, &l_active, &l_hold, lru);
+ move_active_pages_to_lru(zone, &l_inactive, &l_hold, lru - LRU_ACTIVE);
__mod_zone_page_state(zone, NR_ISOLATED_ANON + file, -nr_taken);
spin_unlock_irq(&zone->lru_lock);
@@ -1811,7 +1542,7 @@
if (!total_swap_pages)
return 0;
- if (!scanning_global_lru(mz))
+ if (!mem_cgroup_disabled())
return mem_cgroup_inactive_anon_is_low(mz->mem_cgroup,
mz->zone);
@@ -1850,7 +1581,7 @@
*/
static int inactive_file_is_low(struct mem_cgroup_zone *mz)
{
- if (!scanning_global_lru(mz))
+ if (!mem_cgroup_disabled())
return mem_cgroup_inactive_file_is_low(mz->mem_cgroup,
mz->zone);
@@ -1867,25 +1598,24 @@
static unsigned long shrink_list(enum lru_list lru, unsigned long nr_to_scan,
struct mem_cgroup_zone *mz,
- struct scan_control *sc, int priority)
+ struct scan_control *sc)
{
int file = is_file_lru(lru);
if (is_active_lru(lru)) {
if (inactive_list_is_low(mz, file))
- shrink_active_list(nr_to_scan, mz, sc, priority, file);
+ shrink_active_list(nr_to_scan, mz, sc, lru);
return 0;
}
- return shrink_inactive_list(nr_to_scan, mz, sc, priority, file);
+ return shrink_inactive_list(nr_to_scan, mz, sc, lru);
}
-static int vmscan_swappiness(struct mem_cgroup_zone *mz,
- struct scan_control *sc)
+static int vmscan_swappiness(struct scan_control *sc)
{
if (global_reclaim(sc))
return vm_swappiness;
- return mem_cgroup_swappiness(mz->mem_cgroup);
+ return mem_cgroup_swappiness(sc->target_mem_cgroup);
}
/*
@@ -1897,7 +1627,7 @@
* nr[0] = anon pages to scan; nr[1] = file pages to scan
*/
static void get_scan_count(struct mem_cgroup_zone *mz, struct scan_control *sc,
- unsigned long *nr, int priority)
+ unsigned long *nr)
{
unsigned long anon, file, free;
unsigned long anon_prio, file_prio;
@@ -1953,8 +1683,8 @@
* With swappiness at 100, anonymous and file have the same priority.
* This scanning priority is essentially the inverse of IO cost.
*/
- anon_prio = vmscan_swappiness(mz, sc);
- file_prio = 200 - vmscan_swappiness(mz, sc);
+ anon_prio = vmscan_swappiness(sc);
+ file_prio = 200 - vmscan_swappiness(sc);
/*
* OK, so we have swap space and a fair amount of page cache
@@ -1983,10 +1713,10 @@
* proportional to the fraction of recently scanned pages on
* each list that were recently referenced and in active use.
*/
- ap = (anon_prio + 1) * (reclaim_stat->recent_scanned[0] + 1);
+ ap = anon_prio * (reclaim_stat->recent_scanned[0] + 1);
ap /= reclaim_stat->recent_rotated[0] + 1;
- fp = (file_prio + 1) * (reclaim_stat->recent_scanned[1] + 1);
+ fp = file_prio * (reclaim_stat->recent_scanned[1] + 1);
fp /= reclaim_stat->recent_rotated[1] + 1;
spin_unlock_irq(&mz->zone->lru_lock);
@@ -1999,8 +1729,8 @@
unsigned long scan;
scan = zone_nr_lru_pages(mz, lru);
- if (priority || noswap) {
- scan >>= priority;
+ if (sc->priority || noswap || !vmscan_swappiness(sc)) {
+ scan >>= sc->priority;
if (!scan && force_scan)
scan = SWAP_CLUSTER_MAX;
scan = div64_u64(scan * fraction[file], denominator);
@@ -2009,12 +1739,23 @@
}
}
+/* Use reclaim/compaction for costly allocs or under memory pressure */
+static bool in_reclaim_compaction(struct scan_control *sc)
+{
+ if (COMPACTION_BUILD && sc->order &&
+ (sc->order > PAGE_ALLOC_COSTLY_ORDER ||
+ sc->priority < DEF_PRIORITY - 2))
+ return true;
+
+ return false;
+}
+
/*
- * Reclaim/compaction depends on a number of pages being freed. To avoid
- * disruption to the system, a small number of order-0 pages continue to be
- * rotated and reclaimed in the normal fashion. However, by the time we get
- * back to the allocator and call try_to_compact_zone(), we ensure that
- * there are enough free pages for it to be likely successful
+ * Reclaim/compaction is used for high-order allocation requests. It reclaims
+ * order-0 pages before compacting the zone. should_continue_reclaim() returns
+ * true if more pages should be reclaimed such that when the page allocator
+ * calls try_to_compact_zone() that it will have enough free pages to succeed.
+ * It will give up earlier than that if there is difficulty reclaiming pages.
*/
static inline bool should_continue_reclaim(struct mem_cgroup_zone *mz,
unsigned long nr_reclaimed,
@@ -2025,7 +1766,7 @@
unsigned long inactive_lru_pages;
/* If not in reclaim/compaction mode, stop */
- if (!(sc->reclaim_mode & RECLAIM_MODE_COMPACTION))
+ if (!in_reclaim_compaction(sc))
return false;
/* Consider stopping depending on scan and reclaim activity */
@@ -2076,7 +1817,7 @@
/*
* This is a basic per-zone page freer. Used by both kswapd and direct reclaim.
*/
-static void shrink_mem_cgroup_zone(int priority, struct mem_cgroup_zone *mz,
+static void shrink_mem_cgroup_zone(struct mem_cgroup_zone *mz,
struct scan_control *sc)
{
unsigned long nr[NR_LRU_LISTS];
@@ -2089,7 +1830,7 @@
restart:
nr_reclaimed = 0;
nr_scanned = sc->nr_scanned;
- get_scan_count(mz, sc, nr, priority);
+ get_scan_count(mz, sc, nr);
blk_start_plug(&plug);
while (nr[LRU_INACTIVE_ANON] || nr[LRU_ACTIVE_FILE] ||
@@ -2101,7 +1842,7 @@
nr[lru] -= nr_to_scan;
nr_reclaimed += shrink_list(lru, nr_to_scan,
- mz, sc, priority);
+ mz, sc);
}
}
/*
@@ -2112,7 +1853,8 @@
* with multiple processes reclaiming pages, the total
* freeing target can get unreasonably large.
*/
- if (nr_reclaimed >= nr_to_reclaim && priority < DEF_PRIORITY)
+ if (nr_reclaimed >= nr_to_reclaim &&
+ sc->priority < DEF_PRIORITY)
break;
}
blk_finish_plug(&plug);
@@ -2123,23 +1865,23 @@
* rebalance the anon lru active/inactive ratio.
*/
if (inactive_anon_is_low(mz))
- shrink_active_list(SWAP_CLUSTER_MAX, mz, sc, priority, 0);
+ shrink_active_list(SWAP_CLUSTER_MAX, mz,
+ sc, LRU_ACTIVE_ANON);
/* reclaim/compaction might need reclaim to continue */
if (should_continue_reclaim(mz, nr_reclaimed,
- sc->nr_scanned - nr_scanned, sc))
+ sc->nr_scanned - nr_scanned, sc))
goto restart;
throttle_vm_writeout(sc->gfp_mask);
}
-static void shrink_zone(int priority, struct zone *zone,
- struct scan_control *sc)
+static void shrink_zone(struct zone *zone, struct scan_control *sc)
{
struct mem_cgroup *root = sc->target_mem_cgroup;
struct mem_cgroup_reclaim_cookie reclaim = {
.zone = zone,
- .priority = priority,
+ .priority = sc->priority,
};
struct mem_cgroup *memcg;
@@ -2150,7 +1892,7 @@
.zone = zone,
};
- shrink_mem_cgroup_zone(priority, &mz, sc);
+ shrink_mem_cgroup_zone(&mz, sc);
/*
* Limit reclaim has historically picked one memcg and
* scanned it with decreasing priority levels until
@@ -2226,8 +1968,7 @@
* the caller that it should consider retrying the allocation instead of
* further reclaim.
*/
-static bool shrink_zones(int priority, struct zonelist *zonelist,
- struct scan_control *sc)
+static bool shrink_zones(struct zonelist *zonelist, struct scan_control *sc)
{
struct zoneref *z;
struct zone *zone;
@@ -2254,7 +1995,8 @@
if (global_reclaim(sc)) {
if (!cpuset_zone_allowed_hardwall(zone, GFP_KERNEL))
continue;
- if (zone->all_unreclaimable && priority != DEF_PRIORITY)
+ if (zone->all_unreclaimable &&
+ sc->priority != DEF_PRIORITY)
continue; /* Let kswapd poll it */
if (COMPACTION_BUILD) {
/*
@@ -2286,7 +2028,7 @@
/* need some check for avoid more shrink_zone() */
}
- shrink_zone(priority, zone, sc);
+ shrink_zone(zone, sc);
}
return aborted_reclaim;
@@ -2337,7 +2079,6 @@
struct scan_control *sc,
struct shrink_control *shrink)
{
- int priority;
unsigned long total_scanned = 0;
struct reclaim_state *reclaim_state = current->reclaim_state;
struct zoneref *z;
@@ -2350,11 +2091,9 @@
if (global_reclaim(sc))
count_vm_event(ALLOCSTALL);
- for (priority = DEF_PRIORITY; priority >= 0; priority--) {
+ do {
sc->nr_scanned = 0;
- if (!priority)
- disable_swap_token(sc->target_mem_cgroup);
- aborted_reclaim = shrink_zones(priority, zonelist, sc);
+ aborted_reclaim = shrink_zones(zonelist, sc);
/*
* Don't shrink slabs when reclaiming memory from
@@ -2396,7 +2135,7 @@
/* Take a nap, wait for some writeback to complete */
if (!sc->hibernation_mode && sc->nr_scanned &&
- priority < DEF_PRIORITY - 2) {
+ sc->priority < DEF_PRIORITY - 2) {
struct zone *preferred_zone;
first_zones_zonelist(zonelist, gfp_zone(sc->gfp_mask),
@@ -2404,7 +2143,7 @@
&preferred_zone);
wait_iff_congested(preferred_zone, BLK_RW_ASYNC, HZ/10);
}
- }
+ } while (--sc->priority >= 0);
out:
delayacct_freepages_end();
@@ -2442,6 +2181,7 @@
.may_unmap = 1,
.may_swap = 1,
.order = order,
+ .priority = DEF_PRIORITY,
.target_mem_cgroup = NULL,
.nodemask = nodemask,
};
@@ -2474,6 +2214,7 @@
.may_unmap = 1,
.may_swap = !noswap,
.order = 0,
+ .priority = 0,
.target_mem_cgroup = memcg,
};
struct mem_cgroup_zone mz = {
@@ -2484,7 +2225,7 @@
sc.gfp_mask = (gfp_mask & GFP_RECLAIM_MASK) |
(GFP_HIGHUSER_MOVABLE & ~GFP_RECLAIM_MASK);
- trace_mm_vmscan_memcg_softlimit_reclaim_begin(0,
+ trace_mm_vmscan_memcg_softlimit_reclaim_begin(sc.order,
sc.may_writepage,
sc.gfp_mask);
@@ -2495,7 +2236,7 @@
* will pick up pages from other mem cgroup's as well. We hack
* the priority and make it zero.
*/
- shrink_mem_cgroup_zone(0, &mz, &sc);
+ shrink_mem_cgroup_zone(&mz, &sc);
trace_mm_vmscan_memcg_softlimit_reclaim_end(sc.nr_reclaimed);
@@ -2516,6 +2257,7 @@
.may_swap = !noswap,
.nr_to_reclaim = SWAP_CLUSTER_MAX,
.order = 0,
+ .priority = DEF_PRIORITY,
.target_mem_cgroup = memcg,
.nodemask = NULL, /* we don't care the placement */
.gfp_mask = (gfp_mask & GFP_RECLAIM_MASK) |
@@ -2546,8 +2288,7 @@
}
#endif
-static void age_active_anon(struct zone *zone, struct scan_control *sc,
- int priority)
+static void age_active_anon(struct zone *zone, struct scan_control *sc)
{
struct mem_cgroup *memcg;
@@ -2563,7 +2304,7 @@
if (inactive_anon_is_low(&mz))
shrink_active_list(SWAP_CLUSTER_MAX, &mz,
- sc, priority, 0);
+ sc, LRU_ACTIVE_ANON);
memcg = mem_cgroup_iter(NULL, memcg, NULL);
} while (memcg);
@@ -2672,7 +2413,6 @@
{
int all_zones_ok;
unsigned long balanced;
- int priority;
int i;
int end_zone = 0; /* Inclusive. 0 = ZONE_DMA */
unsigned long total_scanned;
@@ -2696,18 +2436,15 @@
};
loop_again:
total_scanned = 0;
+ sc.priority = DEF_PRIORITY;
sc.nr_reclaimed = 0;
sc.may_writepage = !laptop_mode;
count_vm_event(PAGEOUTRUN);
- for (priority = DEF_PRIORITY; priority >= 0; priority--) {
+ do {
unsigned long lru_pages = 0;
int has_under_min_watermark_zone = 0;
- /* The swap token gets in the way of swapout... */
- if (!priority)
- disable_swap_token(NULL);
-
all_zones_ok = 1;
balanced = 0;
@@ -2721,14 +2458,15 @@
if (!populated_zone(zone))
continue;
- if (zone->all_unreclaimable && priority != DEF_PRIORITY)
+ if (zone->all_unreclaimable &&
+ sc.priority != DEF_PRIORITY)
continue;
/*
* Do some background aging of the anon list, to give
* pages a chance to be referenced before reclaiming.
*/
- age_active_anon(zone, &sc, priority);
+ age_active_anon(zone, &sc);
/*
* If the number of buffer_heads in the machine
@@ -2776,7 +2514,8 @@
if (!populated_zone(zone))
continue;
- if (zone->all_unreclaimable && priority != DEF_PRIORITY)
+ if (zone->all_unreclaimable &&
+ sc.priority != DEF_PRIORITY)
continue;
sc.nr_scanned = 0;
@@ -2820,7 +2559,7 @@
!zone_watermark_ok_safe(zone, testorder,
high_wmark_pages(zone) + balance_gap,
end_zone, 0)) {
- shrink_zone(priority, zone, &sc);
+ shrink_zone(zone, &sc);
reclaim_state->reclaimed_slab = 0;
nr_slab = shrink_slab(&shrink, sc.nr_scanned, lru_pages);
@@ -2877,7 +2616,7 @@
* OK, kswapd is getting into trouble. Take a nap, then take
* another pass across the zones.
*/
- if (total_scanned && (priority < DEF_PRIORITY - 2)) {
+ if (total_scanned && (sc.priority < DEF_PRIORITY - 2)) {
if (has_under_min_watermark_zone)
count_vm_event(KSWAPD_SKIP_CONGESTION_WAIT);
else
@@ -2892,7 +2631,7 @@
*/
if (sc.nr_reclaimed >= SWAP_CLUSTER_MAX)
break;
- }
+ } while (--sc.priority >= 0);
out:
/*
@@ -2942,7 +2681,8 @@
if (!populated_zone(zone))
continue;
- if (zone->all_unreclaimable && priority != DEF_PRIORITY)
+ if (zone->all_unreclaimable &&
+ sc.priority != DEF_PRIORITY)
continue;
/* Would compaction fail due to lack of free memory? */
@@ -3013,7 +2753,18 @@
* them before going back to sleep.
*/
set_pgdat_percpu_threshold(pgdat, calculate_normal_threshold);
- schedule();
+
+ /*
+ * Compaction records what page blocks it recently failed to
+ * isolate pages from and skips them in the future scanning.
+ * When kswapd is going to sleep, it is reasonable to assume
+ * that pages and compaction may succeed so reset the cache.
+ */
+ reset_isolation_suitable(pgdat);
+
+ if (!kthread_should_stop())
+ schedule();
+
set_pgdat_percpu_threshold(pgdat, calculate_pressure_threshold);
} else {
if (remaining)
@@ -3209,6 +2960,7 @@
.nr_to_reclaim = nr_to_reclaim,
.hibernation_mode = 1,
.order = 0,
+ .priority = DEF_PRIORITY,
};
struct shrink_control shrink = {
.gfp_mask = sc.gfp_mask,
@@ -3386,7 +3138,6 @@
const unsigned long nr_pages = 1 << order;
struct task_struct *p = current;
struct reclaim_state reclaim_state;
- int priority;
struct scan_control sc = {
.may_writepage = !!(zone_reclaim_mode & RECLAIM_WRITE),
.may_unmap = !!(zone_reclaim_mode & RECLAIM_SWAP),
@@ -3395,6 +3146,7 @@
SWAP_CLUSTER_MAX),
.gfp_mask = gfp_mask,
.order = order,
+ .priority = ZONE_RECLAIM_PRIORITY,
};
struct shrink_control shrink = {
.gfp_mask = sc.gfp_mask,
@@ -3417,11 +3169,9 @@
* Free memory by calling shrink zone with increasing
* priorities until we have enough memory freed.
*/
- priority = ZONE_RECLAIM_PRIORITY;
do {
- shrink_zone(priority, zone, &sc);
- priority--;
- } while (priority >= 0 && sc.nr_reclaimed < nr_pages);
+ shrink_zone(zone, &sc);
+ } while (sc.nr_reclaimed < nr_pages && --sc.priority >= 0);
}
nr_slab_pages0 = zone_page_state(zone, NR_SLAB_RECLAIMABLE);
diff --git a/mm/vmstat.c b/mm/vmstat.c
index 8e18d6b..959a558 100644
--- a/mm/vmstat.c
+++ b/mm/vmstat.c
@@ -761,10 +761,14 @@
"pgrotated",
+#ifdef CONFIG_MIGRATION
+ "pgmigrate_success",
+ "pgmigrate_fail",
+#endif
#ifdef CONFIG_COMPACTION
- "compact_blocks_moved",
- "compact_pages_moved",
- "compact_pagemigrate_failed",
+ "compact_migrate_scanned",
+ "compact_free_scanned",
+ "compact_isolated",
"compact_stall",
"compact_fail",
"compact_success",
diff --git a/net/wireless/nl80211.c b/net/wireless/nl80211.c
index 6ed6d3e..68fd9d7 100644
--- a/net/wireless/nl80211.c
+++ b/net/wireless/nl80211.c
@@ -222,6 +222,7 @@
[NL80211_ATTR_MDID] = { .type = NLA_U16 },
[NL80211_ATTR_IE_RIC] = { .type = NLA_BINARY,
.len = IEEE80211_MAX_DATA_LEN },
+ [NL80211_ATTR_PEER_AID] = { .type = NLA_U16 },
};
/* policy for the key attributes */
@@ -2787,6 +2788,8 @@
int err;
/* Dummy STA entry gets updated once the peer capabilities are known */
+ if (info->attrs[NL80211_ATTR_PEER_AID])
+ params->aid = nla_get_u16(info->attrs[NL80211_ATTR_PEER_AID]);
if (info->attrs[NL80211_ATTR_HT_CAPABILITY])
params->ht_capa =
nla_data(info->attrs[NL80211_ATTR_HT_CAPABILITY]);
@@ -3016,7 +3019,8 @@
if (!info->attrs[NL80211_ATTR_STA_SUPPORTED_RATES])
return -EINVAL;
- if (!info->attrs[NL80211_ATTR_STA_AID])
+ if (!info->attrs[NL80211_ATTR_STA_AID] &&
+ !info->attrs[NL80211_ATTR_PEER_AID])
return -EINVAL;
mac_addr = nla_data(info->attrs[NL80211_ATTR_MAC]);
@@ -3027,7 +3031,10 @@
params.listen_interval =
nla_get_u16(info->attrs[NL80211_ATTR_STA_LISTEN_INTERVAL]);
- params.aid = nla_get_u16(info->attrs[NL80211_ATTR_STA_AID]);
+ if (info->attrs[NL80211_ATTR_STA_AID])
+ params.aid = nla_get_u16(info->attrs[NL80211_ATTR_STA_AID]);
+ else
+ params.aid = nla_get_u16(info->attrs[NL80211_ATTR_PEER_AID]);
if (!params.aid || params.aid > IEEE80211_MAX_AID)
return -EINVAL;
diff --git a/scripts/build-all.py b/scripts/build-all.py
index 4789af7..c585e4a 100755
--- a/scripts/build-all.py
+++ b/scripts/build-all.py
@@ -88,6 +88,7 @@
r'[fm]sm[0-9]*_defconfig',
r'apq*_defconfig',
r'qsd*_defconfig',
+ r'msmkrypton*_defconfig',
)
for p in arch_pats:
for n in glob.glob('arch/arm/configs/' + p):
diff --git a/scripts/dtc/Makefile b/scripts/dtc/Makefile
index 6d1c6bb..2a48022 100644
--- a/scripts/dtc/Makefile
+++ b/scripts/dtc/Makefile
@@ -27,3 +27,5 @@
# dependencies on generated files need to be listed explicitly
$(obj)/dtc-lexer.lex.o: $(obj)/dtc-parser.tab.h
+# generated files need to be cleaned explicitly
+clean-files := dtc-lexer.lex.c dtc-parser.tab.c dtc-parser.tab.h
diff --git a/scripts/dtc/Makefile.dtc b/scripts/dtc/Makefile.dtc
index 6ddf9ec..bece49b 100644
--- a/scripts/dtc/Makefile.dtc
+++ b/scripts/dtc/Makefile.dtc
@@ -3,7 +3,16 @@
# This is not a complete Makefile of itself. Instead, it is designed to
# be easily embeddable into other systems of Makefiles.
#
-DTC_SRCS = dtc.c flattree.c fstree.c data.c livetree.c treesource.c srcpos.c \
- checks.c
+DTC_SRCS = \
+ checks.c \
+ data.c \
+ dtc.c \
+ flattree.c \
+ fstree.c \
+ livetree.c \
+ srcpos.c \
+ treesource.c \
+ util.c
+
DTC_GEN_SRCS = dtc-lexer.lex.c dtc-parser.tab.c
DTC_OBJS = $(DTC_SRCS:%.c=%.o) $(DTC_GEN_SRCS:%.c=%.o)
diff --git a/scripts/dtc/checks.c b/scripts/dtc/checks.c
index a662a00..ee96a25 100644
--- a/scripts/dtc/checks.c
+++ b/scripts/dtc/checks.c
@@ -31,12 +31,6 @@
#define TRACE(c, fmt, ...) do { } while (0)
#endif
-enum checklevel {
- IGNORE = 0,
- WARN = 1,
- ERROR = 2,
-};
-
enum checkstatus {
UNCHECKED = 0,
PREREQ,
@@ -57,14 +51,14 @@
node_check_fn node_fn;
prop_check_fn prop_fn;
void *data;
- enum checklevel level;
+ bool warn, error;
enum checkstatus status;
int inprogress;
int num_prereqs;
struct check **prereq;
};
-#define CHECK(nm, tfn, nfn, pfn, d, lvl, ...) \
+#define CHECK_ENTRY(nm, tfn, nfn, pfn, d, w, e, ...) \
static struct check *nm##_prereqs[] = { __VA_ARGS__ }; \
static struct check nm = { \
.name = #nm, \
@@ -72,20 +66,37 @@
.node_fn = (nfn), \
.prop_fn = (pfn), \
.data = (d), \
- .level = (lvl), \
+ .warn = (w), \
+ .error = (e), \
.status = UNCHECKED, \
.num_prereqs = ARRAY_SIZE(nm##_prereqs), \
.prereq = nm##_prereqs, \
};
+#define WARNING(nm, tfn, nfn, pfn, d, ...) \
+ CHECK_ENTRY(nm, tfn, nfn, pfn, d, true, false, __VA_ARGS__)
+#define ERROR(nm, tfn, nfn, pfn, d, ...) \
+ CHECK_ENTRY(nm, tfn, nfn, pfn, d, false, true, __VA_ARGS__)
+#define CHECK(nm, tfn, nfn, pfn, d, ...) \
+ CHECK_ENTRY(nm, tfn, nfn, pfn, d, false, false, __VA_ARGS__)
-#define TREE_CHECK(nm, d, lvl, ...) \
- CHECK(nm, check_##nm, NULL, NULL, d, lvl, __VA_ARGS__)
-#define NODE_CHECK(nm, d, lvl, ...) \
- CHECK(nm, NULL, check_##nm, NULL, d, lvl, __VA_ARGS__)
-#define PROP_CHECK(nm, d, lvl, ...) \
- CHECK(nm, NULL, NULL, check_##nm, d, lvl, __VA_ARGS__)
-#define BATCH_CHECK(nm, lvl, ...) \
- CHECK(nm, NULL, NULL, NULL, NULL, lvl, __VA_ARGS__)
+#define TREE_WARNING(nm, d, ...) \
+ WARNING(nm, check_##nm, NULL, NULL, d, __VA_ARGS__)
+#define TREE_ERROR(nm, d, ...) \
+ ERROR(nm, check_##nm, NULL, NULL, d, __VA_ARGS__)
+#define TREE_CHECK(nm, d, ...) \
+ CHECK(nm, check_##nm, NULL, NULL, d, __VA_ARGS__)
+#define NODE_WARNING(nm, d, ...) \
+ WARNING(nm, NULL, check_##nm, NULL, d, __VA_ARGS__)
+#define NODE_ERROR(nm, d, ...) \
+ ERROR(nm, NULL, check_##nm, NULL, d, __VA_ARGS__)
+#define NODE_CHECK(nm, d, ...) \
+ CHECK(nm, NULL, check_##nm, NULL, d, __VA_ARGS__)
+#define PROP_WARNING(nm, d, ...) \
+ WARNING(nm, NULL, NULL, check_##nm, d, __VA_ARGS__)
+#define PROP_ERROR(nm, d, ...) \
+ ERROR(nm, NULL, NULL, check_##nm, d, __VA_ARGS__)
+#define PROP_CHECK(nm, d, ...) \
+ CHECK(nm, NULL, NULL, check_##nm, d, __VA_ARGS__)
#ifdef __GNUC__
static inline void check_msg(struct check *c, const char *fmt, ...) __attribute__((format (printf, 2, 3)));
@@ -95,13 +106,13 @@
va_list ap;
va_start(ap, fmt);
- if ((c->level < WARN) || (c->level <= quiet))
- return; /* Suppress message */
-
- fprintf(stderr, "%s (%s): ",
- (c->level == ERROR) ? "ERROR" : "Warning", c->name);
- vfprintf(stderr, fmt, ap);
- fprintf(stderr, "\n");
+ if ((c->warn && (quiet < 1))
+ || (c->error && (quiet < 2))) {
+ fprintf(stderr, "%s (%s): ",
+ (c->error) ? "ERROR" : "Warning", c->name);
+ vfprintf(stderr, fmt, ap);
+ fprintf(stderr, "\n");
+ }
}
#define FAIL(c, ...) \
@@ -167,7 +178,7 @@
out:
c->inprogress = 0;
- if ((c->status != PASSED) && (c->level == ERROR))
+ if ((c->status != PASSED) && (c->error))
error = 1;
return error;
}
@@ -176,6 +187,13 @@
* Utility check functions
*/
+/* A check which always fails, for testing purposes only */
+static inline void check_always_fail(struct check *c, struct node *dt)
+{
+ FAIL(c, "always_fail check");
+}
+TREE_CHECK(always_fail, NULL);
+
static void check_is_string(struct check *c, struct node *root,
struct node *node)
{
@@ -190,8 +208,10 @@
FAIL(c, "\"%s\" property in %s is not a string",
propname, node->fullpath);
}
-#define CHECK_IS_STRING(nm, propname, lvl) \
- CHECK(nm, NULL, check_is_string, NULL, (propname), (lvl))
+#define WARNING_IF_NOT_STRING(nm, propname) \
+ WARNING(nm, NULL, check_is_string, NULL, (propname))
+#define ERROR_IF_NOT_STRING(nm, propname) \
+ ERROR(nm, NULL, check_is_string, NULL, (propname))
static void check_is_cell(struct check *c, struct node *root,
struct node *node)
@@ -207,8 +227,10 @@
FAIL(c, "\"%s\" property in %s is not a single cell",
propname, node->fullpath);
}
-#define CHECK_IS_CELL(nm, propname, lvl) \
- CHECK(nm, NULL, check_is_cell, NULL, (propname), (lvl))
+#define WARNING_IF_NOT_CELL(nm, propname) \
+ WARNING(nm, NULL, check_is_cell, NULL, (propname))
+#define ERROR_IF_NOT_CELL(nm, propname) \
+ ERROR(nm, NULL, check_is_cell, NULL, (propname))
/*
* Structural check functions
@@ -227,20 +249,24 @@
FAIL(c, "Duplicate node name %s",
child->fullpath);
}
-NODE_CHECK(duplicate_node_names, NULL, ERROR);
+NODE_ERROR(duplicate_node_names, NULL);
static void check_duplicate_property_names(struct check *c, struct node *dt,
struct node *node)
{
struct property *prop, *prop2;
- for_each_property(node, prop)
- for (prop2 = prop->next; prop2; prop2 = prop2->next)
+ for_each_property(node, prop) {
+ for (prop2 = prop->next; prop2; prop2 = prop2->next) {
+ if (prop2->deleted)
+ continue;
if (streq(prop->name, prop2->name))
FAIL(c, "Duplicate property name %s in %s",
prop->name, node->fullpath);
+ }
+ }
}
-NODE_CHECK(duplicate_property_names, NULL, ERROR);
+NODE_ERROR(duplicate_property_names, NULL);
#define LOWERCASE "abcdefghijklmnopqrstuvwxyz"
#define UPPERCASE "ABCDEFGHIJKLMNOPQRSTUVWXYZ"
@@ -256,7 +282,7 @@
FAIL(c, "Bad character '%c' in node %s",
node->name[n], node->fullpath);
}
-NODE_CHECK(node_name_chars, PROPNODECHARS "@", ERROR);
+NODE_ERROR(node_name_chars, PROPNODECHARS "@");
static void check_node_name_format(struct check *c, struct node *dt,
struct node *node)
@@ -265,7 +291,7 @@
FAIL(c, "Node %s has multiple '@' characters in name",
node->fullpath);
}
-NODE_CHECK(node_name_format, NULL, ERROR, &node_name_chars);
+NODE_ERROR(node_name_format, NULL, &node_name_chars);
static void check_property_name_chars(struct check *c, struct node *dt,
struct node *node, struct property *prop)
@@ -276,7 +302,7 @@
FAIL(c, "Bad character '%c' in property name \"%s\", node %s",
prop->name[n], prop->name, node->fullpath);
}
-PROP_CHECK(property_name_chars, PROPNODECHARS, ERROR);
+PROP_ERROR(property_name_chars, PROPNODECHARS);
#define DESCLABEL_FMT "%s%s%s%s%s"
#define DESCLABEL_ARGS(node,prop,mark) \
@@ -331,8 +357,8 @@
for_each_marker_of_type(m, LABEL)
check_duplicate_label(c, dt, m->ref, node, prop, m);
}
-CHECK(duplicate_label, NULL, check_duplicate_label_node,
- check_duplicate_label_prop, NULL, ERROR);
+ERROR(duplicate_label, NULL, check_duplicate_label_node,
+ check_duplicate_label_prop, NULL);
static void check_explicit_phandles(struct check *c, struct node *root,
struct node *node, struct property *prop)
@@ -391,7 +417,7 @@
node->phandle = phandle;
}
-PROP_CHECK(explicit_phandles, NULL, ERROR);
+PROP_ERROR(explicit_phandles, NULL);
static void check_name_properties(struct check *c, struct node *root,
struct node *node)
@@ -420,8 +446,8 @@
free(prop);
}
}
-CHECK_IS_STRING(name_is_string, "name", ERROR);
-NODE_CHECK(name_properties, NULL, ERROR, &name_is_string);
+ERROR_IF_NOT_STRING(name_is_string, "name");
+NODE_ERROR(name_properties, NULL, &name_is_string);
/*
* Reference fixup functions
@@ -448,7 +474,7 @@
*((cell_t *)(prop->val.val + m->offset)) = cpu_to_fdt32(phandle);
}
}
-CHECK(phandle_references, NULL, NULL, fixup_phandle_references, NULL, ERROR,
+ERROR(phandle_references, NULL, NULL, fixup_phandle_references, NULL,
&duplicate_node_names, &explicit_phandles);
static void fixup_path_references(struct check *c, struct node *dt,
@@ -473,19 +499,19 @@
strlen(path) + 1);
}
}
-CHECK(path_references, NULL, NULL, fixup_path_references, NULL, ERROR,
+ERROR(path_references, NULL, NULL, fixup_path_references, NULL,
&duplicate_node_names);
/*
* Semantic checks
*/
-CHECK_IS_CELL(address_cells_is_cell, "#address-cells", WARN);
-CHECK_IS_CELL(size_cells_is_cell, "#size-cells", WARN);
-CHECK_IS_CELL(interrupt_cells_is_cell, "#interrupt-cells", WARN);
+WARNING_IF_NOT_CELL(address_cells_is_cell, "#address-cells");
+WARNING_IF_NOT_CELL(size_cells_is_cell, "#size-cells");
+WARNING_IF_NOT_CELL(interrupt_cells_is_cell, "#interrupt-cells");
-CHECK_IS_STRING(device_type_is_string, "device_type", WARN);
-CHECK_IS_STRING(model_is_string, "model", WARN);
-CHECK_IS_STRING(status_is_string, "status", WARN);
+WARNING_IF_NOT_STRING(device_type_is_string, "device_type");
+WARNING_IF_NOT_STRING(model_is_string, "model");
+WARNING_IF_NOT_STRING(status_is_string, "status");
static void fixup_addr_size_cells(struct check *c, struct node *dt,
struct node *node)
@@ -503,8 +529,8 @@
if (prop)
node->size_cells = propval_cell(prop);
}
-CHECK(addr_size_cells, NULL, fixup_addr_size_cells, NULL, NULL, WARN,
- &address_cells_is_cell, &size_cells_is_cell);
+WARNING(addr_size_cells, NULL, fixup_addr_size_cells, NULL, NULL,
+ &address_cells_is_cell, &size_cells_is_cell);
#define node_addr_cells(n) \
(((n)->addr_cells == -1) ? 2 : (n)->addr_cells)
@@ -538,7 +564,7 @@
"(#address-cells == %d, #size-cells == %d)",
node->fullpath, prop->val.len, addr_cells, size_cells);
}
-NODE_CHECK(reg_format, NULL, WARN, &addr_size_cells);
+NODE_WARNING(reg_format, NULL, &addr_size_cells);
static void check_ranges_format(struct check *c, struct node *dt,
struct node *node)
@@ -579,7 +605,7 @@
p_addr_cells, c_addr_cells, c_size_cells);
}
}
-NODE_CHECK(ranges_format, NULL, WARN, &addr_size_cells);
+NODE_WARNING(ranges_format, NULL, &addr_size_cells);
/*
* Style checks
@@ -606,7 +632,7 @@
FAIL(c, "Relying on default #size-cells value for %s",
node->fullpath);
}
-NODE_CHECK(avoid_default_addr_size, NULL, WARN, &addr_size_cells);
+NODE_WARNING(avoid_default_addr_size, NULL, &addr_size_cells);
static void check_obsolete_chosen_interrupt_controller(struct check *c,
struct node *dt)
@@ -623,7 +649,7 @@
FAIL(c, "/chosen has obsolete \"interrupt-controller\" "
"property");
}
-TREE_CHECK(obsolete_chosen_interrupt_controller, NULL, WARN);
+TREE_WARNING(obsolete_chosen_interrupt_controller, NULL);
static struct check *check_table[] = {
&duplicate_node_names, &duplicate_property_names,
@@ -642,8 +668,71 @@
&avoid_default_addr_size,
&obsolete_chosen_interrupt_controller,
+
+ &always_fail,
};
+static void enable_warning_error(struct check *c, bool warn, bool error)
+{
+ int i;
+
+ /* Raising level, also raise it for prereqs */
+ if ((warn && !c->warn) || (error && !c->error))
+ for (i = 0; i < c->num_prereqs; i++)
+ enable_warning_error(c->prereq[i], warn, error);
+
+ c->warn = c->warn || warn;
+ c->error = c->error || error;
+}
+
+static void disable_warning_error(struct check *c, bool warn, bool error)
+{
+ int i;
+
+ /* Lowering level, also lower it for things this is the prereq
+ * for */
+ if ((warn && c->warn) || (error && c->error)) {
+ for (i = 0; i < ARRAY_SIZE(check_table); i++) {
+ struct check *cc = check_table[i];
+ int j;
+
+ for (j = 0; j < cc->num_prereqs; j++)
+ if (cc->prereq[j] == c)
+ disable_warning_error(cc, warn, error);
+ }
+ }
+
+ c->warn = c->warn && !warn;
+ c->error = c->error && !error;
+}
+
+void parse_checks_option(bool warn, bool error, const char *optarg)
+{
+ int i;
+ const char *name = optarg;
+ bool enable = true;
+
+ if ((strncmp(optarg, "no-", 3) == 0)
+ || (strncmp(optarg, "no_", 3) == 0)) {
+ name = optarg + 3;
+ enable = false;
+ }
+
+ for (i = 0; i < ARRAY_SIZE(check_table); i++) {
+ struct check *c = check_table[i];
+
+ if (streq(c->name, name)) {
+ if (enable)
+ enable_warning_error(c, warn, error);
+ else
+ disable_warning_error(c, warn, error);
+ return;
+ }
+ }
+
+ die("Unrecognized check name \"%s\"\n", name);
+}
+
void process_checks(int force, struct boot_info *bi)
{
struct node *dt = bi->dt;
@@ -653,7 +742,7 @@
for (i = 0; i < ARRAY_SIZE(check_table); i++) {
struct check *c = check_table[i];
- if (c->level != IGNORE)
+ if (c->warn || c->error)
error = error || run_check(c, dt);
}
diff --git a/scripts/dtc/data.c b/scripts/dtc/data.c
index fe555e8..4a40c5b 100644
--- a/scripts/dtc/data.c
+++ b/scripts/dtc/data.c
@@ -68,40 +68,6 @@
return d;
}
-static char get_oct_char(const char *s, int *i)
-{
- char x[4];
- char *endx;
- long val;
-
- x[3] = '\0';
- strncpy(x, s + *i, 3);
-
- val = strtol(x, &endx, 8);
-
- assert(endx > x);
-
- (*i) += endx - x;
- return val;
-}
-
-static char get_hex_char(const char *s, int *i)
-{
- char x[3];
- char *endx;
- long val;
-
- x[2] = '\0';
- strncpy(x, s + *i, 2);
-
- val = strtol(x, &endx, 16);
- if (!(endx > x))
- die("\\x used with no following hex digits\n");
-
- (*i) += endx - x;
- return val;
-}
-
struct data data_copy_escape_string(const char *s, int len)
{
int i = 0;
@@ -114,53 +80,10 @@
while (i < len) {
char c = s[i++];
- if (c != '\\') {
- q[d.len++] = c;
- continue;
- }
+ if (c == '\\')
+ c = get_escape_char(s, &i);
- c = s[i++];
- assert(c);
- switch (c) {
- case 'a':
- q[d.len++] = '\a';
- break;
- case 'b':
- q[d.len++] = '\b';
- break;
- case 't':
- q[d.len++] = '\t';
- break;
- case 'n':
- q[d.len++] = '\n';
- break;
- case 'v':
- q[d.len++] = '\v';
- break;
- case 'f':
- q[d.len++] = '\f';
- break;
- case 'r':
- q[d.len++] = '\r';
- break;
- case '0':
- case '1':
- case '2':
- case '3':
- case '4':
- case '5':
- case '6':
- case '7':
- i--; /* need to re-read the first digit as
- * part of the octal value */
- q[d.len++] = get_oct_char(s, &i);
- break;
- case 'x':
- q[d.len++] = get_hex_char(s, &i);
- break;
- default:
- q[d.len++] = c;
- }
+ q[d.len++] = c;
}
q[d.len++] = '\0';
@@ -245,11 +168,33 @@
return d;
}
-struct data data_append_cell(struct data d, cell_t word)
+struct data data_append_integer(struct data d, uint64_t value, int bits)
{
- cell_t beword = cpu_to_fdt32(word);
+ uint8_t value_8;
+ uint16_t value_16;
+ uint32_t value_32;
+ uint64_t value_64;
- return data_append_data(d, &beword, sizeof(beword));
+ switch (bits) {
+ case 8:
+ value_8 = value;
+ return data_append_data(d, &value_8, 1);
+
+ case 16:
+ value_16 = cpu_to_fdt16(value);
+ return data_append_data(d, &value_16, 2);
+
+ case 32:
+ value_32 = cpu_to_fdt32(value);
+ return data_append_data(d, &value_32, 4);
+
+ case 64:
+ value_64 = cpu_to_fdt64(value);
+ return data_append_data(d, &value_64, 8);
+
+ default:
+ die("Invalid literal size (%d)\n", bits);
+ }
}
struct data data_append_re(struct data d, const struct fdt_reserve_entry *re)
@@ -262,11 +207,14 @@
return data_append_data(d, &bere, sizeof(bere));
}
+struct data data_append_cell(struct data d, cell_t word)
+{
+ return data_append_integer(d, word, sizeof(word) * 8);
+}
+
struct data data_append_addr(struct data d, uint64_t addr)
{
- uint64_t beaddr = cpu_to_fdt64(addr);
-
- return data_append_data(d, &beaddr, sizeof(beaddr));
+ return data_append_integer(d, addr, sizeof(addr) * 8);
}
struct data data_append_byte(struct data d, uint8_t byte)
diff --git a/scripts/dtc/dtc-lexer.l b/scripts/dtc/dtc-lexer.l
index e866ea5..254d5af 100644
--- a/scripts/dtc/dtc-lexer.l
+++ b/scripts/dtc/dtc-lexer.l
@@ -29,6 +29,7 @@
PATHCHAR ({PROPNODECHAR}|[/])
LABEL [a-zA-Z_][a-zA-Z0-9_]*
STRING \"([^\\"]|\\.)*\"
+CHAR_LITERAL '([^']|\\')*'
WS [[:space:]]
COMMENT "/*"([^*]|\*+[^*/])*\*+"/"
LINECOMMENT "//".*\n
@@ -70,6 +71,27 @@
push_input_file(name);
}
+<*>^"#"(line)?{WS}+[0-9]+{WS}+{STRING}({WS}+[0-9]+)? {
+ char *line, *tmp, *fn;
+ /* skip text before line # */
+ line = yytext;
+ while (!isdigit(*line))
+ line++;
+ /* skip digits in line # */
+ tmp = line;
+ while (!isspace(*tmp))
+ tmp++;
+ /* "NULL"-terminate line # */
+ *tmp = '\0';
+ /* start of filename */
+ fn = strchr(tmp + 1, '"') + 1;
+ /* strip trailing " from filename */
+ tmp = strchr(fn, '"');
+ *tmp = 0;
+ /* -1 since #line is the number of the next line */
+ srcpos_set_line(xstrdup(fn), atoi(line) - 1);
+ }
+
<*><<EOF>> {
if (!pop_input_file()) {
yyterminate();
@@ -96,6 +118,26 @@
return DT_MEMRESERVE;
}
+<*>"/bits/" {
+ DPRINT("Keyword: /bits/\n");
+ BEGIN_DEFAULT();
+ return DT_BITS;
+ }
+
+<*>"/delete-property/" {
+ DPRINT("Keyword: /delete-property/\n");
+ DPRINT("<PROPNODENAME>\n");
+ BEGIN(PROPNODENAME);
+ return DT_DEL_PROP;
+ }
+
+<*>"/delete-node/" {
+ DPRINT("Keyword: /delete-node/\n");
+ DPRINT("<PROPNODENAME>\n");
+ BEGIN(PROPNODENAME);
+ return DT_DEL_NODE;
+ }
+
<*>{LABEL}: {
DPRINT("Label: %s\n", yytext);
yylval.labelref = xstrdup(yytext);
@@ -103,12 +145,19 @@
return DT_LABEL;
}
-<V1>[0-9]+|0[xX][0-9a-fA-F]+ {
+<V1>([0-9]+|0[xX][0-9a-fA-F]+)(U|L|UL|LL|ULL)? {
yylval.literal = xstrdup(yytext);
DPRINT("Literal: '%s'\n", yylval.literal);
return DT_LITERAL;
}
+<*>{CHAR_LITERAL} {
+ yytext[yyleng-1] = '\0';
+ yylval.literal = xstrdup(yytext+1);
+ DPRINT("Character literal: %s\n", yylval.literal);
+ return DT_CHAR_LITERAL;
+ }
+
<*>\&{LABEL} { /* label reference */
DPRINT("Ref: %s\n", yytext+1);
yylval.labelref = xstrdup(yytext+1);
@@ -134,9 +183,10 @@
return ']';
}
-<PROPNODENAME>{PROPNODECHAR}+ {
+<PROPNODENAME>\\?{PROPNODECHAR}+ {
DPRINT("PropNodeName: %s\n", yytext);
- yylval.propnodename = xstrdup(yytext);
+ yylval.propnodename = xstrdup((yytext[0] == '\\') ?
+ yytext + 1 : yytext);
BEGIN_DEFAULT();
return DT_PROPNODENAME;
}
@@ -150,6 +200,15 @@
<*>{COMMENT}+ /* eat C-style comments */
<*>{LINECOMMENT}+ /* eat C++-style comments */
+<*>"<<" { return DT_LSHIFT; };
+<*>">>" { return DT_RSHIFT; };
+<*>"<=" { return DT_LE; };
+<*>">=" { return DT_GE; };
+<*>"==" { return DT_EQ; };
+<*>"!=" { return DT_NE; };
+<*>"&&" { return DT_AND; };
+<*>"||" { return DT_OR; };
+
<*>. {
DPRINT("Char: %c (\\x%02x)\n", yytext[0],
(unsigned)yytext[0]);
diff --git a/scripts/dtc/dtc-lexer.lex.c_shipped b/scripts/dtc/dtc-lexer.lex.c_shipped
index 8bbe128..a6c5fcd 100644
--- a/scripts/dtc/dtc-lexer.lex.c_shipped
+++ b/scripts/dtc/dtc-lexer.lex.c_shipped
@@ -1,5 +1,6 @@
+#line 2 "dtc-lexer.lex.c"
-#line 3 "scripts/dtc/dtc-lexer.lex.c_shipped"
+#line 4 "dtc-lexer.lex.c"
#define YY_INT_ALIGNED short int
@@ -53,7 +54,6 @@
typedef unsigned char flex_uint8_t;
typedef unsigned short int flex_uint16_t;
typedef unsigned int flex_uint32_t;
-#endif /* ! C99 */
/* Limits of integral types. */
#ifndef INT8_MIN
@@ -84,6 +84,8 @@
#define UINT32_MAX (4294967295U)
#endif
+#endif /* ! C99 */
+
#endif /* ! FLEXINT_H */
#ifdef __cplusplus
@@ -140,7 +142,15 @@
/* Size of default input buffer. */
#ifndef YY_BUF_SIZE
+#ifdef __ia64__
+/* On IA-64, the buffer size is 16k, not 8k.
+ * Moreover, YY_BUF_SIZE is 2*YY_READ_BUF_SIZE in the general case.
+ * Ditto for the __ia64__ case accordingly.
+ */
+#define YY_BUF_SIZE 32768
+#else
#define YY_BUF_SIZE 16384
+#endif /* __ia64__ */
#endif
/* The state buf must be large enough to hold one state per character in the main buffer.
@@ -362,8 +372,8 @@
*yy_cp = '\0'; \
(yy_c_buf_p) = yy_cp;
-#define YY_NUM_RULES 17
-#define YY_END_OF_BUFFER 18
+#define YY_NUM_RULES 30
+#define YY_END_OF_BUFFER 31
/* This struct is not used in this scanner,
but its presence is necessary. */
struct yy_trans_info
@@ -371,19 +381,25 @@
flex_int32_t yy_verify;
flex_int32_t yy_nxt;
};
-static yyconst flex_int16_t yy_accept[94] =
+static yyconst flex_int16_t yy_accept[161] =
{ 0,
0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
- 18, 16, 13, 13, 16, 16, 16, 16, 16, 16,
- 16, 10, 11, 11, 6, 6, 13, 0, 2, 0,
- 7, 0, 0, 0, 0, 0, 0, 0, 5, 0,
- 9, 9, 11, 11, 6, 0, 7, 0, 0, 0,
- 0, 15, 0, 0, 0, 0, 6, 0, 14, 0,
- 0, 0, 0, 0, 8, 0, 0, 0, 0, 0,
- 0, 0, 0, 0, 0, 0, 0, 0, 3, 12,
- 0, 0, 0, 0, 0, 0, 0, 0, 1, 0,
- 0, 4, 0
+ 31, 29, 18, 18, 29, 29, 29, 29, 29, 29,
+ 29, 29, 29, 29, 29, 29, 29, 29, 15, 16,
+ 16, 29, 16, 10, 10, 18, 26, 0, 3, 0,
+ 27, 12, 0, 0, 11, 0, 0, 0, 0, 0,
+ 0, 0, 21, 23, 25, 24, 22, 0, 9, 28,
+ 0, 0, 0, 14, 14, 16, 16, 16, 10, 10,
+ 10, 0, 12, 0, 11, 0, 0, 0, 20, 0,
+ 0, 0, 0, 0, 0, 0, 0, 16, 10, 10,
+ 10, 0, 19, 0, 0, 0, 0, 0, 0, 0,
+ 0, 0, 16, 13, 0, 0, 0, 0, 0, 0,
+ 0, 0, 0, 16, 6, 0, 0, 0, 0, 0,
+ 0, 2, 0, 0, 0, 0, 0, 0, 0, 0,
+ 4, 17, 0, 0, 2, 0, 0, 0, 0, 0,
+ 0, 0, 0, 0, 0, 0, 0, 1, 0, 0,
+ 0, 0, 5, 8, 0, 0, 0, 0, 7, 0
} ;
static yyconst flex_int32_t yy_ec[256] =
@@ -391,17 +407,17 @@
1, 1, 1, 1, 1, 1, 1, 1, 2, 3,
2, 2, 2, 1, 1, 1, 1, 1, 1, 1,
1, 1, 1, 1, 1, 1, 1, 1, 1, 1,
- 1, 2, 1, 4, 5, 1, 1, 6, 1, 1,
- 1, 7, 5, 5, 8, 5, 9, 10, 11, 12,
- 12, 12, 12, 12, 12, 12, 12, 13, 1, 1,
- 1, 1, 5, 5, 14, 14, 14, 14, 14, 14,
- 15, 15, 15, 15, 15, 15, 15, 15, 15, 15,
- 15, 15, 15, 15, 15, 15, 15, 16, 15, 15,
- 1, 17, 18, 1, 15, 1, 14, 19, 20, 21,
+ 1, 2, 4, 5, 6, 1, 1, 7, 8, 1,
+ 1, 9, 10, 10, 11, 10, 12, 13, 14, 15,
+ 15, 15, 15, 15, 15, 15, 15, 16, 1, 17,
+ 18, 19, 10, 10, 20, 20, 20, 20, 20, 20,
+ 21, 21, 21, 21, 21, 22, 21, 21, 21, 21,
+ 21, 21, 21, 21, 23, 21, 21, 24, 21, 21,
+ 1, 25, 26, 1, 21, 1, 20, 27, 28, 29,
- 22, 14, 15, 15, 23, 15, 15, 24, 25, 26,
- 15, 15, 15, 27, 28, 29, 30, 31, 15, 16,
- 15, 15, 32, 1, 33, 1, 1, 1, 1, 1,
+ 30, 20, 21, 21, 31, 21, 21, 32, 33, 34,
+ 35, 36, 21, 37, 38, 39, 40, 41, 21, 24,
+ 42, 21, 43, 44, 45, 1, 1, 1, 1, 1,
1, 1, 1, 1, 1, 1, 1, 1, 1, 1,
1, 1, 1, 1, 1, 1, 1, 1, 1, 1,
1, 1, 1, 1, 1, 1, 1, 1, 1, 1,
@@ -418,112 +434,163 @@
1, 1, 1, 1, 1
} ;
-static yyconst flex_int32_t yy_meta[34] =
+static yyconst flex_int32_t yy_meta[46] =
{ 0,
- 1, 1, 1, 1, 2, 1, 2, 2, 3, 4,
- 4, 4, 5, 6, 7, 7, 1, 1, 6, 6,
- 6, 6, 7, 7, 7, 7, 7, 7, 7, 7,
- 7, 8, 1
+ 1, 1, 1, 1, 1, 2, 3, 1, 2, 2,
+ 2, 4, 5, 5, 5, 6, 1, 1, 1, 7,
+ 8, 8, 8, 8, 1, 1, 7, 7, 7, 7,
+ 8, 8, 8, 8, 8, 8, 8, 8, 8, 8,
+ 8, 8, 3, 1, 1
} ;
-static yyconst flex_int16_t yy_base[106] =
+static yyconst flex_int16_t yy_base[175] =
{ 0,
- 0, 0, 237, 236, 25, 0, 47, 0, 30, 71,
- 244, 247, 82, 84, 84, 211, 95, 229, 218, 0,
- 111, 247, 0, 84, 83, 95, 106, 86, 247, 237,
- 0, 230, 231, 234, 207, 209, 212, 220, 247, 206,
- 247, 218, 0, 106, 116, 0, 0, 0, 223, 89,
- 226, 219, 199, 206, 200, 204, 0, 190, 213, 212,
- 202, 91, 178, 161, 247, 172, 144, 150, 140, 130,
- 140, 124, 128, 120, 138, 137, 123, 122, 247, 247,
- 134, 114, 132, 86, 135, 125, 90, 136, 247, 97,
- 29, 247, 247, 153, 156, 161, 165, 170, 176, 180,
+ 0, 388, 381, 40, 41, 386, 71, 385, 34, 44,
+ 390, 395, 60, 62, 371, 112, 111, 111, 111, 104,
+ 370, 106, 371, 342, 124, 119, 0, 144, 395, 0,
+ 123, 0, 159, 153, 165, 167, 395, 130, 395, 382,
+ 395, 0, 372, 122, 395, 157, 374, 379, 350, 21,
+ 346, 349, 395, 395, 395, 395, 395, 362, 395, 395,
+ 181, 346, 342, 395, 359, 0, 191, 343, 190, 351,
+ 350, 0, 0, 0, 173, 362, 177, 367, 357, 329,
+ 335, 328, 337, 331, 206, 329, 334, 327, 395, 338,
+ 170, 314, 346, 345, 318, 325, 343, 158, 316, 212,
- 187, 195, 200, 205, 212
+ 322, 319, 320, 395, 340, 336, 308, 305, 314, 304,
+ 295, 138, 208, 220, 395, 292, 305, 265, 264, 254,
+ 201, 222, 285, 275, 273, 270, 236, 235, 225, 115,
+ 395, 395, 252, 216, 216, 217, 214, 230, 209, 220,
+ 213, 239, 211, 217, 216, 209, 229, 395, 240, 225,
+ 206, 169, 395, 395, 116, 106, 99, 54, 395, 395,
+ 254, 260, 268, 272, 276, 282, 289, 293, 301, 309,
+ 313, 319, 327, 335
} ;
-static yyconst flex_int16_t yy_def[106] =
+static yyconst flex_int16_t yy_def[175] =
{ 0,
- 93, 1, 1, 1, 1, 5, 93, 7, 1, 1,
- 93, 93, 93, 93, 94, 95, 93, 96, 17, 97,
- 96, 93, 98, 99, 93, 93, 93, 94, 93, 94,
- 100, 93, 101, 102, 93, 93, 93, 96, 93, 93,
- 93, 96, 98, 99, 93, 103, 100, 104, 101, 101,
- 102, 93, 93, 93, 93, 93, 103, 104, 93, 93,
- 93, 93, 93, 93, 93, 93, 93, 93, 93, 93,
- 93, 93, 93, 93, 93, 93, 93, 93, 93, 93,
- 93, 93, 93, 93, 93, 105, 93, 105, 93, 105,
- 93, 93, 0, 93, 93, 93, 93, 93, 93, 93,
+ 160, 1, 1, 1, 1, 5, 160, 7, 1, 1,
+ 160, 160, 160, 160, 160, 161, 162, 163, 160, 160,
+ 160, 160, 164, 160, 160, 160, 165, 164, 160, 166,
+ 167, 166, 166, 160, 160, 160, 160, 161, 160, 161,
+ 160, 168, 160, 163, 160, 163, 169, 170, 160, 160,
+ 160, 160, 160, 160, 160, 160, 160, 164, 160, 160,
+ 160, 160, 160, 160, 164, 166, 167, 166, 160, 160,
+ 160, 171, 168, 172, 163, 169, 169, 170, 160, 160,
+ 160, 160, 160, 160, 160, 160, 160, 166, 160, 160,
+ 171, 172, 160, 160, 160, 160, 160, 160, 160, 160,
- 93, 93, 93, 93, 93
+ 160, 160, 166, 160, 160, 160, 160, 160, 160, 160,
+ 160, 173, 160, 166, 160, 160, 160, 160, 160, 160,
+ 173, 160, 173, 160, 160, 160, 160, 160, 160, 160,
+ 160, 160, 160, 160, 160, 160, 160, 160, 160, 160,
+ 160, 160, 174, 160, 160, 160, 174, 160, 174, 160,
+ 160, 160, 160, 160, 160, 160, 160, 160, 160, 0,
+ 160, 160, 160, 160, 160, 160, 160, 160, 160, 160,
+ 160, 160, 160, 160
} ;
-static yyconst flex_int16_t yy_nxt[281] =
+static yyconst flex_int16_t yy_nxt[441] =
{ 0,
- 12, 13, 14, 15, 12, 16, 12, 12, 17, 12,
- 12, 12, 12, 18, 18, 18, 12, 12, 18, 18,
- 18, 18, 18, 18, 18, 18, 18, 18, 18, 18,
- 18, 12, 12, 19, 20, 20, 20, 92, 21, 25,
- 26, 26, 22, 21, 21, 21, 21, 12, 13, 14,
- 15, 23, 16, 23, 23, 19, 23, 23, 23, 12,
- 24, 24, 24, 12, 12, 24, 24, 24, 24, 24,
- 24, 24, 24, 24, 24, 24, 24, 24, 12, 12,
- 25, 26, 26, 27, 27, 27, 27, 29, 43, 29,
- 43, 43, 45, 45, 45, 50, 39, 59, 46, 93,
+ 12, 13, 14, 15, 16, 12, 17, 18, 12, 12,
+ 12, 19, 12, 12, 12, 12, 20, 21, 22, 23,
+ 23, 23, 23, 23, 12, 12, 23, 23, 23, 23,
+ 23, 23, 23, 23, 23, 23, 23, 23, 23, 23,
+ 23, 23, 12, 24, 12, 25, 34, 35, 35, 25,
+ 81, 26, 26, 27, 27, 27, 34, 35, 35, 82,
+ 28, 36, 36, 36, 36, 159, 29, 28, 28, 28,
+ 28, 12, 13, 14, 15, 16, 30, 17, 18, 30,
+ 30, 30, 26, 30, 30, 30, 12, 20, 21, 22,
+ 31, 31, 31, 31, 31, 32, 12, 31, 31, 31,
- 30, 33, 30, 34, 45, 45, 45, 27, 27, 68,
- 43, 91, 43, 43, 69, 35, 87, 36, 39, 37,
- 42, 42, 42, 39, 42, 45, 45, 45, 89, 42,
- 42, 42, 42, 85, 85, 86, 85, 85, 86, 89,
- 84, 90, 83, 82, 81, 80, 79, 78, 77, 76,
- 75, 74, 90, 28, 28, 28, 28, 28, 28, 28,
- 28, 31, 31, 31, 38, 38, 38, 38, 41, 73,
- 41, 43, 72, 43, 71, 43, 43, 44, 33, 44,
- 44, 44, 44, 47, 69, 47, 47, 49, 49, 49,
- 49, 49, 49, 49, 49, 51, 51, 51, 51, 51,
+ 31, 31, 31, 31, 31, 31, 31, 31, 31, 31,
+ 31, 31, 31, 12, 24, 12, 39, 41, 45, 47,
+ 53, 54, 48, 56, 57, 61, 61, 47, 66, 45,
+ 48, 66, 66, 66, 39, 46, 40, 49, 59, 50,
+ 158, 51, 122, 52, 157, 49, 46, 50, 136, 63,
+ 137, 52, 156, 43, 40, 62, 65, 65, 65, 59,
+ 61, 61, 123, 65, 75, 69, 69, 69, 36, 36,
+ 65, 65, 65, 65, 70, 71, 72, 69, 69, 69,
+ 45, 46, 61, 61, 109, 77, 70, 71, 93, 110,
+ 68, 70, 71, 85, 85, 85, 66, 46, 155, 66,
- 51, 51, 51, 57, 70, 57, 58, 58, 58, 67,
- 58, 58, 88, 88, 88, 88, 88, 88, 88, 88,
- 34, 66, 65, 64, 63, 62, 61, 60, 52, 50,
- 39, 56, 39, 55, 54, 53, 52, 50, 48, 93,
- 40, 39, 32, 93, 19, 19, 11, 93, 93, 93,
- 93, 93, 93, 93, 93, 93, 93, 93, 93, 93,
- 93, 93, 93, 93, 93, 93, 93, 93, 93, 93,
- 93, 93, 93, 93, 93, 93, 93, 93, 93, 93
+ 66, 66, 69, 69, 69, 122, 59, 100, 100, 61,
+ 61, 70, 71, 100, 100, 148, 112, 154, 85, 85,
+ 85, 61, 61, 129, 129, 123, 129, 129, 135, 135,
+ 135, 142, 142, 148, 143, 149, 153, 135, 135, 135,
+ 142, 142, 160, 143, 152, 151, 150, 146, 145, 144,
+ 141, 140, 139, 149, 38, 38, 38, 38, 38, 38,
+ 38, 38, 42, 138, 134, 133, 42, 42, 44, 44,
+ 44, 44, 44, 44, 44, 44, 58, 58, 58, 58,
+ 64, 132, 64, 66, 131, 130, 66, 160, 66, 66,
+ 67, 128, 127, 67, 67, 67, 67, 73, 126, 73,
+
+ 73, 76, 76, 76, 76, 76, 76, 76, 76, 78,
+ 78, 78, 78, 78, 78, 78, 78, 91, 125, 91,
+ 92, 124, 92, 92, 120, 92, 92, 121, 121, 121,
+ 121, 121, 121, 121, 121, 147, 147, 147, 147, 147,
+ 147, 147, 147, 119, 118, 117, 116, 115, 47, 114,
+ 110, 113, 111, 108, 107, 106, 48, 105, 104, 89,
+ 103, 102, 101, 99, 98, 97, 96, 95, 94, 79,
+ 77, 90, 89, 88, 59, 87, 86, 59, 84, 83,
+ 80, 79, 77, 74, 160, 60, 59, 55, 37, 160,
+ 33, 25, 26, 25, 11, 160, 160, 160, 160, 160,
+
+ 160, 160, 160, 160, 160, 160, 160, 160, 160, 160,
+ 160, 160, 160, 160, 160, 160, 160, 160, 160, 160,
+ 160, 160, 160, 160, 160, 160, 160, 160, 160, 160,
+ 160, 160, 160, 160, 160, 160, 160, 160, 160, 160
} ;
-static yyconst flex_int16_t yy_chk[281] =
+static yyconst flex_int16_t yy_chk[441] =
{ 0,
1, 1, 1, 1, 1, 1, 1, 1, 1, 1,
1, 1, 1, 1, 1, 1, 1, 1, 1, 1,
1, 1, 1, 1, 1, 1, 1, 1, 1, 1,
- 1, 1, 1, 5, 5, 5, 5, 91, 5, 9,
- 9, 9, 5, 5, 5, 5, 5, 7, 7, 7,
+ 1, 1, 1, 1, 1, 1, 1, 1, 1, 1,
+ 1, 1, 1, 1, 1, 4, 9, 9, 9, 10,
+ 50, 4, 5, 5, 5, 5, 10, 10, 10, 50,
+ 5, 13, 13, 14, 14, 158, 5, 5, 5, 5,
+ 5, 7, 7, 7, 7, 7, 7, 7, 7, 7,
7, 7, 7, 7, 7, 7, 7, 7, 7, 7,
7, 7, 7, 7, 7, 7, 7, 7, 7, 7,
- 7, 7, 7, 7, 7, 7, 7, 7, 7, 7,
- 10, 10, 10, 13, 13, 14, 14, 15, 24, 28,
- 24, 24, 25, 25, 25, 50, 24, 50, 25, 90,
- 15, 17, 28, 17, 26, 26, 26, 27, 27, 62,
- 44, 87, 44, 44, 62, 17, 84, 17, 44, 17,
- 21, 21, 21, 21, 21, 45, 45, 45, 86, 21,
- 21, 21, 21, 83, 83, 83, 85, 85, 85, 88,
- 82, 86, 81, 78, 77, 76, 75, 74, 73, 72,
- 71, 70, 88, 94, 94, 94, 94, 94, 94, 94,
- 94, 95, 95, 95, 96, 96, 96, 96, 97, 69,
- 97, 98, 68, 98, 67, 98, 98, 99, 66, 99,
- 99, 99, 99, 100, 64, 100, 100, 101, 101, 101,
- 101, 101, 101, 101, 101, 102, 102, 102, 102, 102,
+ 7, 7, 7, 7, 7, 7, 7, 7, 7, 7,
+ 7, 7, 7, 7, 7, 7, 16, 17, 18, 19,
+ 20, 20, 19, 22, 22, 25, 25, 26, 31, 44,
+ 26, 31, 31, 31, 38, 18, 16, 19, 31, 19,
+ 157, 19, 112, 19, 156, 26, 44, 26, 130, 26,
+ 130, 26, 155, 17, 38, 25, 28, 28, 28, 28,
+ 33, 33, 112, 28, 46, 34, 34, 34, 36, 36,
+ 28, 28, 28, 28, 34, 34, 34, 35, 35, 35,
+ 75, 46, 61, 61, 98, 77, 35, 35, 77, 98,
+ 33, 91, 91, 61, 61, 61, 67, 75, 152, 67,
- 102, 102, 102, 103, 63, 103, 104, 104, 104, 61,
- 104, 104, 105, 105, 105, 105, 105, 105, 105, 105,
- 60, 59, 58, 56, 55, 54, 53, 52, 51, 49,
- 42, 40, 38, 37, 36, 35, 34, 33, 32, 30,
- 19, 18, 16, 11, 4, 3, 93, 93, 93, 93,
- 93, 93, 93, 93, 93, 93, 93, 93, 93, 93,
- 93, 93, 93, 93, 93, 93, 93, 93, 93, 93,
- 93, 93, 93, 93, 93, 93, 93, 93, 93, 93
+ 67, 67, 69, 69, 69, 121, 67, 85, 85, 113,
+ 113, 69, 69, 100, 100, 143, 100, 151, 85, 85,
+ 85, 114, 114, 122, 122, 121, 129, 129, 135, 135,
+ 135, 138, 138, 147, 138, 143, 150, 129, 129, 129,
+ 142, 142, 149, 142, 146, 145, 144, 141, 140, 139,
+ 137, 136, 134, 147, 161, 161, 161, 161, 161, 161,
+ 161, 161, 162, 133, 128, 127, 162, 162, 163, 163,
+ 163, 163, 163, 163, 163, 163, 164, 164, 164, 164,
+ 165, 126, 165, 166, 125, 124, 166, 123, 166, 166,
+ 167, 120, 119, 167, 167, 167, 167, 168, 118, 168,
+
+ 168, 169, 169, 169, 169, 169, 169, 169, 169, 170,
+ 170, 170, 170, 170, 170, 170, 170, 171, 117, 171,
+ 172, 116, 172, 172, 111, 172, 172, 173, 173, 173,
+ 173, 173, 173, 173, 173, 174, 174, 174, 174, 174,
+ 174, 174, 174, 110, 109, 108, 107, 106, 105, 103,
+ 102, 101, 99, 97, 96, 95, 94, 93, 92, 90,
+ 88, 87, 86, 84, 83, 82, 81, 80, 79, 78,
+ 76, 71, 70, 68, 65, 63, 62, 58, 52, 51,
+ 49, 48, 47, 43, 40, 24, 23, 21, 15, 11,
+ 8, 6, 3, 2, 160, 160, 160, 160, 160, 160,
+
+ 160, 160, 160, 160, 160, 160, 160, 160, 160, 160,
+ 160, 160, 160, 160, 160, 160, 160, 160, 160, 160,
+ 160, 160, 160, 160, 160, 160, 160, 160, 160, 160,
+ 160, 160, 160, 160, 160, 160, 160, 160, 160, 160
} ;
static yy_state_type yy_last_accepting_state;
@@ -540,6 +607,7 @@
#define YY_MORE_ADJ 0
#define YY_RESTORE_YY_MORE_OFFSET
char *yytext;
+#line 1 "dtc-lexer.l"
/*
* (C) Copyright David Gibson <dwg@au1.ibm.com>, IBM Corporation. 2005.
*
@@ -561,6 +629,10 @@
*/
#define YY_NO_INPUT 1
+
+
+
+#line 38 "dtc-lexer.l"
#include "dtc.h"
#include "srcpos.h"
#include "dtc-parser.tab.h"
@@ -588,6 +660,7 @@
static void push_input_file(const char *filename);
static int pop_input_file(void);
+#line 664 "dtc-lexer.lex.c"
#define INITIAL 0
#define INCLUDE 1
@@ -670,7 +743,12 @@
/* Amount of stuff to slurp up with each read. */
#ifndef YY_READ_BUF_SIZE
+#ifdef __ia64__
+/* On IA-64, the buffer size is 16k, not 8k */
+#define YY_READ_BUF_SIZE 16384
+#else
#define YY_READ_BUF_SIZE 8192
+#endif /* __ia64__ */
#endif
/* Copy whatever the last rule matched to the standard output. */
@@ -689,7 +767,7 @@
if ( YY_CURRENT_BUFFER_LVALUE->yy_is_interactive ) \
{ \
int c = '*'; \
- unsigned n; \
+ size_t n; \
for ( n = 0; n < max_size && \
(c = getc( yyin )) != EOF && c != '\n'; ++n ) \
buf[n] = (char) c; \
@@ -761,6 +839,9 @@
#endif
#define YY_RULE_SETUP \
+ if ( yyleng > 0 ) \
+ YY_CURRENT_BUFFER_LVALUE->yy_at_bol = \
+ (yytext[yyleng - 1] == '\n'); \
YY_USER_ACTION
/** The main scanner function which does all the work.
@@ -771,6 +852,10 @@
register char *yy_cp, *yy_bp;
register int yy_act;
+#line 67 "dtc-lexer.l"
+
+#line 858 "dtc-lexer.lex.c"
+
if ( !(yy_init) )
{
(yy_init) = 1;
@@ -810,6 +895,7 @@
yy_bp = yy_cp;
yy_current_state = (yy_start);
+ yy_current_state += YY_AT_BOL();
yy_match:
do
{
@@ -822,13 +908,13 @@
while ( yy_chk[yy_base[yy_current_state] + yy_c] != yy_current_state )
{
yy_current_state = (int) yy_def[yy_current_state];
- if ( yy_current_state >= 94 )
+ if ( yy_current_state >= 161 )
yy_c = yy_meta[(unsigned int) yy_c];
}
yy_current_state = yy_nxt[yy_base[yy_current_state] + (unsigned int) yy_c];
++yy_cp;
}
- while ( yy_current_state != 93 );
+ while ( yy_current_state != 160 );
yy_cp = (yy_last_accepting_cpos);
yy_current_state = (yy_last_accepting_state);
@@ -851,26 +937,54 @@
case 1:
/* rule 1 can match eol */
YY_RULE_SETUP
+#line 68 "dtc-lexer.l"
{
char *name = strchr(yytext, '\"') + 1;
yytext[yyleng-1] = '\0';
push_input_file(name);
}
YY_BREAK
+case 2:
+/* rule 2 can match eol */
+YY_RULE_SETUP
+#line 74 "dtc-lexer.l"
+{
+ char *line, *tmp, *fn;
+ /* skip text before line # */
+ line = yytext;
+ while (!isdigit(*line))
+ line++;
+ /* skip digits in line # */
+ tmp = line;
+ while (!isspace(*tmp))
+ tmp++;
+ /* "NULL"-terminate line # */
+ *tmp = '\0';
+ /* start of filename */
+ fn = strchr(tmp + 1, '"') + 1;
+ /* strip trailing " from filename */
+ tmp = strchr(fn, '"');
+ *tmp = 0;
+ /* -1 since #line is the number of the next line */
+ srcpos_set_line(xstrdup(fn), atoi(line) - 1);
+ }
+ YY_BREAK
case YY_STATE_EOF(INITIAL):
case YY_STATE_EOF(INCLUDE):
case YY_STATE_EOF(BYTESTRING):
case YY_STATE_EOF(PROPNODENAME):
case YY_STATE_EOF(V1):
+#line 95 "dtc-lexer.l"
{
if (!pop_input_file()) {
yyterminate();
}
}
YY_BREAK
-case 2:
-/* rule 2 can match eol */
+case 3:
+/* rule 3 can match eol */
YY_RULE_SETUP
+#line 101 "dtc-lexer.l"
{
DPRINT("String: %s\n", yytext);
yylval.data = data_copy_escape_string(yytext+1,
@@ -878,8 +992,9 @@
return DT_STRING;
}
YY_BREAK
-case 3:
+case 4:
YY_RULE_SETUP
+#line 108 "dtc-lexer.l"
{
DPRINT("Keyword: /dts-v1/\n");
dts_version = 1;
@@ -887,16 +1002,47 @@
return DT_V1;
}
YY_BREAK
-case 4:
+case 5:
YY_RULE_SETUP
+#line 115 "dtc-lexer.l"
{
DPRINT("Keyword: /memreserve/\n");
BEGIN_DEFAULT();
return DT_MEMRESERVE;
}
YY_BREAK
-case 5:
+case 6:
YY_RULE_SETUP
+#line 121 "dtc-lexer.l"
+{
+ DPRINT("Keyword: /bits/\n");
+ BEGIN_DEFAULT();
+ return DT_BITS;
+ }
+ YY_BREAK
+case 7:
+YY_RULE_SETUP
+#line 127 "dtc-lexer.l"
+{
+ DPRINT("Keyword: /delete-property/\n");
+ DPRINT("<PROPNODENAME>\n");
+ BEGIN(PROPNODENAME);
+ return DT_DEL_PROP;
+ }
+ YY_BREAK
+case 8:
+YY_RULE_SETUP
+#line 134 "dtc-lexer.l"
+{
+ DPRINT("Keyword: /delete-node/\n");
+ DPRINT("<PROPNODENAME>\n");
+ BEGIN(PROPNODENAME);
+ return DT_DEL_NODE;
+ }
+ YY_BREAK
+case 9:
+YY_RULE_SETUP
+#line 141 "dtc-lexer.l"
{
DPRINT("Label: %s\n", yytext);
yylval.labelref = xstrdup(yytext);
@@ -904,24 +1050,38 @@
return DT_LABEL;
}
YY_BREAK
-case 6:
+case 10:
YY_RULE_SETUP
+#line 148 "dtc-lexer.l"
{
yylval.literal = xstrdup(yytext);
DPRINT("Literal: '%s'\n", yylval.literal);
return DT_LITERAL;
}
YY_BREAK
-case 7:
+case 11:
+/* rule 11 can match eol */
YY_RULE_SETUP
+#line 154 "dtc-lexer.l"
+{
+ yytext[yyleng-1] = '\0';
+ yylval.literal = xstrdup(yytext+1);
+ DPRINT("Character literal: %s\n", yylval.literal);
+ return DT_CHAR_LITERAL;
+ }
+ YY_BREAK
+case 12:
+YY_RULE_SETUP
+#line 161 "dtc-lexer.l"
{ /* label reference */
DPRINT("Ref: %s\n", yytext+1);
yylval.labelref = xstrdup(yytext+1);
return DT_REF;
}
YY_BREAK
-case 8:
+case 13:
YY_RULE_SETUP
+#line 167 "dtc-lexer.l"
{ /* new-style path reference */
yytext[yyleng-1] = '\0';
DPRINT("Ref: %s\n", yytext+2);
@@ -929,55 +1089,104 @@
return DT_REF;
}
YY_BREAK
-case 9:
+case 14:
YY_RULE_SETUP
+#line 174 "dtc-lexer.l"
{
yylval.byte = strtol(yytext, NULL, 16);
DPRINT("Byte: %02x\n", (int)yylval.byte);
return DT_BYTE;
}
YY_BREAK
-case 10:
+case 15:
YY_RULE_SETUP
+#line 180 "dtc-lexer.l"
{
DPRINT("/BYTESTRING\n");
BEGIN_DEFAULT();
return ']';
}
YY_BREAK
-case 11:
+case 16:
YY_RULE_SETUP
+#line 186 "dtc-lexer.l"
{
DPRINT("PropNodeName: %s\n", yytext);
- yylval.propnodename = xstrdup(yytext);
+ yylval.propnodename = xstrdup((yytext[0] == '\\') ?
+ yytext + 1 : yytext);
BEGIN_DEFAULT();
return DT_PROPNODENAME;
}
YY_BREAK
-case 12:
+case 17:
YY_RULE_SETUP
+#line 194 "dtc-lexer.l"
{
DPRINT("Binary Include\n");
return DT_INCBIN;
}
YY_BREAK
-case 13:
-/* rule 13 can match eol */
+case 18:
+/* rule 18 can match eol */
YY_RULE_SETUP
+#line 199 "dtc-lexer.l"
/* eat whitespace */
YY_BREAK
-case 14:
-/* rule 14 can match eol */
+case 19:
+/* rule 19 can match eol */
YY_RULE_SETUP
+#line 200 "dtc-lexer.l"
/* eat C-style comments */
YY_BREAK
-case 15:
-/* rule 15 can match eol */
+case 20:
+/* rule 20 can match eol */
YY_RULE_SETUP
+#line 201 "dtc-lexer.l"
/* eat C++-style comments */
YY_BREAK
-case 16:
+case 21:
YY_RULE_SETUP
+#line 203 "dtc-lexer.l"
+{ return DT_LSHIFT; };
+ YY_BREAK
+case 22:
+YY_RULE_SETUP
+#line 204 "dtc-lexer.l"
+{ return DT_RSHIFT; };
+ YY_BREAK
+case 23:
+YY_RULE_SETUP
+#line 205 "dtc-lexer.l"
+{ return DT_LE; };
+ YY_BREAK
+case 24:
+YY_RULE_SETUP
+#line 206 "dtc-lexer.l"
+{ return DT_GE; };
+ YY_BREAK
+case 25:
+YY_RULE_SETUP
+#line 207 "dtc-lexer.l"
+{ return DT_EQ; };
+ YY_BREAK
+case 26:
+YY_RULE_SETUP
+#line 208 "dtc-lexer.l"
+{ return DT_NE; };
+ YY_BREAK
+case 27:
+YY_RULE_SETUP
+#line 209 "dtc-lexer.l"
+{ return DT_AND; };
+ YY_BREAK
+case 28:
+YY_RULE_SETUP
+#line 210 "dtc-lexer.l"
+{ return DT_OR; };
+ YY_BREAK
+case 29:
+YY_RULE_SETUP
+#line 212 "dtc-lexer.l"
{
DPRINT("Char: %c (\\x%02x)\n", yytext[0],
(unsigned)yytext[0]);
@@ -993,10 +1202,12 @@
return yytext[0];
}
YY_BREAK
-case 17:
+case 30:
YY_RULE_SETUP
+#line 227 "dtc-lexer.l"
ECHO;
YY_BREAK
+#line 1211 "dtc-lexer.lex.c"
case YY_END_OF_BUFFER:
{
@@ -1275,6 +1486,7 @@
register char *yy_cp;
yy_current_state = (yy_start);
+ yy_current_state += YY_AT_BOL();
for ( yy_cp = (yytext_ptr) + YY_MORE_ADJ; yy_cp < (yy_c_buf_p); ++yy_cp )
{
@@ -1287,7 +1499,7 @@
while ( yy_chk[yy_base[yy_current_state] + yy_c] != yy_current_state )
{
yy_current_state = (int) yy_def[yy_current_state];
- if ( yy_current_state >= 94 )
+ if ( yy_current_state >= 161 )
yy_c = yy_meta[(unsigned int) yy_c];
}
yy_current_state = yy_nxt[yy_base[yy_current_state] + (unsigned int) yy_c];
@@ -1315,11 +1527,11 @@
while ( yy_chk[yy_base[yy_current_state] + yy_c] != yy_current_state )
{
yy_current_state = (int) yy_def[yy_current_state];
- if ( yy_current_state >= 94 )
+ if ( yy_current_state >= 161 )
yy_c = yy_meta[(unsigned int) yy_c];
}
yy_current_state = yy_nxt[yy_base[yy_current_state] + (unsigned int) yy_c];
- yy_is_jam = (yy_current_state == 93);
+ yy_is_jam = (yy_current_state == 160);
return yy_is_jam ? 0 : yy_current_state;
}
@@ -1394,6 +1606,8 @@
*(yy_c_buf_p) = '\0'; /* preserve yytext */
(yy_hold_char) = *++(yy_c_buf_p);
+ YY_CURRENT_BUFFER_LVALUE->yy_at_bol = (c == '\n');
+
return c;
}
#endif /* ifndef YY_NO_INPUT */
@@ -1712,8 +1926,8 @@
/** Setup the input buffer state to scan the given bytes. The next call to yylex() will
* scan from a @e copy of @a bytes.
- * @param bytes the byte buffer to scan
- * @param len the number of bytes in the buffer pointed to by @a bytes.
+ * @param yybytes the byte buffer to scan
+ * @param _yybytes_len the number of bytes in the buffer pointed to by @a bytes.
*
* @return the newly allocated buffer state object.
*/
@@ -1952,6 +2166,10 @@
#define YYTABLES_NAME "yytables"
+#line 227 "dtc-lexer.l"
+
+
+
static void push_input_file(const char *filename)
{
assert(filename);
@@ -1963,6 +2181,7 @@
yypush_buffer_state(yy_create_buffer(yyin,YY_BUF_SIZE));
}
+
static int pop_input_file(void)
{
if (srcfile_pop() == 0)
diff --git a/scripts/dtc/dtc-parser.tab.c_shipped b/scripts/dtc/dtc-parser.tab.c_shipped
index b05921e..4af5590 100644
--- a/scripts/dtc/dtc-parser.tab.c_shipped
+++ b/scripts/dtc/dtc-parser.tab.c_shipped
@@ -1,9 +1,10 @@
-/* A Bison parser, made by GNU Bison 2.4.3. */
+
+/* A Bison parser, made by GNU Bison 2.4.1. */
/* Skeleton implementation for Bison's Yacc-like parsers in C
- Copyright (C) 1984, 1989, 1990, 2000, 2001, 2002, 2003, 2004, 2005, 2006,
- 2009, 2010 Free Software Foundation, Inc.
+ Copyright (C) 1984, 1989, 1990, 2000, 2001, 2002, 2003, 2004, 2005, 2006
+ Free Software Foundation, Inc.
This program is free software: you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
@@ -45,7 +46,7 @@
#define YYBISON 1
/* Bison version. */
-#define YYBISON_VERSION "2.4.3"
+#define YYBISON_VERSION "2.4.1"
/* Skeleton name. */
#define YYSKELETON_NAME "yacc.c"
@@ -66,6 +67,8 @@
/* Copy the first part of user declarations. */
+/* Line 189 of yacc.c */
+#line 21 "dtc-parser.y"
#include <stdio.h>
@@ -82,12 +85,15 @@
extern int treesource_error;
static unsigned long long eval_literal(const char *s, int base, int bits);
+static unsigned char eval_char_literal(const char *s);
+/* Line 189 of yacc.c */
+#line 93 "dtc-parser.tab.c"
/* Enabling traces. */
#ifndef YYDEBUG
-# define YYDEBUG 1
+# define YYDEBUG 0
#endif
/* Enabling verbose error messages. */
@@ -112,14 +118,26 @@
enum yytokentype {
DT_V1 = 258,
DT_MEMRESERVE = 259,
- DT_PROPNODENAME = 260,
- DT_LITERAL = 261,
- DT_BASE = 262,
- DT_BYTE = 263,
- DT_STRING = 264,
- DT_LABEL = 265,
- DT_REF = 266,
- DT_INCBIN = 267
+ DT_LSHIFT = 260,
+ DT_RSHIFT = 261,
+ DT_LE = 262,
+ DT_GE = 263,
+ DT_EQ = 264,
+ DT_NE = 265,
+ DT_AND = 266,
+ DT_OR = 267,
+ DT_BITS = 268,
+ DT_DEL_PROP = 269,
+ DT_DEL_NODE = 270,
+ DT_PROPNODENAME = 271,
+ DT_LITERAL = 272,
+ DT_CHAR_LITERAL = 273,
+ DT_BASE = 274,
+ DT_BYTE = 275,
+ DT_STRING = 276,
+ DT_LABEL = 277,
+ DT_REF = 278,
+ DT_INCBIN = 279
};
#endif
@@ -129,6 +147,8 @@
typedef union YYSTYPE
{
+/* Line 214 of yacc.c */
+#line 40 "dtc-parser.y"
char *propnodename;
char *literal;
@@ -137,16 +157,22 @@
uint8_t byte;
struct data data;
- uint64_t addr;
- cell_t cell;
+ struct {
+ struct data data;
+ int bits;
+ } array;
+
struct property *prop;
struct property *proplist;
struct node *node;
struct node *nodelist;
struct reserve_info *re;
+ uint64_t integer;
+/* Line 214 of yacc.c */
+#line 176 "dtc-parser.tab.c"
} YYSTYPE;
# define YYSTYPE_IS_TRIVIAL 1
# define yystype YYSTYPE /* obsolescent; will be withdrawn */
@@ -157,6 +183,8 @@
/* Copy the second part of user declarations. */
+/* Line 264 of yacc.c */
+#line 188 "dtc-parser.tab.c"
#ifdef short
# undef short
@@ -206,7 +234,7 @@
#define YYSIZE_MAXIMUM ((YYSIZE_T) -1)
#ifndef YY_
-# if defined YYENABLE_NLS && YYENABLE_NLS
+# if YYENABLE_NLS
# if ENABLE_NLS
# include <libintl.h> /* INFRINGES ON USER NAME SPACE */
# define YY_(msgid) dgettext ("bison-runtime", msgid)
@@ -371,20 +399,20 @@
/* YYFINAL -- State number of the termination state. */
#define YYFINAL 4
/* YYLAST -- Last index in YYTABLE. */
-#define YYLAST 56
+#define YYLAST 133
/* YYNTOKENS -- Number of terminals. */
-#define YYNTOKENS 25
+#define YYNTOKENS 48
/* YYNNTS -- Number of nonterminals. */
-#define YYNNTS 16
+#define YYNNTS 28
/* YYNRULES -- Number of rules. */
-#define YYNRULES 39
+#define YYNRULES 79
/* YYNRULES -- Number of states. */
-#define YYNSTATES 67
+#define YYNSTATES 141
/* YYTRANSLATE(YYLEX) -- Bison symbol number corresponding to YYLEX. */
#define YYUNDEFTOK 2
-#define YYMAXUTOK 267
+#define YYMAXUTOK 279
#define YYTRANSLATE(YYX) \
((unsigned int) (YYX) <= YYMAXUTOK ? yytranslate[YYX] : YYUNDEFTOK)
@@ -395,16 +423,16 @@
0, 2, 2, 2, 2, 2, 2, 2, 2, 2,
2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
- 2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
- 22, 24, 2, 2, 23, 2, 2, 14, 2, 2,
- 2, 2, 2, 2, 2, 2, 2, 2, 2, 13,
- 18, 17, 19, 2, 2, 2, 2, 2, 2, 2,
+ 2, 2, 2, 47, 2, 2, 2, 45, 41, 2,
+ 33, 35, 44, 42, 34, 43, 2, 26, 2, 2,
+ 2, 2, 2, 2, 2, 2, 2, 2, 38, 25,
+ 36, 29, 30, 37, 2, 2, 2, 2, 2, 2,
2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
- 2, 20, 2, 21, 2, 2, 2, 2, 2, 2,
+ 2, 31, 2, 32, 40, 2, 2, 2, 2, 2,
2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
- 2, 2, 2, 15, 2, 16, 2, 2, 2, 2,
+ 2, 2, 2, 27, 39, 28, 46, 2, 2, 2,
2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
@@ -418,45 +446,68 @@
2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
2, 2, 2, 2, 2, 2, 1, 2, 3, 4,
- 5, 6, 7, 8, 9, 10, 11, 12
+ 5, 6, 7, 8, 9, 10, 11, 12, 13, 14,
+ 15, 16, 17, 18, 19, 20, 21, 22, 23, 24
};
#if YYDEBUG
/* YYPRHS[YYN] -- Index of the first RHS symbol of rule number YYN in
YYRHS. */
-static const yytype_uint8 yyprhs[] =
+static const yytype_uint16 yyprhs[] =
{
- 0, 0, 3, 8, 9, 12, 17, 20, 22, 25,
- 29, 33, 39, 40, 43, 48, 51, 54, 57, 62,
- 67, 70, 80, 86, 89, 90, 93, 96, 97, 100,
- 103, 106, 108, 109, 112, 115, 116, 119, 122, 125
+ 0, 0, 3, 8, 9, 12, 17, 20, 23, 27,
+ 31, 36, 42, 43, 46, 51, 54, 58, 61, 64,
+ 68, 73, 76, 86, 92, 95, 96, 99, 102, 106,
+ 108, 111, 114, 117, 119, 121, 125, 127, 129, 135,
+ 137, 141, 143, 147, 149, 153, 155, 159, 161, 165,
+ 167, 171, 175, 177, 181, 185, 189, 193, 197, 201,
+ 203, 207, 211, 213, 217, 221, 225, 227, 229, 232,
+ 235, 238, 239, 242, 245, 246, 249, 252, 255, 259
};
/* YYRHS -- A `-1'-separated list of the rules' RHS. */
static const yytype_int8 yyrhs[] =
{
- 26, 0, -1, 3, 13, 27, 30, -1, -1, 28,
- 27, -1, 4, 29, 29, 13, -1, 10, 28, -1,
- 6, -1, 14, 31, -1, 30, 14, 31, -1, 30,
- 11, 31, -1, 15, 32, 39, 16, 13, -1, -1,
- 32, 33, -1, 5, 17, 34, 13, -1, 5, 13,
- -1, 10, 33, -1, 35, 9, -1, 35, 18, 36,
- 19, -1, 35, 20, 38, 21, -1, 35, 11, -1,
- 35, 12, 22, 9, 23, 29, 23, 29, 24, -1,
- 35, 12, 22, 9, 24, -1, 34, 10, -1, -1,
- 34, 23, -1, 35, 10, -1, -1, 36, 37, -1,
- 36, 11, -1, 36, 10, -1, 6, -1, -1, 38,
- 8, -1, 38, 10, -1, -1, 40, 39, -1, 40,
- 33, -1, 5, 31, -1, 10, 40, -1
+ 49, 0, -1, 3, 25, 50, 52, -1, -1, 51,
+ 50, -1, 4, 59, 59, 25, -1, 22, 51, -1,
+ 26, 53, -1, 52, 26, 53, -1, 52, 23, 53,
+ -1, 52, 15, 23, 25, -1, 27, 54, 74, 28,
+ 25, -1, -1, 54, 55, -1, 16, 29, 56, 25,
+ -1, 16, 25, -1, 14, 16, 25, -1, 22, 55,
+ -1, 57, 21, -1, 57, 58, 30, -1, 57, 31,
+ 73, 32, -1, 57, 23, -1, 57, 24, 33, 21,
+ 34, 59, 34, 59, 35, -1, 57, 24, 33, 21,
+ 35, -1, 56, 22, -1, -1, 56, 34, -1, 57,
+ 22, -1, 13, 17, 36, -1, 36, -1, 58, 59,
+ -1, 58, 23, -1, 58, 22, -1, 17, -1, 18,
+ -1, 33, 60, 35, -1, 61, -1, 62, -1, 62,
+ 37, 60, 38, 61, -1, 63, -1, 62, 12, 63,
+ -1, 64, -1, 63, 11, 64, -1, 65, -1, 64,
+ 39, 65, -1, 66, -1, 65, 40, 66, -1, 67,
+ -1, 66, 41, 67, -1, 68, -1, 67, 9, 68,
+ -1, 67, 10, 68, -1, 69, -1, 68, 36, 69,
+ -1, 68, 30, 69, -1, 68, 7, 69, -1, 68,
+ 8, 69, -1, 69, 5, 70, -1, 69, 6, 70,
+ -1, 70, -1, 70, 42, 71, -1, 70, 43, 71,
+ -1, 71, -1, 71, 44, 72, -1, 71, 26, 72,
+ -1, 71, 45, 72, -1, 72, -1, 59, -1, 43,
+ 72, -1, 46, 72, -1, 47, 72, -1, -1, 73,
+ 20, -1, 73, 22, -1, -1, 75, 74, -1, 75,
+ 55, -1, 16, 53, -1, 15, 16, 25, -1, 22,
+ 75, -1
};
/* YYRLINE[YYN] -- source line where rule number YYN was defined. */
static const yytype_uint16 yyrline[] =
{
- 0, 86, 86, 95, 98, 105, 109, 117, 124, 128,
- 132, 145, 153, 156, 163, 167, 171, 179, 183, 187,
- 191, 195, 212, 222, 230, 233, 237, 245, 248, 252,
- 257, 264, 272, 275, 279, 287, 290, 294, 302, 306
+ 0, 109, 109, 118, 121, 128, 132, 140, 144, 148,
+ 158, 172, 180, 183, 190, 194, 198, 202, 210, 214,
+ 218, 222, 226, 243, 253, 261, 264, 268, 275, 290,
+ 295, 315, 329, 336, 340, 344, 351, 355, 356, 360,
+ 361, 365, 366, 370, 371, 375, 376, 380, 381, 385,
+ 386, 387, 391, 392, 393, 394, 395, 399, 400, 401,
+ 405, 406, 407, 411, 412, 413, 414, 418, 419, 420,
+ 421, 426, 429, 433, 441, 444, 448, 456, 460, 464
};
#endif
@@ -465,13 +516,19 @@
First, the terminals, then, starting at YYNTOKENS, nonterminals. */
static const char *const yytname[] =
{
- "$end", "error", "$undefined", "DT_V1", "DT_MEMRESERVE",
- "DT_PROPNODENAME", "DT_LITERAL", "DT_BASE", "DT_BYTE", "DT_STRING",
- "DT_LABEL", "DT_REF", "DT_INCBIN", "';'", "'/'", "'{'", "'}'", "'='",
- "'<'", "'>'", "'['", "']'", "'('", "','", "')'", "$accept", "sourcefile",
- "memreserves", "memreserve", "addr", "devicetree", "nodedef", "proplist",
- "propdef", "propdata", "propdataprefix", "celllist", "cellval",
- "bytestring", "subnodes", "subnode", 0
+ "$end", "error", "$undefined", "DT_V1", "DT_MEMRESERVE", "DT_LSHIFT",
+ "DT_RSHIFT", "DT_LE", "DT_GE", "DT_EQ", "DT_NE", "DT_AND", "DT_OR",
+ "DT_BITS", "DT_DEL_PROP", "DT_DEL_NODE", "DT_PROPNODENAME", "DT_LITERAL",
+ "DT_CHAR_LITERAL", "DT_BASE", "DT_BYTE", "DT_STRING", "DT_LABEL",
+ "DT_REF", "DT_INCBIN", "';'", "'/'", "'{'", "'}'", "'='", "'>'", "'['",
+ "']'", "'('", "','", "')'", "'<'", "'?'", "':'", "'|'", "'^'", "'&'",
+ "'+'", "'-'", "'*'", "'%'", "'~'", "'!'", "$accept", "sourcefile",
+ "memreserves", "memreserve", "devicetree", "nodedef", "proplist",
+ "propdef", "propdata", "propdataprefix", "arrayprefix", "integer_prim",
+ "integer_expr", "integer_trinary", "integer_or", "integer_and",
+ "integer_bitor", "integer_bitxor", "integer_bitand", "integer_eq",
+ "integer_rela", "integer_shift", "integer_add", "integer_mul",
+ "integer_unary", "bytestring", "subnodes", "subnode", 0
};
#endif
@@ -481,27 +538,37 @@
static const yytype_uint16 yytoknum[] =
{
0, 256, 257, 258, 259, 260, 261, 262, 263, 264,
- 265, 266, 267, 59, 47, 123, 125, 61, 60, 62,
- 91, 93, 40, 44, 41
+ 265, 266, 267, 268, 269, 270, 271, 272, 273, 274,
+ 275, 276, 277, 278, 279, 59, 47, 123, 125, 61,
+ 62, 91, 93, 40, 44, 41, 60, 63, 58, 124,
+ 94, 38, 43, 45, 42, 37, 126, 33
};
# endif
/* YYR1[YYN] -- Symbol number of symbol that rule YYN derives. */
static const yytype_uint8 yyr1[] =
{
- 0, 25, 26, 27, 27, 28, 28, 29, 30, 30,
- 30, 31, 32, 32, 33, 33, 33, 34, 34, 34,
- 34, 34, 34, 34, 35, 35, 35, 36, 36, 36,
- 36, 37, 38, 38, 38, 39, 39, 39, 40, 40
+ 0, 48, 49, 50, 50, 51, 51, 52, 52, 52,
+ 52, 53, 54, 54, 55, 55, 55, 55, 56, 56,
+ 56, 56, 56, 56, 56, 57, 57, 57, 58, 58,
+ 58, 58, 58, 59, 59, 59, 60, 61, 61, 62,
+ 62, 63, 63, 64, 64, 65, 65, 66, 66, 67,
+ 67, 67, 68, 68, 68, 68, 68, 69, 69, 69,
+ 70, 70, 70, 71, 71, 71, 71, 72, 72, 72,
+ 72, 73, 73, 73, 74, 74, 74, 75, 75, 75
};
/* YYR2[YYN] -- Number of symbols composing right hand side of rule YYN. */
static const yytype_uint8 yyr2[] =
{
- 0, 2, 4, 0, 2, 4, 2, 1, 2, 3,
- 3, 5, 0, 2, 4, 2, 2, 2, 4, 4,
- 2, 9, 5, 2, 0, 2, 2, 0, 2, 2,
- 2, 1, 0, 2, 2, 0, 2, 2, 2, 2
+ 0, 2, 4, 0, 2, 4, 2, 2, 3, 3,
+ 4, 5, 0, 2, 4, 2, 3, 2, 2, 3,
+ 4, 2, 9, 5, 2, 0, 2, 2, 3, 1,
+ 2, 2, 2, 1, 1, 3, 1, 1, 5, 1,
+ 3, 1, 3, 1, 3, 1, 3, 1, 3, 1,
+ 3, 3, 1, 3, 3, 3, 3, 3, 3, 1,
+ 3, 3, 1, 3, 3, 3, 1, 1, 2, 2,
+ 2, 0, 2, 2, 0, 2, 2, 2, 3, 2
};
/* YYDEFACT[STATE-NAME] -- Default rule to reduce with in state
@@ -509,41 +576,59 @@
means the default is an error. */
static const yytype_uint8 yydefact[] =
{
- 0, 0, 0, 3, 1, 0, 0, 0, 3, 7,
- 0, 6, 0, 2, 4, 0, 12, 8, 0, 0,
- 5, 35, 10, 9, 0, 0, 13, 0, 35, 15,
- 24, 38, 16, 39, 0, 37, 36, 0, 0, 11,
- 23, 14, 25, 17, 26, 20, 0, 27, 32, 0,
- 0, 0, 0, 31, 30, 29, 18, 28, 33, 34,
- 19, 0, 22, 0, 0, 0, 21
+ 0, 0, 0, 3, 1, 0, 0, 0, 3, 33,
+ 34, 0, 0, 6, 0, 2, 4, 0, 0, 0,
+ 67, 0, 36, 37, 39, 41, 43, 45, 47, 49,
+ 52, 59, 62, 66, 0, 12, 7, 0, 0, 0,
+ 68, 69, 70, 35, 0, 0, 0, 0, 0, 0,
+ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+ 0, 0, 0, 5, 74, 0, 9, 8, 40, 0,
+ 42, 44, 46, 48, 50, 51, 55, 56, 54, 53,
+ 57, 58, 60, 61, 64, 63, 65, 0, 0, 0,
+ 0, 13, 0, 74, 10, 0, 0, 0, 15, 25,
+ 77, 17, 79, 0, 76, 75, 38, 16, 78, 0,
+ 0, 11, 24, 14, 26, 0, 18, 27, 21, 0,
+ 71, 29, 0, 0, 0, 0, 32, 31, 19, 30,
+ 28, 0, 72, 73, 20, 0, 23, 0, 0, 0,
+ 22
};
/* YYDEFGOTO[NTERM-NUM]. */
static const yytype_int8 yydefgoto[] =
{
- -1, 2, 7, 8, 10, 13, 17, 21, 26, 37,
- 38, 50, 57, 51, 27, 28
+ -1, 2, 7, 8, 15, 36, 64, 91, 109, 110,
+ 122, 20, 21, 22, 23, 24, 25, 26, 27, 28,
+ 29, 30, 31, 32, 33, 125, 92, 93
};
/* YYPACT[STATE-NUM] -- Index in YYTABLE of the portion describing
STATE-NUM. */
-#define YYPACT_NINF -12
+#define YYPACT_NINF -78
static const yytype_int8 yypact[] =
{
- 10, -11, 18, -1, -12, 22, -1, 15, -1, -12,
- 22, -12, 20, 1, -12, 17, -12, -12, 20, 20,
- -12, 6, -12, -12, 21, 6, -12, 23, 6, -12,
- -12, -12, -12, -12, 28, -12, -12, -6, 13, -12,
- -12, -12, -12, -12, -12, -12, 24, -12, -12, 33,
- -5, 0, -4, -12, -12, -12, -12, -12, -12, -12,
- -12, 22, -12, 25, 22, 19, -12
+ 22, 11, 51, 10, -78, 23, 10, 2, 10, -78,
+ -78, -9, 23, -78, 30, 38, -78, -9, -9, -9,
+ -78, 35, -78, -6, 52, 29, 48, 49, 33, 3,
+ 71, 36, 0, -78, 64, -78, -78, 68, 30, 30,
+ -78, -78, -78, -78, -9, -9, -9, -9, -9, -9,
+ -9, -9, -9, -9, -9, -9, -9, -9, -9, -9,
+ -9, -9, -9, -78, 44, 67, -78, -78, 52, 55,
+ 29, 48, 49, 33, 3, 3, 71, 71, 71, 71,
+ 36, 36, 0, 0, -78, -78, -78, 78, 79, 42,
+ 44, -78, 69, 44, -78, -9, 73, 74, -78, -78,
+ -78, -78, -78, 75, -78, -78, -78, -78, -78, -7,
+ -1, -78, -78, -78, -78, 84, -78, -78, -78, 63,
+ -78, -78, 32, 66, 82, -3, -78, -78, -78, -78,
+ -78, 46, -78, -78, -78, 23, -78, 70, 23, 72,
+ -78
};
/* YYPGOTO[NTERM-NUM]. */
static const yytype_int8 yypgoto[] =
{
- -12, -12, 36, 39, -10, -12, 8, -12, 12, -12,
- -12, -12, -12, -12, 27, 31
+ -78, -78, 97, 100, -78, -37, -78, -77, -78, -78,
+ -78, -5, 65, 13, -78, 76, 77, 62, 80, 83,
+ 34, 20, 26, 28, -14, -78, 18, 24
};
/* YYTABLE[YYPACT[STATE-NUM]]. What to do in state STATE-NUM. If
@@ -553,35 +638,59 @@
#define YYTABLE_NINF -1
static const yytype_uint8 yytable[] =
{
- 15, 53, 3, 5, 40, 54, 55, 41, 58, 6,
- 59, 24, 18, 1, 56, 19, 25, 42, 4, 61,
- 62, 60, 43, 44, 45, 46, 22, 23, 9, 12,
- 20, 47, 31, 48, 29, 16, 16, 32, 30, 34,
- 35, 39, 52, 66, 14, 11, 49, 0, 64, 0,
- 0, 63, 0, 0, 65, 36, 33
+ 12, 66, 67, 40, 41, 42, 44, 34, 9, 10,
+ 52, 53, 115, 101, 5, 112, 104, 132, 113, 133,
+ 116, 117, 118, 119, 11, 1, 60, 114, 14, 134,
+ 120, 45, 6, 54, 17, 121, 3, 18, 19, 55,
+ 9, 10, 50, 51, 61, 62, 84, 85, 86, 9,
+ 10, 4, 100, 37, 126, 127, 11, 35, 87, 88,
+ 89, 38, 128, 46, 39, 11, 90, 98, 47, 35,
+ 43, 99, 76, 77, 78, 79, 56, 57, 58, 59,
+ 135, 136, 80, 81, 74, 75, 82, 83, 48, 63,
+ 49, 65, 94, 95, 96, 97, 124, 103, 107, 108,
+ 111, 123, 130, 131, 138, 16, 13, 140, 106, 71,
+ 69, 105, 0, 0, 102, 0, 0, 129, 0, 0,
+ 68, 0, 0, 70, 0, 0, 0, 0, 72, 0,
+ 137, 0, 73, 139
};
-static const yytype_int8 yycheck[] =
+static const yytype_int16 yycheck[] =
{
- 10, 6, 13, 4, 10, 10, 11, 13, 8, 10,
- 10, 5, 11, 3, 19, 14, 10, 23, 0, 23,
- 24, 21, 9, 10, 11, 12, 18, 19, 6, 14,
- 13, 18, 24, 20, 13, 15, 15, 25, 17, 16,
- 28, 13, 9, 24, 8, 6, 22, -1, 23, -1,
- -1, 61, -1, -1, 64, 28, 25
+ 5, 38, 39, 17, 18, 19, 12, 12, 17, 18,
+ 7, 8, 13, 90, 4, 22, 93, 20, 25, 22,
+ 21, 22, 23, 24, 33, 3, 26, 34, 26, 32,
+ 31, 37, 22, 30, 43, 36, 25, 46, 47, 36,
+ 17, 18, 9, 10, 44, 45, 60, 61, 62, 17,
+ 18, 0, 89, 15, 22, 23, 33, 27, 14, 15,
+ 16, 23, 30, 11, 26, 33, 22, 25, 39, 27,
+ 35, 29, 52, 53, 54, 55, 5, 6, 42, 43,
+ 34, 35, 56, 57, 50, 51, 58, 59, 40, 25,
+ 41, 23, 25, 38, 16, 16, 33, 28, 25, 25,
+ 25, 17, 36, 21, 34, 8, 6, 35, 95, 47,
+ 45, 93, -1, -1, 90, -1, -1, 122, -1, -1,
+ 44, -1, -1, 46, -1, -1, -1, -1, 48, -1,
+ 135, -1, 49, 138
};
/* YYSTOS[STATE-NUM] -- The (internal number of the) accessing
symbol of state STATE-NUM. */
static const yytype_uint8 yystos[] =
{
- 0, 3, 26, 13, 0, 4, 10, 27, 28, 6,
- 29, 28, 14, 30, 27, 29, 15, 31, 11, 14,
- 13, 32, 31, 31, 5, 10, 33, 39, 40, 13,
- 17, 31, 33, 40, 16, 33, 39, 34, 35, 13,
- 10, 13, 23, 9, 10, 11, 12, 18, 20, 22,
- 36, 38, 9, 6, 10, 11, 19, 37, 8, 10,
- 21, 23, 24, 29, 23, 29, 24
+ 0, 3, 49, 25, 0, 4, 22, 50, 51, 17,
+ 18, 33, 59, 51, 26, 52, 50, 43, 46, 47,
+ 59, 60, 61, 62, 63, 64, 65, 66, 67, 68,
+ 69, 70, 71, 72, 59, 27, 53, 15, 23, 26,
+ 72, 72, 72, 35, 12, 37, 11, 39, 40, 41,
+ 9, 10, 7, 8, 30, 36, 5, 6, 42, 43,
+ 26, 44, 45, 25, 54, 23, 53, 53, 63, 60,
+ 64, 65, 66, 67, 68, 68, 69, 69, 69, 69,
+ 70, 70, 71, 71, 72, 72, 72, 14, 15, 16,
+ 22, 55, 74, 75, 25, 38, 16, 16, 25, 29,
+ 53, 55, 75, 28, 55, 74, 61, 25, 25, 56,
+ 57, 25, 22, 25, 34, 13, 21, 22, 23, 24,
+ 31, 36, 58, 17, 33, 73, 22, 23, 30, 59,
+ 36, 21, 20, 22, 32, 34, 35, 59, 34, 59,
+ 35
};
#define yyerrok (yyerrstatus = 0)
@@ -596,18 +705,9 @@
/* Like YYERROR except do call yyerror. This remains here temporarily
to ease the transition to the new meaning of YYERROR, for GCC.
- Once GCC version 2 has supplanted version 1, this can go. However,
- YYFAIL appears to be in use. Nevertheless, it is formally deprecated
- in Bison 2.4.2's NEWS entry, where a plan to phase it out is
- discussed. */
+ Once GCC version 2 has supplanted version 1, this can go. */
#define YYFAIL goto yyerrlab
-#if defined YYFAIL
- /* This is here to suppress warnings from the GCC cpp's
- -Wunused-macros. Normally we don't worry about that warning, but
- some users do, and we want to make it easy for users to remove
- YYFAIL uses, which will produce warnings from Bison 2.5. */
-#endif
#define YYRECOVERING() (!!yyerrstatus)
@@ -664,7 +764,7 @@
we won't break user code: when these are the locations we know. */
#ifndef YY_LOCATION_PRINT
-# if defined YYLTYPE_IS_TRIVIAL && YYLTYPE_IS_TRIVIAL
+# if YYLTYPE_IS_TRIVIAL
# define YY_LOCATION_PRINT(File, Loc) \
fprintf (File, "%d.%d-%d.%d", \
(Loc).first_line, (Loc).first_column, \
@@ -1403,6 +1503,8 @@
{
case 2:
+/* Line 1455 of yacc.c */
+#line 110 "dtc-parser.y"
{
the_boot_info = build_boot_info((yyvsp[(3) - (4)].re), (yyvsp[(4) - (4)].node),
guess_boot_cpuid((yyvsp[(4) - (4)].node)));
@@ -1411,6 +1513,8 @@
case 3:
+/* Line 1455 of yacc.c */
+#line 118 "dtc-parser.y"
{
(yyval.re) = NULL;
;}
@@ -1418,6 +1522,8 @@
case 4:
+/* Line 1455 of yacc.c */
+#line 122 "dtc-parser.y"
{
(yyval.re) = chain_reserve_entry((yyvsp[(1) - (2)].re), (yyvsp[(2) - (2)].re));
;}
@@ -1425,13 +1531,17 @@
case 5:
+/* Line 1455 of yacc.c */
+#line 129 "dtc-parser.y"
{
- (yyval.re) = build_reserve_entry((yyvsp[(2) - (4)].addr), (yyvsp[(3) - (4)].addr));
+ (yyval.re) = build_reserve_entry((yyvsp[(2) - (4)].integer), (yyvsp[(3) - (4)].integer));
;}
break;
case 6:
+/* Line 1455 of yacc.c */
+#line 133 "dtc-parser.y"
{
add_label(&(yyvsp[(2) - (2)].re)->labels, (yyvsp[(1) - (2)].labelref));
(yyval.re) = (yyvsp[(2) - (2)].re);
@@ -1440,27 +1550,26 @@
case 7:
- {
- (yyval.addr) = eval_literal((yyvsp[(1) - (1)].literal), 0, 64);
- ;}
- break;
-
- case 8:
-
+/* Line 1455 of yacc.c */
+#line 141 "dtc-parser.y"
{
(yyval.node) = name_node((yyvsp[(2) - (2)].node), "");
;}
break;
- case 9:
+ case 8:
+/* Line 1455 of yacc.c */
+#line 145 "dtc-parser.y"
{
(yyval.node) = merge_nodes((yyvsp[(1) - (3)].node), (yyvsp[(3) - (3)].node));
;}
break;
- case 10:
+ case 9:
+/* Line 1455 of yacc.c */
+#line 149 "dtc-parser.y"
{
struct node *target = get_node_by_ref((yyvsp[(1) - (3)].node), (yyvsp[(2) - (3)].labelref));
@@ -1472,8 +1581,26 @@
;}
break;
+ case 10:
+
+/* Line 1455 of yacc.c */
+#line 159 "dtc-parser.y"
+ {
+ struct node *target = get_node_by_ref((yyvsp[(1) - (4)].node), (yyvsp[(3) - (4)].labelref));
+
+ if (!target)
+ print_error("label or path, '%s', not found", (yyvsp[(3) - (4)].labelref));
+ else
+ delete_node(target);
+
+ (yyval.node) = (yyvsp[(1) - (4)].node);
+ ;}
+ break;
+
case 11:
+/* Line 1455 of yacc.c */
+#line 173 "dtc-parser.y"
{
(yyval.node) = build_node((yyvsp[(2) - (5)].proplist), (yyvsp[(3) - (5)].nodelist));
;}
@@ -1481,6 +1608,8 @@
case 12:
+/* Line 1455 of yacc.c */
+#line 180 "dtc-parser.y"
{
(yyval.proplist) = NULL;
;}
@@ -1488,6 +1617,8 @@
case 13:
+/* Line 1455 of yacc.c */
+#line 184 "dtc-parser.y"
{
(yyval.proplist) = chain_property((yyvsp[(2) - (2)].prop), (yyvsp[(1) - (2)].proplist));
;}
@@ -1495,6 +1626,8 @@
case 14:
+/* Line 1455 of yacc.c */
+#line 191 "dtc-parser.y"
{
(yyval.prop) = build_property((yyvsp[(1) - (4)].propnodename), (yyvsp[(3) - (4)].data));
;}
@@ -1502,6 +1635,8 @@
case 15:
+/* Line 1455 of yacc.c */
+#line 195 "dtc-parser.y"
{
(yyval.prop) = build_property((yyvsp[(1) - (2)].propnodename), empty_data);
;}
@@ -1509,62 +1644,85 @@
case 16:
+/* Line 1455 of yacc.c */
+#line 199 "dtc-parser.y"
+ {
+ (yyval.prop) = build_property_delete((yyvsp[(2) - (3)].propnodename));
+ ;}
+ break;
+
+ case 17:
+
+/* Line 1455 of yacc.c */
+#line 203 "dtc-parser.y"
{
add_label(&(yyvsp[(2) - (2)].prop)->labels, (yyvsp[(1) - (2)].labelref));
(yyval.prop) = (yyvsp[(2) - (2)].prop);
;}
break;
- case 17:
+ case 18:
+/* Line 1455 of yacc.c */
+#line 211 "dtc-parser.y"
{
(yyval.data) = data_merge((yyvsp[(1) - (2)].data), (yyvsp[(2) - (2)].data));
;}
break;
- case 18:
-
- {
- (yyval.data) = data_merge((yyvsp[(1) - (4)].data), (yyvsp[(3) - (4)].data));
- ;}
- break;
-
case 19:
+/* Line 1455 of yacc.c */
+#line 215 "dtc-parser.y"
{
- (yyval.data) = data_merge((yyvsp[(1) - (4)].data), (yyvsp[(3) - (4)].data));
+ (yyval.data) = data_merge((yyvsp[(1) - (3)].data), (yyvsp[(2) - (3)].array).data);
;}
break;
case 20:
+/* Line 1455 of yacc.c */
+#line 219 "dtc-parser.y"
{
- (yyval.data) = data_add_marker((yyvsp[(1) - (2)].data), REF_PATH, (yyvsp[(2) - (2)].labelref));
+ (yyval.data) = data_merge((yyvsp[(1) - (4)].data), (yyvsp[(3) - (4)].data));
;}
break;
case 21:
+/* Line 1455 of yacc.c */
+#line 223 "dtc-parser.y"
+ {
+ (yyval.data) = data_add_marker((yyvsp[(1) - (2)].data), REF_PATH, (yyvsp[(2) - (2)].labelref));
+ ;}
+ break;
+
+ case 22:
+
+/* Line 1455 of yacc.c */
+#line 227 "dtc-parser.y"
{
FILE *f = srcfile_relative_open((yyvsp[(4) - (9)].data).val, NULL);
struct data d;
- if ((yyvsp[(6) - (9)].addr) != 0)
- if (fseek(f, (yyvsp[(6) - (9)].addr), SEEK_SET) != 0)
+ if ((yyvsp[(6) - (9)].integer) != 0)
+ if (fseek(f, (yyvsp[(6) - (9)].integer), SEEK_SET) != 0)
print_error("Couldn't seek to offset %llu in \"%s\": %s",
- (unsigned long long)(yyvsp[(6) - (9)].addr),
+ (unsigned long long)(yyvsp[(6) - (9)].integer),
(yyvsp[(4) - (9)].data).val,
strerror(errno));
- d = data_copy_file(f, (yyvsp[(8) - (9)].addr));
+ d = data_copy_file(f, (yyvsp[(8) - (9)].integer));
(yyval.data) = data_merge((yyvsp[(1) - (9)].data), d);
fclose(f);
;}
break;
- case 22:
+ case 23:
+/* Line 1455 of yacc.c */
+#line 244 "dtc-parser.y"
{
FILE *f = srcfile_relative_open((yyvsp[(4) - (5)].data).val, NULL);
struct data d = empty_data;
@@ -1576,122 +1734,383 @@
;}
break;
- case 23:
-
- {
- (yyval.data) = data_add_marker((yyvsp[(1) - (2)].data), LABEL, (yyvsp[(2) - (2)].labelref));
- ;}
- break;
-
case 24:
+/* Line 1455 of yacc.c */
+#line 254 "dtc-parser.y"
{
- (yyval.data) = empty_data;
+ (yyval.data) = data_add_marker((yyvsp[(1) - (2)].data), LABEL, (yyvsp[(2) - (2)].labelref));
;}
break;
case 25:
+/* Line 1455 of yacc.c */
+#line 261 "dtc-parser.y"
{
- (yyval.data) = (yyvsp[(1) - (2)].data);
+ (yyval.data) = empty_data;
;}
break;
case 26:
+/* Line 1455 of yacc.c */
+#line 265 "dtc-parser.y"
{
- (yyval.data) = data_add_marker((yyvsp[(1) - (2)].data), LABEL, (yyvsp[(2) - (2)].labelref));
+ (yyval.data) = (yyvsp[(1) - (2)].data);
;}
break;
case 27:
+/* Line 1455 of yacc.c */
+#line 269 "dtc-parser.y"
{
- (yyval.data) = empty_data;
+ (yyval.data) = data_add_marker((yyvsp[(1) - (2)].data), LABEL, (yyvsp[(2) - (2)].labelref));
;}
break;
case 28:
+/* Line 1455 of yacc.c */
+#line 276 "dtc-parser.y"
{
- (yyval.data) = data_append_cell((yyvsp[(1) - (2)].data), (yyvsp[(2) - (2)].cell));
+ (yyval.array).data = empty_data;
+ (yyval.array).bits = eval_literal((yyvsp[(2) - (3)].literal), 0, 7);
+
+ if (((yyval.array).bits != 8) &&
+ ((yyval.array).bits != 16) &&
+ ((yyval.array).bits != 32) &&
+ ((yyval.array).bits != 64))
+ {
+ print_error("Only 8, 16, 32 and 64-bit elements"
+ " are currently supported");
+ (yyval.array).bits = 32;
+ }
;}
break;
case 29:
+/* Line 1455 of yacc.c */
+#line 291 "dtc-parser.y"
{
- (yyval.data) = data_append_cell(data_add_marker((yyvsp[(1) - (2)].data), REF_PHANDLE,
- (yyvsp[(2) - (2)].labelref)), -1);
+ (yyval.array).data = empty_data;
+ (yyval.array).bits = 32;
;}
break;
case 30:
+/* Line 1455 of yacc.c */
+#line 296 "dtc-parser.y"
{
- (yyval.data) = data_add_marker((yyvsp[(1) - (2)].data), LABEL, (yyvsp[(2) - (2)].labelref));
+ if ((yyvsp[(1) - (2)].array).bits < 64) {
+ uint64_t mask = (1ULL << (yyvsp[(1) - (2)].array).bits) - 1;
+ /*
+ * Bits above mask must either be all zero
+ * (positive within range of mask) or all one
+ * (negative and sign-extended). The second
+ * condition is true if when we set all bits
+ * within the mask to one (i.e. | in the
+ * mask), all bits are one.
+ */
+ if (((yyvsp[(2) - (2)].integer) > mask) && (((yyvsp[(2) - (2)].integer) | mask) != -1ULL))
+ print_error(
+ "integer value out of range "
+ "%016lx (%d bits)", (yyvsp[(1) - (2)].array).bits);
+ }
+
+ (yyval.array).data = data_append_integer((yyvsp[(1) - (2)].array).data, (yyvsp[(2) - (2)].integer), (yyvsp[(1) - (2)].array).bits);
;}
break;
case 31:
+/* Line 1455 of yacc.c */
+#line 316 "dtc-parser.y"
{
- (yyval.cell) = eval_literal((yyvsp[(1) - (1)].literal), 0, 32);
+ uint64_t val = ~0ULL >> (64 - (yyvsp[(1) - (2)].array).bits);
+
+ if ((yyvsp[(1) - (2)].array).bits == 32)
+ (yyvsp[(1) - (2)].array).data = data_add_marker((yyvsp[(1) - (2)].array).data,
+ REF_PHANDLE,
+ (yyvsp[(2) - (2)].labelref));
+ else
+ print_error("References are only allowed in "
+ "arrays with 32-bit elements.");
+
+ (yyval.array).data = data_append_integer((yyvsp[(1) - (2)].array).data, val, (yyvsp[(1) - (2)].array).bits);
;}
break;
case 32:
+/* Line 1455 of yacc.c */
+#line 330 "dtc-parser.y"
{
- (yyval.data) = empty_data;
+ (yyval.array).data = data_add_marker((yyvsp[(1) - (2)].array).data, LABEL, (yyvsp[(2) - (2)].labelref));
;}
break;
case 33:
+/* Line 1455 of yacc.c */
+#line 337 "dtc-parser.y"
{
- (yyval.data) = data_append_byte((yyvsp[(1) - (2)].data), (yyvsp[(2) - (2)].byte));
+ (yyval.integer) = eval_literal((yyvsp[(1) - (1)].literal), 0, 64);
;}
break;
case 34:
+/* Line 1455 of yacc.c */
+#line 341 "dtc-parser.y"
{
- (yyval.data) = data_add_marker((yyvsp[(1) - (2)].data), LABEL, (yyvsp[(2) - (2)].labelref));
+ (yyval.integer) = eval_char_literal((yyvsp[(1) - (1)].literal));
;}
break;
case 35:
+/* Line 1455 of yacc.c */
+#line 345 "dtc-parser.y"
+ {
+ (yyval.integer) = (yyvsp[(2) - (3)].integer);
+ ;}
+ break;
+
+ case 38:
+
+/* Line 1455 of yacc.c */
+#line 356 "dtc-parser.y"
+ { (yyval.integer) = (yyvsp[(1) - (5)].integer) ? (yyvsp[(3) - (5)].integer) : (yyvsp[(5) - (5)].integer); ;}
+ break;
+
+ case 40:
+
+/* Line 1455 of yacc.c */
+#line 361 "dtc-parser.y"
+ { (yyval.integer) = (yyvsp[(1) - (3)].integer) || (yyvsp[(3) - (3)].integer); ;}
+ break;
+
+ case 42:
+
+/* Line 1455 of yacc.c */
+#line 366 "dtc-parser.y"
+ { (yyval.integer) = (yyvsp[(1) - (3)].integer) && (yyvsp[(3) - (3)].integer); ;}
+ break;
+
+ case 44:
+
+/* Line 1455 of yacc.c */
+#line 371 "dtc-parser.y"
+ { (yyval.integer) = (yyvsp[(1) - (3)].integer) | (yyvsp[(3) - (3)].integer); ;}
+ break;
+
+ case 46:
+
+/* Line 1455 of yacc.c */
+#line 376 "dtc-parser.y"
+ { (yyval.integer) = (yyvsp[(1) - (3)].integer) ^ (yyvsp[(3) - (3)].integer); ;}
+ break;
+
+ case 48:
+
+/* Line 1455 of yacc.c */
+#line 381 "dtc-parser.y"
+ { (yyval.integer) = (yyvsp[(1) - (3)].integer) & (yyvsp[(3) - (3)].integer); ;}
+ break;
+
+ case 50:
+
+/* Line 1455 of yacc.c */
+#line 386 "dtc-parser.y"
+ { (yyval.integer) = (yyvsp[(1) - (3)].integer) == (yyvsp[(3) - (3)].integer); ;}
+ break;
+
+ case 51:
+
+/* Line 1455 of yacc.c */
+#line 387 "dtc-parser.y"
+ { (yyval.integer) = (yyvsp[(1) - (3)].integer) != (yyvsp[(3) - (3)].integer); ;}
+ break;
+
+ case 53:
+
+/* Line 1455 of yacc.c */
+#line 392 "dtc-parser.y"
+ { (yyval.integer) = (yyvsp[(1) - (3)].integer) < (yyvsp[(3) - (3)].integer); ;}
+ break;
+
+ case 54:
+
+/* Line 1455 of yacc.c */
+#line 393 "dtc-parser.y"
+ { (yyval.integer) = (yyvsp[(1) - (3)].integer) > (yyvsp[(3) - (3)].integer); ;}
+ break;
+
+ case 55:
+
+/* Line 1455 of yacc.c */
+#line 394 "dtc-parser.y"
+ { (yyval.integer) = (yyvsp[(1) - (3)].integer) <= (yyvsp[(3) - (3)].integer); ;}
+ break;
+
+ case 56:
+
+/* Line 1455 of yacc.c */
+#line 395 "dtc-parser.y"
+ { (yyval.integer) = (yyvsp[(1) - (3)].integer) >= (yyvsp[(3) - (3)].integer); ;}
+ break;
+
+ case 57:
+
+/* Line 1455 of yacc.c */
+#line 399 "dtc-parser.y"
+ { (yyval.integer) = (yyvsp[(1) - (3)].integer) << (yyvsp[(3) - (3)].integer); ;}
+ break;
+
+ case 58:
+
+/* Line 1455 of yacc.c */
+#line 400 "dtc-parser.y"
+ { (yyval.integer) = (yyvsp[(1) - (3)].integer) >> (yyvsp[(3) - (3)].integer); ;}
+ break;
+
+ case 60:
+
+/* Line 1455 of yacc.c */
+#line 405 "dtc-parser.y"
+ { (yyval.integer) = (yyvsp[(1) - (3)].integer) + (yyvsp[(3) - (3)].integer); ;}
+ break;
+
+ case 61:
+
+/* Line 1455 of yacc.c */
+#line 406 "dtc-parser.y"
+ { (yyval.integer) = (yyvsp[(1) - (3)].integer) - (yyvsp[(3) - (3)].integer); ;}
+ break;
+
+ case 63:
+
+/* Line 1455 of yacc.c */
+#line 411 "dtc-parser.y"
+ { (yyval.integer) = (yyvsp[(1) - (3)].integer) * (yyvsp[(3) - (3)].integer); ;}
+ break;
+
+ case 64:
+
+/* Line 1455 of yacc.c */
+#line 412 "dtc-parser.y"
+ { (yyval.integer) = (yyvsp[(1) - (3)].integer) / (yyvsp[(3) - (3)].integer); ;}
+ break;
+
+ case 65:
+
+/* Line 1455 of yacc.c */
+#line 413 "dtc-parser.y"
+ { (yyval.integer) = (yyvsp[(1) - (3)].integer) % (yyvsp[(3) - (3)].integer); ;}
+ break;
+
+ case 68:
+
+/* Line 1455 of yacc.c */
+#line 419 "dtc-parser.y"
+ { (yyval.integer) = -(yyvsp[(2) - (2)].integer); ;}
+ break;
+
+ case 69:
+
+/* Line 1455 of yacc.c */
+#line 420 "dtc-parser.y"
+ { (yyval.integer) = ~(yyvsp[(2) - (2)].integer); ;}
+ break;
+
+ case 70:
+
+/* Line 1455 of yacc.c */
+#line 421 "dtc-parser.y"
+ { (yyval.integer) = !(yyvsp[(2) - (2)].integer); ;}
+ break;
+
+ case 71:
+
+/* Line 1455 of yacc.c */
+#line 426 "dtc-parser.y"
+ {
+ (yyval.data) = empty_data;
+ ;}
+ break;
+
+ case 72:
+
+/* Line 1455 of yacc.c */
+#line 430 "dtc-parser.y"
+ {
+ (yyval.data) = data_append_byte((yyvsp[(1) - (2)].data), (yyvsp[(2) - (2)].byte));
+ ;}
+ break;
+
+ case 73:
+
+/* Line 1455 of yacc.c */
+#line 434 "dtc-parser.y"
+ {
+ (yyval.data) = data_add_marker((yyvsp[(1) - (2)].data), LABEL, (yyvsp[(2) - (2)].labelref));
+ ;}
+ break;
+
+ case 74:
+
+/* Line 1455 of yacc.c */
+#line 441 "dtc-parser.y"
{
(yyval.nodelist) = NULL;
;}
break;
- case 36:
+ case 75:
+/* Line 1455 of yacc.c */
+#line 445 "dtc-parser.y"
{
(yyval.nodelist) = chain_node((yyvsp[(1) - (2)].node), (yyvsp[(2) - (2)].nodelist));
;}
break;
- case 37:
+ case 76:
+/* Line 1455 of yacc.c */
+#line 449 "dtc-parser.y"
{
print_error("syntax error: properties must precede subnodes");
YYERROR;
;}
break;
- case 38:
+ case 77:
+/* Line 1455 of yacc.c */
+#line 457 "dtc-parser.y"
{
(yyval.node) = name_node((yyvsp[(2) - (2)].node), (yyvsp[(1) - (2)].propnodename));
;}
break;
- case 39:
+ case 78:
+/* Line 1455 of yacc.c */
+#line 461 "dtc-parser.y"
+ {
+ (yyval.node) = name_node(build_node_delete(), (yyvsp[(2) - (3)].propnodename));
+ ;}
+ break;
+
+ case 79:
+
+/* Line 1455 of yacc.c */
+#line 465 "dtc-parser.y"
{
add_label(&(yyvsp[(2) - (2)].node)->labels, (yyvsp[(1) - (2)].labelref));
(yyval.node) = (yyvsp[(2) - (2)].node);
@@ -1700,6 +2119,8 @@
+/* Line 1455 of yacc.c */
+#line 2124 "dtc-parser.tab.c"
default: break;
}
YY_SYMBOL_PRINT ("-> $$ =", yyr1[yyn], &yyval, &yyloc);
@@ -1910,6 +2331,8 @@
+/* Line 1675 of yacc.c */
+#line 471 "dtc-parser.y"
void print_error(char const *fmt, ...)
@@ -1934,9 +2357,12 @@
errno = 0;
val = strtoull(s, &e, base);
- if (*e)
- print_error("bad characters in literal");
- else if ((errno == ERANGE)
+ if (*e) {
+ size_t uls = strspn(e, "UL");
+ if (e[uls])
+ print_error("bad characters in literal");
+ }
+ if ((errno == ERANGE)
|| ((bits < 64) && (val >= (1ULL << bits))))
print_error("literal out of range");
else if (errno != 0)
@@ -1944,3 +2370,29 @@
return val;
}
+static unsigned char eval_char_literal(const char *s)
+{
+ int i = 1;
+ char c = s[0];
+
+ if (c == '\0')
+ {
+ print_error("empty character literal");
+ return 0;
+ }
+
+ /*
+ * If the first character in the character literal is a \ then process
+ * the remaining characters as an escape encoding. If the first
+ * character is neither an escape or a terminator it should be the only
+ * character in the literal and will be returned.
+ */
+ if (c == '\\')
+ c = get_escape_char(s, &i);
+
+ if (s[i] != '\0')
+ print_error("malformed character literal");
+
+ return c;
+}
+
diff --git a/scripts/dtc/dtc-parser.tab.h_shipped b/scripts/dtc/dtc-parser.tab.h_shipped
index 4ee682b..9d2dce4 100644
--- a/scripts/dtc/dtc-parser.tab.h_shipped
+++ b/scripts/dtc/dtc-parser.tab.h_shipped
@@ -1,9 +1,10 @@
-/* A Bison parser, made by GNU Bison 2.4.3. */
+
+/* A Bison parser, made by GNU Bison 2.4.1. */
/* Skeleton interface for Bison's Yacc-like parsers in C
- Copyright (C) 1984, 1989, 1990, 2000, 2001, 2002, 2003, 2004, 2005, 2006,
- 2009, 2010 Free Software Foundation, Inc.
+ Copyright (C) 1984, 1989, 1990, 2000, 2001, 2002, 2003, 2004, 2005, 2006
+ Free Software Foundation, Inc.
This program is free software: you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
@@ -40,14 +41,26 @@
enum yytokentype {
DT_V1 = 258,
DT_MEMRESERVE = 259,
- DT_PROPNODENAME = 260,
- DT_LITERAL = 261,
- DT_BASE = 262,
- DT_BYTE = 263,
- DT_STRING = 264,
- DT_LABEL = 265,
- DT_REF = 266,
- DT_INCBIN = 267
+ DT_LSHIFT = 260,
+ DT_RSHIFT = 261,
+ DT_LE = 262,
+ DT_GE = 263,
+ DT_EQ = 264,
+ DT_NE = 265,
+ DT_AND = 266,
+ DT_OR = 267,
+ DT_BITS = 268,
+ DT_DEL_PROP = 269,
+ DT_DEL_NODE = 270,
+ DT_PROPNODENAME = 271,
+ DT_LITERAL = 272,
+ DT_CHAR_LITERAL = 273,
+ DT_BASE = 274,
+ DT_BYTE = 275,
+ DT_STRING = 276,
+ DT_LABEL = 277,
+ DT_REF = 278,
+ DT_INCBIN = 279
};
#endif
@@ -57,6 +70,8 @@
typedef union YYSTYPE
{
+/* Line 1676 of yacc.c */
+#line 40 "dtc-parser.y"
char *propnodename;
char *literal;
@@ -65,16 +80,22 @@
uint8_t byte;
struct data data;
- uint64_t addr;
- cell_t cell;
+ struct {
+ struct data data;
+ int bits;
+ } array;
+
struct property *prop;
struct property *proplist;
struct node *node;
struct node *nodelist;
struct reserve_info *re;
+ uint64_t integer;
+/* Line 1676 of yacc.c */
+#line 99 "dtc-parser.tab.h"
} YYSTYPE;
# define YYSTYPE_IS_TRIVIAL 1
# define yystype YYSTYPE /* obsolescent; will be withdrawn */
diff --git a/scripts/dtc/dtc-parser.y b/scripts/dtc/dtc-parser.y
index 5e84a67..f412460 100644
--- a/scripts/dtc/dtc-parser.y
+++ b/scripts/dtc/dtc-parser.y
@@ -34,6 +34,7 @@
extern int treesource_error;
static unsigned long long eval_literal(const char *s, int base, int bits);
+static unsigned char eval_char_literal(const char *s);
%}
%union {
@@ -44,19 +45,28 @@
uint8_t byte;
struct data data;
- uint64_t addr;
- cell_t cell;
+ struct {
+ struct data data;
+ int bits;
+ } array;
+
struct property *prop;
struct property *proplist;
struct node *node;
struct node *nodelist;
struct reserve_info *re;
+ uint64_t integer;
}
%token DT_V1
%token DT_MEMRESERVE
+%token DT_LSHIFT DT_RSHIFT DT_LE DT_GE DT_EQ DT_NE DT_AND DT_OR
+%token DT_BITS
+%token DT_DEL_PROP
+%token DT_DEL_NODE
%token <propnodename> DT_PROPNODENAME
%token <literal> DT_LITERAL
+%token <literal> DT_CHAR_LITERAL
%token <cbase> DT_BASE
%token <byte> DT_BYTE
%token <data> DT_STRING
@@ -68,9 +78,7 @@
%type <data> propdataprefix
%type <re> memreserve
%type <re> memreserves
-%type <addr> addr
-%type <data> celllist
-%type <cell> cellval
+%type <array> arrayprefix
%type <data> bytestring
%type <prop> propdef
%type <proplist> proplist
@@ -80,6 +88,21 @@
%type <node> subnode
%type <nodelist> subnodes
+%type <integer> integer_prim
+%type <integer> integer_unary
+%type <integer> integer_mul
+%type <integer> integer_add
+%type <integer> integer_shift
+%type <integer> integer_rela
+%type <integer> integer_eq
+%type <integer> integer_bitand
+%type <integer> integer_bitxor
+%type <integer> integer_bitor
+%type <integer> integer_and
+%type <integer> integer_or
+%type <integer> integer_trinary
+%type <integer> integer_expr
+
%%
sourcefile:
@@ -102,7 +125,7 @@
;
memreserve:
- DT_MEMRESERVE addr addr ';'
+ DT_MEMRESERVE integer_prim integer_prim ';'
{
$$ = build_reserve_entry($2, $3);
}
@@ -113,13 +136,6 @@
}
;
-addr:
- DT_LITERAL
- {
- $$ = eval_literal($1, 0, 64);
- }
- ;
-
devicetree:
'/' nodedef
{
@@ -139,6 +155,17 @@
print_error("label or path, '%s', not found", $2);
$$ = $1;
}
+ | devicetree DT_DEL_NODE DT_REF ';'
+ {
+ struct node *target = get_node_by_ref($1, $3);
+
+ if (!target)
+ print_error("label or path, '%s', not found", $3);
+ else
+ delete_node(target);
+
+ $$ = $1;
+ }
;
nodedef:
@@ -168,6 +195,10 @@
{
$$ = build_property($1, empty_data);
}
+ | DT_DEL_PROP DT_PROPNODENAME ';'
+ {
+ $$ = build_property_delete($2);
+ }
| DT_LABEL propdef
{
add_label(&$2->labels, $1);
@@ -180,9 +211,9 @@
{
$$ = data_merge($1, $2);
}
- | propdataprefix '<' celllist '>'
+ | propdataprefix arrayprefix '>'
{
- $$ = data_merge($1, $3);
+ $$ = data_merge($1, $2.data);
}
| propdataprefix '[' bytestring ']'
{
@@ -192,7 +223,7 @@
{
$$ = data_add_marker($1, REF_PATH, $2);
}
- | propdataprefix DT_INCBIN '(' DT_STRING ',' addr ',' addr ')'
+ | propdataprefix DT_INCBIN '(' DT_STRING ',' integer_prim ',' integer_prim ')'
{
FILE *f = srcfile_relative_open($4.val, NULL);
struct data d;
@@ -240,31 +271,154 @@
}
;
-celllist:
- /* empty */
+arrayprefix:
+ DT_BITS DT_LITERAL '<'
{
- $$ = empty_data;
+ $$.data = empty_data;
+ $$.bits = eval_literal($2, 0, 7);
+
+ if (($$.bits != 8) &&
+ ($$.bits != 16) &&
+ ($$.bits != 32) &&
+ ($$.bits != 64))
+ {
+ print_error("Only 8, 16, 32 and 64-bit elements"
+ " are currently supported");
+ $$.bits = 32;
+ }
}
- | celllist cellval
+ | '<'
{
- $$ = data_append_cell($1, $2);
+ $$.data = empty_data;
+ $$.bits = 32;
}
- | celllist DT_REF
+ | arrayprefix integer_prim
{
- $$ = data_append_cell(data_add_marker($1, REF_PHANDLE,
- $2), -1);
+ if ($1.bits < 64) {
+ uint64_t mask = (1ULL << $1.bits) - 1;
+ /*
+ * Bits above mask must either be all zero
+ * (positive within range of mask) or all one
+ * (negative and sign-extended). The second
+ * condition is true if when we set all bits
+ * within the mask to one (i.e. | in the
+ * mask), all bits are one.
+ */
+ if (($2 > mask) && (($2 | mask) != -1ULL))
+ print_error(
+ "integer value out of range "
+ "%016lx (%d bits)", $1.bits);
+ }
+
+ $$.data = data_append_integer($1.data, $2, $1.bits);
}
- | celllist DT_LABEL
+ | arrayprefix DT_REF
{
- $$ = data_add_marker($1, LABEL, $2);
+ uint64_t val = ~0ULL >> (64 - $1.bits);
+
+ if ($1.bits == 32)
+ $1.data = data_add_marker($1.data,
+ REF_PHANDLE,
+ $2);
+ else
+ print_error("References are only allowed in "
+ "arrays with 32-bit elements.");
+
+ $$.data = data_append_integer($1.data, val, $1.bits);
+ }
+ | arrayprefix DT_LABEL
+ {
+ $$.data = data_add_marker($1.data, LABEL, $2);
}
;
-cellval:
+integer_prim:
DT_LITERAL
{
- $$ = eval_literal($1, 0, 32);
+ $$ = eval_literal($1, 0, 64);
}
+ | DT_CHAR_LITERAL
+ {
+ $$ = eval_char_literal($1);
+ }
+ | '(' integer_expr ')'
+ {
+ $$ = $2;
+ }
+ ;
+
+integer_expr:
+ integer_trinary
+ ;
+
+integer_trinary:
+ integer_or
+ | integer_or '?' integer_expr ':' integer_trinary { $$ = $1 ? $3 : $5; }
+ ;
+
+integer_or:
+ integer_and
+ | integer_or DT_OR integer_and { $$ = $1 || $3; }
+ ;
+
+integer_and:
+ integer_bitor
+ | integer_and DT_AND integer_bitor { $$ = $1 && $3; }
+ ;
+
+integer_bitor:
+ integer_bitxor
+ | integer_bitor '|' integer_bitxor { $$ = $1 | $3; }
+ ;
+
+integer_bitxor:
+ integer_bitand
+ | integer_bitxor '^' integer_bitand { $$ = $1 ^ $3; }
+ ;
+
+integer_bitand:
+ integer_eq
+ | integer_bitand '&' integer_eq { $$ = $1 & $3; }
+ ;
+
+integer_eq:
+ integer_rela
+ | integer_eq DT_EQ integer_rela { $$ = $1 == $3; }
+ | integer_eq DT_NE integer_rela { $$ = $1 != $3; }
+ ;
+
+integer_rela:
+ integer_shift
+ | integer_rela '<' integer_shift { $$ = $1 < $3; }
+ | integer_rela '>' integer_shift { $$ = $1 > $3; }
+ | integer_rela DT_LE integer_shift { $$ = $1 <= $3; }
+ | integer_rela DT_GE integer_shift { $$ = $1 >= $3; }
+ ;
+
+integer_shift:
+ integer_shift DT_LSHIFT integer_add { $$ = $1 << $3; }
+ | integer_shift DT_RSHIFT integer_add { $$ = $1 >> $3; }
+ | integer_add
+ ;
+
+integer_add:
+ integer_add '+' integer_mul { $$ = $1 + $3; }
+ | integer_add '-' integer_mul { $$ = $1 - $3; }
+ | integer_mul
+ ;
+
+integer_mul:
+ integer_mul '*' integer_unary { $$ = $1 * $3; }
+ | integer_mul '/' integer_unary { $$ = $1 / $3; }
+ | integer_mul '%' integer_unary { $$ = $1 % $3; }
+ | integer_unary
+ ;
+
+integer_unary:
+ integer_prim
+ | '-' integer_unary { $$ = -$2; }
+ | '~' integer_unary { $$ = ~$2; }
+ | '!' integer_unary { $$ = !$2; }
;
bytestring:
@@ -303,6 +457,10 @@
{
$$ = name_node($2, $1);
}
+ | DT_DEL_NODE DT_PROPNODENAME ';'
+ {
+ $$ = name_node(build_node_delete(), $2);
+ }
| DT_LABEL subnode
{
add_label(&$2->labels, $1);
@@ -334,12 +492,41 @@
errno = 0;
val = strtoull(s, &e, base);
- if (*e)
- print_error("bad characters in literal");
- else if ((errno == ERANGE)
+ if (*e) {
+ size_t uls = strspn(e, "UL");
+ if (e[uls])
+ print_error("bad characters in literal");
+ }
+ if ((errno == ERANGE)
|| ((bits < 64) && (val >= (1ULL << bits))))
print_error("literal out of range");
else if (errno != 0)
print_error("bad literal");
return val;
}
+
+static unsigned char eval_char_literal(const char *s)
+{
+ int i = 1;
+ char c = s[0];
+
+ if (c == '\0')
+ {
+ print_error("empty character literal");
+ return 0;
+ }
+
+ /*
+ * If the first character in the character literal is a \ then process
+ * the remaining characters as an escape encoding. If the first
+ * character is neither an escape or a terminator it should be the only
+ * character in the literal and will be returned.
+ */
+ if (c == '\\')
+ c = get_escape_char(s, &i);
+
+ if (s[i] != '\0')
+ print_error("malformed character literal");
+
+ return c;
+}
diff --git a/scripts/dtc/dtc.c b/scripts/dtc/dtc.c
index 2ef5e2e..a375683 100644
--- a/scripts/dtc/dtc.c
+++ b/scripts/dtc/dtc.c
@@ -82,6 +82,8 @@
fprintf(stderr, "\t\tSet the physical boot cpu\n");
fprintf(stderr, "\t-f\n");
fprintf(stderr, "\t\tForce - try to produce output even if the input tree has errors\n");
+ fprintf(stderr, "\t-i\n");
+ fprintf(stderr, "\t\tAdd a path to search for include files\n");
fprintf(stderr, "\t-s\n");
fprintf(stderr, "\t\tSort nodes and properties before outputting (only useful for\n\t\tcomparing trees)\n");
fprintf(stderr, "\t-v\n");
@@ -91,6 +93,9 @@
fprintf(stderr, "\t\t\tlegacy - \"linux,phandle\" properties only\n");
fprintf(stderr, "\t\t\tepapr - \"phandle\" properties only\n");
fprintf(stderr, "\t\t\tboth - Both \"linux,phandle\" and \"phandle\" properties\n");
+ fprintf(stderr, "\t-W [no-]<checkname>\n");
+ fprintf(stderr, "\t-E [no-]<checkname>\n");
+ fprintf(stderr, "\t\t\tenable or disable warnings and errors\n");
exit(3);
}
@@ -113,7 +118,7 @@
minsize = 0;
padsize = 0;
- while ((opt = getopt(argc, argv, "hI:O:o:V:d:R:S:p:fcqb:vH:s"))
+ while ((opt = getopt(argc, argv, "hI:O:o:V:d:R:S:p:fqb:i:vH:sW:E:"))
!= EOF) {
switch (opt) {
case 'I':
@@ -149,6 +154,9 @@
case 'b':
cmdline_boot_cpuid = strtoll(optarg, NULL, 0);
break;
+ case 'i':
+ srcfile_add_search_path(optarg);
+ break;
case 'v':
printf("Version: %s\n", DTC_VERSION);
exit(0);
@@ -168,6 +176,14 @@
sort = 1;
break;
+ case 'W':
+ parse_checks_option(true, false, optarg);
+ break;
+
+ case 'E':
+ parse_checks_option(false, true, optarg);
+ break;
+
case 'h':
default:
usage();
@@ -188,9 +204,6 @@
if (minsize)
fprintf(stderr, "DTC: Use of \"-S\" is deprecated; it will be removed soon, use \"-p\" instead\n");
- fprintf(stderr, "DTC: %s->%s on file \"%s\"\n",
- inform, outform, arg);
-
if (depname) {
depfile = fopen(depname, "w");
if (!depfile)
diff --git a/scripts/dtc/dtc.h b/scripts/dtc/dtc.h
index f37c97e..3e42a07 100644
--- a/scripts/dtc/dtc.h
+++ b/scripts/dtc/dtc.h
@@ -25,6 +25,7 @@
#include <string.h>
#include <stdlib.h>
#include <stdint.h>
+#include <stdbool.h>
#include <stdarg.h>
#include <assert.h>
#include <ctype.h>
@@ -109,6 +110,7 @@
const void *p, int len);
struct data data_merge(struct data d1, struct data d2);
struct data data_append_cell(struct data d, cell_t word);
+struct data data_append_integer(struct data d, uint64_t word, int bits);
struct data data_append_re(struct data d, const struct fdt_reserve_entry *re);
struct data data_append_addr(struct data d, uint64_t addr);
struct data data_append_byte(struct data d, uint8_t byte);
@@ -126,11 +128,13 @@
/* Live trees */
struct label {
+ int deleted;
char *label;
struct label *next;
};
struct property {
+ int deleted;
char *name;
struct data val;
@@ -140,6 +144,7 @@
};
struct node {
+ int deleted;
char *name;
struct property *proplist;
struct node *children;
@@ -156,28 +161,47 @@
struct label *labels;
};
-#define for_each_label(l0, l) \
+#define for_each_label_withdel(l0, l) \
for ((l) = (l0); (l); (l) = (l)->next)
-#define for_each_property(n, p) \
+#define for_each_label(l0, l) \
+ for_each_label_withdel(l0, l) \
+ if (!(l)->deleted)
+
+#define for_each_property_withdel(n, p) \
for ((p) = (n)->proplist; (p); (p) = (p)->next)
-#define for_each_child(n, c) \
+#define for_each_property(n, p) \
+ for_each_property_withdel(n, p) \
+ if (!(p)->deleted)
+
+#define for_each_child_withdel(n, c) \
for ((c) = (n)->children; (c); (c) = (c)->next_sibling)
+#define for_each_child(n, c) \
+ for_each_child_withdel(n, c) \
+ if (!(c)->deleted)
+
void add_label(struct label **labels, char *label);
+void delete_labels(struct label **labels);
struct property *build_property(char *name, struct data val);
+struct property *build_property_delete(char *name);
struct property *chain_property(struct property *first, struct property *list);
struct property *reverse_properties(struct property *first);
struct node *build_node(struct property *proplist, struct node *children);
+struct node *build_node_delete(void);
struct node *name_node(struct node *node, char *name);
struct node *chain_node(struct node *first, struct node *list);
struct node *merge_nodes(struct node *old_node, struct node *new_node);
void add_property(struct node *node, struct property *prop);
+void delete_property_by_name(struct node *node, char *name);
+void delete_property(struct property *prop);
void add_child(struct node *parent, struct node *child);
+void delete_node_by_name(struct node *parent, char *name);
+void delete_node(struct node *node);
const char *get_unitname(struct node *node);
struct property *get_property(struct node *node, const char *propname);
@@ -224,6 +248,7 @@
/* Checks */
+void parse_checks_option(bool warn, bool error, const char *optarg);
void process_checks(int force, struct boot_info *bi);
/* Flattened trees */
diff --git a/scripts/dtc/fdtdump.c b/scripts/dtc/fdtdump.c
new file mode 100644
index 0000000..207a46d
--- /dev/null
+++ b/scripts/dtc/fdtdump.c
@@ -0,0 +1,162 @@
+/*
+ * fdtdump.c - Contributed by Pantelis Antoniou <pantelis.antoniou AT gmail.com>
+ */
+
+#include <stdint.h>
+#include <stdio.h>
+#include <stdlib.h>
+#include <string.h>
+#include <ctype.h>
+
+#include <fdt.h>
+#include <libfdt_env.h>
+
+#include "util.h"
+
+#define ALIGN(x, a) (((x) + ((a) - 1)) & ~((a) - 1))
+#define PALIGN(p, a) ((void *)(ALIGN((unsigned long)(p), (a))))
+#define GET_CELL(p) (p += 4, *((const uint32_t *)(p-4)))
+
+static void print_data(const char *data, int len)
+{
+ int i;
+ const char *p = data;
+
+ /* no data, don't print */
+ if (len == 0)
+ return;
+
+ if (util_is_printable_string(data, len)) {
+ printf(" = \"%s\"", (const char *)data);
+ } else if ((len % 4) == 0) {
+ printf(" = <");
+ for (i = 0; i < len; i += 4)
+ printf("0x%08x%s", fdt32_to_cpu(GET_CELL(p)),
+ i < (len - 4) ? " " : "");
+ printf(">");
+ } else {
+ printf(" = [");
+ for (i = 0; i < len; i++)
+ printf("%02x%s", *p++, i < len - 1 ? " " : "");
+ printf("]");
+ }
+}
+
+static void dump_blob(void *blob)
+{
+ struct fdt_header *bph = blob;
+ uint32_t off_mem_rsvmap = fdt32_to_cpu(bph->off_mem_rsvmap);
+ uint32_t off_dt = fdt32_to_cpu(bph->off_dt_struct);
+ uint32_t off_str = fdt32_to_cpu(bph->off_dt_strings);
+ struct fdt_reserve_entry *p_rsvmap =
+ (struct fdt_reserve_entry *)((char *)blob + off_mem_rsvmap);
+ const char *p_struct = (const char *)blob + off_dt;
+ const char *p_strings = (const char *)blob + off_str;
+ uint32_t version = fdt32_to_cpu(bph->version);
+ uint32_t totalsize = fdt32_to_cpu(bph->totalsize);
+ uint32_t tag;
+ const char *p, *s, *t;
+ int depth, sz, shift;
+ int i;
+ uint64_t addr, size;
+
+ depth = 0;
+ shift = 4;
+
+ printf("/dts-v1/;\n");
+ printf("// magic:\t\t0x%x\n", fdt32_to_cpu(bph->magic));
+ printf("// totalsize:\t\t0x%x (%d)\n", totalsize, totalsize);
+ printf("// off_dt_struct:\t0x%x\n", off_dt);
+ printf("// off_dt_strings:\t0x%x\n", off_str);
+ printf("// off_mem_rsvmap:\t0x%x\n", off_mem_rsvmap);
+ printf("// version:\t\t%d\n", version);
+ printf("// last_comp_version:\t%d\n",
+ fdt32_to_cpu(bph->last_comp_version));
+ if (version >= 2)
+ printf("// boot_cpuid_phys:\t0x%x\n",
+ fdt32_to_cpu(bph->boot_cpuid_phys));
+
+ if (version >= 3)
+ printf("// size_dt_strings:\t0x%x\n",
+ fdt32_to_cpu(bph->size_dt_strings));
+ if (version >= 17)
+ printf("// size_dt_struct:\t0x%x\n",
+ fdt32_to_cpu(bph->size_dt_struct));
+ printf("\n");
+
+ for (i = 0; ; i++) {
+ addr = fdt64_to_cpu(p_rsvmap[i].address);
+ size = fdt64_to_cpu(p_rsvmap[i].size);
+ if (addr == 0 && size == 0)
+ break;
+
+ printf("/memreserve/ %llx %llx;\n",
+ (unsigned long long)addr, (unsigned long long)size);
+ }
+
+ p = p_struct;
+ while ((tag = fdt32_to_cpu(GET_CELL(p))) != FDT_END) {
+
+ /* printf("tag: 0x%08x (%d)\n", tag, p - p_struct); */
+
+ if (tag == FDT_BEGIN_NODE) {
+ s = p;
+ p = PALIGN(p + strlen(s) + 1, 4);
+
+ if (*s == '\0')
+ s = "/";
+
+ printf("%*s%s {\n", depth * shift, "", s);
+
+ depth++;
+ continue;
+ }
+
+ if (tag == FDT_END_NODE) {
+ depth--;
+
+ printf("%*s};\n", depth * shift, "");
+ continue;
+ }
+
+ if (tag == FDT_NOP) {
+ printf("%*s// [NOP]\n", depth * shift, "");
+ continue;
+ }
+
+ if (tag != FDT_PROP) {
+ fprintf(stderr, "%*s ** Unknown tag 0x%08x\n", depth * shift, "", tag);
+ break;
+ }
+ sz = fdt32_to_cpu(GET_CELL(p));
+ s = p_strings + fdt32_to_cpu(GET_CELL(p));
+ if (version < 16 && sz >= 8)
+ p = PALIGN(p, 8);
+ t = p;
+
+ p = PALIGN(p + sz, 4);
+
+ printf("%*s%s", depth * shift, "", s);
+ print_data(t, sz);
+ printf(";\n");
+ }
+}
+
+
+int main(int argc, char *argv[])
+{
+ char *buf;
+
+ if (argc < 2) {
+ fprintf(stderr, "supply input filename\n");
+ return 5;
+ }
+
+ buf = utilfdt_read(argv[1]);
+ if (buf)
+ dump_blob(buf);
+ else
+ return 10;
+
+ return 0;
+}
diff --git a/scripts/dtc/fdtget.c b/scripts/dtc/fdtget.c
new file mode 100644
index 0000000..c2fbab2
--- /dev/null
+++ b/scripts/dtc/fdtget.c
@@ -0,0 +1,366 @@
+/*
+ * Copyright (c) 2011 The Chromium OS Authors. All rights reserved.
+ *
+ * Portions from U-Boot cmd_fdt.c (C) Copyright 2007
+ * Gerald Van Baren, Custom IDEAS, vanbaren@cideas.com
+ * Based on code written by:
+ * Pantelis Antoniou <pantelis.antoniou@gmail.com> and
+ * Matthew McClintock <msm@freescale.com>
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <assert.h>
+#include <ctype.h>
+#include <getopt.h>
+#include <stdio.h>
+#include <stdlib.h>
+#include <string.h>
+
+#include <libfdt.h>
+
+#include "util.h"
+
+enum display_mode {
+ MODE_SHOW_VALUE, /* show values for node properties */
+ MODE_LIST_PROPS, /* list the properties for a node */
+ MODE_LIST_SUBNODES, /* list the subnodes of a node */
+};
+
+/* Holds information which controls our output and options */
+struct display_info {
+ int type; /* data type (s/i/u/x or 0 for default) */
+ int size; /* data size (1/2/4) */
+ enum display_mode mode; /* display mode that we are using */
+ const char *default_val; /* default value if node/property not found */
+};
+
+static void report_error(const char *where, int err)
+{
+ fprintf(stderr, "Error at '%s': %s\n", where, fdt_strerror(err));
+}
+
+/**
+ * Displays data of a given length according to selected options
+ *
+ * If a specific data type is provided in disp, then this is used. Otherwise
+ * we try to guess the data type / size from the contents.
+ *
+ * @param disp Display information / options
+ * @param data Data to display
+ * @param len Maximum length of buffer
+ * @return 0 if ok, -1 if data does not match format
+ */
+static int show_data(struct display_info *disp, const char *data, int len)
+{
+ int i, size;
+ const uint8_t *p = (const uint8_t *)data;
+ const char *s;
+ int value;
+ int is_string;
+ char fmt[3];
+
+ /* no data, don't print */
+ if (len == 0)
+ return 0;
+
+ is_string = (disp->type) == 's' ||
+ (!disp->type && util_is_printable_string(data, len));
+ if (is_string) {
+ if (data[len - 1] != '\0') {
+ fprintf(stderr, "Unterminated string\n");
+ return -1;
+ }
+ for (s = data; s - data < len; s += strlen(s) + 1) {
+ if (s != data)
+ printf(" ");
+ printf("%s", (const char *)s);
+ }
+ return 0;
+ }
+ size = disp->size;
+ if (size == -1) {
+ size = (len % 4) == 0 ? 4 : 1;
+ } else if (len % size) {
+ fprintf(stderr, "Property length must be a multiple of "
+ "selected data size\n");
+ return -1;
+ }
+ fmt[0] = '%';
+ fmt[1] = disp->type ? disp->type : 'd';
+ fmt[2] = '\0';
+ for (i = 0; i < len; i += size, p += size) {
+ if (i)
+ printf(" ");
+ value = size == 4 ? fdt32_to_cpu(*(const uint32_t *)p) :
+ size == 2 ? (*p << 8) | p[1] : *p;
+ printf(fmt, value);
+ }
+ return 0;
+}
+
+/**
+ * List all properties in a node, one per line.
+ *
+ * @param blob FDT blob
+ * @param node Node to display
+ * @return 0 if ok, or FDT_ERR... if not.
+ */
+static int list_properties(const void *blob, int node)
+{
+ const struct fdt_property *data;
+ const char *name;
+ int prop;
+
+ prop = fdt_first_property_offset(blob, node);
+ do {
+ /* Stop silently when there are no more properties */
+ if (prop < 0)
+ return prop == -FDT_ERR_NOTFOUND ? 0 : prop;
+ data = fdt_get_property_by_offset(blob, prop, NULL);
+ name = fdt_string(blob, fdt32_to_cpu(data->nameoff));
+ if (name)
+ puts(name);
+ prop = fdt_next_property_offset(blob, prop);
+ } while (1);
+}
+
+#define MAX_LEVEL 32 /* how deeply nested we will go */
+
+/**
+ * List all subnodes in a node, one per line
+ *
+ * @param blob FDT blob
+ * @param node Node to display
+ * @return 0 if ok, or FDT_ERR... if not.
+ */
+static int list_subnodes(const void *blob, int node)
+{
+ int nextoffset; /* next node offset from libfdt */
+ uint32_t tag; /* current tag */
+ int level = 0; /* keep track of nesting level */
+ const char *pathp;
+ int depth = 1; /* the assumed depth of this node */
+
+ while (level >= 0) {
+ tag = fdt_next_tag(blob, node, &nextoffset);
+ switch (tag) {
+ case FDT_BEGIN_NODE:
+ pathp = fdt_get_name(blob, node, NULL);
+ if (level <= depth) {
+ if (pathp == NULL)
+ pathp = "/* NULL pointer error */";
+ if (*pathp == '\0')
+ pathp = "/"; /* root is nameless */
+ if (level == 1)
+ puts(pathp);
+ }
+ level++;
+ if (level >= MAX_LEVEL) {
+ printf("Nested too deep, aborting.\n");
+ return 1;
+ }
+ break;
+ case FDT_END_NODE:
+ level--;
+ if (level == 0)
+ level = -1; /* exit the loop */
+ break;
+ case FDT_END:
+ return 1;
+ case FDT_PROP:
+ break;
+ default:
+ if (level <= depth)
+ printf("Unknown tag 0x%08X\n", tag);
+ return 1;
+ }
+ node = nextoffset;
+ }
+ return 0;
+}
+
+/**
+ * Show the data for a given node (and perhaps property) according to the
+ * display option provided.
+ *
+ * @param blob FDT blob
+ * @param disp Display information / options
+ * @param node Node to display
+ * @param property Name of property to display, or NULL if none
+ * @return 0 if ok, -ve on error
+ */
+static int show_data_for_item(const void *blob, struct display_info *disp,
+ int node, const char *property)
+{
+ const void *value = NULL;
+ int len, err = 0;
+
+ switch (disp->mode) {
+ case MODE_LIST_PROPS:
+ err = list_properties(blob, node);
+ break;
+
+ case MODE_LIST_SUBNODES:
+ err = list_subnodes(blob, node);
+ break;
+
+ default:
+ assert(property);
+ value = fdt_getprop(blob, node, property, &len);
+ if (value) {
+ if (show_data(disp, value, len))
+ err = -1;
+ else
+ printf("\n");
+ } else if (disp->default_val) {
+ puts(disp->default_val);
+ } else {
+ report_error(property, len);
+ err = -1;
+ }
+ break;
+ }
+
+ return err;
+}
+
+/**
+ * Run the main fdtget operation, given a filename and valid arguments
+ *
+ * @param disp Display information / options
+ * @param filename Filename of blob file
+ * @param arg List of arguments to process
+ * @param arg_count Number of arguments
+ * @param return 0 if ok, -ve on error
+ */
+static int do_fdtget(struct display_info *disp, const char *filename,
+ char **arg, int arg_count, int args_per_step)
+{
+ char *blob;
+ const char *prop;
+ int i, node;
+
+ blob = utilfdt_read(filename);
+ if (!blob)
+ return -1;
+
+ for (i = 0; i + args_per_step <= arg_count; i += args_per_step) {
+ node = fdt_path_offset(blob, arg[i]);
+ if (node < 0) {
+ if (disp->default_val) {
+ puts(disp->default_val);
+ continue;
+ } else {
+ report_error(arg[i], node);
+ return -1;
+ }
+ }
+ prop = args_per_step == 1 ? NULL : arg[i + 1];
+
+ if (show_data_for_item(blob, disp, node, prop))
+ return -1;
+ }
+ return 0;
+}
+
+static const char *usage_msg =
+ "fdtget - read values from device tree\n"
+ "\n"
+ "Each value is printed on a new line.\n\n"
+ "Usage:\n"
+ " fdtget <options> <dt file> [<node> <property>]...\n"
+ " fdtget -p <options> <dt file> [<node> ]...\n"
+ "Options:\n"
+ "\t-t <type>\tType of data\n"
+ "\t-p\t\tList properties for each node\n"
+ "\t-l\t\tList subnodes for each node\n"
+ "\t-d\t\tDefault value to display when the property is "
+ "missing\n"
+ "\t-h\t\tPrint this help\n\n"
+ USAGE_TYPE_MSG;
+
+static void usage(const char *msg)
+{
+ if (msg)
+ fprintf(stderr, "Error: %s\n\n", msg);
+
+ fprintf(stderr, "%s", usage_msg);
+ exit(2);
+}
+
+int main(int argc, char *argv[])
+{
+ char *filename = NULL;
+ struct display_info disp;
+ int args_per_step = 2;
+
+ /* set defaults */
+ memset(&disp, '\0', sizeof(disp));
+ disp.size = -1;
+ disp.mode = MODE_SHOW_VALUE;
+ for (;;) {
+ int c = getopt(argc, argv, "d:hlpt:");
+ if (c == -1)
+ break;
+
+ switch (c) {
+ case 'h':
+ case '?':
+ usage(NULL);
+
+ case 't':
+ if (utilfdt_decode_type(optarg, &disp.type,
+ &disp.size))
+ usage("Invalid type string");
+ break;
+
+ case 'p':
+ disp.mode = MODE_LIST_PROPS;
+ args_per_step = 1;
+ break;
+
+ case 'l':
+ disp.mode = MODE_LIST_SUBNODES;
+ args_per_step = 1;
+ break;
+
+ case 'd':
+ disp.default_val = optarg;
+ break;
+ }
+ }
+
+ if (optind < argc)
+ filename = argv[optind++];
+ if (!filename)
+ usage("Missing filename");
+
+ argv += optind;
+ argc -= optind;
+
+ /* Allow no arguments, and silently succeed */
+ if (!argc)
+ return 0;
+
+ /* Check for node, property arguments */
+ if (args_per_step == 2 && (argc % 2))
+ usage("Must have an even number of arguments");
+
+ if (do_fdtget(&disp, filename, argv, argc, args_per_step))
+ return 1;
+ return 0;
+}
diff --git a/scripts/dtc/fdtput.c b/scripts/dtc/fdtput.c
new file mode 100644
index 0000000..f2197f5
--- /dev/null
+++ b/scripts/dtc/fdtput.c
@@ -0,0 +1,362 @@
+/*
+ * Copyright (c) 2011 The Chromium OS Authors. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <assert.h>
+#include <ctype.h>
+#include <getopt.h>
+#include <stdio.h>
+#include <stdlib.h>
+#include <string.h>
+
+#include <libfdt.h>
+
+#include "util.h"
+
+/* These are the operations we support */
+enum oper_type {
+ OPER_WRITE_PROP, /* Write a property in a node */
+ OPER_CREATE_NODE, /* Create a new node */
+};
+
+struct display_info {
+ enum oper_type oper; /* operation to perform */
+ int type; /* data type (s/i/u/x or 0 for default) */
+ int size; /* data size (1/2/4) */
+ int verbose; /* verbose output */
+ int auto_path; /* automatically create all path components */
+};
+
+
+/**
+ * Report an error with a particular node.
+ *
+ * @param name Node name to report error on
+ * @param namelen Length of node name, or -1 to use entire string
+ * @param err Error number to report (-FDT_ERR_...)
+ */
+static void report_error(const char *name, int namelen, int err)
+{
+ if (namelen == -1)
+ namelen = strlen(name);
+ fprintf(stderr, "Error at '%1.*s': %s\n", namelen, name,
+ fdt_strerror(err));
+}
+
+/**
+ * Encode a series of arguments in a property value.
+ *
+ * @param disp Display information / options
+ * @param arg List of arguments from command line
+ * @param arg_count Number of arguments (may be 0)
+ * @param valuep Returns buffer containing value
+ * @param *value_len Returns length of value encoded
+ */
+static int encode_value(struct display_info *disp, char **arg, int arg_count,
+ char **valuep, int *value_len)
+{
+ char *value = NULL; /* holding area for value */
+ int value_size = 0; /* size of holding area */
+ char *ptr; /* pointer to current value position */
+ int len; /* length of this cell/string/byte */
+ int ival;
+ int upto; /* the number of bytes we have written to buf */
+ char fmt[3];
+
+ upto = 0;
+
+ if (disp->verbose)
+ fprintf(stderr, "Decoding value:\n");
+
+ fmt[0] = '%';
+ fmt[1] = disp->type ? disp->type : 'd';
+ fmt[2] = '\0';
+ for (; arg_count > 0; arg++, arg_count--, upto += len) {
+ /* assume integer unless told otherwise */
+ if (disp->type == 's')
+ len = strlen(*arg) + 1;
+ else
+ len = disp->size == -1 ? 4 : disp->size;
+
+ /* enlarge our value buffer by a suitable margin if needed */
+ if (upto + len > value_size) {
+ value_size = (upto + len) + 500;
+ value = realloc(value, value_size);
+ if (!value) {
+ fprintf(stderr, "Out of mmory: cannot alloc "
+ "%d bytes\n", value_size);
+ return -1;
+ }
+ }
+
+ ptr = value + upto;
+ if (disp->type == 's') {
+ memcpy(ptr, *arg, len);
+ if (disp->verbose)
+ fprintf(stderr, "\tstring: '%s'\n", ptr);
+ } else {
+ int *iptr = (int *)ptr;
+ sscanf(*arg, fmt, &ival);
+ if (len == 4)
+ *iptr = cpu_to_fdt32(ival);
+ else
+ *ptr = (uint8_t)ival;
+ if (disp->verbose) {
+ fprintf(stderr, "\t%s: %d\n",
+ disp->size == 1 ? "byte" :
+ disp->size == 2 ? "short" : "int",
+ ival);
+ }
+ }
+ }
+ *value_len = upto;
+ *valuep = value;
+ if (disp->verbose)
+ fprintf(stderr, "Value size %d\n", upto);
+ return 0;
+}
+
+static int store_key_value(void *blob, const char *node_name,
+ const char *property, const char *buf, int len)
+{
+ int node;
+ int err;
+
+ node = fdt_path_offset(blob, node_name);
+ if (node < 0) {
+ report_error(node_name, -1, node);
+ return -1;
+ }
+
+ err = fdt_setprop(blob, node, property, buf, len);
+ if (err) {
+ report_error(property, -1, err);
+ return -1;
+ }
+ return 0;
+}
+
+/**
+ * Create paths as needed for all components of a path
+ *
+ * Any components of the path that do not exist are created. Errors are
+ * reported.
+ *
+ * @param blob FDT blob to write into
+ * @param in_path Path to process
+ * @return 0 if ok, -1 on error
+ */
+static int create_paths(void *blob, const char *in_path)
+{
+ const char *path = in_path;
+ const char *sep;
+ int node, offset = 0;
+
+ /* skip leading '/' */
+ while (*path == '/')
+ path++;
+
+ for (sep = path; *sep; path = sep + 1, offset = node) {
+ /* equivalent to strchrnul(), but it requires _GNU_SOURCE */
+ sep = strchr(path, '/');
+ if (!sep)
+ sep = path + strlen(path);
+
+ node = fdt_subnode_offset_namelen(blob, offset, path,
+ sep - path);
+ if (node == -FDT_ERR_NOTFOUND) {
+ node = fdt_add_subnode_namelen(blob, offset, path,
+ sep - path);
+ }
+ if (node < 0) {
+ report_error(path, sep - path, node);
+ return -1;
+ }
+ }
+
+ return 0;
+}
+
+/**
+ * Create a new node in the fdt.
+ *
+ * This will overwrite the node_name string. Any error is reported.
+ *
+ * TODO: Perhaps create fdt_path_offset_namelen() so we don't need to do this.
+ *
+ * @param blob FDT blob to write into
+ * @param node_name Name of node to create
+ * @return new node offset if found, or -1 on failure
+ */
+static int create_node(void *blob, const char *node_name)
+{
+ int node = 0;
+ char *p;
+
+ p = strrchr(node_name, '/');
+ if (!p) {
+ report_error(node_name, -1, -FDT_ERR_BADPATH);
+ return -1;
+ }
+ *p = '\0';
+
+ if (p > node_name) {
+ node = fdt_path_offset(blob, node_name);
+ if (node < 0) {
+ report_error(node_name, -1, node);
+ return -1;
+ }
+ }
+
+ node = fdt_add_subnode(blob, node, p + 1);
+ if (node < 0) {
+ report_error(p + 1, -1, node);
+ return -1;
+ }
+
+ return 0;
+}
+
+static int do_fdtput(struct display_info *disp, const char *filename,
+ char **arg, int arg_count)
+{
+ char *value;
+ char *blob;
+ int len, ret = 0;
+
+ blob = utilfdt_read(filename);
+ if (!blob)
+ return -1;
+
+ switch (disp->oper) {
+ case OPER_WRITE_PROP:
+ /*
+ * Convert the arguments into a single binary value, then
+ * store them into the property.
+ */
+ assert(arg_count >= 2);
+ if (disp->auto_path && create_paths(blob, *arg))
+ return -1;
+ if (encode_value(disp, arg + 2, arg_count - 2, &value, &len) ||
+ store_key_value(blob, *arg, arg[1], value, len))
+ ret = -1;
+ break;
+ case OPER_CREATE_NODE:
+ for (; ret >= 0 && arg_count--; arg++) {
+ if (disp->auto_path)
+ ret = create_paths(blob, *arg);
+ else
+ ret = create_node(blob, *arg);
+ }
+ break;
+ }
+ if (ret >= 0)
+ ret = utilfdt_write(filename, blob);
+
+ free(blob);
+ return ret;
+}
+
+static const char *usage_msg =
+ "fdtput - write a property value to a device tree\n"
+ "\n"
+ "The command line arguments are joined together into a single value.\n"
+ "\n"
+ "Usage:\n"
+ " fdtput <options> <dt file> <node> <property> [<value>...]\n"
+ " fdtput -c <options> <dt file> [<node>...]\n"
+ "Options:\n"
+ "\t-c\t\tCreate nodes if they don't already exist\n"
+ "\t-p\t\tAutomatically create nodes as needed for the node path\n"
+ "\t-t <type>\tType of data\n"
+ "\t-v\t\tVerbose: display each value decoded from command line\n"
+ "\t-h\t\tPrint this help\n\n"
+ USAGE_TYPE_MSG;
+
+static void usage(const char *msg)
+{
+ if (msg)
+ fprintf(stderr, "Error: %s\n\n", msg);
+
+ fprintf(stderr, "%s", usage_msg);
+ exit(2);
+}
+
+int main(int argc, char *argv[])
+{
+ struct display_info disp;
+ char *filename = NULL;
+
+ memset(&disp, '\0', sizeof(disp));
+ disp.size = -1;
+ disp.oper = OPER_WRITE_PROP;
+ for (;;) {
+ int c = getopt(argc, argv, "chpt:v");
+ if (c == -1)
+ break;
+
+ /*
+ * TODO: add options to:
+ * - delete property
+ * - delete node (optionally recursively)
+ * - rename node
+ * - pack fdt before writing
+ * - set amount of free space when writing
+ * - expand fdt if value doesn't fit
+ */
+ switch (c) {
+ case 'c':
+ disp.oper = OPER_CREATE_NODE;
+ break;
+ case 'h':
+ case '?':
+ usage(NULL);
+ case 'p':
+ disp.auto_path = 1;
+ break;
+ case 't':
+ if (utilfdt_decode_type(optarg, &disp.type,
+ &disp.size))
+ usage("Invalid type string");
+ break;
+
+ case 'v':
+ disp.verbose = 1;
+ break;
+ }
+ }
+
+ if (optind < argc)
+ filename = argv[optind++];
+ if (!filename)
+ usage("Missing filename");
+
+ argv += optind;
+ argc -= optind;
+
+ if (disp.oper == OPER_WRITE_PROP) {
+ if (argc < 1)
+ usage("Missing node");
+ if (argc < 2)
+ usage("Missing property");
+ }
+
+ if (do_fdtput(&disp, filename, argv, argc))
+ return 1;
+ return 0;
+}
diff --git a/scripts/dtc/flattree.c b/scripts/dtc/flattree.c
index 28d0b23..665dad7 100644
--- a/scripts/dtc/flattree.c
+++ b/scripts/dtc/flattree.c
@@ -263,6 +263,9 @@
struct node *child;
int seen_name_prop = 0;
+ if (tree->deleted)
+ return;
+
emit->beginnode(etarget, tree->labels);
if (vi->flags & FTF_FULLPATH)
diff --git a/scripts/dtc/libfdt/Makefile.libfdt b/scripts/dtc/libfdt/Makefile.libfdt
index 6c42acf..91126c0 100644
--- a/scripts/dtc/libfdt/Makefile.libfdt
+++ b/scripts/dtc/libfdt/Makefile.libfdt
@@ -3,6 +3,8 @@
# This is not a complete Makefile of itself. Instead, it is designed to
# be easily embeddable into other systems of Makefiles.
#
-LIBFDT_INCLUDES = fdt.h libfdt.h
-LIBFDT_SRCS = fdt.c fdt_ro.c fdt_wip.c fdt_sw.c fdt_rw.c fdt_strerror.c
+LIBFDT_soname = libfdt.$(SHAREDLIB_EXT).1
+LIBFDT_INCLUDES = fdt.h libfdt.h libfdt_env.h
+LIBFDT_VERSION = version.lds
+LIBFDT_SRCS = fdt.c fdt_ro.c fdt_wip.c fdt_sw.c fdt_rw.c fdt_strerror.c fdt_empty_tree.c
LIBFDT_OBJS = $(LIBFDT_SRCS:%.c=%.o)
diff --git a/scripts/dtc/libfdt/fdt.c b/scripts/dtc/libfdt/fdt.c
index 2acaec5..e56833a 100644
--- a/scripts/dtc/libfdt/fdt.c
+++ b/scripts/dtc/libfdt/fdt.c
@@ -74,7 +74,7 @@
return 0;
}
-const void *fdt_offset_ptr(const void *fdt, int offset, int len)
+const void *fdt_offset_ptr(const void *fdt, int offset, unsigned int len)
{
const char *p;
@@ -90,42 +90,53 @@
return p;
}
-uint32_t fdt_next_tag(const void *fdt, int offset, int *nextoffset)
+uint32_t fdt_next_tag(const void *fdt, int startoffset, int *nextoffset)
{
const uint32_t *tagp, *lenp;
uint32_t tag;
+ int offset = startoffset;
const char *p;
- if (offset % FDT_TAGSIZE)
- return -1;
-
+ *nextoffset = -FDT_ERR_TRUNCATED;
tagp = fdt_offset_ptr(fdt, offset, FDT_TAGSIZE);
- if (! tagp)
+ if (!tagp)
return FDT_END; /* premature end */
tag = fdt32_to_cpu(*tagp);
offset += FDT_TAGSIZE;
+ *nextoffset = -FDT_ERR_BADSTRUCTURE;
switch (tag) {
case FDT_BEGIN_NODE:
/* skip name */
do {
p = fdt_offset_ptr(fdt, offset++, 1);
} while (p && (*p != '\0'));
- if (! p)
- return FDT_END;
+ if (!p)
+ return FDT_END; /* premature end */
break;
+
case FDT_PROP:
lenp = fdt_offset_ptr(fdt, offset, sizeof(*lenp));
- if (! lenp)
- return FDT_END;
- /* skip name offset, length and value */
- offset += 2*FDT_TAGSIZE + fdt32_to_cpu(*lenp);
+ if (!lenp)
+ return FDT_END; /* premature end */
+ /* skip-name offset, length and value */
+ offset += sizeof(struct fdt_property) - FDT_TAGSIZE
+ + fdt32_to_cpu(*lenp);
break;
+
+ case FDT_END:
+ case FDT_END_NODE:
+ case FDT_NOP:
+ break;
+
+ default:
+ return FDT_END;
}
- if (nextoffset)
- *nextoffset = FDT_TAGALIGN(offset);
+ if (!fdt_offset_ptr(fdt, startoffset, offset - startoffset))
+ return FDT_END; /* premature end */
+ *nextoffset = FDT_TAGALIGN(offset);
return tag;
}
@@ -138,6 +149,15 @@
return offset;
}
+int _fdt_check_prop_offset(const void *fdt, int offset)
+{
+ if ((offset < 0) || (offset % FDT_TAGSIZE)
+ || (fdt_next_tag(fdt, offset, &offset) != FDT_PROP))
+ return -FDT_ERR_BADOFFSET;
+
+ return offset;
+}
+
int fdt_next_node(const void *fdt, int offset, int *depth)
{
int nextoffset = 0;
@@ -162,15 +182,16 @@
break;
case FDT_END_NODE:
- if (depth)
- (*depth)--;
+ if (depth && ((--(*depth)) < 0))
+ return nextoffset;
break;
case FDT_END:
- return -FDT_ERR_NOTFOUND;
-
- default:
- return -FDT_ERR_BADSTRUCTURE;
+ if ((nextoffset >= 0)
+ || ((nextoffset == -FDT_ERR_TRUNCATED) && !depth))
+ return -FDT_ERR_NOTFOUND;
+ else
+ return nextoffset;
}
} while (tag != FDT_BEGIN_NODE);
diff --git a/scripts/dtc/libfdt/fdt_empty_tree.c b/scripts/dtc/libfdt/fdt_empty_tree.c
new file mode 100644
index 0000000..f72d13b
--- /dev/null
+++ b/scripts/dtc/libfdt/fdt_empty_tree.c
@@ -0,0 +1,84 @@
+/*
+ * libfdt - Flat Device Tree manipulation
+ * Copyright (C) 2012 David Gibson, IBM Corporation.
+ *
+ * libfdt is dual licensed: you can use it either under the terms of
+ * the GPL, or the BSD license, at your option.
+ *
+ * a) This library is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of the
+ * License, or (at your option) any later version.
+ *
+ * This library is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public
+ * License along with this library; if not, write to the Free
+ * Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,
+ * MA 02110-1301 USA
+ *
+ * Alternatively,
+ *
+ * b) Redistribution and use in source and binary forms, with or
+ * without modification, are permitted provided that the following
+ * conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above
+ * copyright notice, this list of conditions and the following
+ * disclaimer.
+ * 2. Redistributions in binary form must reproduce the above
+ * copyright notice, this list of conditions and the following
+ * disclaimer in the documentation and/or other materials
+ * provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND
+ * CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
+ * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
+ * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
+ * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+#include "libfdt_env.h"
+
+#include <fdt.h>
+#include <libfdt.h>
+
+#include "libfdt_internal.h"
+
+int fdt_create_empty_tree(void *buf, int bufsize)
+{
+ int err;
+
+ err = fdt_create(buf, bufsize);
+ if (err)
+ return err;
+
+ err = fdt_finish_reservemap(buf);
+ if (err)
+ return err;
+
+ err = fdt_begin_node(buf, "");
+ if (err)
+ return err;
+
+ err = fdt_end_node(buf);
+ if (err)
+ return err;
+
+ err = fdt_finish(buf);
+ if (err)
+ return err;
+
+ return fdt_open_into(buf, buf, bufsize);
+}
+
diff --git a/scripts/dtc/libfdt/fdt_ro.c b/scripts/dtc/libfdt/fdt_ro.c
index 22e6929..02b6d68 100644
--- a/scripts/dtc/libfdt/fdt_ro.c
+++ b/scripts/dtc/libfdt/fdt_ro.c
@@ -80,6 +80,14 @@
return (const char *)fdt + fdt_off_dt_strings(fdt) + stroffset;
}
+static int _fdt_string_eq(const void *fdt, int stroffset,
+ const char *s, int len)
+{
+ const char *p = fdt_string(fdt, stroffset);
+
+ return (strlen(p) == len) && (memcmp(p, s, len) == 0);
+}
+
int fdt_get_mem_rsv(const void *fdt, int n, uint64_t *address, uint64_t *size)
{
FDT_CHECK_HEADER(fdt);
@@ -97,6 +105,30 @@
return i;
}
+static int _nextprop(const void *fdt, int offset)
+{
+ uint32_t tag;
+ int nextoffset;
+
+ do {
+ tag = fdt_next_tag(fdt, offset, &nextoffset);
+
+ switch (tag) {
+ case FDT_END:
+ if (nextoffset >= 0)
+ return -FDT_ERR_BADSTRUCTURE;
+ else
+ return nextoffset;
+
+ case FDT_PROP:
+ return offset;
+ }
+ offset = nextoffset;
+ } while (tag == FDT_NOP);
+
+ return -FDT_ERR_NOTFOUND;
+}
+
int fdt_subnode_offset_namelen(const void *fdt, int offset,
const char *name, int namelen)
{
@@ -104,20 +136,16 @@
FDT_CHECK_HEADER(fdt);
- for (depth = 0, offset = fdt_next_node(fdt, offset, &depth);
- (offset >= 0) && (depth > 0);
- offset = fdt_next_node(fdt, offset, &depth)) {
- if (depth < 0)
- return -FDT_ERR_NOTFOUND;
- else if ((depth == 1)
- && _fdt_nodename_eq(fdt, offset, name, namelen))
+ for (depth = 0;
+ (offset >= 0) && (depth >= 0);
+ offset = fdt_next_node(fdt, offset, &depth))
+ if ((depth == 1)
+ && _fdt_nodename_eq(fdt, offset, name, namelen))
return offset;
- }
- if (offset < 0)
- return offset; /* error */
- else
+ if (depth < 0)
return -FDT_ERR_NOTFOUND;
+ return offset; /* error */
}
int fdt_subnode_offset(const void *fdt, int parentoffset,
@@ -134,8 +162,20 @@
FDT_CHECK_HEADER(fdt);
- if (*path != '/')
- return -FDT_ERR_BADPATH;
+ /* see if we have an alias */
+ if (*path != '/') {
+ const char *q = strchr(path, '/');
+
+ if (!q)
+ q = end;
+
+ p = fdt_get_alias_namelen(fdt, p, q - p);
+ if (!p)
+ return -FDT_ERR_BADPATH;
+ offset = fdt_path_offset(fdt, p);
+
+ p = q;
+ }
while (*p) {
const char *q;
@@ -178,93 +218,142 @@
return NULL;
}
+int fdt_first_property_offset(const void *fdt, int nodeoffset)
+{
+ int offset;
+
+ if ((offset = _fdt_check_node_offset(fdt, nodeoffset)) < 0)
+ return offset;
+
+ return _nextprop(fdt, offset);
+}
+
+int fdt_next_property_offset(const void *fdt, int offset)
+{
+ if ((offset = _fdt_check_prop_offset(fdt, offset)) < 0)
+ return offset;
+
+ return _nextprop(fdt, offset);
+}
+
+const struct fdt_property *fdt_get_property_by_offset(const void *fdt,
+ int offset,
+ int *lenp)
+{
+ int err;
+ const struct fdt_property *prop;
+
+ if ((err = _fdt_check_prop_offset(fdt, offset)) < 0) {
+ if (lenp)
+ *lenp = err;
+ return NULL;
+ }
+
+ prop = _fdt_offset_ptr(fdt, offset);
+
+ if (lenp)
+ *lenp = fdt32_to_cpu(prop->len);
+
+ return prop;
+}
+
+const struct fdt_property *fdt_get_property_namelen(const void *fdt,
+ int offset,
+ const char *name,
+ int namelen, int *lenp)
+{
+ for (offset = fdt_first_property_offset(fdt, offset);
+ (offset >= 0);
+ (offset = fdt_next_property_offset(fdt, offset))) {
+ const struct fdt_property *prop;
+
+ if (!(prop = fdt_get_property_by_offset(fdt, offset, lenp))) {
+ offset = -FDT_ERR_INTERNAL;
+ break;
+ }
+ if (_fdt_string_eq(fdt, fdt32_to_cpu(prop->nameoff),
+ name, namelen))
+ return prop;
+ }
+
+ if (lenp)
+ *lenp = offset;
+ return NULL;
+}
+
const struct fdt_property *fdt_get_property(const void *fdt,
int nodeoffset,
const char *name, int *lenp)
{
- uint32_t tag;
- const struct fdt_property *prop;
- int namestroff;
- int offset, nextoffset;
- int err;
-
- if (((err = fdt_check_header(fdt)) != 0)
- || ((err = _fdt_check_node_offset(fdt, nodeoffset)) < 0))
- goto fail;
-
- nextoffset = err;
- do {
- offset = nextoffset;
-
- tag = fdt_next_tag(fdt, offset, &nextoffset);
- switch (tag) {
- case FDT_END:
- err = -FDT_ERR_TRUNCATED;
- goto fail;
-
- case FDT_BEGIN_NODE:
- case FDT_END_NODE:
- case FDT_NOP:
- break;
-
- case FDT_PROP:
- err = -FDT_ERR_BADSTRUCTURE;
- prop = fdt_offset_ptr(fdt, offset, sizeof(*prop));
- if (! prop)
- goto fail;
- namestroff = fdt32_to_cpu(prop->nameoff);
- if (strcmp(fdt_string(fdt, namestroff), name) == 0) {
- /* Found it! */
- int len = fdt32_to_cpu(prop->len);
- prop = fdt_offset_ptr(fdt, offset,
- sizeof(*prop)+len);
- if (! prop)
- goto fail;
-
- if (lenp)
- *lenp = len;
-
- return prop;
- }
- break;
-
- default:
- err = -FDT_ERR_BADSTRUCTURE;
- goto fail;
- }
- } while ((tag != FDT_BEGIN_NODE) && (tag != FDT_END_NODE));
-
- err = -FDT_ERR_NOTFOUND;
- fail:
- if (lenp)
- *lenp = err;
- return NULL;
+ return fdt_get_property_namelen(fdt, nodeoffset, name,
+ strlen(name), lenp);
}
-const void *fdt_getprop(const void *fdt, int nodeoffset,
- const char *name, int *lenp)
+const void *fdt_getprop_namelen(const void *fdt, int nodeoffset,
+ const char *name, int namelen, int *lenp)
{
const struct fdt_property *prop;
- prop = fdt_get_property(fdt, nodeoffset, name, lenp);
+ prop = fdt_get_property_namelen(fdt, nodeoffset, name, namelen, lenp);
if (! prop)
return NULL;
return prop->data;
}
+const void *fdt_getprop_by_offset(const void *fdt, int offset,
+ const char **namep, int *lenp)
+{
+ const struct fdt_property *prop;
+
+ prop = fdt_get_property_by_offset(fdt, offset, lenp);
+ if (!prop)
+ return NULL;
+ if (namep)
+ *namep = fdt_string(fdt, fdt32_to_cpu(prop->nameoff));
+ return prop->data;
+}
+
+const void *fdt_getprop(const void *fdt, int nodeoffset,
+ const char *name, int *lenp)
+{
+ return fdt_getprop_namelen(fdt, nodeoffset, name, strlen(name), lenp);
+}
+
uint32_t fdt_get_phandle(const void *fdt, int nodeoffset)
{
const uint32_t *php;
int len;
- php = fdt_getprop(fdt, nodeoffset, "linux,phandle", &len);
- if (!php || (len != sizeof(*php)))
- return 0;
+ /* FIXME: This is a bit sub-optimal, since we potentially scan
+ * over all the properties twice. */
+ php = fdt_getprop(fdt, nodeoffset, "phandle", &len);
+ if (!php || (len != sizeof(*php))) {
+ php = fdt_getprop(fdt, nodeoffset, "linux,phandle", &len);
+ if (!php || (len != sizeof(*php)))
+ return 0;
+ }
return fdt32_to_cpu(*php);
}
+const char *fdt_get_alias_namelen(const void *fdt,
+ const char *name, int namelen)
+{
+ int aliasoffset;
+
+ aliasoffset = fdt_path_offset(fdt, "/aliases");
+ if (aliasoffset < 0)
+ return NULL;
+
+ return fdt_getprop_namelen(fdt, aliasoffset, name, namelen, NULL);
+}
+
+const char *fdt_get_alias(const void *fdt, const char *name)
+{
+ return fdt_get_alias_namelen(fdt, name, strlen(name));
+}
+
int fdt_get_path(const void *fdt, int nodeoffset, char *buf, int buflen)
{
int pdepth = 0, p = 0;
@@ -279,9 +368,6 @@
for (offset = 0, depth = 0;
(offset >= 0) && (offset <= nodeoffset);
offset = fdt_next_node(fdt, offset, &depth)) {
- if (pdepth < depth)
- continue; /* overflowed buffer */
-
while (pdepth > depth) {
do {
p--;
@@ -289,14 +375,16 @@
pdepth--;
}
- name = fdt_get_name(fdt, offset, &namelen);
- if (!name)
- return namelen;
- if ((p + namelen + 1) <= buflen) {
- memcpy(buf + p, name, namelen);
- p += namelen;
- buf[p++] = '/';
- pdepth++;
+ if (pdepth >= depth) {
+ name = fdt_get_name(fdt, offset, &namelen);
+ if (!name)
+ return namelen;
+ if ((p + namelen + 1) <= buflen) {
+ memcpy(buf + p, name, namelen);
+ p += namelen;
+ buf[p++] = '/';
+ pdepth++;
+ }
}
if (offset == nodeoffset) {
@@ -306,7 +394,7 @@
if (p > 1) /* special case so that root path is "/", not "" */
p--;
buf[p] = '\0';
- return p;
+ return 0;
}
}
@@ -404,14 +492,31 @@
int fdt_node_offset_by_phandle(const void *fdt, uint32_t phandle)
{
+ int offset;
+
if ((phandle == 0) || (phandle == -1))
return -FDT_ERR_BADPHANDLE;
- phandle = cpu_to_fdt32(phandle);
- return fdt_node_offset_by_prop_value(fdt, -1, "linux,phandle",
- &phandle, sizeof(phandle));
+
+ FDT_CHECK_HEADER(fdt);
+
+ /* FIXME: The algorithm here is pretty horrible: we
+ * potentially scan each property of a node in
+ * fdt_get_phandle(), then if that didn't find what
+ * we want, we scan over them again making our way to the next
+ * node. Still it's the easiest to implement approach;
+ * performance can come later. */
+ for (offset = fdt_next_node(fdt, -1, NULL);
+ offset >= 0;
+ offset = fdt_next_node(fdt, offset, NULL)) {
+ if (fdt_get_phandle(fdt, offset) == phandle)
+ return offset;
+ }
+
+ return offset; /* error from fdt_next_node() */
}
-static int _stringlist_contains(const char *strlist, int listlen, const char *str)
+static int _fdt_stringlist_contains(const char *strlist, int listlen,
+ const char *str)
{
int len = strlen(str);
const char *p;
@@ -437,7 +542,7 @@
prop = fdt_getprop(fdt, nodeoffset, "compatible", &len);
if (!prop)
return len;
- if (_stringlist_contains(prop, len, compatible))
+ if (_fdt_stringlist_contains(prop, len, compatible))
return 0;
else
return 1;
diff --git a/scripts/dtc/libfdt/fdt_rw.c b/scripts/dtc/libfdt/fdt_rw.c
index 8e7ec4c..24437df 100644
--- a/scripts/dtc/libfdt/fdt_rw.c
+++ b/scripts/dtc/libfdt/fdt_rw.c
@@ -289,6 +289,33 @@
return 0;
}
+int fdt_appendprop(void *fdt, int nodeoffset, const char *name,
+ const void *val, int len)
+{
+ struct fdt_property *prop;
+ int err, oldlen, newlen;
+
+ FDT_RW_CHECK_HEADER(fdt);
+
+ prop = fdt_get_property_w(fdt, nodeoffset, name, &oldlen);
+ if (prop) {
+ newlen = len + oldlen;
+ err = _fdt_splice_struct(fdt, prop->data,
+ FDT_TAGALIGN(oldlen),
+ FDT_TAGALIGN(newlen));
+ if (err)
+ return err;
+ prop->len = cpu_to_fdt32(newlen);
+ memcpy(prop->data + oldlen, val, len);
+ } else {
+ err = _fdt_add_property(fdt, nodeoffset, name, len, &prop);
+ if (err)
+ return err;
+ memcpy(prop->data, val, len);
+ }
+ return 0;
+}
+
int fdt_delprop(void *fdt, int nodeoffset, const char *name)
{
struct fdt_property *prop;
@@ -406,6 +433,8 @@
struct_size = 0;
while (fdt_next_tag(fdt, struct_size, &struct_size) != FDT_END)
;
+ if (struct_size < 0)
+ return struct_size;
}
if (!_fdt_blocks_misordered(fdt, mem_rsv_size, struct_size)) {
diff --git a/scripts/dtc/libfdt/fdt_sw.c b/scripts/dtc/libfdt/fdt_sw.c
index 698329e..55ebebf 100644
--- a/scripts/dtc/libfdt/fdt_sw.c
+++ b/scripts/dtc/libfdt/fdt_sw.c
@@ -70,7 +70,7 @@
return err; \
}
-static void *_fdt_grab_space(void *fdt, int len)
+static void *_fdt_grab_space(void *fdt, size_t len)
{
int offset = fdt_size_dt_struct(fdt);
int spaceleft;
@@ -82,7 +82,7 @@
return NULL;
fdt_set_size_dt_struct(fdt, offset + len);
- return fdt_offset_ptr_w(fdt, offset, len);
+ return _fdt_offset_ptr_w(fdt, offset);
}
int fdt_create(void *buf, int bufsize)
@@ -237,18 +237,17 @@
while ((tag = fdt_next_tag(fdt, offset, &nextoffset)) != FDT_END) {
if (tag == FDT_PROP) {
struct fdt_property *prop =
- fdt_offset_ptr_w(fdt, offset, sizeof(*prop));
+ _fdt_offset_ptr_w(fdt, offset);
int nameoff;
- if (! prop)
- return -FDT_ERR_BADSTRUCTURE;
-
nameoff = fdt32_to_cpu(prop->nameoff);
nameoff += fdt_size_dt_strings(fdt);
prop->nameoff = cpu_to_fdt32(nameoff);
}
offset = nextoffset;
}
+ if (nextoffset < 0)
+ return nextoffset;
/* Finally, adjust the header */
fdt_set_totalsize(fdt, newstroffset + fdt_size_dt_strings(fdt));
diff --git a/scripts/dtc/libfdt/fdt_wip.c b/scripts/dtc/libfdt/fdt_wip.c
index a4652c6..6025fa1 100644
--- a/scripts/dtc/libfdt/fdt_wip.c
+++ b/scripts/dtc/libfdt/fdt_wip.c
@@ -94,41 +94,14 @@
return 0;
}
-int _fdt_node_end_offset(void *fdt, int nodeoffset)
+int _fdt_node_end_offset(void *fdt, int offset)
{
- int level = 0;
- uint32_t tag;
- int offset, nextoffset;
+ int depth = 0;
- tag = fdt_next_tag(fdt, nodeoffset, &nextoffset);
- if (tag != FDT_BEGIN_NODE)
- return -FDT_ERR_BADOFFSET;
- do {
- offset = nextoffset;
- tag = fdt_next_tag(fdt, offset, &nextoffset);
+ while ((offset >= 0) && (depth >= 0))
+ offset = fdt_next_node(fdt, offset, &depth);
- switch (tag) {
- case FDT_END:
- return offset;
-
- case FDT_BEGIN_NODE:
- level++;
- break;
-
- case FDT_END_NODE:
- level--;
- break;
-
- case FDT_PROP:
- case FDT_NOP:
- break;
-
- default:
- return -FDT_ERR_BADSTRUCTURE;
- }
- } while (level >= 0);
-
- return nextoffset;
+ return offset;
}
int fdt_nop_node(void *fdt, int nodeoffset)
diff --git a/scripts/dtc/libfdt/libfdt.h b/scripts/dtc/libfdt/libfdt.h
index ff6246f..73f4975 100644
--- a/scripts/dtc/libfdt/libfdt.h
+++ b/scripts/dtc/libfdt/libfdt.h
@@ -61,7 +61,7 @@
#define FDT_ERR_NOTFOUND 1
/* FDT_ERR_NOTFOUND: The requested node or property does not exist */
#define FDT_ERR_EXISTS 2
- /* FDT_ERR_EXISTS: Attempted to create a node or property which
+ /* FDT_ERR_EXISTS: Attemped to create a node or property which
* already exists */
#define FDT_ERR_NOSPACE 3
/* FDT_ERR_NOSPACE: Operation needed to expand the device
@@ -122,7 +122,7 @@
/* Low-level functions (you probably don't need these) */
/**********************************************************************/
-const void *fdt_offset_ptr(const void *fdt, int offset, int checklen);
+const void *fdt_offset_ptr(const void *fdt, int offset, unsigned int checklen);
static inline void *fdt_offset_ptr_w(void *fdt, int offset, int checklen)
{
return (void *)(uintptr_t)fdt_offset_ptr(fdt, offset, checklen);
@@ -156,7 +156,7 @@
#define __fdt_set_hdr(name) \
static inline void fdt_set_##name(void *fdt, uint32_t val) \
{ \
- struct fdt_header *fdth = fdt; \
+ struct fdt_header *fdth = (struct fdt_header*)fdt; \
fdth->name = cpu_to_fdt32(val); \
}
__fdt_set_hdr(magic);
@@ -343,6 +343,91 @@
const char *fdt_get_name(const void *fdt, int nodeoffset, int *lenp);
/**
+ * fdt_first_property_offset - find the offset of a node's first property
+ * @fdt: pointer to the device tree blob
+ * @nodeoffset: structure block offset of a node
+ *
+ * fdt_first_property_offset() finds the first property of the node at
+ * the given structure block offset.
+ *
+ * returns:
+ * structure block offset of the property (>=0), on success
+ * -FDT_ERR_NOTFOUND, if the requested node has no properties
+ * -FDT_ERR_BADOFFSET, if nodeoffset did not point to an FDT_BEGIN_NODE tag
+ * -FDT_ERR_BADMAGIC,
+ * -FDT_ERR_BADVERSION,
+ * -FDT_ERR_BADSTATE,
+ * -FDT_ERR_BADSTRUCTURE,
+ * -FDT_ERR_TRUNCATED, standard meanings.
+ */
+int fdt_first_property_offset(const void *fdt, int nodeoffset);
+
+/**
+ * fdt_next_property_offset - step through a node's properties
+ * @fdt: pointer to the device tree blob
+ * @offset: structure block offset of a property
+ *
+ * fdt_next_property_offset() finds the property immediately after the
+ * one at the given structure block offset. This will be a property
+ * of the same node as the given property.
+ *
+ * returns:
+ * structure block offset of the next property (>=0), on success
+ * -FDT_ERR_NOTFOUND, if the given property is the last in its node
+ * -FDT_ERR_BADOFFSET, if nodeoffset did not point to an FDT_PROP tag
+ * -FDT_ERR_BADMAGIC,
+ * -FDT_ERR_BADVERSION,
+ * -FDT_ERR_BADSTATE,
+ * -FDT_ERR_BADSTRUCTURE,
+ * -FDT_ERR_TRUNCATED, standard meanings.
+ */
+int fdt_next_property_offset(const void *fdt, int offset);
+
+/**
+ * fdt_get_property_by_offset - retrieve the property at a given offset
+ * @fdt: pointer to the device tree blob
+ * @offset: offset of the property to retrieve
+ * @lenp: pointer to an integer variable (will be overwritten) or NULL
+ *
+ * fdt_get_property_by_offset() retrieves a pointer to the
+ * fdt_property structure within the device tree blob at the given
+ * offset. If lenp is non-NULL, the length of the property value is
+ * also returned, in the integer pointed to by lenp.
+ *
+ * returns:
+ * pointer to the structure representing the property
+ * if lenp is non-NULL, *lenp contains the length of the property
+ * value (>=0)
+ * NULL, on error
+ * if lenp is non-NULL, *lenp contains an error code (<0):
+ * -FDT_ERR_BADOFFSET, nodeoffset did not point to FDT_PROP tag
+ * -FDT_ERR_BADMAGIC,
+ * -FDT_ERR_BADVERSION,
+ * -FDT_ERR_BADSTATE,
+ * -FDT_ERR_BADSTRUCTURE,
+ * -FDT_ERR_TRUNCATED, standard meanings
+ */
+const struct fdt_property *fdt_get_property_by_offset(const void *fdt,
+ int offset,
+ int *lenp);
+
+/**
+ * fdt_get_property_namelen - find a property based on substring
+ * @fdt: pointer to the device tree blob
+ * @nodeoffset: offset of the node whose property to find
+ * @name: name of the property to find
+ * @namelen: number of characters of name to consider
+ * @lenp: pointer to an integer variable (will be overwritten) or NULL
+ *
+ * Identical to fdt_get_property_namelen(), but only examine the first
+ * namelen characters of name for matching the property name.
+ */
+const struct fdt_property *fdt_get_property_namelen(const void *fdt,
+ int nodeoffset,
+ const char *name,
+ int namelen, int *lenp);
+
+/**
* fdt_get_property - find a given property in a given node
* @fdt: pointer to the device tree blob
* @nodeoffset: offset of the node whose property to find
@@ -380,6 +465,54 @@
}
/**
+ * fdt_getprop_by_offset - retrieve the value of a property at a given offset
+ * @fdt: pointer to the device tree blob
+ * @ffset: offset of the property to read
+ * @namep: pointer to a string variable (will be overwritten) or NULL
+ * @lenp: pointer to an integer variable (will be overwritten) or NULL
+ *
+ * fdt_getprop_by_offset() retrieves a pointer to the value of the
+ * property at structure block offset 'offset' (this will be a pointer
+ * to within the device blob itself, not a copy of the value). If
+ * lenp is non-NULL, the length of the property value is also
+ * returned, in the integer pointed to by lenp. If namep is non-NULL,
+ * the property's namne will also be returned in the char * pointed to
+ * by namep (this will be a pointer to within the device tree's string
+ * block, not a new copy of the name).
+ *
+ * returns:
+ * pointer to the property's value
+ * if lenp is non-NULL, *lenp contains the length of the property
+ * value (>=0)
+ * if namep is non-NULL *namep contiains a pointer to the property
+ * name.
+ * NULL, on error
+ * if lenp is non-NULL, *lenp contains an error code (<0):
+ * -FDT_ERR_BADOFFSET, nodeoffset did not point to FDT_PROP tag
+ * -FDT_ERR_BADMAGIC,
+ * -FDT_ERR_BADVERSION,
+ * -FDT_ERR_BADSTATE,
+ * -FDT_ERR_BADSTRUCTURE,
+ * -FDT_ERR_TRUNCATED, standard meanings
+ */
+const void *fdt_getprop_by_offset(const void *fdt, int offset,
+ const char **namep, int *lenp);
+
+/**
+ * fdt_getprop_namelen - get property value based on substring
+ * @fdt: pointer to the device tree blob
+ * @nodeoffset: offset of the node whose property to find
+ * @name: name of the property to find
+ * @namelen: number of characters of name to consider
+ * @lenp: pointer to an integer variable (will be overwritten) or NULL
+ *
+ * Identical to fdt_getprop(), but only examine the first namelen
+ * characters of name for matching the property name.
+ */
+const void *fdt_getprop_namelen(const void *fdt, int nodeoffset,
+ const char *name, int namelen, int *lenp);
+
+/**
* fdt_getprop - retrieve the value of a given property
* @fdt: pointer to the device tree blob
* @nodeoffset: offset of the node whose property to find
@@ -429,6 +562,32 @@
uint32_t fdt_get_phandle(const void *fdt, int nodeoffset);
/**
+ * fdt_get_alias_namelen - get alias based on substring
+ * @fdt: pointer to the device tree blob
+ * @name: name of the alias th look up
+ * @namelen: number of characters of name to consider
+ *
+ * Identical to fdt_get_alias(), but only examine the first namelen
+ * characters of name for matching the alias name.
+ */
+const char *fdt_get_alias_namelen(const void *fdt,
+ const char *name, int namelen);
+
+/**
+ * fdt_get_alias - retreive the path referenced by a given alias
+ * @fdt: pointer to the device tree blob
+ * @name: name of the alias th look up
+ *
+ * fdt_get_alias() retrieves the value of a given alias. That is, the
+ * value of the property named 'name' in the node /aliases.
+ *
+ * returns:
+ * a pointer to the expansion of the alias named 'name', of it exists
+ * NULL, if the given alias or the /aliases node does not exist
+ */
+const char *fdt_get_alias(const void *fdt, const char *name);
+
+/**
* fdt_get_path - determine the full path of a node
* @fdt: pointer to the device tree blob
* @nodeoffset: offset of the node whose path to find
@@ -693,17 +852,17 @@
const void *val, int len);
/**
- * fdt_setprop_inplace_cell - change the value of a single-cell property
+ * fdt_setprop_inplace_u32 - change the value of a 32-bit integer property
* @fdt: pointer to the device tree blob
* @nodeoffset: offset of the node whose property to change
* @name: name of the property to change
- * @val: cell (32-bit integer) value to replace the property with
+ * @val: 32-bit integer value to replace the property with
*
- * fdt_setprop_inplace_cell() replaces the value of a given property
- * with the 32-bit integer cell value in val, converting val to
- * big-endian if necessary. This function cannot change the size of a
- * property, and so will only work if the property already exists and
- * has length 4.
+ * fdt_setprop_inplace_u32() replaces the value of a given property
+ * with the 32-bit integer value in val, converting val to big-endian
+ * if necessary. This function cannot change the size of a property,
+ * and so will only work if the property already exists and has length
+ * 4.
*
* This function will alter only the bytes in the blob which contain
* the given property value, and will not alter or move any other part
@@ -712,7 +871,7 @@
* returns:
* 0, on success
* -FDT_ERR_NOSPACE, if the property's length is not equal to 4
- * -FDT_ERR_NOTFOUND, node does not have the named property
+ * -FDT_ERR_NOTFOUND, node does not have the named property
* -FDT_ERR_BADOFFSET, nodeoffset did not point to FDT_BEGIN_NODE tag
* -FDT_ERR_BADMAGIC,
* -FDT_ERR_BADVERSION,
@@ -720,14 +879,60 @@
* -FDT_ERR_BADSTRUCTURE,
* -FDT_ERR_TRUNCATED, standard meanings
*/
-static inline int fdt_setprop_inplace_cell(void *fdt, int nodeoffset,
- const char *name, uint32_t val)
+static inline int fdt_setprop_inplace_u32(void *fdt, int nodeoffset,
+ const char *name, uint32_t val)
{
val = cpu_to_fdt32(val);
return fdt_setprop_inplace(fdt, nodeoffset, name, &val, sizeof(val));
}
/**
+ * fdt_setprop_inplace_u64 - change the value of a 64-bit integer property
+ * @fdt: pointer to the device tree blob
+ * @nodeoffset: offset of the node whose property to change
+ * @name: name of the property to change
+ * @val: 64-bit integer value to replace the property with
+ *
+ * fdt_setprop_inplace_u64() replaces the value of a given property
+ * with the 64-bit integer value in val, converting val to big-endian
+ * if necessary. This function cannot change the size of a property,
+ * and so will only work if the property already exists and has length
+ * 8.
+ *
+ * This function will alter only the bytes in the blob which contain
+ * the given property value, and will not alter or move any other part
+ * of the tree.
+ *
+ * returns:
+ * 0, on success
+ * -FDT_ERR_NOSPACE, if the property's length is not equal to 8
+ * -FDT_ERR_NOTFOUND, node does not have the named property
+ * -FDT_ERR_BADOFFSET, nodeoffset did not point to FDT_BEGIN_NODE tag
+ * -FDT_ERR_BADMAGIC,
+ * -FDT_ERR_BADVERSION,
+ * -FDT_ERR_BADSTATE,
+ * -FDT_ERR_BADSTRUCTURE,
+ * -FDT_ERR_TRUNCATED, standard meanings
+ */
+static inline int fdt_setprop_inplace_u64(void *fdt, int nodeoffset,
+ const char *name, uint64_t val)
+{
+ val = cpu_to_fdt64(val);
+ return fdt_setprop_inplace(fdt, nodeoffset, name, &val, sizeof(val));
+}
+
+/**
+ * fdt_setprop_inplace_cell - change the value of a single-cell property
+ *
+ * This is an alternative name for fdt_setprop_inplace_u32()
+ */
+static inline int fdt_setprop_inplace_cell(void *fdt, int nodeoffset,
+ const char *name, uint32_t val)
+{
+ return fdt_setprop_inplace_u32(fdt, nodeoffset, name, val);
+}
+
+/**
* fdt_nop_property - replace a property with nop tags
* @fdt: pointer to the device tree blob
* @nodeoffset: offset of the node whose property to nop
@@ -786,11 +991,20 @@
int fdt_finish_reservemap(void *fdt);
int fdt_begin_node(void *fdt, const char *name);
int fdt_property(void *fdt, const char *name, const void *val, int len);
-static inline int fdt_property_cell(void *fdt, const char *name, uint32_t val)
+static inline int fdt_property_u32(void *fdt, const char *name, uint32_t val)
{
val = cpu_to_fdt32(val);
return fdt_property(fdt, name, &val, sizeof(val));
}
+static inline int fdt_property_u64(void *fdt, const char *name, uint64_t val)
+{
+ val = cpu_to_fdt64(val);
+ return fdt_property(fdt, name, &val, sizeof(val));
+}
+static inline int fdt_property_cell(void *fdt, const char *name, uint32_t val)
+{
+ return fdt_property_u32(fdt, name, val);
+}
#define fdt_property_string(fdt, name, str) \
fdt_property(fdt, name, str, strlen(str)+1)
int fdt_end_node(void *fdt);
@@ -800,6 +1014,7 @@
/* Read-write functions */
/**********************************************************************/
+int fdt_create_empty_tree(void *buf, int bufsize);
int fdt_open_into(const void *fdt, void *buf, int bufsize);
int fdt_pack(void *fdt);
@@ -909,14 +1124,14 @@
const void *val, int len);
/**
- * fdt_setprop_cell - set a property to a single cell value
+ * fdt_setprop_u32 - set a property to a 32-bit integer
* @fdt: pointer to the device tree blob
* @nodeoffset: offset of the node whose property to change
* @name: name of the property to change
* @val: 32-bit integer value for the property (native endian)
*
- * fdt_setprop_cell() sets the value of the named property in the
- * given node to the given cell value (converting to big-endian if
+ * fdt_setprop_u32() sets the value of the named property in the given
+ * node to the given 32-bit integer value (converting to big-endian if
* necessary), or creates a new property with that value if it does
* not already exist.
*
@@ -936,14 +1151,60 @@
* -FDT_ERR_BADLAYOUT,
* -FDT_ERR_TRUNCATED, standard meanings
*/
-static inline int fdt_setprop_cell(void *fdt, int nodeoffset, const char *name,
- uint32_t val)
+static inline int fdt_setprop_u32(void *fdt, int nodeoffset, const char *name,
+ uint32_t val)
{
val = cpu_to_fdt32(val);
return fdt_setprop(fdt, nodeoffset, name, &val, sizeof(val));
}
/**
+ * fdt_setprop_u64 - set a property to a 64-bit integer
+ * @fdt: pointer to the device tree blob
+ * @nodeoffset: offset of the node whose property to change
+ * @name: name of the property to change
+ * @val: 64-bit integer value for the property (native endian)
+ *
+ * fdt_setprop_u64() sets the value of the named property in the given
+ * node to the given 64-bit integer value (converting to big-endian if
+ * necessary), or creates a new property with that value if it does
+ * not already exist.
+ *
+ * This function may insert or delete data from the blob, and will
+ * therefore change the offsets of some existing nodes.
+ *
+ * returns:
+ * 0, on success
+ * -FDT_ERR_NOSPACE, there is insufficient free space in the blob to
+ * contain the new property value
+ * -FDT_ERR_BADOFFSET, nodeoffset did not point to FDT_BEGIN_NODE tag
+ * -FDT_ERR_BADLAYOUT,
+ * -FDT_ERR_BADMAGIC,
+ * -FDT_ERR_BADVERSION,
+ * -FDT_ERR_BADSTATE,
+ * -FDT_ERR_BADSTRUCTURE,
+ * -FDT_ERR_BADLAYOUT,
+ * -FDT_ERR_TRUNCATED, standard meanings
+ */
+static inline int fdt_setprop_u64(void *fdt, int nodeoffset, const char *name,
+ uint64_t val)
+{
+ val = cpu_to_fdt64(val);
+ return fdt_setprop(fdt, nodeoffset, name, &val, sizeof(val));
+}
+
+/**
+ * fdt_setprop_cell - set a property to a single cell value
+ *
+ * This is an alternative name for fdt_setprop_u32()
+ */
+static inline int fdt_setprop_cell(void *fdt, int nodeoffset, const char *name,
+ uint32_t val)
+{
+ return fdt_setprop_u32(fdt, nodeoffset, name, val);
+}
+
+/**
* fdt_setprop_string - set a property to a string value
* @fdt: pointer to the device tree blob
* @nodeoffset: offset of the node whose property to change
@@ -975,6 +1236,147 @@
fdt_setprop((fdt), (nodeoffset), (name), (str), strlen(str)+1)
/**
+ * fdt_appendprop - append to or create a property
+ * @fdt: pointer to the device tree blob
+ * @nodeoffset: offset of the node whose property to change
+ * @name: name of the property to append to
+ * @val: pointer to data to append to the property value
+ * @len: length of the data to append to the property value
+ *
+ * fdt_appendprop() appends the value to the named property in the
+ * given node, creating the property if it does not already exist.
+ *
+ * This function may insert data into the blob, and will therefore
+ * change the offsets of some existing nodes.
+ *
+ * returns:
+ * 0, on success
+ * -FDT_ERR_NOSPACE, there is insufficient free space in the blob to
+ * contain the new property value
+ * -FDT_ERR_BADOFFSET, nodeoffset did not point to FDT_BEGIN_NODE tag
+ * -FDT_ERR_BADLAYOUT,
+ * -FDT_ERR_BADMAGIC,
+ * -FDT_ERR_BADVERSION,
+ * -FDT_ERR_BADSTATE,
+ * -FDT_ERR_BADSTRUCTURE,
+ * -FDT_ERR_BADLAYOUT,
+ * -FDT_ERR_TRUNCATED, standard meanings
+ */
+int fdt_appendprop(void *fdt, int nodeoffset, const char *name,
+ const void *val, int len);
+
+/**
+ * fdt_appendprop_u32 - append a 32-bit integer value to a property
+ * @fdt: pointer to the device tree blob
+ * @nodeoffset: offset of the node whose property to change
+ * @name: name of the property to change
+ * @val: 32-bit integer value to append to the property (native endian)
+ *
+ * fdt_appendprop_u32() appends the given 32-bit integer value
+ * (converting to big-endian if necessary) to the value of the named
+ * property in the given node, or creates a new property with that
+ * value if it does not already exist.
+ *
+ * This function may insert data into the blob, and will therefore
+ * change the offsets of some existing nodes.
+ *
+ * returns:
+ * 0, on success
+ * -FDT_ERR_NOSPACE, there is insufficient free space in the blob to
+ * contain the new property value
+ * -FDT_ERR_BADOFFSET, nodeoffset did not point to FDT_BEGIN_NODE tag
+ * -FDT_ERR_BADLAYOUT,
+ * -FDT_ERR_BADMAGIC,
+ * -FDT_ERR_BADVERSION,
+ * -FDT_ERR_BADSTATE,
+ * -FDT_ERR_BADSTRUCTURE,
+ * -FDT_ERR_BADLAYOUT,
+ * -FDT_ERR_TRUNCATED, standard meanings
+ */
+static inline int fdt_appendprop_u32(void *fdt, int nodeoffset,
+ const char *name, uint32_t val)
+{
+ val = cpu_to_fdt32(val);
+ return fdt_appendprop(fdt, nodeoffset, name, &val, sizeof(val));
+}
+
+/**
+ * fdt_appendprop_u64 - append a 64-bit integer value to a property
+ * @fdt: pointer to the device tree blob
+ * @nodeoffset: offset of the node whose property to change
+ * @name: name of the property to change
+ * @val: 64-bit integer value to append to the property (native endian)
+ *
+ * fdt_appendprop_u64() appends the given 64-bit integer value
+ * (converting to big-endian if necessary) to the value of the named
+ * property in the given node, or creates a new property with that
+ * value if it does not already exist.
+ *
+ * This function may insert data into the blob, and will therefore
+ * change the offsets of some existing nodes.
+ *
+ * returns:
+ * 0, on success
+ * -FDT_ERR_NOSPACE, there is insufficient free space in the blob to
+ * contain the new property value
+ * -FDT_ERR_BADOFFSET, nodeoffset did not point to FDT_BEGIN_NODE tag
+ * -FDT_ERR_BADLAYOUT,
+ * -FDT_ERR_BADMAGIC,
+ * -FDT_ERR_BADVERSION,
+ * -FDT_ERR_BADSTATE,
+ * -FDT_ERR_BADSTRUCTURE,
+ * -FDT_ERR_BADLAYOUT,
+ * -FDT_ERR_TRUNCATED, standard meanings
+ */
+static inline int fdt_appendprop_u64(void *fdt, int nodeoffset,
+ const char *name, uint64_t val)
+{
+ val = cpu_to_fdt64(val);
+ return fdt_appendprop(fdt, nodeoffset, name, &val, sizeof(val));
+}
+
+/**
+ * fdt_appendprop_cell - append a single cell value to a property
+ *
+ * This is an alternative name for fdt_appendprop_u32()
+ */
+static inline int fdt_appendprop_cell(void *fdt, int nodeoffset,
+ const char *name, uint32_t val)
+{
+ return fdt_appendprop_u32(fdt, nodeoffset, name, val);
+}
+
+/**
+ * fdt_appendprop_string - append a string to a property
+ * @fdt: pointer to the device tree blob
+ * @nodeoffset: offset of the node whose property to change
+ * @name: name of the property to change
+ * @str: string value to append to the property
+ *
+ * fdt_appendprop_string() appends the given string to the value of
+ * the named property in the given node, or creates a new property
+ * with that value if it does not already exist.
+ *
+ * This function may insert data into the blob, and will therefore
+ * change the offsets of some existing nodes.
+ *
+ * returns:
+ * 0, on success
+ * -FDT_ERR_NOSPACE, there is insufficient free space in the blob to
+ * contain the new property value
+ * -FDT_ERR_BADOFFSET, nodeoffset did not point to FDT_BEGIN_NODE tag
+ * -FDT_ERR_BADLAYOUT,
+ * -FDT_ERR_BADMAGIC,
+ * -FDT_ERR_BADVERSION,
+ * -FDT_ERR_BADSTATE,
+ * -FDT_ERR_BADSTRUCTURE,
+ * -FDT_ERR_BADLAYOUT,
+ * -FDT_ERR_TRUNCATED, standard meanings
+ */
+#define fdt_appendprop_string(fdt, nodeoffset, name, str) \
+ fdt_appendprop((fdt), (nodeoffset), (name), (str), strlen(str)+1)
+
+/**
* fdt_delprop - delete a property
* @fdt: pointer to the device tree blob
* @nodeoffset: offset of the node whose property to nop
diff --git a/scripts/dtc/libfdt/libfdt_env.h b/scripts/dtc/libfdt/libfdt_env.h
index 449bf60..213d7fb 100644
--- a/scripts/dtc/libfdt/libfdt_env.h
+++ b/scripts/dtc/libfdt/libfdt_env.h
@@ -5,19 +5,25 @@
#include <stdint.h>
#include <string.h>
-#define _B(n) ((unsigned long long)((uint8_t *)&x)[n])
+#define EXTRACT_BYTE(n) ((unsigned long long)((uint8_t *)&x)[n])
+static inline uint16_t fdt16_to_cpu(uint16_t x)
+{
+ return (EXTRACT_BYTE(0) << 8) | EXTRACT_BYTE(1);
+}
+#define cpu_to_fdt16(x) fdt16_to_cpu(x)
+
static inline uint32_t fdt32_to_cpu(uint32_t x)
{
- return (_B(0) << 24) | (_B(1) << 16) | (_B(2) << 8) | _B(3);
+ return (EXTRACT_BYTE(0) << 24) | (EXTRACT_BYTE(1) << 16) | (EXTRACT_BYTE(2) << 8) | EXTRACT_BYTE(3);
}
#define cpu_to_fdt32(x) fdt32_to_cpu(x)
static inline uint64_t fdt64_to_cpu(uint64_t x)
{
- return (_B(0) << 56) | (_B(1) << 48) | (_B(2) << 40) | (_B(3) << 32)
- | (_B(4) << 24) | (_B(5) << 16) | (_B(6) << 8) | _B(7);
+ return (EXTRACT_BYTE(0) << 56) | (EXTRACT_BYTE(1) << 48) | (EXTRACT_BYTE(2) << 40) | (EXTRACT_BYTE(3) << 32)
+ | (EXTRACT_BYTE(4) << 24) | (EXTRACT_BYTE(5) << 16) | (EXTRACT_BYTE(6) << 8) | EXTRACT_BYTE(7);
}
#define cpu_to_fdt64(x) fdt64_to_cpu(x)
-#undef _B
+#undef EXTRACT_BYTE
#endif /* _LIBFDT_ENV_H */
diff --git a/scripts/dtc/libfdt/libfdt_internal.h b/scripts/dtc/libfdt/libfdt_internal.h
index 46eb93e..381133b 100644
--- a/scripts/dtc/libfdt/libfdt_internal.h
+++ b/scripts/dtc/libfdt/libfdt_internal.h
@@ -62,8 +62,8 @@
return err; \
}
-uint32_t _fdt_next_tag(const void *fdt, int startoffset, int *nextoffset);
int _fdt_check_node_offset(const void *fdt, int offset);
+int _fdt_check_prop_offset(const void *fdt, int offset);
const char *_fdt_find_string(const char *strtab, int tabsize, const char *s);
int _fdt_node_end_offset(void *fdt, int nodeoffset);
diff --git a/scripts/dtc/livetree.c b/scripts/dtc/livetree.c
index 26d0e1e..b61465f 100644
--- a/scripts/dtc/livetree.c
+++ b/scripts/dtc/livetree.c
@@ -29,16 +29,27 @@
struct label *new;
/* Make sure the label isn't already there */
- for_each_label(*labels, new)
- if (streq(new->label, label))
+ for_each_label_withdel(*labels, new)
+ if (streq(new->label, label)) {
+ new->deleted = 0;
return;
+ }
new = xmalloc(sizeof(*new));
+ memset(new, 0, sizeof(*new));
new->label = label;
new->next = *labels;
*labels = new;
}
+void delete_labels(struct label **labels)
+{
+ struct label *label;
+
+ for_each_label(*labels, label)
+ label->deleted = 1;
+}
+
struct property *build_property(char *name, struct data val)
{
struct property *new = xmalloc(sizeof(*new));
@@ -51,6 +62,18 @@
return new;
}
+struct property *build_property_delete(char *name)
+{
+ struct property *new = xmalloc(sizeof(*new));
+
+ memset(new, 0, sizeof(*new));
+
+ new->name = name;
+ new->deleted = 1;
+
+ return new;
+}
+
struct property *chain_property(struct property *first, struct property *list)
{
assert(first->next == NULL);
@@ -91,6 +114,17 @@
return new;
}
+struct node *build_node_delete(void)
+{
+ struct node *new = xmalloc(sizeof(*new));
+
+ memset(new, 0, sizeof(*new));
+
+ new->deleted = 1;
+
+ return new;
+}
+
struct node *name_node(struct node *node, char *name)
{
assert(node->name == NULL);
@@ -106,8 +140,10 @@
struct node *new_child, *old_child;
struct label *l;
+ old_node->deleted = 0;
+
/* Add new node labels to old node */
- for_each_label(new_node->labels, l)
+ for_each_label_withdel(new_node->labels, l)
add_label(&old_node->labels, l->label);
/* Move properties from the new node to the old node. If there
@@ -118,14 +154,21 @@
new_node->proplist = new_prop->next;
new_prop->next = NULL;
+ if (new_prop->deleted) {
+ delete_property_by_name(old_node, new_prop->name);
+ free(new_prop);
+ continue;
+ }
+
/* Look for a collision, set new value if there is */
- for_each_property(old_node, old_prop) {
+ for_each_property_withdel(old_node, old_prop) {
if (streq(old_prop->name, new_prop->name)) {
/* Add new labels to old property */
- for_each_label(new_prop->labels, l)
+ for_each_label_withdel(new_prop->labels, l)
add_label(&old_prop->labels, l->label);
old_prop->val = new_prop->val;
+ old_prop->deleted = 0;
free(new_prop);
new_prop = NULL;
break;
@@ -146,8 +189,14 @@
new_child->parent = NULL;
new_child->next_sibling = NULL;
+ if (new_child->deleted) {
+ delete_node_by_name(old_node, new_child->name);
+ free(new_child);
+ continue;
+ }
+
/* Search for a collision. Merge if there is */
- for_each_child(old_node, old_child) {
+ for_each_child_withdel(old_node, old_child) {
if (streq(old_child->name, new_child->name)) {
merge_nodes(old_child, new_child);
new_child = NULL;
@@ -155,7 +204,7 @@
}
}
- /* if no collision occurred, add child to the old node. */
+ /* if no collision occured, add child to the old node. */
if (new_child)
add_child(old_node, new_child);
}
@@ -188,6 +237,25 @@
*p = prop;
}
+void delete_property_by_name(struct node *node, char *name)
+{
+ struct property *prop = node->proplist;
+
+ while (prop) {
+ if (!strcmp(prop->name, name)) {
+ delete_property(prop);
+ return;
+ }
+ prop = prop->next;
+ }
+}
+
+void delete_property(struct property *prop)
+{
+ prop->deleted = 1;
+ delete_labels(&prop->labels);
+}
+
void add_child(struct node *parent, struct node *child)
{
struct node **p;
@@ -202,6 +270,32 @@
*p = child;
}
+void delete_node_by_name(struct node *parent, char *name)
+{
+ struct node *node = parent->children;
+
+ while (node) {
+ if (!strcmp(node->name, name)) {
+ delete_node(node);
+ return;
+ }
+ node = node->next_sibling;
+ }
+}
+
+void delete_node(struct node *node)
+{
+ struct property *prop;
+ struct node *child;
+
+ node->deleted = 1;
+ for_each_child(node, child)
+ delete_node(child);
+ for_each_property(node, prop)
+ delete_property(prop);
+ delete_labels(&node->labels);
+}
+
struct reserve_info *build_reserve_entry(uint64_t address, uint64_t size)
{
struct reserve_info *new = xmalloc(sizeof(*new));
@@ -353,8 +447,11 @@
const char *p;
struct node *child;
- if (!path || ! (*path))
+ if (!path || ! (*path)) {
+ if (tree->deleted)
+ return NULL;
return tree;
+ }
while (path[0] == '/')
path++;
@@ -397,8 +494,11 @@
assert((phandle != 0) && (phandle != -1));
- if (tree->phandle == phandle)
+ if (tree->phandle == phandle) {
+ if (tree->deleted)
+ return NULL;
return tree;
+ }
for_each_child(tree, child) {
node = get_node_by_phandle(child, phandle);
@@ -535,7 +635,7 @@
int n = 0, i = 0;
struct property *prop, **tbl;
- for_each_property(node, prop)
+ for_each_property_withdel(node, prop)
n++;
if (n == 0)
@@ -543,7 +643,7 @@
tbl = xmalloc(n * sizeof(*tbl));
- for_each_property(node, prop)
+ for_each_property_withdel(node, prop)
tbl[i++] = prop;
qsort(tbl, n, sizeof(*tbl), cmp_prop);
@@ -571,7 +671,7 @@
int n = 0, i = 0;
struct node *subnode, **tbl;
- for_each_child(node, subnode)
+ for_each_child_withdel(node, subnode)
n++;
if (n == 0)
@@ -579,7 +679,7 @@
tbl = xmalloc(n * sizeof(*tbl));
- for_each_child(node, subnode)
+ for_each_child_withdel(node, subnode)
tbl[i++] = subnode;
qsort(tbl, n, sizeof(*tbl), cmp_subnode);
@@ -598,7 +698,7 @@
sort_properties(node);
sort_subnodes(node);
- for_each_child(node, c)
+ for_each_child_withdel(node, c)
sort_node(c);
}
diff --git a/scripts/dtc/srcpos.c b/scripts/dtc/srcpos.c
index 36a38e9..246ab4b 100644
--- a/scripts/dtc/srcpos.c
+++ b/scripts/dtc/srcpos.c
@@ -24,6 +24,15 @@
#include "dtc.h"
#include "srcpos.h"
+/* A node in our list of directories to search for source/include files */
+struct search_path {
+ struct search_path *next; /* next node in list, NULL for end */
+ const char *dirname; /* name of directory to search */
+};
+
+/* This is the list of directories that we search for source files */
+static struct search_path *search_path_head, **search_path_tail;
+
static char *dirname(const char *path)
{
@@ -47,6 +56,64 @@
#define MAX_SRCFILE_DEPTH (100)
static int srcfile_depth; /* = 0 */
+
+/**
+ * Try to open a file in a given directory.
+ *
+ * If the filename is an absolute path, then dirname is ignored. If it is a
+ * relative path, then we look in that directory for the file.
+ *
+ * @param dirname Directory to look in, or NULL for none
+ * @param fname Filename to look for
+ * @param fp Set to NULL if file did not open
+ * @return allocated filename on success (caller must free), NULL on failure
+ */
+static char *try_open(const char *dirname, const char *fname, FILE **fp)
+{
+ char *fullname;
+
+ if (!dirname || fname[0] == '/')
+ fullname = xstrdup(fname);
+ else
+ fullname = join_path(dirname, fname);
+
+ *fp = fopen(fullname, "r");
+ if (!*fp) {
+ free(fullname);
+ fullname = NULL;
+ }
+
+ return fullname;
+}
+
+/**
+ * Open a file for read access
+ *
+ * If it is a relative filename, we search the full search path for it.
+ *
+ * @param fname Filename to open
+ * @param fp Returns pointer to opened FILE, or NULL on failure
+ * @return pointer to allocated filename, which caller must free
+ */
+static char *fopen_any_on_path(const char *fname, FILE **fp)
+{
+ const char *cur_dir = NULL;
+ struct search_path *node;
+ char *fullname;
+
+ /* Try current directory first */
+ assert(fp);
+ if (current_srcfile)
+ cur_dir = current_srcfile->dir;
+ fullname = try_open(cur_dir, fname, fp);
+
+ /* Failing that, try each search path in turn */
+ for (node = search_path_head; !*fp && node; node = node->next)
+ fullname = try_open(node->dirname, fname, fp);
+
+ return fullname;
+}
+
FILE *srcfile_relative_open(const char *fname, char **fullnamep)
{
FILE *f;
@@ -56,13 +123,7 @@
f = stdin;
fullname = xstrdup("<stdin>");
} else {
- if (!current_srcfile || !current_srcfile->dir
- || (fname[0] == '/'))
- fullname = xstrdup(fname);
- else
- fullname = join_path(current_srcfile->dir, fname);
-
- f = fopen(fullname, "r");
+ fullname = fopen_any_on_path(fname, &f);
if (!f)
die("Couldn't open \"%s\": %s\n", fname,
strerror(errno));
@@ -119,6 +180,23 @@
return current_srcfile ? 1 : 0;
}
+void srcfile_add_search_path(const char *dirname)
+{
+ struct search_path *node;
+
+ /* Create the node */
+ node = xmalloc(sizeof(*node));
+ node->next = NULL;
+ node->dirname = xstrdup(dirname);
+
+ /* Add to the end of our list */
+ if (search_path_tail)
+ *search_path_tail = node;
+ else
+ search_path_head = node;
+ search_path_tail = &node->next;
+}
+
/*
* The empty source position.
*/
@@ -250,3 +328,9 @@
va_end(va);
}
+
+void srcpos_set_line(char *f, int l)
+{
+ current_srcfile->name = f;
+ current_srcfile->lineno = l;
+}
diff --git a/scripts/dtc/srcpos.h b/scripts/dtc/srcpos.h
index ce980ca..93a2712 100644
--- a/scripts/dtc/srcpos.h
+++ b/scripts/dtc/srcpos.h
@@ -33,10 +33,39 @@
extern FILE *depfile; /* = NULL */
extern struct srcfile_state *current_srcfile; /* = NULL */
+/**
+ * Open a source file.
+ *
+ * If the source file is a relative pathname, then it is searched for in the
+ * current directory (the directory of the last source file read) and after
+ * that in the search path.
+ *
+ * We work through the search path in order from the first path specified to
+ * the last.
+ *
+ * If the file is not found, then this function does not return, but calls
+ * die().
+ *
+ * @param fname Filename to search
+ * @param fullnamep If non-NULL, it is set to the allocated filename of the
+ * file that was opened. The caller is then responsible
+ * for freeing the pointer.
+ * @return pointer to opened FILE
+ */
FILE *srcfile_relative_open(const char *fname, char **fullnamep);
+
void srcfile_push(const char *fname);
int srcfile_pop(void);
+/**
+ * Add a new directory to the search path for input files
+ *
+ * The new path is added at the end of the list.
+ *
+ * @param dirname Directory to add
+ */
+void srcfile_add_search_path(const char *dirname);
+
struct srcpos {
int first_line;
int first_column;
@@ -84,4 +113,6 @@
extern void srcpos_warn(struct srcpos *pos, char const *, ...)
__attribute__((format(printf, 2, 3)));
+extern void srcpos_set_line(char *f, int l);
+
#endif /* _SRCPOS_H_ */
diff --git a/scripts/dtc/treesource.c b/scripts/dtc/treesource.c
index c09aafa..33eeba5 100644
--- a/scripts/dtc/treesource.c
+++ b/scripts/dtc/treesource.c
@@ -23,6 +23,7 @@
extern FILE *yyin;
extern int yyparse(void);
+extern YYLTYPE yylloc;
struct boot_info *the_boot_info;
int treesource_error;
@@ -34,6 +35,7 @@
srcfile_push(fname);
yyin = current_srcfile->f;
+ yylloc.file = current_srcfile;
if (yyparse() != 0)
die("Unable to parse input tree\n");
diff --git a/scripts/dtc/util.c b/scripts/dtc/util.c
index d7ac27d..2422c34 100644
--- a/scripts/dtc/util.c
+++ b/scripts/dtc/util.c
@@ -1,6 +1,10 @@
/*
+ * Copyright 2011 The Chromium Authors, All Rights Reserved.
* Copyright 2008 Jon Loeliger, Freescale Semiconductor, Inc.
*
+ * util_is_printable_string contributed by
+ * Pantelis Antoniou <pantelis.antoniou AT gmail.com>
+ *
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of the
@@ -17,11 +21,18 @@
* USA
*/
+#include <ctype.h>
#include <stdio.h>
#include <stdlib.h>
#include <stdarg.h>
#include <string.h>
+#include <assert.h>
+#include <errno.h>
+#include <fcntl.h>
+#include <unistd.h>
+
+#include "libfdt.h"
#include "util.h"
char *xstrdup(const char *s)
@@ -57,3 +68,264 @@
memcpy(str+lenp, name, lenn+1);
return str;
}
+
+int util_is_printable_string(const void *data, int len)
+{
+ const char *s = data;
+ const char *ss;
+
+ /* zero length is not */
+ if (len == 0)
+ return 0;
+
+ /* must terminate with zero */
+ if (s[len - 1] != '\0')
+ return 0;
+
+ ss = s;
+ while (*s && isprint(*s))
+ s++;
+
+ /* not zero, or not done yet */
+ if (*s != '\0' || (s + 1 - ss) < len)
+ return 0;
+
+ return 1;
+}
+
+/*
+ * Parse a octal encoded character starting at index i in string s. The
+ * resulting character will be returned and the index i will be updated to
+ * point at the character directly after the end of the encoding, this may be
+ * the '\0' terminator of the string.
+ */
+static char get_oct_char(const char *s, int *i)
+{
+ char x[4];
+ char *endx;
+ long val;
+
+ x[3] = '\0';
+ strncpy(x, s + *i, 3);
+
+ val = strtol(x, &endx, 8);
+
+ assert(endx > x);
+
+ (*i) += endx - x;
+ return val;
+}
+
+/*
+ * Parse a hexadecimal encoded character starting at index i in string s. The
+ * resulting character will be returned and the index i will be updated to
+ * point at the character directly after the end of the encoding, this may be
+ * the '\0' terminator of the string.
+ */
+static char get_hex_char(const char *s, int *i)
+{
+ char x[3];
+ char *endx;
+ long val;
+
+ x[2] = '\0';
+ strncpy(x, s + *i, 2);
+
+ val = strtol(x, &endx, 16);
+ if (!(endx > x))
+ die("\\x used with no following hex digits\n");
+
+ (*i) += endx - x;
+ return val;
+}
+
+char get_escape_char(const char *s, int *i)
+{
+ char c = s[*i];
+ int j = *i + 1;
+ char val;
+
+ assert(c);
+ switch (c) {
+ case 'a':
+ val = '\a';
+ break;
+ case 'b':
+ val = '\b';
+ break;
+ case 't':
+ val = '\t';
+ break;
+ case 'n':
+ val = '\n';
+ break;
+ case 'v':
+ val = '\v';
+ break;
+ case 'f':
+ val = '\f';
+ break;
+ case 'r':
+ val = '\r';
+ break;
+ case '0':
+ case '1':
+ case '2':
+ case '3':
+ case '4':
+ case '5':
+ case '6':
+ case '7':
+ j--; /* need to re-read the first digit as
+ * part of the octal value */
+ val = get_oct_char(s, &j);
+ break;
+ case 'x':
+ val = get_hex_char(s, &j);
+ break;
+ default:
+ val = c;
+ }
+
+ (*i) = j;
+ return val;
+}
+
+int utilfdt_read_err(const char *filename, char **buffp)
+{
+ int fd = 0; /* assume stdin */
+ char *buf = NULL;
+ off_t bufsize = 1024, offset = 0;
+ int ret = 0;
+
+ *buffp = NULL;
+ if (strcmp(filename, "-") != 0) {
+ fd = open(filename, O_RDONLY);
+ if (fd < 0)
+ return errno;
+ }
+
+ /* Loop until we have read everything */
+ buf = malloc(bufsize);
+ do {
+ /* Expand the buffer to hold the next chunk */
+ if (offset == bufsize) {
+ bufsize *= 2;
+ buf = realloc(buf, bufsize);
+ if (!buf) {
+ ret = ENOMEM;
+ break;
+ }
+ }
+
+ ret = read(fd, &buf[offset], bufsize - offset);
+ if (ret < 0) {
+ ret = errno;
+ break;
+ }
+ offset += ret;
+ } while (ret != 0);
+
+ /* Clean up, including closing stdin; return errno on error */
+ close(fd);
+ if (ret)
+ free(buf);
+ else
+ *buffp = buf;
+ return ret;
+}
+
+char *utilfdt_read(const char *filename)
+{
+ char *buff;
+ int ret = utilfdt_read_err(filename, &buff);
+
+ if (ret) {
+ fprintf(stderr, "Couldn't open blob from '%s': %s\n", filename,
+ strerror(ret));
+ return NULL;
+ }
+ /* Successful read */
+ return buff;
+}
+
+int utilfdt_write_err(const char *filename, const void *blob)
+{
+ int fd = 1; /* assume stdout */
+ int totalsize;
+ int offset;
+ int ret = 0;
+ const char *ptr = blob;
+
+ if (strcmp(filename, "-") != 0) {
+ fd = open(filename, O_WRONLY | O_CREAT | O_TRUNC, 0666);
+ if (fd < 0)
+ return errno;
+ }
+
+ totalsize = fdt_totalsize(blob);
+ offset = 0;
+
+ while (offset < totalsize) {
+ ret = write(fd, ptr + offset, totalsize - offset);
+ if (ret < 0) {
+ ret = -errno;
+ break;
+ }
+ offset += ret;
+ }
+ /* Close the file/stdin; return errno on error */
+ if (fd != 1)
+ close(fd);
+ return ret < 0 ? -ret : 0;
+}
+
+
+int utilfdt_write(const char *filename, const void *blob)
+{
+ int ret = utilfdt_write_err(filename, blob);
+
+ if (ret) {
+ fprintf(stderr, "Couldn't write blob to '%s': %s\n", filename,
+ strerror(ret));
+ }
+ return ret ? -1 : 0;
+}
+
+int utilfdt_decode_type(const char *fmt, int *type, int *size)
+{
+ int qualifier = 0;
+
+ if (!*fmt)
+ return -1;
+
+ /* get the conversion qualifier */
+ *size = -1;
+ if (strchr("hlLb", *fmt)) {
+ qualifier = *fmt++;
+ if (qualifier == *fmt) {
+ switch (*fmt++) {
+/* TODO: case 'l': qualifier = 'L'; break;*/
+ case 'h':
+ qualifier = 'b';
+ break;
+ }
+ }
+ }
+
+ /* we should now have a type */
+ if ((*fmt == '\0') || !strchr("iuxs", *fmt))
+ return -1;
+
+ /* convert qualifier (bhL) to byte size */
+ if (*fmt != 's')
+ *size = qualifier == 'b' ? 1 :
+ qualifier == 'h' ? 2 :
+ qualifier == 'l' ? 4 : -1;
+ *type = *fmt++;
+
+ /* that should be it! */
+ if (*fmt)
+ return -1;
+ return 0;
+}
diff --git a/scripts/dtc/util.h b/scripts/dtc/util.h
index 9cead84..c8eb45d 100644
--- a/scripts/dtc/util.h
+++ b/scripts/dtc/util.h
@@ -1,7 +1,10 @@
#ifndef _UTIL_H
#define _UTIL_H
+#include <stdarg.h>
+
/*
+ * Copyright 2011 The Chromium Authors, All Rights Reserved.
* Copyright 2008 Jon Loeliger, Freescale Semiconductor, Inc.
*
* This program is free software; you can redistribute it and/or
@@ -53,4 +56,98 @@
extern char *xstrdup(const char *s);
extern char *join_path(const char *path, const char *name);
+/**
+ * Check a string of a given length to see if it is all printable and
+ * has a valid terminator.
+ *
+ * @param data The string to check
+ * @param len The string length including terminator
+ * @return 1 if a valid printable string, 0 if not */
+int util_is_printable_string(const void *data, int len);
+
+/*
+ * Parse an escaped character starting at index i in string s. The resulting
+ * character will be returned and the index i will be updated to point at the
+ * character directly after the end of the encoding, this may be the '\0'
+ * terminator of the string.
+ */
+char get_escape_char(const char *s, int *i);
+
+/**
+ * Read a device tree file into a buffer. This will report any errors on
+ * stderr.
+ *
+ * @param filename The filename to read, or - for stdin
+ * @return Pointer to allocated buffer containing fdt, or NULL on error
+ */
+char *utilfdt_read(const char *filename);
+
+/**
+ * Read a device tree file into a buffer. Does not report errors, but only
+ * returns them. The value returned can be passed to strerror() to obtain
+ * an error message for the user.
+ *
+ * @param filename The filename to read, or - for stdin
+ * @param buffp Returns pointer to buffer containing fdt
+ * @return 0 if ok, else an errno value representing the error
+ */
+int utilfdt_read_err(const char *filename, char **buffp);
+
+
+/**
+ * Write a device tree buffer to a file. This will report any errors on
+ * stderr.
+ *
+ * @param filename The filename to write, or - for stdout
+ * @param blob Poiner to buffer containing fdt
+ * @return 0 if ok, -1 on error
+ */
+int utilfdt_write(const char *filename, const void *blob);
+
+/**
+ * Write a device tree buffer to a file. Does not report errors, but only
+ * returns them. The value returned can be passed to strerror() to obtain
+ * an error message for the user.
+ *
+ * @param filename The filename to write, or - for stdout
+ * @param blob Poiner to buffer containing fdt
+ * @return 0 if ok, else an errno value representing the error
+ */
+int utilfdt_write_err(const char *filename, const void *blob);
+
+/**
+ * Decode a data type string. The purpose of this string
+ *
+ * The string consists of an optional character followed by the type:
+ * Modifier characters:
+ * hh or b 1 byte
+ * h 2 byte
+ * l 4 byte, default
+ *
+ * Type character:
+ * s string
+ * i signed integer
+ * u unsigned integer
+ * x hex
+ *
+ * TODO: Implement ll modifier (8 bytes)
+ * TODO: Implement o type (octal)
+ *
+ * @param fmt Format string to process
+ * @param type Returns type found(s/d/u/x), or 0 if none
+ * @param size Returns size found(1,2,4,8) or 4 if none
+ * @return 0 if ok, -1 on error (no type given, or other invalid format)
+ */
+int utilfdt_decode_type(const char *fmt, int *type, int *size);
+
+/*
+ * This is a usage message fragment for the -t option. It is the format
+ * supported by utilfdt_decode_type.
+ */
+
+#define USAGE_TYPE_MSG \
+ "<type>\ts=string, i=int, u=unsigned, x=hex\n" \
+ "\tOptional modifier prefix:\n" \
+ "\t\thh or b=byte, h=2 byte, l=4 byte (default)\n";
+
#endif /* _UTIL_H */
diff --git a/sound/core/pcm_native.c b/sound/core/pcm_native.c
index 7403b40..8bba8d7 100644
--- a/sound/core/pcm_native.c
+++ b/sound/core/pcm_native.c
@@ -2618,6 +2618,7 @@
case SNDRV_COMPRESS_GET_PARAMS:
case SNDRV_COMPRESS_TSTAMP:
case SNDRV_COMPRESS_DRAIN:
+ case SNDRV_COMPRESS_METADATA_MODE:
return snd_compressed_ioctl(substream, cmd, arg);
default:
if (((cmd >> 8) & 0xff) == 'U')
diff --git a/sound/soc/codecs/msm8x10-wcd.c b/sound/soc/codecs/msm8x10-wcd.c
index 75881cf..1260e1c 100644
--- a/sound/soc/codecs/msm8x10-wcd.c
+++ b/sound/soc/codecs/msm8x10-wcd.c
@@ -50,6 +50,11 @@
#define MSM8X10_WCD_I2S_MASTER_MODE_MASK 0x08
#define MSM8X10_DINO_CODEC_BASE_ADDR 0xFE043000
+#define MSM8x10_TLMM_CDC_PULL_CTL 0xFD512050
+#define HELICON_CORE_0_I2C_ADDR 0x0d
+#define HELICON_CORE_1_I2C_ADDR 0x77
+#define HELICON_CORE_2_I2C_ADDR 0x66
+#define HELICON_CORE_3_I2C_ADDR 0x55
#define MAX_MSM8X10_WCD_DEVICE 4
#define CODEC_DT_MAX_PROP_SIZE 40
@@ -683,9 +688,9 @@
kcontrol->private_value)->shift;
ucontrol->value.integer.value[0] =
- snd_soc_read(codec,
+ (snd_soc_read(codec,
(MSM8X10_WCD_A_CDC_IIR1_CTL + 64 * iir_idx)) &
- (1 << band_idx);
+ (1 << band_idx)) != 0;
dev_dbg(codec->dev, "%s: IIR #%d band #%d enable %d\n", __func__,
iir_idx, band_idx,
@@ -709,22 +714,54 @@
(1 << band_idx), (value << band_idx));
dev_dbg(codec->dev, "%s: IIR #%d band #%d enable %d\n", __func__,
- iir_idx, band_idx, value);
+ iir_idx, band_idx,
+ ((snd_soc_read(codec, (MSM8X10_WCD_A_CDC_IIR1_CTL + 64 * iir_idx)) &
+ (1 << band_idx)) != 0));
+
return 0;
}
static uint32_t get_iir_band_coeff(struct snd_soc_codec *codec,
int iir_idx, int band_idx,
int coeff_idx)
{
+ uint32_t value = 0;
+
/* Address does not automatically update if reading */
snd_soc_write(codec,
(MSM8X10_WCD_A_CDC_IIR1_COEF_B1_CTL + 64 * iir_idx),
- (band_idx * BAND_MAX + coeff_idx) & 0x1F);
+ ((band_idx * BAND_MAX + coeff_idx)
+ * sizeof(uint32_t)) & 0x7F);
+
+ value |= snd_soc_read(codec,
+ (MSM8X10_WCD_A_CDC_IIR1_COEF_B2_CTL + 64 * iir_idx));
+
+ snd_soc_write(codec,
+ (MSM8X10_WCD_A_CDC_IIR1_COEF_B1_CTL + 64 * iir_idx),
+ ((band_idx * BAND_MAX + coeff_idx)
+ * sizeof(uint32_t) + 1) & 0x7F);
+
+ value |= (snd_soc_read(codec,
+ (MSM8X10_WCD_A_CDC_IIR1_COEF_B2_CTL + 64 * iir_idx)) << 8);
+
+ snd_soc_write(codec,
+ (MSM8X10_WCD_A_CDC_IIR1_COEF_B1_CTL + 64 * iir_idx),
+ ((band_idx * BAND_MAX + coeff_idx)
+ * sizeof(uint32_t) + 2) & 0x7F);
+
+ value |= (snd_soc_read(codec,
+ (MSM8X10_WCD_A_CDC_IIR1_COEF_B2_CTL + 64 * iir_idx)) << 16);
+
+ snd_soc_write(codec,
+ (MSM8X10_WCD_A_CDC_IIR1_COEF_B1_CTL + 64 * iir_idx),
+ ((band_idx * BAND_MAX + coeff_idx)
+ * sizeof(uint32_t) + 3) & 0x7F);
/* Mask bits top 2 bits since they are reserved */
- return ((snd_soc_read(codec,
- (MSM8X10_WCD_A_CDC_IIR1_COEF_B2_CTL + 64 * iir_idx)) << 24)) &
- 0x3FFFFFFF;
+ value |= ((snd_soc_read(codec,
+ (MSM8X10_WCD_A_CDC_IIR1_COEF_B2_CTL + 64 * iir_idx)) & 0x3f) << 24);
+
+ return value;
+
}
static int msm8x10_wcd_get_iir_band_audio_mixer(
@@ -768,13 +805,19 @@
static void set_iir_band_coeff(struct snd_soc_codec *codec,
int iir_idx, int band_idx,
- int coeff_idx, uint32_t value)
+ uint32_t value)
{
- /* Mask top 3 bits, 6-8 are reserved */
- /* Update address manually each time */
snd_soc_write(codec,
- (MSM8X10_WCD_A_CDC_IIR1_COEF_B1_CTL + 64 * iir_idx),
- (band_idx * BAND_MAX + coeff_idx) & 0x1F);
+ (MSM8X10_WCD_A_CDC_IIR1_COEF_B2_CTL + 64 * iir_idx),
+ (value & 0xFF));
+
+ snd_soc_write(codec,
+ (MSM8X10_WCD_A_CDC_IIR1_COEF_B2_CTL + 64 * iir_idx),
+ (value >> 8) & 0xFF);
+
+ snd_soc_write(codec,
+ (MSM8X10_WCD_A_CDC_IIR1_COEF_B2_CTL + 64 * iir_idx),
+ (value >> 16) & 0xFF);
/* Mask top 2 bits, 7-8 are reserved */
snd_soc_write(codec,
@@ -793,15 +836,22 @@
int band_idx = ((struct soc_multi_mixer_control *)
kcontrol->private_value)->shift;
- set_iir_band_coeff(codec, iir_idx, band_idx, 0,
+ /* Mask top bit it is reserved */
+ /* Updates addr automatically for each B2 write */
+ snd_soc_write(codec,
+ (MSM8X10_WCD_A_CDC_IIR1_COEF_B1_CTL + 64 * iir_idx),
+ (band_idx * BAND_MAX * sizeof(uint32_t)) & 0x7F);
+
+
+ set_iir_band_coeff(codec, iir_idx, band_idx,
ucontrol->value.integer.value[0]);
- set_iir_band_coeff(codec, iir_idx, band_idx, 1,
+ set_iir_band_coeff(codec, iir_idx, band_idx,
ucontrol->value.integer.value[1]);
- set_iir_band_coeff(codec, iir_idx, band_idx, 2,
+ set_iir_band_coeff(codec, iir_idx, band_idx,
ucontrol->value.integer.value[2]);
- set_iir_band_coeff(codec, iir_idx, band_idx, 3,
+ set_iir_band_coeff(codec, iir_idx, band_idx,
ucontrol->value.integer.value[3]);
- set_iir_band_coeff(codec, iir_idx, band_idx, 4,
+ set_iir_band_coeff(codec, iir_idx, band_idx,
ucontrol->value.integer.value[4]);
dev_dbg(codec->dev, "%s: IIR #%d band #%d b0 = 0x%x\n"
@@ -1332,6 +1382,7 @@
snd_soc_update_bits(codec, micb_int_reg, 0x10, 0x10);
else if (strnstr(w->name, internal3_text, 30))
snd_soc_update_bits(codec, micb_int_reg, 0x2, 0x2);
+ snd_soc_update_bits(codec, w->reg, 0x1, 0x0);
break;
case SND_SOC_DAPM_POST_PMU:
usleep_range(20000, 20100);
@@ -1344,6 +1395,7 @@
else if (strnstr(w->name, internal3_text, 30))
snd_soc_update_bits(codec, micb_int_reg, 0x2, 0x0);
+ snd_soc_update_bits(codec, w->reg, 0x1, 0x1);
break;
}
return 0;
@@ -1645,9 +1697,6 @@
{"I2S TX1", NULL, "TX_I2S_CLK"},
{"I2S TX2", NULL, "TX_I2S_CLK"},
- {"DEC1 MUX", NULL, "TX CLK"},
- {"DEC2 MUX", NULL, "TX CLK"},
-
{"I2S TX1", NULL, "DEC1 MUX"},
{"I2S TX2", NULL, "DEC2 MUX"},
@@ -1698,7 +1747,9 @@
{"RX3 MIX1", NULL, "RX3 MIX1 INP1"},
{"RX3 MIX1", NULL, "RX3 MIX1 INP2"},
{"RX1 MIX2", NULL, "RX1 MIX1"},
+ {"RX1 MIX2", NULL, "RX1 MIX2 INP1"},
{"RX2 MIX2", NULL, "RX2 MIX1"},
+ {"RX2 MIX2", NULL, "RX2 MIX2 INP1"},
{"RX1 MIX1 INP1", "RX1", "I2S RX1"},
{"RX1 MIX1 INP1", "RX2", "I2S RX2"},
@@ -1730,6 +1781,9 @@
{"RX3 MIX1 INP2", "RX3", "I2S RX3"},
{"RX3 MIX1 INP2", "IIR1", "IIR1"},
+ {"RX1 MIX2 INP1", "IIR1", "IIR1"},
+ {"RX2 MIX2 INP1", "IIR1", "IIR1"},
+
/* Decimator Inputs */
{"DEC1 MUX", "DMIC1", "DMIC1"},
{"DEC1 MUX", "DMIC2", "DMIC2"},
@@ -1750,6 +1804,7 @@
{"IIR1", NULL, "IIR1 INP1 MUX"},
{"IIR1 INP1 MUX", "DEC1", "DEC1 MUX"},
{"IIR1 INP1 MUX", "DEC2", "DEC2 MUX"},
+ {"MIC BIAS Internal1", NULL, "INT_LDO_H"},
{"MIC BIAS Internal2", NULL, "INT_LDO_H"},
{"MIC BIAS External", NULL, "INT_LDO_H"},
};
@@ -2080,8 +2135,6 @@
SND_SOC_DAPM_AIF_IN("I2S RX3", "AIF1 Playback", 0, SND_SOC_NOPM, 0, 0),
- SND_SOC_DAPM_SUPPLY("TX CLK", MSM8X10_WCD_A_CDC_DIG_CLK_CTL,
- 4, 0, NULL, 0),
SND_SOC_DAPM_SUPPLY("INT_LDO_H", SND_SOC_NOPM, 1, 0, NULL, 0),
SND_SOC_DAPM_OUTPUT("HEADPHONE"),
@@ -2280,10 +2333,11 @@
/* Reduce LINE DAC bias to 70% */
MSM8X10_WCD_REG_VAL(MSM8X10_WCD_A_RX_LINE_BIAS_PA, 0x78),
- /* Disable TX7 internal biasing path which can cause leakage */
+ /* Disable internal biasing path which can cause leakage */
MSM8X10_WCD_REG_VAL(MSM8X10_WCD_A_BIAS_CURR_CTL_2, 0x04),
MSM8X10_WCD_REG_VAL(MSM8X10_WCD_A_MICB_CFILT_1_VAL, 0x60),
- MSM8X10_WCD_REG_VAL(MSM8X10_WCD_A_MICB_1_CTL, 0x82),
+ /* Enable pulldown to reduce leakage */
+ MSM8X10_WCD_REG_VAL(MSM8X10_WCD_A_MICB_1_CTL, 0x83),
MSM8X10_WCD_REG_VAL(MSM8X10_WCD_A_TX_COM_BIAS, 0xE0),
MSM8X10_WCD_REG_VAL(MSM8X10_WCD_A_TX_1_EN, 0x32),
MSM8X10_WCD_REG_VAL(MSM8X10_WCD_A_TX_2_EN, 0x32),
@@ -2294,6 +2348,9 @@
MSM8X10_WCD_REG_VAL(MSM8X10_WCD_A_CDC_CLSG_FREQ_THRESH_B3_CTL, 0x1A),
MSM8X10_WCD_REG_VAL(MSM8X10_WCD_A_CDC_CLSG_FREQ_THRESH_B4_CTL, 0x47),
MSM8X10_WCD_REG_VAL(MSM8X10_WCD_A_CDC_CLSG_GAIN_THRESH_CTL, 0x23),
+
+ /* Always set TXD_CLK_EN bit to reduce the leakage */
+ MSM8X10_WCD_REG_VAL(MSM8X10_WCD_A_CDC_DIG_CLK_CTL, 0x10),
};
static void msm8x10_wcd_update_reg_defaults(struct snd_soc_codec *codec)
@@ -2349,6 +2406,15 @@
}
EXPORT_SYMBOL_GPL(msm8x10_wcd_hs_detect);
+static int msm8x10_wcd_bringup(struct snd_soc_codec *codec)
+{
+ snd_soc_write(codec, MSM8X10_WCD_A_CDC_RST_CTL, 0x02);
+ snd_soc_write(codec, MSM8X10_WCD_A_CHIP_CTL, 0x00);
+ usleep_range(5000, 5000);
+ snd_soc_write(codec, MSM8X10_WCD_A_CDC_RST_CTL, 0x03);
+ return 0;
+}
+
static int msm8x10_wcd_codec_probe(struct snd_soc_codec *codec)
{
struct msm8x10_wcd_priv *msm8x10_wcd;
@@ -2371,6 +2437,7 @@
codec->control_data = dev_get_drvdata(codec->dev);
snd_soc_codec_set_drvdata(codec, msm8x10_wcd);
msm8x10_wcd->codec = codec;
+ msm8x10_wcd_bringup(codec);
msm8x10_wcd_codec_init_reg(codec);
msm8x10_wcd_update_reg_defaults(codec);
@@ -2506,13 +2573,27 @@
kfree(msm8x10->supplies);
}
-static int msm8x10_wcd_bringup(struct msm8x10_wcd *msm8x10)
+static int msm8x10_wcd_pads_config(void)
{
- msm8x10->read_dev = msm8x10_wcd_reg_read;
- msm8x10->write_dev(msm8x10, MSM8X10_WCD_A_CDC_RST_CTL, 0x02);
- msm8x10->write_dev(msm8x10, MSM8X10_WCD_A_CHIP_CTL, 0x00);
- usleep_range(5000, 5000);
- msm8x10->write_dev(msm8x10, MSM8X10_WCD_A_CDC_RST_CTL, 0x03);
+ /* Set I2C pads as pull up and rest of pads as no pull */
+ iowrite32(0x03C00000, ioremap(MSM8x10_TLMM_CDC_PULL_CTL, 4));
+ usleep_range(100, 200);
+ return 0;
+}
+
+
+static int msm8x10_wcd_clk_init(void)
+{
+ /* Div-2 */
+ iowrite32(0x3, ioremap(MSM8X10_DINO_LPASS_DIGCODEC_CFG_RCGR, 4));
+ iowrite32(0x0, ioremap(MSM8X10_DINO_LPASS_DIGCODEC_M, 4));
+ iowrite32(0x0, ioremap(MSM8X10_DINO_LPASS_DIGCODEC_N, 4));
+ iowrite32(0x0, ioremap(MSM8X10_DINO_LPASS_DIGCODEC_D, 4));
+ /* Digital codec clock enable */
+ iowrite32(0x1, ioremap(MSM8X10_DINO_LPASS_DIGCODEC_CBCR, 4));
+ /* Set the update bit to make the settings go through */
+ iowrite32(0x1, ioremap(MSM8X10_DINO_LPASS_DIGCODEC_CMD_RCGR, 4));
+ usleep_range(100, 200);
return 0;
}
@@ -2522,11 +2603,8 @@
mutex_init(&msm8x10->xfer_lock);
mutex_init(&msm8x10->pm_lock);
msm8x10->wlock_holders = 0;
-
- iowrite32(0x03C00000, ioremap(0xFD512050, 4));
- usleep_range(5000, 5000);
-
- msm8x10_wcd_bringup(msm8x10);
+ msm8x10_wcd_pads_config();
+ msm8x10_wcd_clk_init();
return 0;
}
@@ -2538,15 +2616,44 @@
struct msm8x10_wcd_pdata *pdata;
static int device_id;
struct device *dev;
+ enum apr_subsys_state q6_state;
- dev_dbg(&client->dev, "%s:slave addr = 0x%x device_id = %d\n",
- __func__, client->addr, device_id);
+ dev_dbg(&client->dev, "%s(%d):slave addr = 0x%x device_id = %d\n",
+ __func__, __LINE__, client->addr, device_id);
- if (device_id > 0) {
- msm8x10_wcd_modules[device_id++].client = client;
+ switch (client->addr) {
+ case HELICON_CORE_0_I2C_ADDR:
+ msm8x10_wcd_modules[0].client = client;
+ break;
+ case HELICON_CORE_1_I2C_ADDR:
+ msm8x10_wcd_modules[1].client = client;
+ goto rtn;
+ case HELICON_CORE_2_I2C_ADDR:
+ msm8x10_wcd_modules[2].client = client;
+ goto rtn;
+ case HELICON_CORE_3_I2C_ADDR:
+ msm8x10_wcd_modules[3].client = client;
+ goto rtn;
+ default:
+ ret = -EINVAL;
goto rtn;
}
+ q6_state = apr_get_q6_state();
+ if ((q6_state == APR_SUBSYS_DOWN) &&
+ (client->addr == HELICON_CORE_0_I2C_ADDR)) {
+ dev_info(&client->dev, "defering %s, adsp_state %d\n", __func__,
+ q6_state);
+ return -EPROBE_DEFER;
+ } else
+ dev_info(&client->dev, "adsp is ready\n");
+
+ dev_dbg(&client->dev, "%s(%d):slave addr = 0x%x device_id = %d\n",
+ __func__, __LINE__, client->addr, device_id);
+
+ if (client->addr != HELICON_CORE_0_I2C_ADDR)
+ goto rtn;
+
dev = &client->dev;
if (client->dev.of_node) {
dev_dbg(&client->dev, "%s:Platform data from device tree\n",
@@ -2568,7 +2675,6 @@
}
msm8x10->dev = &client->dev;
- msm8x10_wcd_modules[device_id++].client = client;
msm8x10->read_dev = msm8x10_wcd_reg_read;
msm8x10->write_dev = msm8x10_wcd_reg_write;
ret = msm8x10_wcd_enable_supplies(msm8x10, pdata);
diff --git a/sound/soc/codecs/msm8x10-wcd.h b/sound/soc/codecs/msm8x10-wcd.h
index d250e0a..08a2725 100644
--- a/sound/soc/codecs/msm8x10-wcd.h
+++ b/sound/soc/codecs/msm8x10-wcd.h
@@ -23,6 +23,15 @@
#define MSM8X10_WCD_NUM_IRQ_REGS 3
#define MAX_REGULATOR 7
#define MSM8X10_WCD_REG_VAL(reg, val) {reg, 0, val}
+#define MSM8X10_DINO_LPASS_AUDIO_CORE_DIG_CODEC_CLK_SEL 0xFE03B004
+#define MSM8X10_DINO_LPASS_DIGCODEC_CMD_RCGR 0xFE02C000
+#define MSM8X10_DINO_LPASS_DIGCODEC_CFG_RCGR 0xFE02C004
+#define MSM8X10_DINO_LPASS_DIGCODEC_M 0xFE02C008
+#define MSM8X10_DINO_LPASS_DIGCODEC_N 0xFE02C00C
+#define MSM8X10_DINO_LPASS_DIGCODEC_D 0xFE02C010
+#define MSM8X10_DINO_LPASS_DIGCODEC_CBCR 0xFE02C014
+#define MSM8X10_DINO_LPASS_DIGCODEC_AHB_CBCR 0xFE02C018
+
#define MSM8X10_WCD_IS_DINO_REG(reg) \
(((reg >= 0x400) && (reg <= 0x5FF)) ? 1 : 0)
diff --git a/sound/soc/codecs/wcd9306.c b/sound/soc/codecs/wcd9306.c
index 6cdbb8c..b31c7c9 100644
--- a/sound/soc/codecs/wcd9306.c
+++ b/sound/soc/codecs/wcd9306.c
@@ -73,6 +73,9 @@
#define TAPAN_SLIM_IRQ_OVERFLOW (1 << 0)
#define TAPAN_SLIM_IRQ_UNDERFLOW (1 << 1)
#define TAPAN_SLIM_IRQ_PORT_CLOSED (1 << 2)
+
+#define TAPAN_IRQ_MBHC_JACK_SWITCH 21
+
enum {
AIF1_PB = 0,
AIF1_CAP,
@@ -303,30 +306,34 @@
return 0;
}
- WCD9XXX_BCL_LOCK(&priv->resmgr);
+ codec = priv->codec;
+ mutex_lock(&codec->mutex);
old = spkr_drv_wrnd;
ret = param_set_int(val, kp);
if (ret) {
- WCD9XXX_BCL_UNLOCK(&priv->resmgr);
+ mutex_unlock(&codec->mutex);
return ret;
}
- codec = priv->codec;
dev_dbg(codec->dev, "%s: spkr_drv_wrnd %d -> %d\n",
__func__, old, spkr_drv_wrnd);
- if (old == 0 && spkr_drv_wrnd == 1) {
+ if ((old == -1 || old == 0) && spkr_drv_wrnd == 1) {
+ WCD9XXX_BG_CLK_LOCK(&priv->resmgr);
wcd9xxx_resmgr_get_bandgap(&priv->resmgr,
WCD9XXX_BANDGAP_AUDIO_MODE);
+ WCD9XXX_BG_CLK_UNLOCK(&priv->resmgr);
snd_soc_update_bits(codec, TAPAN_A_SPKR_DRV_EN, 0x80, 0x80);
} else if (old == 1 && spkr_drv_wrnd == 0) {
+ WCD9XXX_BG_CLK_LOCK(&priv->resmgr);
wcd9xxx_resmgr_put_bandgap(&priv->resmgr,
WCD9XXX_BANDGAP_AUDIO_MODE);
+ WCD9XXX_BG_CLK_UNLOCK(&priv->resmgr);
if (!priv->spkr_pa_widget_on)
snd_soc_update_bits(codec, TAPAN_A_SPKR_DRV_EN, 0x80,
0x00);
}
+ mutex_unlock(&codec->mutex);
- WCD9XXX_BCL_UNLOCK(&priv->resmgr);
return 0;
}
@@ -1622,22 +1629,22 @@
switch (event) {
case SND_SOC_DAPM_PRE_PMU:
- WCD9XXX_BCL_LOCK(&tapan->resmgr);
+ WCD9XXX_BG_CLK_LOCK(&tapan->resmgr);
wcd9xxx_resmgr_get_bandgap(&tapan->resmgr,
WCD9XXX_BANDGAP_AUDIO_MODE);
/* AUX PGA requires RCO or MCLK */
wcd9xxx_resmgr_get_clk_block(&tapan->resmgr, WCD9XXX_CLK_RCO);
+ WCD9XXX_BG_CLK_UNLOCK(&tapan->resmgr);
wcd9xxx_resmgr_enable_rx_bias(&tapan->resmgr, 1);
- WCD9XXX_BCL_UNLOCK(&tapan->resmgr);
break;
case SND_SOC_DAPM_POST_PMD:
- WCD9XXX_BCL_LOCK(&tapan->resmgr);
wcd9xxx_resmgr_enable_rx_bias(&tapan->resmgr, 0);
+ WCD9XXX_BG_CLK_LOCK(&tapan->resmgr);
wcd9xxx_resmgr_put_bandgap(&tapan->resmgr,
WCD9XXX_BANDGAP_AUDIO_MODE);
wcd9xxx_resmgr_put_clk_block(&tapan->resmgr, WCD9XXX_CLK_RCO);
- WCD9XXX_BCL_UNLOCK(&tapan->resmgr);
+ WCD9XXX_BG_CLK_UNLOCK(&tapan->resmgr);
break;
}
return 0;
@@ -1694,7 +1701,6 @@
struct tapan_priv *tapan = snd_soc_codec_get_drvdata(codec);
dev_dbg(codec->dev, "%s: %s %d\n", __func__, w->name, event);
- WCD9XXX_BCL_LOCK(&tapan->resmgr);
switch (event) {
case SND_SOC_DAPM_PRE_PMU:
tapan->spkr_pa_widget_on = true;
@@ -1705,7 +1711,6 @@
snd_soc_update_bits(codec, TAPAN_A_SPKR_DRV_EN, 0x80, 0x00);
break;
}
- WCD9XXX_BCL_UNLOCK(&tapan->resmgr);
return 0;
}
@@ -2265,13 +2270,13 @@
dev_dbg(codec->dev, "%s: %s event = %d\n", __func__, w->name, event);
if (w->shift == 5) {
- e_pre_on = WCD9XXX_EVENT_PRE_HPHR_PA_ON;
- e_post_off = WCD9XXX_EVENT_POST_HPHR_PA_OFF;
- req_clsh_state = WCD9XXX_CLSH_STATE_HPHL;
- } else if (w->shift == 4) {
e_pre_on = WCD9XXX_EVENT_PRE_HPHL_PA_ON;
e_post_off = WCD9XXX_EVENT_POST_HPHL_PA_OFF;
req_clsh_state = WCD9XXX_CLSH_STATE_HPHR;
+ } else if (w->shift == 4) {
+ e_pre_on = WCD9XXX_EVENT_PRE_HPHR_PA_ON;
+ e_post_off = WCD9XXX_EVENT_POST_HPHR_PA_OFF;
+ req_clsh_state = WCD9XXX_CLSH_STATE_HPHL;
} else {
pr_err("%s: Invalid w->shift %d\n", __func__, w->shift);
return -EINVAL;
@@ -2869,7 +2874,7 @@
dev_dbg(codec->dev, "%s: mclk_enable = %u, dapm = %d\n", __func__,
mclk_enable, dapm);
- WCD9XXX_BCL_LOCK(&tapan->resmgr);
+ WCD9XXX_BG_CLK_LOCK(&tapan->resmgr);
if (mclk_enable) {
wcd9xxx_resmgr_get_bandgap(&tapan->resmgr,
WCD9XXX_BANDGAP_AUDIO_MODE);
@@ -2880,7 +2885,7 @@
wcd9xxx_resmgr_put_bandgap(&tapan->resmgr,
WCD9XXX_BANDGAP_AUDIO_MODE);
}
- WCD9XXX_BCL_UNLOCK(&tapan->resmgr);
+ WCD9XXX_BG_CLK_UNLOCK(&tapan->resmgr);
return 0;
}
@@ -4325,12 +4330,31 @@
snd_soc_write(codec, TAPAN_A_SPKR_DRV_EN, 0xEF);
}
+static void tapan_update_reg_mclk_rate(struct wcd9xxx *wcd9xxx)
+{
+ struct snd_soc_codec *codec;
+
+ codec = (struct snd_soc_codec *)(wcd9xxx->ssr_priv);
+ dev_dbg(codec->dev, "%s: MCLK Rate = %x\n",
+ __func__, wcd9xxx->mclk_rate);
+
+ if (wcd9xxx->mclk_rate == TAPAN_MCLK_CLK_12P288MHZ) {
+ snd_soc_update_bits(codec, TAPAN_A_CHIP_CTL, 0x06, 0x0);
+ snd_soc_update_bits(codec, TAPAN_A_RX_COM_TIMER_DIV, 0x01,
+ 0x01);
+ } else if (wcd9xxx->mclk_rate == TAPAN_MCLK_CLK_9P6MHZ) {
+ snd_soc_update_bits(codec, TAPAN_A_CHIP_CTL, 0x06, 0x2);
+ }
+}
+
static const struct tapan_reg_mask_val tapan_codec_reg_init_val[] = {
- /* Initialize current threshold to 350MA
+ /* Initialize current threshold to 365MA
* number of wait and run cycles to 4096
*/
- {TAPAN_A_RX_HPH_OCP_CTL, 0xE1, 0x61},
+ {TAPAN_A_RX_HPH_OCP_CTL, 0xE9, 0x69},
{TAPAN_A_RX_COM_OCP_COUNT, 0xFF, 0xFF},
+ {TAPAN_A_RX_HPH_L_TEST, 0x01, 0x01},
+ {TAPAN_A_RX_HPH_R_TEST, 0x01, 0x01},
/* Initialize gain registers to use register gain */
{TAPAN_A_RX_HPH_L_GAIN, 0x20, 0x20},
@@ -4395,26 +4419,29 @@
tapan_codec_reg_init_val[i].mask,
tapan_codec_reg_init_val[i].val);
}
-
-static int tapan_setup_irqs(struct tapan_priv *tapan)
+static void tapan_slim_interface_init_reg(struct snd_soc_codec *codec)
{
int i;
- int ret = 0;
- struct snd_soc_codec *codec = tapan->codec;
-
- ret = wcd9xxx_request_irq(codec->control_data, WCD9XXX_IRQ_SLIMBUS,
- tapan_slimbus_irq, "SLIMBUS Slave", tapan);
- if (ret) {
- pr_err("%s: Failed to request irq %d\n", __func__,
- WCD9XXX_IRQ_SLIMBUS);
- goto exit;
- }
for (i = 0; i < WCD9XXX_SLIM_NUM_PORT_REG; i++)
wcd9xxx_interface_reg_write(codec->control_data,
TAPAN_SLIM_PGD_PORT_INT_EN0 + i,
0xFF);
-exit:
+}
+
+static int tapan_setup_irqs(struct tapan_priv *tapan)
+{
+ int ret = 0;
+ struct snd_soc_codec *codec = tapan->codec;
+
+ ret = wcd9xxx_request_irq(codec->control_data, WCD9XXX_IRQ_SLIMBUS,
+ tapan_slimbus_irq, "SLIMBUS Slave", tapan);
+ if (ret)
+ pr_err("%s: Failed to request irq %d\n", __func__,
+ WCD9XXX_IRQ_SLIMBUS);
+ else
+ tapan_slim_interface_init_reg(codec);
+
return ret;
}
@@ -4424,6 +4451,72 @@
wcd9xxx_free_irq(codec->control_data, WCD9XXX_IRQ_SLIMBUS, tapan);
}
+
+static void tapan_enable_mux_bias_block(struct snd_soc_codec *codec)
+{
+ snd_soc_update_bits(codec, WCD9XXX_A_MBHC_SCALING_MUX_1,
+ 0x80, 0x00);
+}
+
+static void tapan_put_cfilt_fast_mode(struct snd_soc_codec *codec,
+ struct wcd9xxx_mbhc *mbhc)
+{
+ snd_soc_update_bits(codec, mbhc->mbhc_bias_regs.cfilt_ctl,
+ 0x30, 0x30);
+}
+
+static void tapan_codec_specific_cal_setup(struct snd_soc_codec *codec,
+ struct wcd9xxx_mbhc *mbhc)
+{
+ snd_soc_update_bits(codec, WCD9XXX_A_CDC_MBHC_B1_CTL,
+ 0x0C, 0x04);
+ snd_soc_update_bits(codec, WCD9XXX_A_TX_7_MBHC_EN, 0xE0, 0xE0);
+}
+
+static int tapan_get_jack_detect_irq(struct snd_soc_codec *codec)
+{
+ return TAPAN_IRQ_MBHC_JACK_SWITCH;
+}
+
+static struct wcd9xxx_cfilt_mode tapan_codec_switch_cfilt_mode(
+ struct wcd9xxx_mbhc *mbhc,
+ bool fast)
+{
+ struct snd_soc_codec *codec = mbhc->codec;
+ struct wcd9xxx_cfilt_mode cfilt_mode;
+
+ if (fast)
+ cfilt_mode.reg_mode_val = WCD9XXX_CFILT_EXT_PRCHG_EN;
+ else
+ cfilt_mode.reg_mode_val = WCD9XXX_CFILT_EXT_PRCHG_DSBL;
+
+ cfilt_mode.cur_mode_val =
+ snd_soc_read(codec, mbhc->mbhc_bias_regs.cfilt_ctl) & 0x30;
+ return cfilt_mode;
+}
+
+static void tapan_select_cfilt(struct snd_soc_codec *codec,
+ struct wcd9xxx_mbhc *mbhc)
+{
+ snd_soc_update_bits(codec, mbhc->mbhc_bias_regs.ctl_reg, 0x60, 0x00);
+}
+
+static void tapan_free_irq(struct wcd9xxx_mbhc *mbhc)
+{
+ void *cdata = mbhc->codec->control_data;
+ wcd9xxx_free_irq(cdata, WCD9306_IRQ_MBHC_JACK_SWITCH, mbhc);
+}
+
+static const struct wcd9xxx_mbhc_cb mbhc_cb = {
+ .enable_mux_bias_block = tapan_enable_mux_bias_block,
+ .cfilt_fast_mode = tapan_put_cfilt_fast_mode,
+ .codec_specific_cal = tapan_codec_specific_cal_setup,
+ .jack_detect_irq = tapan_get_jack_detect_irq,
+ .switch_cfilt_mode = tapan_codec_switch_cfilt_mode,
+ .select_cfilt = tapan_select_cfilt,
+ .free_irq = tapan_free_irq,
+};
+
int tapan_hs_detect(struct snd_soc_codec *codec,
struct wcd9xxx_mbhc_config *mbhc_cfg)
{
@@ -4432,9 +4525,70 @@
}
EXPORT_SYMBOL_GPL(tapan_hs_detect);
+static int tapan_post_reset_cb(struct wcd9xxx *wcd9xxx)
+{
+ int ret = 0;
+ int rco_clk_rate;
+ struct snd_soc_codec *codec;
+ struct tapan_priv *tapan;
+
+ codec = (struct snd_soc_codec *)(wcd9xxx->ssr_priv);
+ tapan = snd_soc_codec_get_drvdata(codec);
+ mutex_lock(&codec->mutex);
+
+ if (codec->reg_def_copy) {
+ pr_debug("%s: Update ASOC cache", __func__);
+ kfree(codec->reg_cache);
+ codec->reg_cache = kmemdup(codec->reg_def_copy,
+ codec->reg_size, GFP_KERNEL);
+ if (!codec->reg_cache) {
+ pr_err("%s: Cache update failed!\n", __func__);
+ mutex_unlock(&codec->mutex);
+ return -ENOMEM;
+ }
+ }
+
+ wcd9xxx_resmgr_post_ssr(&tapan->resmgr);
+ if (spkr_drv_wrnd == 1)
+ snd_soc_update_bits(codec, TAPAN_A_SPKR_DRV_EN, 0x80, 0x80);
+
+ tapan_update_reg_defaults(codec);
+ tapan_update_reg_mclk_rate(wcd9xxx);
+ tapan_codec_init_reg(codec);
+ ret = tapan_handle_pdata(tapan);
+ if (IS_ERR_VALUE(ret))
+ pr_err("%s: bad pdata\n", __func__);
+
+ tapan_slim_interface_init_reg(codec);
+
+ wcd9xxx_mbhc_deinit(&tapan->mbhc);
+
+ if (TAPAN_IS_1_0(wcd9xxx->version))
+ rco_clk_rate = TAPAN_MCLK_CLK_12P288MHZ;
+ else
+ rco_clk_rate = TAPAN_MCLK_CLK_9P6MHZ;
+
+ ret = wcd9xxx_mbhc_init(&tapan->mbhc, &tapan->resmgr, codec, NULL,
+ &mbhc_cb, rco_clk_rate);
+ if (ret)
+ pr_err("%s: mbhc init failed %d\n", __func__, ret);
+ else
+ wcd9xxx_mbhc_start(&tapan->mbhc, tapan->mbhc.mbhc_cfg);
+ mutex_unlock(&codec->mutex);
+ return ret;
+}
+
static struct wcd9xxx_reg_address tapan_reg_address = {
};
+static int wcd9xxx_ssr_register(struct wcd9xxx *control,
+ int (*post_reset_cb)(struct wcd9xxx *wcd9xxx), void *priv)
+{
+ control->post_reset = post_reset_cb;
+ control->ssr_priv = priv;
+ return 0;
+}
+
static int tapan_codec_probe(struct snd_soc_codec *codec)
{
struct wcd9xxx *control;
@@ -4449,6 +4603,8 @@
codec->control_data = dev_get_drvdata(codec->dev->parent);
control = codec->control_data;
+ wcd9xxx_ssr_register(control, tapan_post_reset_cb, (void *)codec);
+
dev_info(codec->dev, "%s()\n", __func__);
tapan = kzalloc(sizeof(struct tapan_priv), GFP_KERNEL);
@@ -4485,8 +4641,8 @@
rco_clk_rate = TAPAN_MCLK_CLK_9P6MHZ;
ret = wcd9xxx_mbhc_init(&tapan->mbhc, &tapan->resmgr, codec, NULL,
- WCD9XXX_MBHC_VERSION_TAPAN,
- rco_clk_rate);
+ &mbhc_cb, rco_clk_rate);
+
if (ret) {
pr_err("%s: mbhc init failed %d\n", __func__, ret);
return ret;
@@ -4502,17 +4658,7 @@
tapan->aux_l_gain = 0x1F;
tapan->aux_r_gain = 0x1F;
tapan_update_reg_defaults(codec);
-
- dev_dbg(codec->dev, "%s: MCLK Rate = %x\n",
- __func__, wcd9xxx->mclk_rate);
-
- if (wcd9xxx->mclk_rate == TAPAN_MCLK_CLK_12P288MHZ) {
- snd_soc_update_bits(codec, TAPAN_A_CHIP_CTL, 0x06, 0x0);
- snd_soc_update_bits(codec, TAPAN_A_RX_COM_TIMER_DIV, 0x01,
- 0x01);
- } else if (wcd9xxx->mclk_rate == TAPAN_MCLK_CLK_9P6MHZ) {
- snd_soc_update_bits(codec, TAPAN_A_CHIP_CTL, 0x06, 0x2);
- }
+ tapan_update_reg_mclk_rate(wcd9xxx);
tapan_codec_init_reg(codec);
ret = tapan_handle_pdata(tapan);
if (IS_ERR_VALUE(ret)) {
@@ -4521,10 +4667,10 @@
}
if (spkr_drv_wrnd > 0) {
- WCD9XXX_BCL_LOCK(&tapan->resmgr);
+ WCD9XXX_BG_CLK_LOCK(&tapan->resmgr);
wcd9xxx_resmgr_get_bandgap(&tapan->resmgr,
WCD9XXX_BANDGAP_AUDIO_MODE);
- WCD9XXX_BCL_UNLOCK(&tapan->resmgr);
+ WCD9XXX_BG_CLK_UNLOCK(&tapan->resmgr);
}
ptr = kmalloc((sizeof(tapan_rx_chs) +
@@ -4588,13 +4734,13 @@
{
struct tapan_priv *tapan = snd_soc_codec_get_drvdata(codec);
- WCD9XXX_BCL_LOCK(&tapan->resmgr);
+ WCD9XXX_BG_CLK_LOCK(&tapan->resmgr);
atomic_set(&kp_tapan_priv, 0);
if (spkr_drv_wrnd > 0)
wcd9xxx_resmgr_put_bandgap(&tapan->resmgr,
WCD9XXX_BANDGAP_AUDIO_MODE);
- WCD9XXX_BCL_UNLOCK(&tapan->resmgr);
+ WCD9XXX_BG_CLK_UNLOCK(&tapan->resmgr);
tapan_cleanup_irqs(tapan);
diff --git a/sound/soc/codecs/wcd9320.c b/sound/soc/codecs/wcd9320.c
index 67c03d6..516ac4f 100644
--- a/sound/soc/codecs/wcd9320.c
+++ b/sound/soc/codecs/wcd9320.c
@@ -604,29 +604,33 @@
return 0;
}
- WCD9XXX_BCL_LOCK(&priv->resmgr);
+ codec = priv->codec;
+ mutex_lock(&codec->mutex);
old = spkr_drv_wrnd;
ret = param_set_int(val, kp);
if (ret) {
- WCD9XXX_BCL_UNLOCK(&priv->resmgr);
+ mutex_unlock(&codec->mutex);
return ret;
}
pr_debug("%s: spkr_drv_wrnd %d -> %d\n", __func__, old, spkr_drv_wrnd);
- codec = priv->codec;
- if (old == 0 && spkr_drv_wrnd == 1) {
+ if ((old == -1 || old == 0) && spkr_drv_wrnd == 1) {
+ WCD9XXX_BG_CLK_LOCK(&priv->resmgr);
wcd9xxx_resmgr_get_bandgap(&priv->resmgr,
WCD9XXX_BANDGAP_AUDIO_MODE);
+ WCD9XXX_BG_CLK_UNLOCK(&priv->resmgr);
snd_soc_update_bits(codec, TAIKO_A_SPKR_DRV_EN, 0x80, 0x80);
} else if (old == 1 && spkr_drv_wrnd == 0) {
+ WCD9XXX_BG_CLK_LOCK(&priv->resmgr);
wcd9xxx_resmgr_put_bandgap(&priv->resmgr,
WCD9XXX_BANDGAP_AUDIO_MODE);
+ WCD9XXX_BG_CLK_UNLOCK(&priv->resmgr);
if (!priv->spkr_pa_widget_on)
snd_soc_update_bits(codec, TAIKO_A_SPKR_DRV_EN, 0x80,
0x00);
}
+ mutex_unlock(&codec->mutex);
- WCD9XXX_BCL_UNLOCK(&priv->resmgr);
return 0;
}
@@ -2336,22 +2340,22 @@
switch (event) {
case SND_SOC_DAPM_PRE_PMU:
- WCD9XXX_BCL_LOCK(&taiko->resmgr);
+ WCD9XXX_BG_CLK_LOCK(&taiko->resmgr);
wcd9xxx_resmgr_get_bandgap(&taiko->resmgr,
WCD9XXX_BANDGAP_AUDIO_MODE);
/* AUX PGA requires RCO or MCLK */
wcd9xxx_resmgr_get_clk_block(&taiko->resmgr, WCD9XXX_CLK_RCO);
wcd9xxx_resmgr_enable_rx_bias(&taiko->resmgr, 1);
- WCD9XXX_BCL_UNLOCK(&taiko->resmgr);
+ WCD9XXX_BG_CLK_UNLOCK(&taiko->resmgr);
break;
case SND_SOC_DAPM_POST_PMD:
- WCD9XXX_BCL_LOCK(&taiko->resmgr);
+ WCD9XXX_BG_CLK_LOCK(&taiko->resmgr);
wcd9xxx_resmgr_enable_rx_bias(&taiko->resmgr, 0);
wcd9xxx_resmgr_put_bandgap(&taiko->resmgr,
WCD9XXX_BANDGAP_AUDIO_MODE);
wcd9xxx_resmgr_put_clk_block(&taiko->resmgr, WCD9XXX_CLK_RCO);
- WCD9XXX_BCL_UNLOCK(&taiko->resmgr);
+ WCD9XXX_BG_CLK_UNLOCK(&taiko->resmgr);
break;
}
return 0;
@@ -2416,7 +2420,6 @@
struct taiko_priv *taiko = snd_soc_codec_get_drvdata(codec);
pr_debug("%s: %d %s\n", __func__, event, w->name);
- WCD9XXX_BCL_LOCK(&taiko->resmgr);
switch (event) {
case SND_SOC_DAPM_PRE_PMU:
taiko->spkr_pa_widget_on = true;
@@ -2427,7 +2430,6 @@
snd_soc_update_bits(codec, TAIKO_A_SPKR_DRV_EN, 0x80, 0x00);
break;
}
- WCD9XXX_BCL_UNLOCK(&taiko->resmgr);
return 0;
}
@@ -2992,7 +2994,12 @@
pr_debug("%s: enter\n", __func__);
switch (event) {
case SND_SOC_DAPM_PRE_PMU:
+ /*
+ * ldo_h_users is protected by codec->mutex, don't need
+ * additional mutex
+ */
if (++priv->ldo_h_users == 1) {
+ WCD9XXX_BG_CLK_LOCK(&priv->resmgr);
wcd9xxx_resmgr_get_bandgap(&priv->resmgr,
WCD9XXX_BANDGAP_AUDIO_MODE);
wcd9xxx_resmgr_get_clk_block(&priv->resmgr,
@@ -3001,6 +3008,7 @@
1 << 7);
wcd9xxx_resmgr_put_clk_block(&priv->resmgr,
WCD9XXX_CLK_RCO);
+ WCD9XXX_BG_CLK_UNLOCK(&priv->resmgr);
pr_debug("%s: ldo_h_users %d\n", __func__,
priv->ldo_h_users);
/* LDO enable requires 1ms to settle down */
@@ -3009,6 +3017,7 @@
break;
case SND_SOC_DAPM_POST_PMD:
if (--priv->ldo_h_users == 0) {
+ WCD9XXX_BG_CLK_LOCK(&priv->resmgr);
wcd9xxx_resmgr_get_clk_block(&priv->resmgr,
WCD9XXX_CLK_RCO);
snd_soc_update_bits(codec, TAIKO_A_LDO_H_MODE_1, 1 << 7,
@@ -3017,6 +3026,7 @@
WCD9XXX_CLK_RCO);
wcd9xxx_resmgr_put_bandgap(&priv->resmgr,
WCD9XXX_BANDGAP_AUDIO_MODE);
+ WCD9XXX_BG_CLK_UNLOCK(&priv->resmgr);
pr_debug("%s: ldo_h_users %d\n", __func__,
priv->ldo_h_users);
}
@@ -3032,12 +3042,7 @@
struct snd_kcontrol *kcontrol, int event)
{
int rc;
- struct snd_soc_codec *codec = w->codec;
- struct taiko_priv *priv = snd_soc_codec_get_drvdata(codec);
-
- WCD9XXX_BCL_LOCK(&priv->resmgr);
rc = __taiko_codec_enable_ldo_h(w, kcontrol, event);
- WCD9XXX_BCL_UNLOCK(&priv->resmgr);
return rc;
}
@@ -4086,7 +4091,7 @@
pr_debug("%s: mclk_enable = %u, dapm = %d\n", __func__, mclk_enable,
dapm);
- WCD9XXX_BCL_LOCK(&taiko->resmgr);
+ WCD9XXX_BG_CLK_LOCK(&taiko->resmgr);
if (mclk_enable) {
wcd9xxx_resmgr_get_bandgap(&taiko->resmgr,
WCD9XXX_BANDGAP_AUDIO_MODE);
@@ -4097,7 +4102,7 @@
wcd9xxx_resmgr_put_bandgap(&taiko->resmgr,
WCD9XXX_BANDGAP_AUDIO_MODE);
}
- WCD9XXX_BCL_UNLOCK(&taiko->resmgr);
+ WCD9XXX_BG_CLK_UNLOCK(&taiko->resmgr);
return 0;
}
@@ -4632,7 +4637,7 @@
.rate_max = 192000,
.rate_min = 8000,
.channels_min = 1,
- .channels_max = 5,
+ .channels_max = 8,
},
.ops = &taiko_dai_ops,
},
@@ -5885,6 +5890,9 @@
TAIKO_REG_VAL(TAIKO_A_CDC_CLK_OTHR_RESET_B1_CTL, 0x00),
TAIKO_REG_VAL(TAIKO_A_CDC_CLK_OTHR_CTL, 0x00),
TAIKO_REG_VAL(TAIKO_A_CDC_CONN_MAD, 0x01),
+
+ /* Set HPH Path to low power mode */
+ TAIKO_REG_VAL(TAIKO_A_RX_HPH_BIAS_PA, 0x55),
};
static const struct wcd9xxx_reg_mask_val taiko_1_0_reg_defaults[] = {
@@ -5912,8 +5920,6 @@
* Rx PA bring up.
*/
TAIKO_REG_VAL(WCD9XXX_A_BUCK_MODE_3, 0xCE),
- /* Reduce HPH DAC bias to 70% */
- TAIKO_REG_VAL(TAIKO_A_RX_HPH_BIAS_PA, 0x7A),
/*Reduce EAR DAC bias to 70% */
TAIKO_REG_VAL(TAIKO_A_RX_EAR_BIAS_PA, 0x76),
/* Reduce LINE DAC bias to 70% */
@@ -5955,7 +5961,6 @@
TAIKO_REG_VAL(WCD9XXX_A_BUCK_CTRL_CCL_4, 0x51),
TAIKO_REG_VAL(TAIKO_A_NCP_DTEST, 0x10),
TAIKO_REG_VAL(TAIKO_A_RX_HPH_CHOP_CTL, 0xA4),
- TAIKO_REG_VAL(TAIKO_A_RX_HPH_BIAS_PA, 0x7A),
TAIKO_REG_VAL(TAIKO_A_RX_HPH_OCP_CTL, 0x69),
TAIKO_REG_VAL(TAIKO_A_RX_HPH_CNP_WG_CTL, 0xDA),
TAIKO_REG_VAL(TAIKO_A_RX_HPH_CNP_WG_TIME, 0x15),
@@ -6182,7 +6187,6 @@
codec = (struct snd_soc_codec *)(wcd9xxx->ssr_priv);
taiko = snd_soc_codec_get_drvdata(codec);
mutex_lock(&codec->mutex);
- WCD9XXX_BCL_LOCK(&taiko->resmgr);
if (codec->reg_def_copy) {
pr_debug("%s: Update ASOC cache", __func__);
@@ -6194,7 +6198,6 @@
wcd9xxx_resmgr_post_ssr(&taiko->resmgr);
if (spkr_drv_wrnd == 1)
snd_soc_update_bits(codec, TAIKO_A_SPKR_DRV_EN, 0x80, 0x80);
- WCD9XXX_BCL_UNLOCK(&taiko->resmgr);
taiko_update_reg_defaults(codec);
taiko_codec_init_reg(codec);
@@ -6216,8 +6219,7 @@
ret = wcd9xxx_mbhc_init(&taiko->mbhc, &taiko->resmgr, codec,
taiko_enable_mbhc_micbias,
- WCD9XXX_MBHC_VERSION_TAIKO,
- rco_clk_rate);
+ NULL, rco_clk_rate);
if (ret) {
pr_err("%s: mbhc init failed %d\n", __func__, ret);
} else {
@@ -6397,8 +6399,7 @@
/* init and start mbhc */
ret = wcd9xxx_mbhc_init(&taiko->mbhc, &taiko->resmgr, codec,
taiko_enable_mbhc_micbias,
- WCD9XXX_MBHC_VERSION_TAIKO,
- rco_clk_rate);
+ NULL, rco_clk_rate);
if (ret) {
pr_err("%s: mbhc init failed %d\n", __func__, ret);
goto err_init;
@@ -6432,10 +6433,10 @@
WCD9XXX_VDD_SPKDRV_NAME);
if (spkr_drv_wrnd > 0) {
- WCD9XXX_BCL_LOCK(&taiko->resmgr);
+ WCD9XXX_BG_CLK_LOCK(&taiko->resmgr);
wcd9xxx_resmgr_get_bandgap(&taiko->resmgr,
WCD9XXX_BANDGAP_AUDIO_MODE);
- WCD9XXX_BCL_UNLOCK(&taiko->resmgr);
+ WCD9XXX_BG_CLK_UNLOCK(&taiko->resmgr);
}
ptr = kmalloc((sizeof(taiko_rx_chs) +
@@ -6529,13 +6530,13 @@
{
struct taiko_priv *taiko = snd_soc_codec_get_drvdata(codec);
- WCD9XXX_BCL_LOCK(&taiko->resmgr);
+ WCD9XXX_BG_CLK_LOCK(&taiko->resmgr);
atomic_set(&kp_taiko_priv, 0);
if (spkr_drv_wrnd > 0)
wcd9xxx_resmgr_put_bandgap(&taiko->resmgr,
WCD9XXX_BANDGAP_AUDIO_MODE);
- WCD9XXX_BCL_UNLOCK(&taiko->resmgr);
+ WCD9XXX_BG_CLK_UNLOCK(&taiko->resmgr);
taiko_cleanup_irqs(taiko);
diff --git a/sound/soc/codecs/wcd9xxx-mbhc.c b/sound/soc/codecs/wcd9xxx-mbhc.c
index 6977400..cd11703 100644
--- a/sound/soc/codecs/wcd9xxx-mbhc.c
+++ b/sound/soc/codecs/wcd9xxx-mbhc.c
@@ -94,8 +94,7 @@
#define WCD9XXX_USLEEP_RANGE_MARGIN_US 1000
-#define WCD9XXX_IRQ_MBHC_JACK_SWITCH_TAIKO 28
-#define WCD9XXX_IRQ_MBHC_JACK_SWITCH_TAPAN 21
+#define WCD9XXX_IRQ_MBHC_JACK_SWITCH_DEFAULT 28
static bool detect_use_vddio_switch = true;
@@ -153,64 +152,6 @@
snd_soc_update_bits(codec, WCD9XXX_A_CDC_MBHC_B1_CTL, 0x04, on << 2);
}
-static int wcd9xxx_enable_mux_bias_block(struct snd_soc_codec *codec,
- struct wcd9xxx_mbhc *mbhc)
-{
- switch (mbhc->mbhc_version) {
- case WCD9XXX_MBHC_VERSION_TAIKO:
- snd_soc_update_bits(codec, WCD9XXX_A_MBHC_SCALING_MUX_1,
- 0x80, 0x80);
- break;
- case WCD9XXX_MBHC_VERSION_TAPAN:
- snd_soc_update_bits(codec, WCD9XXX_A_MBHC_SCALING_MUX_1,
- 0x80, 0x00);
- break;
- default:
- return -EINVAL;
- }
- return 0;
-}
-
-static int wcd9xxx_put_cfilt_fast_mode(struct snd_soc_codec *codec,
- struct wcd9xxx_mbhc *mbhc)
-{
- switch (mbhc->mbhc_version) {
- case WCD9XXX_MBHC_VERSION_TAIKO:
- snd_soc_update_bits(codec, mbhc->mbhc_bias_regs.cfilt_ctl,
- 0x70, 0x00);
- break;
- case WCD9XXX_MBHC_VERSION_TAPAN:
- snd_soc_update_bits(codec, mbhc->mbhc_bias_regs.cfilt_ctl,
- 0x70, 0x70);
- break;
- default:
- return -EINVAL;
- }
- return 0;
-}
-
-static int wcd9xxx_codec_specific_cal_setup(struct snd_soc_codec *codec,
- struct wcd9xxx_mbhc *mbhc)
-{
- switch (mbhc->mbhc_version) {
- case WCD9XXX_MBHC_VERSION_TAIKO:
- snd_soc_update_bits(codec, WCD9XXX_A_CDC_MBHC_B1_CTL,
- 0x04, 0x04);
- break;
- case WCD9XXX_MBHC_VERSION_TAPAN:
- snd_soc_update_bits(codec, WCD9XXX_A_CDC_MBHC_B1_CTL,
- 0x0C, 0x04);
- snd_soc_update_bits(codec, WCD9XXX_A_TX_7_MBHC_EN, 0xE0, 0xE0);
- /* Make sure the calibration is ON */
- snd_soc_update_bits(codec, mbhc->mbhc_bias_regs.cfilt_val,
- 0x02, 0x02);
- break;
- default:
- return -EINVAL;
- }
- return 0;
-}
-
/* called under codec_resource_lock acquisition */
static void wcd9xxx_pause_hs_polling(struct wcd9xxx_mbhc *mbhc)
{
@@ -232,20 +173,18 @@
{
struct snd_soc_codec *codec = mbhc->codec;
int mbhc_state = mbhc->mbhc_state;
- int ret;
pr_debug("%s: enter\n", __func__);
if (!mbhc->polling_active) {
pr_debug("Polling is not active, do not start polling\n");
return;
}
-
snd_soc_write(codec, WCD9XXX_A_MBHC_SCALING_MUX_1, 0x04);
- ret = wcd9xxx_enable_mux_bias_block(codec, mbhc);
- if (ret) {
- pr_err("%s: Error returned, ret: %d\n", __func__, ret);
- return;
- }
+ if (mbhc->mbhc_cb && mbhc->mbhc_cb->enable_mux_bias_block)
+ mbhc->mbhc_cb->enable_mux_bias_block(codec);
+ else
+ snd_soc_update_bits(codec, WCD9XXX_A_MBHC_SCALING_MUX_1,
+ 0x80, 0x80);
if (!mbhc->no_mic_headset_override &&
mbhc_state == MBHC_STATE_POTENTIAL) {
@@ -484,14 +423,18 @@
(mbhc->mbhc_data.v_brl >> 8) & 0xFF);
}
-static int wcd9xxx_codec_switch_cfilt_mode(struct wcd9xxx_mbhc *mbhc,
+static void wcd9xxx_codec_switch_cfilt_mode(struct wcd9xxx_mbhc *mbhc,
bool fast)
{
struct snd_soc_codec *codec = mbhc->codec;
+ struct wcd9xxx_cfilt_mode cfilt_mode;
u8 reg_mode_val, cur_mode_val;
- switch (mbhc->mbhc_version) {
- case WCD9XXX_MBHC_VERSION_TAIKO:
+ if (mbhc->mbhc_cb && mbhc->mbhc_cb->switch_cfilt_mode) {
+ cfilt_mode = mbhc->mbhc_cb->switch_cfilt_mode(mbhc, fast);
+ reg_mode_val = cfilt_mode.reg_mode_val;
+ cur_mode_val = cfilt_mode.cur_mode_val;
+ } else {
if (fast)
reg_mode_val = WCD9XXX_CFILT_FAST_MODE;
else
@@ -499,50 +442,21 @@
cur_mode_val =
snd_soc_read(codec, mbhc->mbhc_bias_regs.cfilt_ctl) & 0x40;
-
- if (cur_mode_val != reg_mode_val) {
- if (mbhc->polling_active)
- wcd9xxx_pause_hs_polling(mbhc);
- snd_soc_update_bits(codec,
- mbhc->mbhc_bias_regs.cfilt_ctl,
- 0x40, reg_mode_val);
- if (mbhc->polling_active)
- wcd9xxx_start_hs_polling(mbhc);
- pr_debug("%s: CFILT mode change (%x to %x)\n", __func__,
- cur_mode_val, reg_mode_val);
- } else {
- pr_debug("%s: CFILT Value is already %x\n",
- __func__, cur_mode_val);
- }
- break;
- case WCD9XXX_MBHC_VERSION_TAPAN:
- if (fast)
- reg_mode_val = WCD9XXX_CFILT_EXT_PRCHG_EN;
- else
- reg_mode_val = WCD9XXX_CFILT_EXT_PRCHG_DSBL;
-
- cur_mode_val =
- snd_soc_read(codec, mbhc->mbhc_bias_regs.cfilt_ctl) & 0x70;
-
- if (cur_mode_val != reg_mode_val) {
- if (mbhc->polling_active)
- wcd9xxx_pause_hs_polling(mbhc);
- snd_soc_update_bits(codec,
- mbhc->mbhc_bias_regs.cfilt_ctl,
- 0x70, reg_mode_val);
- if (mbhc->polling_active)
- wcd9xxx_start_hs_polling(mbhc);
- pr_debug("%s: CFILT mode change (%x to %x)\n", __func__,
- cur_mode_val, reg_mode_val);
- } else {
- pr_debug("%s: CFILT Value is already %x\n",
- __func__, cur_mode_val);
- }
- break;
- default:
- return -EINVAL;
}
- return 0;
+ if (cur_mode_val != reg_mode_val) {
+ if (mbhc->polling_active)
+ wcd9xxx_pause_hs_polling(mbhc);
+ snd_soc_update_bits(codec,
+ mbhc->mbhc_bias_regs.cfilt_ctl,
+ 0x40, reg_mode_val);
+ if (mbhc->polling_active)
+ wcd9xxx_start_hs_polling(mbhc);
+ pr_debug("%s: CFILT mode change (%x to %x)\n", __func__,
+ cur_mode_val, reg_mode_val);
+ } else {
+ pr_debug("%s: CFILT Value is already %x\n",
+ __func__, cur_mode_val);
+ }
}
static void wcd9xxx_jack_report(struct wcd9xxx_mbhc *mbhc,
@@ -680,7 +594,7 @@
&mbhc->hph_pa_dac_state)) {
pr_debug("%s: HPHL clear flag and enable DAC\n", __func__);
snd_soc_update_bits(codec, WCD9XXX_A_RX_HPH_L_DAC_CTL,
- 0xC0, 0xC0);
+ 0x80, 0x80);
}
if (test_and_clear_bit(WCD9XXX_HPHR_PA_OFF_ACK,
@@ -1046,7 +960,6 @@
struct snd_soc_codec *codec = mbhc->codec;
short bias_value;
u8 cfilt_mode;
- int ret;
WCD9XXX_BCL_ASSERT_LOCKED(mbhc->resmgr);
@@ -1060,21 +973,28 @@
* Request BG and clock.
* These will be released by wcd9xxx_cleanup_hs_polling
*/
+ WCD9XXX_BG_CLK_LOCK(mbhc->resmgr);
wcd9xxx_resmgr_get_bandgap(mbhc->resmgr, WCD9XXX_BANDGAP_MBHC_MODE);
wcd9xxx_resmgr_get_clk_block(mbhc->resmgr, WCD9XXX_CLK_RCO);
+ WCD9XXX_BG_CLK_UNLOCK(mbhc->resmgr);
snd_soc_update_bits(codec, WCD9XXX_A_CLK_BUFF_EN1, 0x05, 0x01);
/* Make sure CFILT is in fast mode, save current mode */
cfilt_mode = snd_soc_read(codec, mbhc->mbhc_bias_regs.cfilt_ctl);
- ret = wcd9xxx_put_cfilt_fast_mode(codec, mbhc);
- if (ret)
- goto gen_err;
+ if (mbhc->mbhc_cb && mbhc->mbhc_cb->cfilt_fast_mode)
+ mbhc->mbhc_cb->cfilt_fast_mode(codec, mbhc);
+ else
+ snd_soc_update_bits(codec, mbhc->mbhc_bias_regs.cfilt_ctl,
+ 0x70, 0x00);
+
snd_soc_update_bits(codec, WCD9XXX_A_CDC_MBHC_CLK_CTL, 0x2, 0x2);
snd_soc_write(codec, WCD9XXX_A_MBHC_SCALING_MUX_1, 0x04);
- ret = wcd9xxx_enable_mux_bias_block(codec, mbhc);
- if (ret)
- goto gen_err;
+ if (mbhc->mbhc_cb && mbhc->mbhc_cb->enable_mux_bias_block)
+ mbhc->mbhc_cb->enable_mux_bias_block(codec);
+ else
+ snd_soc_update_bits(codec, WCD9XXX_A_MBHC_SCALING_MUX_1,
+ 0x80, 0x80);
snd_soc_update_bits(codec, WCD9XXX_A_TX_7_MBHC_EN, 0x80, 0x80);
snd_soc_update_bits(codec, WCD9XXX_A_TX_7_MBHC_EN, 0x1F, 0x1C);
@@ -1095,10 +1015,6 @@
snd_soc_update_bits(codec, WCD9XXX_A_MBHC_HPH, 0x13, 0x00);
return bias_value;
-
-gen_err:
- pr_err("%s: Error returned, ret: %d\n", __func__, ret);
- return ret;
}
static void wcd9xxx_shutdown_hs_removal_detect(struct wcd9xxx_mbhc *mbhc)
@@ -1108,7 +1024,9 @@
WCD9XXX_MBHC_CAL_GENERAL_PTR(mbhc->mbhc_cfg->calibration);
/* Need MBHC clock */
+ WCD9XXX_BG_CLK_LOCK(mbhc->resmgr);
wcd9xxx_resmgr_get_clk_block(mbhc->resmgr, WCD9XXX_CLK_RCO);
+ WCD9XXX_BG_CLK_UNLOCK(mbhc->resmgr);
snd_soc_update_bits(codec, WCD9XXX_A_CDC_MBHC_CLK_CTL, 0x2, 0x2);
snd_soc_update_bits(codec, WCD9XXX_A_CDC_MBHC_B1_CTL, 0x6, 0x0);
@@ -1119,8 +1037,10 @@
snd_soc_update_bits(codec, WCD9XXX_A_CDC_MBHC_CLK_CTL, 0xA, 0x8);
+ WCD9XXX_BG_CLK_LOCK(mbhc->resmgr);
/* Put requested CLK back */
wcd9xxx_resmgr_put_clk_block(mbhc->resmgr, WCD9XXX_CLK_RCO);
+ WCD9XXX_BG_CLK_UNLOCK(mbhc->resmgr);
snd_soc_write(codec, WCD9XXX_A_MBHC_SCALING_MUX_1, 0x00);
}
@@ -1132,8 +1052,10 @@
wcd9xxx_shutdown_hs_removal_detect(mbhc);
/* Release clock and BG requested by wcd9xxx_mbhc_setup_hs_polling */
+ WCD9XXX_BG_CLK_LOCK(mbhc->resmgr);
wcd9xxx_resmgr_put_clk_block(mbhc->resmgr, WCD9XXX_CLK_RCO);
wcd9xxx_resmgr_put_bandgap(mbhc->resmgr, WCD9XXX_BANDGAP_MBHC_MODE);
+ WCD9XXX_BG_CLK_UNLOCK(mbhc->resmgr);
mbhc->polling_active = false;
mbhc->mbhc_state = MBHC_STATE_NONE;
@@ -2922,7 +2844,6 @@
{
u8 cfilt_mode;
u16 reg0, reg1;
- int ret;
struct snd_soc_codec *codec = mbhc->codec;
pr_debug("%s: enter\n", __func__);
@@ -2939,21 +2860,30 @@
* Need to restore defaults once calculation is done.
*/
cfilt_mode = snd_soc_read(codec, mbhc->mbhc_bias_regs.cfilt_ctl);
- ret = wcd9xxx_put_cfilt_fast_mode(codec, mbhc);
- if (ret)
- goto gen_err;
+ if (mbhc->mbhc_cb && mbhc->mbhc_cb->cfilt_fast_mode)
+ mbhc->mbhc_cb->cfilt_fast_mode(codec, mbhc);
+ else
+ snd_soc_update_bits(codec, mbhc->mbhc_bias_regs.cfilt_ctl,
+ 0x40, 0x00);
+
/*
* Micbias, CFILT, LDOH, MBHC MUX mode settings
* to perform ADC calibration
*/
+ if (mbhc->mbhc_cb && mbhc->mbhc_cb->select_cfilt)
+ mbhc->mbhc_cb->select_cfilt(codec, mbhc);
+ else
snd_soc_update_bits(codec, mbhc->mbhc_bias_regs.ctl_reg, 0x60,
mbhc->mbhc_cfg->micbias << 5);
snd_soc_update_bits(codec, mbhc->mbhc_bias_regs.ctl_reg, 0x01, 0x00);
snd_soc_update_bits(codec, WCD9XXX_A_LDO_H_MODE_1, 0x60, 0x60);
snd_soc_write(codec, WCD9XXX_A_TX_7_MBHC_TEST_CTL, 0x78);
- ret = wcd9xxx_codec_specific_cal_setup(codec, mbhc);
- if (ret)
- goto gen_err;
+ if (mbhc->mbhc_cb && mbhc->mbhc_cb->codec_specific_cal)
+ mbhc->mbhc_cb->codec_specific_cal(codec, mbhc);
+ else
+ snd_soc_update_bits(codec, WCD9XXX_A_CDC_MBHC_B1_CTL,
+ 0x04, 0x04);
+
/* Pull down micbias to ground */
reg0 = snd_soc_read(codec, mbhc->mbhc_bias_regs.ctl_reg);
snd_soc_update_bits(codec, mbhc->mbhc_bias_regs.ctl_reg, 1, 1);
@@ -2962,9 +2892,11 @@
snd_soc_update_bits(codec, WCD9XXX_A_MAD_ANA_CTRL, 1 << 4, 1 << 0);
/* Connect the MUX to micbias */
snd_soc_write(codec, WCD9XXX_A_MBHC_SCALING_MUX_1, 0x02);
- ret = wcd9xxx_enable_mux_bias_block(codec, mbhc);
- if (ret)
- goto gen_err;
+ if (mbhc->mbhc_cb && mbhc->mbhc_cb->enable_mux_bias_block)
+ mbhc->mbhc_cb->enable_mux_bias_block(codec);
+ else
+ snd_soc_update_bits(codec, WCD9XXX_A_MBHC_SCALING_MUX_1,
+ 0x80, 0x80);
/*
* Hardware that has external cap can delay mic bias ramping down up
* to 50ms.
@@ -2986,9 +2918,11 @@
snd_soc_write(codec, WCD9XXX_A_CDC_MBHC_CLK_CTL, 0x0A);
snd_soc_write(codec, WCD9XXX_A_CDC_MBHC_CLK_CTL, 0x02);
snd_soc_write(codec, WCD9XXX_A_MBHC_SCALING_MUX_1, 0x02);
- ret = wcd9xxx_enable_mux_bias_block(codec, mbhc);
- if (ret)
- goto gen_err;
+ if (mbhc->mbhc_cb && mbhc->mbhc_cb->enable_mux_bias_block)
+ mbhc->mbhc_cb->enable_mux_bias_block(codec);
+ else
+ snd_soc_update_bits(codec, WCD9XXX_A_MBHC_SCALING_MUX_1,
+ 0x80, 0x80);
/*
* Hardware that has external cap can delay mic bias ramping down up
* to 50ms.
@@ -3003,9 +2937,11 @@
snd_soc_write(codec, WCD9XXX_A_CDC_MBHC_EN_CTL, 0x02);
snd_soc_write(codec, WCD9XXX_A_CDC_MBHC_CLK_CTL, 0x02);
snd_soc_write(codec, WCD9XXX_A_MBHC_SCALING_MUX_1, 0x02);
- ret = wcd9xxx_enable_mux_bias_block(codec, mbhc);
- if (ret)
- goto gen_err;
+ if (mbhc->mbhc_cb && mbhc->mbhc_cb->enable_mux_bias_block)
+ mbhc->mbhc_cb->enable_mux_bias_block(codec);
+ else
+ snd_soc_update_bits(codec, WCD9XXX_A_MBHC_SCALING_MUX_1,
+ 0x80, 0x80);
/*
* Hardware that has external cap can delay mic bias ramping down up
* to 50ms.
@@ -3019,19 +2955,17 @@
snd_soc_update_bits(codec, WCD9XXX_A_CDC_MBHC_B1_CTL, 0x04, 0x00);
snd_soc_write(codec, mbhc->mbhc_bias_regs.cfilt_ctl, cfilt_mode);
snd_soc_write(codec, WCD9XXX_A_MBHC_SCALING_MUX_1, 0x04);
- ret = wcd9xxx_enable_mux_bias_block(codec, mbhc);
- if (ret)
- goto gen_err;
+ if (mbhc->mbhc_cb && mbhc->mbhc_cb->enable_mux_bias_block)
+ mbhc->mbhc_cb->enable_mux_bias_block(codec);
+ else
+ snd_soc_update_bits(codec, WCD9XXX_A_MBHC_SCALING_MUX_1,
+ 0x80, 0x80);
usleep_range(100, 100);
wcd9xxx_enable_irq(codec->control_data, WCD9XXX_IRQ_MBHC_POTENTIAL);
wcd9xxx_turn_onoff_rel_detection(codec, true);
pr_debug("%s: leave\n", __func__);
- return;
-
-gen_err:
- pr_err("%s: Error returned, ret: %d\n", __func__, ret);
}
static void wcd9xxx_mbhc_setup(struct wcd9xxx_mbhc *mbhc)
@@ -3090,8 +3024,14 @@
{
int ret = 0;
void *core = mbhc->resmgr->core;
+ struct snd_soc_codec *codec = mbhc->codec;
int jack_irq;
+ if (mbhc->mbhc_cb && mbhc->mbhc_cb->jack_detect_irq)
+ jack_irq = mbhc->mbhc_cb->jack_detect_irq(codec);
+ else
+ jack_irq = WCD9XXX_IRQ_MBHC_JACK_SWITCH_DEFAULT;
+
if (mbhc->mbhc_cfg->gpio) {
ret = request_threaded_irq(mbhc->mbhc_cfg->gpio_irq, NULL,
wcd9xxx_mech_plug_detect_irq,
@@ -3113,17 +3053,6 @@
snd_soc_update_bits(mbhc->codec, WCD9XXX_A_RX_HPH_OCP_CTL,
1 << 1, 1 << 1);
- switch (mbhc->mbhc_version) {
- case WCD9XXX_MBHC_VERSION_TAIKO:
- jack_irq = WCD9XXX_IRQ_MBHC_JACK_SWITCH_TAIKO;
- break;
- case WCD9XXX_MBHC_VERSION_TAPAN:
- jack_irq = WCD9XXX_IRQ_MBHC_JACK_SWITCH_TAPAN;
- break;
- default:
- return -EINVAL;
- }
-
ret = wcd9xxx_request_irq(core, jack_irq,
wcd9xxx_mech_plug_detect_irq,
"Jack Detect",
@@ -3352,7 +3281,7 @@
int wcd9xxx_mbhc_start(struct wcd9xxx_mbhc *mbhc,
struct wcd9xxx_mbhc_config *mbhc_cfg)
{
- int rc;
+ int rc = 0;
struct snd_soc_codec *codec = mbhc->codec;
pr_debug("%s: enter\n", __func__);
@@ -3376,10 +3305,13 @@
wcd9xxx_get_mbhc_micbias_regs(mbhc, &mbhc->mbhc_bias_regs);
/* Put CFILT in fast mode by default */
- rc = wcd9xxx_put_cfilt_fast_mode(codec, mbhc);
- if (rc)
- pr_err("%s: Error returned, ret: %d\n", __func__, rc);
- else if (!mbhc->mbhc_cfg->read_fw_bin)
+ if (mbhc->mbhc_cb && mbhc->mbhc_cb->cfilt_fast_mode)
+ mbhc->mbhc_cb->cfilt_fast_mode(codec, mbhc);
+ else
+ snd_soc_update_bits(codec, mbhc->mbhc_bias_regs.cfilt_ctl,
+ 0x40, WCD9XXX_CFILT_FAST_MODE);
+
+ if (!mbhc->mbhc_cfg->read_fw_bin)
rc = wcd9xxx_init_and_calibrate(mbhc);
else
schedule_delayed_work(&mbhc->mbhc_firmware_dwork,
@@ -3607,7 +3539,7 @@
* Switch CFILT to slow mode if MBHC CFILT is being
* used.
*/
- ret = wcd9xxx_codec_switch_cfilt_mode(mbhc, false);
+ wcd9xxx_codec_switch_cfilt_mode(mbhc, false);
break;
case WCD9XXX_EVENT_POST_CFILT_1_OFF:
case WCD9XXX_EVENT_POST_CFILT_2_OFF:
@@ -3618,7 +3550,7 @@
* Switch CFILT to fast mode if MBHC CFILT is not
* used anymore.
*/
- ret = wcd9xxx_codec_switch_cfilt_mode(mbhc, true);
+ wcd9xxx_codec_switch_cfilt_mode(mbhc, true);
break;
/* System resume */
case WCD9XXX_EVENT_POST_RESUME:
@@ -3651,8 +3583,7 @@
int wcd9xxx_mbhc_init(struct wcd9xxx_mbhc *mbhc, struct wcd9xxx_resmgr *resmgr,
struct snd_soc_codec *codec,
int (*micbias_enable_cb) (struct snd_soc_codec*, bool),
- int version,
- int rco_clk_rate)
+ const struct wcd9xxx_mbhc_cb *mbhc_cb, int rco_clk_rate)
{
int ret;
void *core;
@@ -3676,8 +3607,8 @@
mbhc->resmgr = resmgr;
mbhc->resmgr->mbhc = mbhc;
mbhc->micbias_enable_cb = micbias_enable_cb;
- mbhc->mbhc_version = version;
mbhc->rco_clk_rate = rco_clk_rate;
+ mbhc->mbhc_cb = mbhc_cb;
if (mbhc->headset_jack.jack == NULL) {
ret = snd_soc_jack_new(codec, "Headset Jack", WCD9XXX_JACK_MASK,
@@ -3800,7 +3731,12 @@
wcd9xxx_free_irq(cdata, WCD9XXX_IRQ_MBHC_REMOVAL, mbhc);
wcd9xxx_free_irq(cdata, WCD9XXX_IRQ_MBHC_INSERTION, mbhc);
- wcd9xxx_free_irq(cdata, WCD9XXX_IRQ_MBHC_JACK_SWITCH, mbhc);
+ if (mbhc->mbhc_cb && mbhc->mbhc_cb->free_irq)
+ mbhc->mbhc_cb->free_irq(mbhc);
+ else
+ wcd9xxx_free_irq(cdata, WCD9320_IRQ_MBHC_JACK_SWITCH,
+ mbhc);
+
wcd9xxx_free_irq(cdata, WCD9XXX_IRQ_HPH_PA_OCPL_FAULT, mbhc);
wcd9xxx_free_irq(cdata, WCD9XXX_IRQ_HPH_PA_OCPR_FAULT, mbhc);
diff --git a/sound/soc/codecs/wcd9xxx-mbhc.h b/sound/soc/codecs/wcd9xxx-mbhc.h
index 71a62b2..02ecced 100644
--- a/sound/soc/codecs/wcd9xxx-mbhc.h
+++ b/sound/soc/codecs/wcd9xxx-mbhc.h
@@ -16,8 +16,8 @@
#define WCD9XXX_CFILT_FAST_MODE 0x00
#define WCD9XXX_CFILT_SLOW_MODE 0x40
-#define WCD9XXX_CFILT_EXT_PRCHG_EN 0x70
-#define WCD9XXX_CFILT_EXT_PRCHG_DSBL 0x40
+#define WCD9XXX_CFILT_EXT_PRCHG_EN 0x30
+#define WCD9XXX_CFILT_EXT_PRCHG_DSBL 0x00
struct mbhc_micbias_regs {
u16 cfilt_val;
@@ -61,12 +61,6 @@
s16 v_inval_ins_high;
};
-enum wcd9xxx_mbhc_version {
- WCD9XXX_MBHC_VERSION_UNKNOWN = 0,
- WCD9XXX_MBHC_VERSION_TAIKO,
- WCD9XXX_MBHC_VERSION_TAPAN,
-};
-
enum wcd9xxx_mbhc_plug_type {
PLUG_TYPE_INVALID = -1,
PLUG_TYPE_NONE,
@@ -218,6 +212,23 @@
bool (*swap_gnd_mic) (struct snd_soc_codec *);
};
+struct wcd9xxx_cfilt_mode {
+ u8 reg_mode_val;
+ u8 cur_mode_val;
+};
+
+struct wcd9xxx_mbhc_cb {
+ void (*enable_mux_bias_block) (struct snd_soc_codec *);
+ void (*cfilt_fast_mode) (struct snd_soc_codec *, struct wcd9xxx_mbhc *);
+ void (*codec_specific_cal) (struct snd_soc_codec *,
+ struct wcd9xxx_mbhc *);
+ int (*jack_detect_irq) (struct snd_soc_codec *);
+ struct wcd9xxx_cfilt_mode (*switch_cfilt_mode) (struct wcd9xxx_mbhc *,
+ bool);
+ void (*select_cfilt) (struct snd_soc_codec *, struct wcd9xxx_mbhc *);
+ void (*free_irq) (struct wcd9xxx_mbhc *);
+};
+
struct wcd9xxx_mbhc {
bool polling_active;
/* Delayed work to report long button press */
@@ -225,6 +236,7 @@
int buttons_pressed;
enum wcd9xxx_mbhc_state mbhc_state;
struct wcd9xxx_mbhc_config *mbhc_cfg;
+ const struct wcd9xxx_mbhc_cb *mbhc_cb;
struct mbhc_internal_cal_data mbhc_data;
@@ -279,8 +291,6 @@
bool micbias_enable;
int (*micbias_enable_cb) (struct snd_soc_codec*, bool);
- enum wcd9xxx_mbhc_version mbhc_version;
-
u32 rco_clk_rate;
#ifdef CONFIG_DEBUG_FS
@@ -349,7 +359,7 @@
int wcd9xxx_mbhc_init(struct wcd9xxx_mbhc *mbhc, struct wcd9xxx_resmgr *resmgr,
struct snd_soc_codec *codec,
int (*micbias_enable_cb) (struct snd_soc_codec*, bool),
- int version,
+ const struct wcd9xxx_mbhc_cb *mbhc_cb,
int rco_clk_rate);
void wcd9xxx_mbhc_deinit(struct wcd9xxx_mbhc *mbhc);
void *wcd9xxx_mbhc_cal_btn_det_mp(
diff --git a/sound/soc/codecs/wcd9xxx-resmgr.c b/sound/soc/codecs/wcd9xxx-resmgr.c
index 77dbd36..be11e53 100644
--- a/sound/soc/codecs/wcd9xxx-resmgr.c
+++ b/sound/soc/codecs/wcd9xxx-resmgr.c
@@ -179,7 +179,7 @@
struct snd_soc_codec *codec = resmgr->codec;
pr_debug("%s: enter\n", __func__);
- WCD9XXX_BCL_ASSERT_LOCKED(resmgr);
+ WCD9XXX_BG_CLK_ASSERT_LOCKED(resmgr);
/* Notify */
if (resmgr->clk_type == WCD9XXX_CLK_RCO)
@@ -209,8 +209,8 @@
int old_clk_rco_users, old_clk_mclk_users;
pr_debug("%s: enter\n", __func__);
- WCD9XXX_BCL_ASSERT_LOCKED(resmgr);
+ WCD9XXX_BG_CLK_LOCK(resmgr);
old_bg_audio_users = resmgr->bg_audio_users;
old_bg_mbhc_users = resmgr->bg_mbhc_users;
old_clk_rco_users = resmgr->clk_rco_users;
@@ -243,6 +243,7 @@
while (old_clk_rco_users--)
wcd9xxx_resmgr_get_clk_block(resmgr, WCD9XXX_CLK_RCO);
}
+ WCD9XXX_BG_CLK_UNLOCK(resmgr);
pr_debug("%s: leave\n", __func__);
}
@@ -257,7 +258,7 @@
pr_debug("%s: enter, wants %d\n", __func__, choice);
- WCD9XXX_BCL_ASSERT_LOCKED(resmgr);
+ WCD9XXX_BG_CLK_ASSERT_LOCKED(resmgr);
switch (choice) {
case WCD9XXX_BANDGAP_AUDIO_MODE:
resmgr->bg_audio_users++;
@@ -319,7 +320,7 @@
pr_debug("%s: enter choice %d\n", __func__, choice);
- WCD9XXX_BCL_ASSERT_LOCKED(resmgr);
+ WCD9XXX_BG_CLK_ASSERT_LOCKED(resmgr);
switch (choice) {
case WCD9XXX_BANDGAP_AUDIO_MODE:
if (--resmgr->bg_audio_users == 0) {
@@ -450,7 +451,7 @@
*/
static enum wcd9xxx_clock_type wcd9xxx_save_clock(struct wcd9xxx_resmgr *resmgr)
{
- WCD9XXX_BCL_ASSERT_LOCKED(resmgr);
+ WCD9XXX_BG_CLK_ASSERT_LOCKED(resmgr);
if (resmgr->clk_type != WCD9XXX_CLK_OFF)
wcd9xxx_disable_clock_block(resmgr);
return resmgr->clk_type != WCD9XXX_CLK_OFF;
@@ -469,7 +470,7 @@
pr_debug("%s: current %d, requested %d, rco_users %d, mclk_users %d\n",
__func__, resmgr->clk_type, type,
resmgr->clk_rco_users, resmgr->clk_mclk_users);
- WCD9XXX_BCL_ASSERT_LOCKED(resmgr);
+ WCD9XXX_BG_CLK_ASSERT_LOCKED(resmgr);
switch (type) {
case WCD9XXX_CLK_RCO:
if (++resmgr->clk_rco_users == 1 &&
@@ -510,7 +511,7 @@
{
pr_debug("%s: current %d, put %d\n", __func__, resmgr->clk_type, type);
- WCD9XXX_BCL_ASSERT_LOCKED(resmgr);
+ WCD9XXX_BG_CLK_ASSERT_LOCKED(resmgr);
switch (type) {
case WCD9XXX_CLK_RCO:
if (--resmgr->clk_rco_users == 0 &&
@@ -776,6 +777,7 @@
BLOCKING_INIT_NOTIFIER_HEAD(&resmgr->notifier);
mutex_init(&resmgr->codec_resource_lock);
+ mutex_init(&resmgr->codec_bg_clk_lock);
mutex_init(&resmgr->update_bit_cond_lock);
return 0;
@@ -784,6 +786,7 @@
void wcd9xxx_resmgr_deinit(struct wcd9xxx_resmgr *resmgr)
{
mutex_destroy(&resmgr->update_bit_cond_lock);
+ mutex_destroy(&resmgr->codec_bg_clk_lock);
mutex_destroy(&resmgr->codec_resource_lock);
}
diff --git a/sound/soc/codecs/wcd9xxx-resmgr.h b/sound/soc/codecs/wcd9xxx-resmgr.h
index b5f950c..aaf7317 100644
--- a/sound/soc/codecs/wcd9xxx-resmgr.h
+++ b/sound/soc/codecs/wcd9xxx-resmgr.h
@@ -106,10 +106,18 @@
u32 rx_bias_count;
+ /*
+ * bandgap_type, bg_audio_users and bg_mbhc_users have to be
+ * referred/manipulated after acquiring codec_bg_clk_lock mutex
+ */
enum wcd9xxx_bandgap_type bandgap_type;
u16 bg_audio_users;
u16 bg_mbhc_users;
+ /*
+ * clk_type, clk_rco_users and clk_mclk_users have to be
+ * referred/manipulated after acquiring codec_bg_clk_lock mutex
+ */
enum wcd9xxx_clock_type clk_type;
u16 clk_rco_users;
u16 clk_mclk_users;
@@ -136,6 +144,7 @@
* general lock to protect codec resource
*/
struct mutex codec_resource_lock;
+ struct mutex codec_bg_clk_lock;
};
int wcd9xxx_resmgr_init(struct wcd9xxx_resmgr *resmgr,
@@ -183,6 +192,27 @@
"%s: BCL should have acquired\n", __func__); \
}
+#define WCD9XXX_BG_CLK_LOCK(resmgr) \
+{ \
+ struct wcd9xxx_resmgr *__resmgr = resmgr; \
+ pr_debug("%s: Acquiring BG_CLK\n", __func__); \
+ mutex_lock(&__resmgr->codec_bg_clk_lock); \
+ pr_debug("%s: Acquiring BG_CLK done\n", __func__); \
+}
+
+#define WCD9XXX_BG_CLK_UNLOCK(resmgr) \
+{ \
+ struct wcd9xxx_resmgr *__resmgr = resmgr; \
+ pr_debug("%s: Releasing BG_CLK\n", __func__); \
+ mutex_unlock(&__resmgr->codec_bg_clk_lock); \
+}
+
+#define WCD9XXX_BG_CLK_ASSERT_LOCKED(resmgr) \
+{ \
+ WARN_ONCE(!mutex_is_locked(&resmgr->codec_bg_clk_lock), \
+ "%s: BG_CLK lock should have acquired\n", __func__); \
+}
+
const char *wcd9xxx_get_event_string(enum wcd9xxx_notify_event type);
int wcd9xxx_resmgr_get_k_val(struct wcd9xxx_resmgr *resmgr,
unsigned int cfilt_mv);
diff --git a/sound/soc/msm/msm-dai-q6.c b/sound/soc/msm/msm-dai-q6.c
index d973c17..171db0a 100644
--- a/sound/soc/msm/msm-dai-q6.c
+++ b/sound/soc/msm/msm-dai-q6.c
@@ -1805,7 +1805,7 @@
SNDRV_PCM_RATE_192000,
.formats = SNDRV_PCM_FMTBIT_S16_LE,
.channels_min = 1,
- .channels_max = 5,
+ .channels_max = 8,
.rate_min = 8000,
.rate_max = 192000,
},
diff --git a/sound/soc/msm/msm-pcm-host-voice.c b/sound/soc/msm/msm-pcm-host-voice.c
index 36826cc..2eafc1d 100644
--- a/sound/soc/msm/msm-pcm-host-voice.c
+++ b/sound/soc/msm/msm-pcm-host-voice.c
@@ -941,7 +941,8 @@
struct hpcm_buf_node, list);
list_del(&buf_node->list);
spin_unlock_irqrestore(&dai_data->dsp_lock, dsp_flags);
- ret = copy_from_user(&buf_node->frame, buf, count);
+ ret = copy_from_user(&buf_node->frame.voc_pkt,
+ buf, count);
buf_node->frame.len = count;
spin_lock_irqsave(&dai_data->dsp_lock, dsp_flags);
list_add_tail(&buf_node->list, &dai_data->filled_queue);
@@ -986,7 +987,9 @@
struct hpcm_buf_node, list);
list_del(&buf_node->list);
spin_unlock_irqrestore(&dai_data->dsp_lock, dsp_flags);
- ret = copy_to_user(buf, &buf_node->frame, count);
+ ret = copy_to_user(buf,
+ &buf_node->frame.voc_pkt,
+ count);
if (ret) {
pr_err("%s: Copy to user retuned %d\n",
__func__, ret);
diff --git a/sound/soc/msm/msm8226.c b/sound/soc/msm/msm8226.c
index 1d3779f..5dfd326 100644
--- a/sound/soc/msm/msm8226.c
+++ b/sound/soc/msm/msm8226.c
@@ -72,7 +72,7 @@
.gpio_irq = 0,
.gpio_level_insert = 0,
.detect_extn_cable = true,
- .micbias_enable_flags = 0,
+ .micbias_enable_flags = 1 << MBHC_MICBIAS_ENABLE_THRESHOLD_HEADSET,
.insert_detect = true,
.swap_gnd_mic = NULL,
};
@@ -126,6 +126,7 @@
static struct clk *codec_clk;
static int clk_users;
static int vdd_spkr_gpio = -1;
+static int msm_proxy_rx_ch = 2;
static int msm_snd_enable_codec_ext_clk(struct snd_soc_codec *codec, int enable,
bool dapm)
@@ -147,7 +148,6 @@
if (clk_users != 1)
goto exit;
if (codec_clk) {
- clk_set_rate(codec_clk, TAPAN_EXT_CLK_RATE);
clk_prepare_enable(codec_clk);
tapan_mclk_enable(codec, 1, dapm);
} else {
@@ -236,6 +236,8 @@
static const char *const slim0_rx_ch_text[] = {"One", "Two"};
static const char *const slim0_tx_ch_text[] = {"One", "Two", "Three", "Four"};
+static const char *const proxy_rx_ch_text[] = {"One", "Two", "Three", "Four",
+ "Five", "Six", "Seven", "Eight"};
static const struct soc_enum msm_enum[] = {
SOC_ENUM_SINGLE_EXT(2, slim0_rx_ch_text),
@@ -296,10 +298,10 @@
struct snd_ctl_elem_value *ucontrol)
{
switch (ucontrol->value.integer.value[0]) {
- case 0:
+ case 8000:
msm_btsco_rate = BTSCO_RATE_8KHZ;
break;
- case 1:
+ case 16000:
msm_btsco_rate = BTSCO_RATE_16KHZ;
break;
default:
@@ -311,11 +313,6 @@
return 0;
}
-static const struct snd_kcontrol_new int_btsco_rate_mixer_controls[] = {
- SOC_ENUM_EXT("Internal BTSCO SampleRate", msm_btsco_enum[0],
- msm_btsco_rate_get, msm_btsco_rate_put),
-};
-
static int msm_btsco_be_hw_params_fixup(struct snd_soc_pcm_runtime *rtd,
struct snd_pcm_hw_params *params)
{
@@ -355,6 +352,23 @@
return 0;
}
+static int msm_proxy_rx_ch_get(struct snd_kcontrol *kcontrol,
+ struct snd_ctl_elem_value *ucontrol)
+{
+ pr_debug("%s: msm_proxy_rx_ch = %d\n", __func__,
+ msm_proxy_rx_ch);
+ ucontrol->value.integer.value[0] = msm_proxy_rx_ch - 1;
+ return 0;
+}
+
+static int msm_proxy_rx_ch_put(struct snd_kcontrol *kcontrol,
+ struct snd_ctl_elem_value *ucontrol)
+{
+ msm_proxy_rx_ch = ucontrol->value.integer.value[0] + 1;
+ pr_debug("%s: msm_proxy_rx_ch = %d\n", __func__,
+ msm_proxy_rx_ch);
+ return 1;
+}
static int msm_auxpcm_be_params_fixup(struct snd_soc_pcm_runtime *rtd,
struct snd_pcm_hw_params *params)
{
@@ -370,15 +384,31 @@
return 0;
}
-static int msm_proxy_be_hw_params_fixup(struct snd_soc_pcm_runtime *rtd,
- struct snd_pcm_hw_params *params)
+static int msm_proxy_rx_be_hw_params_fixup(struct snd_soc_pcm_runtime *rtd,
+ struct snd_pcm_hw_params *params)
{
struct snd_interval *rate = hw_param_interval(params,
- SNDRV_PCM_HW_PARAM_RATE);
+ SNDRV_PCM_HW_PARAM_RATE);
- pr_debug("%s()\n", __func__);
+ struct snd_interval *channels = hw_param_interval(params,
+ SNDRV_PCM_HW_PARAM_CHANNELS);
+
+ pr_debug("%s: msm_proxy_rx_ch =%d\n", __func__, msm_proxy_rx_ch);
+
+ if (channels->max < 2)
+ channels->min = channels->max = 2;
+ channels->min = channels->max = msm_proxy_rx_ch;
rate->min = rate->max = 48000;
+ return 0;
+}
+static int msm_proxy_tx_be_hw_params_fixup(struct snd_soc_pcm_runtime *rtd,
+ struct snd_pcm_hw_params *params)
+{
+ struct snd_interval *rate = hw_param_interval(params,
+ SNDRV_PCM_HW_PARAM_RATE);
+
+ rate->min = rate->max = 48000;
return 0;
}
@@ -541,6 +571,7 @@
static const struct soc_enum msm_snd_enum[] = {
SOC_ENUM_SINGLE_EXT(2, slim0_rx_ch_text),
SOC_ENUM_SINGLE_EXT(4, slim0_tx_ch_text),
+ SOC_ENUM_SINGLE_EXT(8, proxy_rx_ch_text),
};
static const struct snd_kcontrol_new msm_snd_controls[] = {
@@ -550,6 +581,10 @@
msm_slim_0_tx_ch_get, msm_slim_0_tx_ch_put),
SOC_ENUM_EXT("AUX PCM SampleRate", msm8226_auxpcm_enum[0],
msm8226_auxpcm_rate_get, msm8226_auxpcm_rate_put),
+ SOC_ENUM_EXT("Internal BTSCO SampleRate", msm_btsco_enum[0],
+ msm_btsco_rate_get, msm_btsco_rate_put),
+ SOC_ENUM_EXT("PROXY_RX Channels", msm_snd_enum[2],
+ msm_proxy_rx_ch_get, msm_proxy_rx_ch_put),
};
static int msm_audrx_init(struct snd_soc_pcm_runtime *rtd)
@@ -1053,7 +1088,7 @@
.codec_dai_name = "msm-stub-rx",
.no_pcm = 1,
.be_id = MSM_BACKEND_DAI_AFE_PCM_RX,
- .be_hw_params_fixup = msm_proxy_be_hw_params_fixup,
+ .be_hw_params_fixup = msm_proxy_rx_be_hw_params_fixup,
/* this dainlink has playback support */
.ignore_pmdown_time = 1,
.ignore_suspend = 1,
@@ -1067,7 +1102,7 @@
.codec_dai_name = "msm-stub-tx",
.no_pcm = 1,
.be_id = MSM_BACKEND_DAI_AFE_PCM_TX,
- .be_hw_params_fixup = msm_proxy_be_hw_params_fixup,
+ .be_hw_params_fixup = msm_proxy_tx_be_hw_params_fixup,
.ignore_suspend = 1,
},
/* HDMI Hostless */
diff --git a/sound/soc/msm/msm8974.c b/sound/soc/msm/msm8974.c
index daa2eca..0a86221 100644
--- a/sound/soc/msm/msm8974.c
+++ b/sound/soc/msm/msm8974.c
@@ -639,7 +639,6 @@
goto exit;
if (codec_clk) {
- clk_set_rate(codec_clk, TAIKO_EXT_CLK_RATE);
clk_prepare_enable(codec_clk);
taiko_mclk_enable(codec, 1, dapm);
} else {
@@ -712,7 +711,8 @@
static const char *const spk_function[] = {"Off", "On"};
static const char *const slim0_rx_ch_text[] = {"One", "Two"};
static const char *const slim0_tx_ch_text[] = {"One", "Two", "Three", "Four",
- "Five"};
+ "Five", "Six", "Seven",
+ "Eight"};
static char const *hdmi_rx_ch_text[] = {"Two", "Three", "Four", "Five",
"Six", "Seven", "Eight"};
static char const *rx_bit_format_text[] = {"S16_LE", "S24_LE"};
@@ -863,10 +863,10 @@
struct snd_ctl_elem_value *ucontrol)
{
switch (ucontrol->value.integer.value[0]) {
- case 0:
+ case 8000:
msm_btsco_rate = BTSCO_RATE_8KHZ;
break;
- case 1:
+ case 16000:
msm_btsco_rate = BTSCO_RATE_16KHZ;
break;
default:
@@ -941,11 +941,6 @@
return 1;
}
-static const struct snd_kcontrol_new int_btsco_rate_mixer_controls[] = {
- SOC_ENUM_EXT("Internal BTSCO SampleRate", msm_btsco_enum[0],
- msm_btsco_rate_get, msm_btsco_rate_put),
-};
-
static int msm_btsco_be_hw_params_fixup(struct snd_soc_pcm_runtime *rtd,
struct snd_pcm_hw_params *params)
{
@@ -1325,7 +1320,7 @@
static const struct soc_enum msm_snd_enum[] = {
SOC_ENUM_SINGLE_EXT(2, spk_function),
SOC_ENUM_SINGLE_EXT(2, slim0_rx_ch_text),
- SOC_ENUM_SINGLE_EXT(5, slim0_tx_ch_text),
+ SOC_ENUM_SINGLE_EXT(8, slim0_tx_ch_text),
SOC_ENUM_SINGLE_EXT(7, hdmi_rx_ch_text),
SOC_ENUM_SINGLE_EXT(2, rx_bit_format_text),
SOC_ENUM_SINGLE_EXT(3, slim0_rx_sample_rate_text),
@@ -1351,6 +1346,8 @@
hdmi_rx_bit_format_get, hdmi_rx_bit_format_put),
SOC_ENUM_EXT("PROXY_RX Channels", msm_snd_enum[6],
msm_proxy_rx_ch_get, msm_proxy_rx_ch_put),
+ SOC_ENUM_EXT("Internal BTSCO SampleRate", msm_btsco_enum[0],
+ msm_btsco_rate_get, msm_btsco_rate_put),
};
static bool msm8974_swap_gnd_mic(struct snd_soc_codec *codec)
diff --git a/sound/soc/msm/msm8x10.c b/sound/soc/msm/msm8x10.c
index 96f78d9..4d9632c 100644
--- a/sound/soc/msm/msm8x10.c
+++ b/sound/soc/msm/msm8x10.c
@@ -34,20 +34,20 @@
#define BTSCO_RATE_8KHZ 8000
#define BTSCO_RATE_16KHZ 16000
+/* It takes about 13ms for Class-D PAs to ramp-up */
+#define EXT_CLASS_D_EN_DELAY 13000
+#define EXT_CLASS_D_DIS_DELAY 3000
+#define EXT_CLASS_D_DELAY_DELTA 2000
+
+
static int msm_btsco_rate = BTSCO_RATE_8KHZ;
static int msm_btsco_ch = 1;
static int msm_proxy_rx_ch = 2;
static struct snd_soc_jack hs_jack;
+static struct platform_device *spdev;
+static int ext_spk_amp_gpio = -1;
-#define MSM8X10_DINO_LPASS_AUDIO_CORE_DIG_CODEC_CLK_SEL 0xFE03B004
-#define MSM8X10_DINO_LPASS_DIGCODEC_CMD_RCGR 0xFE02C000
-#define MSM8X10_DINO_LPASS_DIGCODEC_CFG_RCGR 0xFE02C004
-#define MSM8X10_DINO_LPASS_DIGCODEC_M 0xFE02C008
-#define MSM8X10_DINO_LPASS_DIGCODEC_N 0xFE02C00C
-#define MSM8X10_DINO_LPASS_DIGCODEC_D 0xFE02C010
-#define MSM8X10_DINO_LPASS_DIGCODEC_CBCR 0xFE02C014
-#define MSM8X10_DINO_LPASS_DIGCODEC_AHB_CBCR 0xFE02C018
/*
* There is limitation for the clock root selection from
@@ -89,93 +89,78 @@
0,
};
-static atomic_t aud_init_rsc_ref;
+static atomic_t mclk_rsc_ref;
+static struct mutex cdc_mclk_mutex;
static int msm8x10_mclk_event(struct snd_soc_dapm_widget *w,
struct snd_kcontrol *kcontrol, int event);
-
-static const struct snd_soc_dapm_route msm8x10_common_audio_map[] = {
- {"RX_BIAS", NULL, "MCLK"},
- {"INT_LDO_H", NULL, "MCLK"},
- {"MIC BIAS External", NULL, "Handset Mic"},
- {"MIC BIAS Internal2", NULL, "Headset Mic"},
- {"AMIC1", NULL, "MIC BIAS External"},
- {"AMIC2", NULL, "MIC BIAS Internal2"},
-
-};
+static int msm_ext_spkramp_event(struct snd_soc_dapm_widget *w,
+ struct snd_kcontrol *kcontrol, int event);
+static void msm8x10_enable_ext_spk_power_amp(u32 on);
static const struct snd_soc_dapm_widget msm8x10_dapm_widgets[] = {
SND_SOC_DAPM_SUPPLY("MCLK", SND_SOC_NOPM, 0, 0,
msm8x10_mclk_event, SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
+ SND_SOC_DAPM_SPK("Lineout amp", msm_ext_spkramp_event),
SND_SOC_DAPM_MIC("Handset Mic", NULL),
SND_SOC_DAPM_MIC("Headset Mic", NULL),
};
-
-/*
- * This function will be replaced by
- * afe_set_lpass_internal_digital_codec_clock(port_id, cfg)
- * in the future after LPASS API fix
- */
-static int msm_enable_lpass_mclk(void)
+static int msm8x10_ext_spk_power_amp_init(void)
{
- /* Select the codec root */
- iowrite32(DIG_CDC_CLK_SEL_DIG_CODEC,
- ioremap(MSM8X10_DINO_LPASS_AUDIO_CORE_DIG_CODEC_CLK_SEL,
- 4));
- /* Div-2 */
- iowrite32(0x3, ioremap(MSM8X10_DINO_LPASS_DIGCODEC_CFG_RCGR, 4));
- iowrite32(0x0, ioremap(MSM8X10_DINO_LPASS_DIGCODEC_M, 4));
- iowrite32(0x0, ioremap(MSM8X10_DINO_LPASS_DIGCODEC_N, 4));
- iowrite32(0x0, ioremap(MSM8X10_DINO_LPASS_DIGCODEC_D, 4));
- /* Digital codec clock enable */
- iowrite32(0x1, ioremap(MSM8X10_DINO_LPASS_DIGCODEC_CBCR, 4));
- /* AHB clock enable */
- iowrite32(0x1, ioremap(MSM8X10_DINO_LPASS_DIGCODEC_AHB_CBCR, 4));
- /* Set the update bit to make the settings go through */
- iowrite32(0x1, ioremap(MSM8X10_DINO_LPASS_DIGCODEC_CMD_RCGR, 4));
+ int ret = 0;
+ ext_spk_amp_gpio = of_get_named_gpio(spdev->dev.of_node,
+ "qcom,ext-spk-amp-gpio", 0);
+ if (ext_spk_amp_gpio >= 0) {
+ ret = gpio_request(ext_spk_amp_gpio, "ext_spk_amp_gpio");
+ if (ret) {
+ pr_err("%s: gpio_request failed for ext_spk_amp_gpio.\n",
+ __func__);
+ return -EINVAL;
+ }
+ gpio_direction_output(ext_spk_amp_gpio, 0);
+ }
return 0;
}
-static int msm_enable_mclk_root(u16 port_id, struct afe_digital_clk_cfg *cfg)
+static int msm_ext_spkramp_event(struct snd_soc_dapm_widget *w,
+ struct snd_kcontrol *kcontrol, int event)
{
- int ret = 0;
- /*
- * msm_enable_lpass_mclk() function call will be replaced by
- * ret = afe_set_lpass_internal_digital_codec_clock(port_id, cfg)
- * in the future. Currentlt there is a bug in LPASS plan which
- * doesn't consider the digital codec clock. It will be fixed soon
- * in new Q6 image
- */
- msm_enable_lpass_mclk();
- pr_debug("%s(): return = %d\n", __func__, ret);
- return ret;
+ pr_debug("%s()\n", __func__);
+
+ if (ext_spk_amp_gpio >= 0) {
+ if (SND_SOC_DAPM_EVENT_ON(event))
+ msm8x10_enable_ext_spk_power_amp(1);
+ else
+ msm8x10_enable_ext_spk_power_amp(0);
+ }
+ return 0;
+
+}
+
+static void msm8x10_enable_ext_spk_power_amp(u32 on)
+{
+ if (on) {
+ gpio_direction_output(ext_spk_amp_gpio, on);
+ /*time takes enable the external power amplifier*/
+ usleep_range(EXT_CLASS_D_EN_DELAY,
+ EXT_CLASS_D_EN_DELAY + EXT_CLASS_D_DELAY_DELTA);
+ } else {
+ gpio_direction_output(ext_spk_amp_gpio, on);
+ /*time takes disable the external power amplifier*/
+ usleep_range(EXT_CLASS_D_DIS_DELAY,
+ EXT_CLASS_D_DIS_DELAY + EXT_CLASS_D_DELAY_DELTA);
+ }
+
+ pr_debug("%s: %s external speaker PAs.\n", __func__,
+ on ? "Enable" : "Disable");
}
static int msm_config_mclk(u16 port_id, struct afe_digital_clk_cfg *cfg)
{
- /* Select the codec root */
- iowrite32(DIG_CDC_CLK_SEL_DIG_CODEC,
- ioremap(MSM8X10_DINO_LPASS_AUDIO_CORE_DIG_CODEC_CLK_SEL,
- 4));
- /* Div-2 */
- iowrite32(0x3, ioremap(MSM8X10_DINO_LPASS_DIGCODEC_CFG_RCGR, 4));
- iowrite32(0x0, ioremap(MSM8X10_DINO_LPASS_DIGCODEC_M, 4));
- iowrite32(0x0, ioremap(MSM8X10_DINO_LPASS_DIGCODEC_N, 4));
- iowrite32(0x0, ioremap(MSM8X10_DINO_LPASS_DIGCODEC_D, 4));
- /* Digital codec clock enable */
- if (cfg->clk_val == 0) {
- iowrite32(0x0, ioremap(MSM8X10_DINO_LPASS_DIGCODEC_CBCR, 4));
- pr_debug("%s(line %d)\n", __func__, __LINE__);
- } else {
- iowrite32(0x1, ioremap(MSM8X10_DINO_LPASS_DIGCODEC_CBCR, 4));
- pr_debug("%s(line %d)\n", __func__, __LINE__);
- }
iowrite32(0x1, ioremap(MSM8X10_DINO_LPASS_DIGCODEC_CBCR, 4));
- /* AHB clock enable */
- iowrite32(0x1, ioremap(MSM8X10_DINO_LPASS_DIGCODEC_AHB_CBCR, 4));
/* Set the update bit to make the settings go through */
iowrite32(0x1, ioremap(MSM8X10_DINO_LPASS_DIGCODEC_CMD_RCGR, 4));
@@ -183,42 +168,6 @@
}
-static int msm_config_mi2s_clk(int enable)
-{
- int ret = 0;
- pr_debug("%s(line %d):enable = %x\n", __func__, __LINE__, enable);
- if (enable) {
- digital_cdc_clk.clk_val = 9600000;
- mi2s_rx_clk.clk_val2 = Q6AFE_LPASS_OSR_CLK_12_P288_MHZ;
- mi2s_rx_clk.clk_val1 = Q6AFE_LPASS_IBIT_CLK_1_P536_MHZ;
- ret = afe_set_lpass_clock(AFE_PORT_ID_SECONDARY_MI2S_RX,
- &mi2s_rx_clk);
- mi2s_tx_clk.clk_val2 = Q6AFE_LPASS_OSR_CLK_12_P288_MHZ;
- mi2s_tx_clk.clk_val1 = Q6AFE_LPASS_IBIT_CLK_1_P536_MHZ;
- ret = afe_set_lpass_clock(AFE_PORT_ID_PRIMARY_MI2S_RX,
- &mi2s_tx_clk);
- if (ret < 0)
- pr_err("%s:afe_set_lpass_clock failed\n", __func__);
-
- } else {
- digital_cdc_clk.clk_val = 0;
- mi2s_rx_clk.clk_val2 = Q6AFE_LPASS_OSR_CLK_DISABLE;
- mi2s_rx_clk.clk_val1 = Q6AFE_LPASS_IBIT_CLK_DISABLE;
- ret = afe_set_lpass_clock(AFE_PORT_ID_SECONDARY_MI2S_RX,
- &mi2s_rx_clk);
- mi2s_tx_clk.clk_val2 = Q6AFE_LPASS_OSR_CLK_DISABLE;
- mi2s_tx_clk.clk_val1 = Q6AFE_LPASS_IBIT_CLK_DISABLE;
- ret = afe_set_lpass_clock(AFE_PORT_ID_PRIMARY_MI2S_RX,
- &mi2s_tx_clk);
- if (ret < 0)
- pr_err("%s:afe_set_lpass_clock failed\n", __func__);
-
- }
- ret = msm_config_mclk(AFE_PORT_ID_SECONDARY_MI2S_RX, &digital_cdc_clk);
- return ret;
-}
-
-
static int msm_be_hw_params_fixup(struct snd_soc_pcm_runtime *rtd,
struct snd_pcm_hw_params *params)
{
@@ -294,7 +243,6 @@
pr_err("%s:afe_set_lpass_clock failed\n", __func__);
}
- ret = msm_config_mclk(AFE_PORT_ID_SECONDARY_MI2S_RX, &digital_cdc_clk);
return ret;
}
@@ -303,20 +251,27 @@
{
int ret = 0;
- pr_debug("%s: enable = %d codec name %s enable %x\n",
- __func__, enable, codec->name, enable);
+ mutex_lock(&cdc_mclk_mutex);
+
+ pr_debug("%s: enable = %d codec name %s enable %d mclk ref counter %d\n",
+ __func__, enable, codec->name, enable,
+ atomic_read(&mclk_rsc_ref));
if (enable) {
- digital_cdc_clk.clk_val = 9600000;
- msm_config_mi2s_clk(1);
- ret = msm_config_mclk(AFE_PORT_ID_SECONDARY_MI2S_RX,
- &digital_cdc_clk);
- msm8x10_wcd_mclk_enable(codec, 1, dapm);
+ if (atomic_inc_return(&mclk_rsc_ref) == 1) {
+ digital_cdc_clk.clk_val = 9600000;
+ msm_config_mclk(AFE_PORT_ID_SECONDARY_MI2S_RX,
+ &digital_cdc_clk);
+ msm8x10_wcd_mclk_enable(codec, 1, dapm);
+ }
} else {
- msm8x10_wcd_mclk_enable(codec, 0, dapm);
- ret = msm_config_mclk(AFE_PORT_ID_SECONDARY_MI2S_RX,
- &digital_cdc_clk);
- msm_config_mi2s_clk(0);
+ if (atomic_dec_return(&mclk_rsc_ref) == 0) {
+ digital_cdc_clk.clk_val = 0;
+ msm8x10_wcd_mclk_enable(codec, 0, dapm);
+ msm_config_mclk(AFE_PORT_ID_SECONDARY_MI2S_RX,
+ &digital_cdc_clk);
+ }
}
+ mutex_unlock(&cdc_mclk_mutex);
return ret;
}
@@ -372,31 +327,19 @@
int ret = 0;
pr_debug("%s(),dev_name%s\n", __func__, dev_name(cpu_dai->dev));
-
- pr_debug("%s(): aud_init_rsc_ref counter = %d\n",
- __func__, atomic_read(&aud_init_rsc_ref));
- if (atomic_inc_return(&aud_init_rsc_ref) != 1)
- goto exit;
-
+ msm8x10_ext_spk_power_amp_init();
snd_soc_dapm_new_controls(dapm, msm8x10_dapm_widgets,
ARRAY_SIZE(msm8x10_dapm_widgets));
- snd_soc_dapm_add_routes(dapm, msm8x10_common_audio_map,
- ARRAY_SIZE(msm8x10_common_audio_map));
-
+ snd_soc_dapm_enable_pin(dapm, "Lineout amp");
snd_soc_dapm_sync(dapm);
- ret = msm_enable_mclk_root(AFE_PORT_ID_SECONDARY_MI2S_RX,
- &digital_cdc_clk);
ret = snd_soc_jack_new(codec, "Headset Jack",
SND_JACK_HEADSET, &hs_jack);
-
if (ret) {
pr_err("%s: Failed to create headset jack\n", __func__);
- return ret;
}
-exit:
return ret;
}
@@ -806,16 +749,24 @@
card->dev = &pdev->dev;
platform_set_drvdata(pdev, card);
+ ret = snd_soc_of_parse_card_name(card, "qcom,model");
+ if (ret)
+ goto err;
+ ret = snd_soc_of_parse_audio_routing(card,
+ "qcom,audio-routing");
+ if (ret)
+ goto err;
+
+ spdev = pdev;
ret = snd_soc_register_card(card);
if (ret) {
dev_err(&pdev->dev, "snd_soc_register_card failed (%d)\n",
ret);
goto err;
}
-
- atomic_set(&aud_init_rsc_ref, 0);
-
+ mutex_init(&cdc_mclk_mutex);
+ atomic_set(&mclk_rsc_ref, 0);
return 0;
err:
return ret;
@@ -825,8 +776,10 @@
{
struct snd_soc_card *card = platform_get_drvdata(pdev);
+ if (gpio_is_valid(ext_spk_amp_gpio))
+ gpio_free(ext_spk_amp_gpio);
snd_soc_unregister_card(card);
-
+ mutex_destroy(&cdc_mclk_mutex);
return 0;
}
diff --git a/sound/soc/msm/qdsp6v2/msm-compr-q6-v2.c b/sound/soc/msm/qdsp6v2/msm-compr-q6-v2.c
index a1c1aef..4a20af1 100644
--- a/sound/soc/msm/qdsp6v2/msm-compr-q6-v2.c
+++ b/sound/soc/msm/qdsp6v2/msm-compr-q6-v2.c
@@ -150,7 +150,7 @@
* check for underrun
*/
if (runtime->status->hw_ptr >= runtime->control->appl_ptr) {
- pr_err("render stopped");
+ pr_info("render stopped");
runtime->render_flag |= SNDRV_RENDER_STOPPED;
break;
}
@@ -519,12 +519,14 @@
}
}
atomic_set(&prtd->start, 0);
+ runtime->render_flag &= ~SNDRV_RENDER_STOPPED;
break;
case SNDRV_PCM_TRIGGER_SUSPEND:
case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
pr_debug("SNDRV_PCM_TRIGGER_PAUSE\n");
q6asm_cmd_nowait(prtd->audio_client, CMD_PAUSE);
atomic_set(&prtd->start, 0);
+ runtime->render_flag &= ~SNDRV_RENDER_STOPPED;
break;
default:
ret = -EINVAL;
@@ -745,7 +747,7 @@
int dir = -1;
prtd->mmap_flag = 1;
-
+ runtime->render_flag = SNDRV_NON_DMA_MODE;
if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
dir = IN;
else
diff --git a/sound/soc/msm/qdsp6v2/msm-pcm-lpa-v2.c b/sound/soc/msm/qdsp6v2/msm-pcm-lpa-v2.c
index 4459bc8..eeb1745 100644
--- a/sound/soc/msm/qdsp6v2/msm-pcm-lpa-v2.c
+++ b/sound/soc/msm/qdsp6v2/msm-pcm-lpa-v2.c
@@ -40,6 +40,7 @@
#include "msm-pcm-q6-v2.h"
#include "msm-pcm-routing-v2.h"
#include "audio_ocmem.h"
+#include <sound/pcm.h>
static struct audio_locks the_locks;
@@ -92,9 +93,11 @@
struct snd_pcm_runtime *runtime = substream->runtime;
struct audio_aio_write_param param;
struct audio_buffer *buf = NULL;
+ struct output_meta_data_st output_meta_data;
unsigned long flag = 0;
int i = 0;
+ memset(&output_meta_data, 0x0, sizeof(struct output_meta_data_st));
spin_lock_irqsave(&the_locks.event_lock, flag);
switch (opcode) {
case ASM_DATA_EVENT_WRITE_DONE_V2: {
@@ -102,8 +105,6 @@
pr_debug("ASM_DATA_EVENT_WRITE_DONE_V2\n");
pr_debug("Buffer Consumed = 0x%08x\n", *ptrmem);
prtd->pcm_irq_pos += prtd->pcm_count;
- if (prtd->pcm_irq_pos >= prtd->pcm_size)
- prtd->pcm_irq_pos = 0;
if (atomic_read(&prtd->start))
snd_pcm_period_elapsed(substream);
else
@@ -120,21 +121,36 @@
buf = prtd->audio_client->port[IN].buf;
if (runtime->status->hw_ptr >= runtime->control->appl_ptr) {
- memset((void *)buf[0].data +
- (prtd->out_head * prtd->pcm_count),
- 0, prtd->pcm_count);
+ runtime->render_flag |= SNDRV_RENDER_STOPPED;
+ pr_info("%s:lpa driver underrun\n", __func__);
+ break;
}
- pr_debug("%s:writing %d bytes of buffer to dsp 2\n",
- __func__, prtd->pcm_count);
-
- param.paddr = (unsigned long)buf[0].phys
- + (prtd->out_head * prtd->pcm_count);
- param.len = prtd->pcm_count;
- param.msw_ts = 0;
- param.lsw_ts = 0;
+ pr_debug("%s:writing %d bytes of buffer[%d] to dsp 2\n",
+ __func__, prtd->pcm_count, prtd->out_head);
+ pr_debug("%s:writing buffer[%d] from 0x%08x\n",
+ __func__, prtd->out_head,
+ ((unsigned int)buf[0].phys +
+ (prtd->out_head * prtd->pcm_count)));
+ if (prtd->meta_data_mode) {
+ memcpy(&output_meta_data, (char *)(buf->data +
+ prtd->out_head * prtd->pcm_count),
+ sizeof(struct output_meta_data_st));
+ param.len = output_meta_data.frame_size;
+ } else {
+ param.len = prtd->pcm_count;
+ }
+ pr_debug("meta_data_length: %d, frame_length: %d\n",
+ output_meta_data.meta_data_length,
+ output_meta_data.frame_size);
+ param.paddr = (unsigned long)buf[0].phys +
+ (prtd->out_head * prtd->pcm_count) +
+ output_meta_data.meta_data_length;
+ param.msw_ts = output_meta_data.timestamp_msw;
+ param.lsw_ts = output_meta_data.timestamp_lsw;
param.flags = NO_TIMESTAMP;
- param.uid = (unsigned long)buf[0].phys
- + (prtd->out_head * prtd->pcm_count);
+ param.uid = ((unsigned long)buf[0].phys
+ + (prtd->out_head * prtd->pcm_count)
+ + output_meta_data.meta_data_length);
for (i = 0; i < sizeof(struct audio_aio_write_param)/4;
i++, ++ptrmem)
pr_debug("cmd[%d]=0x%08x\n", i, *ptrmem);
@@ -158,18 +174,28 @@
case ASM_SESSION_CMD_RUN_V2: {
if (!atomic_read(&prtd->pending_buffer))
break;
- if (runtime->status->hw_ptr >=
- runtime->control->appl_ptr)
- break;
pr_debug("%s:writing %d bytes of buffer to dsp\n",
__func__, prtd->pcm_count);
buf = prtd->audio_client->port[IN].buf;
- param.paddr = (unsigned long)buf[prtd->out_head].phys;
- param.len = prtd->pcm_count;
- param.msw_ts = 0;
- param.lsw_ts = 0;
+ pr_debug("%s:writing buffer[%d] from 0x%08x\n",
+ __func__, prtd->out_head,
+ ((unsigned int)buf[0].phys +
+ (prtd->out_head * prtd->pcm_count)));
+ if (prtd->meta_data_mode) {
+ memcpy(&output_meta_data, (char *)(buf->data +
+ prtd->out_head * prtd->pcm_count),
+ sizeof(struct output_meta_data_st));
+ param.len = output_meta_data.frame_size;
+ } else {
+ param.len = prtd->pcm_count;
+ }
+ param.paddr = (unsigned long)buf[prtd->out_head].phys +
+ output_meta_data.meta_data_length;
+ param.msw_ts = output_meta_data.timestamp_msw;
+ param.lsw_ts = output_meta_data.timestamp_lsw;
param.flags = NO_TIMESTAMP;
- param.uid = (unsigned long)buf[prtd->out_head].phys;
+ param.uid = (unsigned long)buf[prtd->out_head].phys +
+ output_meta_data.meta_data_length;
if (q6asm_async_write(prtd->audio_client,
¶m) < 0)
pr_err("%s:q6asm_async_write failed\n",
@@ -204,6 +230,7 @@
struct msm_audio *prtd = runtime->private_data;
int ret;
uint16_t bits_per_sample = 16;
+ u32 io_mode = ASYNC_IO_MODE;
pr_debug("%s\n", __func__);
prtd->pcm_size = snd_pcm_lib_buffer_bytes(substream);
@@ -226,6 +253,17 @@
break;
}
+ if (prtd->meta_data_mode)
+ io_mode |= COMPRESSED_IO;
+
+ ret = q6asm_set_io_mode(prtd->audio_client, io_mode);
+ if (ret < 0) {
+ pr_err("%s: Set IO mode failed\n", __func__);
+ q6asm_audio_client_free(prtd->audio_client);
+ prtd->audio_client = NULL;
+ return -ENOMEM;
+ }
+
ret = q6asm_media_format_block_pcm_format_support(
prtd->audio_client, runtime->rate,
runtime->channels, bits_per_sample);
@@ -240,6 +278,58 @@
return 0;
}
+static int msm_pcm_restart(struct snd_pcm_substream *substream)
+{
+ struct snd_pcm_runtime *runtime = substream->runtime;
+ struct msm_audio *prtd = runtime->private_data;
+ struct audio_aio_write_param param;
+ struct audio_buffer *buf = NULL;
+ struct output_meta_data_st output_meta_data;
+
+ pr_debug("%s: restart\n", __func__);
+ if (runtime->render_flag & SNDRV_RENDER_STOPPED) {
+ buf = prtd->audio_client->port[IN].buf;
+ pr_debug("%s:writing %d bytes of buffer[%d] to dsp 2\n",
+ __func__, prtd->pcm_count, prtd->out_head);
+ pr_debug("%s:writing buffer[%d] from 0x%08x\n",
+ __func__, prtd->out_head,
+ ((unsigned int)buf[0].phys +
+ (prtd->out_head * prtd->pcm_count)));
+ if (prtd->meta_data_mode) {
+ memcpy(&output_meta_data, (char *)(buf->data +
+ prtd->out_head * prtd->pcm_count),
+ sizeof(struct output_meta_data_st));
+ param.len = output_meta_data.frame_size;
+ } else {
+ param.len = prtd->pcm_count;
+ }
+ pr_debug("meta_data_length: %d, frame_length: %d\n",
+ output_meta_data.meta_data_length,
+ output_meta_data.frame_size);
+ pr_debug("timestamp_msw: %d, timestamp_lsw: %d\n",
+ output_meta_data.timestamp_msw,
+ output_meta_data.timestamp_lsw);
+ param.paddr = ((unsigned long)buf[0].phys +
+ (prtd->out_head * prtd->pcm_count) +
+ output_meta_data.meta_data_length);
+ param.msw_ts = output_meta_data.timestamp_msw;
+ param.lsw_ts = output_meta_data.timestamp_lsw;
+ param.flags = NO_TIMESTAMP;
+ param.uid = ((unsigned long)buf[0].phys +
+ (prtd->out_head * prtd->pcm_count) +
+ output_meta_data.meta_data_length);
+ if (q6asm_async_write(prtd->audio_client, ¶m) < 0)
+ pr_err("%s:q6asm_async_write failed\n",
+ __func__);
+ else
+ prtd->out_head =
+ (prtd->out_head + 1) & (runtime->periods - 1);
+ runtime->render_flag &= ~SNDRV_RENDER_STOPPED;
+ return 0;
+ }
+ return 0;
+}
+
static int msm_pcm_trigger(struct snd_pcm_substream *substream, int cmd)
{
int ret = 0;
@@ -249,8 +339,7 @@
switch (cmd) {
case SNDRV_PCM_TRIGGER_START:
prtd->pcm_irq_pos = 0;
- if (!atomic_cmpxchg(&lpa_audio.audio_ocmem_req, 0, 1))
- audio_ocmem_process_req(AUDIO, true);
+ atomic_set(&prtd->pending_buffer, 1);
case SNDRV_PCM_TRIGGER_RESUME:
case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
pr_debug("SNDRV_PCM_TRIGGER_START\n");
@@ -262,6 +351,7 @@
pr_debug("SNDRV_PCM_TRIGGER_STOP\n");
atomic_set(&prtd->start, 0);
atomic_set(&prtd->stop, 1);
+ runtime->render_flag &= ~SNDRV_RENDER_STOPPED;
if (substream->stream != SNDRV_PCM_STREAM_PLAYBACK)
break;
break;
@@ -270,6 +360,7 @@
pr_debug("SNDRV_PCM_TRIGGER_PAUSE\n");
q6asm_cmd_nowait(prtd->audio_client, CMD_PAUSE);
atomic_set(&prtd->start, 0);
+ runtime->render_flag &= ~SNDRV_RENDER_STOPPED;
break;
default:
ret = -EINVAL;
@@ -293,6 +384,7 @@
}
runtime->hw = msm_pcm_hardware;
prtd->substream = substream;
+ runtime->render_flag = SNDRV_DMA_MODE;
prtd->audio_client = q6asm_audio_client_alloc(
(app_cb)event_handler, prtd);
if (!prtd->audio_client) {
@@ -300,6 +392,8 @@
kfree(prtd);
return -ENOMEM;
}
+
+ prtd->meta_data_mode = false;
/* Capture path */
if (substream->stream == SNDRV_PCM_STREAM_CAPTURE)
return -EPERM;
@@ -321,7 +415,12 @@
atomic_set(&lpa_audio.audio_ocmem_req, 0);
runtime->private_data = prtd;
lpa_audio.prtd = prtd;
-
+ if (!atomic_cmpxchg(&lpa_audio.audio_ocmem_req, 0, 1))
+ audio_ocmem_process_req(AUDIO, true);
+ else
+ atomic_inc(&lpa_audio.audio_ocmem_req);
+ pr_debug("%s: req: %d\n", __func__,
+ atomic_read(&lpa_audio.audio_ocmem_req));
return 0;
}
@@ -373,8 +472,13 @@
dir = IN;
atomic_set(&prtd->pending_buffer, 0);
- if (atomic_cmpxchg(&lpa_audio.audio_ocmem_req, 1, 0))
+ if (atomic_read(&lpa_audio.audio_ocmem_req) > 1)
+ atomic_dec(&lpa_audio.audio_ocmem_req);
+ else if (atomic_cmpxchg(&lpa_audio.audio_ocmem_req, 1, 0))
audio_ocmem_process_req(AUDIO, false);
+
+ pr_debug("%s: req: %d\n", __func__,
+ atomic_read(&lpa_audio.audio_ocmem_req));
lpa_audio.prtd = NULL;
q6asm_cmd(prtd->audio_client, CMD_CLOSE);
q6asm_audio_client_buf_free_contiguous(dir,
@@ -386,6 +490,9 @@
}
msm_pcm_routing_dereg_phy_stream(soc_prtd->dai_link->be_id,
SNDRV_PCM_STREAM_PLAYBACK);
+
+ prtd->meta_data_mode = false;
+
pr_debug("%s\n", __func__);
kfree(prtd);
@@ -416,6 +523,8 @@
struct snd_pcm_runtime *runtime = substream->runtime;
struct msm_audio *prtd = runtime->private_data;
+ if (prtd->pcm_irq_pos >= prtd->pcm_size)
+ prtd->pcm_irq_pos = 0;
pr_debug("%s: pcm_irq_pos = %d\n", __func__, prtd->pcm_irq_pos);
return bytes_to_frames(runtime, (prtd->pcm_irq_pos));
}
@@ -431,6 +540,7 @@
int dir = -1;
prtd->mmap_flag = 1;
+ runtime->render_flag = SNDRV_NON_DMA_MODE;
if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
dir = IN;
@@ -451,6 +561,7 @@
struct audio_buffer *buf;
uint16_t bits_per_sample = 16;
int dir, ret;
+
struct asm_softpause_params softpause = {
.enable = SOFT_PAUSE_ENABLE,
.period = SOFT_PAUSE_PERIOD,
@@ -475,13 +586,6 @@
prtd->audio_client = NULL;
return -ENOMEM;
}
- ret = q6asm_set_io_mode(prtd->audio_client, ASYNC_IO_MODE);
- if (ret < 0) {
- pr_err("%s: Set IO mode failed\n", __func__);
- q6asm_audio_client_free(prtd->audio_client);
- prtd->audio_client = NULL;
- return -ENOMEM;
- }
}
pr_debug("%s: session ID %d\n", __func__, prtd->audio_client->session);
@@ -577,6 +681,14 @@
pr_err("Flush cmd timeout\n");
prtd->pcm_irq_pos = 0;
break;
+ case SNDRV_COMPRESS_METADATA_MODE:
+ if (!atomic_read(&prtd->start)) {
+ pr_debug("Metadata mode enabled\n");
+ prtd->meta_data_mode = true;
+ return 0;
+ }
+ pr_debug("Metadata mode not enabled\n");
+ return -EPERM;
default:
break;
}
@@ -592,6 +704,7 @@
.trigger = msm_pcm_trigger,
.pointer = msm_pcm_pointer,
.mmap = msm_pcm_mmap,
+ .restart = msm_pcm_restart,
};
static int msm_asoc_pcm_new(struct snd_soc_pcm_runtime *rtd)
@@ -616,6 +729,7 @@
dev_info(&pdev->dev, "%s: dev name %s\n",
__func__, dev_name(&pdev->dev));
+ atomic_set(&lpa_audio.audio_ocmem_req, 0);
return snd_soc_register_platform(&pdev->dev,
&msm_soc_platform);
}
diff --git a/sound/soc/msm/qdsp6v2/msm-pcm-q6-v2.c b/sound/soc/msm/qdsp6v2/msm-pcm-q6-v2.c
index 0ae393c..77f3a07 100644
--- a/sound/soc/msm/qdsp6v2/msm-pcm-q6-v2.c
+++ b/sound/soc/msm/qdsp6v2/msm-pcm-q6-v2.c
@@ -48,12 +48,14 @@
};
static struct snd_msm_volume pcm_audio = {NULL, 0x2000};
-#define PLAYBACK_NUM_PERIODS 8
+#define PLAYBACK_MIN_NUM_PERIODS 2
+#define PLAYBACK_MAX_NUM_PERIODS 8
#define PLAYBACK_MAX_PERIOD_SIZE 12288
-#define PLAYBACK_MIN_PERIOD_SIZE 1024
-#define CAPTURE_NUM_PERIODS 16
-#define CAPTURE_MAX_PERIOD_SIZE 4096
-#define CAPTURE_MIN_PERIOD_SIZE 512
+#define PLAYBACK_MIN_PERIOD_SIZE 128
+#define CAPTURE_MIN_NUM_PERIODS 2
+#define CAPTURE_MAX_NUM_PERIODS 8
+#define CAPTURE_MAX_PERIOD_SIZE 4096
+#define CAPTURE_MIN_PERIOD_SIZE 320
static struct snd_pcm_hardware msm_pcm_hardware_capture = {
.info = (SNDRV_PCM_INFO_MMAP |
@@ -67,11 +69,12 @@
.rate_max = 48000,
.channels_min = 1,
.channels_max = 4,
- .buffer_bytes_max = CAPTURE_NUM_PERIODS * CAPTURE_MAX_PERIOD_SIZE,
+ .buffer_bytes_max = CAPTURE_MAX_NUM_PERIODS *
+ CAPTURE_MAX_PERIOD_SIZE,
.period_bytes_min = CAPTURE_MIN_PERIOD_SIZE,
.period_bytes_max = CAPTURE_MAX_PERIOD_SIZE,
- .periods_min = CAPTURE_NUM_PERIODS,
- .periods_max = CAPTURE_NUM_PERIODS,
+ .periods_min = CAPTURE_MIN_NUM_PERIODS,
+ .periods_max = CAPTURE_MAX_NUM_PERIODS,
.fifo_size = 0,
};
@@ -88,11 +91,12 @@
.rate_max = 192000,
.channels_min = 1,
.channels_max = 8,
- .buffer_bytes_max = PLAYBACK_NUM_PERIODS * PLAYBACK_MAX_PERIOD_SIZE,
+ .buffer_bytes_max = PLAYBACK_MAX_NUM_PERIODS *
+ PLAYBACK_MAX_PERIOD_SIZE,
.period_bytes_min = PLAYBACK_MIN_PERIOD_SIZE,
.period_bytes_max = PLAYBACK_MAX_PERIOD_SIZE,
- .periods_min = PLAYBACK_NUM_PERIODS,
- .periods_max = PLAYBACK_NUM_PERIODS,
+ .periods_min = PLAYBACK_MIN_NUM_PERIODS,
+ .periods_max = PLAYBACK_MAX_NUM_PERIODS,
.fifo_size = 0,
};
@@ -102,7 +106,7 @@
96000, 192000
};
-static uint32_t in_frame_info[CAPTURE_NUM_PERIODS][2];
+static uint32_t in_frame_info[CAPTURE_MAX_NUM_PERIODS][2];
static struct snd_pcm_hw_constraint_list constraints_sample_rates = {
.count = ARRAY_SIZE(supported_sample_rates),
@@ -295,7 +299,7 @@
case SNDRV_PCM_TRIGGER_RESUME:
case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
pr_debug("%s: Trigger start\n", __func__);
- q6asm_run_nowait(prtd->audio_client, 0, 0, 0);
+ ret = q6asm_run_nowait(prtd->audio_client, 0, 0, 0);
break;
case SNDRV_PCM_TRIGGER_STOP:
pr_debug("SNDRV_PCM_TRIGGER_STOP\n");
@@ -303,12 +307,12 @@
if (substream->stream != SNDRV_PCM_STREAM_PLAYBACK)
break;
prtd->cmd_ack = 0;
- q6asm_cmd_nowait(prtd->audio_client, CMD_EOS);
+ ret = q6asm_cmd_nowait(prtd->audio_client, CMD_EOS);
break;
case SNDRV_PCM_TRIGGER_SUSPEND:
case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
pr_debug("SNDRV_PCM_TRIGGER_PAUSE\n");
- q6asm_cmd_nowait(prtd->audio_client, CMD_PAUSE);
+ ret = q6asm_cmd_nowait(prtd->audio_client, CMD_PAUSE);
atomic_set(&prtd->start, 0);
break;
default:
@@ -364,8 +368,8 @@
if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
ret = snd_pcm_hw_constraint_minmax(runtime,
SNDRV_PCM_HW_PARAM_BUFFER_BYTES,
- PLAYBACK_NUM_PERIODS * PLAYBACK_MIN_PERIOD_SIZE,
- PLAYBACK_NUM_PERIODS * PLAYBACK_MAX_PERIOD_SIZE);
+ PLAYBACK_MIN_NUM_PERIODS * PLAYBACK_MIN_PERIOD_SIZE,
+ PLAYBACK_MAX_NUM_PERIODS * PLAYBACK_MAX_PERIOD_SIZE);
if (ret < 0) {
pr_err("constraint for buffer bytes min max ret = %d\n",
ret);
@@ -375,8 +379,8 @@
if (substream->stream == SNDRV_PCM_STREAM_CAPTURE) {
ret = snd_pcm_hw_constraint_minmax(runtime,
SNDRV_PCM_HW_PARAM_BUFFER_BYTES,
- CAPTURE_NUM_PERIODS * CAPTURE_MIN_PERIOD_SIZE,
- CAPTURE_NUM_PERIODS * CAPTURE_MAX_PERIOD_SIZE);
+ CAPTURE_MIN_NUM_PERIODS * CAPTURE_MIN_PERIOD_SIZE,
+ CAPTURE_MAX_NUM_PERIODS * CAPTURE_MAX_PERIOD_SIZE);
if (ret < 0) {
pr_err("constraint for buffer bytes min max ret = %d\n",
ret);
diff --git a/sound/soc/msm/qdsp6v2/msm-pcm-q6-v2.h b/sound/soc/msm/qdsp6v2/msm-pcm-q6-v2.h
index 4b3cfe7..6ded0d9 100644
--- a/sound/soc/msm/qdsp6v2/msm-pcm-q6-v2.h
+++ b/sound/soc/msm/qdsp6v2/msm-pcm-q6-v2.h
@@ -85,6 +85,7 @@
bool set_channel_map;
char channel_map[8];
int cmd_interrupt;
+ bool meta_data_mode;
};
struct output_meta_data_st {
diff --git a/sound/soc/msm/qdsp6v2/msm-pcm-routing-v2.c b/sound/soc/msm/qdsp6v2/msm-pcm-routing-v2.c
index 4fd90f9..97803b3 100644
--- a/sound/soc/msm/qdsp6v2/msm-pcm-routing-v2.c
+++ b/sound/soc/msm/qdsp6v2/msm-pcm-routing-v2.c
@@ -2249,6 +2249,9 @@
SOC_SINGLE_EXT("SLIM_0_TX", MSM_BACKEND_DAI_AUXPCM_RX,
MSM_BACKEND_DAI_SLIMBUS_0_TX, 1, 0, msm_routing_get_port_mixer,
msm_routing_put_port_mixer),
+ SOC_SINGLE_EXT("SEC_AUX_PCM_UL_TX", MSM_BACKEND_DAI_SEC_AUXPCM_RX,
+ MSM_BACKEND_DAI_SEC_AUXPCM_TX, 1, 0, msm_routing_get_port_mixer,
+ msm_routing_put_port_mixer),
};
static const struct snd_kcontrol_new sec_auxpcm_rx_port_mixer_controls[] = {
@@ -2258,6 +2261,9 @@
SOC_SINGLE_EXT("SLIM_0_TX", MSM_BACKEND_DAI_SEC_AUXPCM_RX,
MSM_BACKEND_DAI_SLIMBUS_0_TX, 1, 0, msm_routing_get_port_mixer,
msm_routing_put_port_mixer),
+ SOC_SINGLE_EXT("AUX_PCM_UL_TX", MSM_BACKEND_DAI_SEC_AUXPCM_RX,
+ MSM_BACKEND_DAI_SEC_AUXPCM_TX, 1, 0, msm_routing_get_port_mixer,
+ msm_routing_put_port_mixer),
};
static const struct snd_kcontrol_new sbus_1_rx_port_mixer_controls[] = {
@@ -3384,8 +3390,10 @@
{"AUXPCM_RX Port Mixer", "AUX_PCM_UL_TX", "AUX_PCM_TX"},
{"AUXPCM_RX Port Mixer", "SLIM_0_TX", "SLIMBUS_0_TX"},
+ {"AUXPCM_RX Port Mixer", "SEC_AUX_PCM_UL_TX", "SEC_AUX_PCM_TX"},
{"AUX_PCM_RX", NULL, "AUXPCM_RX Port Mixer"},
+ {"SEC_AUXPCM_RX Port Mixer", "AUX_PCM_UL_TX", "AUX_PCM_TX"},
{"SEC_AUXPCM_RX Port Mixer", "SEC_AUX_PCM_UL_TX", "SEC_AUX_PCM_TX"},
{"SEC_AUXPCM_RX Port Mixer", "SLIM_0_TX", "SLIMBUS_0_TX"},
{"SEC_AUX_PCM_RX", NULL, "SEC_AUXPCM_RX Port Mixer"},
diff --git a/sound/soc/msm/qdsp6v2/msm-pcm-voice-v2.c b/sound/soc/msm/qdsp6v2/msm-pcm-voice-v2.c
index 5c97403..5c420ed 100644
--- a/sound/soc/msm/qdsp6v2/msm-pcm-voice-v2.c
+++ b/sound/soc/msm/qdsp6v2/msm-pcm-voice-v2.c
@@ -286,7 +286,7 @@
{
struct snd_pcm_runtime *runtime = substream->runtime;
struct msm_voice *prtd = runtime->private_data;
- uint16_t session_id = get_session_id(prtd);
+ uint32_t session_id = get_session_id(prtd);
enum voice_lch_mode lch_mode;
int ret = 0;
diff --git a/sound/soc/msm/qdsp6v2/q6adm.c b/sound/soc/msm/qdsp6v2/q6adm.c
index bdb0e13..a6ae357 100644
--- a/sound/soc/msm/qdsp6v2/q6adm.c
+++ b/sound/soc/msm/qdsp6v2/q6adm.c
@@ -1313,7 +1313,6 @@
{
struct avs_cmd_shared_mem_unmap_regions unmap_regions;
int ret = 0;
- int cmd_size = 0;
int index = 0;
pr_debug("%s\n", __func__);
@@ -1334,14 +1333,14 @@
unmap_regions.hdr.hdr_field = APR_HDR_FIELD(APR_MSG_TYPE_SEQ_CMD,
APR_HDR_LEN(APR_HDR_SIZE),
APR_PKT_VER);
- unmap_regions.hdr.pkt_size = cmd_size;
+ unmap_regions.hdr.pkt_size = sizeof(unmap_regions);
unmap_regions.hdr.src_port = 0;
unmap_regions.hdr.dest_port = atomic_read(&this_adm.copp_id[index]);
unmap_regions.hdr.token = port_id;
unmap_regions.hdr.opcode = ADM_CMD_SHARED_MEM_UNMAP_REGIONS;
unmap_regions.mem_map_handle = atomic_read(&this_adm.
mem_map_cal_handles[atomic_read(&this_adm.mem_map_cal_index)]);
- atomic_set(&this_adm.copp_stat[0], 0);
+ atomic_set(&this_adm.copp_stat[index], 0);
ret = apr_send_pkt(this_adm.apr, (uint32_t *) &unmap_regions);
if (ret < 0) {
pr_err("%s: mmap_regions op[0x%x]rc[%d]\n", __func__,
@@ -1351,11 +1350,16 @@
}
ret = wait_event_timeout(this_adm.wait[index],
- atomic_read(&this_adm.copp_stat[0]), 5 * HZ);
+ atomic_read(&this_adm.copp_stat[index]),
+ 5 * HZ);
if (!ret) {
- pr_err("%s: timeout. waited for memory_unmap\n", __func__);
+ pr_err("%s: timeout. waited for memory_unmap index %d\n",
+ __func__, index);
ret = -EINVAL;
goto fail_cmd;
+ } else {
+ pr_debug("%s: Unmap handle 0x%x succeeded\n", __func__,
+ unmap_regions.mem_map_handle);
}
fail_cmd:
return ret;
diff --git a/sound/soc/msm/qdsp6v2/q6afe.c b/sound/soc/msm/qdsp6v2/q6afe.c
index 3bb31f9..9882ec7 100644
--- a/sound/soc/msm/qdsp6v2/q6afe.c
+++ b/sound/soc/msm/qdsp6v2/q6afe.c
@@ -393,11 +393,23 @@
if ((this_afe.afe_cal_addr[path].cal_paddr != cal_block.cal_paddr) ||
(cal_block.cal_size > this_afe.afe_cal_addr[path].cal_size)) {
atomic_set(&this_afe.mem_map_cal_index, path);
- if (this_afe.afe_cal_addr[path].cal_paddr != 0)
- afe_cmd_memory_unmap(
+ if (this_afe.afe_cal_addr[path].cal_paddr != 0) {
+ result = afe_cmd_memory_unmap(
this_afe.afe_cal_addr[path].cal_paddr);
+ if (result) {
+ pr_err("%s: AFE memory unmap failed\n",
+ __func__);
+ atomic_set(&this_afe.mem_map_cal_index, -1);
+ goto done;
+ }
+ }
- afe_cmd_memory_map(cal_block.cal_paddr, size);
+ result = afe_cmd_memory_map(cal_block.cal_paddr, size);
+ if (result) {
+ pr_err("%s: AFE memory map failed\n", __func__);
+ atomic_set(&this_afe.mem_map_cal_index, -1);
+ goto done;
+ }
atomic_set(&this_afe.mem_map_cal_index, -1);
this_afe.afe_cal_addr[path].cal_paddr = cal_block.cal_paddr;
this_afe.afe_cal_addr[path].cal_size = size;
@@ -1949,6 +1961,7 @@
pr_debug("%s: dma_addr_p 0x%x , size %d\n", __func__,
dma_addr_p, dma_buf_sz);
atomic_set(&this_afe.state, 1);
+ atomic_set(&this_afe.status, 0);
this_afe.mmap_handle = 0;
ret = apr_send_pkt(this_afe.apr, (uint32_t *) mmap_region_cmd);
if (ret < 0) {
@@ -1966,6 +1979,12 @@
ret = -EINVAL;
goto fail_cmd;
}
+ if (atomic_read(&this_afe.status) != 0) {
+ pr_err("%s: Memory map cmd failed\n", __func__);
+ ret = -EINVAL;
+ goto fail_cmd;
+ }
+
pr_debug("%s: mmap handle 0x%x\n", __func__, this_afe.mmap_handle);
kfree(mmap_region_cmd);
return 0;
@@ -2120,10 +2139,16 @@
/* Todo */
index = mregion.hdr.token = IDX_RSVD_2;
+ atomic_set(&this_afe.status, 0);
ret = afe_apr_send_pkt(&mregion, &this_afe.wait[index]);
if (ret)
pr_err("%s: AFE memory unmap cmd failed %d\n",
__func__, ret);
+ if (atomic_read(&this_afe.status) != 0) {
+ pr_err("%s: Memory unmap cmd failed\n", __func__);
+ ret = -EINVAL;
+ }
+
return ret;
}
diff --git a/sound/soc/msm/qdsp6v2/q6asm.c b/sound/soc/msm/qdsp6v2/q6asm.c
index 5136cb9..c65222b 100644
--- a/sound/soc/msm/qdsp6v2/q6asm.c
+++ b/sound/soc/msm/qdsp6v2/q6asm.c
@@ -30,6 +30,7 @@
#include <linux/time.h>
#include <linux/atomic.h>
#include <linux/msm_audio_ion.h>
+#include <linux/mm.h>
#include <asm/ioctls.h>
@@ -408,7 +409,7 @@
result = wait_event_timeout(ac->cmd_wait,
(atomic_read(&ac->cmd_state) == 0), 5*HZ);
- if (result < 0) {
+ if (!result) {
pr_err("%s: Set topologies failed payload = 0x%x\n",
__func__, cal_block.cal_paddr);
goto done;
@@ -508,16 +509,17 @@
int q6asm_mmap_apr_dereg(void)
{
- if (atomic_read(&this_mmap.ref_cnt) <= 0) {
- pr_err("%s: APR Common Port Already Closed\n", __func__);
- goto done;
- }
- atomic_dec(&this_mmap.ref_cnt);
- if (atomic_read(&this_mmap.ref_cnt) == 0) {
+ int c;
+
+ c = atomic_sub_return(1, &this_mmap.ref_cnt);
+ if (c == 0) {
apr_deregister(this_mmap.apr);
- pr_debug("%s:APR De-Register common port\n", __func__);
+ pr_debug("%s: APR De-Register common port\n", __func__);
+ } else if (c < 0) {
+ pr_err("%s: APR Common Port Already Closed\n", __func__);
+ atomic_set(&this_mmap.ref_cnt, 0);
}
-done:
+
return 0;
}
@@ -760,6 +762,7 @@
int rc = 0;
struct audio_buffer *buf;
int len;
+ int bytes_to_alloc;
if (!(ac) || ((dir != IN) && (dir != OUT)))
return -EINVAL;
@@ -786,8 +789,13 @@
ac->port[dir].buf = buf;
+ bytes_to_alloc = bufsz * bufcnt;
+
+ /* The size to allocate should be multiple of 4K bytes */
+ bytes_to_alloc = PAGE_ALIGN(bytes_to_alloc);
+
rc = msm_audio_ion_alloc("audio_client", &buf[0].client, &buf[0].handle,
- bufsz*bufcnt,
+ bytes_to_alloc,
(ion_phys_addr_t *)&buf[0].phys, (size_t *)&len,
&buf[0].data);
if (rc) {
@@ -1716,12 +1724,14 @@
run.time_lsw = lsw_ts;
run.time_msw = msw_ts;
+ /* have to increase first avoid race */
+ atomic_inc(&ac->nowait_cmd_cnt);
rc = apr_send_pkt(ac->apr, (uint32_t *) &run);
if (rc < 0) {
+ atomic_dec(&ac->nowait_cmd_cnt);
pr_err("%s:Commmand run failed[%d]", __func__, rc);
return -EINVAL;
}
- atomic_inc(&ac->nowait_cmd_cnt);
return 0;
}
@@ -2718,6 +2728,11 @@
bufcnt_t = (is_contiguous) ? 1 : bufcnt;
bufsz_t = (is_contiguous) ? (bufsz * bufcnt) : bufsz;
+ if (is_contiguous) {
+ /* The size to memory map should be multiple of 4K bytes */
+ bufsz_t = PAGE_ALIGN(bufsz_t);
+ }
+
cmd_size = sizeof(struct avs_cmd_shared_mem_map_regions)
+ (sizeof(struct avs_shared_map_region_payload)
* bufcnt_t);
@@ -3692,12 +3707,14 @@
pr_debug("%s:session[%d]opcode[0x%x] ", __func__,
ac->session,
hdr.opcode);
+ /* have to increase first avoid race */
+ atomic_inc(&ac->nowait_cmd_cnt);
rc = apr_send_pkt(ac->apr, (uint32_t *) &hdr);
if (rc < 0) {
+ atomic_dec(&ac->nowait_cmd_cnt);
pr_err("%s:Commmand 0x%x failed\n", __func__, hdr.opcode);
goto fail_cmd;
}
- atomic_inc(&ac->nowait_cmd_cnt);
return 0;
fail_cmd:
return -EINVAL;
diff --git a/sound/soc/msm/qdsp6v2/q6voice.c b/sound/soc/msm/qdsp6v2/q6voice.c
index 2fabca1..87bee75 100644
--- a/sound/soc/msm/qdsp6v2/q6voice.c
+++ b/sound/soc/msm/qdsp6v2/q6voice.c
@@ -2761,6 +2761,12 @@
/* reset LCH mode */
v->lch_mode = 0;
+ /* clear mute setting */
+ v->dev_rx.dev_mute = common.default_mute_val;
+ v->dev_tx.dev_mute = common.default_mute_val;
+ v->stream_rx.stream_mute = common.default_mute_val;
+ v->stream_tx.stream_mute = common.default_mute_val;
+
/* detach VOCPROC and wait for response from mvm */
mvm_d_vocproc_cmd.hdr.hdr_field = APR_HDR_FIELD(APR_MSG_TYPE_SEQ_CMD,
APR_HDR_LEN(APR_HDR_SIZE),
@@ -4182,6 +4188,15 @@
pr_err("setup voice failed\n");
goto fail;
}
+
+ ret = voice_send_vol_index_cmd(v);
+ if (ret < 0)
+ pr_err("voice volume failed\n");
+
+ ret = voice_send_stream_mute_cmd(v);
+ if (ret < 0)
+ pr_err("voice mute failed\n");
+
ret = voice_send_start_voice_cmd(v);
if (ret < 0) {
pr_err("start voice failed\n");
@@ -4891,7 +4906,7 @@
memset(&common, 0, sizeof(struct common_data));
/* set default value */
- common.default_mute_val = 1; /* default is mute */
+ common.default_mute_val = 0; /* default is un-mute */
common.default_vol_val = 0;
common.default_sample_val = 8000;
@@ -4907,8 +4922,8 @@
/* initialize dev_rx and dev_tx */
common.voice[i].dev_rx.volume = common.default_vol_val;
- common.voice[i].dev_rx.dev_mute = 0;
- common.voice[i].dev_tx.dev_mute = 0;
+ common.voice[i].dev_rx.dev_mute = common.default_mute_val;
+ common.voice[i].dev_tx.dev_mute = common.default_mute_val;
common.voice[i].stream_rx.stream_mute = common.default_mute_val;
common.voice[i].stream_tx.stream_mute = common.default_mute_val;