tree a5210ff54f370adb3dd852cb1a99abaa0a7e2e27
parent 866a1c8c354e613c2bf378a1cd562756d4a32e75
author Heiko Stuebner <heiko@sntech.de> 1318572537 +0900
committer Kukjin Kim <kgene.kim@samsung.com> 1318572953 +0900

ARM: S3C24XX: use clk_get_rate to init fclk in common_setup_clocks

Previously the fclk rate was calculated by dividing the pll through
the divider value of the armdiv. With a real armdiv clk in place it's
possible to simply read its value, which does essentially the same.

This change makes the whole fdiv_fn function pointers supplied to
s3c2443_common_init_clocks and s3c2443_common_setup_clocks
obsolete, so remove it too.

Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>