msm: clock: Rename SDC clocks to match new naming convention

Signed-off-by: Matt Wagantall <mattw@codeaurora.org>
diff --git a/arch/arm/mach-msm/clock-7x30.c b/arch/arm/mach-msm/clock-7x30.c
index d77d7cb..9874929 100644
--- a/arch/arm/mach-msm/clock-7x30.c
+++ b/arch/arm/mach-msm/clock-7x30.c
@@ -2805,14 +2805,14 @@
 	OWN(ROW1, 17, "mdc_clk",	mdc_clk,	NULL),
 	OWN(ROW1, 19, "mddi_clk",	pmdh_clk,	NULL),
 	OWN(ROW1, 19, "mddi_pclk",	pmdh_p_clk,	NULL),
-	OWN(ROW1, 23, "sdc_clk",	sdc1_clk,	"msm_sdcc.1"),
-	OWN(ROW1, 23, "sdc_pclk",	sdc1_p_clk,	"msm_sdcc.1"),
-	OWN(ROW1, 25, "sdc_clk",	sdc2_clk,	"msm_sdcc.2"),
-	OWN(ROW1, 25, "sdc_pclk",	sdc2_p_clk,	"msm_sdcc.2"),
-	OWN(ROW1, 27, "sdc_clk",	sdc3_clk,	"msm_sdcc.3"),
-	OWN(ROW1, 27, "sdc_pclk",	sdc3_p_clk,	"msm_sdcc.3"),
-	OWN(ROW1, 29, "sdc_clk",	sdc4_clk,	"msm_sdcc.4"),
-	OWN(ROW1, 29, "sdc_pclk",	sdc4_p_clk,	"msm_sdcc.4"),
+	OWN(ROW1, 23, "core_clk",	sdc1_clk,	"msm_sdcc.1"),
+	OWN(ROW1, 23, "iface_clk",	sdc1_p_clk,	"msm_sdcc.1"),
+	OWN(ROW1, 25, "core_clk",	sdc2_clk,	"msm_sdcc.2"),
+	OWN(ROW1, 25, "iface_clk",	sdc2_p_clk,	"msm_sdcc.2"),
+	OWN(ROW1, 27, "core_clk",	sdc3_clk,	"msm_sdcc.3"),
+	OWN(ROW1, 27, "iface_clk",	sdc3_p_clk,	"msm_sdcc.3"),
+	OWN(ROW1, 29, "core_clk",	sdc4_clk,	"msm_sdcc.4"),
+	OWN(ROW1, 29, "iface_clk",	sdc4_p_clk,	"msm_sdcc.4"),
 	OWN(ROW1,  0, "core_clk",	uart2_clk,	"msm_serial.1"),
 	OWN(ROW1,  2, "usb_hs2_clk",	usb_hs2_clk,	NULL),
 	OWN(ROW1,  2, "usb_hs2_core_clk", usb_hs2_core_clk, NULL),